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path: root/drivers/video/omap2/dss/dispc.c
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Diffstat (limited to 'drivers/video/omap2/dss/dispc.c')
-rw-r--r--drivers/video/omap2/dss/dispc.c105
1 files changed, 64 insertions, 41 deletions
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
index 9f8c69f16e61..28ad68b6be48 100644
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -178,6 +178,7 @@ struct dispc_irq_stats {
178}; 178};
179 179
180static struct { 180static struct {
181 struct platform_device *pdev;
181 void __iomem *base; 182 void __iomem *base;
182 183
183 u32 fifo_size[3]; 184 u32 fifo_size[3];
@@ -3269,47 +3270,6 @@ static void _omap_dispc_initial_config(void)
3269 dispc_read_plane_fifo_sizes(); 3270 dispc_read_plane_fifo_sizes();
3270} 3271}
3271 3272
3272int dispc_init(void)
3273{
3274 u32 rev;
3275
3276 spin_lock_init(&dispc.irq_lock);
3277
3278#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
3279 spin_lock_init(&dispc.irq_stats_lock);
3280 dispc.irq_stats.last_reset = jiffies;
3281#endif
3282
3283 INIT_WORK(&dispc.error_work, dispc_error_worker);
3284
3285 dispc.base = ioremap(DISPC_BASE, DISPC_SZ_REGS);
3286 if (!dispc.base) {
3287 DSSERR("can't ioremap DISPC\n");
3288 return -ENOMEM;
3289 }
3290
3291 enable_clocks(1);
3292
3293 _omap_dispc_initial_config();
3294
3295 _omap_dispc_initialize_irq();
3296
3297 dispc_save_context();
3298
3299 rev = dispc_read_reg(DISPC_REVISION);
3300 printk(KERN_INFO "OMAP DISPC rev %d.%d\n",
3301 FLD_GET(rev, 7, 4), FLD_GET(rev, 3, 0));
3302
3303 enable_clocks(0);
3304
3305 return 0;
3306}
3307
3308void dispc_exit(void)
3309{
3310 iounmap(dispc.base);
3311}
3312
3313int dispc_enable_plane(enum omap_plane plane, bool enable) 3273int dispc_enable_plane(enum omap_plane plane, bool enable)
3314{ 3274{
3315 DSSDBG("dispc_enable_plane %d, %d\n", plane, enable); 3275 DSSDBG("dispc_enable_plane %d, %d\n", plane, enable);
@@ -3359,3 +3319,66 @@ int dispc_setup_plane(enum omap_plane plane,
3359 3319
3360 return r; 3320 return r;
3361} 3321}
3322
3323/* DISPC HW IP initialisation */
3324static int omap_dispchw_probe(struct platform_device *pdev)
3325{
3326 u32 rev;
3327 dispc.pdev = pdev;
3328
3329 spin_lock_init(&dispc.irq_lock);
3330
3331#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
3332 spin_lock_init(&dispc.irq_stats_lock);
3333 dispc.irq_stats.last_reset = jiffies;
3334#endif
3335
3336 INIT_WORK(&dispc.error_work, dispc_error_worker);
3337
3338 dispc.base = ioremap(DISPC_BASE, DISPC_SZ_REGS);
3339 if (!dispc.base) {
3340 DSSERR("can't ioremap DISPC\n");
3341 return -ENOMEM;
3342 }
3343
3344 enable_clocks(1);
3345
3346 _omap_dispc_initial_config();
3347
3348 _omap_dispc_initialize_irq();
3349
3350 dispc_save_context();
3351
3352 rev = dispc_read_reg(DISPC_REVISION);
3353 printk(KERN_INFO "OMAP DISPC rev %d.%d\n",
3354 FLD_GET(rev, 7, 4), FLD_GET(rev, 3, 0));
3355
3356 enable_clocks(0);
3357
3358 return 0;
3359}
3360
3361static int omap_dispchw_remove(struct platform_device *pdev)
3362{
3363 iounmap(dispc.base);
3364 return 0;
3365}
3366
3367static struct platform_driver omap_dispchw_driver = {
3368 .probe = omap_dispchw_probe,
3369 .remove = omap_dispchw_remove,
3370 .driver = {
3371 .name = "omapdss_dispc",
3372 .owner = THIS_MODULE,
3373 },
3374};
3375
3376int dispc_init_platform_driver(void)
3377{
3378 return platform_driver_register(&omap_dispchw_driver);
3379}
3380
3381void dispc_uninit_platform_driver(void)
3382{
3383 return platform_driver_unregister(&omap_dispchw_driver);
3384}