diff options
Diffstat (limited to 'drivers/serial/cpm_uart/cpm_uart_cpm1.c')
-rw-r--r-- | drivers/serial/cpm_uart/cpm_uart_cpm1.c | 168 |
1 files changed, 0 insertions, 168 deletions
diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm1.c b/drivers/serial/cpm_uart/cpm_uart_cpm1.c index bec0c974cf54..0f0aff06c596 100644 --- a/drivers/serial/cpm_uart/cpm_uart_cpm1.c +++ b/drivers/serial/cpm_uart/cpm_uart_cpm1.c | |||
@@ -51,7 +51,6 @@ | |||
51 | 51 | ||
52 | /**************************************************************/ | 52 | /**************************************************************/ |
53 | 53 | ||
54 | #ifdef CONFIG_PPC_CPM_NEW_BINDING | ||
55 | void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd) | 54 | void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd) |
56 | { | 55 | { |
57 | cpm_command(port->command, cmd); | 56 | cpm_command(port->command, cmd); |
@@ -68,75 +67,6 @@ void cpm_uart_unmap_pram(struct uart_cpm_port *port, void __iomem *pram) | |||
68 | iounmap(pram); | 67 | iounmap(pram); |
69 | } | 68 | } |
70 | 69 | ||
71 | #else | ||
72 | void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd) | ||
73 | { | ||
74 | ushort val; | ||
75 | int line = port - cpm_uart_ports; | ||
76 | volatile cpm8xx_t *cp = cpmp; | ||
77 | |||
78 | switch (line) { | ||
79 | case UART_SMC1: | ||
80 | val = mk_cr_cmd(CPM_CR_CH_SMC1, cmd) | CPM_CR_FLG; | ||
81 | break; | ||
82 | case UART_SMC2: | ||
83 | val = mk_cr_cmd(CPM_CR_CH_SMC2, cmd) | CPM_CR_FLG; | ||
84 | break; | ||
85 | case UART_SCC1: | ||
86 | val = mk_cr_cmd(CPM_CR_CH_SCC1, cmd) | CPM_CR_FLG; | ||
87 | break; | ||
88 | case UART_SCC2: | ||
89 | val = mk_cr_cmd(CPM_CR_CH_SCC2, cmd) | CPM_CR_FLG; | ||
90 | break; | ||
91 | case UART_SCC3: | ||
92 | val = mk_cr_cmd(CPM_CR_CH_SCC3, cmd) | CPM_CR_FLG; | ||
93 | break; | ||
94 | case UART_SCC4: | ||
95 | val = mk_cr_cmd(CPM_CR_CH_SCC4, cmd) | CPM_CR_FLG; | ||
96 | break; | ||
97 | default: | ||
98 | return; | ||
99 | |||
100 | } | ||
101 | cp->cp_cpcr = val; | ||
102 | while (cp->cp_cpcr & CPM_CR_FLG) ; | ||
103 | } | ||
104 | |||
105 | void smc1_lineif(struct uart_cpm_port *pinfo) | ||
106 | { | ||
107 | pinfo->brg = 1; | ||
108 | } | ||
109 | |||
110 | void smc2_lineif(struct uart_cpm_port *pinfo) | ||
111 | { | ||
112 | pinfo->brg = 2; | ||
113 | } | ||
114 | |||
115 | void scc1_lineif(struct uart_cpm_port *pinfo) | ||
116 | { | ||
117 | /* XXX SCC1: insert port configuration here */ | ||
118 | pinfo->brg = 1; | ||
119 | } | ||
120 | |||
121 | void scc2_lineif(struct uart_cpm_port *pinfo) | ||
122 | { | ||
123 | /* XXX SCC2: insert port configuration here */ | ||
124 | pinfo->brg = 2; | ||
125 | } | ||
126 | |||
127 | void scc3_lineif(struct uart_cpm_port *pinfo) | ||
128 | { | ||
129 | /* XXX SCC3: insert port configuration here */ | ||
130 | pinfo->brg = 3; | ||
131 | } | ||
132 | |||
133 | void scc4_lineif(struct uart_cpm_port *pinfo) | ||
134 | { | ||
135 | /* XXX SCC4: insert port configuration here */ | ||
136 | pinfo->brg = 4; | ||
137 | } | ||
138 | #endif | ||
139 | |||
140 | /* | 70 | /* |
141 | * Allocate DP-Ram and memory buffers. We need to allocate a transmit and | 71 | * Allocate DP-Ram and memory buffers. We need to allocate a transmit and |
142 | * receive buffer descriptors from dual port ram, and a character | 72 | * receive buffer descriptors from dual port ram, and a character |
@@ -205,101 +135,3 @@ void cpm_uart_freebuf(struct uart_cpm_port *pinfo) | |||
205 | 135 | ||
206 | cpm_dpfree(pinfo->dp_addr); | 136 | cpm_dpfree(pinfo->dp_addr); |
207 | } | 137 | } |
208 | |||
209 | #ifndef CONFIG_PPC_CPM_NEW_BINDING | ||
210 | /* Setup any dynamic params in the uart desc */ | ||
211 | int cpm_uart_init_portdesc(void) | ||
212 | { | ||
213 | pr_debug("CPM uart[-]:init portdesc\n"); | ||
214 | |||
215 | cpm_uart_nr = 0; | ||
216 | #ifdef CONFIG_SERIAL_CPM_SMC1 | ||
217 | cpm_uart_ports[UART_SMC1].smcp = &cpmp->cp_smc[0]; | ||
218 | /* | ||
219 | * Is SMC1 being relocated? | ||
220 | */ | ||
221 | # ifdef CONFIG_I2C_SPI_SMC1_UCODE_PATCH | ||
222 | cpm_uart_ports[UART_SMC1].smcup = | ||
223 | (smc_uart_t *) & cpmp->cp_dparam[0x3C0]; | ||
224 | # else | ||
225 | cpm_uart_ports[UART_SMC1].smcup = | ||
226 | (smc_uart_t *) & cpmp->cp_dparam[PROFF_SMC1]; | ||
227 | # endif | ||
228 | cpm_uart_ports[UART_SMC1].port.mapbase = | ||
229 | (unsigned long)&cpmp->cp_smc[0]; | ||
230 | cpm_uart_ports[UART_SMC1].smcp->smc_smcm |= (SMCM_RX | SMCM_TX); | ||
231 | cpm_uart_ports[UART_SMC1].smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN); | ||
232 | cpm_uart_ports[UART_SMC1].port.uartclk = uart_clock(); | ||
233 | cpm_uart_port_map[cpm_uart_nr++] = UART_SMC1; | ||
234 | #endif | ||
235 | |||
236 | #ifdef CONFIG_SERIAL_CPM_SMC2 | ||
237 | cpm_uart_ports[UART_SMC2].smcp = &cpmp->cp_smc[1]; | ||
238 | cpm_uart_ports[UART_SMC2].smcup = | ||
239 | (smc_uart_t *) & cpmp->cp_dparam[PROFF_SMC2]; | ||
240 | cpm_uart_ports[UART_SMC2].port.mapbase = | ||
241 | (unsigned long)&cpmp->cp_smc[1]; | ||
242 | cpm_uart_ports[UART_SMC2].smcp->smc_smcm |= (SMCM_RX | SMCM_TX); | ||
243 | cpm_uart_ports[UART_SMC2].smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN); | ||
244 | cpm_uart_ports[UART_SMC2].port.uartclk = uart_clock(); | ||
245 | cpm_uart_port_map[cpm_uart_nr++] = UART_SMC2; | ||
246 | #endif | ||
247 | |||
248 | #ifdef CONFIG_SERIAL_CPM_SCC1 | ||
249 | cpm_uart_ports[UART_SCC1].sccp = &cpmp->cp_scc[0]; | ||
250 | cpm_uart_ports[UART_SCC1].sccup = | ||
251 | (scc_uart_t *) & cpmp->cp_dparam[PROFF_SCC1]; | ||
252 | cpm_uart_ports[UART_SCC1].port.mapbase = | ||
253 | (unsigned long)&cpmp->cp_scc[0]; | ||
254 | cpm_uart_ports[UART_SCC1].sccp->scc_sccm &= | ||
255 | ~(UART_SCCM_TX | UART_SCCM_RX); | ||
256 | cpm_uart_ports[UART_SCC1].sccp->scc_gsmrl &= | ||
257 | ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); | ||
258 | cpm_uart_ports[UART_SCC1].port.uartclk = uart_clock(); | ||
259 | cpm_uart_port_map[cpm_uart_nr++] = UART_SCC1; | ||
260 | #endif | ||
261 | |||
262 | #ifdef CONFIG_SERIAL_CPM_SCC2 | ||
263 | cpm_uart_ports[UART_SCC2].sccp = &cpmp->cp_scc[1]; | ||
264 | cpm_uart_ports[UART_SCC2].sccup = | ||
265 | (scc_uart_t *) & cpmp->cp_dparam[PROFF_SCC2]; | ||
266 | cpm_uart_ports[UART_SCC2].port.mapbase = | ||
267 | (unsigned long)&cpmp->cp_scc[1]; | ||
268 | cpm_uart_ports[UART_SCC2].sccp->scc_sccm &= | ||
269 | ~(UART_SCCM_TX | UART_SCCM_RX); | ||
270 | cpm_uart_ports[UART_SCC2].sccp->scc_gsmrl &= | ||
271 | ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); | ||
272 | cpm_uart_ports[UART_SCC2].port.uartclk = uart_clock(); | ||
273 | cpm_uart_port_map[cpm_uart_nr++] = UART_SCC2; | ||
274 | #endif | ||
275 | |||
276 | #ifdef CONFIG_SERIAL_CPM_SCC3 | ||
277 | cpm_uart_ports[UART_SCC3].sccp = &cpmp->cp_scc[2]; | ||
278 | cpm_uart_ports[UART_SCC3].sccup = | ||
279 | (scc_uart_t *) & cpmp->cp_dparam[PROFF_SCC3]; | ||
280 | cpm_uart_ports[UART_SCC3].port.mapbase = | ||
281 | (unsigned long)&cpmp->cp_scc[2]; | ||
282 | cpm_uart_ports[UART_SCC3].sccp->scc_sccm &= | ||
283 | ~(UART_SCCM_TX | UART_SCCM_RX); | ||
284 | cpm_uart_ports[UART_SCC3].sccp->scc_gsmrl &= | ||
285 | ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); | ||
286 | cpm_uart_ports[UART_SCC3].port.uartclk = uart_clock(); | ||
287 | cpm_uart_port_map[cpm_uart_nr++] = UART_SCC3; | ||
288 | #endif | ||
289 | |||
290 | #ifdef CONFIG_SERIAL_CPM_SCC4 | ||
291 | cpm_uart_ports[UART_SCC4].sccp = &cpmp->cp_scc[3]; | ||
292 | cpm_uart_ports[UART_SCC4].sccup = | ||
293 | (scc_uart_t *) & cpmp->cp_dparam[PROFF_SCC4]; | ||
294 | cpm_uart_ports[UART_SCC4].port.mapbase = | ||
295 | (unsigned long)&cpmp->cp_scc[3]; | ||
296 | cpm_uart_ports[UART_SCC4].sccp->scc_sccm &= | ||
297 | ~(UART_SCCM_TX | UART_SCCM_RX); | ||
298 | cpm_uart_ports[UART_SCC4].sccp->scc_gsmrl &= | ||
299 | ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); | ||
300 | cpm_uart_ports[UART_SCC4].port.uartclk = uart_clock(); | ||
301 | cpm_uart_port_map[cpm_uart_nr++] = UART_SCC4; | ||
302 | #endif | ||
303 | return 0; | ||
304 | } | ||
305 | #endif | ||