diff options
Diffstat (limited to 'drivers/net/wireless')
-rw-r--r-- | drivers/net/wireless/ath/ath9k/pci.c | 8 | ||||
-rw-r--r-- | drivers/net/wireless/iwlegacy/4965.h | 4 | ||||
-rw-r--r-- | drivers/net/wireless/iwlegacy/common.c | 10 | ||||
-rw-r--r-- | drivers/net/wireless/iwlegacy/common.h | 12 | ||||
-rw-r--r-- | drivers/net/wireless/iwlwifi/pcie/trans.c | 8 |
5 files changed, 11 insertions, 31 deletions
diff --git a/drivers/net/wireless/ath/ath9k/pci.c b/drivers/net/wireless/ath/ath9k/pci.c index 8e9b826f878b..7ae73fbd9136 100644 --- a/drivers/net/wireless/ath/ath9k/pci.c +++ b/drivers/net/wireless/ath/ath9k/pci.c | |||
@@ -114,23 +114,23 @@ static void ath_pci_aspm_init(struct ath_common *common) | |||
114 | 114 | ||
115 | if ((ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_NONE) && | 115 | if ((ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_NONE) && |
116 | (AR_SREV_9285(ah))) { | 116 | (AR_SREV_9285(ah))) { |
117 | /* Bluetooth coexistance requires disabling ASPM. */ | 117 | /* Bluetooth coexistence requires disabling ASPM. */ |
118 | pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL, | 118 | pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL, |
119 | PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1); | 119 | PCI_EXP_LNKCTL_ASPM_L0S | PCI_EXP_LNKCTL_ASPM_L1); |
120 | 120 | ||
121 | /* | 121 | /* |
122 | * Both upstream and downstream PCIe components should | 122 | * Both upstream and downstream PCIe components should |
123 | * have the same ASPM settings. | 123 | * have the same ASPM settings. |
124 | */ | 124 | */ |
125 | pcie_capability_clear_word(parent, PCI_EXP_LNKCTL, | 125 | pcie_capability_clear_word(parent, PCI_EXP_LNKCTL, |
126 | PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1); | 126 | PCI_EXP_LNKCTL_ASPM_L0S | PCI_EXP_LNKCTL_ASPM_L1); |
127 | 127 | ||
128 | ath_info(common, "Disabling ASPM since BTCOEX is enabled\n"); | 128 | ath_info(common, "Disabling ASPM since BTCOEX is enabled\n"); |
129 | return; | 129 | return; |
130 | } | 130 | } |
131 | 131 | ||
132 | pcie_capability_read_word(parent, PCI_EXP_LNKCTL, &aspm); | 132 | pcie_capability_read_word(parent, PCI_EXP_LNKCTL, &aspm); |
133 | if (aspm & (PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1)) { | 133 | if (aspm & (PCI_EXP_LNKCTL_ASPM_L0S | PCI_EXP_LNKCTL_ASPM_L1)) { |
134 | ah->aspm_enabled = true; | 134 | ah->aspm_enabled = true; |
135 | /* Initialize PCIe PM and SERDES registers. */ | 135 | /* Initialize PCIe PM and SERDES registers. */ |
136 | ath9k_hw_configpcipowersave(ah, false); | 136 | ath9k_hw_configpcipowersave(ah, false); |
diff --git a/drivers/net/wireless/iwlegacy/4965.h b/drivers/net/wireless/iwlegacy/4965.h index 2d092f328547..1b15b0b2292b 100644 --- a/drivers/net/wireless/iwlegacy/4965.h +++ b/drivers/net/wireless/iwlegacy/4965.h | |||
@@ -917,10 +917,6 @@ struct il4965_scd_bc_tbl { | |||
917 | /* PCI registers */ | 917 | /* PCI registers */ |
918 | #define PCI_CFG_RETRY_TIMEOUT 0x041 | 918 | #define PCI_CFG_RETRY_TIMEOUT 0x041 |
919 | 919 | ||
920 | /* PCI register values */ | ||
921 | #define PCI_CFG_LINK_CTRL_VAL_L0S_EN 0x01 | ||
922 | #define PCI_CFG_LINK_CTRL_VAL_L1_EN 0x02 | ||
923 | |||
924 | #define IL4965_DEFAULT_TX_RETRY 15 | 920 | #define IL4965_DEFAULT_TX_RETRY 15 |
925 | 921 | ||
926 | /* EEPROM */ | 922 | /* EEPROM */ |
diff --git a/drivers/net/wireless/iwlegacy/common.c b/drivers/net/wireless/iwlegacy/common.c index 318ed3c9fe74..7e16d10a7f14 100644 --- a/drivers/net/wireless/iwlegacy/common.c +++ b/drivers/net/wireless/iwlegacy/common.c | |||
@@ -1183,9 +1183,10 @@ EXPORT_SYMBOL(il_power_update_mode); | |||
1183 | void | 1183 | void |
1184 | il_power_initialize(struct il_priv *il) | 1184 | il_power_initialize(struct il_priv *il) |
1185 | { | 1185 | { |
1186 | u16 lctl = il_pcie_link_ctl(il); | 1186 | u16 lctl; |
1187 | 1187 | ||
1188 | il->power_data.pci_pm = !(lctl & PCI_CFG_LINK_CTRL_VAL_L0S_EN); | 1188 | pcie_capability_read_word(il->pci_dev, PCI_EXP_LNKCTL, &lctl); |
1189 | il->power_data.pci_pm = !(lctl & PCI_EXP_LNKCTL_ASPM_L0S); | ||
1189 | 1190 | ||
1190 | il->power_data.debug_sleep_level_override = -1; | 1191 | il->power_data.debug_sleep_level_override = -1; |
1191 | 1192 | ||
@@ -4233,9 +4234,8 @@ il_apm_init(struct il_priv *il) | |||
4233 | * power savings, even without L1. | 4234 | * power savings, even without L1. |
4234 | */ | 4235 | */ |
4235 | if (il->cfg->set_l0s) { | 4236 | if (il->cfg->set_l0s) { |
4236 | lctl = il_pcie_link_ctl(il); | 4237 | pcie_capability_read_word(il->pci_dev, PCI_EXP_LNKCTL, &lctl); |
4237 | if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) == | 4238 | if (lctl & PCI_EXP_LNKCTL_ASPM_L1) { |
4238 | PCI_CFG_LINK_CTRL_VAL_L1_EN) { | ||
4239 | /* L1-ASPM enabled; disable(!) L0S */ | 4239 | /* L1-ASPM enabled; disable(!) L0S */ |
4240 | il_set_bit(il, CSR_GIO_REG, | 4240 | il_set_bit(il, CSR_GIO_REG, |
4241 | CSR_GIO_REG_VAL_L0S_ENABLED); | 4241 | CSR_GIO_REG_VAL_L0S_ENABLED); |
diff --git a/drivers/net/wireless/iwlegacy/common.h b/drivers/net/wireless/iwlegacy/common.h index e254cba4557a..a9a569f432fb 100644 --- a/drivers/net/wireless/iwlegacy/common.h +++ b/drivers/net/wireless/iwlegacy/common.h | |||
@@ -1829,14 +1829,6 @@ int il_enqueue_hcmd(struct il_priv *il, struct il_host_cmd *cmd); | |||
1829 | * PCI * | 1829 | * PCI * |
1830 | *****************************************************/ | 1830 | *****************************************************/ |
1831 | 1831 | ||
1832 | static inline u16 | ||
1833 | il_pcie_link_ctl(struct il_priv *il) | ||
1834 | { | ||
1835 | u16 pci_lnk_ctl; | ||
1836 | pcie_capability_read_word(il->pci_dev, PCI_EXP_LNKCTL, &pci_lnk_ctl); | ||
1837 | return pci_lnk_ctl; | ||
1838 | } | ||
1839 | |||
1840 | void il_bg_watchdog(unsigned long data); | 1832 | void il_bg_watchdog(unsigned long data); |
1841 | u32 il_usecs_to_beacons(struct il_priv *il, u32 usec, u32 beacon_interval); | 1833 | u32 il_usecs_to_beacons(struct il_priv *il, u32 usec, u32 beacon_interval); |
1842 | __le32 il_add_beacon_time(struct il_priv *il, u32 base, u32 addon, | 1834 | __le32 il_add_beacon_time(struct il_priv *il, u32 base, u32 addon, |
@@ -2434,10 +2426,6 @@ struct il_tfd { | |||
2434 | /* PCI registers */ | 2426 | /* PCI registers */ |
2435 | #define PCI_CFG_RETRY_TIMEOUT 0x041 | 2427 | #define PCI_CFG_RETRY_TIMEOUT 0x041 |
2436 | 2428 | ||
2437 | /* PCI register values */ | ||
2438 | #define PCI_CFG_LINK_CTRL_VAL_L0S_EN 0x01 | ||
2439 | #define PCI_CFG_LINK_CTRL_VAL_L1_EN 0x02 | ||
2440 | |||
2441 | struct il_rate_info { | 2429 | struct il_rate_info { |
2442 | u8 plcp; /* uCode API: RATE_6M_PLCP, etc. */ | 2430 | u8 plcp; /* uCode API: RATE_6M_PLCP, etc. */ |
2443 | u8 plcp_siso; /* uCode API: RATE_SISO_6M_PLCP, etc. */ | 2431 | u8 plcp_siso; /* uCode API: RATE_SISO_6M_PLCP, etc. */ |
diff --git a/drivers/net/wireless/iwlwifi/pcie/trans.c b/drivers/net/wireless/iwlwifi/pcie/trans.c index d66cad4a7d6a..35708b959ad6 100644 --- a/drivers/net/wireless/iwlwifi/pcie/trans.c +++ b/drivers/net/wireless/iwlwifi/pcie/trans.c | |||
@@ -94,8 +94,6 @@ static void iwl_pcie_set_pwr_vmain(struct iwl_trans *trans) | |||
94 | 94 | ||
95 | /* PCI registers */ | 95 | /* PCI registers */ |
96 | #define PCI_CFG_RETRY_TIMEOUT 0x041 | 96 | #define PCI_CFG_RETRY_TIMEOUT 0x041 |
97 | #define PCI_CFG_LINK_CTRL_VAL_L0S_EN 0x01 | ||
98 | #define PCI_CFG_LINK_CTRL_VAL_L1_EN 0x02 | ||
99 | 97 | ||
100 | static void iwl_pcie_apm_config(struct iwl_trans *trans) | 98 | static void iwl_pcie_apm_config(struct iwl_trans *trans) |
101 | { | 99 | { |
@@ -111,9 +109,7 @@ static void iwl_pcie_apm_config(struct iwl_trans *trans) | |||
111 | * power savings, even without L1. | 109 | * power savings, even without L1. |
112 | */ | 110 | */ |
113 | pcie_capability_read_word(trans_pcie->pci_dev, PCI_EXP_LNKCTL, &lctl); | 111 | pcie_capability_read_word(trans_pcie->pci_dev, PCI_EXP_LNKCTL, &lctl); |
114 | 112 | if (lctl & PCI_EXP_LNKCTL_ASPM_L1) { | |
115 | if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) == | ||
116 | PCI_CFG_LINK_CTRL_VAL_L1_EN) { | ||
117 | /* L1-ASPM enabled; disable(!) L0S */ | 113 | /* L1-ASPM enabled; disable(!) L0S */ |
118 | iwl_set_bit(trans, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED); | 114 | iwl_set_bit(trans, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED); |
119 | dev_info(trans->dev, "L1 Enabled; Disabling L0S\n"); | 115 | dev_info(trans->dev, "L1 Enabled; Disabling L0S\n"); |
@@ -122,7 +118,7 @@ static void iwl_pcie_apm_config(struct iwl_trans *trans) | |||
122 | iwl_clear_bit(trans, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED); | 118 | iwl_clear_bit(trans, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED); |
123 | dev_info(trans->dev, "L1 Disabled; Enabling L0S\n"); | 119 | dev_info(trans->dev, "L1 Disabled; Enabling L0S\n"); |
124 | } | 120 | } |
125 | trans->pm_support = !(lctl & PCI_CFG_LINK_CTRL_VAL_L0S_EN); | 121 | trans->pm_support = !(lctl & PCI_EXP_LNKCTL_ASPM_L0S); |
126 | } | 122 | } |
127 | 123 | ||
128 | /* | 124 | /* |