diff options
Diffstat (limited to 'drivers/net/wireless/rtlwifi/rtl8192cu/hw.c')
-rw-r--r-- | drivers/net/wireless/rtlwifi/rtl8192cu/hw.c | 179 |
1 files changed, 87 insertions, 92 deletions
diff --git a/drivers/net/wireless/rtlwifi/rtl8192cu/hw.c b/drivers/net/wireless/rtlwifi/rtl8192cu/hw.c index 778c0e6e836b..80bd17d85935 100644 --- a/drivers/net/wireless/rtlwifi/rtl8192cu/hw.c +++ b/drivers/net/wireless/rtlwifi/rtl8192cu/hw.c | |||
@@ -494,17 +494,17 @@ static void _rtl92cu_read_adapter_info(struct ieee80211_hw *hw) | |||
494 | HWSET_MAX_SIZE); | 494 | HWSET_MAX_SIZE); |
495 | } else if (rtlefuse->epromtype == EEPROM_93C46) { | 495 | } else if (rtlefuse->epromtype == EEPROM_93C46) { |
496 | RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, | 496 | RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, |
497 | ("RTL819X Not boot from eeprom, check it !!")); | 497 | "RTL819X Not boot from eeprom, check it !!\n"); |
498 | } | 498 | } |
499 | RT_PRINT_DATA(rtlpriv, COMP_INIT, DBG_LOUD, "MAP", | 499 | RT_PRINT_DATA(rtlpriv, COMP_INIT, DBG_LOUD, "MAP", |
500 | hwinfo, HWSET_MAX_SIZE); | 500 | hwinfo, HWSET_MAX_SIZE); |
501 | eeprom_id = le16_to_cpu(*((__le16 *)&hwinfo[0])); | 501 | eeprom_id = le16_to_cpu(*((__le16 *)&hwinfo[0])); |
502 | if (eeprom_id != RTL8190_EEPROM_ID) { | 502 | if (eeprom_id != RTL8190_EEPROM_ID) { |
503 | RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, | 503 | RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, |
504 | ("EEPROM ID(%#x) is invalid!!\n", eeprom_id)); | 504 | "EEPROM ID(%#x) is invalid!!\n", eeprom_id); |
505 | rtlefuse->autoload_failflag = true; | 505 | rtlefuse->autoload_failflag = true; |
506 | } else { | 506 | } else { |
507 | RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, ("Autoload OK\n")); | 507 | RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "Autoload OK\n"); |
508 | rtlefuse->autoload_failflag = false; | 508 | rtlefuse->autoload_failflag = false; |
509 | } | 509 | } |
510 | if (rtlefuse->autoload_failflag) | 510 | if (rtlefuse->autoload_failflag) |
@@ -518,16 +518,15 @@ static void _rtl92cu_read_adapter_info(struct ieee80211_hw *hw) | |||
518 | rtlefuse->autoload_failflag, hwinfo); | 518 | rtlefuse->autoload_failflag, hwinfo); |
519 | rtlefuse->eeprom_vid = le16_to_cpu(*(__le16 *)&hwinfo[EEPROM_VID]); | 519 | rtlefuse->eeprom_vid = le16_to_cpu(*(__le16 *)&hwinfo[EEPROM_VID]); |
520 | rtlefuse->eeprom_did = le16_to_cpu(*(__le16 *)&hwinfo[EEPROM_DID]); | 520 | rtlefuse->eeprom_did = le16_to_cpu(*(__le16 *)&hwinfo[EEPROM_DID]); |
521 | RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, | 521 | RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, " VID = 0x%02x PID = 0x%02x\n", |
522 | (" VID = 0x%02x PID = 0x%02x\n", | 522 | rtlefuse->eeprom_vid, rtlefuse->eeprom_did); |
523 | rtlefuse->eeprom_vid, rtlefuse->eeprom_did)); | ||
524 | rtlefuse->eeprom_channelplan = *(u8 *)&hwinfo[EEPROM_CHANNELPLAN]; | 523 | rtlefuse->eeprom_channelplan = *(u8 *)&hwinfo[EEPROM_CHANNELPLAN]; |
525 | rtlefuse->eeprom_version = | 524 | rtlefuse->eeprom_version = |
526 | le16_to_cpu(*(__le16 *)&hwinfo[EEPROM_VERSION]); | 525 | le16_to_cpu(*(__le16 *)&hwinfo[EEPROM_VERSION]); |
527 | rtlefuse->txpwr_fromeprom = true; | 526 | rtlefuse->txpwr_fromeprom = true; |
528 | rtlefuse->eeprom_oemid = *(u8 *)&hwinfo[EEPROM_CUSTOMER_ID]; | 527 | rtlefuse->eeprom_oemid = *(u8 *)&hwinfo[EEPROM_CUSTOMER_ID]; |
529 | RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, | 528 | RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "EEPROM Customer ID: 0x%2x\n", |
530 | ("EEPROM Customer ID: 0x%2x\n", rtlefuse->eeprom_oemid)); | 529 | rtlefuse->eeprom_oemid); |
531 | if (rtlhal->oem_id == RT_CID_DEFAULT) { | 530 | if (rtlhal->oem_id == RT_CID_DEFAULT) { |
532 | switch (rtlefuse->eeprom_oemid) { | 531 | switch (rtlefuse->eeprom_oemid) { |
533 | case EEPROM_CID_DEFAULT: | 532 | case EEPROM_CID_DEFAULT: |
@@ -579,8 +578,8 @@ static void _rtl92cu_hal_customized_behavior(struct ieee80211_hw *hw) | |||
579 | default: | 578 | default: |
580 | break; | 579 | break; |
581 | } | 580 | } |
582 | RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, | 581 | RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "RT Customized ID: 0x%02X\n", |
583 | ("RT Customized ID: 0x%02X\n", rtlhal->oem_id)); | 582 | rtlhal->oem_id); |
584 | } | 583 | } |
585 | 584 | ||
586 | void rtl92cu_read_eeprom_info(struct ieee80211_hw *hw) | 585 | void rtl92cu_read_eeprom_info(struct ieee80211_hw *hw) |
@@ -596,11 +595,11 @@ void rtl92cu_read_eeprom_info(struct ieee80211_hw *hw) | |||
596 | tmp_u1b = rtl_read_byte(rtlpriv, REG_9346CR); | 595 | tmp_u1b = rtl_read_byte(rtlpriv, REG_9346CR); |
597 | rtlefuse->epromtype = (tmp_u1b & BOOT_FROM_EEPROM) ? | 596 | rtlefuse->epromtype = (tmp_u1b & BOOT_FROM_EEPROM) ? |
598 | EEPROM_93C46 : EEPROM_BOOT_EFUSE; | 597 | EEPROM_93C46 : EEPROM_BOOT_EFUSE; |
599 | RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, ("Boot from %s\n", | 598 | RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "Boot from %s\n", |
600 | (tmp_u1b & BOOT_FROM_EEPROM) ? "EERROM" : "EFUSE")); | 599 | tmp_u1b & BOOT_FROM_EEPROM ? "EERROM" : "EFUSE"); |
601 | rtlefuse->autoload_failflag = (tmp_u1b & EEPROM_EN) ? false : true; | 600 | rtlefuse->autoload_failflag = (tmp_u1b & EEPROM_EN) ? false : true; |
602 | RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, ("Autoload %s\n", | 601 | RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "Autoload %s\n", |
603 | (tmp_u1b & EEPROM_EN) ? "OK!!" : "ERR!!")); | 602 | tmp_u1b & EEPROM_EN ? "OK!!" : "ERR!!"); |
604 | _rtl92cu_read_adapter_info(hw); | 603 | _rtl92cu_read_adapter_info(hw); |
605 | _rtl92cu_hal_customized_behavior(hw); | 604 | _rtl92cu_hal_customized_behavior(hw); |
606 | return; | 605 | return; |
@@ -618,13 +617,12 @@ static int _rtl92cu_init_power_on(struct ieee80211_hw *hw) | |||
618 | do { | 617 | do { |
619 | if (rtl_read_byte(rtlpriv, REG_APS_FSMCO) & PFM_ALDN) { | 618 | if (rtl_read_byte(rtlpriv, REG_APS_FSMCO) & PFM_ALDN) { |
620 | RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, | 619 | RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, |
621 | ("Autoload Done!\n")); | 620 | "Autoload Done!\n"); |
622 | break; | 621 | break; |
623 | } | 622 | } |
624 | if (pollingCount++ > 100) { | 623 | if (pollingCount++ > 100) { |
625 | RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, | 624 | RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, |
626 | ("Failed to polling REG_APS_FSMCO[PFM_ALDN]" | 625 | "Failed to polling REG_APS_FSMCO[PFM_ALDN] done!\n"); |
627 | " done!\n")); | ||
628 | return -ENODEV; | 626 | return -ENODEV; |
629 | } | 627 | } |
630 | } while (true); | 628 | } while (true); |
@@ -639,8 +637,8 @@ static int _rtl92cu_init_power_on(struct ieee80211_hw *hw) | |||
639 | value8 |= LDV12_EN; | 637 | value8 |= LDV12_EN; |
640 | rtl_write_byte(rtlpriv, REG_LDOV12D_CTRL, value8); | 638 | rtl_write_byte(rtlpriv, REG_LDOV12D_CTRL, value8); |
641 | RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, | 639 | RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, |
642 | (" power-on :REG_LDOV12D_CTRL Reg0x21:0x%02x.\n", | 640 | " power-on :REG_LDOV12D_CTRL Reg0x21:0x%02x\n", |
643 | value8)); | 641 | value8); |
644 | udelay(100); | 642 | udelay(100); |
645 | value8 = rtl_read_byte(rtlpriv, REG_SYS_ISO_CTRL); | 643 | value8 = rtl_read_byte(rtlpriv, REG_SYS_ISO_CTRL); |
646 | value8 &= ~ISO_MD2PP; | 644 | value8 &= ~ISO_MD2PP; |
@@ -658,8 +656,7 @@ static int _rtl92cu_init_power_on(struct ieee80211_hw *hw) | |||
658 | } | 656 | } |
659 | if (pollingCount++ > 100) { | 657 | if (pollingCount++ > 100) { |
660 | RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, | 658 | RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, |
661 | ("Failed to polling REG_APS_FSMCO[APFM_ONMAC]" | 659 | "Failed to polling REG_APS_FSMCO[APFM_ONMAC] done!\n"); |
662 | " done!\n")); | ||
663 | return -ENODEV; | 660 | return -ENODEV; |
664 | } | 661 | } |
665 | } while (true); | 662 | } while (true); |
@@ -877,8 +874,8 @@ static void _rtl92cu_init_chipN_three_out_ep_priority(struct ieee80211_hw *hw, | |||
877 | hiQ = QUEUE_HIGH; | 874 | hiQ = QUEUE_HIGH; |
878 | } | 875 | } |
879 | _rtl92c_init_chipN_reg_priority(hw, beQ, bkQ, viQ, voQ, mgtQ, hiQ); | 876 | _rtl92c_init_chipN_reg_priority(hw, beQ, bkQ, viQ, voQ, mgtQ, hiQ); |
880 | RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, | 877 | RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, "Tx queue select :0x%02x..\n", |
881 | ("Tx queue select :0x%02x..\n", queue_sel)); | 878 | queue_sel); |
882 | } | 879 | } |
883 | 880 | ||
884 | static void _rtl92cu_init_chipN_queue_priority(struct ieee80211_hw *hw, | 881 | static void _rtl92cu_init_chipN_queue_priority(struct ieee80211_hw *hw, |
@@ -937,8 +934,8 @@ static void _rtl92cu_init_chipT_queue_priority(struct ieee80211_hw *hw, | |||
937 | break; | 934 | break; |
938 | } | 935 | } |
939 | rtl_write_byte(rtlpriv, (REG_TRXDMA_CTRL+1), hq_sele); | 936 | rtl_write_byte(rtlpriv, (REG_TRXDMA_CTRL+1), hq_sele); |
940 | RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, | 937 | RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, "Tx queue select :0x%02x..\n", |
941 | ("Tx queue select :0x%02x..\n", hq_sele)); | 938 | hq_sele); |
942 | } | 939 | } |
943 | 940 | ||
944 | static void _rtl92cu_init_queue_priority(struct ieee80211_hw *hw, | 941 | static void _rtl92cu_init_queue_priority(struct ieee80211_hw *hw, |
@@ -998,7 +995,7 @@ static int _rtl92cu_init_mac(struct ieee80211_hw *hw) | |||
998 | 995 | ||
999 | if (err) { | 996 | if (err) { |
1000 | RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, | 997 | RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, |
1001 | ("Failed to init power on!\n")); | 998 | "Failed to init power on!\n"); |
1002 | return err; | 999 | return err; |
1003 | } | 1000 | } |
1004 | if (!wmm_enable) { | 1001 | if (!wmm_enable) { |
@@ -1010,7 +1007,7 @@ static int _rtl92cu_init_mac(struct ieee80211_hw *hw) | |||
1010 | } | 1007 | } |
1011 | if (false == rtl92c_init_llt_table(hw, boundary)) { | 1008 | if (false == rtl92c_init_llt_table(hw, boundary)) { |
1012 | RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, | 1009 | RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, |
1013 | ("Failed to init LLT Table!\n")); | 1010 | "Failed to init LLT Table!\n"); |
1014 | return -EINVAL; | 1011 | return -EINVAL; |
1015 | } | 1012 | } |
1016 | _rtl92cu_init_queue_reserved_page(hw, wmm_enable, out_ep_nums, | 1013 | _rtl92cu_init_queue_reserved_page(hw, wmm_enable, out_ep_nums, |
@@ -1043,12 +1040,12 @@ void rtl92cu_enable_hw_security_config(struct ieee80211_hw *hw) | |||
1043 | struct rtl_hal *rtlhal = rtl_hal(rtlpriv); | 1040 | struct rtl_hal *rtlhal = rtl_hal(rtlpriv); |
1044 | 1041 | ||
1045 | RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, | 1042 | RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, |
1046 | ("PairwiseEncAlgorithm = %d GroupEncAlgorithm = %d\n", | 1043 | "PairwiseEncAlgorithm = %d GroupEncAlgorithm = %d\n", |
1047 | rtlpriv->sec.pairwise_enc_algorithm, | 1044 | rtlpriv->sec.pairwise_enc_algorithm, |
1048 | rtlpriv->sec.group_enc_algorithm)); | 1045 | rtlpriv->sec.group_enc_algorithm); |
1049 | if (rtlpriv->cfg->mod_params->sw_crypto || rtlpriv->sec.use_sw_sec) { | 1046 | if (rtlpriv->cfg->mod_params->sw_crypto || rtlpriv->sec.use_sw_sec) { |
1050 | RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, | 1047 | RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, |
1051 | ("not open sw encryption\n")); | 1048 | "not open sw encryption\n"); |
1052 | return; | 1049 | return; |
1053 | } | 1050 | } |
1054 | sec_reg_value = SCR_TxEncEnable | SCR_RxDecEnable; | 1051 | sec_reg_value = SCR_TxEncEnable | SCR_RxDecEnable; |
@@ -1059,8 +1056,8 @@ void rtl92cu_enable_hw_security_config(struct ieee80211_hw *hw) | |||
1059 | if (IS_NORMAL_CHIP(rtlhal->version)) | 1056 | if (IS_NORMAL_CHIP(rtlhal->version)) |
1060 | sec_reg_value |= (SCR_RXBCUSEDK | SCR_TXBCUSEDK); | 1057 | sec_reg_value |= (SCR_RXBCUSEDK | SCR_TXBCUSEDK); |
1061 | rtl_write_byte(rtlpriv, REG_CR + 1, 0x02); | 1058 | rtl_write_byte(rtlpriv, REG_CR + 1, 0x02); |
1062 | RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD, | 1059 | RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD, "The SECR-value %x\n", |
1063 | ("The SECR-value %x\n", sec_reg_value)); | 1060 | sec_reg_value); |
1064 | rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_WPA_CONFIG, &sec_reg_value); | 1061 | rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_WPA_CONFIG, &sec_reg_value); |
1065 | } | 1062 | } |
1066 | 1063 | ||
@@ -1163,13 +1160,13 @@ int rtl92cu_hw_init(struct ieee80211_hw *hw) | |||
1163 | rtlhal->hw_type = HARDWARE_TYPE_RTL8192CU; | 1160 | rtlhal->hw_type = HARDWARE_TYPE_RTL8192CU; |
1164 | err = _rtl92cu_init_mac(hw); | 1161 | err = _rtl92cu_init_mac(hw); |
1165 | if (err) { | 1162 | if (err) { |
1166 | RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, ("init mac failed!\n")); | 1163 | RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "init mac failed!\n"); |
1167 | return err; | 1164 | return err; |
1168 | } | 1165 | } |
1169 | err = rtl92c_download_fw(hw); | 1166 | err = rtl92c_download_fw(hw); |
1170 | if (err) { | 1167 | if (err) { |
1171 | RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, | 1168 | RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, |
1172 | ("Failed to download FW. Init HW without FW now..\n")); | 1169 | "Failed to download FW. Init HW without FW now..\n"); |
1173 | err = 1; | 1170 | err = 1; |
1174 | rtlhal->fw_ready = false; | 1171 | rtlhal->fw_ready = false; |
1175 | return err; | 1172 | return err; |
@@ -1280,8 +1277,7 @@ static void _ResetDigitalProcedure1(struct ieee80211_hw *hw, bool bWithoutHWSM) | |||
1280 | } | 1277 | } |
1281 | if (retry_cnts >= 100) { | 1278 | if (retry_cnts >= 100) { |
1282 | RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, | 1279 | RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, |
1283 | ("#####=> 8051 reset failed!.." | 1280 | "#####=> 8051 reset failed!.........................\n"); |
1284 | ".......................\n");); | ||
1285 | /* if 8051 reset fail, reset MAC. */ | 1281 | /* if 8051 reset fail, reset MAC. */ |
1286 | rtl_write_byte(rtlpriv, | 1282 | rtl_write_byte(rtlpriv, |
1287 | REG_SYS_FUNC_EN + 1, | 1283 | REG_SYS_FUNC_EN + 1, |
@@ -1495,35 +1491,36 @@ static int _rtl92cu_set_media_status(struct ieee80211_hw *hw, | |||
1495 | _rtl92cu_resume_tx_beacon(hw); | 1491 | _rtl92cu_resume_tx_beacon(hw); |
1496 | _rtl92cu_disable_bcn_sub_func(hw); | 1492 | _rtl92cu_disable_bcn_sub_func(hw); |
1497 | } else { | 1493 | } else { |
1498 | RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, ("Set HW_VAR_MEDIA_" | 1494 | RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, |
1499 | "STATUS:No such media status(%x).\n", type)); | 1495 | "Set HW_VAR_MEDIA_STATUS:No such media status(%x)\n", |
1496 | type); | ||
1500 | } | 1497 | } |
1501 | switch (type) { | 1498 | switch (type) { |
1502 | case NL80211_IFTYPE_UNSPECIFIED: | 1499 | case NL80211_IFTYPE_UNSPECIFIED: |
1503 | bt_msr |= MSR_NOLINK; | 1500 | bt_msr |= MSR_NOLINK; |
1504 | ledaction = LED_CTL_LINK; | 1501 | ledaction = LED_CTL_LINK; |
1505 | RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, | 1502 | RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, |
1506 | ("Set Network type to NO LINK!\n")); | 1503 | "Set Network type to NO LINK!\n"); |
1507 | break; | 1504 | break; |
1508 | case NL80211_IFTYPE_ADHOC: | 1505 | case NL80211_IFTYPE_ADHOC: |
1509 | bt_msr |= MSR_ADHOC; | 1506 | bt_msr |= MSR_ADHOC; |
1510 | RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, | 1507 | RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, |
1511 | ("Set Network type to Ad Hoc!\n")); | 1508 | "Set Network type to Ad Hoc!\n"); |
1512 | break; | 1509 | break; |
1513 | case NL80211_IFTYPE_STATION: | 1510 | case NL80211_IFTYPE_STATION: |
1514 | bt_msr |= MSR_INFRA; | 1511 | bt_msr |= MSR_INFRA; |
1515 | ledaction = LED_CTL_LINK; | 1512 | ledaction = LED_CTL_LINK; |
1516 | RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, | 1513 | RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, |
1517 | ("Set Network type to STA!\n")); | 1514 | "Set Network type to STA!\n"); |
1518 | break; | 1515 | break; |
1519 | case NL80211_IFTYPE_AP: | 1516 | case NL80211_IFTYPE_AP: |
1520 | bt_msr |= MSR_AP; | 1517 | bt_msr |= MSR_AP; |
1521 | RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, | 1518 | RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, |
1522 | ("Set Network type to AP!\n")); | 1519 | "Set Network type to AP!\n"); |
1523 | break; | 1520 | break; |
1524 | default: | 1521 | default: |
1525 | RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, | 1522 | RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, |
1526 | ("Network type %d not support!\n", type)); | 1523 | "Network type %d not supported!\n", type); |
1527 | goto error_out; | 1524 | goto error_out; |
1528 | } | 1525 | } |
1529 | rtl_write_byte(rtlpriv, (MSR), bt_msr); | 1526 | rtl_write_byte(rtlpriv, (MSR), bt_msr); |
@@ -1684,8 +1681,8 @@ void rtl92cu_set_beacon_related_registers(struct ieee80211_hw *hw) | |||
1684 | value32 |= TSFRST; | 1681 | value32 |= TSFRST; |
1685 | rtl_write_dword(rtlpriv, REG_TCR, value32); | 1682 | rtl_write_dword(rtlpriv, REG_TCR, value32); |
1686 | RT_TRACE(rtlpriv, COMP_INIT|COMP_BEACON, DBG_LOUD, | 1683 | RT_TRACE(rtlpriv, COMP_INIT|COMP_BEACON, DBG_LOUD, |
1687 | ("SetBeaconRelatedRegisters8192CUsb(): Set TCR(%x)\n", | 1684 | "SetBeaconRelatedRegisters8192CUsb(): Set TCR(%x)\n", |
1688 | value32)); | 1685 | value32); |
1689 | /* TODO: Modify later (Find the right parameters) | 1686 | /* TODO: Modify later (Find the right parameters) |
1690 | * NOTE: Fix test chip's bug (about contention windows's randomness) */ | 1687 | * NOTE: Fix test chip's bug (about contention windows's randomness) */ |
1691 | if ((mac->opmode == NL80211_IFTYPE_ADHOC) || | 1688 | if ((mac->opmode == NL80211_IFTYPE_ADHOC) || |
@@ -1702,8 +1699,8 @@ void rtl92cu_set_beacon_interval(struct ieee80211_hw *hw) | |||
1702 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); | 1699 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); |
1703 | u16 bcn_interval = mac->beacon_interval; | 1700 | u16 bcn_interval = mac->beacon_interval; |
1704 | 1701 | ||
1705 | RT_TRACE(rtlpriv, COMP_BEACON, DBG_DMESG, | 1702 | RT_TRACE(rtlpriv, COMP_BEACON, DBG_DMESG, "beacon_interval:%d\n", |
1706 | ("beacon_interval:%d\n", bcn_interval)); | 1703 | bcn_interval); |
1707 | rtl_write_word(rtlpriv, REG_BCN_INTERVAL, bcn_interval); | 1704 | rtl_write_word(rtlpriv, REG_BCN_INTERVAL, bcn_interval); |
1708 | } | 1705 | } |
1709 | 1706 | ||
@@ -1767,7 +1764,7 @@ void rtl92cu_get_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val) | |||
1767 | break; | 1764 | break; |
1768 | default: | 1765 | default: |
1769 | RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, | 1766 | RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, |
1770 | ("switch case not process\n")); | 1767 | "switch case not processed\n"); |
1771 | break; | 1768 | break; |
1772 | } | 1769 | } |
1773 | } | 1770 | } |
@@ -1827,8 +1824,7 @@ void rtl92cu_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val) | |||
1827 | rtl_write_byte(rtlpriv, REG_MAC_SPEC_SIFS + 1, val[0]); | 1824 | rtl_write_byte(rtlpriv, REG_MAC_SPEC_SIFS + 1, val[0]); |
1828 | rtl_write_byte(rtlpriv, REG_R2T_SIFS+1, val[0]); | 1825 | rtl_write_byte(rtlpriv, REG_R2T_SIFS+1, val[0]); |
1829 | rtl_write_byte(rtlpriv, REG_T2T_SIFS+1, val[0]); | 1826 | rtl_write_byte(rtlpriv, REG_T2T_SIFS+1, val[0]); |
1830 | RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD, | 1827 | RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD, "HW_VAR_SIFS\n"); |
1831 | ("HW_VAR_SIFS\n")); | ||
1832 | break; | 1828 | break; |
1833 | } | 1829 | } |
1834 | case HW_VAR_SLOT_TIME:{ | 1830 | case HW_VAR_SLOT_TIME:{ |
@@ -1837,7 +1833,7 @@ void rtl92cu_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val) | |||
1837 | 1833 | ||
1838 | rtl_write_byte(rtlpriv, REG_SLOT, val[0]); | 1834 | rtl_write_byte(rtlpriv, REG_SLOT, val[0]); |
1839 | RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD, | 1835 | RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD, |
1840 | ("HW_VAR_SLOT_TIME %x\n", val[0])); | 1836 | "HW_VAR_SLOT_TIME %x\n", val[0]); |
1841 | if (QOS_MODE) { | 1837 | if (QOS_MODE) { |
1842 | for (e_aci = 0; e_aci < AC_MAX; e_aci++) | 1838 | for (e_aci = 0; e_aci < AC_MAX; e_aci++) |
1843 | rtlpriv->cfg->ops->set_hw_reg(hw, | 1839 | rtlpriv->cfg->ops->set_hw_reg(hw, |
@@ -1901,8 +1897,8 @@ void rtl92cu_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val) | |||
1901 | min_spacing_to_set); | 1897 | min_spacing_to_set); |
1902 | *val = min_spacing_to_set; | 1898 | *val = min_spacing_to_set; |
1903 | RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD, | 1899 | RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD, |
1904 | ("Set HW_VAR_AMPDU_MIN_SPACE: %#x\n", | 1900 | "Set HW_VAR_AMPDU_MIN_SPACE: %#x\n", |
1905 | mac->min_space_cfg)); | 1901 | mac->min_space_cfg); |
1906 | rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE, | 1902 | rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE, |
1907 | mac->min_space_cfg); | 1903 | mac->min_space_cfg); |
1908 | } | 1904 | } |
@@ -1916,8 +1912,8 @@ void rtl92cu_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val) | |||
1916 | mac->min_space_cfg &= 0x07; | 1912 | mac->min_space_cfg &= 0x07; |
1917 | mac->min_space_cfg |= (density_to_set << 3); | 1913 | mac->min_space_cfg |= (density_to_set << 3); |
1918 | RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD, | 1914 | RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD, |
1919 | ("Set HW_VAR_SHORTGI_DENSITY: %#x\n", | 1915 | "Set HW_VAR_SHORTGI_DENSITY: %#x\n", |
1920 | mac->min_space_cfg)); | 1916 | mac->min_space_cfg); |
1921 | rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE, | 1917 | rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE, |
1922 | mac->min_space_cfg); | 1918 | mac->min_space_cfg); |
1923 | break; | 1919 | break; |
@@ -1950,8 +1946,8 @@ void rtl92cu_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val) | |||
1950 | p_regtoset[index]); | 1946 | p_regtoset[index]); |
1951 | } | 1947 | } |
1952 | RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD, | 1948 | RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD, |
1953 | ("Set HW_VAR_AMPDU_FACTOR: %#x\n", | 1949 | "Set HW_VAR_AMPDU_FACTOR: %#x\n", |
1954 | factor_toset)); | 1950 | factor_toset); |
1955 | } | 1951 | } |
1956 | break; | 1952 | break; |
1957 | } | 1953 | } |
@@ -1969,8 +1965,8 @@ void rtl92cu_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val) | |||
1969 | AC_PARAM_ECW_MAX_OFFSET); | 1965 | AC_PARAM_ECW_MAX_OFFSET); |
1970 | u4b_ac_param |= (u32) tx_op << AC_PARAM_TXOP_OFFSET; | 1966 | u4b_ac_param |= (u32) tx_op << AC_PARAM_TXOP_OFFSET; |
1971 | RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD, | 1967 | RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD, |
1972 | ("queue:%x, ac_param:%x\n", e_aci, | 1968 | "queue:%x, ac_param:%x\n", |
1973 | u4b_ac_param)); | 1969 | e_aci, u4b_ac_param); |
1974 | switch (e_aci) { | 1970 | switch (e_aci) { |
1975 | case AC1_BK: | 1971 | case AC1_BK: |
1976 | rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM, | 1972 | rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM, |
@@ -2020,8 +2016,8 @@ void rtl92cu_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val) | |||
2020 | break; | 2016 | break; |
2021 | default: | 2017 | default: |
2022 | RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, | 2018 | RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, |
2023 | ("HW_VAR_ACM_CTRL acm set " | 2019 | "HW_VAR_ACM_CTRL acm set failed: eACI is %d\n", |
2024 | "failed: eACI is %d\n", acm)); | 2020 | acm); |
2025 | break; | 2021 | break; |
2026 | } | 2022 | } |
2027 | } else { | 2023 | } else { |
@@ -2037,13 +2033,13 @@ void rtl92cu_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val) | |||
2037 | break; | 2033 | break; |
2038 | default: | 2034 | default: |
2039 | RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, | 2035 | RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, |
2040 | ("switch case not process\n")); | 2036 | "switch case not processed\n"); |
2041 | break; | 2037 | break; |
2042 | } | 2038 | } |
2043 | } | 2039 | } |
2044 | RT_TRACE(rtlpriv, COMP_QOS, DBG_TRACE, | 2040 | RT_TRACE(rtlpriv, COMP_QOS, DBG_TRACE, |
2045 | ("SetHwReg8190pci(): [HW_VAR_ACM_CTRL] " | 2041 | "SetHwReg8190pci(): [HW_VAR_ACM_CTRL] Write 0x%X\n", |
2046 | "Write 0x%X\n", acm_ctrl)); | 2042 | acm_ctrl); |
2047 | rtl_write_byte(rtlpriv, REG_ACMHWCTRL, acm_ctrl); | 2043 | rtl_write_byte(rtlpriv, REG_ACMHWCTRL, acm_ctrl); |
2048 | break; | 2044 | break; |
2049 | } | 2045 | } |
@@ -2051,7 +2047,7 @@ void rtl92cu_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val) | |||
2051 | rtl_write_dword(rtlpriv, REG_RCR, ((u32 *) (val))[0]); | 2047 | rtl_write_dword(rtlpriv, REG_RCR, ((u32 *) (val))[0]); |
2052 | mac->rx_conf = ((u32 *) (val))[0]; | 2048 | mac->rx_conf = ((u32 *) (val))[0]; |
2053 | RT_TRACE(rtlpriv, COMP_RECV, DBG_DMESG, | 2049 | RT_TRACE(rtlpriv, COMP_RECV, DBG_DMESG, |
2054 | ("### Set RCR(0x%08x) ###\n", mac->rx_conf)); | 2050 | "### Set RCR(0x%08x) ###\n", mac->rx_conf); |
2055 | break; | 2051 | break; |
2056 | } | 2052 | } |
2057 | case HW_VAR_RETRY_LIMIT:{ | 2053 | case HW_VAR_RETRY_LIMIT:{ |
@@ -2060,8 +2056,9 @@ void rtl92cu_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val) | |||
2060 | rtl_write_word(rtlpriv, REG_RL, | 2056 | rtl_write_word(rtlpriv, REG_RL, |
2061 | retry_limit << RETRY_LIMIT_SHORT_SHIFT | | 2057 | retry_limit << RETRY_LIMIT_SHORT_SHIFT | |
2062 | retry_limit << RETRY_LIMIT_LONG_SHIFT); | 2058 | retry_limit << RETRY_LIMIT_LONG_SHIFT); |
2063 | RT_TRACE(rtlpriv, COMP_MLME, DBG_DMESG, ("Set HW_VAR_R" | 2059 | RT_TRACE(rtlpriv, COMP_MLME, DBG_DMESG, |
2064 | "ETRY_LIMIT(0x%08x)\n", retry_limit)); | 2060 | "Set HW_VAR_RETRY_LIMIT(0x%08x)\n", |
2061 | retry_limit); | ||
2065 | break; | 2062 | break; |
2066 | } | 2063 | } |
2067 | case HW_VAR_DUAL_TSF_RST: | 2064 | case HW_VAR_DUAL_TSF_RST: |
@@ -2165,8 +2162,8 @@ void rtl92cu_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val) | |||
2165 | rtl_write_word(rtlpriv, REG_RXFLTMAP2, *(u16 *)val); | 2162 | rtl_write_word(rtlpriv, REG_RXFLTMAP2, *(u16 *)val); |
2166 | break; | 2163 | break; |
2167 | default: | 2164 | default: |
2168 | RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, ("switch case " | 2165 | RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, |
2169 | "not process\n")); | 2166 | "switch case not processed\n"); |
2170 | break; | 2167 | break; |
2171 | } | 2168 | } |
2172 | } | 2169 | } |
@@ -2239,8 +2236,8 @@ void rtl92cu_update_hal_rate_table(struct ieee80211_hw *hw, | |||
2239 | (shortgi_rate << 4) | (shortgi_rate); | 2236 | (shortgi_rate << 4) | (shortgi_rate); |
2240 | } | 2237 | } |
2241 | rtl_write_dword(rtlpriv, REG_ARFR0 + ratr_index * 4, ratr_value); | 2238 | rtl_write_dword(rtlpriv, REG_ARFR0 + ratr_index * 4, ratr_value); |
2242 | RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG, ("%x\n", rtl_read_dword(rtlpriv, | 2239 | RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG, "%x\n", |
2243 | REG_ARFR0))); | 2240 | rtl_read_dword(rtlpriv, REG_ARFR0)); |
2244 | } | 2241 | } |
2245 | 2242 | ||
2246 | void rtl92cu_update_hal_rate_mask(struct ieee80211_hw *hw, u8 rssi_level) | 2243 | void rtl92cu_update_hal_rate_mask(struct ieee80211_hw *hw, u8 rssi_level) |
@@ -2344,17 +2341,16 @@ void rtl92cu_update_hal_rate_mask(struct ieee80211_hw *hw, u8 rssi_level) | |||
2344 | ratr_bitmap &= 0x0f0ff0ff; | 2341 | ratr_bitmap &= 0x0f0ff0ff; |
2345 | break; | 2342 | break; |
2346 | } | 2343 | } |
2347 | RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG, ("ratr_bitmap :%x\n", | 2344 | RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG, "ratr_bitmap :%x\n", |
2348 | ratr_bitmap)); | 2345 | ratr_bitmap); |
2349 | *(u32 *)&rate_mask = ((ratr_bitmap & 0x0fffffff) | | 2346 | *(u32 *)&rate_mask = ((ratr_bitmap & 0x0fffffff) | |
2350 | ratr_index << 28); | 2347 | ratr_index << 28); |
2351 | rate_mask[4] = macid | (shortgi ? 0x20 : 0x00) | 0x80; | 2348 | rate_mask[4] = macid | (shortgi ? 0x20 : 0x00) | 0x80; |
2352 | RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG, ("Rate_index:%x, " | 2349 | RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG, |
2353 | "ratr_val:%x, %x:%x:%x:%x:%x\n", | 2350 | "Rate_index:%x, ratr_val:%x, %x:%x:%x:%x:%x\n", |
2354 | ratr_index, ratr_bitmap, | 2351 | ratr_index, ratr_bitmap, |
2355 | rate_mask[0], rate_mask[1], | 2352 | rate_mask[0], rate_mask[1], rate_mask[2], rate_mask[3], |
2356 | rate_mask[2], rate_mask[3], | 2353 | rate_mask[4]); |
2357 | rate_mask[4])); | ||
2358 | rtl92c_fill_h2c_cmd(hw, H2C_RA_MASK, 5, rate_mask); | 2354 | rtl92c_fill_h2c_cmd(hw, H2C_RA_MASK, 5, rate_mask); |
2359 | } | 2355 | } |
2360 | 2356 | ||
@@ -2404,7 +2400,7 @@ bool rtl92cu_gpio_radio_on_off_checking(struct ieee80211_hw *hw, u8 * valid) | |||
2404 | e_rfpowerstate_toset = (u1tmp & BIT(7)) ? | 2400 | e_rfpowerstate_toset = (u1tmp & BIT(7)) ? |
2405 | ERFOFF : ERFON; | 2401 | ERFOFF : ERFON; |
2406 | RT_TRACE(rtlpriv, COMP_POWER, DBG_DMESG, | 2402 | RT_TRACE(rtlpriv, COMP_POWER, DBG_DMESG, |
2407 | ("pwrdown, 0x5c(BIT7)=%02x\n", u1tmp)); | 2403 | "pwrdown, 0x5c(BIT7)=%02x\n", u1tmp); |
2408 | } else { | 2404 | } else { |
2409 | rtl_write_byte(rtlpriv, REG_MAC_PINMUX_CFG, | 2405 | rtl_write_byte(rtlpriv, REG_MAC_PINMUX_CFG, |
2410 | rtl_read_byte(rtlpriv, | 2406 | rtl_read_byte(rtlpriv, |
@@ -2413,27 +2409,26 @@ bool rtl92cu_gpio_radio_on_off_checking(struct ieee80211_hw *hw, u8 * valid) | |||
2413 | e_rfpowerstate_toset = (u1tmp & BIT(3)) ? | 2409 | e_rfpowerstate_toset = (u1tmp & BIT(3)) ? |
2414 | ERFON : ERFOFF; | 2410 | ERFON : ERFOFF; |
2415 | RT_TRACE(rtlpriv, COMP_POWER, DBG_DMESG, | 2411 | RT_TRACE(rtlpriv, COMP_POWER, DBG_DMESG, |
2416 | ("GPIO_IN=%02x\n", u1tmp)); | 2412 | "GPIO_IN=%02x\n", u1tmp); |
2417 | } | 2413 | } |
2418 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, ("N-SS RF =%x\n", | 2414 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, "N-SS RF =%x\n", |
2419 | e_rfpowerstate_toset)); | 2415 | e_rfpowerstate_toset); |
2420 | } | 2416 | } |
2421 | if ((ppsc->hwradiooff) && (e_rfpowerstate_toset == ERFON)) { | 2417 | if ((ppsc->hwradiooff) && (e_rfpowerstate_toset == ERFON)) { |
2422 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, ("GPIOChangeRF - HW " | 2418 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, |
2423 | "Radio ON, RF ON\n")); | 2419 | "GPIOChangeRF - HW Radio ON, RF ON\n"); |
2424 | ppsc->hwradiooff = false; | 2420 | ppsc->hwradiooff = false; |
2425 | actuallyset = true; | 2421 | actuallyset = true; |
2426 | } else if ((!ppsc->hwradiooff) && (e_rfpowerstate_toset == | 2422 | } else if ((!ppsc->hwradiooff) && (e_rfpowerstate_toset == |
2427 | ERFOFF)) { | 2423 | ERFOFF)) { |
2428 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, ("GPIOChangeRF - HW" | 2424 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, |
2429 | " Radio OFF\n")); | 2425 | "GPIOChangeRF - HW Radio OFF\n"); |
2430 | ppsc->hwradiooff = true; | 2426 | ppsc->hwradiooff = true; |
2431 | actuallyset = true; | 2427 | actuallyset = true; |
2432 | } else { | 2428 | } else { |
2433 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD , | 2429 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, |
2434 | ("pHalData->bHwRadioOff and eRfPowerStateToSet do not" | 2430 | "pHalData->bHwRadioOff and eRfPowerStateToSet do not match: pHalData->bHwRadioOff %x, eRfPowerStateToSet %x\n", |
2435 | " match: pHalData->bHwRadioOff %x, eRfPowerStateToSet " | 2431 | ppsc->hwradiooff, e_rfpowerstate_toset); |
2436 | "%x\n", ppsc->hwradiooff, e_rfpowerstate_toset)); | ||
2437 | } | 2432 | } |
2438 | if (actuallyset) { | 2433 | if (actuallyset) { |
2439 | ppsc->hwradiooff = true; | 2434 | ppsc->hwradiooff = true; |