diff options
Diffstat (limited to 'drivers/net/wireless/rtlwifi/rtl8192ce/hw.c')
-rw-r--r-- | drivers/net/wireless/rtlwifi/rtl8192ce/hw.c | 43 |
1 files changed, 21 insertions, 22 deletions
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/hw.c b/drivers/net/wireless/rtlwifi/rtl8192ce/hw.c index 5c4d9bc040f1..bd0da7ef290b 100644 --- a/drivers/net/wireless/rtlwifi/rtl8192ce/hw.c +++ b/drivers/net/wireless/rtlwifi/rtl8192ce/hw.c | |||
@@ -214,13 +214,13 @@ void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val) | |||
214 | for (e_aci = 0; e_aci < AC_MAX; e_aci++) { | 214 | for (e_aci = 0; e_aci < AC_MAX; e_aci++) { |
215 | rtlpriv->cfg->ops->set_hw_reg(hw, | 215 | rtlpriv->cfg->ops->set_hw_reg(hw, |
216 | HW_VAR_AC_PARAM, | 216 | HW_VAR_AC_PARAM, |
217 | (u8 *) (&e_aci)); | 217 | &e_aci); |
218 | } | 218 | } |
219 | break; | 219 | break; |
220 | } | 220 | } |
221 | case HW_VAR_ACK_PREAMBLE:{ | 221 | case HW_VAR_ACK_PREAMBLE:{ |
222 | u8 reg_tmp; | 222 | u8 reg_tmp; |
223 | u8 short_preamble = (bool) (*(u8 *) val); | 223 | u8 short_preamble = (bool)*val; |
224 | reg_tmp = (mac->cur_40_prime_sc) << 5; | 224 | reg_tmp = (mac->cur_40_prime_sc) << 5; |
225 | if (short_preamble) | 225 | if (short_preamble) |
226 | reg_tmp |= 0x80; | 226 | reg_tmp |= 0x80; |
@@ -232,7 +232,7 @@ void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val) | |||
232 | u8 min_spacing_to_set; | 232 | u8 min_spacing_to_set; |
233 | u8 sec_min_space; | 233 | u8 sec_min_space; |
234 | 234 | ||
235 | min_spacing_to_set = *((u8 *) val); | 235 | min_spacing_to_set = *val; |
236 | if (min_spacing_to_set <= 7) { | 236 | if (min_spacing_to_set <= 7) { |
237 | sec_min_space = 0; | 237 | sec_min_space = 0; |
238 | 238 | ||
@@ -257,7 +257,7 @@ void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val) | |||
257 | case HW_VAR_SHORTGI_DENSITY:{ | 257 | case HW_VAR_SHORTGI_DENSITY:{ |
258 | u8 density_to_set; | 258 | u8 density_to_set; |
259 | 259 | ||
260 | density_to_set = *((u8 *) val); | 260 | density_to_set = *val; |
261 | mac->min_space_cfg |= (density_to_set << 3); | 261 | mac->min_space_cfg |= (density_to_set << 3); |
262 | 262 | ||
263 | RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD, | 263 | RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD, |
@@ -284,7 +284,7 @@ void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val) | |||
284 | else | 284 | else |
285 | p_regtoset = regtoset_normal; | 285 | p_regtoset = regtoset_normal; |
286 | 286 | ||
287 | factor_toset = *((u8 *) val); | 287 | factor_toset = *(val); |
288 | if (factor_toset <= 3) { | 288 | if (factor_toset <= 3) { |
289 | factor_toset = (1 << (factor_toset + 2)); | 289 | factor_toset = (1 << (factor_toset + 2)); |
290 | if (factor_toset > 0xf) | 290 | if (factor_toset > 0xf) |
@@ -316,17 +316,17 @@ void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val) | |||
316 | break; | 316 | break; |
317 | } | 317 | } |
318 | case HW_VAR_AC_PARAM:{ | 318 | case HW_VAR_AC_PARAM:{ |
319 | u8 e_aci = *((u8 *) val); | 319 | u8 e_aci = *(val); |
320 | rtl92c_dm_init_edca_turbo(hw); | 320 | rtl92c_dm_init_edca_turbo(hw); |
321 | 321 | ||
322 | if (rtlpci->acm_method != eAcmWay2_SW) | 322 | if (rtlpci->acm_method != eAcmWay2_SW) |
323 | rtlpriv->cfg->ops->set_hw_reg(hw, | 323 | rtlpriv->cfg->ops->set_hw_reg(hw, |
324 | HW_VAR_ACM_CTRL, | 324 | HW_VAR_ACM_CTRL, |
325 | (u8 *) (&e_aci)); | 325 | (&e_aci)); |
326 | break; | 326 | break; |
327 | } | 327 | } |
328 | case HW_VAR_ACM_CTRL:{ | 328 | case HW_VAR_ACM_CTRL:{ |
329 | u8 e_aci = *((u8 *) val); | 329 | u8 e_aci = *(val); |
330 | union aci_aifsn *p_aci_aifsn = | 330 | union aci_aifsn *p_aci_aifsn = |
331 | (union aci_aifsn *)(&(mac->ac[0].aifs)); | 331 | (union aci_aifsn *)(&(mac->ac[0].aifs)); |
332 | u8 acm = p_aci_aifsn->f.acm; | 332 | u8 acm = p_aci_aifsn->f.acm; |
@@ -382,7 +382,7 @@ void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val) | |||
382 | break; | 382 | break; |
383 | } | 383 | } |
384 | case HW_VAR_RETRY_LIMIT:{ | 384 | case HW_VAR_RETRY_LIMIT:{ |
385 | u8 retry_limit = ((u8 *) (val))[0]; | 385 | u8 retry_limit = val[0]; |
386 | 386 | ||
387 | rtl_write_word(rtlpriv, REG_RL, | 387 | rtl_write_word(rtlpriv, REG_RL, |
388 | retry_limit << RETRY_LIMIT_SHORT_SHIFT | | 388 | retry_limit << RETRY_LIMIT_SHORT_SHIFT | |
@@ -396,13 +396,13 @@ void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val) | |||
396 | rtlefuse->efuse_usedbytes = *((u16 *) val); | 396 | rtlefuse->efuse_usedbytes = *((u16 *) val); |
397 | break; | 397 | break; |
398 | case HW_VAR_EFUSE_USAGE: | 398 | case HW_VAR_EFUSE_USAGE: |
399 | rtlefuse->efuse_usedpercentage = *((u8 *) val); | 399 | rtlefuse->efuse_usedpercentage = *val; |
400 | break; | 400 | break; |
401 | case HW_VAR_IO_CMD: | 401 | case HW_VAR_IO_CMD: |
402 | rtl92c_phy_set_io_cmd(hw, (*(enum io_type *)val)); | 402 | rtl92c_phy_set_io_cmd(hw, (*(enum io_type *)val)); |
403 | break; | 403 | break; |
404 | case HW_VAR_WPA_CONFIG: | 404 | case HW_VAR_WPA_CONFIG: |
405 | rtl_write_byte(rtlpriv, REG_SECCFG, *((u8 *) val)); | 405 | rtl_write_byte(rtlpriv, REG_SECCFG, *val); |
406 | break; | 406 | break; |
407 | case HW_VAR_SET_RPWM:{ | 407 | case HW_VAR_SET_RPWM:{ |
408 | u8 rpwm_val; | 408 | u8 rpwm_val; |
@@ -411,31 +411,30 @@ void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val) | |||
411 | udelay(1); | 411 | udelay(1); |
412 | 412 | ||
413 | if (rpwm_val & BIT(7)) { | 413 | if (rpwm_val & BIT(7)) { |
414 | rtl_write_byte(rtlpriv, REG_PCIE_HRPWM, | 414 | rtl_write_byte(rtlpriv, REG_PCIE_HRPWM, *val); |
415 | (*(u8 *) val)); | ||
416 | } else { | 415 | } else { |
417 | rtl_write_byte(rtlpriv, REG_PCIE_HRPWM, | 416 | rtl_write_byte(rtlpriv, REG_PCIE_HRPWM, |
418 | ((*(u8 *) val) | BIT(7))); | 417 | *val | BIT(7)); |
419 | } | 418 | } |
420 | 419 | ||
421 | break; | 420 | break; |
422 | } | 421 | } |
423 | case HW_VAR_H2C_FW_PWRMODE:{ | 422 | case HW_VAR_H2C_FW_PWRMODE:{ |
424 | u8 psmode = (*(u8 *) val); | 423 | u8 psmode = *val; |
425 | 424 | ||
426 | if ((psmode != FW_PS_ACTIVE_MODE) && | 425 | if ((psmode != FW_PS_ACTIVE_MODE) && |
427 | (!IS_92C_SERIAL(rtlhal->version))) { | 426 | (!IS_92C_SERIAL(rtlhal->version))) { |
428 | rtl92c_dm_rf_saving(hw, true); | 427 | rtl92c_dm_rf_saving(hw, true); |
429 | } | 428 | } |
430 | 429 | ||
431 | rtl92c_set_fw_pwrmode_cmd(hw, (*(u8 *) val)); | 430 | rtl92c_set_fw_pwrmode_cmd(hw, *val); |
432 | break; | 431 | break; |
433 | } | 432 | } |
434 | case HW_VAR_FW_PSMODE_STATUS: | 433 | case HW_VAR_FW_PSMODE_STATUS: |
435 | ppsc->fw_current_inpsmode = *((bool *) val); | 434 | ppsc->fw_current_inpsmode = *((bool *) val); |
436 | break; | 435 | break; |
437 | case HW_VAR_H2C_FW_JOINBSSRPT:{ | 436 | case HW_VAR_H2C_FW_JOINBSSRPT:{ |
438 | u8 mstatus = (*(u8 *) val); | 437 | u8 mstatus = *val; |
439 | u8 tmp_regcr, tmp_reg422; | 438 | u8 tmp_regcr, tmp_reg422; |
440 | bool recover = false; | 439 | bool recover = false; |
441 | 440 | ||
@@ -472,7 +471,7 @@ void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val) | |||
472 | rtl_write_byte(rtlpriv, REG_CR + 1, | 471 | rtl_write_byte(rtlpriv, REG_CR + 1, |
473 | (tmp_regcr & ~(BIT(0)))); | 472 | (tmp_regcr & ~(BIT(0)))); |
474 | } | 473 | } |
475 | rtl92c_set_fw_joinbss_report_cmd(hw, (*(u8 *) val)); | 474 | rtl92c_set_fw_joinbss_report_cmd(hw, *val); |
476 | 475 | ||
477 | break; | 476 | break; |
478 | } | 477 | } |
@@ -486,7 +485,7 @@ void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val) | |||
486 | break; | 485 | break; |
487 | } | 486 | } |
488 | case HW_VAR_CORRECT_TSF:{ | 487 | case HW_VAR_CORRECT_TSF:{ |
489 | u8 btype_ibss = ((u8 *) (val))[0]; | 488 | u8 btype_ibss = val[0]; |
490 | 489 | ||
491 | if (btype_ibss) | 490 | if (btype_ibss) |
492 | _rtl92ce_stop_tx_beacon(hw); | 491 | _rtl92ce_stop_tx_beacon(hw); |
@@ -1589,10 +1588,10 @@ static void _rtl92ce_read_adapter_info(struct ieee80211_hw *hw) | |||
1589 | rtlefuse->autoload_failflag, | 1588 | rtlefuse->autoload_failflag, |
1590 | hwinfo); | 1589 | hwinfo); |
1591 | 1590 | ||
1592 | rtlefuse->eeprom_channelplan = *(u8 *)&hwinfo[EEPROM_CHANNELPLAN]; | 1591 | rtlefuse->eeprom_channelplan = *&hwinfo[EEPROM_CHANNELPLAN]; |
1593 | rtlefuse->eeprom_version = *(u16 *)&hwinfo[EEPROM_VERSION]; | 1592 | rtlefuse->eeprom_version = *(u16 *)&hwinfo[EEPROM_VERSION]; |
1594 | rtlefuse->txpwr_fromeprom = true; | 1593 | rtlefuse->txpwr_fromeprom = true; |
1595 | rtlefuse->eeprom_oemid = *(u8 *)&hwinfo[EEPROM_CUSTOMER_ID]; | 1594 | rtlefuse->eeprom_oemid = *&hwinfo[EEPROM_CUSTOMER_ID]; |
1596 | 1595 | ||
1597 | RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, | 1596 | RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, |
1598 | "EEPROM Customer ID: 0x%2x\n", rtlefuse->eeprom_oemid); | 1597 | "EEPROM Customer ID: 0x%2x\n", rtlefuse->eeprom_oemid); |
@@ -1939,7 +1938,7 @@ void rtl92ce_update_channel_access_setting(struct ieee80211_hw *hw) | |||
1939 | u16 sifs_timer; | 1938 | u16 sifs_timer; |
1940 | 1939 | ||
1941 | rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SLOT_TIME, | 1940 | rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SLOT_TIME, |
1942 | (u8 *)&mac->slot_time); | 1941 | &mac->slot_time); |
1943 | if (!mac->ht_enable) | 1942 | if (!mac->ht_enable) |
1944 | sifs_timer = 0x0a0a; | 1943 | sifs_timer = 0x0a0a; |
1945 | else | 1944 | else |