diff options
Diffstat (limited to 'drivers/net/wireless/iwlwifi/iwl-trans-pcie-int.h')
-rw-r--r-- | drivers/net/wireless/iwlwifi/iwl-trans-pcie-int.h | 18 |
1 files changed, 13 insertions, 5 deletions
diff --git a/drivers/net/wireless/iwlwifi/iwl-trans-pcie-int.h b/drivers/net/wireless/iwlwifi/iwl-trans-pcie-int.h index 0ac9b4d30271..561865f29d56 100644 --- a/drivers/net/wireless/iwlwifi/iwl-trans-pcie-int.h +++ b/drivers/net/wireless/iwlwifi/iwl-trans-pcie-int.h | |||
@@ -201,6 +201,7 @@ struct iwl_tx_queue { | |||
201 | * @rxq: all the RX queue data | 201 | * @rxq: all the RX queue data |
202 | * @rx_replenish: work that will be called when buffers need to be allocated | 202 | * @rx_replenish: work that will be called when buffers need to be allocated |
203 | * @trans: pointer to the generic transport area | 203 | * @trans: pointer to the generic transport area |
204 | * @irq_requested: true when the irq has been requested | ||
204 | * @scd_base_addr: scheduler sram base address in SRAM | 205 | * @scd_base_addr: scheduler sram base address in SRAM |
205 | * @scd_bc_tbls: pointer to the byte count table of the scheduler | 206 | * @scd_bc_tbls: pointer to the byte count table of the scheduler |
206 | * @kw: keep warm address | 207 | * @kw: keep warm address |
@@ -211,6 +212,8 @@ struct iwl_tx_queue { | |||
211 | * @txq_ctx_active_msk: what queue is active | 212 | * @txq_ctx_active_msk: what queue is active |
212 | * queue_stopped: tracks what queue is stopped | 213 | * queue_stopped: tracks what queue is stopped |
213 | * queue_stop_count: tracks what SW queue is stopped | 214 | * queue_stop_count: tracks what SW queue is stopped |
215 | * @pci_dev: basic pci-network driver stuff | ||
216 | * @hw_base: pci hardware address support | ||
214 | */ | 217 | */ |
215 | struct iwl_trans_pcie { | 218 | struct iwl_trans_pcie { |
216 | struct iwl_rx_queue rxq; | 219 | struct iwl_rx_queue rxq; |
@@ -223,6 +226,7 @@ struct iwl_trans_pcie { | |||
223 | int ict_index; | 226 | int ict_index; |
224 | u32 inta; | 227 | u32 inta; |
225 | bool use_ict; | 228 | bool use_ict; |
229 | bool irq_requested; | ||
226 | struct tasklet_struct irq_tasklet; | 230 | struct tasklet_struct irq_tasklet; |
227 | struct isr_statistics isr_stats; | 231 | struct isr_statistics isr_stats; |
228 | 232 | ||
@@ -241,6 +245,10 @@ struct iwl_trans_pcie { | |||
241 | #define IWL_MAX_HW_QUEUES 32 | 245 | #define IWL_MAX_HW_QUEUES 32 |
242 | unsigned long queue_stopped[BITS_TO_LONGS(IWL_MAX_HW_QUEUES)]; | 246 | unsigned long queue_stopped[BITS_TO_LONGS(IWL_MAX_HW_QUEUES)]; |
243 | atomic_t queue_stop_count[4]; | 247 | atomic_t queue_stop_count[4]; |
248 | |||
249 | /* PCI bus related data */ | ||
250 | struct pci_dev *pci_dev; | ||
251 | void __iomem *hw_base; | ||
244 | }; | 252 | }; |
245 | 253 | ||
246 | #define IWL_TRANS_GET_PCIE_TRANS(_iwl_trans) \ | 254 | #define IWL_TRANS_GET_PCIE_TRANS(_iwl_trans) \ |
@@ -258,7 +266,7 @@ void iwl_rx_queue_update_write_ptr(struct iwl_trans *trans, | |||
258 | /***************************************************** | 266 | /***************************************************** |
259 | * ICT | 267 | * ICT |
260 | ******************************************************/ | 268 | ******************************************************/ |
261 | int iwl_reset_ict(struct iwl_trans *trans); | 269 | void iwl_reset_ict(struct iwl_trans *trans); |
262 | void iwl_disable_ict(struct iwl_trans *trans); | 270 | void iwl_disable_ict(struct iwl_trans *trans); |
263 | int iwl_alloc_isr_ict(struct iwl_trans *trans); | 271 | int iwl_alloc_isr_ict(struct iwl_trans *trans); |
264 | void iwl_free_isr_ict(struct iwl_trans *trans); | 272 | void iwl_free_isr_ict(struct iwl_trans *trans); |
@@ -311,12 +319,12 @@ static inline void iwl_disable_interrupts(struct iwl_trans *trans) | |||
311 | clear_bit(STATUS_INT_ENABLED, &trans->shrd->status); | 319 | clear_bit(STATUS_INT_ENABLED, &trans->shrd->status); |
312 | 320 | ||
313 | /* disable interrupts from uCode/NIC to host */ | 321 | /* disable interrupts from uCode/NIC to host */ |
314 | iwl_write32(bus(trans), CSR_INT_MASK, 0x00000000); | 322 | iwl_write32(trans, CSR_INT_MASK, 0x00000000); |
315 | 323 | ||
316 | /* acknowledge/clear/reset any interrupts still pending | 324 | /* acknowledge/clear/reset any interrupts still pending |
317 | * from uCode or flow handler (Rx/Tx DMA) */ | 325 | * from uCode or flow handler (Rx/Tx DMA) */ |
318 | iwl_write32(bus(trans), CSR_INT, 0xffffffff); | 326 | iwl_write32(trans, CSR_INT, 0xffffffff); |
319 | iwl_write32(bus(trans), CSR_FH_INT_STATUS, 0xffffffff); | 327 | iwl_write32(trans, CSR_FH_INT_STATUS, 0xffffffff); |
320 | IWL_DEBUG_ISR(trans, "Disabled interrupts\n"); | 328 | IWL_DEBUG_ISR(trans, "Disabled interrupts\n"); |
321 | } | 329 | } |
322 | 330 | ||
@@ -327,7 +335,7 @@ static inline void iwl_enable_interrupts(struct iwl_trans *trans) | |||
327 | 335 | ||
328 | IWL_DEBUG_ISR(trans, "Enabling interrupts\n"); | 336 | IWL_DEBUG_ISR(trans, "Enabling interrupts\n"); |
329 | set_bit(STATUS_INT_ENABLED, &trans->shrd->status); | 337 | set_bit(STATUS_INT_ENABLED, &trans->shrd->status); |
330 | iwl_write32(bus(trans), CSR_INT_MASK, trans_pcie->inta_mask); | 338 | iwl_write32(trans, CSR_INT_MASK, trans_pcie->inta_mask); |
331 | } | 339 | } |
332 | 340 | ||
333 | /* | 341 | /* |