diff options
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/ar9003_phy.h')
-rw-r--r-- | drivers/net/wireless/ath/ath9k/ar9003_phy.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.h b/drivers/net/wireless/ath/ath9k/ar9003_phy.h index b7720819872b..6e0d4adc1a6b 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h | |||
@@ -260,7 +260,13 @@ | |||
260 | #define AR_PHY_CCA_0 (AR_AGC_BASE + 0x1c) | 260 | #define AR_PHY_CCA_0 (AR_AGC_BASE + 0x1c) |
261 | #define AR_PHY_EXT_CCA0 (AR_AGC_BASE + 0x20) | 261 | #define AR_PHY_EXT_CCA0 (AR_AGC_BASE + 0x20) |
262 | #define AR_PHY_RESTART (AR_AGC_BASE + 0x24) | 262 | #define AR_PHY_RESTART (AR_AGC_BASE + 0x24) |
263 | |||
263 | #define AR_PHY_MC_GAIN_CTRL (AR_AGC_BASE + 0x28) | 264 | #define AR_PHY_MC_GAIN_CTRL (AR_AGC_BASE + 0x28) |
265 | #define AR_ANT_DIV_CTRL_ALL 0x7e000000 | ||
266 | #define AR_ANT_DIV_CTRL_ALL_S 25 | ||
267 | #define AR_ANT_DIV_ENABLE 0x1000000 | ||
268 | #define AR_ANT_DIV_ENABLE_S 24 | ||
269 | |||
264 | #define AR_PHY_EXTCHN_PWRTHR1 (AR_AGC_BASE + 0x2c) | 270 | #define AR_PHY_EXTCHN_PWRTHR1 (AR_AGC_BASE + 0x2c) |
265 | #define AR_PHY_EXT_CHN_WIN (AR_AGC_BASE + 0x30) | 271 | #define AR_PHY_EXT_CHN_WIN (AR_AGC_BASE + 0x30) |
266 | #define AR_PHY_20_40_DET_THR (AR_AGC_BASE + 0x34) | 272 | #define AR_PHY_20_40_DET_THR (AR_AGC_BASE + 0x34) |
@@ -271,7 +277,11 @@ | |||
271 | #define AR_PHY_RX_GAIN_BOUNDS_2 (AR_AGC_BASE + 0x48) | 277 | #define AR_PHY_RX_GAIN_BOUNDS_2 (AR_AGC_BASE + 0x48) |
272 | #define AR_PHY_RSSI_0 (AR_AGC_BASE + 0x180) | 278 | #define AR_PHY_RSSI_0 (AR_AGC_BASE + 0x180) |
273 | #define AR_PHY_SPUR_CCK_REP0 (AR_AGC_BASE + 0x184) | 279 | #define AR_PHY_SPUR_CCK_REP0 (AR_AGC_BASE + 0x184) |
280 | |||
274 | #define AR_PHY_CCK_DETECT (AR_AGC_BASE + 0x1c0) | 281 | #define AR_PHY_CCK_DETECT (AR_AGC_BASE + 0x1c0) |
282 | #define AR_FAST_DIV_ENABLE 0x2000 | ||
283 | #define AR_FAST_DIV_ENABLE_S 13 | ||
284 | |||
275 | #define AR_PHY_DAG_CTRLCCK (AR_AGC_BASE + 0x1c4) | 285 | #define AR_PHY_DAG_CTRLCCK (AR_AGC_BASE + 0x1c4) |
276 | #define AR_PHY_IQCORR_CTRL_CCK (AR_AGC_BASE + 0x1c8) | 286 | #define AR_PHY_IQCORR_CTRL_CCK (AR_AGC_BASE + 0x1c8) |
277 | 287 | ||