diff options
Diffstat (limited to 'drivers/net/r8169.c')
-rw-r--r-- | drivers/net/r8169.c | 42 |
1 files changed, 23 insertions, 19 deletions
diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c index 469ab0b7ce31..ef2133b16f8c 100644 --- a/drivers/net/r8169.c +++ b/drivers/net/r8169.c | |||
@@ -617,8 +617,9 @@ static void ocp_write(struct rtl8169_private *tp, u8 mask, u16 reg, u32 data) | |||
617 | } | 617 | } |
618 | } | 618 | } |
619 | 619 | ||
620 | static void rtl8168_oob_notify(void __iomem *ioaddr, u8 cmd) | 620 | static void rtl8168_oob_notify(struct rtl8169_private *tp, u8 cmd) |
621 | { | 621 | { |
622 | void __iomem *ioaddr = tp->mmio_addr; | ||
622 | int i; | 623 | int i; |
623 | 624 | ||
624 | RTL_W8(ERIDR, cmd); | 625 | RTL_W8(ERIDR, cmd); |
@@ -630,7 +631,7 @@ static void rtl8168_oob_notify(void __iomem *ioaddr, u8 cmd) | |||
630 | break; | 631 | break; |
631 | } | 632 | } |
632 | 633 | ||
633 | ocp_write(ioaddr, 0x1, 0x30, 0x00000001); | 634 | ocp_write(tp, 0x1, 0x30, 0x00000001); |
634 | } | 635 | } |
635 | 636 | ||
636 | #define OOB_CMD_RESET 0x00 | 637 | #define OOB_CMD_RESET 0x00 |
@@ -2868,8 +2869,11 @@ static void r8168_pll_power_down(struct rtl8169_private *tp) | |||
2868 | { | 2869 | { |
2869 | void __iomem *ioaddr = tp->mmio_addr; | 2870 | void __iomem *ioaddr = tp->mmio_addr; |
2870 | 2871 | ||
2871 | if (tp->mac_version == RTL_GIGA_MAC_VER_27) | 2872 | if (((tp->mac_version == RTL_GIGA_MAC_VER_27) || |
2873 | (tp->mac_version == RTL_GIGA_MAC_VER_28)) && | ||
2874 | (ocp_read(tp, 0x0f, 0x0010) & 0x00008000)) { | ||
2872 | return; | 2875 | return; |
2876 | } | ||
2873 | 2877 | ||
2874 | if (((tp->mac_version == RTL_GIGA_MAC_VER_23) || | 2878 | if (((tp->mac_version == RTL_GIGA_MAC_VER_23) || |
2875 | (tp->mac_version == RTL_GIGA_MAC_VER_24)) && | 2879 | (tp->mac_version == RTL_GIGA_MAC_VER_24)) && |
@@ -2891,6 +2895,8 @@ static void r8168_pll_power_down(struct rtl8169_private *tp) | |||
2891 | switch (tp->mac_version) { | 2895 | switch (tp->mac_version) { |
2892 | case RTL_GIGA_MAC_VER_25: | 2896 | case RTL_GIGA_MAC_VER_25: |
2893 | case RTL_GIGA_MAC_VER_26: | 2897 | case RTL_GIGA_MAC_VER_26: |
2898 | case RTL_GIGA_MAC_VER_27: | ||
2899 | case RTL_GIGA_MAC_VER_28: | ||
2894 | RTL_W8(PMCH, RTL_R8(PMCH) & ~0x80); | 2900 | RTL_W8(PMCH, RTL_R8(PMCH) & ~0x80); |
2895 | break; | 2901 | break; |
2896 | } | 2902 | } |
@@ -2900,12 +2906,17 @@ static void r8168_pll_power_up(struct rtl8169_private *tp) | |||
2900 | { | 2906 | { |
2901 | void __iomem *ioaddr = tp->mmio_addr; | 2907 | void __iomem *ioaddr = tp->mmio_addr; |
2902 | 2908 | ||
2903 | if (tp->mac_version == RTL_GIGA_MAC_VER_27) | 2909 | if (((tp->mac_version == RTL_GIGA_MAC_VER_27) || |
2910 | (tp->mac_version == RTL_GIGA_MAC_VER_28)) && | ||
2911 | (ocp_read(tp, 0x0f, 0x0010) & 0x00008000)) { | ||
2904 | return; | 2912 | return; |
2913 | } | ||
2905 | 2914 | ||
2906 | switch (tp->mac_version) { | 2915 | switch (tp->mac_version) { |
2907 | case RTL_GIGA_MAC_VER_25: | 2916 | case RTL_GIGA_MAC_VER_25: |
2908 | case RTL_GIGA_MAC_VER_26: | 2917 | case RTL_GIGA_MAC_VER_26: |
2918 | case RTL_GIGA_MAC_VER_27: | ||
2919 | case RTL_GIGA_MAC_VER_28: | ||
2909 | RTL_W8(PMCH, RTL_R8(PMCH) | 0x80); | 2920 | RTL_W8(PMCH, RTL_R8(PMCH) | 0x80); |
2910 | break; | 2921 | break; |
2911 | } | 2922 | } |
@@ -3042,7 +3053,7 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
3042 | goto err_out_mwi_2; | 3053 | goto err_out_mwi_2; |
3043 | } | 3054 | } |
3044 | 3055 | ||
3045 | tp->cp_cmd = PCIMulRW | RxChkSum; | 3056 | tp->cp_cmd = RxChkSum; |
3046 | 3057 | ||
3047 | if ((sizeof(dma_addr_t) > 4) && | 3058 | if ((sizeof(dma_addr_t) > 4) && |
3048 | !pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) && use_dac) { | 3059 | !pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) && use_dac) { |
@@ -3318,7 +3329,8 @@ static void rtl8169_hw_reset(struct rtl8169_private *tp) | |||
3318 | /* Disable interrupts */ | 3329 | /* Disable interrupts */ |
3319 | rtl8169_irq_mask_and_ack(ioaddr); | 3330 | rtl8169_irq_mask_and_ack(ioaddr); |
3320 | 3331 | ||
3321 | if (tp->mac_version == RTL_GIGA_MAC_VER_28) { | 3332 | if (tp->mac_version == RTL_GIGA_MAC_VER_27 || |
3333 | tp->mac_version == RTL_GIGA_MAC_VER_28) { | ||
3322 | while (RTL_R8(TxPoll) & NPQ) | 3334 | while (RTL_R8(TxPoll) & NPQ) |
3323 | udelay(20); | 3335 | udelay(20); |
3324 | 3336 | ||
@@ -3847,8 +3859,7 @@ static void rtl_hw_start_8168(struct net_device *dev) | |||
3847 | Cxpl_dbg_sel | \ | 3859 | Cxpl_dbg_sel | \ |
3848 | ASF | \ | 3860 | ASF | \ |
3849 | PktCntrDisable | \ | 3861 | PktCntrDisable | \ |
3850 | PCIDAC | \ | 3862 | Mac_dbgo_sel) |
3851 | PCIMulRW) | ||
3852 | 3863 | ||
3853 | static void rtl_hw_start_8102e_1(void __iomem *ioaddr, struct pci_dev *pdev) | 3864 | static void rtl_hw_start_8102e_1(void __iomem *ioaddr, struct pci_dev *pdev) |
3854 | { | 3865 | { |
@@ -3878,8 +3889,6 @@ static void rtl_hw_start_8102e_1(void __iomem *ioaddr, struct pci_dev *pdev) | |||
3878 | if ((cfg1 & LEDS0) && (cfg1 & LEDS1)) | 3889 | if ((cfg1 & LEDS0) && (cfg1 & LEDS1)) |
3879 | RTL_W8(Config1, cfg1 & ~LEDS0); | 3890 | RTL_W8(Config1, cfg1 & ~LEDS0); |
3880 | 3891 | ||
3881 | RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R810X_CPCMD_QUIRK_MASK); | ||
3882 | |||
3883 | rtl_ephy_init(ioaddr, e_info_8102e_1, ARRAY_SIZE(e_info_8102e_1)); | 3892 | rtl_ephy_init(ioaddr, e_info_8102e_1, ARRAY_SIZE(e_info_8102e_1)); |
3884 | } | 3893 | } |
3885 | 3894 | ||
@@ -3891,8 +3900,6 @@ static void rtl_hw_start_8102e_2(void __iomem *ioaddr, struct pci_dev *pdev) | |||
3891 | 3900 | ||
3892 | RTL_W8(Config1, MEMMAP | IOMAP | VPD | PMEnable); | 3901 | RTL_W8(Config1, MEMMAP | IOMAP | VPD | PMEnable); |
3893 | RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en); | 3902 | RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en); |
3894 | |||
3895 | RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R810X_CPCMD_QUIRK_MASK); | ||
3896 | } | 3903 | } |
3897 | 3904 | ||
3898 | static void rtl_hw_start_8102e_3(void __iomem *ioaddr, struct pci_dev *pdev) | 3905 | static void rtl_hw_start_8102e_3(void __iomem *ioaddr, struct pci_dev *pdev) |
@@ -3918,6 +3925,8 @@ static void rtl_hw_start_8101(struct net_device *dev) | |||
3918 | } | 3925 | } |
3919 | } | 3926 | } |
3920 | 3927 | ||
3928 | RTL_W8(Cfg9346, Cfg9346_Unlock); | ||
3929 | |||
3921 | switch (tp->mac_version) { | 3930 | switch (tp->mac_version) { |
3922 | case RTL_GIGA_MAC_VER_07: | 3931 | case RTL_GIGA_MAC_VER_07: |
3923 | rtl_hw_start_8102e_1(ioaddr, pdev); | 3932 | rtl_hw_start_8102e_1(ioaddr, pdev); |
@@ -3932,14 +3941,13 @@ static void rtl_hw_start_8101(struct net_device *dev) | |||
3932 | break; | 3941 | break; |
3933 | } | 3942 | } |
3934 | 3943 | ||
3935 | RTL_W8(Cfg9346, Cfg9346_Unlock); | 3944 | RTL_W8(Cfg9346, Cfg9346_Lock); |
3936 | 3945 | ||
3937 | RTL_W8(MaxTxPacketSize, TxPacketMax); | 3946 | RTL_W8(MaxTxPacketSize, TxPacketMax); |
3938 | 3947 | ||
3939 | rtl_set_rx_max_size(ioaddr, rx_buf_sz); | 3948 | rtl_set_rx_max_size(ioaddr, rx_buf_sz); |
3940 | 3949 | ||
3941 | tp->cp_cmd |= rtl_rw_cpluscmd(ioaddr) | PCIMulRW; | 3950 | tp->cp_cmd &= ~R810X_CPCMD_QUIRK_MASK; |
3942 | |||
3943 | RTL_W16(CPlusCmd, tp->cp_cmd); | 3951 | RTL_W16(CPlusCmd, tp->cp_cmd); |
3944 | 3952 | ||
3945 | RTL_W16(IntrMitigate, 0x0000); | 3953 | RTL_W16(IntrMitigate, 0x0000); |
@@ -3949,14 +3957,10 @@ static void rtl_hw_start_8101(struct net_device *dev) | |||
3949 | RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb); | 3957 | RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb); |
3950 | rtl_set_rx_tx_config_registers(tp); | 3958 | rtl_set_rx_tx_config_registers(tp); |
3951 | 3959 | ||
3952 | RTL_W8(Cfg9346, Cfg9346_Lock); | ||
3953 | |||
3954 | RTL_R8(IntrMask); | 3960 | RTL_R8(IntrMask); |
3955 | 3961 | ||
3956 | rtl_set_rx_mode(dev); | 3962 | rtl_set_rx_mode(dev); |
3957 | 3963 | ||
3958 | RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb); | ||
3959 | |||
3960 | RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xf000); | 3964 | RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xf000); |
3961 | 3965 | ||
3962 | RTL_W16(IntrMask, tp->intr_event); | 3966 | RTL_W16(IntrMask, tp->intr_event); |