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path: root/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
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Diffstat (limited to 'drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c')
-rw-r--r--drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c79
1 files changed, 32 insertions, 47 deletions
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
index ffeaaa95ed96..b69f8762b339 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
@@ -117,10 +117,6 @@ static int dropless_fc;
117module_param(dropless_fc, int, 0); 117module_param(dropless_fc, int, 0);
118MODULE_PARM_DESC(dropless_fc, " Pause on exhausted host ring"); 118MODULE_PARM_DESC(dropless_fc, " Pause on exhausted host ring");
119 119
120static int poll;
121module_param(poll, int, 0);
122MODULE_PARM_DESC(poll, " Use polling (for debug)");
123
124static int mrrs = -1; 120static int mrrs = -1;
125module_param(mrrs, int, 0); 121module_param(mrrs, int, 0);
126MODULE_PARM_DESC(mrrs, " Force Max Read Req Size (0..3) (for debug)"); 122MODULE_PARM_DESC(mrrs, " Force Max Read Req Size (0..3) (for debug)");
@@ -941,7 +937,7 @@ void bnx2x_panic_dump(struct bnx2x *bp)
941 struct sw_rx_bd *sw_bd = &fp->rx_buf_ring[j]; 937 struct sw_rx_bd *sw_bd = &fp->rx_buf_ring[j];
942 938
943 BNX2X_ERR("fp%d: rx_bd[%x]=[%x:%x] sw_bd=[%p]\n", 939 BNX2X_ERR("fp%d: rx_bd[%x]=[%x:%x] sw_bd=[%p]\n",
944 i, j, rx_bd[1], rx_bd[0], sw_bd->skb); 940 i, j, rx_bd[1], rx_bd[0], sw_bd->data);
945 } 941 }
946 942
947 start = RX_SGE(fp->rx_sge_prod); 943 start = RX_SGE(fp->rx_sge_prod);
@@ -4834,20 +4830,11 @@ void bnx2x_drv_pulse(struct bnx2x *bp)
4834 4830
4835static void bnx2x_timer(unsigned long data) 4831static void bnx2x_timer(unsigned long data)
4836{ 4832{
4837 u8 cos;
4838 struct bnx2x *bp = (struct bnx2x *) data; 4833 struct bnx2x *bp = (struct bnx2x *) data;
4839 4834
4840 if (!netif_running(bp->dev)) 4835 if (!netif_running(bp->dev))
4841 return; 4836 return;
4842 4837
4843 if (poll) {
4844 struct bnx2x_fastpath *fp = &bp->fp[0];
4845
4846 for_each_cos_in_tx_queue(fp, cos)
4847 bnx2x_tx_int(bp, &fp->txdata[cos]);
4848 bnx2x_rx_int(fp, 1000);
4849 }
4850
4851 if (!BP_NOMCP(bp)) { 4838 if (!BP_NOMCP(bp)) {
4852 int mb_idx = BP_FW_MB_IDX(bp); 4839 int mb_idx = BP_FW_MB_IDX(bp);
4853 u32 drv_pulse; 4840 u32 drv_pulse;
@@ -10063,7 +10050,6 @@ static void __devinit bnx2x_set_modes_bitmap(struct bnx2x *bp)
10063static int __devinit bnx2x_init_bp(struct bnx2x *bp) 10050static int __devinit bnx2x_init_bp(struct bnx2x *bp)
10064{ 10051{
10065 int func; 10052 int func;
10066 int timer_interval;
10067 int rc; 10053 int rc;
10068 10054
10069 mutex_init(&bp->port.phy_mutex); 10055 mutex_init(&bp->port.phy_mutex);
@@ -10139,8 +10125,7 @@ static int __devinit bnx2x_init_bp(struct bnx2x *bp)
10139 bp->tx_ticks = (50 / BNX2X_BTR) * BNX2X_BTR; 10125 bp->tx_ticks = (50 / BNX2X_BTR) * BNX2X_BTR;
10140 bp->rx_ticks = (25 / BNX2X_BTR) * BNX2X_BTR; 10126 bp->rx_ticks = (25 / BNX2X_BTR) * BNX2X_BTR;
10141 10127
10142 timer_interval = (CHIP_REV_IS_SLOW(bp) ? 5*HZ : HZ); 10128 bp->current_interval = CHIP_REV_IS_SLOW(bp) ? 5*HZ : HZ;
10143 bp->current_interval = (poll ? poll : timer_interval);
10144 10129
10145 init_timer(&bp->timer); 10130 init_timer(&bp->timer);
10146 bp->timer.expires = jiffies + bp->current_interval; 10131 bp->timer.expires = jiffies + bp->current_interval;
@@ -10536,6 +10521,9 @@ static int __devinit bnx2x_init_dev(struct pci_dev *pdev,
10536{ 10521{
10537 struct bnx2x *bp; 10522 struct bnx2x *bp;
10538 int rc; 10523 int rc;
10524 bool chip_is_e1x = (board_type == BCM57710 ||
10525 board_type == BCM57711 ||
10526 board_type == BCM57711E);
10539 10527
10540 SET_NETDEV_DEV(dev, &pdev->dev); 10528 SET_NETDEV_DEV(dev, &pdev->dev);
10541 bp = netdev_priv(dev); 10529 bp = netdev_priv(dev);
@@ -10624,7 +10612,7 @@ static int __devinit bnx2x_init_dev(struct pci_dev *pdev,
10624 REG_WR(bp, PXP2_REG_PGL_ADDR_90_F0, 0); 10612 REG_WR(bp, PXP2_REG_PGL_ADDR_90_F0, 0);
10625 REG_WR(bp, PXP2_REG_PGL_ADDR_94_F0, 0); 10613 REG_WR(bp, PXP2_REG_PGL_ADDR_94_F0, 0);
10626 10614
10627 if (CHIP_IS_E1x(bp)) { 10615 if (chip_is_e1x) {
10628 REG_WR(bp, PXP2_REG_PGL_ADDR_88_F1, 0); 10616 REG_WR(bp, PXP2_REG_PGL_ADDR_88_F1, 0);
10629 REG_WR(bp, PXP2_REG_PGL_ADDR_8C_F1, 0); 10617 REG_WR(bp, PXP2_REG_PGL_ADDR_8C_F1, 0);
10630 REG_WR(bp, PXP2_REG_PGL_ADDR_90_F1, 0); 10618 REG_WR(bp, PXP2_REG_PGL_ADDR_90_F1, 0);
@@ -10635,9 +10623,7 @@ static int __devinit bnx2x_init_dev(struct pci_dev *pdev,
10635 * Enable internal target-read (in case we are probed after PF FLR). 10623 * Enable internal target-read (in case we are probed after PF FLR).
10636 * Must be done prior to any BAR read access. Only for 57712 and up 10624 * Must be done prior to any BAR read access. Only for 57712 and up
10637 */ 10625 */
10638 if (board_type != BCM57710 && 10626 if (!chip_is_e1x)
10639 board_type != BCM57711 &&
10640 board_type != BCM57711E)
10641 REG_WR(bp, PGLUE_B_REG_INTERNAL_PFID_ENABLE_TARGET_READ, 1); 10627 REG_WR(bp, PGLUE_B_REG_INTERNAL_PFID_ENABLE_TARGET_READ, 1);
10642 10628
10643 /* Reset the load counter */ 10629 /* Reset the load counter */
@@ -10838,38 +10824,36 @@ do { \
10838 10824
10839int bnx2x_init_firmware(struct bnx2x *bp) 10825int bnx2x_init_firmware(struct bnx2x *bp)
10840{ 10826{
10827 const char *fw_file_name;
10841 struct bnx2x_fw_file_hdr *fw_hdr; 10828 struct bnx2x_fw_file_hdr *fw_hdr;
10842 int rc; 10829 int rc;
10843 10830
10831 if (bp->firmware)
10832 return 0;
10844 10833
10845 if (!bp->firmware) { 10834 if (CHIP_IS_E1(bp))
10846 const char *fw_file_name; 10835 fw_file_name = FW_FILE_NAME_E1;
10847 10836 else if (CHIP_IS_E1H(bp))
10848 if (CHIP_IS_E1(bp)) 10837 fw_file_name = FW_FILE_NAME_E1H;
10849 fw_file_name = FW_FILE_NAME_E1; 10838 else if (!CHIP_IS_E1x(bp))
10850 else if (CHIP_IS_E1H(bp)) 10839 fw_file_name = FW_FILE_NAME_E2;
10851 fw_file_name = FW_FILE_NAME_E1H; 10840 else {
10852 else if (!CHIP_IS_E1x(bp)) 10841 BNX2X_ERR("Unsupported chip revision\n");
10853 fw_file_name = FW_FILE_NAME_E2; 10842 return -EINVAL;
10854 else { 10843 }
10855 BNX2X_ERR("Unsupported chip revision\n"); 10844 BNX2X_DEV_INFO("Loading %s\n", fw_file_name);
10856 return -EINVAL;
10857 }
10858 BNX2X_DEV_INFO("Loading %s\n", fw_file_name);
10859 10845
10860 rc = request_firmware(&bp->firmware, fw_file_name, 10846 rc = request_firmware(&bp->firmware, fw_file_name, &bp->pdev->dev);
10861 &bp->pdev->dev); 10847 if (rc) {
10862 if (rc) { 10848 BNX2X_ERR("Can't load firmware file %s\n",
10863 BNX2X_ERR("Can't load firmware file %s\n", 10849 fw_file_name);
10864 fw_file_name); 10850 goto request_firmware_exit;
10865 goto request_firmware_exit; 10851 }
10866 }
10867 10852
10868 rc = bnx2x_check_firmware(bp); 10853 rc = bnx2x_check_firmware(bp);
10869 if (rc) { 10854 if (rc) {
10870 BNX2X_ERR("Corrupt firmware file %s\n", fw_file_name); 10855 BNX2X_ERR("Corrupt firmware file %s\n", fw_file_name);
10871 goto request_firmware_exit; 10856 goto request_firmware_exit;
10872 }
10873 } 10857 }
10874 10858
10875 fw_hdr = (struct bnx2x_fw_file_hdr *)bp->firmware->data; 10859 fw_hdr = (struct bnx2x_fw_file_hdr *)bp->firmware->data;
@@ -10915,6 +10899,7 @@ init_ops_alloc_err:
10915 kfree(bp->init_data); 10899 kfree(bp->init_data);
10916request_firmware_exit: 10900request_firmware_exit:
10917 release_firmware(bp->firmware); 10901 release_firmware(bp->firmware);
10902 bp->firmware = NULL;
10918 10903
10919 return rc; 10904 return rc;
10920} 10905}