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path: root/drivers/net/can/sja1000/sja1000.c
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Diffstat (limited to 'drivers/net/can/sja1000/sja1000.c')
-rw-r--r--drivers/net/can/sja1000/sja1000.c126
1 files changed, 64 insertions, 62 deletions
diff --git a/drivers/net/can/sja1000/sja1000.c b/drivers/net/can/sja1000/sja1000.c
index e4df307eaa90..7164a999f50f 100644
--- a/drivers/net/can/sja1000/sja1000.c
+++ b/drivers/net/can/sja1000/sja1000.c
@@ -91,14 +91,14 @@ static void sja1000_write_cmdreg(struct sja1000_priv *priv, u8 val)
91 * the write_reg() operation - especially on SMP systems. 91 * the write_reg() operation - especially on SMP systems.
92 */ 92 */
93 spin_lock_irqsave(&priv->cmdreg_lock, flags); 93 spin_lock_irqsave(&priv->cmdreg_lock, flags);
94 priv->write_reg(priv, REG_CMR, val); 94 priv->write_reg(priv, SJA1000_CMR, val);
95 priv->read_reg(priv, SJA1000_REG_SR); 95 priv->read_reg(priv, SJA1000_SR);
96 spin_unlock_irqrestore(&priv->cmdreg_lock, flags); 96 spin_unlock_irqrestore(&priv->cmdreg_lock, flags);
97} 97}
98 98
99static int sja1000_is_absent(struct sja1000_priv *priv) 99static int sja1000_is_absent(struct sja1000_priv *priv)
100{ 100{
101 return (priv->read_reg(priv, REG_MOD) == 0xFF); 101 return (priv->read_reg(priv, SJA1000_MOD) == 0xFF);
102} 102}
103 103
104static int sja1000_probe_chip(struct net_device *dev) 104static int sja1000_probe_chip(struct net_device *dev)
@@ -116,11 +116,11 @@ static int sja1000_probe_chip(struct net_device *dev)
116static void set_reset_mode(struct net_device *dev) 116static void set_reset_mode(struct net_device *dev)
117{ 117{
118 struct sja1000_priv *priv = netdev_priv(dev); 118 struct sja1000_priv *priv = netdev_priv(dev);
119 unsigned char status = priv->read_reg(priv, REG_MOD); 119 unsigned char status = priv->read_reg(priv, SJA1000_MOD);
120 int i; 120 int i;
121 121
122 /* disable interrupts */ 122 /* disable interrupts */
123 priv->write_reg(priv, REG_IER, IRQ_OFF); 123 priv->write_reg(priv, SJA1000_IER, IRQ_OFF);
124 124
125 for (i = 0; i < 100; i++) { 125 for (i = 0; i < 100; i++) {
126 /* check reset bit */ 126 /* check reset bit */
@@ -129,9 +129,10 @@ static void set_reset_mode(struct net_device *dev)
129 return; 129 return;
130 } 130 }
131 131
132 priv->write_reg(priv, REG_MOD, MOD_RM); /* reset chip */ 132 /* reset chip */
133 priv->write_reg(priv, SJA1000_MOD, MOD_RM);
133 udelay(10); 134 udelay(10);
134 status = priv->read_reg(priv, REG_MOD); 135 status = priv->read_reg(priv, SJA1000_MOD);
135 } 136 }
136 137
137 netdev_err(dev, "setting SJA1000 into reset mode failed!\n"); 138 netdev_err(dev, "setting SJA1000 into reset mode failed!\n");
@@ -140,7 +141,7 @@ static void set_reset_mode(struct net_device *dev)
140static void set_normal_mode(struct net_device *dev) 141static void set_normal_mode(struct net_device *dev)
141{ 142{
142 struct sja1000_priv *priv = netdev_priv(dev); 143 struct sja1000_priv *priv = netdev_priv(dev);
143 unsigned char status = priv->read_reg(priv, REG_MOD); 144 unsigned char status = priv->read_reg(priv, SJA1000_MOD);
144 int i; 145 int i;
145 146
146 for (i = 0; i < 100; i++) { 147 for (i = 0; i < 100; i++) {
@@ -149,22 +150,22 @@ static void set_normal_mode(struct net_device *dev)
149 priv->can.state = CAN_STATE_ERROR_ACTIVE; 150 priv->can.state = CAN_STATE_ERROR_ACTIVE;
150 /* enable interrupts */ 151 /* enable interrupts */
151 if (priv->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING) 152 if (priv->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING)
152 priv->write_reg(priv, REG_IER, IRQ_ALL); 153 priv->write_reg(priv, SJA1000_IER, IRQ_ALL);
153 else 154 else
154 priv->write_reg(priv, REG_IER, 155 priv->write_reg(priv, SJA1000_IER,
155 IRQ_ALL & ~IRQ_BEI); 156 IRQ_ALL & ~IRQ_BEI);
156 return; 157 return;
157 } 158 }
158 159
159 /* set chip to normal mode */ 160 /* set chip to normal mode */
160 if (priv->can.ctrlmode & CAN_CTRLMODE_LISTENONLY) 161 if (priv->can.ctrlmode & CAN_CTRLMODE_LISTENONLY)
161 priv->write_reg(priv, REG_MOD, MOD_LOM); 162 priv->write_reg(priv, SJA1000_MOD, MOD_LOM);
162 else 163 else
163 priv->write_reg(priv, REG_MOD, 0x00); 164 priv->write_reg(priv, SJA1000_MOD, 0x00);
164 165
165 udelay(10); 166 udelay(10);
166 167
167 status = priv->read_reg(priv, REG_MOD); 168 status = priv->read_reg(priv, SJA1000_MOD);
168 } 169 }
169 170
170 netdev_err(dev, "setting SJA1000 into normal mode failed!\n"); 171 netdev_err(dev, "setting SJA1000 into normal mode failed!\n");
@@ -179,9 +180,9 @@ static void sja1000_start(struct net_device *dev)
179 set_reset_mode(dev); 180 set_reset_mode(dev);
180 181
181 /* Clear error counters and error code capture */ 182 /* Clear error counters and error code capture */
182 priv->write_reg(priv, REG_TXERR, 0x0); 183 priv->write_reg(priv, SJA1000_TXERR, 0x0);
183 priv->write_reg(priv, REG_RXERR, 0x0); 184 priv->write_reg(priv, SJA1000_RXERR, 0x0);
184 priv->read_reg(priv, REG_ECC); 185 priv->read_reg(priv, SJA1000_ECC);
185 186
186 /* leave reset mode */ 187 /* leave reset mode */
187 set_normal_mode(dev); 188 set_normal_mode(dev);
@@ -217,8 +218,8 @@ static int sja1000_set_bittiming(struct net_device *dev)
217 218
218 netdev_info(dev, "setting BTR0=0x%02x BTR1=0x%02x\n", btr0, btr1); 219 netdev_info(dev, "setting BTR0=0x%02x BTR1=0x%02x\n", btr0, btr1);
219 220
220 priv->write_reg(priv, REG_BTR0, btr0); 221 priv->write_reg(priv, SJA1000_BTR0, btr0);
221 priv->write_reg(priv, REG_BTR1, btr1); 222 priv->write_reg(priv, SJA1000_BTR1, btr1);
222 223
223 return 0; 224 return 0;
224} 225}
@@ -228,8 +229,8 @@ static int sja1000_get_berr_counter(const struct net_device *dev,
228{ 229{
229 struct sja1000_priv *priv = netdev_priv(dev); 230 struct sja1000_priv *priv = netdev_priv(dev);
230 231
231 bec->txerr = priv->read_reg(priv, REG_TXERR); 232 bec->txerr = priv->read_reg(priv, SJA1000_TXERR);
232 bec->rxerr = priv->read_reg(priv, REG_RXERR); 233 bec->rxerr = priv->read_reg(priv, SJA1000_RXERR);
233 234
234 return 0; 235 return 0;
235} 236}
@@ -247,20 +248,20 @@ static void chipset_init(struct net_device *dev)
247 struct sja1000_priv *priv = netdev_priv(dev); 248 struct sja1000_priv *priv = netdev_priv(dev);
248 249
249 /* set clock divider and output control register */ 250 /* set clock divider and output control register */
250 priv->write_reg(priv, REG_CDR, priv->cdr | CDR_PELICAN); 251 priv->write_reg(priv, SJA1000_CDR, priv->cdr | CDR_PELICAN);
251 252
252 /* set acceptance filter (accept all) */ 253 /* set acceptance filter (accept all) */
253 priv->write_reg(priv, REG_ACCC0, 0x00); 254 priv->write_reg(priv, SJA1000_ACCC0, 0x00);
254 priv->write_reg(priv, REG_ACCC1, 0x00); 255 priv->write_reg(priv, SJA1000_ACCC1, 0x00);
255 priv->write_reg(priv, REG_ACCC2, 0x00); 256 priv->write_reg(priv, SJA1000_ACCC2, 0x00);
256 priv->write_reg(priv, REG_ACCC3, 0x00); 257 priv->write_reg(priv, SJA1000_ACCC3, 0x00);
257 258
258 priv->write_reg(priv, REG_ACCM0, 0xFF); 259 priv->write_reg(priv, SJA1000_ACCM0, 0xFF);
259 priv->write_reg(priv, REG_ACCM1, 0xFF); 260 priv->write_reg(priv, SJA1000_ACCM1, 0xFF);
260 priv->write_reg(priv, REG_ACCM2, 0xFF); 261 priv->write_reg(priv, SJA1000_ACCM2, 0xFF);
261 priv->write_reg(priv, REG_ACCM3, 0xFF); 262 priv->write_reg(priv, SJA1000_ACCM3, 0xFF);
262 263
263 priv->write_reg(priv, REG_OCR, priv->ocr | OCR_MODE_NORMAL); 264 priv->write_reg(priv, SJA1000_OCR, priv->ocr | OCR_MODE_NORMAL);
264} 265}
265 266
266/* 267/*
@@ -289,21 +290,21 @@ static netdev_tx_t sja1000_start_xmit(struct sk_buff *skb,
289 id = cf->can_id; 290 id = cf->can_id;
290 291
291 if (id & CAN_RTR_FLAG) 292 if (id & CAN_RTR_FLAG)
292 fi |= FI_RTR; 293 fi |= SJA1000_FI_RTR;
293 294
294 if (id & CAN_EFF_FLAG) { 295 if (id & CAN_EFF_FLAG) {
295 fi |= FI_FF; 296 fi |= SJA1000_FI_FF;
296 dreg = EFF_BUF; 297 dreg = SJA1000_EFF_BUF;
297 priv->write_reg(priv, REG_FI, fi); 298 priv->write_reg(priv, SJA1000_FI, fi);
298 priv->write_reg(priv, REG_ID1, (id & 0x1fe00000) >> (5 + 16)); 299 priv->write_reg(priv, SJA1000_ID1, (id & 0x1fe00000) >> 21);
299 priv->write_reg(priv, REG_ID2, (id & 0x001fe000) >> (5 + 8)); 300 priv->write_reg(priv, SJA1000_ID2, (id & 0x001fe000) >> 13);
300 priv->write_reg(priv, REG_ID3, (id & 0x00001fe0) >> 5); 301 priv->write_reg(priv, SJA1000_ID3, (id & 0x00001fe0) >> 5);
301 priv->write_reg(priv, REG_ID4, (id & 0x0000001f) << 3); 302 priv->write_reg(priv, SJA1000_ID4, (id & 0x0000001f) << 3);
302 } else { 303 } else {
303 dreg = SFF_BUF; 304 dreg = SJA1000_SFF_BUF;
304 priv->write_reg(priv, REG_FI, fi); 305 priv->write_reg(priv, SJA1000_FI, fi);
305 priv->write_reg(priv, REG_ID1, (id & 0x000007f8) >> 3); 306 priv->write_reg(priv, SJA1000_ID1, (id & 0x000007f8) >> 3);
306 priv->write_reg(priv, REG_ID2, (id & 0x00000007) << 5); 307 priv->write_reg(priv, SJA1000_ID2, (id & 0x00000007) << 5);
307 } 308 }
308 309
309 for (i = 0; i < dlc; i++) 310 for (i = 0; i < dlc; i++)
@@ -335,25 +336,25 @@ static void sja1000_rx(struct net_device *dev)
335 if (skb == NULL) 336 if (skb == NULL)
336 return; 337 return;
337 338
338 fi = priv->read_reg(priv, REG_FI); 339 fi = priv->read_reg(priv, SJA1000_FI);
339 340
340 if (fi & FI_FF) { 341 if (fi & SJA1000_FI_FF) {
341 /* extended frame format (EFF) */ 342 /* extended frame format (EFF) */
342 dreg = EFF_BUF; 343 dreg = SJA1000_EFF_BUF;
343 id = (priv->read_reg(priv, REG_ID1) << (5 + 16)) 344 id = (priv->read_reg(priv, SJA1000_ID1) << 21)
344 | (priv->read_reg(priv, REG_ID2) << (5 + 8)) 345 | (priv->read_reg(priv, SJA1000_ID2) << 13)
345 | (priv->read_reg(priv, REG_ID3) << 5) 346 | (priv->read_reg(priv, SJA1000_ID3) << 5)
346 | (priv->read_reg(priv, REG_ID4) >> 3); 347 | (priv->read_reg(priv, SJA1000_ID4) >> 3);
347 id |= CAN_EFF_FLAG; 348 id |= CAN_EFF_FLAG;
348 } else { 349 } else {
349 /* standard frame format (SFF) */ 350 /* standard frame format (SFF) */
350 dreg = SFF_BUF; 351 dreg = SJA1000_SFF_BUF;
351 id = (priv->read_reg(priv, REG_ID1) << 3) 352 id = (priv->read_reg(priv, SJA1000_ID1) << 3)
352 | (priv->read_reg(priv, REG_ID2) >> 5); 353 | (priv->read_reg(priv, SJA1000_ID2) >> 5);
353 } 354 }
354 355
355 cf->can_dlc = get_can_dlc(fi & 0x0F); 356 cf->can_dlc = get_can_dlc(fi & 0x0F);
356 if (fi & FI_RTR) { 357 if (fi & SJA1000_FI_RTR) {
357 id |= CAN_RTR_FLAG; 358 id |= CAN_RTR_FLAG;
358 } else { 359 } else {
359 for (i = 0; i < cf->can_dlc; i++) 360 for (i = 0; i < cf->can_dlc; i++)
@@ -414,7 +415,7 @@ static int sja1000_err(struct net_device *dev, uint8_t isrc, uint8_t status)
414 priv->can.can_stats.bus_error++; 415 priv->can.can_stats.bus_error++;
415 stats->rx_errors++; 416 stats->rx_errors++;
416 417
417 ecc = priv->read_reg(priv, REG_ECC); 418 ecc = priv->read_reg(priv, SJA1000_ECC);
418 419
419 cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR; 420 cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;
420 421
@@ -448,7 +449,7 @@ static int sja1000_err(struct net_device *dev, uint8_t isrc, uint8_t status)
448 if (isrc & IRQ_ALI) { 449 if (isrc & IRQ_ALI) {
449 /* arbitration lost interrupt */ 450 /* arbitration lost interrupt */
450 netdev_dbg(dev, "arbitration lost interrupt\n"); 451 netdev_dbg(dev, "arbitration lost interrupt\n");
451 alc = priv->read_reg(priv, REG_ALC); 452 alc = priv->read_reg(priv, SJA1000_ALC);
452 priv->can.can_stats.arbitration_lost++; 453 priv->can.can_stats.arbitration_lost++;
453 stats->tx_errors++; 454 stats->tx_errors++;
454 cf->can_id |= CAN_ERR_LOSTARB; 455 cf->can_id |= CAN_ERR_LOSTARB;
@@ -457,8 +458,8 @@ static int sja1000_err(struct net_device *dev, uint8_t isrc, uint8_t status)
457 458
458 if (state != priv->can.state && (state == CAN_STATE_ERROR_WARNING || 459 if (state != priv->can.state && (state == CAN_STATE_ERROR_WARNING ||
459 state == CAN_STATE_ERROR_PASSIVE)) { 460 state == CAN_STATE_ERROR_PASSIVE)) {
460 uint8_t rxerr = priv->read_reg(priv, REG_RXERR); 461 uint8_t rxerr = priv->read_reg(priv, SJA1000_RXERR);
461 uint8_t txerr = priv->read_reg(priv, REG_TXERR); 462 uint8_t txerr = priv->read_reg(priv, SJA1000_TXERR);
462 cf->can_id |= CAN_ERR_CRTL; 463 cf->can_id |= CAN_ERR_CRTL;
463 if (state == CAN_STATE_ERROR_WARNING) { 464 if (state == CAN_STATE_ERROR_WARNING) {
464 priv->can.can_stats.error_warning++; 465 priv->can.can_stats.error_warning++;
@@ -494,15 +495,16 @@ irqreturn_t sja1000_interrupt(int irq, void *dev_id)
494 int n = 0; 495 int n = 0;
495 496
496 /* Shared interrupts and IRQ off? */ 497 /* Shared interrupts and IRQ off? */
497 if (priv->read_reg(priv, REG_IER) == IRQ_OFF) 498 if (priv->read_reg(priv, SJA1000_IER) == IRQ_OFF)
498 return IRQ_NONE; 499 return IRQ_NONE;
499 500
500 if (priv->pre_irq) 501 if (priv->pre_irq)
501 priv->pre_irq(priv); 502 priv->pre_irq(priv);
502 503
503 while ((isrc = priv->read_reg(priv, REG_IR)) && (n < SJA1000_MAX_IRQ)) { 504 while ((isrc = priv->read_reg(priv, SJA1000_IR)) &&
505 (n < SJA1000_MAX_IRQ)) {
504 n++; 506 n++;
505 status = priv->read_reg(priv, SJA1000_REG_SR); 507 status = priv->read_reg(priv, SJA1000_SR);
506 /* check for absent controller due to hw unplug */ 508 /* check for absent controller due to hw unplug */
507 if (status == 0xFF && sja1000_is_absent(priv)) 509 if (status == 0xFF && sja1000_is_absent(priv))
508 return IRQ_NONE; 510 return IRQ_NONE;
@@ -519,7 +521,7 @@ irqreturn_t sja1000_interrupt(int irq, void *dev_id)
519 } else { 521 } else {
520 /* transmission complete */ 522 /* transmission complete */
521 stats->tx_bytes += 523 stats->tx_bytes +=
522 priv->read_reg(priv, REG_FI) & 0xf; 524 priv->read_reg(priv, SJA1000_FI) & 0xf;
523 stats->tx_packets++; 525 stats->tx_packets++;
524 can_get_echo_skb(dev, 0); 526 can_get_echo_skb(dev, 0);
525 } 527 }
@@ -530,7 +532,7 @@ irqreturn_t sja1000_interrupt(int irq, void *dev_id)
530 /* receive interrupt */ 532 /* receive interrupt */
531 while (status & SR_RBS) { 533 while (status & SR_RBS) {
532 sja1000_rx(dev); 534 sja1000_rx(dev);
533 status = priv->read_reg(priv, SJA1000_REG_SR); 535 status = priv->read_reg(priv, SJA1000_SR);
534 /* check for absent controller */ 536 /* check for absent controller */
535 if (status == 0xFF && sja1000_is_absent(priv)) 537 if (status == 0xFF && sja1000_is_absent(priv))
536 return IRQ_NONE; 538 return IRQ_NONE;