diff options
Diffstat (limited to 'drivers/mmc/host/sdhci.c')
-rw-r--r-- | drivers/mmc/host/sdhci.c | 33 |
1 files changed, 18 insertions, 15 deletions
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index fa3301644b15..cc63f5ed2310 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c | |||
@@ -1346,27 +1346,30 @@ static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) | |||
1346 | sdhci_set_clock(host, clock); | 1346 | sdhci_set_clock(host, clock); |
1347 | } | 1347 | } |
1348 | 1348 | ||
1349 | ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); | ||
1350 | |||
1351 | /* Select Bus Speed Mode for host */ | ||
1352 | ctrl_2 &= ~SDHCI_CTRL_UHS_MASK; | ||
1353 | if (ios->timing == MMC_TIMING_UHS_SDR12) | ||
1354 | ctrl_2 |= SDHCI_CTRL_UHS_SDR12; | ||
1355 | else if (ios->timing == MMC_TIMING_UHS_SDR25) | ||
1356 | ctrl_2 |= SDHCI_CTRL_UHS_SDR25; | ||
1357 | else if (ios->timing == MMC_TIMING_UHS_SDR50) | ||
1358 | ctrl_2 |= SDHCI_CTRL_UHS_SDR50; | ||
1359 | else if (ios->timing == MMC_TIMING_UHS_SDR104) | ||
1360 | ctrl_2 |= SDHCI_CTRL_UHS_SDR104; | ||
1361 | else if (ios->timing == MMC_TIMING_UHS_DDR50) | ||
1362 | ctrl_2 |= SDHCI_CTRL_UHS_DDR50; | ||
1363 | 1349 | ||
1364 | /* Reset SD Clock Enable */ | 1350 | /* Reset SD Clock Enable */ |
1365 | clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); | 1351 | clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); |
1366 | clk &= ~SDHCI_CLOCK_CARD_EN; | 1352 | clk &= ~SDHCI_CLOCK_CARD_EN; |
1367 | sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); | 1353 | sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); |
1368 | 1354 | ||
1369 | sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); | 1355 | if (host->ops->set_uhs_signaling) |
1356 | host->ops->set_uhs_signaling(host, ios->timing); | ||
1357 | else { | ||
1358 | ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); | ||
1359 | /* Select Bus Speed Mode for host */ | ||
1360 | ctrl_2 &= ~SDHCI_CTRL_UHS_MASK; | ||
1361 | if (ios->timing == MMC_TIMING_UHS_SDR12) | ||
1362 | ctrl_2 |= SDHCI_CTRL_UHS_SDR12; | ||
1363 | else if (ios->timing == MMC_TIMING_UHS_SDR25) | ||
1364 | ctrl_2 |= SDHCI_CTRL_UHS_SDR25; | ||
1365 | else if (ios->timing == MMC_TIMING_UHS_SDR50) | ||
1366 | ctrl_2 |= SDHCI_CTRL_UHS_SDR50; | ||
1367 | else if (ios->timing == MMC_TIMING_UHS_SDR104) | ||
1368 | ctrl_2 |= SDHCI_CTRL_UHS_SDR104; | ||
1369 | else if (ios->timing == MMC_TIMING_UHS_DDR50) | ||
1370 | ctrl_2 |= SDHCI_CTRL_UHS_DDR50; | ||
1371 | sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); | ||
1372 | } | ||
1370 | 1373 | ||
1371 | /* Re-enable SD Clock */ | 1374 | /* Re-enable SD Clock */ |
1372 | clock = host->clock; | 1375 | clock = host->clock; |