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Diffstat (limited to 'drivers/media/video/gspca/stv06xx/stv06xx_vv6410.h')
-rw-r--r--drivers/media/video/gspca/stv06xx/stv06xx_vv6410.h20
1 files changed, 10 insertions, 10 deletions
diff --git a/drivers/media/video/gspca/stv06xx/stv06xx_vv6410.h b/drivers/media/video/gspca/stv06xx/stv06xx_vv6410.h
index f75c3364a376..a25b8873f2e6 100644
--- a/drivers/media/video/gspca/stv06xx/stv06xx_vv6410.h
+++ b/drivers/media/video/gspca/stv06xx/stv06xx_vv6410.h
@@ -236,24 +236,24 @@ static const struct stv_init stv_bridge_init[] = {
236 236
237static const u8 vv6410_sensor_init[][2] = { 237static const u8 vv6410_sensor_init[][2] = {
238 /* Setup registers */ 238 /* Setup registers */
239 {VV6410_SETUP0, VV6410_SOFT_RESET}, 239 {VV6410_SETUP0, VV6410_SOFT_RESET},
240 {VV6410_SETUP0, VV6410_LOW_POWER_MODE}, 240 {VV6410_SETUP0, VV6410_LOW_POWER_MODE},
241 /* Use shuffled read-out mode */ 241 /* Use shuffled read-out mode */
242 {VV6410_SETUP1, BIT(6)}, 242 {VV6410_SETUP1, BIT(6)},
243 /* All modes to 1, FST, Fast QCK, Free running QCK, Free running LST, FST will qualify visible pixels */ 243 /* All modes to 1, FST, Fast QCK, Free running QCK, Free running LST, FST will qualify visible pixels */
244 {VV6410_FGMODES, BIT(6) | BIT(4) | BIT(2) | BIT(0)}, 244 {VV6410_FGMODES, BIT(6) | BIT(4) | BIT(2) | BIT(0)},
245 {VV6410_PINMAPPING, 0x00}, 245 {VV6410_PINMAPPING, 0x00},
246 /* Pre-clock generator divide off */ 246 /* Pre-clock generator divide off */
247 {VV6410_DATAFORMAT, BIT(7) | BIT(0)}, 247 {VV6410_DATAFORMAT, BIT(7) | BIT(0)},
248 248
249 {VV6410_CLKDIV, VV6410_CLK_DIV_2}, 249 {VV6410_CLKDIV, VV6410_CLK_DIV_2},
250 250
251 /* System registers */ 251 /* System registers */
252 /* Enable voltage doubler */ 252 /* Enable voltage doubler */
253 {VV6410_AS0, BIT(6) | BIT(4) | BIT(3) | BIT(2) | BIT(1)}, 253 {VV6410_AS0, BIT(6) | BIT(4) | BIT(3) | BIT(2) | BIT(1)},
254 {VV6410_AT0, 0x00}, 254 {VV6410_AT0, 0x00},
255 /* Power up audio, differential */ 255 /* Power up audio, differential */
256 {VV6410_AT1, BIT(4)|BIT(0)}, 256 {VV6410_AT1, BIT(4) | BIT(0)},
257}; 257};
258 258
259#endif 259#endif