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path: root/drivers/media/dvb/frontends/lgs8gl5.c
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Diffstat (limited to 'drivers/media/dvb/frontends/lgs8gl5.c')
-rw-r--r--drivers/media/dvb/frontends/lgs8gl5.c29
1 files changed, 14 insertions, 15 deletions
diff --git a/drivers/media/dvb/frontends/lgs8gl5.c b/drivers/media/dvb/frontends/lgs8gl5.c
index bb37ed289a05..2cec8041a106 100644
--- a/drivers/media/dvb/frontends/lgs8gl5.c
+++ b/drivers/media/dvb/frontends/lgs8gl5.c
@@ -311,18 +311,18 @@ lgs8gl5_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
311 311
312 312
313static int 313static int
314lgs8gl5_set_frontend(struct dvb_frontend *fe, 314lgs8gl5_set_frontend(struct dvb_frontend *fe)
315 struct dvb_frontend_parameters *p)
316{ 315{
316 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
317 struct lgs8gl5_state *state = fe->demodulator_priv; 317 struct lgs8gl5_state *state = fe->demodulator_priv;
318 318
319 dprintk("%s\n", __func__); 319 dprintk("%s\n", __func__);
320 320
321 if (p->u.ofdm.bandwidth != BANDWIDTH_8_MHZ) 321 if (p->bandwidth_hz != 8000000)
322 return -EINVAL; 322 return -EINVAL;
323 323
324 if (fe->ops.tuner_ops.set_params) { 324 if (fe->ops.tuner_ops.set_params) {
325 fe->ops.tuner_ops.set_params(fe, p); 325 fe->ops.tuner_ops.set_params(fe);
326 if (fe->ops.i2c_gate_ctrl) 326 if (fe->ops.i2c_gate_ctrl)
327 fe->ops.i2c_gate_ctrl(fe, 0); 327 fe->ops.i2c_gate_ctrl(fe, 0);
328 } 328 }
@@ -336,22 +336,21 @@ lgs8gl5_set_frontend(struct dvb_frontend *fe,
336 336
337 337
338static int 338static int
339lgs8gl5_get_frontend(struct dvb_frontend *fe, 339lgs8gl5_get_frontend(struct dvb_frontend *fe)
340 struct dvb_frontend_parameters *p)
341{ 340{
341 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
342 struct lgs8gl5_state *state = fe->demodulator_priv; 342 struct lgs8gl5_state *state = fe->demodulator_priv;
343 u8 inv = lgs8gl5_read_reg(state, REG_INVERSION); 343 u8 inv = lgs8gl5_read_reg(state, REG_INVERSION);
344 struct dvb_ofdm_parameters *o = &p->u.ofdm;
345 344
346 p->inversion = (inv & REG_INVERSION_ON) ? INVERSION_ON : INVERSION_OFF; 345 p->inversion = (inv & REG_INVERSION_ON) ? INVERSION_ON : INVERSION_OFF;
347 346
348 o->code_rate_HP = FEC_1_2; 347 p->code_rate_HP = FEC_1_2;
349 o->code_rate_LP = FEC_7_8; 348 p->code_rate_LP = FEC_7_8;
350 o->guard_interval = GUARD_INTERVAL_1_32; 349 p->guard_interval = GUARD_INTERVAL_1_32;
351 o->transmission_mode = TRANSMISSION_MODE_2K; 350 p->transmission_mode = TRANSMISSION_MODE_2K;
352 o->constellation = QAM_64; 351 p->modulation = QAM_64;
353 o->hierarchy_information = HIERARCHY_NONE; 352 p->hierarchy = HIERARCHY_NONE;
354 o->bandwidth = BANDWIDTH_8_MHZ; 353 p->bandwidth_hz = 8000000;
355 354
356 return 0; 355 return 0;
357} 356}
@@ -413,9 +412,9 @@ EXPORT_SYMBOL(lgs8gl5_attach);
413 412
414 413
415static struct dvb_frontend_ops lgs8gl5_ops = { 414static struct dvb_frontend_ops lgs8gl5_ops = {
415 .delsys = { SYS_DMBTH },
416 .info = { 416 .info = {
417 .name = "Legend Silicon LGS-8GL5 DMB-TH", 417 .name = "Legend Silicon LGS-8GL5 DMB-TH",
418 .type = FE_OFDM,
419 .frequency_min = 474000000, 418 .frequency_min = 474000000,
420 .frequency_max = 858000000, 419 .frequency_max = 858000000,
421 .frequency_stepsize = 10000, 420 .frequency_stepsize = 10000,