diff options
Diffstat (limited to 'drivers/infiniband/hw')
-rw-r--r-- | drivers/infiniband/hw/ipath/ipath_iba6110.c | 2 | ||||
-rw-r--r-- | drivers/infiniband/hw/ipath/ipath_sd7220.c | 4 | ||||
-rw-r--r-- | drivers/infiniband/hw/mlx4/qp.c | 2 |
3 files changed, 4 insertions, 4 deletions
diff --git a/drivers/infiniband/hw/ipath/ipath_iba6110.c b/drivers/infiniband/hw/ipath/ipath_iba6110.c index 4bd39c8af80f..37d12e5efa49 100644 --- a/drivers/infiniband/hw/ipath/ipath_iba6110.c +++ b/drivers/infiniband/hw/ipath/ipath_iba6110.c | |||
@@ -381,7 +381,7 @@ static const ipath_err_t infinipath_hwe_htclnkbbyte1crcerr = | |||
381 | #define IPATH_GPIO_SCL \ | 381 | #define IPATH_GPIO_SCL \ |
382 | (1ULL << (_IPATH_GPIO_SCL_NUM+INFINIPATH_EXTC_GPIOOE_SHIFT)) | 382 | (1ULL << (_IPATH_GPIO_SCL_NUM+INFINIPATH_EXTC_GPIOOE_SHIFT)) |
383 | 383 | ||
384 | /* keep the code below somewhat more readonable; not used elsewhere */ | 384 | /* keep the code below somewhat more readable; not used elsewhere */ |
385 | #define _IPATH_HTLINK0_CRCBITS (infinipath_hwe_htclnkabyte0crcerr | \ | 385 | #define _IPATH_HTLINK0_CRCBITS (infinipath_hwe_htclnkabyte0crcerr | \ |
386 | infinipath_hwe_htclnkabyte1crcerr) | 386 | infinipath_hwe_htclnkabyte1crcerr) |
387 | #define _IPATH_HTLINK1_CRCBITS (infinipath_hwe_htclnkbbyte0crcerr | \ | 387 | #define _IPATH_HTLINK1_CRCBITS (infinipath_hwe_htclnkbbyte0crcerr | \ |
diff --git a/drivers/infiniband/hw/ipath/ipath_sd7220.c b/drivers/infiniband/hw/ipath/ipath_sd7220.c index aa47eb549520..2a68d9f624dd 100644 --- a/drivers/infiniband/hw/ipath/ipath_sd7220.c +++ b/drivers/infiniband/hw/ipath/ipath_sd7220.c | |||
@@ -614,7 +614,7 @@ static int epb_trans(struct ipath_devdata *dd, u16 reg, u64 i_val, u64 *o_vp) | |||
614 | * @wd: Write Data - value to set in register | 614 | * @wd: Write Data - value to set in register |
615 | * @mask: ones where data should be spliced into reg. | 615 | * @mask: ones where data should be spliced into reg. |
616 | * | 616 | * |
617 | * Basic register read/modify/write, with un-needed acesses elided. That is, | 617 | * Basic register read/modify/write, with un-needed accesses elided. That is, |
618 | * a mask of zero will prevent write, while a mask of 0xFF will prevent read. | 618 | * a mask of zero will prevent write, while a mask of 0xFF will prevent read. |
619 | * returns current (presumed, if a write was done) contents of selected | 619 | * returns current (presumed, if a write was done) contents of selected |
620 | * register, or <0 if errors. | 620 | * register, or <0 if errors. |
@@ -989,7 +989,7 @@ static struct rxeq_init { | |||
989 | /* Set DFELTHFDR/HDR thresholds */ | 989 | /* Set DFELTHFDR/HDR thresholds */ |
990 | RXEQ_VAL(7, 8, 0, 0, 0, 0), /* FDR */ | 990 | RXEQ_VAL(7, 8, 0, 0, 0, 0), /* FDR */ |
991 | RXEQ_VAL(7, 0x21, 0, 0, 0, 0), /* HDR */ | 991 | RXEQ_VAL(7, 0x21, 0, 0, 0, 0), /* HDR */ |
992 | /* Set TLTHFDR/HDR theshold */ | 992 | /* Set TLTHFDR/HDR threshold */ |
993 | RXEQ_VAL(7, 9, 2, 2, 2, 2), /* FDR */ | 993 | RXEQ_VAL(7, 9, 2, 2, 2, 2), /* FDR */ |
994 | RXEQ_VAL(7, 0x23, 2, 2, 2, 2), /* HDR */ | 994 | RXEQ_VAL(7, 0x23, 2, 2, 2, 2), /* HDR */ |
995 | /* Set Preamp setting 2 (ZFR/ZCNT) */ | 995 | /* Set Preamp setting 2 (ZFR/ZCNT) */ |
diff --git a/drivers/infiniband/hw/mlx4/qp.c b/drivers/infiniband/hw/mlx4/qp.c index 219b10397b4d..256a00c6aeea 100644 --- a/drivers/infiniband/hw/mlx4/qp.c +++ b/drivers/infiniband/hw/mlx4/qp.c | |||
@@ -352,7 +352,7 @@ static int set_kernel_sq_size(struct mlx4_ib_dev *dev, struct ib_qp_cap *cap, | |||
352 | * anymore, so we do this only if selective signaling is off. | 352 | * anymore, so we do this only if selective signaling is off. |
353 | * | 353 | * |
354 | * Further, on 32-bit platforms, we can't use vmap() to make | 354 | * Further, on 32-bit platforms, we can't use vmap() to make |
355 | * the QP buffer virtually contigious. Thus we have to use | 355 | * the QP buffer virtually contiguous. Thus we have to use |
356 | * constant-sized WRs to make sure a WR is always fully within | 356 | * constant-sized WRs to make sure a WR is always fully within |
357 | * a single page-sized chunk. | 357 | * a single page-sized chunk. |
358 | * | 358 | * |