diff options
Diffstat (limited to 'drivers/infiniband/hw/ipath/ipath_iba6120.c')
-rw-r--r-- | drivers/infiniband/hw/ipath/ipath_iba6120.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/infiniband/hw/ipath/ipath_iba6120.c b/drivers/infiniband/hw/ipath/ipath_iba6120.c index 6af89683f710..397da3483af1 100644 --- a/drivers/infiniband/hw/ipath/ipath_iba6120.c +++ b/drivers/infiniband/hw/ipath/ipath_iba6120.c | |||
@@ -602,7 +602,7 @@ static void ipath_pe_init_hwerrors(struct ipath_devdata *dd) | |||
602 | */ | 602 | */ |
603 | static int ipath_pe_bringup_serdes(struct ipath_devdata *dd) | 603 | static int ipath_pe_bringup_serdes(struct ipath_devdata *dd) |
604 | { | 604 | { |
605 | u64 val, tmp, config1, prev_val; | 605 | u64 val, config1, prev_val; |
606 | int ret = 0; | 606 | int ret = 0; |
607 | 607 | ||
608 | ipath_dbg("Trying to bringup serdes\n"); | 608 | ipath_dbg("Trying to bringup serdes\n"); |
@@ -633,7 +633,7 @@ static int ipath_pe_bringup_serdes(struct ipath_devdata *dd) | |||
633 | | INFINIPATH_SERDC0_L1PWR_DN; | 633 | | INFINIPATH_SERDC0_L1PWR_DN; |
634 | ipath_write_kreg(dd, dd->ipath_kregs->kr_serdesconfig0, val); | 634 | ipath_write_kreg(dd, dd->ipath_kregs->kr_serdesconfig0, val); |
635 | /* be sure chip saw it */ | 635 | /* be sure chip saw it */ |
636 | tmp = ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch); | 636 | ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch); |
637 | udelay(5); /* need pll reset set at least for a bit */ | 637 | udelay(5); /* need pll reset set at least for a bit */ |
638 | /* | 638 | /* |
639 | * after PLL is reset, set the per-lane Resets and TxIdle and | 639 | * after PLL is reset, set the per-lane Resets and TxIdle and |
@@ -647,7 +647,7 @@ static int ipath_pe_bringup_serdes(struct ipath_devdata *dd) | |||
647 | "and txidle (%llx)\n", (unsigned long long) val); | 647 | "and txidle (%llx)\n", (unsigned long long) val); |
648 | ipath_write_kreg(dd, dd->ipath_kregs->kr_serdesconfig0, val); | 648 | ipath_write_kreg(dd, dd->ipath_kregs->kr_serdesconfig0, val); |
649 | /* be sure chip saw it */ | 649 | /* be sure chip saw it */ |
650 | tmp = ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch); | 650 | ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch); |
651 | /* need PLL reset clear for at least 11 usec before lane | 651 | /* need PLL reset clear for at least 11 usec before lane |
652 | * resets cleared; give it a few more to be sure */ | 652 | * resets cleared; give it a few more to be sure */ |
653 | udelay(15); | 653 | udelay(15); |