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path: root/drivers/i2c/busses/i2c-pnx.c
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Diffstat (limited to 'drivers/i2c/busses/i2c-pnx.c')
-rw-r--r--drivers/i2c/busses/i2c-pnx.c53
1 files changed, 31 insertions, 22 deletions
diff --git a/drivers/i2c/busses/i2c-pnx.c b/drivers/i2c/busses/i2c-pnx.c
index 5d54416770b0..8488bddfe465 100644
--- a/drivers/i2c/busses/i2c-pnx.c
+++ b/drivers/i2c/busses/i2c-pnx.c
@@ -48,8 +48,9 @@ enum {
48 mcntrl_afie = 0x00000002, 48 mcntrl_afie = 0x00000002,
49 mcntrl_naie = 0x00000004, 49 mcntrl_naie = 0x00000004,
50 mcntrl_drmie = 0x00000008, 50 mcntrl_drmie = 0x00000008,
51 mcntrl_daie = 0x00000020, 51 mcntrl_drsie = 0x00000010,
52 mcntrl_rffie = 0x00000040, 52 mcntrl_rffie = 0x00000020,
53 mcntrl_daie = 0x00000040,
53 mcntrl_tffie = 0x00000080, 54 mcntrl_tffie = 0x00000080,
54 mcntrl_reset = 0x00000100, 55 mcntrl_reset = 0x00000100,
55 mcntrl_cdbmode = 0x00000400, 56 mcntrl_cdbmode = 0x00000400,
@@ -290,31 +291,37 @@ static int i2c_pnx_master_rcv(struct i2c_pnx_algo_data *alg_data)
290 * or we didn't 'ask' for it yet. 291 * or we didn't 'ask' for it yet.
291 */ 292 */
292 if (ioread32(I2C_REG_STS(alg_data)) & mstatus_rfe) { 293 if (ioread32(I2C_REG_STS(alg_data)) & mstatus_rfe) {
293 dev_dbg(&alg_data->adapter.dev, 294 /* 'Asking' is done asynchronously, e.g. dummy TX of several
294 "%s(): Write dummy data to fill Rx-fifo...\n", 295 * bytes is done before the first actual RX arrives in FIFO.
295 __func__); 296 * Therefore, ordered bytes (via TX) are counted separately.
297 */
298 if (alg_data->mif.order) {
299 dev_dbg(&alg_data->adapter.dev,
300 "%s(): Write dummy data to fill Rx-fifo...\n",
301 __func__);
296 302
297 if (alg_data->mif.len == 1) { 303 if (alg_data->mif.order == 1) {
298 /* Last byte, do not acknowledge next rcv. */ 304 /* Last byte, do not acknowledge next rcv. */
299 val |= stop_bit; 305 val |= stop_bit;
306
307 /*
308 * Enable interrupt RFDAIE (data in Rx fifo),
309 * and disable DRMIE (need data for Tx)
310 */
311 ctl = ioread32(I2C_REG_CTL(alg_data));
312 ctl |= mcntrl_rffie | mcntrl_daie;
313 ctl &= ~mcntrl_drmie;
314 iowrite32(ctl, I2C_REG_CTL(alg_data));
315 }
300 316
301 /* 317 /*
302 * Enable interrupt RFDAIE (data in Rx fifo), 318 * Now we'll 'ask' for data:
303 * and disable DRMIE (need data for Tx) 319 * For each byte we want to receive, we must
320 * write a (dummy) byte to the Tx-FIFO.
304 */ 321 */
305 ctl = ioread32(I2C_REG_CTL(alg_data)); 322 iowrite32(val, I2C_REG_TX(alg_data));
306 ctl |= mcntrl_rffie | mcntrl_daie; 323 alg_data->mif.order--;
307 ctl &= ~mcntrl_drmie;
308 iowrite32(ctl, I2C_REG_CTL(alg_data));
309 } 324 }
310
311 /*
312 * Now we'll 'ask' for data:
313 * For each byte we want to receive, we must
314 * write a (dummy) byte to the Tx-FIFO.
315 */
316 iowrite32(val, I2C_REG_TX(alg_data));
317
318 return 0; 325 return 0;
319 } 326 }
320 327
@@ -514,6 +521,7 @@ i2c_pnx_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
514 521
515 alg_data->mif.buf = pmsg->buf; 522 alg_data->mif.buf = pmsg->buf;
516 alg_data->mif.len = pmsg->len; 523 alg_data->mif.len = pmsg->len;
524 alg_data->mif.order = pmsg->len;
517 alg_data->mif.mode = (pmsg->flags & I2C_M_RD) ? 525 alg_data->mif.mode = (pmsg->flags & I2C_M_RD) ?
518 I2C_SMBUS_READ : I2C_SMBUS_WRITE; 526 I2C_SMBUS_READ : I2C_SMBUS_WRITE;
519 alg_data->mif.ret = 0; 527 alg_data->mif.ret = 0;
@@ -566,6 +574,7 @@ i2c_pnx_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
566 /* Cleanup to be sure... */ 574 /* Cleanup to be sure... */
567 alg_data->mif.buf = NULL; 575 alg_data->mif.buf = NULL;
568 alg_data->mif.len = 0; 576 alg_data->mif.len = 0;
577 alg_data->mif.order = 0;
569 578
570 dev_dbg(&alg_data->adapter.dev, "%s(): exiting, stat = %x\n", 579 dev_dbg(&alg_data->adapter.dev, "%s(): exiting, stat = %x\n",
571 __func__, ioread32(I2C_REG_STS(alg_data))); 580 __func__, ioread32(I2C_REG_STS(alg_data)));