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path: root/drivers/gpu/drm/radeon/radeon_mode.h
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-rw-r--r--drivers/gpu/drm/radeon/radeon_mode.h9
1 files changed, 0 insertions, 9 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h
index 8707cd61e58b..29f551769aaf 100644
--- a/drivers/gpu/drm/radeon/radeon_mode.h
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
@@ -144,12 +144,6 @@ struct radeon_tmds_pll {
144#define RADEON_PLL_USE_POST_DIV (1 << 6) 144#define RADEON_PLL_USE_POST_DIV (1 << 6)
145#define RADEON_PLL_IS_LCD (1 << 7) 145#define RADEON_PLL_IS_LCD (1 << 7)
146 146
147/* pll algo */
148enum radeon_pll_algo {
149 PLL_ALGO_LEGACY,
150 PLL_ALGO_NEW
151};
152
153struct radeon_pll { 147struct radeon_pll {
154 /* reference frequency */ 148 /* reference frequency */
155 uint32_t reference_freq; 149 uint32_t reference_freq;
@@ -182,8 +176,6 @@ struct radeon_pll {
182 176
183 /* pll id */ 177 /* pll id */
184 uint32_t id; 178 uint32_t id;
185 /* pll algo */
186 enum radeon_pll_algo algo;
187}; 179};
188 180
189struct radeon_i2c_chan { 181struct radeon_i2c_chan {
@@ -346,7 +338,6 @@ struct radeon_encoder_atom_dig {
346 /* atom lvds */ 338 /* atom lvds */
347 uint32_t lvds_misc; 339 uint32_t lvds_misc;
348 uint16_t panel_pwr_delay; 340 uint16_t panel_pwr_delay;
349 enum radeon_pll_algo pll_algo;
350 struct radeon_atom_ss *ss; 341 struct radeon_atom_ss *ss;
351 /* panel mode */ 342 /* panel mode */
352 struct drm_display_mode native_mode; 343 struct drm_display_mode native_mode;