diff options
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_asic.c')
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_asic.c | 65 |
1 files changed, 58 insertions, 7 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c index 3d73fe484f42..3a1b16186224 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.c +++ b/drivers/gpu/drm/radeon/radeon_asic.c | |||
@@ -94,7 +94,7 @@ static void radeon_register_accessor_init(struct radeon_device *rdev) | |||
94 | rdev->mc_rreg = &rs600_mc_rreg; | 94 | rdev->mc_rreg = &rs600_mc_rreg; |
95 | rdev->mc_wreg = &rs600_mc_wreg; | 95 | rdev->mc_wreg = &rs600_mc_wreg; |
96 | } | 96 | } |
97 | if ((rdev->family >= CHIP_R600) && (rdev->family <= CHIP_RV740)) { | 97 | if ((rdev->family >= CHIP_R600) && (rdev->family <= CHIP_HEMLOCK)) { |
98 | rdev->pciep_rreg = &r600_pciep_rreg; | 98 | rdev->pciep_rreg = &r600_pciep_rreg; |
99 | rdev->pciep_wreg = &r600_pciep_wreg; | 99 | rdev->pciep_wreg = &r600_pciep_wreg; |
100 | } | 100 | } |
@@ -631,8 +631,8 @@ static struct radeon_asic r600_asic = { | |||
631 | .set_engine_clock = &radeon_atom_set_engine_clock, | 631 | .set_engine_clock = &radeon_atom_set_engine_clock, |
632 | .get_memory_clock = &radeon_atom_get_memory_clock, | 632 | .get_memory_clock = &radeon_atom_get_memory_clock, |
633 | .set_memory_clock = &radeon_atom_set_memory_clock, | 633 | .set_memory_clock = &radeon_atom_set_memory_clock, |
634 | .get_pcie_lanes = &rv370_get_pcie_lanes, | 634 | .get_pcie_lanes = &r600_get_pcie_lanes, |
635 | .set_pcie_lanes = NULL, | 635 | .set_pcie_lanes = &r600_set_pcie_lanes, |
636 | .set_clock_gating = NULL, | 636 | .set_clock_gating = NULL, |
637 | .set_surface_reg = r600_set_surface_reg, | 637 | .set_surface_reg = r600_set_surface_reg, |
638 | .clear_surface_reg = r600_clear_surface_reg, | 638 | .clear_surface_reg = r600_clear_surface_reg, |
@@ -725,8 +725,8 @@ static struct radeon_asic rv770_asic = { | |||
725 | .set_engine_clock = &radeon_atom_set_engine_clock, | 725 | .set_engine_clock = &radeon_atom_set_engine_clock, |
726 | .get_memory_clock = &radeon_atom_get_memory_clock, | 726 | .get_memory_clock = &radeon_atom_get_memory_clock, |
727 | .set_memory_clock = &radeon_atom_set_memory_clock, | 727 | .set_memory_clock = &radeon_atom_set_memory_clock, |
728 | .get_pcie_lanes = &rv370_get_pcie_lanes, | 728 | .get_pcie_lanes = &r600_get_pcie_lanes, |
729 | .set_pcie_lanes = NULL, | 729 | .set_pcie_lanes = &r600_set_pcie_lanes, |
730 | .set_clock_gating = &radeon_atom_set_clock_gating, | 730 | .set_clock_gating = &radeon_atom_set_clock_gating, |
731 | .set_surface_reg = r600_set_surface_reg, | 731 | .set_surface_reg = r600_set_surface_reg, |
732 | .clear_surface_reg = r600_clear_surface_reg, | 732 | .clear_surface_reg = r600_clear_surface_reg, |
@@ -772,8 +772,8 @@ static struct radeon_asic evergreen_asic = { | |||
772 | .set_engine_clock = &radeon_atom_set_engine_clock, | 772 | .set_engine_clock = &radeon_atom_set_engine_clock, |
773 | .get_memory_clock = &radeon_atom_get_memory_clock, | 773 | .get_memory_clock = &radeon_atom_get_memory_clock, |
774 | .set_memory_clock = &radeon_atom_set_memory_clock, | 774 | .set_memory_clock = &radeon_atom_set_memory_clock, |
775 | .get_pcie_lanes = NULL, | 775 | .get_pcie_lanes = &r600_get_pcie_lanes, |
776 | .set_pcie_lanes = NULL, | 776 | .set_pcie_lanes = &r600_set_pcie_lanes, |
777 | .set_clock_gating = NULL, | 777 | .set_clock_gating = NULL, |
778 | .set_surface_reg = r600_set_surface_reg, | 778 | .set_surface_reg = r600_set_surface_reg, |
779 | .clear_surface_reg = r600_clear_surface_reg, | 779 | .clear_surface_reg = r600_clear_surface_reg, |
@@ -836,6 +836,52 @@ static struct radeon_asic sumo_asic = { | |||
836 | .pm_get_dynpm_state = &r600_pm_get_dynpm_state, | 836 | .pm_get_dynpm_state = &r600_pm_get_dynpm_state, |
837 | }; | 837 | }; |
838 | 838 | ||
839 | static struct radeon_asic btc_asic = { | ||
840 | .init = &evergreen_init, | ||
841 | .fini = &evergreen_fini, | ||
842 | .suspend = &evergreen_suspend, | ||
843 | .resume = &evergreen_resume, | ||
844 | .cp_commit = &r600_cp_commit, | ||
845 | .gpu_is_lockup = &evergreen_gpu_is_lockup, | ||
846 | .asic_reset = &evergreen_asic_reset, | ||
847 | .vga_set_state = &r600_vga_set_state, | ||
848 | .gart_tlb_flush = &evergreen_pcie_gart_tlb_flush, | ||
849 | .gart_set_page = &rs600_gart_set_page, | ||
850 | .ring_test = &r600_ring_test, | ||
851 | .ring_ib_execute = &r600_ring_ib_execute, | ||
852 | .irq_set = &evergreen_irq_set, | ||
853 | .irq_process = &evergreen_irq_process, | ||
854 | .get_vblank_counter = &evergreen_get_vblank_counter, | ||
855 | .fence_ring_emit = &r600_fence_ring_emit, | ||
856 | .cs_parse = &evergreen_cs_parse, | ||
857 | .copy_blit = &evergreen_copy_blit, | ||
858 | .copy_dma = &evergreen_copy_blit, | ||
859 | .copy = &evergreen_copy_blit, | ||
860 | .get_engine_clock = &radeon_atom_get_engine_clock, | ||
861 | .set_engine_clock = &radeon_atom_set_engine_clock, | ||
862 | .get_memory_clock = &radeon_atom_get_memory_clock, | ||
863 | .set_memory_clock = &radeon_atom_set_memory_clock, | ||
864 | .get_pcie_lanes = NULL, | ||
865 | .set_pcie_lanes = NULL, | ||
866 | .set_clock_gating = NULL, | ||
867 | .set_surface_reg = r600_set_surface_reg, | ||
868 | .clear_surface_reg = r600_clear_surface_reg, | ||
869 | .bandwidth_update = &evergreen_bandwidth_update, | ||
870 | .hpd_init = &evergreen_hpd_init, | ||
871 | .hpd_fini = &evergreen_hpd_fini, | ||
872 | .hpd_sense = &evergreen_hpd_sense, | ||
873 | .hpd_set_polarity = &evergreen_hpd_set_polarity, | ||
874 | .gui_idle = &r600_gui_idle, | ||
875 | .pm_misc = &evergreen_pm_misc, | ||
876 | .pm_prepare = &evergreen_pm_prepare, | ||
877 | .pm_finish = &evergreen_pm_finish, | ||
878 | .pm_init_profile = &r600_pm_init_profile, | ||
879 | .pm_get_dynpm_state = &r600_pm_get_dynpm_state, | ||
880 | .pre_page_flip = &evergreen_pre_page_flip, | ||
881 | .page_flip = &evergreen_page_flip, | ||
882 | .post_page_flip = &evergreen_post_page_flip, | ||
883 | }; | ||
884 | |||
839 | int radeon_asic_init(struct radeon_device *rdev) | 885 | int radeon_asic_init(struct radeon_device *rdev) |
840 | { | 886 | { |
841 | radeon_register_accessor_init(rdev); | 887 | radeon_register_accessor_init(rdev); |
@@ -923,6 +969,11 @@ int radeon_asic_init(struct radeon_device *rdev) | |||
923 | case CHIP_PALM: | 969 | case CHIP_PALM: |
924 | rdev->asic = &sumo_asic; | 970 | rdev->asic = &sumo_asic; |
925 | break; | 971 | break; |
972 | case CHIP_BARTS: | ||
973 | case CHIP_TURKS: | ||
974 | case CHIP_CAICOS: | ||
975 | rdev->asic = &btc_asic; | ||
976 | break; | ||
926 | default: | 977 | default: |
927 | /* FIXME: not supported yet */ | 978 | /* FIXME: not supported yet */ |
928 | return -EINVAL; | 979 | return -EINVAL; |