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path: root/drivers/gpu/drm/radeon/r600.c
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Diffstat (limited to 'drivers/gpu/drm/radeon/r600.c')
-rw-r--r--drivers/gpu/drm/radeon/r600.c37
1 files changed, 16 insertions, 21 deletions
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 9f2cafd10f4a..70c800ff6190 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -98,7 +98,7 @@ int r600_debugfs_mc_info_init(struct radeon_device *rdev);
98 98
99/* r600,rv610,rv630,rv620,rv635,rv670 */ 99/* r600,rv610,rv630,rv620,rv635,rv670 */
100int r600_mc_wait_for_idle(struct radeon_device *rdev); 100int r600_mc_wait_for_idle(struct radeon_device *rdev);
101void r600_gpu_init(struct radeon_device *rdev); 101static void r600_gpu_init(struct radeon_device *rdev);
102void r600_fini(struct radeon_device *rdev); 102void r600_fini(struct radeon_device *rdev);
103void r600_irq_disable(struct radeon_device *rdev); 103void r600_irq_disable(struct radeon_device *rdev);
104static void r600_pcie_gen2_enable(struct radeon_device *rdev); 104static void r600_pcie_gen2_enable(struct radeon_device *rdev);
@@ -881,7 +881,7 @@ int r600_pcie_gart_init(struct radeon_device *rdev)
881 return radeon_gart_table_vram_alloc(rdev); 881 return radeon_gart_table_vram_alloc(rdev);
882} 882}
883 883
884int r600_pcie_gart_enable(struct radeon_device *rdev) 884static int r600_pcie_gart_enable(struct radeon_device *rdev)
885{ 885{
886 u32 tmp; 886 u32 tmp;
887 int r, i; 887 int r, i;
@@ -938,7 +938,7 @@ int r600_pcie_gart_enable(struct radeon_device *rdev)
938 return 0; 938 return 0;
939} 939}
940 940
941void r600_pcie_gart_disable(struct radeon_device *rdev) 941static void r600_pcie_gart_disable(struct radeon_device *rdev)
942{ 942{
943 u32 tmp; 943 u32 tmp;
944 int i; 944 int i;
@@ -971,14 +971,14 @@ void r600_pcie_gart_disable(struct radeon_device *rdev)
971 radeon_gart_table_vram_unpin(rdev); 971 radeon_gart_table_vram_unpin(rdev);
972} 972}
973 973
974void r600_pcie_gart_fini(struct radeon_device *rdev) 974static void r600_pcie_gart_fini(struct radeon_device *rdev)
975{ 975{
976 radeon_gart_fini(rdev); 976 radeon_gart_fini(rdev);
977 r600_pcie_gart_disable(rdev); 977 r600_pcie_gart_disable(rdev);
978 radeon_gart_table_vram_free(rdev); 978 radeon_gart_table_vram_free(rdev);
979} 979}
980 980
981void r600_agp_enable(struct radeon_device *rdev) 981static void r600_agp_enable(struct radeon_device *rdev)
982{ 982{
983 u32 tmp; 983 u32 tmp;
984 int i; 984 int i;
@@ -1158,7 +1158,7 @@ static void r600_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc
1158 } 1158 }
1159} 1159}
1160 1160
1161int r600_mc_init(struct radeon_device *rdev) 1161static int r600_mc_init(struct radeon_device *rdev)
1162{ 1162{
1163 u32 tmp; 1163 u32 tmp;
1164 int chansize, numchan; 1164 int chansize, numchan;
@@ -1258,7 +1258,7 @@ void r600_vram_scratch_fini(struct radeon_device *rdev)
1258 * reset, it's up to the caller to determine if the GPU needs one. We 1258 * reset, it's up to the caller to determine if the GPU needs one. We
1259 * might add an helper function to check that. 1259 * might add an helper function to check that.
1260 */ 1260 */
1261int r600_gpu_soft_reset(struct radeon_device *rdev) 1261static int r600_gpu_soft_reset(struct radeon_device *rdev)
1262{ 1262{
1263 struct rv515_mc_save save; 1263 struct rv515_mc_save save;
1264 u32 grbm_busy_mask = S_008010_VC_BUSY(1) | S_008010_VGT_BUSY_NO_DMA(1) | 1264 u32 grbm_busy_mask = S_008010_VC_BUSY(1) | S_008010_VGT_BUSY_NO_DMA(1) |
@@ -1433,7 +1433,7 @@ int r600_count_pipe_bits(uint32_t val)
1433 return ret; 1433 return ret;
1434} 1434}
1435 1435
1436void r600_gpu_init(struct radeon_device *rdev) 1436static void r600_gpu_init(struct radeon_device *rdev)
1437{ 1437{
1438 u32 tiling_config; 1438 u32 tiling_config;
1439 u32 ramcfg; 1439 u32 ramcfg;
@@ -2347,7 +2347,7 @@ void r600_clear_surface_reg(struct radeon_device *rdev, int reg)
2347 /* FIXME: implement */ 2347 /* FIXME: implement */
2348} 2348}
2349 2349
2350int r600_startup(struct radeon_device *rdev) 2350static int r600_startup(struct radeon_device *rdev)
2351{ 2351{
2352 struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; 2352 struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX];
2353 int r; 2353 int r;
@@ -2635,10 +2635,10 @@ int r600_ib_test(struct radeon_device *rdev, struct radeon_ring *ring)
2635 return r; 2635 return r;
2636 } 2636 }
2637 WREG32(scratch, 0xCAFEDEAD); 2637 WREG32(scratch, 0xCAFEDEAD);
2638 r = radeon_ib_get(rdev, ring->idx, &ib, 256); 2638 r = radeon_ib_get(rdev, ring->idx, &ib, NULL, 256);
2639 if (r) { 2639 if (r) {
2640 DRM_ERROR("radeon: failed to get ib (%d).\n", r); 2640 DRM_ERROR("radeon: failed to get ib (%d).\n", r);
2641 return r; 2641 goto free_scratch;
2642 } 2642 }
2643 ib.ptr[0] = PACKET3(PACKET3_SET_CONFIG_REG, 1); 2643 ib.ptr[0] = PACKET3(PACKET3_SET_CONFIG_REG, 1);
2644 ib.ptr[1] = ((scratch - PACKET3_SET_CONFIG_REG_OFFSET) >> 2); 2644 ib.ptr[1] = ((scratch - PACKET3_SET_CONFIG_REG_OFFSET) >> 2);
@@ -2646,15 +2646,13 @@ int r600_ib_test(struct radeon_device *rdev, struct radeon_ring *ring)
2646 ib.length_dw = 3; 2646 ib.length_dw = 3;
2647 r = radeon_ib_schedule(rdev, &ib, NULL); 2647 r = radeon_ib_schedule(rdev, &ib, NULL);
2648 if (r) { 2648 if (r) {
2649 radeon_scratch_free(rdev, scratch);
2650 radeon_ib_free(rdev, &ib);
2651 DRM_ERROR("radeon: failed to schedule ib (%d).\n", r); 2649 DRM_ERROR("radeon: failed to schedule ib (%d).\n", r);
2652 return r; 2650 goto free_ib;
2653 } 2651 }
2654 r = radeon_fence_wait(ib.fence, false); 2652 r = radeon_fence_wait(ib.fence, false);
2655 if (r) { 2653 if (r) {
2656 DRM_ERROR("radeon: fence wait failed (%d).\n", r); 2654 DRM_ERROR("radeon: fence wait failed (%d).\n", r);
2657 return r; 2655 goto free_ib;
2658 } 2656 }
2659 for (i = 0; i < rdev->usec_timeout; i++) { 2657 for (i = 0; i < rdev->usec_timeout; i++) {
2660 tmp = RREG32(scratch); 2658 tmp = RREG32(scratch);
@@ -2669,8 +2667,10 @@ int r600_ib_test(struct radeon_device *rdev, struct radeon_ring *ring)
2669 scratch, tmp); 2667 scratch, tmp);
2670 r = -EINVAL; 2668 r = -EINVAL;
2671 } 2669 }
2672 radeon_scratch_free(rdev, scratch); 2670free_ib:
2673 radeon_ib_free(rdev, &ib); 2671 radeon_ib_free(rdev, &ib);
2672free_scratch:
2673 radeon_scratch_free(rdev, scratch);
2674 return r; 2674 return r;
2675} 2675}
2676 2676
@@ -3088,10 +3088,6 @@ int r600_irq_set(struct radeon_device *rdev)
3088 DRM_DEBUG("r600_irq_set: hdmi 0\n"); 3088 DRM_DEBUG("r600_irq_set: hdmi 0\n");
3089 hdmi1 |= HDMI0_AZ_FORMAT_WTRIG_MASK; 3089 hdmi1 |= HDMI0_AZ_FORMAT_WTRIG_MASK;
3090 } 3090 }
3091 if (rdev->irq.gui_idle) {
3092 DRM_DEBUG("gui idle\n");
3093 grbm_int_cntl |= GUI_IDLE_INT_ENABLE;
3094 }
3095 3091
3096 WREG32(CP_INT_CNTL, cp_int_cntl); 3092 WREG32(CP_INT_CNTL, cp_int_cntl);
3097 WREG32(DxMODE_INT_MASK, mode_int); 3093 WREG32(DxMODE_INT_MASK, mode_int);
@@ -3475,7 +3471,6 @@ restart_ih:
3475 break; 3471 break;
3476 case 233: /* GUI IDLE */ 3472 case 233: /* GUI IDLE */
3477 DRM_DEBUG("IH: GUI idle\n"); 3473 DRM_DEBUG("IH: GUI idle\n");
3478 wake_up(&rdev->irq.idle_queue);
3479 break; 3474 break;
3480 default: 3475 default:
3481 DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data); 3476 DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data);