1 files changed, 1 insertions, 7 deletions

diff --git a/drivers/gpu/drm/nouveau/nv20_graph.c b/drivers/gpu/drm/nouveau/nv20_graph.c
index 183e37512ef9..e34ea30758f6 100644
--- a/drivers/gpu/drm/nouveau/nv20_graph.c
+++ b/drivers/gpu/drm/nouveau/nv20_graph.c
@@ -43,8 +43,6 @@ struct nv20_graph_engine {
 int
 nv20_graph_unload_context(struct drm_device *dev)
 {
-        struct drm_nouveau_private *dev_priv = dev->dev_private;
-        struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
         struct nouveau_channel *chan;
         struct nouveau_gpuobj *grctx;
         u32 tmp;
@@ -62,7 +60,7 @@ nv20_graph_unload_context(struct drm_device *dev)
 
         nv_wr32(dev, NV10_PGRAPH_CTX_CONTROL, 0x10000000);
         tmp  = nv_rd32(dev, NV10_PGRAPH_CTX_USER) & 0x00ffffff;
-        tmp |= (pfifo->channels - 1) << 24;
+        tmp |= 31 << 24;
         nv_wr32(dev, NV10_PGRAPH_CTX_USER, tmp);
         return 0;
 }
@@ -796,10 +794,6 @@ nv20_graph_create(struct drm_device *dev)
         NVOBJ_ENGINE_ADD(dev, GR, &pgraph->base);
         nouveau_irq_register(dev, 12, nv20_graph_isr);
 
-        /* nvsw */
-        NVOBJ_CLASS(dev, 0x506e, SW);
-        NVOBJ_MTHD (dev, 0x506e, 0x0500, nv04_graph_mthd_page_flip);
-
         NVOBJ_CLASS(dev, 0x0030, GR); /* null */
         NVOBJ_CLASS(dev, 0x0039, GR); /* m2mf */
         NVOBJ_CLASS(dev, 0x004a, GR); /* gdirect */