diff options
Diffstat (limited to 'drivers/gpu/drm/nouveau/nv10_fence.c')
-rw-r--r-- | drivers/gpu/drm/nouveau/nv10_fence.c | 48 |
1 files changed, 18 insertions, 30 deletions
diff --git a/drivers/gpu/drm/nouveau/nv10_fence.c b/drivers/gpu/drm/nouveau/nv10_fence.c index 8ff9fbabc331..4dac16a9c7f7 100644 --- a/drivers/gpu/drm/nouveau/nv10_fence.c +++ b/drivers/gpu/drm/nouveau/nv10_fence.c | |||
@@ -64,7 +64,8 @@ static int | |||
64 | nv17_fence_sync(struct nouveau_fence *fence, | 64 | nv17_fence_sync(struct nouveau_fence *fence, |
65 | struct nouveau_channel *prev, struct nouveau_channel *chan) | 65 | struct nouveau_channel *prev, struct nouveau_channel *chan) |
66 | { | 66 | { |
67 | struct nv10_fence_priv *priv = nv_engine(chan->dev, NVOBJ_ENGINE_FENCE); | 67 | struct drm_nouveau_private *dev_priv = chan->dev->dev_private; |
68 | struct nv10_fence_priv *priv = dev_priv->fence.func; | ||
68 | u32 value; | 69 | u32 value; |
69 | int ret; | 70 | int ret; |
70 | 71 | ||
@@ -106,23 +107,24 @@ nv10_fence_read(struct nouveau_channel *chan) | |||
106 | } | 107 | } |
107 | 108 | ||
108 | static void | 109 | static void |
109 | nv10_fence_context_del(struct nouveau_channel *chan, int engine) | 110 | nv10_fence_context_del(struct nouveau_channel *chan) |
110 | { | 111 | { |
111 | struct nv10_fence_chan *fctx = chan->engctx[engine]; | 112 | struct nv10_fence_chan *fctx = chan->fence; |
112 | nouveau_fence_context_del(&fctx->base); | 113 | nouveau_fence_context_del(&fctx->base); |
113 | chan->engctx[engine] = NULL; | 114 | chan->fence = NULL; |
114 | kfree(fctx); | 115 | kfree(fctx); |
115 | } | 116 | } |
116 | 117 | ||
117 | static int | 118 | static int |
118 | nv10_fence_context_new(struct nouveau_channel *chan, int engine) | 119 | nv10_fence_context_new(struct nouveau_channel *chan) |
119 | { | 120 | { |
120 | struct nv10_fence_priv *priv = nv_engine(chan->dev, engine); | 121 | struct drm_nouveau_private *dev_priv = chan->dev->dev_private; |
122 | struct nv10_fence_priv *priv = dev_priv->fence.func; | ||
121 | struct nv10_fence_chan *fctx; | 123 | struct nv10_fence_chan *fctx; |
122 | struct nouveau_gpuobj *obj; | 124 | struct nouveau_gpuobj *obj; |
123 | int ret = 0; | 125 | int ret = 0; |
124 | 126 | ||
125 | fctx = chan->engctx[engine] = kzalloc(sizeof(*fctx), GFP_KERNEL); | 127 | fctx = chan->fence = kzalloc(sizeof(*fctx), GFP_KERNEL); |
126 | if (!fctx) | 128 | if (!fctx) |
127 | return -ENOMEM; | 129 | return -ENOMEM; |
128 | 130 | ||
@@ -142,30 +144,18 @@ nv10_fence_context_new(struct nouveau_channel *chan, int engine) | |||
142 | } | 144 | } |
143 | 145 | ||
144 | if (ret) | 146 | if (ret) |
145 | nv10_fence_context_del(chan, engine); | 147 | nv10_fence_context_del(chan); |
146 | return ret; | 148 | return ret; |
147 | } | 149 | } |
148 | 150 | ||
149 | static int | ||
150 | nv10_fence_fini(struct drm_device *dev, int engine, bool suspend) | ||
151 | { | ||
152 | return 0; | ||
153 | } | ||
154 | |||
155 | static int | ||
156 | nv10_fence_init(struct drm_device *dev, int engine) | ||
157 | { | ||
158 | return 0; | ||
159 | } | ||
160 | |||
161 | static void | 151 | static void |
162 | nv10_fence_destroy(struct drm_device *dev, int engine) | 152 | nv10_fence_destroy(struct drm_device *dev) |
163 | { | 153 | { |
164 | struct drm_nouveau_private *dev_priv = dev->dev_private; | 154 | struct drm_nouveau_private *dev_priv = dev->dev_private; |
165 | struct nv10_fence_priv *priv = nv_engine(dev, engine); | 155 | struct nv10_fence_priv *priv = dev_priv->fence.func; |
166 | 156 | ||
167 | nouveau_bo_ref(NULL, &priv->bo); | 157 | nouveau_bo_ref(NULL, &priv->bo); |
168 | dev_priv->eng[engine] = NULL; | 158 | dev_priv->fence.func = NULL; |
169 | kfree(priv); | 159 | kfree(priv); |
170 | } | 160 | } |
171 | 161 | ||
@@ -180,15 +170,13 @@ nv10_fence_create(struct drm_device *dev) | |||
180 | if (!priv) | 170 | if (!priv) |
181 | return -ENOMEM; | 171 | return -ENOMEM; |
182 | 172 | ||
183 | priv->base.engine.destroy = nv10_fence_destroy; | 173 | priv->base.dtor = nv10_fence_destroy; |
184 | priv->base.engine.init = nv10_fence_init; | 174 | priv->base.context_new = nv10_fence_context_new; |
185 | priv->base.engine.fini = nv10_fence_fini; | 175 | priv->base.context_del = nv10_fence_context_del; |
186 | priv->base.engine.context_new = nv10_fence_context_new; | ||
187 | priv->base.engine.context_del = nv10_fence_context_del; | ||
188 | priv->base.emit = nv10_fence_emit; | 176 | priv->base.emit = nv10_fence_emit; |
189 | priv->base.read = nv10_fence_read; | 177 | priv->base.read = nv10_fence_read; |
190 | priv->base.sync = nv10_fence_sync; | 178 | priv->base.sync = nv10_fence_sync; |
191 | dev_priv->eng[NVOBJ_ENGINE_FENCE] = &priv->base.engine; | 179 | dev_priv->fence.func = &priv->base; |
192 | spin_lock_init(&priv->lock); | 180 | spin_lock_init(&priv->lock); |
193 | 181 | ||
194 | if (dev_priv->chipset >= 0x17) { | 182 | if (dev_priv->chipset >= 0x17) { |
@@ -209,6 +197,6 @@ nv10_fence_create(struct drm_device *dev) | |||
209 | } | 197 | } |
210 | 198 | ||
211 | if (ret) | 199 | if (ret) |
212 | nv10_fence_destroy(dev, NVOBJ_ENGINE_FENCE); | 200 | nv10_fence_destroy(dev); |
213 | return ret; | 201 | return ret; |
214 | } | 202 | } |