2 files changed, 13 insertions, 3 deletions

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 1254c4b80e30..24e154e47225 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -984,7 +984,10 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
 
 #define HAS_FW_BLC(dev) (IS_I9XX(dev) || IS_G4X(dev) || IS_IGDNG(dev))
 #define HAS_PIPE_CXSR(dev) (IS_G4X(dev) || IS_IGDNG(dev))
-#define I915_HAS_FBC(dev) (IS_MOBILE(dev) && (IS_I9XX(dev) || IS_GM45(dev)) && !IS_IGD(dev))
+#define I915_HAS_FBC(dev) (IS_MOBILE(dev) && \
+                           (IS_I9XX(dev) || IS_GM45(dev)) && \
+                           !IS_IGD(dev) && \
+                           !IS_IGDNG(dev))
 
 #define PRIMARY_RINGBUFFER_SIZE         (128*1024)
 
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 9efe11761be3..be7fada590d4 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2586,6 +2586,9 @@ static void intel_update_watermarks(struct drm_device *dev)
         unsigned long planea_clock = 0, planeb_clock = 0, sr_clock = 0;
         int enabled = 0, pixel_size = 0;
 
+        if (!dev_priv->display.update_wm)
+                return;
+
         /* Get the clock config from both planes */
         list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
                 intel_crtc = to_intel_crtc(crtc);
@@ -4126,7 +4129,9 @@ void intel_init_clock_gating(struct drm_device *dev)
          * Disable clock gating reported to work incorrectly according to the
          * specs, but enable as much else as we can.
          */
-        if (IS_G4X(dev)) {
+        if (IS_IGDNG(dev)) {
+                return;
+        } else if (IS_G4X(dev)) {
                 uint32_t dspclk_gate;
                 I915_WRITE(RENCLK_GATE_D1, 0);
                 I915_WRITE(RENCLK_GATE_D2, VF_UNIT_CLOCK_GATE_DISABLE |
@@ -4214,7 +4219,9 @@ static void intel_init_display(struct drm_device *dev)
                         i830_get_display_clock_speed;
 
         /* For FIFO watermark updates */
-        if (IS_G4X(dev))
+        if (IS_IGDNG(dev))
+                dev_priv->display.update_wm = NULL;
+        else if (IS_G4X(dev))
                 dev_priv->display.update_wm = g4x_update_wm;
         else if (IS_I965G(dev))
                 dev_priv->display.update_wm = i965_update_wm;