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path: root/drivers/gpu/drm/i915/intel_display.c
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Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c15
1 files changed, 12 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index bae38acf44dc..5908cd563400 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3478,8 +3478,11 @@ static bool intel_crtc_mode_fixup(struct drm_crtc *crtc,
3478 return false; 3478 return false;
3479 } 3479 }
3480 3480
3481 /* All interlaced capable intel hw wants timings in frames. */ 3481 /* All interlaced capable intel hw wants timings in frames. Note though
3482 drm_mode_set_crtcinfo(adjusted_mode, 0); 3482 * that intel_lvds_mode_fixup does some funny tricks with the crtc
3483 * timings, so we need to be careful not to clobber these.*/
3484 if (!(adjusted_mode->private_flags & INTEL_MODE_CRTC_TIMINGS_SET))
3485 drm_mode_set_crtcinfo(adjusted_mode, 0);
3483 3486
3484 return true; 3487 return true;
3485} 3488}
@@ -7465,7 +7468,13 @@ static int intel_gen6_queue_flip(struct drm_device *dev,
7465 OUT_RING(fb->pitches[0] | obj->tiling_mode); 7468 OUT_RING(fb->pitches[0] | obj->tiling_mode);
7466 OUT_RING(obj->gtt_offset); 7469 OUT_RING(obj->gtt_offset);
7467 7470
7468 pf = I915_READ(PF_CTL(intel_crtc->pipe)) & PF_ENABLE; 7471 /* Contrary to the suggestions in the documentation,
7472 * "Enable Panel Fitter" does not seem to be required when page
7473 * flipping with a non-native mode, and worse causes a normal
7474 * modeset to fail.
7475 * pf = I915_READ(PF_CTL(intel_crtc->pipe)) & PF_ENABLE;
7476 */
7477 pf = 0;
7469 pipesrc = I915_READ(PIPESRC(intel_crtc->pipe)) & 0x0fff0fff; 7478 pipesrc = I915_READ(PIPESRC(intel_crtc->pipe)) & 0x0fff0fff;
7470 OUT_RING(pf | pipesrc); 7479 OUT_RING(pf | pipesrc);
7471 ADVANCE_LP_RING(); 7480 ADVANCE_LP_RING();