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path: root/drivers/gpu/drm/i915/i915_drv.h
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Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 062a60b381b7..1a4c3a1c111f 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1100,6 +1100,7 @@ struct drm_i915_gem_object {
1100 */ 1100 */
1101 atomic_t pending_flip; 1101 atomic_t pending_flip;
1102}; 1102};
1103#define to_gem_object(obj) (&((struct drm_i915_gem_object *)(obj))->base)
1103 1104
1104#define to_intel_bo(x) container_of(x, struct drm_i915_gem_object, base) 1105#define to_intel_bo(x) container_of(x, struct drm_i915_gem_object, base)
1105 1106
@@ -1199,6 +1200,9 @@ struct drm_i915_file_private {
1199#define HAS_OVERLAY(dev) (INTEL_INFO(dev)->has_overlay) 1200#define HAS_OVERLAY(dev) (INTEL_INFO(dev)->has_overlay)
1200#define OVERLAY_NEEDS_PHYSICAL(dev) (INTEL_INFO(dev)->overlay_needs_physical) 1201#define OVERLAY_NEEDS_PHYSICAL(dev) (INTEL_INFO(dev)->overlay_needs_physical)
1201 1202
1203/* Early gen2 have a totally busted CS tlb and require pinned batches. */
1204#define HAS_BROKEN_CS_TLB(dev) (IS_I830(dev) || IS_845G(dev))
1205
1202/* With the 945 and later, Y tiling got adjusted so that it was 32 128-byte 1206/* With the 945 and later, Y tiling got adjusted so that it was 32 128-byte
1203 * rows, which changed the alignment requirements and fence programming. 1207 * rows, which changed the alignment requirements and fence programming.
1204 */ 1208 */