diff options
Diffstat (limited to 'drivers/gpu/drm/i915/i915_dma.c')
-rw-r--r-- | drivers/gpu/drm/i915/i915_dma.c | 21 |
1 files changed, 19 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index 4d56dfd25e04..27a1f78a7f1a 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c | |||
@@ -84,7 +84,7 @@ static int i915_dma_cleanup(struct drm_device * dev) | |||
84 | * may not have been called from userspace and after dev_private | 84 | * may not have been called from userspace and after dev_private |
85 | * is freed, it's too late. | 85 | * is freed, it's too late. |
86 | */ | 86 | */ |
87 | if (dev->irq) | 87 | if (dev->irq_enabled) |
88 | drm_irq_uninstall(dev); | 88 | drm_irq_uninstall(dev); |
89 | 89 | ||
90 | if (dev_priv->ring.virtual_start) { | 90 | if (dev_priv->ring.virtual_start) { |
@@ -644,7 +644,7 @@ static int i915_getparam(struct drm_device *dev, void *data, | |||
644 | 644 | ||
645 | switch (param->param) { | 645 | switch (param->param) { |
646 | case I915_PARAM_IRQ_ACTIVE: | 646 | case I915_PARAM_IRQ_ACTIVE: |
647 | value = dev->irq ? 1 : 0; | 647 | value = dev->irq_enabled; |
648 | break; | 648 | break; |
649 | case I915_PARAM_ALLOW_BATCHBUFFER: | 649 | case I915_PARAM_ALLOW_BATCHBUFFER: |
650 | value = dev_priv->allow_batchbuffer ? 1 : 0; | 650 | value = dev_priv->allow_batchbuffer ? 1 : 0; |
@@ -763,6 +763,20 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) | |||
763 | ret = drm_addmap(dev, base, size, _DRM_REGISTERS, | 763 | ret = drm_addmap(dev, base, size, _DRM_REGISTERS, |
764 | _DRM_KERNEL | _DRM_DRIVER, | 764 | _DRM_KERNEL | _DRM_DRIVER, |
765 | &dev_priv->mmio_map); | 765 | &dev_priv->mmio_map); |
766 | |||
767 | |||
768 | /* On the 945G/GM, the chipset reports the MSI capability on the | ||
769 | * integrated graphics even though the support isn't actually there | ||
770 | * according to the published specs. It doesn't appear to function | ||
771 | * correctly in testing on 945G. | ||
772 | * This may be a side effect of MSI having been made available for PEG | ||
773 | * and the registers being closely associated. | ||
774 | */ | ||
775 | if (!IS_I945G(dev) && !IS_I945GM(dev)) | ||
776 | pci_enable_msi(dev->pdev); | ||
777 | |||
778 | spin_lock_init(&dev_priv->user_irq_lock); | ||
779 | |||
766 | return ret; | 780 | return ret; |
767 | } | 781 | } |
768 | 782 | ||
@@ -770,6 +784,9 @@ int i915_driver_unload(struct drm_device *dev) | |||
770 | { | 784 | { |
771 | struct drm_i915_private *dev_priv = dev->dev_private; | 785 | struct drm_i915_private *dev_priv = dev->dev_private; |
772 | 786 | ||
787 | if (dev->pdev->msi_enabled) | ||
788 | pci_disable_msi(dev->pdev); | ||
789 | |||
773 | if (dev_priv->mmio_map) | 790 | if (dev_priv->mmio_map) |
774 | drm_rmmap(dev, dev_priv->mmio_map); | 791 | drm_rmmap(dev, dev_priv->mmio_map); |
775 | 792 | ||