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-rw-r--r--drivers/edac/i7core_edac.c21
1 files changed, 12 insertions, 9 deletions
diff --git a/drivers/edac/i7core_edac.c b/drivers/edac/i7core_edac.c
index 335d9ed02c45..2c30493eae0f 100644
--- a/drivers/edac/i7core_edac.c
+++ b/drivers/edac/i7core_edac.c
@@ -1270,11 +1270,10 @@ int i7core_get_onedevice(struct pci_dev **prev, int devno)
1270 return -ENODEV; 1270 return -ENODEV;
1271 } 1271 }
1272 1272
1273 i7core_printk(KERN_INFO, 1273 debugf0("Detected socket %d dev %02x:%02x.%d PCI ID %04x:%04x\n",
1274 "Registered socket %d " 1274 socket, bus, pci_dev_descr[devno].dev,
1275 "dev %02x:%02x.%d PCI ID %04x:%04x\n", 1275 pci_dev_descr[devno].func,
1276 socket, bus, pci_dev_descr[devno].dev, pci_dev_descr[devno].func, 1276 PCI_VENDOR_ID_INTEL, pci_dev_descr[devno].dev_id);
1277 PCI_VENDOR_ID_INTEL, pci_dev_descr[devno].dev_id);
1278 1277
1279 *prev = pdev; 1278 *prev = pdev;
1280 1279
@@ -1713,7 +1712,8 @@ static int i7core_register_mci(struct i7core_dev *i7core_dev,
1713 int rc; 1712 int rc;
1714 1713
1715 /* allocate a new MC control structure */ 1714 /* allocate a new MC control structure */
1716 mci = edac_mc_alloc(sizeof(*pvt), num_csrows, num_channels, 0); 1715 mci = edac_mc_alloc(sizeof(*pvt), num_csrows, num_channels,
1716 i7core_dev->socket);
1717 if (unlikely(!mci)) 1717 if (unlikely(!mci))
1718 return -ENOMEM; 1718 return -ENOMEM;
1719 1719
@@ -1724,7 +1724,6 @@ static int i7core_register_mci(struct i7core_dev *i7core_dev,
1724 1724
1725 pvt = mci->pvt_info; 1725 pvt = mci->pvt_info;
1726 memset(pvt, 0, sizeof(*pvt)); 1726 memset(pvt, 0, sizeof(*pvt));
1727 mci->mc_idx = 0;
1728 1727
1729 /* 1728 /*
1730 * FIXME: how to handle RDDR3 at MCI level? It is possible to have 1729 * FIXME: how to handle RDDR3 at MCI level? It is possible to have
@@ -1815,7 +1814,7 @@ static int __devinit i7core_probe(struct pci_dev *pdev,
1815 struct i7core_dev *i7core_dev; 1814 struct i7core_dev *i7core_dev;
1816 1815
1817 /* 1816 /*
1818 * FIXME: All memory controllers are allocated at the first pass. 1817 * All memory controllers are allocated at the first pass.
1819 */ 1818 */
1820 if (unlikely(dev_idx >= 1)) 1819 if (unlikely(dev_idx >= 1))
1821 return -EINVAL; 1820 return -EINVAL;
@@ -1836,7 +1835,9 @@ static int __devinit i7core_probe(struct pci_dev *pdev,
1836 if (unlikely(rc < 0)) 1835 if (unlikely(rc < 0))
1837 goto fail1; 1836 goto fail1;
1838 1837
1839 i7core_register_mci(i7core_dev, channels, csrows); 1838 rc = i7core_register_mci(i7core_dev, channels, csrows);
1839 if (unlikely(rc < 0))
1840 goto fail1;
1840 } 1841 }
1841 1842
1842 i7core_printk(KERN_INFO, "Driver loaded.\n"); 1843 i7core_printk(KERN_INFO, "Driver loaded.\n");
@@ -1876,6 +1877,8 @@ static void __devexit i7core_remove(struct pci_dev *pdev)
1876 1877
1877 /* retrieve references to resources, and free those resources */ 1878 /* retrieve references to resources, and free those resources */
1878 mutex_lock(&i7core_edac_lock); 1879 mutex_lock(&i7core_edac_lock);
1880
1881 /* FIXME: This should put the devices only for this mci!!! */
1879 i7core_put_devices(); 1882 i7core_put_devices();
1880 mutex_unlock(&i7core_edac_lock); 1883 mutex_unlock(&i7core_edac_lock);
1881 1884