aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/edac/i7300_edac.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/edac/i7300_edac.c')
-rw-r--r--drivers/edac/i7300_edac.c173
1 files changed, 79 insertions, 94 deletions
diff --git a/drivers/edac/i7300_edac.c b/drivers/edac/i7300_edac.c
index 97c22fd650ee..a09d0667f72a 100644
--- a/drivers/edac/i7300_edac.c
+++ b/drivers/edac/i7300_edac.c
@@ -182,24 +182,6 @@ static const u16 mtr_regs[MAX_SLOTS] = {
182#define MTR_DIMM_COLS(mtr) ((mtr) & 0x3) 182#define MTR_DIMM_COLS(mtr) ((mtr) & 0x3)
183#define MTR_DIMM_COLS_ADDR_BITS(mtr) (MTR_DIMM_COLS(mtr) + 10) 183#define MTR_DIMM_COLS_ADDR_BITS(mtr) (MTR_DIMM_COLS(mtr) + 10)
184 184
185#ifdef CONFIG_EDAC_DEBUG
186/* MTR NUMROW */
187static const char *numrow_toString[] = {
188 "8,192 - 13 rows",
189 "16,384 - 14 rows",
190 "32,768 - 15 rows",
191 "65,536 - 16 rows"
192};
193
194/* MTR NUMCOL */
195static const char *numcol_toString[] = {
196 "1,024 - 10 columns",
197 "2,048 - 11 columns",
198 "4,096 - 12 columns",
199 "reserved"
200};
201#endif
202
203/************************************************ 185/************************************************
204 * i7300 Register definitions for error detection 186 * i7300 Register definitions for error detection
205 ************************************************/ 187 ************************************************/
@@ -467,10 +449,10 @@ static void i7300_process_fbd_error(struct mem_ctl_info *mci)
467 "Bank=%d RAS=%d CAS=%d Err=0x%lx (%s))", 449 "Bank=%d RAS=%d CAS=%d Err=0x%lx (%s))",
468 bank, ras, cas, errors, specific); 450 bank, ras, cas, errors, specific);
469 451
470 edac_mc_handle_error(HW_EVENT_ERR_FATAL, mci, 0, 0, 0, 452 edac_mc_handle_error(HW_EVENT_ERR_FATAL, mci, 1, 0, 0, 0,
471 branch, -1, rank, 453 branch, -1, rank,
472 is_wr ? "Write error" : "Read error", 454 is_wr ? "Write error" : "Read error",
473 pvt->tmp_prt_buffer, NULL); 455 pvt->tmp_prt_buffer);
474 456
475 } 457 }
476 458
@@ -513,11 +495,11 @@ static void i7300_process_fbd_error(struct mem_ctl_info *mci)
513 "DRAM-Bank=%d RAS=%d CAS=%d, Err=0x%lx (%s))", 495 "DRAM-Bank=%d RAS=%d CAS=%d, Err=0x%lx (%s))",
514 bank, ras, cas, errors, specific); 496 bank, ras, cas, errors, specific);
515 497
516 edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 0, 0, 498 edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 1, 0, 0,
517 syndrome, 499 syndrome,
518 branch >> 1, channel % 2, rank, 500 branch >> 1, channel % 2, rank,
519 is_wr ? "Write error" : "Read error", 501 is_wr ? "Write error" : "Read error",
520 pvt->tmp_prt_buffer, NULL); 502 pvt->tmp_prt_buffer);
521 } 503 }
522 return; 504 return;
523} 505}
@@ -614,9 +596,8 @@ static int decode_mtr(struct i7300_pvt *pvt,
614 mtr = pvt->mtr[slot][branch]; 596 mtr = pvt->mtr[slot][branch];
615 ans = MTR_DIMMS_PRESENT(mtr) ? 1 : 0; 597 ans = MTR_DIMMS_PRESENT(mtr) ? 1 : 0;
616 598
617 debugf2("\tMTR%d CH%d: DIMMs are %s (mtr)\n", 599 edac_dbg(2, "\tMTR%d CH%d: DIMMs are %sPresent (mtr)\n",
618 slot, channel, 600 slot, channel, ans ? "" : "NOT ");
619 ans ? "Present" : "NOT Present");
620 601
621 /* Determine if there is a DIMM present in this DIMM slot */ 602 /* Determine if there is a DIMM present in this DIMM slot */
622 if (!ans) 603 if (!ans)
@@ -638,16 +619,25 @@ static int decode_mtr(struct i7300_pvt *pvt,
638 619
639 dinfo->megabytes = 1 << addrBits; 620 dinfo->megabytes = 1 << addrBits;
640 621
641 debugf2("\t\tWIDTH: x%d\n", MTR_DRAM_WIDTH(mtr)); 622 edac_dbg(2, "\t\tWIDTH: x%d\n", MTR_DRAM_WIDTH(mtr));
642 623
643 debugf2("\t\tELECTRICAL THROTTLING is %s\n", 624 edac_dbg(2, "\t\tELECTRICAL THROTTLING is %s\n",
644 MTR_DIMMS_ETHROTTLE(mtr) ? "enabled" : "disabled"); 625 MTR_DIMMS_ETHROTTLE(mtr) ? "enabled" : "disabled");
645 626
646 debugf2("\t\tNUMBANK: %d bank(s)\n", MTR_DRAM_BANKS(mtr)); 627 edac_dbg(2, "\t\tNUMBANK: %d bank(s)\n", MTR_DRAM_BANKS(mtr));
647 debugf2("\t\tNUMRANK: %s\n", MTR_DIMM_RANKS(mtr) ? "double" : "single"); 628 edac_dbg(2, "\t\tNUMRANK: %s\n",
648 debugf2("\t\tNUMROW: %s\n", numrow_toString[MTR_DIMM_ROWS(mtr)]); 629 MTR_DIMM_RANKS(mtr) ? "double" : "single");
649 debugf2("\t\tNUMCOL: %s\n", numcol_toString[MTR_DIMM_COLS(mtr)]); 630 edac_dbg(2, "\t\tNUMROW: %s\n",
650 debugf2("\t\tSIZE: %d MB\n", dinfo->megabytes); 631 MTR_DIMM_ROWS(mtr) == 0 ? "8,192 - 13 rows" :
632 MTR_DIMM_ROWS(mtr) == 1 ? "16,384 - 14 rows" :
633 MTR_DIMM_ROWS(mtr) == 2 ? "32,768 - 15 rows" :
634 "65,536 - 16 rows");
635 edac_dbg(2, "\t\tNUMCOL: %s\n",
636 MTR_DIMM_COLS(mtr) == 0 ? "1,024 - 10 columns" :
637 MTR_DIMM_COLS(mtr) == 1 ? "2,048 - 11 columns" :
638 MTR_DIMM_COLS(mtr) == 2 ? "4,096 - 12 columns" :
639 "reserved");
640 edac_dbg(2, "\t\tSIZE: %d MB\n", dinfo->megabytes);
651 641
652 /* 642 /*
653 * The type of error detection actually depends of the 643 * The type of error detection actually depends of the
@@ -663,9 +653,9 @@ static int decode_mtr(struct i7300_pvt *pvt,
663 dimm->mtype = MEM_FB_DDR2; 653 dimm->mtype = MEM_FB_DDR2;
664 if (IS_SINGLE_MODE(pvt->mc_settings_a)) { 654 if (IS_SINGLE_MODE(pvt->mc_settings_a)) {
665 dimm->edac_mode = EDAC_SECDED; 655 dimm->edac_mode = EDAC_SECDED;
666 debugf2("\t\tECC code is 8-byte-over-32-byte SECDED+ code\n"); 656 edac_dbg(2, "\t\tECC code is 8-byte-over-32-byte SECDED+ code\n");
667 } else { 657 } else {
668 debugf2("\t\tECC code is on Lockstep mode\n"); 658 edac_dbg(2, "\t\tECC code is on Lockstep mode\n");
669 if (MTR_DRAM_WIDTH(mtr) == 8) 659 if (MTR_DRAM_WIDTH(mtr) == 8)
670 dimm->edac_mode = EDAC_S8ECD8ED; 660 dimm->edac_mode = EDAC_S8ECD8ED;
671 else 661 else
@@ -674,9 +664,9 @@ static int decode_mtr(struct i7300_pvt *pvt,
674 664
675 /* ask what device type on this row */ 665 /* ask what device type on this row */
676 if (MTR_DRAM_WIDTH(mtr) == 8) { 666 if (MTR_DRAM_WIDTH(mtr) == 8) {
677 debugf2("\t\tScrub algorithm for x8 is on %s mode\n", 667 edac_dbg(2, "\t\tScrub algorithm for x8 is on %s mode\n",
678 IS_SCRBALGO_ENHANCED(pvt->mc_settings) ? 668 IS_SCRBALGO_ENHANCED(pvt->mc_settings) ?
679 "enhanced" : "normal"); 669 "enhanced" : "normal");
680 670
681 dimm->dtype = DEV_X8; 671 dimm->dtype = DEV_X8;
682 } else 672 } else
@@ -710,14 +700,14 @@ static void print_dimm_size(struct i7300_pvt *pvt)
710 p += n; 700 p += n;
711 space -= n; 701 space -= n;
712 } 702 }
713 debugf2("%s\n", pvt->tmp_prt_buffer); 703 edac_dbg(2, "%s\n", pvt->tmp_prt_buffer);
714 p = pvt->tmp_prt_buffer; 704 p = pvt->tmp_prt_buffer;
715 space = PAGE_SIZE; 705 space = PAGE_SIZE;
716 n = snprintf(p, space, "-------------------------------" 706 n = snprintf(p, space, "-------------------------------"
717 "------------------------------"); 707 "------------------------------");
718 p += n; 708 p += n;
719 space -= n; 709 space -= n;
720 debugf2("%s\n", pvt->tmp_prt_buffer); 710 edac_dbg(2, "%s\n", pvt->tmp_prt_buffer);
721 p = pvt->tmp_prt_buffer; 711 p = pvt->tmp_prt_buffer;
722 space = PAGE_SIZE; 712 space = PAGE_SIZE;
723 713
@@ -733,7 +723,7 @@ static void print_dimm_size(struct i7300_pvt *pvt)
733 space -= n; 723 space -= n;
734 } 724 }
735 725
736 debugf2("%s\n", pvt->tmp_prt_buffer); 726 edac_dbg(2, "%s\n", pvt->tmp_prt_buffer);
737 p = pvt->tmp_prt_buffer; 727 p = pvt->tmp_prt_buffer;
738 space = PAGE_SIZE; 728 space = PAGE_SIZE;
739 } 729 }
@@ -742,7 +732,7 @@ static void print_dimm_size(struct i7300_pvt *pvt)
742 "------------------------------"); 732 "------------------------------");
743 p += n; 733 p += n;
744 space -= n; 734 space -= n;
745 debugf2("%s\n", pvt->tmp_prt_buffer); 735 edac_dbg(2, "%s\n", pvt->tmp_prt_buffer);
746 p = pvt->tmp_prt_buffer; 736 p = pvt->tmp_prt_buffer;
747 space = PAGE_SIZE; 737 space = PAGE_SIZE;
748#endif 738#endif
@@ -765,7 +755,7 @@ static int i7300_init_csrows(struct mem_ctl_info *mci)
765 755
766 pvt = mci->pvt_info; 756 pvt = mci->pvt_info;
767 757
768 debugf2("Memory Technology Registers:\n"); 758 edac_dbg(2, "Memory Technology Registers:\n");
769 759
770 /* Get the AMB present registers for the four channels */ 760 /* Get the AMB present registers for the four channels */
771 for (branch = 0; branch < MAX_BRANCHES; branch++) { 761 for (branch = 0; branch < MAX_BRANCHES; branch++) {
@@ -774,15 +764,15 @@ static int i7300_init_csrows(struct mem_ctl_info *mci)
774 pci_read_config_word(pvt->pci_dev_2x_0_fbd_branch[branch], 764 pci_read_config_word(pvt->pci_dev_2x_0_fbd_branch[branch],
775 AMBPRESENT_0, 765 AMBPRESENT_0,
776 &pvt->ambpresent[channel]); 766 &pvt->ambpresent[channel]);
777 debugf2("\t\tAMB-present CH%d = 0x%x:\n", 767 edac_dbg(2, "\t\tAMB-present CH%d = 0x%x:\n",
778 channel, pvt->ambpresent[channel]); 768 channel, pvt->ambpresent[channel]);
779 769
780 channel = to_channel(1, branch); 770 channel = to_channel(1, branch);
781 pci_read_config_word(pvt->pci_dev_2x_0_fbd_branch[branch], 771 pci_read_config_word(pvt->pci_dev_2x_0_fbd_branch[branch],
782 AMBPRESENT_1, 772 AMBPRESENT_1,
783 &pvt->ambpresent[channel]); 773 &pvt->ambpresent[channel]);
784 debugf2("\t\tAMB-present CH%d = 0x%x:\n", 774 edac_dbg(2, "\t\tAMB-present CH%d = 0x%x:\n",
785 channel, pvt->ambpresent[channel]); 775 channel, pvt->ambpresent[channel]);
786 } 776 }
787 777
788 /* Get the set of MTR[0-7] regs by each branch */ 778 /* Get the set of MTR[0-7] regs by each branch */
@@ -824,12 +814,11 @@ static int i7300_init_csrows(struct mem_ctl_info *mci)
824static void decode_mir(int mir_no, u16 mir[MAX_MIR]) 814static void decode_mir(int mir_no, u16 mir[MAX_MIR])
825{ 815{
826 if (mir[mir_no] & 3) 816 if (mir[mir_no] & 3)
827 debugf2("MIR%d: limit= 0x%x Branch(es) that participate:" 817 edac_dbg(2, "MIR%d: limit= 0x%x Branch(es) that participate: %s %s\n",
828 " %s %s\n", 818 mir_no,
829 mir_no, 819 (mir[mir_no] >> 4) & 0xfff,
830 (mir[mir_no] >> 4) & 0xfff, 820 (mir[mir_no] & 1) ? "B0" : "",
831 (mir[mir_no] & 1) ? "B0" : "", 821 (mir[mir_no] & 2) ? "B1" : "");
832 (mir[mir_no] & 2) ? "B1" : "");
833} 822}
834 823
835/** 824/**
@@ -849,17 +838,17 @@ static int i7300_get_mc_regs(struct mem_ctl_info *mci)
849 pci_read_config_dword(pvt->pci_dev_16_0_fsb_ctlr, AMBASE, 838 pci_read_config_dword(pvt->pci_dev_16_0_fsb_ctlr, AMBASE,
850 (u32 *) &pvt->ambase); 839 (u32 *) &pvt->ambase);
851 840
852 debugf2("AMBASE= 0x%lx\n", (long unsigned int)pvt->ambase); 841 edac_dbg(2, "AMBASE= 0x%lx\n", (long unsigned int)pvt->ambase);
853 842
854 /* Get the Branch Map regs */ 843 /* Get the Branch Map regs */
855 pci_read_config_word(pvt->pci_dev_16_1_fsb_addr_map, TOLM, &pvt->tolm); 844 pci_read_config_word(pvt->pci_dev_16_1_fsb_addr_map, TOLM, &pvt->tolm);
856 pvt->tolm >>= 12; 845 pvt->tolm >>= 12;
857 debugf2("TOLM (number of 256M regions) =%u (0x%x)\n", pvt->tolm, 846 edac_dbg(2, "TOLM (number of 256M regions) =%u (0x%x)\n",
858 pvt->tolm); 847 pvt->tolm, pvt->tolm);
859 848
860 actual_tolm = (u32) ((1000l * pvt->tolm) >> (30 - 28)); 849 actual_tolm = (u32) ((1000l * pvt->tolm) >> (30 - 28));
861 debugf2("Actual TOLM byte addr=%u.%03u GB (0x%x)\n", 850 edac_dbg(2, "Actual TOLM byte addr=%u.%03u GB (0x%x)\n",
862 actual_tolm/1000, actual_tolm % 1000, pvt->tolm << 28); 851 actual_tolm/1000, actual_tolm % 1000, pvt->tolm << 28);
863 852
864 /* Get memory controller settings */ 853 /* Get memory controller settings */
865 pci_read_config_dword(pvt->pci_dev_16_1_fsb_addr_map, MC_SETTINGS, 854 pci_read_config_dword(pvt->pci_dev_16_1_fsb_addr_map, MC_SETTINGS,
@@ -868,15 +857,15 @@ static int i7300_get_mc_regs(struct mem_ctl_info *mci)
868 &pvt->mc_settings_a); 857 &pvt->mc_settings_a);
869 858
870 if (IS_SINGLE_MODE(pvt->mc_settings_a)) 859 if (IS_SINGLE_MODE(pvt->mc_settings_a))
871 debugf0("Memory controller operating on single mode\n"); 860 edac_dbg(0, "Memory controller operating on single mode\n");
872 else 861 else
873 debugf0("Memory controller operating on %s mode\n", 862 edac_dbg(0, "Memory controller operating on %smirrored mode\n",
874 IS_MIRRORED(pvt->mc_settings) ? "mirrored" : "non-mirrored"); 863 IS_MIRRORED(pvt->mc_settings) ? "" : "non-");
875 864
876 debugf0("Error detection is %s\n", 865 edac_dbg(0, "Error detection is %s\n",
877 IS_ECC_ENABLED(pvt->mc_settings) ? "enabled" : "disabled"); 866 IS_ECC_ENABLED(pvt->mc_settings) ? "enabled" : "disabled");
878 debugf0("Retry is %s\n", 867 edac_dbg(0, "Retry is %s\n",
879 IS_RETRY_ENABLED(pvt->mc_settings) ? "enabled" : "disabled"); 868 IS_RETRY_ENABLED(pvt->mc_settings) ? "enabled" : "disabled");
880 869
881 /* Get Memory Interleave Range registers */ 870 /* Get Memory Interleave Range registers */
882 pci_read_config_word(pvt->pci_dev_16_1_fsb_addr_map, MIR0, 871 pci_read_config_word(pvt->pci_dev_16_1_fsb_addr_map, MIR0,
@@ -970,18 +959,18 @@ static int __devinit i7300_get_devices(struct mem_ctl_info *mci)
970 } 959 }
971 } 960 }
972 961
973 debugf1("System Address, processor bus- PCI Bus ID: %s %x:%x\n", 962 edac_dbg(1, "System Address, processor bus- PCI Bus ID: %s %x:%x\n",
974 pci_name(pvt->pci_dev_16_0_fsb_ctlr), 963 pci_name(pvt->pci_dev_16_0_fsb_ctlr),
975 pvt->pci_dev_16_0_fsb_ctlr->vendor, 964 pvt->pci_dev_16_0_fsb_ctlr->vendor,
976 pvt->pci_dev_16_0_fsb_ctlr->device); 965 pvt->pci_dev_16_0_fsb_ctlr->device);
977 debugf1("Branchmap, control and errors - PCI Bus ID: %s %x:%x\n", 966 edac_dbg(1, "Branchmap, control and errors - PCI Bus ID: %s %x:%x\n",
978 pci_name(pvt->pci_dev_16_1_fsb_addr_map), 967 pci_name(pvt->pci_dev_16_1_fsb_addr_map),
979 pvt->pci_dev_16_1_fsb_addr_map->vendor, 968 pvt->pci_dev_16_1_fsb_addr_map->vendor,
980 pvt->pci_dev_16_1_fsb_addr_map->device); 969 pvt->pci_dev_16_1_fsb_addr_map->device);
981 debugf1("FSB Error Regs - PCI Bus ID: %s %x:%x\n", 970 edac_dbg(1, "FSB Error Regs - PCI Bus ID: %s %x:%x\n",
982 pci_name(pvt->pci_dev_16_2_fsb_err_regs), 971 pci_name(pvt->pci_dev_16_2_fsb_err_regs),
983 pvt->pci_dev_16_2_fsb_err_regs->vendor, 972 pvt->pci_dev_16_2_fsb_err_regs->vendor,
984 pvt->pci_dev_16_2_fsb_err_regs->device); 973 pvt->pci_dev_16_2_fsb_err_regs->device);
985 974
986 pvt->pci_dev_2x_0_fbd_branch[0] = pci_get_device(PCI_VENDOR_ID_INTEL, 975 pvt->pci_dev_2x_0_fbd_branch[0] = pci_get_device(PCI_VENDOR_ID_INTEL,
987 PCI_DEVICE_ID_INTEL_I7300_MCH_FB0, 976 PCI_DEVICE_ID_INTEL_I7300_MCH_FB0,
@@ -1032,10 +1021,9 @@ static int __devinit i7300_init_one(struct pci_dev *pdev,
1032 if (rc == -EIO) 1021 if (rc == -EIO)
1033 return rc; 1022 return rc;
1034 1023
1035 debugf0("MC: " __FILE__ ": %s(), pdev bus %u dev=0x%x fn=0x%x\n", 1024 edac_dbg(0, "MC: pdev bus %u dev=0x%x fn=0x%x\n",
1036 __func__, 1025 pdev->bus->number,
1037 pdev->bus->number, 1026 PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn));
1038 PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn));
1039 1027
1040 /* We only are looking for func 0 of the set */ 1028 /* We only are looking for func 0 of the set */
1041 if (PCI_FUNC(pdev->devfn) != 0) 1029 if (PCI_FUNC(pdev->devfn) != 0)
@@ -1055,9 +1043,9 @@ static int __devinit i7300_init_one(struct pci_dev *pdev,
1055 if (mci == NULL) 1043 if (mci == NULL)
1056 return -ENOMEM; 1044 return -ENOMEM;
1057 1045
1058 debugf0("MC: " __FILE__ ": %s(): mci = %p\n", __func__, mci); 1046 edac_dbg(0, "MC: mci = %p\n", mci);
1059 1047
1060 mci->dev = &pdev->dev; /* record ptr to the generic device */ 1048 mci->pdev = &pdev->dev; /* record ptr to the generic device */
1061 1049
1062 pvt = mci->pvt_info; 1050 pvt = mci->pvt_info;
1063 pvt->pci_dev_16_0_fsb_ctlr = pdev; /* Record this device in our private */ 1051 pvt->pci_dev_16_0_fsb_ctlr = pdev; /* Record this device in our private */
@@ -1088,19 +1076,16 @@ static int __devinit i7300_init_one(struct pci_dev *pdev,
1088 /* initialize the MC control structure 'csrows' table 1076 /* initialize the MC control structure 'csrows' table
1089 * with the mapping and control information */ 1077 * with the mapping and control information */
1090 if (i7300_get_mc_regs(mci)) { 1078 if (i7300_get_mc_regs(mci)) {
1091 debugf0("MC: Setting mci->edac_cap to EDAC_FLAG_NONE\n" 1079 edac_dbg(0, "MC: Setting mci->edac_cap to EDAC_FLAG_NONE because i7300_init_csrows() returned nonzero value\n");
1092 " because i7300_init_csrows() returned nonzero "
1093 "value\n");
1094 mci->edac_cap = EDAC_FLAG_NONE; /* no csrows found */ 1080 mci->edac_cap = EDAC_FLAG_NONE; /* no csrows found */
1095 } else { 1081 } else {
1096 debugf1("MC: Enable error reporting now\n"); 1082 edac_dbg(1, "MC: Enable error reporting now\n");
1097 i7300_enable_error_reporting(mci); 1083 i7300_enable_error_reporting(mci);
1098 } 1084 }
1099 1085
1100 /* add this new MC control structure to EDAC's list of MCs */ 1086 /* add this new MC control structure to EDAC's list of MCs */
1101 if (edac_mc_add_mc(mci)) { 1087 if (edac_mc_add_mc(mci)) {
1102 debugf0("MC: " __FILE__ 1088 edac_dbg(0, "MC: failed edac_mc_add_mc()\n");
1103 ": %s(): failed edac_mc_add_mc()\n", __func__);
1104 /* FIXME: perhaps some code should go here that disables error 1089 /* FIXME: perhaps some code should go here that disables error
1105 * reporting if we just enabled it 1090 * reporting if we just enabled it
1106 */ 1091 */
@@ -1142,7 +1127,7 @@ static void __devexit i7300_remove_one(struct pci_dev *pdev)
1142 struct mem_ctl_info *mci; 1127 struct mem_ctl_info *mci;
1143 char *tmp; 1128 char *tmp;
1144 1129
1145 debugf0(__FILE__ ": %s()\n", __func__); 1130 edac_dbg(0, "\n");
1146 1131
1147 if (i7300_pci) 1132 if (i7300_pci)
1148 edac_pci_release_generic_ctl(i7300_pci); 1133 edac_pci_release_generic_ctl(i7300_pci);
@@ -1189,7 +1174,7 @@ static int __init i7300_init(void)
1189{ 1174{
1190 int pci_rc; 1175 int pci_rc;
1191 1176
1192 debugf2("MC: " __FILE__ ": %s()\n", __func__); 1177 edac_dbg(2, "\n");
1193 1178
1194 /* Ensure that the OPSTATE is set correctly for POLL or NMI */ 1179 /* Ensure that the OPSTATE is set correctly for POLL or NMI */
1195 opstate_init(); 1180 opstate_init();
@@ -1204,7 +1189,7 @@ static int __init i7300_init(void)
1204 */ 1189 */
1205static void __exit i7300_exit(void) 1190static void __exit i7300_exit(void)
1206{ 1191{
1207 debugf2("MC: " __FILE__ ": %s()\n", __func__); 1192 edac_dbg(2, "\n");
1208 pci_unregister_driver(&i7300_driver); 1193 pci_unregister_driver(&i7300_driver);
1209} 1194}
1210 1195