diff options
Diffstat (limited to 'drivers/edac/amd76x_edac.c')
-rw-r--r-- | drivers/edac/amd76x_edac.c | 34 |
1 files changed, 17 insertions, 17 deletions
diff --git a/drivers/edac/amd76x_edac.c b/drivers/edac/amd76x_edac.c index 9774d443fa57..29eeb68a200c 100644 --- a/drivers/edac/amd76x_edac.c +++ b/drivers/edac/amd76x_edac.c | |||
@@ -105,7 +105,7 @@ static void amd76x_get_error_info(struct mem_ctl_info *mci, | |||
105 | { | 105 | { |
106 | struct pci_dev *pdev; | 106 | struct pci_dev *pdev; |
107 | 107 | ||
108 | pdev = to_pci_dev(mci->dev); | 108 | pdev = to_pci_dev(mci->pdev); |
109 | pci_read_config_dword(pdev, AMD76X_ECC_MODE_STATUS, | 109 | pci_read_config_dword(pdev, AMD76X_ECC_MODE_STATUS, |
110 | &info->ecc_mode_status); | 110 | &info->ecc_mode_status); |
111 | 111 | ||
@@ -145,10 +145,10 @@ static int amd76x_process_error_info(struct mem_ctl_info *mci, | |||
145 | 145 | ||
146 | if (handle_errors) { | 146 | if (handle_errors) { |
147 | row = (info->ecc_mode_status >> 4) & 0xf; | 147 | row = (info->ecc_mode_status >> 4) & 0xf; |
148 | edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, | 148 | edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1, |
149 | mci->csrows[row].first_page, 0, 0, | 149 | mci->csrows[row]->first_page, 0, 0, |
150 | row, 0, -1, | 150 | row, 0, -1, |
151 | mci->ctl_name, "", NULL); | 151 | mci->ctl_name, ""); |
152 | } | 152 | } |
153 | } | 153 | } |
154 | 154 | ||
@@ -160,10 +160,10 @@ static int amd76x_process_error_info(struct mem_ctl_info *mci, | |||
160 | 160 | ||
161 | if (handle_errors) { | 161 | if (handle_errors) { |
162 | row = info->ecc_mode_status & 0xf; | 162 | row = info->ecc_mode_status & 0xf; |
163 | edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, | 163 | edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 1, |
164 | mci->csrows[row].first_page, 0, 0, | 164 | mci->csrows[row]->first_page, 0, 0, |
165 | row, 0, -1, | 165 | row, 0, -1, |
166 | mci->ctl_name, "", NULL); | 166 | mci->ctl_name, ""); |
167 | } | 167 | } |
168 | } | 168 | } |
169 | 169 | ||
@@ -180,7 +180,7 @@ static int amd76x_process_error_info(struct mem_ctl_info *mci, | |||
180 | static void amd76x_check(struct mem_ctl_info *mci) | 180 | static void amd76x_check(struct mem_ctl_info *mci) |
181 | { | 181 | { |
182 | struct amd76x_error_info info; | 182 | struct amd76x_error_info info; |
183 | debugf3("%s()\n", __func__); | 183 | edac_dbg(3, "\n"); |
184 | amd76x_get_error_info(mci, &info); | 184 | amd76x_get_error_info(mci, &info); |
185 | amd76x_process_error_info(mci, &info, 1); | 185 | amd76x_process_error_info(mci, &info, 1); |
186 | } | 186 | } |
@@ -194,8 +194,8 @@ static void amd76x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, | |||
194 | int index; | 194 | int index; |
195 | 195 | ||
196 | for (index = 0; index < mci->nr_csrows; index++) { | 196 | for (index = 0; index < mci->nr_csrows; index++) { |
197 | csrow = &mci->csrows[index]; | 197 | csrow = mci->csrows[index]; |
198 | dimm = csrow->channels[0].dimm; | 198 | dimm = csrow->channels[0]->dimm; |
199 | 199 | ||
200 | /* find the DRAM Chip Select Base address and mask */ | 200 | /* find the DRAM Chip Select Base address and mask */ |
201 | pci_read_config_dword(pdev, | 201 | pci_read_config_dword(pdev, |
@@ -241,7 +241,7 @@ static int amd76x_probe1(struct pci_dev *pdev, int dev_idx) | |||
241 | u32 ems_mode; | 241 | u32 ems_mode; |
242 | struct amd76x_error_info discard; | 242 | struct amd76x_error_info discard; |
243 | 243 | ||
244 | debugf0("%s()\n", __func__); | 244 | edac_dbg(0, "\n"); |
245 | pci_read_config_dword(pdev, AMD76X_ECC_MODE_STATUS, &ems); | 245 | pci_read_config_dword(pdev, AMD76X_ECC_MODE_STATUS, &ems); |
246 | ems_mode = (ems >> 10) & 0x3; | 246 | ems_mode = (ems >> 10) & 0x3; |
247 | 247 | ||
@@ -256,8 +256,8 @@ static int amd76x_probe1(struct pci_dev *pdev, int dev_idx) | |||
256 | if (mci == NULL) | 256 | if (mci == NULL) |
257 | return -ENOMEM; | 257 | return -ENOMEM; |
258 | 258 | ||
259 | debugf0("%s(): mci = %p\n", __func__, mci); | 259 | edac_dbg(0, "mci = %p\n", mci); |
260 | mci->dev = &pdev->dev; | 260 | mci->pdev = &pdev->dev; |
261 | mci->mtype_cap = MEM_FLAG_RDDR; | 261 | mci->mtype_cap = MEM_FLAG_RDDR; |
262 | mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_EC | EDAC_FLAG_SECDED; | 262 | mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_EC | EDAC_FLAG_SECDED; |
263 | mci->edac_cap = ems_mode ? | 263 | mci->edac_cap = ems_mode ? |
@@ -276,7 +276,7 @@ static int amd76x_probe1(struct pci_dev *pdev, int dev_idx) | |||
276 | * type of memory controller. The ID is therefore hardcoded to 0. | 276 | * type of memory controller. The ID is therefore hardcoded to 0. |
277 | */ | 277 | */ |
278 | if (edac_mc_add_mc(mci)) { | 278 | if (edac_mc_add_mc(mci)) { |
279 | debugf3("%s(): failed edac_mc_add_mc()\n", __func__); | 279 | edac_dbg(3, "failed edac_mc_add_mc()\n"); |
280 | goto fail; | 280 | goto fail; |
281 | } | 281 | } |
282 | 282 | ||
@@ -292,7 +292,7 @@ static int amd76x_probe1(struct pci_dev *pdev, int dev_idx) | |||
292 | } | 292 | } |
293 | 293 | ||
294 | /* get this far and it's successful */ | 294 | /* get this far and it's successful */ |
295 | debugf3("%s(): success\n", __func__); | 295 | edac_dbg(3, "success\n"); |
296 | return 0; | 296 | return 0; |
297 | 297 | ||
298 | fail: | 298 | fail: |
@@ -304,7 +304,7 @@ fail: | |||
304 | static int __devinit amd76x_init_one(struct pci_dev *pdev, | 304 | static int __devinit amd76x_init_one(struct pci_dev *pdev, |
305 | const struct pci_device_id *ent) | 305 | const struct pci_device_id *ent) |
306 | { | 306 | { |
307 | debugf0("%s()\n", __func__); | 307 | edac_dbg(0, "\n"); |
308 | 308 | ||
309 | /* don't need to call pci_enable_device() */ | 309 | /* don't need to call pci_enable_device() */ |
310 | return amd76x_probe1(pdev, ent->driver_data); | 310 | return amd76x_probe1(pdev, ent->driver_data); |
@@ -322,7 +322,7 @@ static void __devexit amd76x_remove_one(struct pci_dev *pdev) | |||
322 | { | 322 | { |
323 | struct mem_ctl_info *mci; | 323 | struct mem_ctl_info *mci; |
324 | 324 | ||
325 | debugf0("%s()\n", __func__); | 325 | edac_dbg(0, "\n"); |
326 | 326 | ||
327 | if (amd76x_pci) | 327 | if (amd76x_pci) |
328 | edac_pci_release_generic_ctl(amd76x_pci); | 328 | edac_pci_release_generic_ctl(amd76x_pci); |