aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/cpufreq
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/cpufreq')
-rw-r--r--drivers/cpufreq/cpufreq-imx6.c17
1 files changed, 0 insertions, 17 deletions
diff --git a/drivers/cpufreq/cpufreq-imx6.c b/drivers/cpufreq/cpufreq-imx6.c
index 24dfa7a4b1f7..51861d668ee3 100644
--- a/drivers/cpufreq/cpufreq-imx6.c
+++ b/drivers/cpufreq/cpufreq-imx6.c
@@ -156,28 +156,11 @@ static int imx6_set_target(struct cpufreq_policy *policy,
156 * - Reprogram pll1_sys_clk and reparent pll1_sw_clk back to it 156 * - Reprogram pll1_sys_clk and reparent pll1_sw_clk back to it
157 * - Disable pll2_pfd2_396m_clk 157 * - Disable pll2_pfd2_396m_clk
158 */ 158 */
159 clk_prepare_enable(pll2_pfd2_396m_clk);
160 clk_set_parent(step_clk, pll2_pfd2_396m_clk); 159 clk_set_parent(step_clk, pll2_pfd2_396m_clk);
161 clk_set_parent(pll1_sw_clk, step_clk); 160 clk_set_parent(pll1_sw_clk, step_clk);
162 if (freq_hz > clk_get_rate(pll2_pfd2_396m_clk)) { 161 if (freq_hz > clk_get_rate(pll2_pfd2_396m_clk)) {
163 clk_set_rate(pll1_sys_clk, freqs.new * 1000); 162 clk_set_rate(pll1_sys_clk, freqs.new * 1000);
164 /*
165 * If we are leaving 396 MHz set-point, we need to enable
166 * pll1_sys_clk and disable pll2_pfd2_396m_clk to keep
167 * their use count correct.
168 */
169 if (freqs.old * 1000 <= clk_get_rate(pll2_pfd2_396m_clk)) {
170 clk_prepare_enable(pll1_sys_clk);
171 clk_disable_unprepare(pll2_pfd2_396m_clk);
172 }
173 clk_set_parent(pll1_sw_clk, pll1_sys_clk); 163 clk_set_parent(pll1_sw_clk, pll1_sys_clk);
174 clk_disable_unprepare(pll2_pfd2_396m_clk);
175 } else {
176 /*
177 * Disable pll1_sys_clk if pll2_pfd2_396m_clk is sufficient
178 * to provide the frequency.
179 */
180 clk_disable_unprepare(pll1_sys_clk);
181 } 164 }
182 165
183 /* Ensure the arm clock divider is what we expect */ 166 /* Ensure the arm clock divider is what we expect */