diff options
Diffstat (limited to 'drivers/ata/pata_scc.c')
-rw-r--r-- | drivers/ata/pata_scc.c | 80 |
1 files changed, 20 insertions, 60 deletions
diff --git a/drivers/ata/pata_scc.c b/drivers/ata/pata_scc.c index 4257d6b40af4..6f6193b707cb 100644 --- a/drivers/ata/pata_scc.c +++ b/drivers/ata/pata_scc.c | |||
@@ -265,7 +265,7 @@ unsigned long scc_mode_filter(struct ata_device *adev, unsigned long mask) | |||
265 | printk(KERN_INFO "%s: limit ATAPI UDMA to UDMA4\n", DRV_NAME); | 265 | printk(KERN_INFO "%s: limit ATAPI UDMA to UDMA4\n", DRV_NAME); |
266 | mask &= ~(0xE0 << ATA_SHIFT_UDMA); | 266 | mask &= ~(0xE0 << ATA_SHIFT_UDMA); |
267 | } | 267 | } |
268 | return ata_bmdma_mode_filter(adev, mask); | 268 | return mask; |
269 | } | 269 | } |
270 | 270 | ||
271 | /** | 271 | /** |
@@ -416,6 +416,17 @@ static void scc_dev_select (struct ata_port *ap, unsigned int device) | |||
416 | } | 416 | } |
417 | 417 | ||
418 | /** | 418 | /** |
419 | * scc_set_devctl - Write device control reg | ||
420 | * @ap: port where the device is | ||
421 | * @ctl: value to write | ||
422 | */ | ||
423 | |||
424 | static void scc_set_devctl(struct ata_port *ap, u8 ctl) | ||
425 | { | ||
426 | out_be32(ap->ioaddr.ctl_addr, ctl); | ||
427 | } | ||
428 | |||
429 | /** | ||
419 | * scc_bmdma_setup - Set up PCI IDE BMDMA transaction | 430 | * scc_bmdma_setup - Set up PCI IDE BMDMA transaction |
420 | * @qc: Info associated with this ATA transaction. | 431 | * @qc: Info associated with this ATA transaction. |
421 | * | 432 | * |
@@ -430,7 +441,7 @@ static void scc_bmdma_setup (struct ata_queued_cmd *qc) | |||
430 | void __iomem *mmio = ap->ioaddr.bmdma_addr; | 441 | void __iomem *mmio = ap->ioaddr.bmdma_addr; |
431 | 442 | ||
432 | /* load PRD table addr */ | 443 | /* load PRD table addr */ |
433 | out_be32(mmio + SCC_DMA_TABLE_OFS, ap->prd_dma); | 444 | out_be32(mmio + SCC_DMA_TABLE_OFS, ap->bmdma_prd_dma); |
434 | 445 | ||
435 | /* specify data direction, triple-check start bit is clear */ | 446 | /* specify data direction, triple-check start bit is clear */ |
436 | dmactl = in_be32(mmio + SCC_DMA_CMD); | 447 | dmactl = in_be32(mmio + SCC_DMA_CMD); |
@@ -501,8 +512,8 @@ static unsigned int scc_devchk (struct ata_port *ap, | |||
501 | * Note: Original code is ata_sff_wait_after_reset | 512 | * Note: Original code is ata_sff_wait_after_reset |
502 | */ | 513 | */ |
503 | 514 | ||
504 | int scc_wait_after_reset(struct ata_link *link, unsigned int devmask, | 515 | static int scc_wait_after_reset(struct ata_link *link, unsigned int devmask, |
505 | unsigned long deadline) | 516 | unsigned long deadline) |
506 | { | 517 | { |
507 | struct ata_port *ap = link->ap; | 518 | struct ata_port *ap = link->ap; |
508 | struct ata_ioports *ioaddr = &ap->ioaddr; | 519 | struct ata_ioports *ioaddr = &ap->ioaddr; |
@@ -817,54 +828,6 @@ static unsigned int scc_data_xfer (struct ata_device *dev, unsigned char *buf, | |||
817 | } | 828 | } |
818 | 829 | ||
819 | /** | 830 | /** |
820 | * scc_irq_on - Enable interrupts on a port. | ||
821 | * @ap: Port on which interrupts are enabled. | ||
822 | * | ||
823 | * Note: Original code is ata_sff_irq_on(). | ||
824 | */ | ||
825 | |||
826 | static u8 scc_irq_on (struct ata_port *ap) | ||
827 | { | ||
828 | struct ata_ioports *ioaddr = &ap->ioaddr; | ||
829 | u8 tmp; | ||
830 | |||
831 | ap->ctl &= ~ATA_NIEN; | ||
832 | ap->last_ctl = ap->ctl; | ||
833 | |||
834 | out_be32(ioaddr->ctl_addr, ap->ctl); | ||
835 | tmp = ata_wait_idle(ap); | ||
836 | |||
837 | ap->ops->sff_irq_clear(ap); | ||
838 | |||
839 | return tmp; | ||
840 | } | ||
841 | |||
842 | /** | ||
843 | * scc_freeze - Freeze BMDMA controller port | ||
844 | * @ap: port to freeze | ||
845 | * | ||
846 | * Note: Original code is ata_sff_freeze(). | ||
847 | */ | ||
848 | |||
849 | static void scc_freeze (struct ata_port *ap) | ||
850 | { | ||
851 | struct ata_ioports *ioaddr = &ap->ioaddr; | ||
852 | |||
853 | ap->ctl |= ATA_NIEN; | ||
854 | ap->last_ctl = ap->ctl; | ||
855 | |||
856 | out_be32(ioaddr->ctl_addr, ap->ctl); | ||
857 | |||
858 | /* Under certain circumstances, some controllers raise IRQ on | ||
859 | * ATA_NIEN manipulation. Also, many controllers fail to mask | ||
860 | * previously pending IRQ on ATA_NIEN assertion. Clear it. | ||
861 | */ | ||
862 | ap->ops->sff_check_status(ap); | ||
863 | |||
864 | ap->ops->sff_irq_clear(ap); | ||
865 | } | ||
866 | |||
867 | /** | ||
868 | * scc_pata_prereset - prepare for reset | 831 | * scc_pata_prereset - prepare for reset |
869 | * @ap: ATA port to be reset | 832 | * @ap: ATA port to be reset |
870 | * @deadline: deadline jiffies for the operation | 833 | * @deadline: deadline jiffies for the operation |
@@ -903,8 +866,7 @@ static void scc_postreset(struct ata_link *link, unsigned int *classes) | |||
903 | } | 866 | } |
904 | 867 | ||
905 | /* set up device control */ | 868 | /* set up device control */ |
906 | if (ap->ioaddr.ctl_addr) | 869 | out_be32(ap->ioaddr.ctl_addr, ap->ctl); |
907 | out_be32(ap->ioaddr.ctl_addr, ap->ctl); | ||
908 | 870 | ||
909 | DPRINTK("EXIT\n"); | 871 | DPRINTK("EXIT\n"); |
910 | } | 872 | } |
@@ -930,7 +892,7 @@ static void scc_irq_clear (struct ata_port *ap) | |||
930 | * scc_port_start - Set port up for dma. | 892 | * scc_port_start - Set port up for dma. |
931 | * @ap: Port to initialize | 893 | * @ap: Port to initialize |
932 | * | 894 | * |
933 | * Allocate space for PRD table using ata_port_start(). | 895 | * Allocate space for PRD table using ata_bmdma_port_start(). |
934 | * Set PRD table address for PTERADD. (PRD Transfer End Read) | 896 | * Set PRD table address for PTERADD. (PRD Transfer End Read) |
935 | */ | 897 | */ |
936 | 898 | ||
@@ -939,11 +901,11 @@ static int scc_port_start (struct ata_port *ap) | |||
939 | void __iomem *mmio = ap->ioaddr.bmdma_addr; | 901 | void __iomem *mmio = ap->ioaddr.bmdma_addr; |
940 | int rc; | 902 | int rc; |
941 | 903 | ||
942 | rc = ata_port_start(ap); | 904 | rc = ata_bmdma_port_start(ap); |
943 | if (rc) | 905 | if (rc) |
944 | return rc; | 906 | return rc; |
945 | 907 | ||
946 | out_be32(mmio + SCC_DMA_PTERADD, ap->prd_dma); | 908 | out_be32(mmio + SCC_DMA_PTERADD, ap->bmdma_prd_dma); |
947 | return 0; | 909 | return 0; |
948 | } | 910 | } |
949 | 911 | ||
@@ -978,6 +940,7 @@ static struct ata_port_operations scc_pata_ops = { | |||
978 | .sff_check_status = scc_check_status, | 940 | .sff_check_status = scc_check_status, |
979 | .sff_check_altstatus = scc_check_altstatus, | 941 | .sff_check_altstatus = scc_check_altstatus, |
980 | .sff_dev_select = scc_dev_select, | 942 | .sff_dev_select = scc_dev_select, |
943 | .sff_set_devctl = scc_set_devctl, | ||
981 | 944 | ||
982 | .bmdma_setup = scc_bmdma_setup, | 945 | .bmdma_setup = scc_bmdma_setup, |
983 | .bmdma_start = scc_bmdma_start, | 946 | .bmdma_start = scc_bmdma_start, |
@@ -985,14 +948,11 @@ static struct ata_port_operations scc_pata_ops = { | |||
985 | .bmdma_status = scc_bmdma_status, | 948 | .bmdma_status = scc_bmdma_status, |
986 | .sff_data_xfer = scc_data_xfer, | 949 | .sff_data_xfer = scc_data_xfer, |
987 | 950 | ||
988 | .freeze = scc_freeze, | ||
989 | .prereset = scc_pata_prereset, | 951 | .prereset = scc_pata_prereset, |
990 | .softreset = scc_softreset, | 952 | .softreset = scc_softreset, |
991 | .postreset = scc_postreset, | 953 | .postreset = scc_postreset, |
992 | .post_internal_cmd = scc_bmdma_stop, | ||
993 | 954 | ||
994 | .sff_irq_clear = scc_irq_clear, | 955 | .sff_irq_clear = scc_irq_clear, |
995 | .sff_irq_on = scc_irq_on, | ||
996 | 956 | ||
997 | .port_start = scc_port_start, | 957 | .port_start = scc_port_start, |
998 | .port_stop = scc_port_stop, | 958 | .port_stop = scc_port_stop, |