diff options
Diffstat (limited to 'arch')
-rw-r--r-- | arch/sh/include/asm/hwblk.h | 2 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/hwblk.c | 5 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/clock-sh7722.c | 4 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/clock-sh7723.c | 14 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/clock-sh7724.c | 16 |
5 files changed, 23 insertions, 18 deletions
diff --git a/arch/sh/include/asm/hwblk.h b/arch/sh/include/asm/hwblk.h index 5d3ccae4202b..4984d291ee0b 100644 --- a/arch/sh/include/asm/hwblk.h +++ b/arch/sh/include/asm/hwblk.h | |||
@@ -59,7 +59,7 @@ void hwblk_cnt_dec(struct hwblk_info *info, int hwblk, int cnt); | |||
59 | 59 | ||
60 | /* allow clocks to enable and disable hardware blocks */ | 60 | /* allow clocks to enable and disable hardware blocks */ |
61 | #define SH_HWBLK_CLK(_name, _id, _parent, _hwblk, _flags) \ | 61 | #define SH_HWBLK_CLK(_name, _id, _parent, _hwblk, _flags) \ |
62 | { \ | 62 | [_hwblk] = { \ |
63 | .name = _name, \ | 63 | .name = _name, \ |
64 | .id = _id, \ | 64 | .id = _id, \ |
65 | .parent = _parent, \ | 65 | .parent = _parent, \ |
diff --git a/arch/sh/kernel/cpu/hwblk.c b/arch/sh/kernel/cpu/hwblk.c index 67a1e811cfe8..3e985aae5d91 100644 --- a/arch/sh/kernel/cpu/hwblk.c +++ b/arch/sh/kernel/cpu/hwblk.c | |||
@@ -146,6 +146,11 @@ int __init sh_hwblk_clk_register(struct clk *clks, int nr) | |||
146 | 146 | ||
147 | for (k = 0; !ret && (k < nr); k++) { | 147 | for (k = 0; !ret && (k < nr); k++) { |
148 | clkp = clks + k; | 148 | clkp = clks + k; |
149 | |||
150 | /* skip over clocks using hwblk 0 (HWBLK_UNKNOWN) */ | ||
151 | if (!clkp->arch_flags) | ||
152 | continue; | ||
153 | |||
149 | clkp->ops = &sh_hwblk_clk_ops; | 154 | clkp->ops = &sh_hwblk_clk_ops; |
150 | ret |= clk_register(clkp); | 155 | ret |= clk_register(clkp); |
151 | } | 156 | } |
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c index 107b200e78bd..e5b6f47ea8b0 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c | |||
@@ -157,7 +157,7 @@ struct clk div6_clks[] = { | |||
157 | #define B_CLK &div4_clks[DIV4_B] | 157 | #define B_CLK &div4_clks[DIV4_B] |
158 | #define U_CLK &div4_clks[DIV4_U] | 158 | #define U_CLK &div4_clks[DIV4_U] |
159 | 159 | ||
160 | static struct clk mstp_clks[] = { | 160 | static struct clk mstp_clks[HWBLK_NR] = { |
161 | SH_HWBLK_CLK("uram0", -1, U_CLK, HWBLK_URAM, CLK_ENABLE_ON_INIT), | 161 | SH_HWBLK_CLK("uram0", -1, U_CLK, HWBLK_URAM, CLK_ENABLE_ON_INIT), |
162 | SH_HWBLK_CLK("xymem0", -1, B_CLK, HWBLK_XYMEM, CLK_ENABLE_ON_INIT), | 162 | SH_HWBLK_CLK("xymem0", -1, B_CLK, HWBLK_XYMEM, CLK_ENABLE_ON_INIT), |
163 | SH_HWBLK_CLK("tmu_fck", -1, P_CLK, HWBLK_TMU, 0), | 163 | SH_HWBLK_CLK("tmu_fck", -1, P_CLK, HWBLK_TMU, 0), |
@@ -213,7 +213,7 @@ int __init arch_clk_init(void) | |||
213 | ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks)); | 213 | ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks)); |
214 | 214 | ||
215 | if (!ret) | 215 | if (!ret) |
216 | ret = sh_hwblk_clk_register(mstp_clks, ARRAY_SIZE(mstp_clks)); | 216 | ret = sh_hwblk_clk_register(mstp_clks, HWBLK_NR); |
217 | 217 | ||
218 | return ret; | 218 | return ret; |
219 | } | 219 | } |
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c index fc86c88223f4..390bdb5cabc5 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c | |||
@@ -218,32 +218,32 @@ static struct clk_lookup lookups[] = { | |||
218 | /* TMU0 */ | 218 | /* TMU0 */ |
219 | .dev_id = "sh_tmu.0", | 219 | .dev_id = "sh_tmu.0", |
220 | .con_id = "tmu_fck", | 220 | .con_id = "tmu_fck", |
221 | .clk = &mstp_clks[11], /* tmu012_fck */ | 221 | .clk = &mstp_clks[HWBLK_TMU0], |
222 | }, { | 222 | }, { |
223 | /* TMU1 */ | 223 | /* TMU1 */ |
224 | .dev_id = "sh_tmu.1", | 224 | .dev_id = "sh_tmu.1", |
225 | .con_id = "tmu_fck", | 225 | .con_id = "tmu_fck", |
226 | .clk = &mstp_clks[11], | 226 | .clk = &mstp_clks[HWBLK_TMU0], |
227 | }, { | 227 | }, { |
228 | /* TMU2 */ | 228 | /* TMU2 */ |
229 | .dev_id = "sh_tmu.2", | 229 | .dev_id = "sh_tmu.2", |
230 | .con_id = "tmu_fck", | 230 | .con_id = "tmu_fck", |
231 | .clk = &mstp_clks[11], | 231 | .clk = &mstp_clks[HWBLK_TMU0], |
232 | }, { | 232 | }, { |
233 | /* TMU3 */ | 233 | /* TMU3 */ |
234 | .dev_id = "sh_tmu.3", | 234 | .dev_id = "sh_tmu.3", |
235 | .con_id = "tmu_fck", | 235 | .con_id = "tmu_fck", |
236 | .clk = &mstp_clks[15], /* tmu345_fck */ | 236 | .clk = &mstp_clks[HWBLK_TMU1], |
237 | }, { | 237 | }, { |
238 | /* TMU4 */ | 238 | /* TMU4 */ |
239 | .dev_id = "sh_tmu.4", | 239 | .dev_id = "sh_tmu.4", |
240 | .con_id = "tmu_fck", | 240 | .con_id = "tmu_fck", |
241 | .clk = &mstp_clks[15], | 241 | .clk = &mstp_clks[HWBLK_TMU1], |
242 | }, { | 242 | }, { |
243 | /* TMU5 */ | 243 | /* TMU5 */ |
244 | .dev_id = "sh_tmu.5", | 244 | .dev_id = "sh_tmu.5", |
245 | .con_id = "tmu_fck", | 245 | .con_id = "tmu_fck", |
246 | .clk = &mstp_clks[15], | 246 | .clk = &mstp_clks[HWBLK_TMU1], |
247 | }, | 247 | }, |
248 | }; | 248 | }; |
249 | 249 | ||
@@ -277,7 +277,7 @@ int __init arch_clk_init(void) | |||
277 | ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks)); | 277 | ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks)); |
278 | 278 | ||
279 | if (!ret) | 279 | if (!ret) |
280 | ret = sh_hwblk_clk_register(mstp_clks, ARRAY_SIZE(mstp_clks)); | 280 | ret = sh_hwblk_clk_register(mstp_clks, HWBLK_NR); |
281 | 281 | ||
282 | return ret; | 282 | return ret; |
283 | } | 283 | } |
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c index f1583a23b3a5..c5d4891d38a4 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c | |||
@@ -178,7 +178,7 @@ struct clk div6_clks[] = { | |||
178 | #define I_CLK (&div4_clks[DIV4_I]) | 178 | #define I_CLK (&div4_clks[DIV4_I]) |
179 | #define SH_CLK (&div4_clks[DIV4_SH]) | 179 | #define SH_CLK (&div4_clks[DIV4_SH]) |
180 | 180 | ||
181 | static struct clk mstp_clks[] = { | 181 | static struct clk mstp_clks[HWBLK_NR] = { |
182 | SH_HWBLK_CLK("tlb0", -1, I_CLK, HWBLK_TLB, CLK_ENABLE_ON_INIT), | 182 | SH_HWBLK_CLK("tlb0", -1, I_CLK, HWBLK_TLB, CLK_ENABLE_ON_INIT), |
183 | SH_HWBLK_CLK("ic0", -1, I_CLK, HWBLK_IC, CLK_ENABLE_ON_INIT), | 183 | SH_HWBLK_CLK("ic0", -1, I_CLK, HWBLK_IC, CLK_ENABLE_ON_INIT), |
184 | SH_HWBLK_CLK("oc0", -1, I_CLK, HWBLK_OC, CLK_ENABLE_ON_INIT), | 184 | SH_HWBLK_CLK("oc0", -1, I_CLK, HWBLK_OC, CLK_ENABLE_ON_INIT), |
@@ -240,32 +240,32 @@ static struct clk_lookup lookups[] = { | |||
240 | /* TMU0 */ | 240 | /* TMU0 */ |
241 | .dev_id = "sh_tmu.0", | 241 | .dev_id = "sh_tmu.0", |
242 | .con_id = "tmu_fck", | 242 | .con_id = "tmu_fck", |
243 | .clk = &mstp_clks[12], /* tmu012_fck */ | 243 | .clk = &mstp_clks[HWBLK_TMU0], |
244 | }, { | 244 | }, { |
245 | /* TMU1 */ | 245 | /* TMU1 */ |
246 | .dev_id = "sh_tmu.1", | 246 | .dev_id = "sh_tmu.1", |
247 | .con_id = "tmu_fck", | 247 | .con_id = "tmu_fck", |
248 | .clk = &mstp_clks[12], | 248 | .clk = &mstp_clks[HWBLK_TMU0], |
249 | }, { | 249 | }, { |
250 | /* TMU2 */ | 250 | /* TMU2 */ |
251 | .dev_id = "sh_tmu.2", | 251 | .dev_id = "sh_tmu.2", |
252 | .con_id = "tmu_fck", | 252 | .con_id = "tmu_fck", |
253 | .clk = &mstp_clks[12], | 253 | .clk = &mstp_clks[HWBLK_TMU0], |
254 | }, { | 254 | }, { |
255 | /* TMU3 */ | 255 | /* TMU3 */ |
256 | .dev_id = "sh_tmu.3", | 256 | .dev_id = "sh_tmu.3", |
257 | .con_id = "tmu_fck", | 257 | .con_id = "tmu_fck", |
258 | .clk = &mstp_clks[16], /* tmu345_fck */ | 258 | .clk = &mstp_clks[HWBLK_TMU1], |
259 | }, { | 259 | }, { |
260 | /* TMU4 */ | 260 | /* TMU4 */ |
261 | .dev_id = "sh_tmu.4", | 261 | .dev_id = "sh_tmu.4", |
262 | .con_id = "tmu_fck", | 262 | .con_id = "tmu_fck", |
263 | .clk = &mstp_clks[16], | 263 | .clk = &mstp_clks[HWBLK_TMU1], |
264 | }, { | 264 | }, { |
265 | /* TMU5 */ | 265 | /* TMU5 */ |
266 | .dev_id = "sh_tmu.5", | 266 | .dev_id = "sh_tmu.5", |
267 | .con_id = "tmu_fck", | 267 | .con_id = "tmu_fck", |
268 | .clk = &mstp_clks[16], | 268 | .clk = &mstp_clks[HWBLK_TMU1], |
269 | }, | 269 | }, |
270 | }; | 270 | }; |
271 | 271 | ||
@@ -291,7 +291,7 @@ int __init arch_clk_init(void) | |||
291 | ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks)); | 291 | ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks)); |
292 | 292 | ||
293 | if (!ret) | 293 | if (!ret) |
294 | ret = sh_hwblk_clk_register(mstp_clks, ARRAY_SIZE(mstp_clks)); | 294 | ret = sh_hwblk_clk_register(mstp_clks, HWBLK_NR); |
295 | 295 | ||
296 | return ret; | 296 | return ret; |
297 | } | 297 | } |