diff options
Diffstat (limited to 'arch')
752 files changed, 28986 insertions, 16560 deletions
diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig index b7193986cbf9..3e2e540a0f2a 100644 --- a/arch/alpha/Kconfig +++ b/arch/alpha/Kconfig | |||
| @@ -51,10 +51,6 @@ config GENERIC_TIME | |||
| 51 | bool | 51 | bool |
| 52 | default y | 52 | default y |
| 53 | 53 | ||
| 54 | config ARCH_USES_GETTIMEOFFSET | ||
| 55 | bool | ||
| 56 | default y | ||
| 57 | |||
| 58 | config GENERIC_CMOS_UPDATE | 54 | config GENERIC_CMOS_UPDATE |
| 59 | def_bool y | 55 | def_bool y |
| 60 | 56 | ||
| @@ -65,6 +61,9 @@ config ZONE_DMA | |||
| 65 | config NEED_DMA_MAP_STATE | 61 | config NEED_DMA_MAP_STATE |
| 66 | def_bool y | 62 | def_bool y |
| 67 | 63 | ||
| 64 | config NEED_SG_DMA_LENGTH | ||
| 65 | def_bool y | ||
| 66 | |||
| 68 | config GENERIC_ISA_DMA | 67 | config GENERIC_ISA_DMA |
| 69 | bool | 68 | bool |
| 70 | default y | 69 | default y |
diff --git a/arch/alpha/include/asm/bitops.h b/arch/alpha/include/asm/bitops.h index 296da1d5ed57..1dce24bc455a 100644 --- a/arch/alpha/include/asm/bitops.h +++ b/arch/alpha/include/asm/bitops.h | |||
| @@ -438,22 +438,20 @@ static inline unsigned int __arch_hweight8(unsigned int w) | |||
| 438 | 438 | ||
| 439 | /* | 439 | /* |
| 440 | * Every architecture must define this function. It's the fastest | 440 | * Every architecture must define this function. It's the fastest |
| 441 | * way of searching a 140-bit bitmap where the first 100 bits are | 441 | * way of searching a 100-bit bitmap. It's guaranteed that at least |
| 442 | * unlikely to be set. It's guaranteed that at least one of the 140 | 442 | * one of the 100 bits is cleared. |
| 443 | * bits is set. | ||
| 444 | */ | 443 | */ |
| 445 | static inline unsigned long | 444 | static inline unsigned long |
| 446 | sched_find_first_bit(unsigned long b[3]) | 445 | sched_find_first_bit(const unsigned long b[2]) |
| 447 | { | 446 | { |
| 448 | unsigned long b0 = b[0], b1 = b[1], b2 = b[2]; | 447 | unsigned long b0, b1, ofs, tmp; |
| 449 | unsigned long ofs; | ||
| 450 | 448 | ||
| 451 | ofs = (b1 ? 64 : 128); | 449 | b0 = b[0]; |
| 452 | b1 = (b1 ? b1 : b2); | 450 | b1 = b[1]; |
| 453 | ofs = (b0 ? 0 : ofs); | 451 | ofs = (b0 ? 0 : 64); |
| 454 | b0 = (b0 ? b0 : b1); | 452 | tmp = (b0 ? b0 : b1); |
| 455 | 453 | ||
| 456 | return __ffs(b0) + ofs; | 454 | return __ffs(tmp) + ofs; |
| 457 | } | 455 | } |
| 458 | 456 | ||
| 459 | #include <asm-generic/bitops/ext2-non-atomic.h> | 457 | #include <asm-generic/bitops/ext2-non-atomic.h> |
diff --git a/arch/alpha/include/asm/scatterlist.h b/arch/alpha/include/asm/scatterlist.h index 440747ca6349..5728c52a7412 100644 --- a/arch/alpha/include/asm/scatterlist.h +++ b/arch/alpha/include/asm/scatterlist.h | |||
| @@ -1,24 +1,7 @@ | |||
| 1 | #ifndef _ALPHA_SCATTERLIST_H | 1 | #ifndef _ALPHA_SCATTERLIST_H |
| 2 | #define _ALPHA_SCATTERLIST_H | 2 | #define _ALPHA_SCATTERLIST_H |
| 3 | 3 | ||
| 4 | #include <asm/page.h> | 4 | #include <asm-generic/scatterlist.h> |
| 5 | #include <asm/types.h> | ||
| 6 | |||
| 7 | struct scatterlist { | ||
| 8 | #ifdef CONFIG_DEBUG_SG | ||
| 9 | unsigned long sg_magic; | ||
| 10 | #endif | ||
| 11 | unsigned long page_link; | ||
| 12 | unsigned int offset; | ||
| 13 | |||
| 14 | unsigned int length; | ||
| 15 | |||
| 16 | dma_addr_t dma_address; | ||
| 17 | __u32 dma_length; | ||
| 18 | }; | ||
| 19 | |||
| 20 | #define sg_dma_address(sg) ((sg)->dma_address) | ||
| 21 | #define sg_dma_len(sg) ((sg)->dma_length) | ||
| 22 | 5 | ||
| 23 | #define ISA_DMA_THRESHOLD (~0UL) | 6 | #define ISA_DMA_THRESHOLD (~0UL) |
| 24 | 7 | ||
diff --git a/arch/alpha/kernel/time.c b/arch/alpha/kernel/time.c index 5465e932e568..1efbed82c0fd 100644 --- a/arch/alpha/kernel/time.c +++ b/arch/alpha/kernel/time.c | |||
| @@ -51,6 +51,7 @@ | |||
| 51 | #include <linux/mc146818rtc.h> | 51 | #include <linux/mc146818rtc.h> |
| 52 | #include <linux/time.h> | 52 | #include <linux/time.h> |
| 53 | #include <linux/timex.h> | 53 | #include <linux/timex.h> |
| 54 | #include <linux/clocksource.h> | ||
| 54 | 55 | ||
| 55 | #include "proto.h" | 56 | #include "proto.h" |
| 56 | #include "irq_impl.h" | 57 | #include "irq_impl.h" |
| @@ -332,6 +333,34 @@ rpcc_after_update_in_progress(void) | |||
| 332 | return rpcc(); | 333 | return rpcc(); |
| 333 | } | 334 | } |
| 334 | 335 | ||
| 336 | #ifndef CONFIG_SMP | ||
| 337 | /* Until and unless we figure out how to get cpu cycle counters | ||
| 338 | in sync and keep them there, we can't use the rpcc. */ | ||
| 339 | static cycle_t read_rpcc(struct clocksource *cs) | ||
| 340 | { | ||
| 341 | cycle_t ret = (cycle_t)rpcc(); | ||
| 342 | return ret; | ||
| 343 | } | ||
| 344 | |||
| 345 | static struct clocksource clocksource_rpcc = { | ||
| 346 | .name = "rpcc", | ||
| 347 | .rating = 300, | ||
| 348 | .read = read_rpcc, | ||
| 349 | .mask = CLOCKSOURCE_MASK(32), | ||
| 350 | .flags = CLOCK_SOURCE_IS_CONTINUOUS | ||
| 351 | }; | ||
| 352 | |||
| 353 | static inline void register_rpcc_clocksource(long cycle_freq) | ||
| 354 | { | ||
| 355 | clocksource_calc_mult_shift(&clocksource_rpcc, cycle_freq, 4); | ||
| 356 | clocksource_register(&clocksource_rpcc); | ||
| 357 | } | ||
| 358 | #else /* !CONFIG_SMP */ | ||
| 359 | static inline void register_rpcc_clocksource(long cycle_freq) | ||
| 360 | { | ||
| 361 | } | ||
| 362 | #endif /* !CONFIG_SMP */ | ||
| 363 | |||
| 335 | void __init | 364 | void __init |
| 336 | time_init(void) | 365 | time_init(void) |
| 337 | { | 366 | { |
| @@ -385,6 +414,8 @@ time_init(void) | |||
| 385 | __you_loose(); | 414 | __you_loose(); |
| 386 | } | 415 | } |
| 387 | 416 | ||
| 417 | register_rpcc_clocksource(cycle_freq); | ||
| 418 | |||
| 388 | state.last_time = cc1; | 419 | state.last_time = cc1; |
| 389 | state.scaled_ticks_per_cycle | 420 | state.scaled_ticks_per_cycle |
| 390 | = ((unsigned long) HZ << FIX_SHIFT) / cycle_freq; | 421 | = ((unsigned long) HZ << FIX_SHIFT) / cycle_freq; |
| @@ -395,44 +426,6 @@ time_init(void) | |||
| 395 | } | 426 | } |
| 396 | 427 | ||
| 397 | /* | 428 | /* |
| 398 | * Use the cycle counter to estimate an displacement from the last time | ||
| 399 | * tick. Unfortunately the Alpha designers made only the low 32-bits of | ||
| 400 | * the cycle counter active, so we overflow on 8.2 seconds on a 500MHz | ||
| 401 | * part. So we can't do the "find absolute time in terms of cycles" thing | ||
| 402 | * that the other ports do. | ||
| 403 | */ | ||
| 404 | u32 arch_gettimeoffset(void) | ||
| 405 | { | ||
| 406 | #ifdef CONFIG_SMP | ||
| 407 | /* Until and unless we figure out how to get cpu cycle counters | ||
| 408 | in sync and keep them there, we can't use the rpcc tricks. */ | ||
| 409 | return 0; | ||
| 410 | #else | ||
| 411 | unsigned long delta_cycles, delta_usec, partial_tick; | ||
| 412 | |||
| 413 | delta_cycles = rpcc() - state.last_time; | ||
| 414 | partial_tick = state.partial_tick; | ||
| 415 | /* | ||
| 416 | * usec = cycles * ticks_per_cycle * 2**48 * 1e6 / (2**48 * ticks) | ||
| 417 | * = cycles * (s_t_p_c) * 1e6 / (2**48 * ticks) | ||
| 418 | * = cycles * (s_t_p_c) * 15625 / (2**42 * ticks) | ||
| 419 | * | ||
| 420 | * which, given a 600MHz cycle and a 1024Hz tick, has a | ||
| 421 | * dynamic range of about 1.7e17, which is less than the | ||
| 422 | * 1.8e19 in an unsigned long, so we are safe from overflow. | ||
| 423 | * | ||
| 424 | * Round, but with .5 up always, since .5 to even is harder | ||
| 425 | * with no clear gain. | ||
| 426 | */ | ||
| 427 | |||
| 428 | delta_usec = (delta_cycles * state.scaled_ticks_per_cycle | ||
| 429 | + partial_tick) * 15625; | ||
| 430 | delta_usec = ((delta_usec / ((1UL << (FIX_SHIFT-6-1)) * HZ)) + 1) / 2; | ||
| 431 | return delta_usec * 1000; | ||
| 432 | #endif | ||
| 433 | } | ||
| 434 | |||
| 435 | /* | ||
| 436 | * In order to set the CMOS clock precisely, set_rtc_mmss has to be | 429 | * In order to set the CMOS clock precisely, set_rtc_mmss has to be |
| 437 | * called 500 ms after the second nowtime has started, because when | 430 | * called 500 ms after the second nowtime has started, because when |
| 438 | * nowtime is written into the registers of the CMOS clock, it will | 431 | * nowtime is written into the registers of the CMOS clock, it will |
diff --git a/arch/alpha/mm/fault.c b/arch/alpha/mm/fault.c index 00a31deaa96e..fadd5f882ff9 100644 --- a/arch/alpha/mm/fault.c +++ b/arch/alpha/mm/fault.c | |||
| @@ -142,7 +142,6 @@ do_page_fault(unsigned long address, unsigned long mmcsr, | |||
| 142 | goto bad_area; | 142 | goto bad_area; |
| 143 | } | 143 | } |
| 144 | 144 | ||
| 145 | survive: | ||
| 146 | /* If for any reason at all we couldn't handle the fault, | 145 | /* If for any reason at all we couldn't handle the fault, |
| 147 | make sure we exit gracefully rather than endlessly redo | 146 | make sure we exit gracefully rather than endlessly redo |
| 148 | the fault. */ | 147 | the fault. */ |
| @@ -188,16 +187,10 @@ do_page_fault(unsigned long address, unsigned long mmcsr, | |||
| 188 | /* We ran out of memory, or some other thing happened to us that | 187 | /* We ran out of memory, or some other thing happened to us that |
| 189 | made us unable to handle the page fault gracefully. */ | 188 | made us unable to handle the page fault gracefully. */ |
| 190 | out_of_memory: | 189 | out_of_memory: |
| 191 | if (is_global_init(current)) { | ||
| 192 | yield(); | ||
| 193 | down_read(&mm->mmap_sem); | ||
| 194 | goto survive; | ||
| 195 | } | ||
| 196 | printk(KERN_ALERT "VM: killing process %s(%d)\n", | ||
| 197 | current->comm, task_pid_nr(current)); | ||
| 198 | if (!user_mode(regs)) | 190 | if (!user_mode(regs)) |
| 199 | goto no_context; | 191 | goto no_context; |
| 200 | do_group_exit(SIGKILL); | 192 | pagefault_out_of_memory(); |
| 193 | return; | ||
| 201 | 194 | ||
| 202 | do_sigbus: | 195 | do_sigbus: |
| 203 | /* Send a sigbus, regardless of whether we were in kernel | 196 | /* Send a sigbus, regardless of whether we were in kernel |
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 2d70cece2ea2..1f254bd6c937 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
| @@ -671,6 +671,7 @@ config ARCH_S5P6440 | |||
| 671 | select CPU_V6 | 671 | select CPU_V6 |
| 672 | select GENERIC_GPIO | 672 | select GENERIC_GPIO |
| 673 | select HAVE_CLK | 673 | select HAVE_CLK |
| 674 | select ARCH_USES_GETTIMEOFFSET | ||
| 674 | help | 675 | help |
| 675 | Samsung S5P6440 CPU based systems | 676 | Samsung S5P6440 CPU based systems |
| 676 | 677 | ||
| @@ -679,17 +680,19 @@ config ARCH_S5P6442 | |||
| 679 | select CPU_V6 | 680 | select CPU_V6 |
| 680 | select GENERIC_GPIO | 681 | select GENERIC_GPIO |
| 681 | select HAVE_CLK | 682 | select HAVE_CLK |
| 683 | select ARCH_USES_GETTIMEOFFSET | ||
| 682 | help | 684 | help |
| 683 | Samsung S5P6442 CPU based systems | 685 | Samsung S5P6442 CPU based systems |
| 684 | 686 | ||
| 685 | config ARCH_S5PC1XX | 687 | config ARCH_S5PC100 |
| 686 | bool "Samsung S5PC1XX" | 688 | bool "Samsung S5PC100" |
| 687 | select GENERIC_GPIO | 689 | select GENERIC_GPIO |
| 688 | select HAVE_CLK | 690 | select HAVE_CLK |
| 689 | select CPU_V7 | 691 | select CPU_V7 |
| 690 | select ARM_L1_CACHE_SHIFT_6 | 692 | select ARM_L1_CACHE_SHIFT_6 |
| 693 | select ARCH_USES_GETTIMEOFFSET | ||
| 691 | help | 694 | help |
| 692 | Samsung S5PC1XX series based systems | 695 | Samsung S5PC100 series based systems |
| 693 | 696 | ||
| 694 | config ARCH_S5PV210 | 697 | config ARCH_S5PV210 |
| 695 | bool "Samsung S5PV210/S5PC110" | 698 | bool "Samsung S5PV210/S5PC110" |
| @@ -697,6 +700,7 @@ config ARCH_S5PV210 | |||
| 697 | select GENERIC_GPIO | 700 | select GENERIC_GPIO |
| 698 | select HAVE_CLK | 701 | select HAVE_CLK |
| 699 | select ARM_L1_CACHE_SHIFT_6 | 702 | select ARM_L1_CACHE_SHIFT_6 |
| 703 | select ARCH_USES_GETTIMEOFFSET | ||
| 700 | help | 704 | help |
| 701 | Samsung S5PV210/S5PC110 series based systems | 705 | Samsung S5PV210/S5PC110 series based systems |
| 702 | 706 | ||
| @@ -876,7 +880,7 @@ source "arch/arm/mach-sa1100/Kconfig" | |||
| 876 | source "arch/arm/plat-samsung/Kconfig" | 880 | source "arch/arm/plat-samsung/Kconfig" |
| 877 | source "arch/arm/plat-s3c24xx/Kconfig" | 881 | source "arch/arm/plat-s3c24xx/Kconfig" |
| 878 | source "arch/arm/plat-s5p/Kconfig" | 882 | source "arch/arm/plat-s5p/Kconfig" |
| 879 | source "arch/arm/plat-s5pc1xx/Kconfig" | 883 | |
| 880 | source "arch/arm/plat-spear/Kconfig" | 884 | source "arch/arm/plat-spear/Kconfig" |
| 881 | 885 | ||
| 882 | if ARCH_S3C2410 | 886 | if ARCH_S3C2410 |
| @@ -896,9 +900,7 @@ source "arch/arm/mach-s5p6440/Kconfig" | |||
| 896 | 900 | ||
| 897 | source "arch/arm/mach-s5p6442/Kconfig" | 901 | source "arch/arm/mach-s5p6442/Kconfig" |
| 898 | 902 | ||
| 899 | if ARCH_S5PC1XX | ||
| 900 | source "arch/arm/mach-s5pc100/Kconfig" | 903 | source "arch/arm/mach-s5pc100/Kconfig" |
| 901 | endif | ||
| 902 | 904 | ||
| 903 | source "arch/arm/mach-s5pv210/Kconfig" | 905 | source "arch/arm/mach-s5pv210/Kconfig" |
| 904 | 906 | ||
| @@ -1419,6 +1421,17 @@ config CMDLINE | |||
| 1419 | time by entering them here. As a minimum, you should specify the | 1421 | time by entering them here. As a minimum, you should specify the |
| 1420 | memory size and the root device (e.g., mem=64M root=/dev/nfs). | 1422 | memory size and the root device (e.g., mem=64M root=/dev/nfs). |
| 1421 | 1423 | ||
| 1424 | config CMDLINE_FORCE | ||
| 1425 | bool "Always use the default kernel command string" | ||
| 1426 | depends on CMDLINE != "" | ||
| 1427 | help | ||
| 1428 | Always use the default kernel command string, even if the boot | ||
| 1429 | loader passes other arguments to the kernel. | ||
| 1430 | This is useful if you cannot or don't want to change the | ||
| 1431 | command-line options your boot loader passes to the kernel. | ||
| 1432 | |||
| 1433 | If unsure, say N. | ||
| 1434 | |||
| 1422 | config XIP_KERNEL | 1435 | config XIP_KERNEL |
| 1423 | bool "Kernel Execute-In-Place from ROM" | 1436 | bool "Kernel Execute-In-Place from ROM" |
| 1424 | depends on !ZBOOT_ROM | 1437 | depends on !ZBOOT_ROM |
diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 4b857fbe4314..64ba313724d2 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile | |||
| @@ -168,7 +168,7 @@ machine-$(CONFIG_ARCH_S3C24A0) := s3c24a0 | |||
| 168 | machine-$(CONFIG_ARCH_S3C64XX) := s3c64xx | 168 | machine-$(CONFIG_ARCH_S3C64XX) := s3c64xx |
| 169 | machine-$(CONFIG_ARCH_S5P6440) := s5p6440 | 169 | machine-$(CONFIG_ARCH_S5P6440) := s5p6440 |
| 170 | machine-$(CONFIG_ARCH_S5P6442) := s5p6442 | 170 | machine-$(CONFIG_ARCH_S5P6442) := s5p6442 |
| 171 | machine-$(CONFIG_ARCH_S5PC1XX) := s5pc100 | 171 | machine-$(CONFIG_ARCH_S5PC100) := s5pc100 |
| 172 | machine-$(CONFIG_ARCH_S5PV210) := s5pv210 | 172 | machine-$(CONFIG_ARCH_S5PV210) := s5pv210 |
| 173 | machine-$(CONFIG_ARCH_SA1100) := sa1100 | 173 | machine-$(CONFIG_ARCH_SA1100) := sa1100 |
| 174 | machine-$(CONFIG_ARCH_SHARK) := shark | 174 | machine-$(CONFIG_ARCH_SHARK) := shark |
| @@ -198,7 +198,6 @@ plat-$(CONFIG_PLAT_NOMADIK) := nomadik | |||
| 198 | plat-$(CONFIG_PLAT_ORION) := orion | 198 | plat-$(CONFIG_PLAT_ORION) := orion |
| 199 | plat-$(CONFIG_PLAT_PXA) := pxa | 199 | plat-$(CONFIG_PLAT_PXA) := pxa |
| 200 | plat-$(CONFIG_PLAT_S3C24XX) := s3c24xx samsung | 200 | plat-$(CONFIG_PLAT_S3C24XX) := s3c24xx samsung |
| 201 | plat-$(CONFIG_PLAT_S5PC1XX) := s5pc1xx samsung | ||
| 202 | plat-$(CONFIG_PLAT_S5P) := s5p samsung | 201 | plat-$(CONFIG_PLAT_S5P) := s5p samsung |
| 203 | plat-$(CONFIG_PLAT_SPEAR) := spear | 202 | plat-$(CONFIG_PLAT_SPEAR) := spear |
| 204 | plat-$(CONFIG_PLAT_VERSATILE) := versatile | 203 | plat-$(CONFIG_PLAT_VERSATILE) := versatile |
diff --git a/arch/arm/boot/bootp/bootp.lds b/arch/arm/boot/bootp/bootp.lds index 8e3d81ce695e..fc54394f4340 100644 --- a/arch/arm/boot/bootp/bootp.lds +++ b/arch/arm/boot/bootp/bootp.lds | |||
| @@ -19,7 +19,7 @@ SECTIONS | |||
| 19 | initrd_size = initrd_end - initrd_start; | 19 | initrd_size = initrd_end - initrd_start; |
| 20 | _etext = .; | 20 | _etext = .; |
| 21 | } | 21 | } |
| 22 | 22 | ||
| 23 | .stab 0 : { *(.stab) } | 23 | .stab 0 : { *(.stab) } |
| 24 | .stabstr 0 : { *(.stabstr) } | 24 | .stabstr 0 : { *(.stabstr) } |
| 25 | .stab.excl 0 : { *(.stab.excl) } | 25 | .stab.excl 0 : { *(.stab.excl) } |
diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c index a52a27c1d9be..6f80665f477e 100644 --- a/arch/arm/common/sa1111.c +++ b/arch/arm/common/sa1111.c | |||
| @@ -951,8 +951,6 @@ static int sa1111_resume(struct platform_device *dev) | |||
| 951 | if (!save) | 951 | if (!save) |
| 952 | return 0; | 952 | return 0; |
| 953 | 953 | ||
| 954 | spin_lock_irqsave(&sachip->lock, flags); | ||
| 955 | |||
| 956 | /* | 954 | /* |
| 957 | * Ensure that the SA1111 is still here. | 955 | * Ensure that the SA1111 is still here. |
| 958 | * FIXME: shouldn't do this here. | 956 | * FIXME: shouldn't do this here. |
| @@ -969,6 +967,13 @@ static int sa1111_resume(struct platform_device *dev) | |||
| 969 | * First of all, wake up the chip. | 967 | * First of all, wake up the chip. |
| 970 | */ | 968 | */ |
| 971 | sa1111_wake(sachip); | 969 | sa1111_wake(sachip); |
| 970 | |||
| 971 | /* | ||
| 972 | * Only lock for write ops. Also, sa1111_wake must be called with | ||
| 973 | * released spinlock! | ||
| 974 | */ | ||
| 975 | spin_lock_irqsave(&sachip->lock, flags); | ||
| 976 | |||
| 972 | sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN0); | 977 | sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN0); |
| 973 | sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN1); | 978 | sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN1); |
| 974 | 979 | ||
diff --git a/arch/arm/configs/am3517_evm_defconfig b/arch/arm/configs/am3517_evm_defconfig index 232f8eeb72e3..e4f4fb522bac 100644 --- a/arch/arm/configs/am3517_evm_defconfig +++ b/arch/arm/configs/am3517_evm_defconfig | |||
| @@ -774,7 +774,57 @@ CONFIG_SSB_POSSIBLE=y | |||
| 774 | # | 774 | # |
| 775 | # CONFIG_VGASTATE is not set | 775 | # CONFIG_VGASTATE is not set |
| 776 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | 776 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set |
| 777 | # CONFIG_FB is not set | 777 | CONFIG_FB=y |
| 778 | # CONFIG_FIRMWARE_EDID is not set | ||
| 779 | # CONFIG_FB_DDC is not set | ||
| 780 | # CONFIG_FB_BOOT_VESA_SUPPORT is not set | ||
| 781 | CONFIG_FB_CFB_FILLRECT=y | ||
| 782 | CONFIG_FB_CFB_COPYAREA=y | ||
| 783 | CONFIG_FB_CFB_IMAGEBLIT=y | ||
| 784 | # CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set | ||
| 785 | # CONFIG_FB_SYS_FILLRECT is not set | ||
| 786 | # CONFIG_FB_SYS_COPYAREA is not set | ||
| 787 | # CONFIG_FB_SYS_IMAGEBLIT is not set | ||
| 788 | # CONFIG_FB_FOREIGN_ENDIAN is not set | ||
| 789 | # CONFIG_FB_SYS_FOPS is not set | ||
| 790 | # CONFIG_FB_SVGALIB is not set | ||
| 791 | # CONFIG_FB_MACMODES is not set | ||
| 792 | # CONFIG_FB_BACKLIGHT is not set | ||
| 793 | # CONFIG_FB_MODE_HELPERS is not set | ||
| 794 | # CONFIG_FB_TILEBLITTING is not set | ||
| 795 | |||
| 796 | # | ||
| 797 | # Frame buffer hardware drivers | ||
| 798 | # | ||
| 799 | # CONFIG_FB_ARMCLCD is not set | ||
| 800 | # CONFIG_FB_S1D13XXX is not set | ||
| 801 | # CONFIG_FB_VIRTUAL is not set | ||
| 802 | # CONFIG_FB_METRONOME is not set | ||
| 803 | # CONFIG_FB_MB862XX is not set | ||
| 804 | # CONFIG_FB_BROADSHEET is not set | ||
| 805 | # CONFIG_FB_OMAP_BOOTLOADER_INIT is not set | ||
| 806 | CONFIG_OMAP2_VRAM=y | ||
| 807 | CONFIG_OMAP2_VRFB=y | ||
| 808 | CONFIG_OMAP2_DSS=y | ||
| 809 | CONFIG_OMAP2_VRAM_SIZE=4 | ||
| 810 | CONFIG_OMAP2_DSS_DEBUG_SUPPORT=y | ||
| 811 | # CONFIG_OMAP2_DSS_RFBI is not set | ||
| 812 | CONFIG_OMAP2_DSS_VENC=y | ||
| 813 | # CONFIG_OMAP2_DSS_SDI is not set | ||
| 814 | # CONFIG_OMAP2_DSS_DSI is not set | ||
| 815 | # CONFIG_OMAP2_DSS_FAKE_VSYNC is not set | ||
| 816 | CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=4 | ||
| 817 | CONFIG_FB_OMAP2=y | ||
| 818 | CONFIG_FB_OMAP2_DEBUG_SUPPORT=y | ||
| 819 | # CONFIG_FB_OMAP2_FORCE_AUTO_UPDATE is not set | ||
| 820 | CONFIG_FB_OMAP2_NUM_FBS=3 | ||
| 821 | |||
| 822 | # | ||
| 823 | # OMAP2/3 Display Device Drivers | ||
| 824 | # | ||
| 825 | CONFIG_PANEL_GENERIC=y | ||
| 826 | # CONFIG_PANEL_SHARP_LS037V7DW01 is not set | ||
| 827 | CONFIG_PANEL_SHARP_LQ043T1DG01=y | ||
| 778 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | 828 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set |
| 779 | 829 | ||
| 780 | # | 830 | # |
diff --git a/arch/arm/configs/mx51_defconfig b/arch/arm/configs/mx51_defconfig index c88e9527a8ec..a708fd6d6ffe 100644 --- a/arch/arm/configs/mx51_defconfig +++ b/arch/arm/configs/mx51_defconfig | |||
| @@ -809,7 +809,22 @@ CONFIG_SSB_POSSIBLE=y | |||
| 809 | CONFIG_DUMMY_CONSOLE=y | 809 | CONFIG_DUMMY_CONSOLE=y |
| 810 | # CONFIG_SOUND is not set | 810 | # CONFIG_SOUND is not set |
| 811 | # CONFIG_HID_SUPPORT is not set | 811 | # CONFIG_HID_SUPPORT is not set |
| 812 | # CONFIG_USB_SUPPORT is not set | 812 | CONFIG_USB_SUPPORT=y |
| 813 | CONFIG_USB_ARCH_HAS_HCD=y | ||
| 814 | # CONFIG_USB_ARCH_HAS_OHCI is not set | ||
| 815 | CONFIG_USB_ARCH_HAS_EHCI=y | ||
| 816 | CONFIG_USB=y | ||
| 817 | |||
| 818 | # | ||
| 819 | # USB Host Controller Drivers | ||
| 820 | # | ||
| 821 | # CONFIG_USB_C67X00_HCD is not set | ||
| 822 | CONFIG_USB_EHCI_HCD=y | ||
| 823 | CONFIG_USB_EHCI_ROOT_HUB_TT=y | ||
| 824 | # CONFIG_USB_EHCI_TT_NEWSCHED is not set | ||
| 825 | CONFIG_USB_EHCI_MXC=y | ||
| 826 | |||
| 827 | |||
| 813 | CONFIG_MMC=y | 828 | CONFIG_MMC=y |
| 814 | # CONFIG_MMC_DEBUG is not set | 829 | # CONFIG_MMC_DEBUG is not set |
| 815 | # CONFIG_MMC_UNSAFE_RESUME is not set | 830 | # CONFIG_MMC_UNSAFE_RESUME is not set |
diff --git a/arch/arm/configs/omap3_evm_defconfig b/arch/arm/configs/omap3_evm_defconfig index a6dd6d1af806..b02e371b0997 100644 --- a/arch/arm/configs/omap3_evm_defconfig +++ b/arch/arm/configs/omap3_evm_defconfig | |||
| @@ -911,7 +911,56 @@ CONFIG_DAB=y | |||
| 911 | # | 911 | # |
| 912 | # CONFIG_VGASTATE is not set | 912 | # CONFIG_VGASTATE is not set |
| 913 | CONFIG_VIDEO_OUTPUT_CONTROL=m | 913 | CONFIG_VIDEO_OUTPUT_CONTROL=m |
| 914 | # CONFIG_FB is not set | 914 | CONFIG_FB=y |
| 915 | # CONFIG_FIRMWARE_EDID is not set | ||
| 916 | # CONFIG_FB_DDC is not set | ||
| 917 | # CONFIG_FB_BOOT_VESA_SUPPORT is not set | ||
| 918 | CONFIG_FB_CFB_FILLRECT=y | ||
| 919 | CONFIG_FB_CFB_COPYAREA=y | ||
| 920 | CONFIG_FB_CFB_IMAGEBLIT=y | ||
| 921 | # CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set | ||
| 922 | # CONFIG_FB_SYS_FILLRECT is not set | ||
| 923 | # CONFIG_FB_SYS_COPYAREA is not set | ||
| 924 | # CONFIG_FB_SYS_IMAGEBLIT is not set | ||
| 925 | # CONFIG_FB_FOREIGN_ENDIAN is not set | ||
| 926 | # CONFIG_FB_SYS_FOPS is not set | ||
| 927 | # CONFIG_FB_SVGALIB is not set | ||
| 928 | # CONFIG_FB_MACMODES is not set | ||
| 929 | # CONFIG_FB_BACKLIGHT is not set | ||
| 930 | # CONFIG_FB_MODE_HELPERS is not set | ||
| 931 | # CONFIG_FB_TILEBLITTING is not set | ||
| 932 | |||
| 933 | # | ||
| 934 | # Frame buffer hardware drivers | ||
| 935 | # | ||
| 936 | # CONFIG_FB_S1D13XXX is not set | ||
| 937 | # CONFIG_FB_VIRTUAL is not set | ||
| 938 | # CONFIG_FB_METRONOME is not set | ||
| 939 | # CONFIG_FB_MB862XX is not set | ||
| 940 | # CONFIG_FB_BROADSHEET is not set | ||
| 941 | # CONFIG_FB_OMAP_BOOTLOADER_INIT is not set | ||
| 942 | CONFIG_OMAP2_VRAM=y | ||
| 943 | CONFIG_OMAP2_VRFB=y | ||
| 944 | CONFIG_OMAP2_DSS=y | ||
| 945 | CONFIG_OMAP2_VRAM_SIZE=4 | ||
| 946 | # CONFIG_OMAP2_DSS_DEBUG_SUPPORT is not set | ||
| 947 | # CONFIG_OMAP2_DSS_RFBI is not set | ||
| 948 | CONFIG_OMAP2_DSS_VENC=y | ||
| 949 | # CONFIG_OMAP2_DSS_SDI is not set | ||
| 950 | # CONFIG_OMAP2_DSS_DSI is not set | ||
| 951 | # CONFIG_OMAP2_DSS_FAKE_VSYNC is not set | ||
| 952 | CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=4 | ||
| 953 | CONFIG_FB_OMAP2=y | ||
| 954 | # CONFIG_FB_OMAP2_DEBUG_SUPPORT is not set | ||
| 955 | # CONFIG_FB_OMAP2_FORCE_AUTO_UPDATE is not set | ||
| 956 | CONFIG_FB_OMAP2_NUM_FBS=3 | ||
| 957 | |||
| 958 | # | ||
| 959 | # OMAP2/3 Display Device Drivers | ||
| 960 | # | ||
| 961 | CONFIG_PANEL_GENERIC=y | ||
| 962 | # CONFIG_PANEL_SAMSUNG_LTE430WQ_F0C is not set | ||
| 963 | CONFIG_PANEL_SHARP_LS037V7DW01=y | ||
| 915 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | 964 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set |
| 916 | 965 | ||
| 917 | # | 966 | # |
diff --git a/arch/arm/configs/rx51_defconfig b/arch/arm/configs/rx51_defconfig index 473f9e13f08b..56d4928cd4c9 100644 --- a/arch/arm/configs/rx51_defconfig +++ b/arch/arm/configs/rx51_defconfig | |||
| @@ -784,6 +784,7 @@ CONFIG_INPUT_KEYBOARD=y | |||
| 784 | # CONFIG_KEYBOARD_NEWTON is not set | 784 | # CONFIG_KEYBOARD_NEWTON is not set |
| 785 | # CONFIG_KEYBOARD_STOWAWAY is not set | 785 | # CONFIG_KEYBOARD_STOWAWAY is not set |
| 786 | CONFIG_KEYBOARD_GPIO=m | 786 | CONFIG_KEYBOARD_GPIO=m |
| 787 | CONFIG_KEYBOARD_TWL4030=y | ||
| 787 | # CONFIG_INPUT_MOUSE is not set | 788 | # CONFIG_INPUT_MOUSE is not set |
| 788 | # CONFIG_INPUT_JOYSTICK is not set | 789 | # CONFIG_INPUT_JOYSTICK is not set |
| 789 | # CONFIG_INPUT_TABLET is not set | 790 | # CONFIG_INPUT_TABLET is not set |
| @@ -809,6 +810,7 @@ CONFIG_INPUT_MISC=y | |||
| 809 | # CONFIG_INPUT_POWERMATE is not set | 810 | # CONFIG_INPUT_POWERMATE is not set |
| 810 | # CONFIG_INPUT_YEALINK is not set | 811 | # CONFIG_INPUT_YEALINK is not set |
| 811 | # CONFIG_INPUT_CM109 is not set | 812 | # CONFIG_INPUT_CM109 is not set |
| 813 | CONFIG_INPUT_TWL4030_PWRBUTTON=y | ||
| 812 | CONFIG_INPUT_UINPUT=m | 814 | CONFIG_INPUT_UINPUT=m |
| 813 | 815 | ||
| 814 | # | 816 | # |
| @@ -1110,7 +1112,40 @@ CONFIG_RADIO_ADAPTERS=y | |||
| 1110 | # | 1112 | # |
| 1111 | # CONFIG_VGASTATE is not set | 1113 | # CONFIG_VGASTATE is not set |
| 1112 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | 1114 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set |
| 1113 | # CONFIG_FB is not set | 1115 | CONFIG_FB=y |
| 1116 | CONFIG_FB_CFB_FILLRECT=y | ||
| 1117 | CONFIG_FB_CFB_COPYAREA=y | ||
| 1118 | CONFIG_FB_CFB_IMAGEBLIT=y | ||
| 1119 | |||
| 1120 | # Frame buffer hardware drivers | ||
| 1121 | # | ||
| 1122 | CONFIG_OMAP2_VRAM=y | ||
| 1123 | CONFIG_OMAP2_VRFB=y | ||
| 1124 | CONFIG_OMAP2_DSS=y | ||
| 1125 | CONFIG_OMAP2_VRAM_SIZE=0 | ||
| 1126 | # CONFIG_OMAP2_DSS_DEBUG_SUPPORT is not set | ||
| 1127 | # CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS is not set | ||
| 1128 | # CONFIG_OMAP2_DSS_DPI is not set | ||
| 1129 | # CONFIG_OMAP2_DSS_RFBI is not set | ||
| 1130 | # CONFIG_OMAP2_DSS_VENC is not set | ||
| 1131 | CONFIG_OMAP2_DSS_SDI=y | ||
| 1132 | # CONFIG_OMAP2_DSS_DSI is not set | ||
| 1133 | # CONFIG_OMAP2_DSS_FAKE_VSYNC is not set | ||
| 1134 | CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0 | ||
| 1135 | CONFIG_FB_OMAP2=y | ||
| 1136 | CONFIG_FB_OMAP2_DEBUG_SUPPORT=y | ||
| 1137 | CONFIG_FB_OMAP2_NUM_FBS=3 | ||
| 1138 | |||
| 1139 | # | ||
| 1140 | # OMAP2/3 Display Device Drivers | ||
| 1141 | # | ||
| 1142 | # CONFIG_PANEL_GENERIC is not set | ||
| 1143 | # CONFIG_PANEL_SHARP_LS037V7DW01 is not set | ||
| 1144 | # CONFIG_PANEL_SHARP_LQ043T1DG01 is not set | ||
| 1145 | # CONFIG_PANEL_TOPPOLY_TDO35S is not set | ||
| 1146 | # CONFIG_PANEL_TPO_TD043MTEA1 is not set | ||
| 1147 | CONFIG_PANEL_ACX565AKM=y | ||
| 1148 | |||
| 1114 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | 1149 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set |
| 1115 | 1150 | ||
| 1116 | # | 1151 | # |
| @@ -1127,6 +1162,8 @@ CONFIG_DISPLAY_SUPPORT=y | |||
| 1127 | # | 1162 | # |
| 1128 | # CONFIG_VGA_CONSOLE is not set | 1163 | # CONFIG_VGA_CONSOLE is not set |
| 1129 | CONFIG_DUMMY_CONSOLE=y | 1164 | CONFIG_DUMMY_CONSOLE=y |
| 1165 | CONFIG_FRAMEBUFFER_CONSOLE=y | ||
| 1166 | CONFIG_LOGO=y | ||
| 1130 | CONFIG_SOUND=y | 1167 | CONFIG_SOUND=y |
| 1131 | # CONFIG_SOUND_OSS_CORE is not set | 1168 | # CONFIG_SOUND_OSS_CORE is not set |
| 1132 | CONFIG_SND=y | 1169 | CONFIG_SND=y |
diff --git a/arch/arm/configs/s3c2410_defconfig b/arch/arm/configs/s3c2410_defconfig index 8e94c3caeb8c..44cea2ddd22b 100644 --- a/arch/arm/configs/s3c2410_defconfig +++ b/arch/arm/configs/s3c2410_defconfig | |||
| @@ -1,14 +1,15 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.30-rc2 | 3 | # Linux kernel version: 2.6.34 |
| 4 | # Fri May 28 19:15:48 2010 | ||
| 4 | # | 5 | # |
| 5 | CONFIG_ARM=y | 6 | CONFIG_ARM=y |
| 6 | CONFIG_HAVE_PWM=y | 7 | CONFIG_HAVE_PWM=y |
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | 8 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y |
| 8 | CONFIG_GENERIC_GPIO=y | 9 | CONFIG_GENERIC_GPIO=y |
| 9 | # CONFIG_GENERIC_TIME is not set | 10 | CONFIG_GENERIC_TIME=y |
| 10 | # CONFIG_GENERIC_CLOCKEVENTS is not set | 11 | CONFIG_ARCH_USES_GETTIMEOFFSET=y |
| 11 | CONFIG_MMU=y | 12 | CONFIG_HAVE_PROC_CPU=y |
| 12 | CONFIG_NO_IOPORT=y | 13 | CONFIG_NO_IOPORT=y |
| 13 | CONFIG_GENERIC_HARDIRQS=y | 14 | CONFIG_GENERIC_HARDIRQS=y |
| 14 | CONFIG_STACKTRACE_SUPPORT=y | 15 | CONFIG_STACKTRACE_SUPPORT=y |
| @@ -18,13 +19,14 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y | |||
| 18 | CONFIG_HARDIRQS_SW_RESEND=y | 19 | CONFIG_HARDIRQS_SW_RESEND=y |
| 19 | CONFIG_GENERIC_IRQ_PROBE=y | 20 | CONFIG_GENERIC_IRQ_PROBE=y |
| 20 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | 21 | CONFIG_RWSEM_GENERIC_SPINLOCK=y |
| 21 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | 22 | CONFIG_ARCH_HAS_CPUFREQ=y |
| 22 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||
| 23 | CONFIG_GENERIC_HWEIGHT=y | 23 | CONFIG_GENERIC_HWEIGHT=y |
| 24 | CONFIG_GENERIC_CALIBRATE_DELAY=y | 24 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
| 25 | CONFIG_NEED_DMA_MAP_STATE=y | ||
| 25 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | 26 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y |
| 26 | CONFIG_VECTORS_BASE=0xffff0000 | 27 | CONFIG_VECTORS_BASE=0xffff0000 |
| 27 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | 28 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" |
| 29 | CONFIG_CONSTRUCTORS=y | ||
| 28 | 30 | ||
| 29 | # | 31 | # |
| 30 | # General setup | 32 | # General setup |
| @@ -34,6 +36,13 @@ CONFIG_BROKEN_ON_SMP=y | |||
| 34 | CONFIG_INIT_ENV_ARG_LIMIT=32 | 36 | CONFIG_INIT_ENV_ARG_LIMIT=32 |
| 35 | CONFIG_LOCALVERSION="" | 37 | CONFIG_LOCALVERSION="" |
| 36 | CONFIG_LOCALVERSION_AUTO=y | 38 | CONFIG_LOCALVERSION_AUTO=y |
| 39 | CONFIG_HAVE_KERNEL_GZIP=y | ||
| 40 | CONFIG_HAVE_KERNEL_LZMA=y | ||
| 41 | CONFIG_HAVE_KERNEL_LZO=y | ||
| 42 | CONFIG_KERNEL_GZIP=y | ||
| 43 | # CONFIG_KERNEL_BZIP2 is not set | ||
| 44 | # CONFIG_KERNEL_LZMA is not set | ||
| 45 | # CONFIG_KERNEL_LZO is not set | ||
| 37 | CONFIG_SWAP=y | 46 | CONFIG_SWAP=y |
| 38 | CONFIG_SYSVIPC=y | 47 | CONFIG_SYSVIPC=y |
| 39 | CONFIG_SYSVIPC_SYSCTL=y | 48 | CONFIG_SYSVIPC_SYSCTL=y |
| @@ -45,15 +54,16 @@ CONFIG_SYSVIPC_SYSCTL=y | |||
| 45 | # | 54 | # |
| 46 | # RCU Subsystem | 55 | # RCU Subsystem |
| 47 | # | 56 | # |
| 48 | CONFIG_CLASSIC_RCU=y | 57 | CONFIG_TREE_RCU=y |
| 49 | # CONFIG_TREE_RCU is not set | 58 | # CONFIG_TREE_PREEMPT_RCU is not set |
| 50 | # CONFIG_PREEMPT_RCU is not set | 59 | # CONFIG_TINY_RCU is not set |
| 60 | # CONFIG_RCU_TRACE is not set | ||
| 61 | CONFIG_RCU_FANOUT=32 | ||
| 62 | # CONFIG_RCU_FANOUT_EXACT is not set | ||
| 51 | # CONFIG_TREE_RCU_TRACE is not set | 63 | # CONFIG_TREE_RCU_TRACE is not set |
| 52 | # CONFIG_PREEMPT_RCU_TRACE is not set | ||
| 53 | CONFIG_IKCONFIG=m | 64 | CONFIG_IKCONFIG=m |
| 54 | CONFIG_IKCONFIG_PROC=y | 65 | CONFIG_IKCONFIG_PROC=y |
| 55 | CONFIG_LOG_BUF_SHIFT=16 | 66 | CONFIG_LOG_BUF_SHIFT=16 |
| 56 | # CONFIG_GROUP_SCHED is not set | ||
| 57 | # CONFIG_CGROUPS is not set | 67 | # CONFIG_CGROUPS is not set |
| 58 | CONFIG_SYSFS_DEPRECATED=y | 68 | CONFIG_SYSFS_DEPRECATED=y |
| 59 | CONFIG_SYSFS_DEPRECATED_V2=y | 69 | CONFIG_SYSFS_DEPRECATED_V2=y |
| @@ -69,6 +79,7 @@ CONFIG_INITRAMFS_SOURCE="" | |||
| 69 | CONFIG_RD_GZIP=y | 79 | CONFIG_RD_GZIP=y |
| 70 | CONFIG_RD_BZIP2=y | 80 | CONFIG_RD_BZIP2=y |
| 71 | CONFIG_RD_LZMA=y | 81 | CONFIG_RD_LZMA=y |
| 82 | CONFIG_RD_LZO=y | ||
| 72 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | 83 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y |
| 73 | CONFIG_SYSCTL=y | 84 | CONFIG_SYSCTL=y |
| 74 | CONFIG_ANON_INODES=y | 85 | CONFIG_ANON_INODES=y |
| @@ -78,7 +89,6 @@ CONFIG_SYSCTL_SYSCALL=y | |||
| 78 | CONFIG_KALLSYMS=y | 89 | CONFIG_KALLSYMS=y |
| 79 | # CONFIG_KALLSYMS_ALL is not set | 90 | # CONFIG_KALLSYMS_ALL is not set |
| 80 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | 91 | # CONFIG_KALLSYMS_EXTRA_PASS is not set |
| 81 | # CONFIG_STRIP_ASM_SYMS is not set | ||
| 82 | CONFIG_HOTPLUG=y | 92 | CONFIG_HOTPLUG=y |
| 83 | CONFIG_PRINTK=y | 93 | CONFIG_PRINTK=y |
| 84 | CONFIG_BUG=y | 94 | CONFIG_BUG=y |
| @@ -91,19 +101,30 @@ CONFIG_TIMERFD=y | |||
| 91 | CONFIG_EVENTFD=y | 101 | CONFIG_EVENTFD=y |
| 92 | CONFIG_SHMEM=y | 102 | CONFIG_SHMEM=y |
| 93 | CONFIG_AIO=y | 103 | CONFIG_AIO=y |
| 104 | CONFIG_HAVE_PERF_EVENTS=y | ||
| 105 | CONFIG_PERF_USE_VMALLOC=y | ||
| 106 | |||
| 107 | # | ||
| 108 | # Kernel Performance Events And Counters | ||
| 109 | # | ||
| 110 | # CONFIG_PERF_EVENTS is not set | ||
| 111 | # CONFIG_PERF_COUNTERS is not set | ||
| 94 | CONFIG_VM_EVENT_COUNTERS=y | 112 | CONFIG_VM_EVENT_COUNTERS=y |
| 95 | CONFIG_COMPAT_BRK=y | 113 | CONFIG_COMPAT_BRK=y |
| 96 | CONFIG_SLAB=y | 114 | CONFIG_SLAB=y |
| 97 | # CONFIG_SLUB is not set | 115 | # CONFIG_SLUB is not set |
| 98 | # CONFIG_SLOB is not set | 116 | # CONFIG_SLOB is not set |
| 99 | # CONFIG_PROFILING is not set | 117 | # CONFIG_PROFILING is not set |
| 100 | # CONFIG_MARKERS is not set | ||
| 101 | CONFIG_HAVE_OPROFILE=y | 118 | CONFIG_HAVE_OPROFILE=y |
| 102 | # CONFIG_KPROBES is not set | 119 | # CONFIG_KPROBES is not set |
| 103 | CONFIG_HAVE_KPROBES=y | 120 | CONFIG_HAVE_KPROBES=y |
| 104 | CONFIG_HAVE_KRETPROBES=y | 121 | CONFIG_HAVE_KRETPROBES=y |
| 105 | CONFIG_HAVE_CLK=y | 122 | CONFIG_HAVE_CLK=y |
| 106 | # CONFIG_SLOW_WORK is not set | 123 | |
| 124 | # | ||
| 125 | # GCOV-based kernel profiling | ||
| 126 | # | ||
| 127 | CONFIG_SLOW_WORK=y | ||
| 107 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | 128 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y |
| 108 | CONFIG_SLABINFO=y | 129 | CONFIG_SLABINFO=y |
| 109 | CONFIG_RT_MUTEXES=y | 130 | CONFIG_RT_MUTEXES=y |
| @@ -115,7 +136,7 @@ CONFIG_MODULE_UNLOAD=y | |||
| 115 | # CONFIG_MODVERSIONS is not set | 136 | # CONFIG_MODVERSIONS is not set |
| 116 | # CONFIG_MODULE_SRCVERSION_ALL is not set | 137 | # CONFIG_MODULE_SRCVERSION_ALL is not set |
| 117 | CONFIG_BLOCK=y | 138 | CONFIG_BLOCK=y |
| 118 | # CONFIG_LBD is not set | 139 | CONFIG_LBDAF=y |
| 119 | # CONFIG_BLK_DEV_BSG is not set | 140 | # CONFIG_BLK_DEV_BSG is not set |
| 120 | # CONFIG_BLK_DEV_INTEGRITY is not set | 141 | # CONFIG_BLK_DEV_INTEGRITY is not set |
| 121 | 142 | ||
| @@ -123,32 +144,64 @@ CONFIG_BLOCK=y | |||
| 123 | # IO Schedulers | 144 | # IO Schedulers |
| 124 | # | 145 | # |
| 125 | CONFIG_IOSCHED_NOOP=y | 146 | CONFIG_IOSCHED_NOOP=y |
| 126 | CONFIG_IOSCHED_AS=y | ||
| 127 | CONFIG_IOSCHED_DEADLINE=y | 147 | CONFIG_IOSCHED_DEADLINE=y |
| 128 | CONFIG_IOSCHED_CFQ=y | 148 | CONFIG_IOSCHED_CFQ=y |
| 129 | CONFIG_DEFAULT_AS=y | ||
| 130 | # CONFIG_DEFAULT_DEADLINE is not set | 149 | # CONFIG_DEFAULT_DEADLINE is not set |
| 131 | # CONFIG_DEFAULT_CFQ is not set | 150 | CONFIG_DEFAULT_CFQ=y |
| 132 | # CONFIG_DEFAULT_NOOP is not set | 151 | # CONFIG_DEFAULT_NOOP is not set |
| 133 | CONFIG_DEFAULT_IOSCHED="anticipatory" | 152 | CONFIG_DEFAULT_IOSCHED="cfq" |
| 153 | # CONFIG_INLINE_SPIN_TRYLOCK is not set | ||
| 154 | # CONFIG_INLINE_SPIN_TRYLOCK_BH is not set | ||
| 155 | # CONFIG_INLINE_SPIN_LOCK is not set | ||
| 156 | # CONFIG_INLINE_SPIN_LOCK_BH is not set | ||
| 157 | # CONFIG_INLINE_SPIN_LOCK_IRQ is not set | ||
| 158 | # CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set | ||
| 159 | CONFIG_INLINE_SPIN_UNLOCK=y | ||
| 160 | # CONFIG_INLINE_SPIN_UNLOCK_BH is not set | ||
| 161 | CONFIG_INLINE_SPIN_UNLOCK_IRQ=y | ||
| 162 | # CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set | ||
| 163 | # CONFIG_INLINE_READ_TRYLOCK is not set | ||
| 164 | # CONFIG_INLINE_READ_LOCK is not set | ||
| 165 | # CONFIG_INLINE_READ_LOCK_BH is not set | ||
| 166 | # CONFIG_INLINE_READ_LOCK_IRQ is not set | ||
| 167 | # CONFIG_INLINE_READ_LOCK_IRQSAVE is not set | ||
| 168 | CONFIG_INLINE_READ_UNLOCK=y | ||
| 169 | # CONFIG_INLINE_READ_UNLOCK_BH is not set | ||
| 170 | CONFIG_INLINE_READ_UNLOCK_IRQ=y | ||
| 171 | # CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set | ||
| 172 | # CONFIG_INLINE_WRITE_TRYLOCK is not set | ||
| 173 | # CONFIG_INLINE_WRITE_LOCK is not set | ||
| 174 | # CONFIG_INLINE_WRITE_LOCK_BH is not set | ||
| 175 | # CONFIG_INLINE_WRITE_LOCK_IRQ is not set | ||
| 176 | # CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set | ||
| 177 | CONFIG_INLINE_WRITE_UNLOCK=y | ||
| 178 | # CONFIG_INLINE_WRITE_UNLOCK_BH is not set | ||
| 179 | CONFIG_INLINE_WRITE_UNLOCK_IRQ=y | ||
| 180 | # CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set | ||
| 181 | # CONFIG_MUTEX_SPIN_ON_OWNER is not set | ||
| 134 | CONFIG_FREEZER=y | 182 | CONFIG_FREEZER=y |
| 135 | 183 | ||
| 136 | # | 184 | # |
| 137 | # System Type | 185 | # System Type |
| 138 | # | 186 | # |
| 187 | CONFIG_MMU=y | ||
| 139 | # CONFIG_ARCH_AAEC2000 is not set | 188 | # CONFIG_ARCH_AAEC2000 is not set |
| 140 | # CONFIG_ARCH_INTEGRATOR is not set | 189 | # CONFIG_ARCH_INTEGRATOR is not set |
| 141 | # CONFIG_ARCH_REALVIEW is not set | 190 | # CONFIG_ARCH_REALVIEW is not set |
| 142 | # CONFIG_ARCH_VERSATILE is not set | 191 | # CONFIG_ARCH_VERSATILE is not set |
| 192 | # CONFIG_ARCH_VEXPRESS is not set | ||
| 143 | # CONFIG_ARCH_AT91 is not set | 193 | # CONFIG_ARCH_AT91 is not set |
| 194 | # CONFIG_ARCH_BCMRING is not set | ||
| 144 | # CONFIG_ARCH_CLPS711X is not set | 195 | # CONFIG_ARCH_CLPS711X is not set |
| 196 | # CONFIG_ARCH_CNS3XXX is not set | ||
| 197 | # CONFIG_ARCH_GEMINI is not set | ||
| 145 | # CONFIG_ARCH_EBSA110 is not set | 198 | # CONFIG_ARCH_EBSA110 is not set |
| 146 | # CONFIG_ARCH_EP93XX is not set | 199 | # CONFIG_ARCH_EP93XX is not set |
| 147 | # CONFIG_ARCH_GEMINI is not set | ||
| 148 | # CONFIG_ARCH_FOOTBRIDGE is not set | 200 | # CONFIG_ARCH_FOOTBRIDGE is not set |
| 201 | # CONFIG_ARCH_MXC is not set | ||
| 202 | # CONFIG_ARCH_STMP3XXX is not set | ||
| 149 | # CONFIG_ARCH_NETX is not set | 203 | # CONFIG_ARCH_NETX is not set |
| 150 | # CONFIG_ARCH_H720X is not set | 204 | # CONFIG_ARCH_H720X is not set |
| 151 | # CONFIG_ARCH_IMX is not set | ||
| 152 | # CONFIG_ARCH_IOP13XX is not set | 205 | # CONFIG_ARCH_IOP13XX is not set |
| 153 | # CONFIG_ARCH_IOP32X is not set | 206 | # CONFIG_ARCH_IOP32X is not set |
| 154 | # CONFIG_ARCH_IOP33X is not set | 207 | # CONFIG_ARCH_IOP33X is not set |
| @@ -156,42 +209,37 @@ CONFIG_FREEZER=y | |||
| 156 | # CONFIG_ARCH_IXP2000 is not set | 209 | # CONFIG_ARCH_IXP2000 is not set |
| 157 | # CONFIG_ARCH_IXP4XX is not set | 210 | # CONFIG_ARCH_IXP4XX is not set |
| 158 | # CONFIG_ARCH_L7200 is not set | 211 | # CONFIG_ARCH_L7200 is not set |
| 212 | # CONFIG_ARCH_DOVE is not set | ||
| 159 | # CONFIG_ARCH_KIRKWOOD is not set | 213 | # CONFIG_ARCH_KIRKWOOD is not set |
| 160 | # CONFIG_ARCH_KS8695 is not set | ||
| 161 | # CONFIG_ARCH_NS9XXX is not set | ||
| 162 | # CONFIG_ARCH_LOKI is not set | 214 | # CONFIG_ARCH_LOKI is not set |
| 163 | # CONFIG_ARCH_MV78XX0 is not set | 215 | # CONFIG_ARCH_MV78XX0 is not set |
| 164 | # CONFIG_ARCH_MXC is not set | ||
| 165 | # CONFIG_ARCH_ORION5X is not set | 216 | # CONFIG_ARCH_ORION5X is not set |
| 217 | # CONFIG_ARCH_MMP is not set | ||
| 218 | # CONFIG_ARCH_KS8695 is not set | ||
| 219 | # CONFIG_ARCH_NS9XXX is not set | ||
| 220 | # CONFIG_ARCH_W90X900 is not set | ||
| 221 | # CONFIG_ARCH_NUC93X is not set | ||
| 166 | # CONFIG_ARCH_PNX4008 is not set | 222 | # CONFIG_ARCH_PNX4008 is not set |
| 167 | # CONFIG_ARCH_PXA is not set | 223 | # CONFIG_ARCH_PXA is not set |
| 168 | # CONFIG_ARCH_MMP is not set | 224 | # CONFIG_ARCH_MSM is not set |
| 225 | # CONFIG_ARCH_SHMOBILE is not set | ||
| 169 | # CONFIG_ARCH_RPC is not set | 226 | # CONFIG_ARCH_RPC is not set |
| 170 | # CONFIG_ARCH_SA1100 is not set | 227 | # CONFIG_ARCH_SA1100 is not set |
| 171 | CONFIG_ARCH_S3C2410=y | 228 | CONFIG_ARCH_S3C2410=y |
| 172 | # CONFIG_ARCH_S3C64XX is not set | 229 | # CONFIG_ARCH_S3C64XX is not set |
| 230 | # CONFIG_ARCH_S5P6440 is not set | ||
| 231 | # CONFIG_ARCH_S5P6442 is not set | ||
| 232 | # CONFIG_ARCH_S5PC100 is not set | ||
| 233 | # CONFIG_ARCH_S5PV210 is not set | ||
| 173 | # CONFIG_ARCH_SHARK is not set | 234 | # CONFIG_ARCH_SHARK is not set |
| 174 | # CONFIG_ARCH_LH7A40X is not set | 235 | # CONFIG_ARCH_LH7A40X is not set |
| 236 | # CONFIG_ARCH_U300 is not set | ||
| 237 | # CONFIG_ARCH_U8500 is not set | ||
| 238 | # CONFIG_ARCH_NOMADIK is not set | ||
| 175 | # CONFIG_ARCH_DAVINCI is not set | 239 | # CONFIG_ARCH_DAVINCI is not set |
| 176 | # CONFIG_ARCH_OMAP is not set | 240 | # CONFIG_ARCH_OMAP is not set |
| 177 | # CONFIG_ARCH_MSM is not set | 241 | # CONFIG_PLAT_SPEAR is not set |
| 178 | # CONFIG_ARCH_W90X900 is not set | 242 | CONFIG_PLAT_SAMSUNG=y |
| 179 | CONFIG_PLAT_S3C24XX=y | ||
| 180 | CONFIG_S3C2410_CLOCK=y | ||
| 181 | CONFIG_S3C24XX_DCLK=y | ||
| 182 | CONFIG_CPU_S3C244X=y | ||
| 183 | CONFIG_S3C24XX_PWM=y | ||
| 184 | CONFIG_S3C24XX_GPIO_EXTRA=128 | ||
| 185 | CONFIG_S3C24XX_GPIO_EXTRA64=y | ||
| 186 | CONFIG_S3C24XX_GPIO_EXTRA128=y | ||
| 187 | CONFIG_PM_SIMTEC=y | ||
| 188 | CONFIG_S3C2410_DMA=y | ||
| 189 | # CONFIG_S3C2410_DMA_DEBUG is not set | ||
| 190 | CONFIG_S3C_ADC=y | ||
| 191 | CONFIG_MACH_SMDK=y | ||
| 192 | CONFIG_PLAT_S3C=y | ||
| 193 | CONFIG_CPU_LLSERIAL_S3C2410=y | ||
| 194 | CONFIG_CPU_LLSERIAL_S3C2440=y | ||
| 195 | 243 | ||
| 196 | # | 244 | # |
| 197 | # Boot options | 245 | # Boot options |
| @@ -199,15 +247,44 @@ CONFIG_CPU_LLSERIAL_S3C2440=y | |||
| 199 | # CONFIG_S3C_BOOT_WATCHDOG is not set | 247 | # CONFIG_S3C_BOOT_WATCHDOG is not set |
| 200 | CONFIG_S3C_BOOT_ERROR_RESET=y | 248 | CONFIG_S3C_BOOT_ERROR_RESET=y |
| 201 | CONFIG_S3C_BOOT_UART_FORCE_FIFO=y | 249 | CONFIG_S3C_BOOT_UART_FORCE_FIFO=y |
| 250 | CONFIG_S3C_LOWLEVEL_UART_PORT=0 | ||
| 251 | CONFIG_SAMSUNG_CLKSRC=y | ||
| 252 | CONFIG_S3C_GPIO_CFG_S3C24XX=y | ||
| 253 | CONFIG_S3C_GPIO_PULL_UPDOWN=y | ||
| 254 | CONFIG_S3C_GPIO_PULL_UP=y | ||
| 255 | CONFIG_SAMSUNG_GPIO_EXTRA=0 | ||
| 256 | CONFIG_S3C_GPIO_SPACE=0 | ||
| 257 | CONFIG_S3C_ADC=y | ||
| 258 | CONFIG_S3C_DEV_HSMMC=y | ||
| 259 | CONFIG_S3C_DEV_HSMMC1=y | ||
| 260 | CONFIG_S3C_DEV_HWMON=y | ||
| 261 | CONFIG_S3C_DEV_FB=y | ||
| 262 | CONFIG_S3C_DEV_USB_HOST=y | ||
| 263 | CONFIG_S3C_DEV_WDT=y | ||
| 264 | CONFIG_S3C_DEV_NAND=y | ||
| 265 | CONFIG_S3C_DMA=y | ||
| 202 | 266 | ||
| 203 | # | 267 | # |
| 204 | # Power management | 268 | # Power management |
| 205 | # | 269 | # |
| 206 | # CONFIG_SAMSUNG_PM_DEBUG is not set | 270 | # CONFIG_SAMSUNG_PM_DEBUG is not set |
| 207 | # CONFIG_SAMSUNG_PM_CHECK is not set | 271 | # CONFIG_SAMSUNG_PM_CHECK is not set |
| 208 | CONFIG_S3C_LOWLEVEL_UART_PORT=0 | 272 | CONFIG_PLAT_S3C24XX=y |
| 209 | CONFIG_S3C_GPIO_SPACE=0 | 273 | CONFIG_CPU_LLSERIAL_S3C2410=y |
| 210 | CONFIG_S3C_DEV_HSMMC=y | 274 | CONFIG_CPU_LLSERIAL_S3C2440=y |
| 275 | CONFIG_S3C2410_CLOCK=y | ||
| 276 | CONFIG_S3C2443_CLOCK=y | ||
| 277 | CONFIG_S3C24XX_DCLK=y | ||
| 278 | CONFIG_S3C24XX_PWM=y | ||
| 279 | CONFIG_S3C24XX_GPIO_EXTRA=128 | ||
| 280 | CONFIG_S3C24XX_GPIO_EXTRA64=y | ||
| 281 | CONFIG_S3C24XX_GPIO_EXTRA128=y | ||
| 282 | CONFIG_PM_SIMTEC=y | ||
| 283 | CONFIG_S3C2410_DMA=y | ||
| 284 | # CONFIG_S3C2410_DMA_DEBUG is not set | ||
| 285 | CONFIG_MACH_SMDK=y | ||
| 286 | CONFIG_S3C24XX_SIMTEC_AUDIO=y | ||
| 287 | CONFIG_S3C2410_SETUP_TS=y | ||
| 211 | 288 | ||
| 212 | # | 289 | # |
| 213 | # S3C2400 Machines | 290 | # S3C2400 Machines |
| @@ -224,8 +301,10 @@ CONFIG_MACH_BAST_IDE=y | |||
| 224 | # | 301 | # |
| 225 | CONFIG_ARCH_SMDK2410=y | 302 | CONFIG_ARCH_SMDK2410=y |
| 226 | CONFIG_ARCH_H1940=y | 303 | CONFIG_ARCH_H1940=y |
| 304 | # CONFIG_H1940BT is not set | ||
| 227 | CONFIG_PM_H1940=y | 305 | CONFIG_PM_H1940=y |
| 228 | CONFIG_MACH_N30=y | 306 | CONFIG_MACH_N30=y |
| 307 | CONFIG_MACH_N35=y | ||
| 229 | CONFIG_ARCH_BAST=y | 308 | CONFIG_ARCH_BAST=y |
| 230 | CONFIG_MACH_OTOM=y | 309 | CONFIG_MACH_OTOM=y |
| 231 | CONFIG_MACH_AML_M5900=y | 310 | CONFIG_MACH_AML_M5900=y |
| @@ -246,26 +325,35 @@ CONFIG_MACH_SMDK2413=y | |||
| 246 | CONFIG_MACH_S3C2413=y | 325 | CONFIG_MACH_S3C2413=y |
| 247 | CONFIG_MACH_SMDK2412=y | 326 | CONFIG_MACH_SMDK2412=y |
| 248 | CONFIG_MACH_VSTMS=y | 327 | CONFIG_MACH_VSTMS=y |
| 328 | CONFIG_CPU_S3C2416=y | ||
| 329 | CONFIG_S3C2416_DMA=y | ||
| 330 | |||
| 331 | # | ||
| 332 | # S3C2416 Machines | ||
| 333 | # | ||
| 334 | CONFIG_MACH_SMDK2416=y | ||
| 249 | CONFIG_CPU_S3C2440=y | 335 | CONFIG_CPU_S3C2440=y |
| 336 | CONFIG_CPU_S3C2442=y | ||
| 337 | CONFIG_CPU_S3C244X=y | ||
| 338 | CONFIG_S3C2440_XTAL_12000000=y | ||
| 339 | CONFIG_S3C2440_XTAL_16934400=y | ||
| 250 | CONFIG_S3C2440_DMA=y | 340 | CONFIG_S3C2440_DMA=y |
| 251 | 341 | ||
| 252 | # | 342 | # |
| 253 | # S3C2440 Machines | 343 | # S3C2440 and S3C2442 Machines |
| 254 | # | 344 | # |
| 255 | CONFIG_MACH_ANUBIS=y | 345 | CONFIG_MACH_ANUBIS=y |
| 346 | CONFIG_MACH_NEO1973_GTA02=y | ||
| 256 | CONFIG_MACH_OSIRIS=y | 347 | CONFIG_MACH_OSIRIS=y |
| 348 | CONFIG_MACH_OSIRIS_DVS=m | ||
| 257 | CONFIG_MACH_RX3715=y | 349 | CONFIG_MACH_RX3715=y |
| 258 | CONFIG_ARCH_S3C2440=y | 350 | CONFIG_ARCH_S3C2440=y |
| 259 | CONFIG_MACH_NEXCODER_2440=y | 351 | CONFIG_MACH_NEXCODER_2440=y |
| 260 | CONFIG_SMDK2440_CPU2440=y | 352 | CONFIG_SMDK2440_CPU2440=y |
| 353 | CONFIG_SMDK2440_CPU2442=y | ||
| 261 | CONFIG_MACH_AT2440EVB=y | 354 | CONFIG_MACH_AT2440EVB=y |
| 262 | CONFIG_CPU_S3C2442=y | ||
| 263 | CONFIG_MACH_MINI2440=y | 355 | CONFIG_MACH_MINI2440=y |
| 264 | 356 | CONFIG_MACH_RX1950=y | |
| 265 | # | ||
| 266 | # S3C2442 Machines | ||
| 267 | # | ||
| 268 | CONFIG_SMDK2440_CPU2442=y | ||
| 269 | CONFIG_CPU_S3C2443=y | 357 | CONFIG_CPU_S3C2443=y |
| 270 | CONFIG_S3C2443_DMA=y | 358 | CONFIG_S3C2443_DMA=y |
| 271 | 359 | ||
| @@ -283,7 +371,7 @@ CONFIG_CPU_32v4T=y | |||
| 283 | CONFIG_CPU_32v5=y | 371 | CONFIG_CPU_32v5=y |
| 284 | CONFIG_CPU_ABRT_EV4T=y | 372 | CONFIG_CPU_ABRT_EV4T=y |
| 285 | CONFIG_CPU_ABRT_EV5TJ=y | 373 | CONFIG_CPU_ABRT_EV5TJ=y |
| 286 | CONFIG_CPU_PABRT_NOIFAR=y | 374 | CONFIG_CPU_PABRT_LEGACY=y |
| 287 | CONFIG_CPU_CACHE_V4WT=y | 375 | CONFIG_CPU_CACHE_V4WT=y |
| 288 | CONFIG_CPU_CACHE_VIVT=y | 376 | CONFIG_CPU_CACHE_VIVT=y |
| 289 | CONFIG_CPU_COPY_V4WB=y | 377 | CONFIG_CPU_COPY_V4WB=y |
| @@ -299,7 +387,7 @@ CONFIG_CPU_CP15_MMU=y | |||
| 299 | # CONFIG_CPU_DCACHE_DISABLE is not set | 387 | # CONFIG_CPU_DCACHE_DISABLE is not set |
| 300 | # CONFIG_CPU_DCACHE_WRITETHROUGH is not set | 388 | # CONFIG_CPU_DCACHE_WRITETHROUGH is not set |
| 301 | # CONFIG_CPU_CACHE_ROUND_ROBIN is not set | 389 | # CONFIG_CPU_CACHE_ROUND_ROBIN is not set |
| 302 | # CONFIG_OUTER_CACHE is not set | 390 | CONFIG_ARM_L1_CACHE_SHIFT=5 |
| 303 | 391 | ||
| 304 | # | 392 | # |
| 305 | # Bus support | 393 | # Bus support |
| @@ -316,10 +404,11 @@ CONFIG_VMSPLIT_3G=y | |||
| 316 | # CONFIG_VMSPLIT_2G is not set | 404 | # CONFIG_VMSPLIT_2G is not set |
| 317 | # CONFIG_VMSPLIT_1G is not set | 405 | # CONFIG_VMSPLIT_1G is not set |
| 318 | CONFIG_PAGE_OFFSET=0xC0000000 | 406 | CONFIG_PAGE_OFFSET=0xC0000000 |
| 407 | CONFIG_PREEMPT_NONE=y | ||
| 408 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
| 319 | # CONFIG_PREEMPT is not set | 409 | # CONFIG_PREEMPT is not set |
| 320 | CONFIG_HZ=200 | 410 | CONFIG_HZ=200 |
| 321 | # CONFIG_AEABI is not set | 411 | # CONFIG_AEABI is not set |
| 322 | CONFIG_ARCH_FLATMEM_HAS_HOLES=y | ||
| 323 | # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set | 412 | # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set |
| 324 | # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set | 413 | # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set |
| 325 | # CONFIG_HIGHMEM is not set | 414 | # CONFIG_HIGHMEM is not set |
| @@ -330,14 +419,14 @@ CONFIG_FLATMEM_MANUAL=y | |||
| 330 | CONFIG_FLATMEM=y | 419 | CONFIG_FLATMEM=y |
| 331 | CONFIG_FLAT_NODE_MEM_MAP=y | 420 | CONFIG_FLAT_NODE_MEM_MAP=y |
| 332 | CONFIG_PAGEFLAGS_EXTENDED=y | 421 | CONFIG_PAGEFLAGS_EXTENDED=y |
| 333 | CONFIG_SPLIT_PTLOCK_CPUS=4096 | 422 | CONFIG_SPLIT_PTLOCK_CPUS=999999 |
| 334 | # CONFIG_PHYS_ADDR_T_64BIT is not set | 423 | # CONFIG_PHYS_ADDR_T_64BIT is not set |
| 335 | CONFIG_ZONE_DMA_FLAG=0 | 424 | CONFIG_ZONE_DMA_FLAG=0 |
| 336 | CONFIG_VIRT_TO_BUS=y | 425 | CONFIG_VIRT_TO_BUS=y |
| 337 | CONFIG_UNEVICTABLE_LRU=y | 426 | # CONFIG_KSM is not set |
| 338 | CONFIG_HAVE_MLOCK=y | 427 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 |
| 339 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | ||
| 340 | CONFIG_ALIGNMENT_TRAP=y | 428 | CONFIG_ALIGNMENT_TRAP=y |
| 429 | # CONFIG_UACCESS_WITH_MEMCPY is not set | ||
| 341 | 430 | ||
| 342 | # | 431 | # |
| 343 | # Boot options | 432 | # Boot options |
| @@ -345,12 +434,14 @@ CONFIG_ALIGNMENT_TRAP=y | |||
| 345 | CONFIG_ZBOOT_ROM_TEXT=0x0 | 434 | CONFIG_ZBOOT_ROM_TEXT=0x0 |
| 346 | CONFIG_ZBOOT_ROM_BSS=0x0 | 435 | CONFIG_ZBOOT_ROM_BSS=0x0 |
| 347 | CONFIG_CMDLINE="root=/dev/hda1 ro init=/bin/bash console=ttySAC0" | 436 | CONFIG_CMDLINE="root=/dev/hda1 ro init=/bin/bash console=ttySAC0" |
| 437 | # CONFIG_CMDLINE_FORCE is not set | ||
| 348 | # CONFIG_XIP_KERNEL is not set | 438 | # CONFIG_XIP_KERNEL is not set |
| 349 | # CONFIG_KEXEC is not set | 439 | # CONFIG_KEXEC is not set |
| 350 | 440 | ||
| 351 | # | 441 | # |
| 352 | # CPU Power Management | 442 | # CPU Power Management |
| 353 | # | 443 | # |
| 444 | # CONFIG_CPU_FREQ is not set | ||
| 354 | # CONFIG_CPU_IDLE is not set | 445 | # CONFIG_CPU_IDLE is not set |
| 355 | 446 | ||
| 356 | # | 447 | # |
| @@ -384,6 +475,8 @@ CONFIG_PM_SLEEP=y | |||
| 384 | CONFIG_SUSPEND=y | 475 | CONFIG_SUSPEND=y |
| 385 | CONFIG_SUSPEND_FREEZER=y | 476 | CONFIG_SUSPEND_FREEZER=y |
| 386 | CONFIG_APM_EMULATION=m | 477 | CONFIG_APM_EMULATION=m |
| 478 | # CONFIG_PM_RUNTIME is not set | ||
| 479 | CONFIG_PM_OPS=y | ||
| 387 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | 480 | CONFIG_ARCH_SUSPEND_POSSIBLE=y |
| 388 | CONFIG_NET=y | 481 | CONFIG_NET=y |
| 389 | 482 | ||
| @@ -391,7 +484,6 @@ CONFIG_NET=y | |||
| 391 | # Networking options | 484 | # Networking options |
| 392 | # | 485 | # |
| 393 | CONFIG_PACKET=y | 486 | CONFIG_PACKET=y |
| 394 | # CONFIG_PACKET_MMAP is not set | ||
| 395 | CONFIG_UNIX=y | 487 | CONFIG_UNIX=y |
| 396 | CONFIG_XFRM=y | 488 | CONFIG_XFRM=y |
| 397 | CONFIG_XFRM_USER=m | 489 | CONFIG_XFRM_USER=m |
| @@ -442,7 +534,9 @@ CONFIG_TCP_CONG_ILLINOIS=m | |||
| 442 | # CONFIG_DEFAULT_BIC is not set | 534 | # CONFIG_DEFAULT_BIC is not set |
| 443 | CONFIG_DEFAULT_CUBIC=y | 535 | CONFIG_DEFAULT_CUBIC=y |
| 444 | # CONFIG_DEFAULT_HTCP is not set | 536 | # CONFIG_DEFAULT_HTCP is not set |
| 537 | # CONFIG_DEFAULT_HYBLA is not set | ||
| 445 | # CONFIG_DEFAULT_VEGAS is not set | 538 | # CONFIG_DEFAULT_VEGAS is not set |
| 539 | # CONFIG_DEFAULT_VENO is not set | ||
| 446 | # CONFIG_DEFAULT_WESTWOOD is not set | 540 | # CONFIG_DEFAULT_WESTWOOD is not set |
| 447 | # CONFIG_DEFAULT_RENO is not set | 541 | # CONFIG_DEFAULT_RENO is not set |
| 448 | CONFIG_DEFAULT_TCP_CONG="cubic" | 542 | CONFIG_DEFAULT_TCP_CONG="cubic" |
| @@ -463,6 +557,7 @@ CONFIG_INET6_XFRM_MODE_TUNNEL=m | |||
| 463 | CONFIG_INET6_XFRM_MODE_BEET=m | 557 | CONFIG_INET6_XFRM_MODE_BEET=m |
| 464 | CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m | 558 | CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m |
| 465 | CONFIG_IPV6_SIT=m | 559 | CONFIG_IPV6_SIT=m |
| 560 | # CONFIG_IPV6_SIT_6RD is not set | ||
| 466 | CONFIG_IPV6_NDISC_NODETYPE=y | 561 | CONFIG_IPV6_NDISC_NODETYPE=y |
| 467 | CONFIG_IPV6_TUNNEL=m | 562 | CONFIG_IPV6_TUNNEL=m |
| 468 | # CONFIG_IPV6_MULTIPLE_TABLES is not set | 563 | # CONFIG_IPV6_MULTIPLE_TABLES is not set |
| @@ -498,8 +593,19 @@ CONFIG_NF_CONNTRACK_TFTP=m | |||
| 498 | CONFIG_NF_CT_NETLINK=m | 593 | CONFIG_NF_CT_NETLINK=m |
| 499 | # CONFIG_NETFILTER_TPROXY is not set | 594 | # CONFIG_NETFILTER_TPROXY is not set |
| 500 | CONFIG_NETFILTER_XTABLES=m | 595 | CONFIG_NETFILTER_XTABLES=m |
| 596 | |||
| 597 | # | ||
| 598 | # Xtables combined modules | ||
| 599 | # | ||
| 600 | CONFIG_NETFILTER_XT_MARK=m | ||
| 601 | CONFIG_NETFILTER_XT_CONNMARK=m | ||
| 602 | |||
| 603 | # | ||
| 604 | # Xtables targets | ||
| 605 | # | ||
| 501 | CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m | 606 | CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m |
| 502 | CONFIG_NETFILTER_XT_TARGET_CONNMARK=m | 607 | CONFIG_NETFILTER_XT_TARGET_CONNMARK=m |
| 608 | # CONFIG_NETFILTER_XT_TARGET_CT is not set | ||
| 503 | # CONFIG_NETFILTER_XT_TARGET_DSCP is not set | 609 | # CONFIG_NETFILTER_XT_TARGET_DSCP is not set |
| 504 | CONFIG_NETFILTER_XT_TARGET_HL=m | 610 | CONFIG_NETFILTER_XT_TARGET_HL=m |
| 505 | CONFIG_NETFILTER_XT_TARGET_LED=m | 611 | CONFIG_NETFILTER_XT_TARGET_LED=m |
| @@ -508,9 +614,14 @@ CONFIG_NETFILTER_XT_TARGET_NFLOG=m | |||
| 508 | CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m | 614 | CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m |
| 509 | # CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set | 615 | # CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set |
| 510 | CONFIG_NETFILTER_XT_TARGET_RATEEST=m | 616 | CONFIG_NETFILTER_XT_TARGET_RATEEST=m |
| 617 | # CONFIG_NETFILTER_XT_TARGET_TEE is not set | ||
| 511 | # CONFIG_NETFILTER_XT_TARGET_TRACE is not set | 618 | # CONFIG_NETFILTER_XT_TARGET_TRACE is not set |
| 512 | CONFIG_NETFILTER_XT_TARGET_TCPMSS=m | 619 | CONFIG_NETFILTER_XT_TARGET_TCPMSS=m |
| 513 | # CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set | 620 | # CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set |
| 621 | |||
| 622 | # | ||
| 623 | # Xtables matches | ||
| 624 | # | ||
| 514 | CONFIG_NETFILTER_XT_MATCH_CLUSTER=m | 625 | CONFIG_NETFILTER_XT_MATCH_CLUSTER=m |
| 515 | CONFIG_NETFILTER_XT_MATCH_COMMENT=m | 626 | CONFIG_NETFILTER_XT_MATCH_COMMENT=m |
| 516 | CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m | 627 | CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m |
| @@ -529,6 +640,7 @@ CONFIG_NETFILTER_XT_MATCH_LIMIT=m | |||
| 529 | CONFIG_NETFILTER_XT_MATCH_MAC=m | 640 | CONFIG_NETFILTER_XT_MATCH_MAC=m |
| 530 | CONFIG_NETFILTER_XT_MATCH_MARK=m | 641 | CONFIG_NETFILTER_XT_MATCH_MARK=m |
| 531 | CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m | 642 | CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m |
| 643 | # CONFIG_NETFILTER_XT_MATCH_OSF is not set | ||
| 532 | CONFIG_NETFILTER_XT_MATCH_OWNER=m | 644 | CONFIG_NETFILTER_XT_MATCH_OWNER=m |
| 533 | CONFIG_NETFILTER_XT_MATCH_POLICY=m | 645 | CONFIG_NETFILTER_XT_MATCH_POLICY=m |
| 534 | CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m | 646 | CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m |
| @@ -536,7 +648,6 @@ CONFIG_NETFILTER_XT_MATCH_QUOTA=m | |||
| 536 | CONFIG_NETFILTER_XT_MATCH_RATEEST=m | 648 | CONFIG_NETFILTER_XT_MATCH_RATEEST=m |
| 537 | CONFIG_NETFILTER_XT_MATCH_REALM=m | 649 | CONFIG_NETFILTER_XT_MATCH_REALM=m |
| 538 | CONFIG_NETFILTER_XT_MATCH_RECENT=m | 650 | CONFIG_NETFILTER_XT_MATCH_RECENT=m |
| 539 | # CONFIG_NETFILTER_XT_MATCH_RECENT_PROC_COMPAT is not set | ||
| 540 | CONFIG_NETFILTER_XT_MATCH_SCTP=m | 651 | CONFIG_NETFILTER_XT_MATCH_SCTP=m |
| 541 | CONFIG_NETFILTER_XT_MATCH_STATE=m | 652 | CONFIG_NETFILTER_XT_MATCH_STATE=m |
| 542 | CONFIG_NETFILTER_XT_MATCH_STATISTIC=m | 653 | CONFIG_NETFILTER_XT_MATCH_STATISTIC=m |
| @@ -556,6 +667,7 @@ CONFIG_IP_VS_TAB_BITS=12 | |||
| 556 | # CONFIG_IP_VS_PROTO_UDP is not set | 667 | # CONFIG_IP_VS_PROTO_UDP is not set |
| 557 | # CONFIG_IP_VS_PROTO_ESP is not set | 668 | # CONFIG_IP_VS_PROTO_ESP is not set |
| 558 | # CONFIG_IP_VS_PROTO_AH is not set | 669 | # CONFIG_IP_VS_PROTO_AH is not set |
| 670 | # CONFIG_IP_VS_PROTO_SCTP is not set | ||
| 559 | 671 | ||
| 560 | # | 672 | # |
| 561 | # IPVS scheduler | 673 | # IPVS scheduler |
| @@ -639,8 +751,10 @@ CONFIG_IP6_NF_MANGLE=m | |||
| 639 | CONFIG_IP6_NF_RAW=m | 751 | CONFIG_IP6_NF_RAW=m |
| 640 | # CONFIG_IP_DCCP is not set | 752 | # CONFIG_IP_DCCP is not set |
| 641 | # CONFIG_IP_SCTP is not set | 753 | # CONFIG_IP_SCTP is not set |
| 754 | # CONFIG_RDS is not set | ||
| 642 | # CONFIG_TIPC is not set | 755 | # CONFIG_TIPC is not set |
| 643 | # CONFIG_ATM is not set | 756 | # CONFIG_ATM is not set |
| 757 | # CONFIG_L2TP is not set | ||
| 644 | # CONFIG_BRIDGE is not set | 758 | # CONFIG_BRIDGE is not set |
| 645 | # CONFIG_NET_DSA is not set | 759 | # CONFIG_NET_DSA is not set |
| 646 | # CONFIG_VLAN_8021Q is not set | 760 | # CONFIG_VLAN_8021Q is not set |
| @@ -653,6 +767,7 @@ CONFIG_IP6_NF_RAW=m | |||
| 653 | # CONFIG_ECONET is not set | 767 | # CONFIG_ECONET is not set |
| 654 | # CONFIG_WAN_ROUTER is not set | 768 | # CONFIG_WAN_ROUTER is not set |
| 655 | # CONFIG_PHONET is not set | 769 | # CONFIG_PHONET is not set |
| 770 | # CONFIG_IEEE802154 is not set | ||
| 656 | # CONFIG_NET_SCHED is not set | 771 | # CONFIG_NET_SCHED is not set |
| 657 | CONFIG_NET_CLS_ROUTE=y | 772 | CONFIG_NET_CLS_ROUTE=y |
| 658 | # CONFIG_DCB is not set | 773 | # CONFIG_DCB is not set |
| @@ -666,6 +781,7 @@ CONFIG_NET_CLS_ROUTE=y | |||
| 666 | # CONFIG_IRDA is not set | 781 | # CONFIG_IRDA is not set |
| 667 | CONFIG_BT=m | 782 | CONFIG_BT=m |
| 668 | CONFIG_BT_L2CAP=m | 783 | CONFIG_BT_L2CAP=m |
| 784 | # CONFIG_BT_L2CAP_EXT_FEATURES is not set | ||
| 669 | CONFIG_BT_SCO=m | 785 | CONFIG_BT_SCO=m |
| 670 | CONFIG_BT_RFCOMM=m | 786 | CONFIG_BT_RFCOMM=m |
| 671 | CONFIG_BT_RFCOMM_TTY=y | 787 | CONFIG_BT_RFCOMM_TTY=y |
| @@ -687,19 +803,22 @@ CONFIG_BT_HCIBCM203X=m | |||
| 687 | CONFIG_BT_HCIBPA10X=m | 803 | CONFIG_BT_HCIBPA10X=m |
| 688 | CONFIG_BT_HCIBFUSB=m | 804 | CONFIG_BT_HCIBFUSB=m |
| 689 | CONFIG_BT_HCIVHCI=m | 805 | CONFIG_BT_HCIVHCI=m |
| 806 | # CONFIG_BT_MRVL is not set | ||
| 690 | # CONFIG_AF_RXRPC is not set | 807 | # CONFIG_AF_RXRPC is not set |
| 691 | CONFIG_WIRELESS=y | 808 | CONFIG_WIRELESS=y |
| 809 | CONFIG_WEXT_CORE=y | ||
| 810 | CONFIG_WEXT_PROC=y | ||
| 692 | CONFIG_CFG80211=m | 811 | CONFIG_CFG80211=m |
| 812 | # CONFIG_NL80211_TESTMODE is not set | ||
| 813 | # CONFIG_CFG80211_DEVELOPER_WARNINGS is not set | ||
| 693 | # CONFIG_CFG80211_REG_DEBUG is not set | 814 | # CONFIG_CFG80211_REG_DEBUG is not set |
| 694 | # CONFIG_WIRELESS_OLD_REGULATORY is not set | 815 | CONFIG_CFG80211_DEFAULT_PS=y |
| 695 | CONFIG_WIRELESS_EXT=y | 816 | # CONFIG_CFG80211_INTERNAL_REGDB is not set |
| 817 | CONFIG_CFG80211_WEXT=y | ||
| 696 | CONFIG_WIRELESS_EXT_SYSFS=y | 818 | CONFIG_WIRELESS_EXT_SYSFS=y |
| 697 | # CONFIG_LIB80211 is not set | 819 | # CONFIG_LIB80211 is not set |
| 698 | CONFIG_MAC80211=m | 820 | CONFIG_MAC80211=m |
| 699 | 821 | CONFIG_MAC80211_HAS_RC=y | |
| 700 | # | ||
| 701 | # Rate control algorithm selection | ||
| 702 | # | ||
| 703 | CONFIG_MAC80211_RC_MINSTREL=y | 822 | CONFIG_MAC80211_RC_MINSTREL=y |
| 704 | # CONFIG_MAC80211_RC_DEFAULT_PID is not set | 823 | # CONFIG_MAC80211_RC_DEFAULT_PID is not set |
| 705 | CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y | 824 | CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y |
| @@ -710,6 +829,7 @@ CONFIG_MAC80211_LEDS=y | |||
| 710 | # CONFIG_WIMAX is not set | 829 | # CONFIG_WIMAX is not set |
| 711 | # CONFIG_RFKILL is not set | 830 | # CONFIG_RFKILL is not set |
| 712 | # CONFIG_NET_9P is not set | 831 | # CONFIG_NET_9P is not set |
| 832 | # CONFIG_CAIF is not set | ||
| 713 | 833 | ||
| 714 | # | 834 | # |
| 715 | # Device Drivers | 835 | # Device Drivers |
| @@ -719,6 +839,7 @@ CONFIG_MAC80211_LEDS=y | |||
| 719 | # Generic Driver Options | 839 | # Generic Driver Options |
| 720 | # | 840 | # |
| 721 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 841 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 842 | # CONFIG_DEVTMPFS is not set | ||
| 722 | CONFIG_STANDALONE=y | 843 | CONFIG_STANDALONE=y |
| 723 | CONFIG_PREVENT_FIRMWARE_BUILD=y | 844 | CONFIG_PREVENT_FIRMWARE_BUILD=y |
| 724 | CONFIG_FW_LOADER=y | 845 | CONFIG_FW_LOADER=y |
| @@ -730,9 +851,9 @@ CONFIG_EXTRA_FIRMWARE="" | |||
| 730 | # CONFIG_CONNECTOR is not set | 851 | # CONFIG_CONNECTOR is not set |
| 731 | CONFIG_MTD=y | 852 | CONFIG_MTD=y |
| 732 | # CONFIG_MTD_DEBUG is not set | 853 | # CONFIG_MTD_DEBUG is not set |
| 854 | # CONFIG_MTD_TESTS is not set | ||
| 733 | # CONFIG_MTD_CONCAT is not set | 855 | # CONFIG_MTD_CONCAT is not set |
| 734 | CONFIG_MTD_PARTITIONS=y | 856 | CONFIG_MTD_PARTITIONS=y |
| 735 | # CONFIG_MTD_TESTS is not set | ||
| 736 | CONFIG_MTD_REDBOOT_PARTS=y | 857 | CONFIG_MTD_REDBOOT_PARTS=y |
| 737 | CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 | 858 | CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 |
| 738 | CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y | 859 | CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y |
| @@ -752,6 +873,7 @@ CONFIG_MTD_BLOCK=y | |||
| 752 | # CONFIG_INFTL is not set | 873 | # CONFIG_INFTL is not set |
| 753 | # CONFIG_RFD_FTL is not set | 874 | # CONFIG_RFD_FTL is not set |
| 754 | # CONFIG_SSFDC is not set | 875 | # CONFIG_SSFDC is not set |
| 876 | # CONFIG_SM_FTL is not set | ||
| 755 | # CONFIG_MTD_OOPS is not set | 877 | # CONFIG_MTD_OOPS is not set |
| 756 | 878 | ||
| 757 | # | 879 | # |
| @@ -793,6 +915,7 @@ CONFIG_MTD_ROM=y | |||
| 793 | # | 915 | # |
| 794 | # CONFIG_MTD_DATAFLASH is not set | 916 | # CONFIG_MTD_DATAFLASH is not set |
| 795 | # CONFIG_MTD_M25P80 is not set | 917 | # CONFIG_MTD_M25P80 is not set |
| 918 | # CONFIG_MTD_SST25L is not set | ||
| 796 | # CONFIG_MTD_SLRAM is not set | 919 | # CONFIG_MTD_SLRAM is not set |
| 797 | # CONFIG_MTD_PHRAM is not set | 920 | # CONFIG_MTD_PHRAM is not set |
| 798 | # CONFIG_MTD_MTDRAM is not set | 921 | # CONFIG_MTD_MTDRAM is not set |
| @@ -805,9 +928,12 @@ CONFIG_MTD_ROM=y | |||
| 805 | # CONFIG_MTD_DOC2001 is not set | 928 | # CONFIG_MTD_DOC2001 is not set |
| 806 | # CONFIG_MTD_DOC2001PLUS is not set | 929 | # CONFIG_MTD_DOC2001PLUS is not set |
| 807 | CONFIG_MTD_NAND=y | 930 | CONFIG_MTD_NAND=y |
| 808 | # CONFIG_MTD_NAND_VERIFY_WRITE is not set | 931 | CONFIG_MTD_NAND_ECC=y |
| 809 | # CONFIG_MTD_NAND_ECC_SMC is not set | 932 | # CONFIG_MTD_NAND_ECC_SMC is not set |
| 933 | # CONFIG_MTD_NAND_VERIFY_WRITE is not set | ||
| 934 | # CONFIG_MTD_SM_COMMON is not set | ||
| 810 | # CONFIG_MTD_NAND_MUSEUM_IDS is not set | 935 | # CONFIG_MTD_NAND_MUSEUM_IDS is not set |
| 936 | CONFIG_MTD_NAND_DENALI_SCRATCH_REG_ADDR=0xFF108018 | ||
| 811 | # CONFIG_MTD_NAND_GPIO is not set | 937 | # CONFIG_MTD_NAND_GPIO is not set |
| 812 | CONFIG_MTD_NAND_IDS=y | 938 | CONFIG_MTD_NAND_IDS=y |
| 813 | CONFIG_MTD_NAND_S3C2410=y | 939 | CONFIG_MTD_NAND_S3C2410=y |
| @@ -843,6 +969,10 @@ CONFIG_BLK_DEV=y | |||
| 843 | # CONFIG_BLK_DEV_COW_COMMON is not set | 969 | # CONFIG_BLK_DEV_COW_COMMON is not set |
| 844 | CONFIG_BLK_DEV_LOOP=y | 970 | CONFIG_BLK_DEV_LOOP=y |
| 845 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | 971 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set |
| 972 | |||
| 973 | # | ||
| 974 | # DRBD disabled because PROC_FS, INET or CONNECTOR not selected | ||
| 975 | # | ||
| 846 | CONFIG_BLK_DEV_NBD=m | 976 | CONFIG_BLK_DEV_NBD=m |
| 847 | CONFIG_BLK_DEV_UB=m | 977 | CONFIG_BLK_DEV_UB=m |
| 848 | CONFIG_BLK_DEV_RAM=y | 978 | CONFIG_BLK_DEV_RAM=y |
| @@ -851,19 +981,26 @@ CONFIG_BLK_DEV_RAM_SIZE=4096 | |||
| 851 | # CONFIG_BLK_DEV_XIP is not set | 981 | # CONFIG_BLK_DEV_XIP is not set |
| 852 | # CONFIG_CDROM_PKTCDVD is not set | 982 | # CONFIG_CDROM_PKTCDVD is not set |
| 853 | CONFIG_ATA_OVER_ETH=m | 983 | CONFIG_ATA_OVER_ETH=m |
| 984 | # CONFIG_MG_DISK is not set | ||
| 854 | CONFIG_MISC_DEVICES=y | 985 | CONFIG_MISC_DEVICES=y |
| 986 | # CONFIG_AD525X_DPOT is not set | ||
| 855 | # CONFIG_ICS932S401 is not set | 987 | # CONFIG_ICS932S401 is not set |
| 856 | # CONFIG_ENCLOSURE_SERVICES is not set | 988 | # CONFIG_ENCLOSURE_SERVICES is not set |
| 857 | # CONFIG_ISL29003 is not set | 989 | # CONFIG_ISL29003 is not set |
| 990 | # CONFIG_SENSORS_TSL2550 is not set | ||
| 991 | # CONFIG_DS1682 is not set | ||
| 992 | # CONFIG_TI_DAC7512 is not set | ||
| 858 | # CONFIG_C2PORT is not set | 993 | # CONFIG_C2PORT is not set |
| 859 | 994 | ||
| 860 | # | 995 | # |
| 861 | # EEPROM support | 996 | # EEPROM support |
| 862 | # | 997 | # |
| 863 | CONFIG_EEPROM_AT24=m | 998 | CONFIG_EEPROM_AT24=y |
| 864 | CONFIG_EEPROM_AT25=m | 999 | CONFIG_EEPROM_AT25=m |
| 865 | CONFIG_EEPROM_LEGACY=m | 1000 | CONFIG_EEPROM_LEGACY=m |
| 1001 | # CONFIG_EEPROM_MAX6875 is not set | ||
| 866 | CONFIG_EEPROM_93CX6=m | 1002 | CONFIG_EEPROM_93CX6=m |
| 1003 | # CONFIG_IWMC3200TOP is not set | ||
| 867 | CONFIG_HAVE_IDE=y | 1004 | CONFIG_HAVE_IDE=y |
| 868 | CONFIG_IDE=y | 1005 | CONFIG_IDE=y |
| 869 | 1006 | ||
| @@ -890,6 +1027,7 @@ CONFIG_BLK_DEV_PLATFORM=y | |||
| 890 | # | 1027 | # |
| 891 | # SCSI device support | 1028 | # SCSI device support |
| 892 | # | 1029 | # |
| 1030 | CONFIG_SCSI_MOD=y | ||
| 893 | # CONFIG_RAID_ATTRS is not set | 1031 | # CONFIG_RAID_ATTRS is not set |
| 894 | CONFIG_SCSI=y | 1032 | CONFIG_SCSI=y |
| 895 | CONFIG_SCSI_DMA=y | 1033 | CONFIG_SCSI_DMA=y |
| @@ -907,10 +1045,6 @@ CONFIG_BLK_DEV_SR=m | |||
| 907 | CONFIG_BLK_DEV_SR_VENDOR=y | 1045 | CONFIG_BLK_DEV_SR_VENDOR=y |
| 908 | CONFIG_CHR_DEV_SG=y | 1046 | CONFIG_CHR_DEV_SG=y |
| 909 | CONFIG_CHR_DEV_SCH=m | 1047 | CONFIG_CHR_DEV_SCH=m |
| 910 | |||
| 911 | # | ||
| 912 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs | ||
| 913 | # | ||
| 914 | CONFIG_SCSI_MULTI_LUN=y | 1048 | CONFIG_SCSI_MULTI_LUN=y |
| 915 | CONFIG_SCSI_CONSTANTS=y | 1049 | CONFIG_SCSI_CONSTANTS=y |
| 916 | # CONFIG_SCSI_LOGGING is not set | 1050 | # CONFIG_SCSI_LOGGING is not set |
| @@ -951,7 +1085,6 @@ CONFIG_SCSI_LOWLEVEL=y | |||
| 951 | CONFIG_HAVE_PATA_PLATFORM=y | 1085 | CONFIG_HAVE_PATA_PLATFORM=y |
| 952 | # CONFIG_MD is not set | 1086 | # CONFIG_MD is not set |
| 953 | CONFIG_NETDEVICES=y | 1087 | CONFIG_NETDEVICES=y |
| 954 | CONFIG_COMPAT_NET_DEV_OPS=y | ||
| 955 | # CONFIG_DUMMY is not set | 1088 | # CONFIG_DUMMY is not set |
| 956 | # CONFIG_BONDING is not set | 1089 | # CONFIG_BONDING is not set |
| 957 | # CONFIG_MACVLAN is not set | 1090 | # CONFIG_MACVLAN is not set |
| @@ -989,16 +1122,30 @@ CONFIG_DM9000_DEBUGLEVEL=4 | |||
| 989 | # CONFIG_NET_PCI is not set | 1122 | # CONFIG_NET_PCI is not set |
| 990 | # CONFIG_B44 is not set | 1123 | # CONFIG_B44 is not set |
| 991 | # CONFIG_CS89x0 is not set | 1124 | # CONFIG_CS89x0 is not set |
| 1125 | # CONFIG_KS8842 is not set | ||
| 1126 | # CONFIG_KS8851 is not set | ||
| 1127 | # CONFIG_KS8851_MLL is not set | ||
| 992 | # CONFIG_NET_POCKET is not set | 1128 | # CONFIG_NET_POCKET is not set |
| 993 | CONFIG_NETDEV_1000=y | 1129 | CONFIG_NETDEV_1000=y |
| 994 | CONFIG_NETDEV_10000=y | 1130 | CONFIG_NETDEV_10000=y |
| 995 | # CONFIG_TR is not set | 1131 | # CONFIG_TR is not set |
| 996 | 1132 | CONFIG_WLAN=y | |
| 997 | # | 1133 | # CONFIG_LIBERTAS_THINFIRM is not set |
| 998 | # Wireless LAN | 1134 | # CONFIG_AT76C50X_USB is not set |
| 999 | # | 1135 | # CONFIG_USB_ZD1201 is not set |
| 1000 | # CONFIG_WLAN_PRE80211 is not set | 1136 | # CONFIG_USB_NET_RNDIS_WLAN is not set |
| 1001 | # CONFIG_WLAN_80211 is not set | 1137 | # CONFIG_RTL8187 is not set |
| 1138 | # CONFIG_MAC80211_HWSIM is not set | ||
| 1139 | # CONFIG_ATH_COMMON is not set | ||
| 1140 | # CONFIG_B43 is not set | ||
| 1141 | # CONFIG_B43LEGACY is not set | ||
| 1142 | # CONFIG_HOSTAP is not set | ||
| 1143 | # CONFIG_IWM is not set | ||
| 1144 | # CONFIG_LIBERTAS is not set | ||
| 1145 | # CONFIG_P54_COMMON is not set | ||
| 1146 | # CONFIG_RT2X00 is not set | ||
| 1147 | # CONFIG_WL12XX is not set | ||
| 1148 | # CONFIG_ZD1211RW is not set | ||
| 1002 | 1149 | ||
| 1003 | # | 1150 | # |
| 1004 | # Enable WiMAX (Networking options) to see the WiMAX drivers | 1151 | # Enable WiMAX (Networking options) to see the WiMAX drivers |
| @@ -1012,6 +1159,7 @@ CONFIG_NETDEV_10000=y | |||
| 1012 | # CONFIG_USB_PEGASUS is not set | 1159 | # CONFIG_USB_PEGASUS is not set |
| 1013 | # CONFIG_USB_RTL8150 is not set | 1160 | # CONFIG_USB_RTL8150 is not set |
| 1014 | # CONFIG_USB_USBNET is not set | 1161 | # CONFIG_USB_USBNET is not set |
| 1162 | # CONFIG_USB_IPHETH is not set | ||
| 1015 | # CONFIG_WAN is not set | 1163 | # CONFIG_WAN is not set |
| 1016 | # CONFIG_PLIP is not set | 1164 | # CONFIG_PLIP is not set |
| 1017 | # CONFIG_PPP is not set | 1165 | # CONFIG_PPP is not set |
| @@ -1020,6 +1168,7 @@ CONFIG_NETDEV_10000=y | |||
| 1020 | # CONFIG_NETPOLL is not set | 1168 | # CONFIG_NETPOLL is not set |
| 1021 | # CONFIG_NET_POLL_CONTROLLER is not set | 1169 | # CONFIG_NET_POLL_CONTROLLER is not set |
| 1022 | # CONFIG_ISDN is not set | 1170 | # CONFIG_ISDN is not set |
| 1171 | # CONFIG_PHONE is not set | ||
| 1023 | 1172 | ||
| 1024 | # | 1173 | # |
| 1025 | # Input device support | 1174 | # Input device support |
| @@ -1027,6 +1176,7 @@ CONFIG_NETDEV_10000=y | |||
| 1027 | CONFIG_INPUT=y | 1176 | CONFIG_INPUT=y |
| 1028 | CONFIG_INPUT_FF_MEMLESS=m | 1177 | CONFIG_INPUT_FF_MEMLESS=m |
| 1029 | # CONFIG_INPUT_POLLDEV is not set | 1178 | # CONFIG_INPUT_POLLDEV is not set |
| 1179 | # CONFIG_INPUT_SPARSEKMAP is not set | ||
| 1030 | 1180 | ||
| 1031 | # | 1181 | # |
| 1032 | # Userland interfaces | 1182 | # Userland interfaces |
| @@ -1043,13 +1193,20 @@ CONFIG_INPUT_EVDEV=y | |||
| 1043 | # Input Device Drivers | 1193 | # Input Device Drivers |
| 1044 | # | 1194 | # |
| 1045 | CONFIG_INPUT_KEYBOARD=y | 1195 | CONFIG_INPUT_KEYBOARD=y |
| 1196 | # CONFIG_KEYBOARD_ADP5588 is not set | ||
| 1046 | CONFIG_KEYBOARD_ATKBD=y | 1197 | CONFIG_KEYBOARD_ATKBD=y |
| 1047 | # CONFIG_KEYBOARD_SUNKBD is not set | 1198 | # CONFIG_QT2160 is not set |
| 1048 | # CONFIG_KEYBOARD_LKKBD is not set | 1199 | # CONFIG_KEYBOARD_LKKBD is not set |
| 1049 | # CONFIG_KEYBOARD_XTKBD is not set | 1200 | # CONFIG_KEYBOARD_GPIO is not set |
| 1201 | # CONFIG_KEYBOARD_TCA6416 is not set | ||
| 1202 | # CONFIG_KEYBOARD_MATRIX is not set | ||
| 1203 | # CONFIG_KEYBOARD_LM8323 is not set | ||
| 1204 | # CONFIG_KEYBOARD_MAX7359 is not set | ||
| 1050 | # CONFIG_KEYBOARD_NEWTON is not set | 1205 | # CONFIG_KEYBOARD_NEWTON is not set |
| 1206 | # CONFIG_KEYBOARD_OPENCORES is not set | ||
| 1051 | # CONFIG_KEYBOARD_STOWAWAY is not set | 1207 | # CONFIG_KEYBOARD_STOWAWAY is not set |
| 1052 | # CONFIG_KEYBOARD_GPIO is not set | 1208 | # CONFIG_KEYBOARD_SUNKBD is not set |
| 1209 | # CONFIG_KEYBOARD_XTKBD is not set | ||
| 1053 | CONFIG_INPUT_MOUSE=y | 1210 | CONFIG_INPUT_MOUSE=y |
| 1054 | CONFIG_MOUSE_PS2=y | 1211 | CONFIG_MOUSE_PS2=y |
| 1055 | CONFIG_MOUSE_PS2_ALPS=y | 1212 | CONFIG_MOUSE_PS2_ALPS=y |
| @@ -1057,6 +1214,7 @@ CONFIG_MOUSE_PS2_LOGIPS2PP=y | |||
| 1057 | CONFIG_MOUSE_PS2_SYNAPTICS=y | 1214 | CONFIG_MOUSE_PS2_SYNAPTICS=y |
| 1058 | CONFIG_MOUSE_PS2_TRACKPOINT=y | 1215 | CONFIG_MOUSE_PS2_TRACKPOINT=y |
| 1059 | # CONFIG_MOUSE_PS2_ELANTECH is not set | 1216 | # CONFIG_MOUSE_PS2_ELANTECH is not set |
| 1217 | # CONFIG_MOUSE_PS2_SENTELIC is not set | ||
| 1060 | # CONFIG_MOUSE_PS2_TOUCHKIT is not set | 1218 | # CONFIG_MOUSE_PS2_TOUCHKIT is not set |
| 1061 | # CONFIG_MOUSE_SERIAL is not set | 1219 | # CONFIG_MOUSE_SERIAL is not set |
| 1062 | CONFIG_MOUSE_APPLETOUCH=m | 1220 | CONFIG_MOUSE_APPLETOUCH=m |
| @@ -1066,6 +1224,7 @@ CONFIG_MOUSE_BCM5974=m | |||
| 1066 | # CONFIG_MOUSE_PC110PAD is not set | 1224 | # CONFIG_MOUSE_PC110PAD is not set |
| 1067 | # CONFIG_MOUSE_VSXXXAA is not set | 1225 | # CONFIG_MOUSE_VSXXXAA is not set |
| 1068 | # CONFIG_MOUSE_GPIO is not set | 1226 | # CONFIG_MOUSE_GPIO is not set |
| 1227 | # CONFIG_MOUSE_SYNAPTICS_I2C is not set | ||
| 1069 | CONFIG_INPUT_JOYSTICK=y | 1228 | CONFIG_INPUT_JOYSTICK=y |
| 1070 | CONFIG_JOYSTICK_ANALOG=m | 1229 | CONFIG_JOYSTICK_ANALOG=m |
| 1071 | CONFIG_JOYSTICK_A3D=m | 1230 | CONFIG_JOYSTICK_A3D=m |
| @@ -1102,10 +1261,15 @@ CONFIG_INPUT_TOUCHSCREEN=y | |||
| 1102 | # CONFIG_TOUCHSCREEN_AD7879_I2C is not set | 1261 | # CONFIG_TOUCHSCREEN_AD7879_I2C is not set |
| 1103 | # CONFIG_TOUCHSCREEN_AD7879_SPI is not set | 1262 | # CONFIG_TOUCHSCREEN_AD7879_SPI is not set |
| 1104 | # CONFIG_TOUCHSCREEN_AD7879 is not set | 1263 | # CONFIG_TOUCHSCREEN_AD7879 is not set |
| 1264 | # CONFIG_TOUCHSCREEN_DYNAPRO is not set | ||
| 1265 | # CONFIG_TOUCHSCREEN_HAMPSHIRE is not set | ||
| 1266 | # CONFIG_TOUCHSCREEN_EETI is not set | ||
| 1105 | # CONFIG_TOUCHSCREEN_FUJITSU is not set | 1267 | # CONFIG_TOUCHSCREEN_FUJITSU is not set |
| 1268 | # CONFIG_TOUCHSCREEN_S3C2410 is not set | ||
| 1106 | # CONFIG_TOUCHSCREEN_GUNZE is not set | 1269 | # CONFIG_TOUCHSCREEN_GUNZE is not set |
| 1107 | # CONFIG_TOUCHSCREEN_ELO is not set | 1270 | # CONFIG_TOUCHSCREEN_ELO is not set |
| 1108 | # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set | 1271 | # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set |
| 1272 | # CONFIG_TOUCHSCREEN_MCS5000 is not set | ||
| 1109 | # CONFIG_TOUCHSCREEN_MTOUCH is not set | 1273 | # CONFIG_TOUCHSCREEN_MTOUCH is not set |
| 1110 | # CONFIG_TOUCHSCREEN_INEXIO is not set | 1274 | # CONFIG_TOUCHSCREEN_INEXIO is not set |
| 1111 | # CONFIG_TOUCHSCREEN_MK712 is not set | 1275 | # CONFIG_TOUCHSCREEN_MK712 is not set |
| @@ -1126,9 +1290,16 @@ CONFIG_TOUCHSCREEN_USB_IRTOUCH=y | |||
| 1126 | CONFIG_TOUCHSCREEN_USB_IDEALTEK=y | 1290 | CONFIG_TOUCHSCREEN_USB_IDEALTEK=y |
| 1127 | CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH=y | 1291 | CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH=y |
| 1128 | CONFIG_TOUCHSCREEN_USB_GOTOP=y | 1292 | CONFIG_TOUCHSCREEN_USB_GOTOP=y |
| 1293 | CONFIG_TOUCHSCREEN_USB_JASTEC=y | ||
| 1294 | CONFIG_TOUCHSCREEN_USB_E2I=y | ||
| 1295 | CONFIG_TOUCHSCREEN_USB_ZYTRONIC=y | ||
| 1296 | CONFIG_TOUCHSCREEN_USB_ETT_TC5UH=y | ||
| 1297 | CONFIG_TOUCHSCREEN_USB_NEXIO=y | ||
| 1129 | # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set | 1298 | # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set |
| 1130 | # CONFIG_TOUCHSCREEN_TSC2007 is not set | 1299 | # CONFIG_TOUCHSCREEN_TSC2007 is not set |
| 1300 | # CONFIG_TOUCHSCREEN_W90X900 is not set | ||
| 1131 | CONFIG_INPUT_MISC=y | 1301 | CONFIG_INPUT_MISC=y |
| 1302 | # CONFIG_INPUT_AD714X is not set | ||
| 1132 | CONFIG_INPUT_ATI_REMOTE=m | 1303 | CONFIG_INPUT_ATI_REMOTE=m |
| 1133 | CONFIG_INPUT_ATI_REMOTE2=m | 1304 | CONFIG_INPUT_ATI_REMOTE2=m |
| 1134 | CONFIG_INPUT_KEYSPAN_REMOTE=m | 1305 | CONFIG_INPUT_KEYSPAN_REMOTE=m |
| @@ -1136,6 +1307,8 @@ CONFIG_INPUT_POWERMATE=m | |||
| 1136 | CONFIG_INPUT_YEALINK=m | 1307 | CONFIG_INPUT_YEALINK=m |
| 1137 | CONFIG_INPUT_CM109=m | 1308 | CONFIG_INPUT_CM109=m |
| 1138 | CONFIG_INPUT_UINPUT=m | 1309 | CONFIG_INPUT_UINPUT=m |
| 1310 | # CONFIG_INPUT_PCF50633_PMU is not set | ||
| 1311 | # CONFIG_INPUT_PCF8574 is not set | ||
| 1139 | CONFIG_INPUT_GPIO_ROTARY_ENCODER=m | 1312 | CONFIG_INPUT_GPIO_ROTARY_ENCODER=m |
| 1140 | 1313 | ||
| 1141 | # | 1314 | # |
| @@ -1146,6 +1319,7 @@ CONFIG_SERIO_SERPORT=y | |||
| 1146 | # CONFIG_SERIO_PARKBD is not set | 1319 | # CONFIG_SERIO_PARKBD is not set |
| 1147 | CONFIG_SERIO_LIBPS2=y | 1320 | CONFIG_SERIO_LIBPS2=y |
| 1148 | # CONFIG_SERIO_RAW is not set | 1321 | # CONFIG_SERIO_RAW is not set |
| 1322 | # CONFIG_SERIO_ALTERA_PS2 is not set | ||
| 1149 | CONFIG_GAMEPORT=m | 1323 | CONFIG_GAMEPORT=m |
| 1150 | # CONFIG_GAMEPORT_NS558 is not set | 1324 | # CONFIG_GAMEPORT_NS558 is not set |
| 1151 | # CONFIG_GAMEPORT_L4 is not set | 1325 | # CONFIG_GAMEPORT_L4 is not set |
| @@ -1167,10 +1341,9 @@ CONFIG_SERIAL_NONSTANDARD=y | |||
| 1167 | # CONFIG_MOXA_INTELLIO is not set | 1341 | # CONFIG_MOXA_INTELLIO is not set |
| 1168 | # CONFIG_MOXA_SMARTIO is not set | 1342 | # CONFIG_MOXA_SMARTIO is not set |
| 1169 | # CONFIG_N_HDLC is not set | 1343 | # CONFIG_N_HDLC is not set |
| 1344 | # CONFIG_N_GSM is not set | ||
| 1170 | # CONFIG_RISCOM8 is not set | 1345 | # CONFIG_RISCOM8 is not set |
| 1171 | # CONFIG_SPECIALIX is not set | 1346 | # CONFIG_SPECIALIX is not set |
| 1172 | # CONFIG_SX is not set | ||
| 1173 | # CONFIG_RIO is not set | ||
| 1174 | # CONFIG_STALDRV is not set | 1347 | # CONFIG_STALDRV is not set |
| 1175 | 1348 | ||
| 1176 | # | 1349 | # |
| @@ -1195,6 +1368,7 @@ CONFIG_SERIAL_8250_SHARE_IRQ=y | |||
| 1195 | # Non-8250 serial port support | 1368 | # Non-8250 serial port support |
| 1196 | # | 1369 | # |
| 1197 | CONFIG_SERIAL_SAMSUNG=y | 1370 | CONFIG_SERIAL_SAMSUNG=y |
| 1371 | CONFIG_SERIAL_SAMSUNG_UARTS_4=y | ||
| 1198 | CONFIG_SERIAL_SAMSUNG_UARTS=4 | 1372 | CONFIG_SERIAL_SAMSUNG_UARTS=4 |
| 1199 | # CONFIG_SERIAL_SAMSUNG_DEBUG is not set | 1373 | # CONFIG_SERIAL_SAMSUNG_DEBUG is not set |
| 1200 | CONFIG_SERIAL_SAMSUNG_CONSOLE=y | 1374 | CONFIG_SERIAL_SAMSUNG_CONSOLE=y |
| @@ -1204,6 +1378,9 @@ CONFIG_SERIAL_S3C2440=y | |||
| 1204 | # CONFIG_SERIAL_MAX3100 is not set | 1378 | # CONFIG_SERIAL_MAX3100 is not set |
| 1205 | CONFIG_SERIAL_CORE=y | 1379 | CONFIG_SERIAL_CORE=y |
| 1206 | CONFIG_SERIAL_CORE_CONSOLE=y | 1380 | CONFIG_SERIAL_CORE_CONSOLE=y |
| 1381 | # CONFIG_SERIAL_TIMBERDALE is not set | ||
| 1382 | # CONFIG_SERIAL_ALTERA_JTAGUART is not set | ||
| 1383 | # CONFIG_SERIAL_ALTERA_UART is not set | ||
| 1207 | CONFIG_UNIX98_PTYS=y | 1384 | CONFIG_UNIX98_PTYS=y |
| 1208 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | 1385 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set |
| 1209 | CONFIG_LEGACY_PTYS=y | 1386 | CONFIG_LEGACY_PTYS=y |
| @@ -1221,6 +1398,7 @@ CONFIG_HW_RANDOM=y | |||
| 1221 | CONFIG_DEVPORT=y | 1398 | CONFIG_DEVPORT=y |
| 1222 | CONFIG_I2C=y | 1399 | CONFIG_I2C=y |
| 1223 | CONFIG_I2C_BOARDINFO=y | 1400 | CONFIG_I2C_BOARDINFO=y |
| 1401 | CONFIG_I2C_COMPAT=y | ||
| 1224 | CONFIG_I2C_CHARDEV=m | 1402 | CONFIG_I2C_CHARDEV=m |
| 1225 | CONFIG_I2C_HELPER_AUTO=y | 1403 | CONFIG_I2C_HELPER_AUTO=y |
| 1226 | CONFIG_I2C_ALGOBIT=y | 1404 | CONFIG_I2C_ALGOBIT=y |
| @@ -1232,10 +1410,12 @@ CONFIG_I2C_ALGOBIT=y | |||
| 1232 | # | 1410 | # |
| 1233 | # I2C system bus drivers (mostly embedded / system-on-chip) | 1411 | # I2C system bus drivers (mostly embedded / system-on-chip) |
| 1234 | # | 1412 | # |
| 1413 | # CONFIG_I2C_DESIGNWARE is not set | ||
| 1235 | # CONFIG_I2C_GPIO is not set | 1414 | # CONFIG_I2C_GPIO is not set |
| 1236 | # CONFIG_I2C_OCORES is not set | 1415 | # CONFIG_I2C_OCORES is not set |
| 1237 | CONFIG_I2C_S3C2410=y | 1416 | CONFIG_I2C_S3C2410=y |
| 1238 | CONFIG_I2C_SIMTEC=y | 1417 | CONFIG_I2C_SIMTEC=y |
| 1418 | # CONFIG_I2C_XILINX is not set | ||
| 1239 | 1419 | ||
| 1240 | # | 1420 | # |
| 1241 | # External I2C/SMBus adapter drivers | 1421 | # External I2C/SMBus adapter drivers |
| @@ -1252,20 +1432,9 @@ CONFIG_I2C_SIMTEC=y | |||
| 1252 | # CONFIG_I2C_PCA_ISA is not set | 1432 | # CONFIG_I2C_PCA_ISA is not set |
| 1253 | # CONFIG_I2C_PCA_PLATFORM is not set | 1433 | # CONFIG_I2C_PCA_PLATFORM is not set |
| 1254 | # CONFIG_I2C_STUB is not set | 1434 | # CONFIG_I2C_STUB is not set |
| 1255 | |||
| 1256 | # | ||
| 1257 | # Miscellaneous I2C Chip support | ||
| 1258 | # | ||
| 1259 | # CONFIG_DS1682 is not set | ||
| 1260 | # CONFIG_SENSORS_PCF8574 is not set | ||
| 1261 | # CONFIG_PCF8575 is not set | ||
| 1262 | # CONFIG_SENSORS_PCA9539 is not set | ||
| 1263 | # CONFIG_SENSORS_MAX6875 is not set | ||
| 1264 | # CONFIG_SENSORS_TSL2550 is not set | ||
| 1265 | # CONFIG_I2C_DEBUG_CORE is not set | 1435 | # CONFIG_I2C_DEBUG_CORE is not set |
| 1266 | # CONFIG_I2C_DEBUG_ALGO is not set | 1436 | # CONFIG_I2C_DEBUG_ALGO is not set |
| 1267 | # CONFIG_I2C_DEBUG_BUS is not set | 1437 | # CONFIG_I2C_DEBUG_BUS is not set |
| 1268 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
| 1269 | CONFIG_SPI=y | 1438 | CONFIG_SPI=y |
| 1270 | # CONFIG_SPI_DEBUG is not set | 1439 | # CONFIG_SPI_DEBUG is not set |
| 1271 | CONFIG_SPI_MASTER=y | 1440 | CONFIG_SPI_MASTER=y |
| @@ -1278,13 +1447,21 @@ CONFIG_SPI_BITBANG=m | |||
| 1278 | CONFIG_SPI_GPIO=m | 1447 | CONFIG_SPI_GPIO=m |
| 1279 | # CONFIG_SPI_LM70_LLP is not set | 1448 | # CONFIG_SPI_LM70_LLP is not set |
| 1280 | CONFIG_SPI_S3C24XX=m | 1449 | CONFIG_SPI_S3C24XX=m |
| 1450 | # CONFIG_SPI_S3C24XX_FIQ is not set | ||
| 1281 | CONFIG_SPI_S3C24XX_GPIO=m | 1451 | CONFIG_SPI_S3C24XX_GPIO=m |
| 1452 | # CONFIG_SPI_XILINX is not set | ||
| 1453 | # CONFIG_SPI_DESIGNWARE is not set | ||
| 1282 | 1454 | ||
| 1283 | # | 1455 | # |
| 1284 | # SPI Protocol Masters | 1456 | # SPI Protocol Masters |
| 1285 | # | 1457 | # |
| 1286 | CONFIG_SPI_SPIDEV=m | 1458 | CONFIG_SPI_SPIDEV=m |
| 1287 | CONFIG_SPI_TLE62X0=m | 1459 | CONFIG_SPI_TLE62X0=m |
| 1460 | |||
| 1461 | # | ||
| 1462 | # PPS support | ||
| 1463 | # | ||
| 1464 | # CONFIG_PPS is not set | ||
| 1288 | CONFIG_ARCH_REQUIRE_GPIOLIB=y | 1465 | CONFIG_ARCH_REQUIRE_GPIOLIB=y |
| 1289 | CONFIG_GPIOLIB=y | 1466 | CONFIG_GPIOLIB=y |
| 1290 | # CONFIG_DEBUG_GPIO is not set | 1467 | # CONFIG_DEBUG_GPIO is not set |
| @@ -1293,13 +1470,16 @@ CONFIG_GPIOLIB=y | |||
| 1293 | # | 1470 | # |
| 1294 | # Memory mapped GPIO expanders: | 1471 | # Memory mapped GPIO expanders: |
| 1295 | # | 1472 | # |
| 1473 | # CONFIG_GPIO_IT8761E is not set | ||
| 1296 | 1474 | ||
| 1297 | # | 1475 | # |
| 1298 | # I2C GPIO expanders: | 1476 | # I2C GPIO expanders: |
| 1299 | # | 1477 | # |
| 1478 | # CONFIG_GPIO_MAX7300 is not set | ||
| 1300 | # CONFIG_GPIO_MAX732X is not set | 1479 | # CONFIG_GPIO_MAX732X is not set |
| 1301 | # CONFIG_GPIO_PCA953X is not set | 1480 | # CONFIG_GPIO_PCA953X is not set |
| 1302 | # CONFIG_GPIO_PCF857X is not set | 1481 | # CONFIG_GPIO_PCF857X is not set |
| 1482 | # CONFIG_GPIO_ADP5588 is not set | ||
| 1303 | 1483 | ||
| 1304 | # | 1484 | # |
| 1305 | # PCI GPIO expanders: | 1485 | # PCI GPIO expanders: |
| @@ -1310,10 +1490,29 @@ CONFIG_GPIOLIB=y | |||
| 1310 | # | 1490 | # |
| 1311 | # CONFIG_GPIO_MAX7301 is not set | 1491 | # CONFIG_GPIO_MAX7301 is not set |
| 1312 | # CONFIG_GPIO_MCP23S08 is not set | 1492 | # CONFIG_GPIO_MCP23S08 is not set |
| 1493 | # CONFIG_GPIO_MC33880 is not set | ||
| 1494 | |||
| 1495 | # | ||
| 1496 | # AC97 GPIO expanders: | ||
| 1497 | # | ||
| 1313 | # CONFIG_W1 is not set | 1498 | # CONFIG_W1 is not set |
| 1314 | # CONFIG_POWER_SUPPLY is not set | 1499 | CONFIG_POWER_SUPPLY=y |
| 1500 | # CONFIG_POWER_SUPPLY_DEBUG is not set | ||
| 1501 | # CONFIG_PDA_POWER is not set | ||
| 1502 | # CONFIG_APM_POWER is not set | ||
| 1503 | # CONFIG_TEST_POWER is not set | ||
| 1504 | # CONFIG_BATTERY_DS2760 is not set | ||
| 1505 | # CONFIG_BATTERY_DS2782 is not set | ||
| 1506 | # CONFIG_BATTERY_BQ27x00 is not set | ||
| 1507 | # CONFIG_BATTERY_MAX17040 is not set | ||
| 1508 | # CONFIG_CHARGER_PCF50633 is not set | ||
| 1315 | CONFIG_HWMON=y | 1509 | CONFIG_HWMON=y |
| 1316 | CONFIG_HWMON_VID=m | 1510 | CONFIG_HWMON_VID=m |
| 1511 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
| 1512 | |||
| 1513 | # | ||
| 1514 | # Native drivers | ||
| 1515 | # | ||
| 1317 | # CONFIG_SENSORS_AD7414 is not set | 1516 | # CONFIG_SENSORS_AD7414 is not set |
| 1318 | # CONFIG_SENSORS_AD7418 is not set | 1517 | # CONFIG_SENSORS_AD7418 is not set |
| 1319 | # CONFIG_SENSORS_ADCXX is not set | 1518 | # CONFIG_SENSORS_ADCXX is not set |
| @@ -1323,10 +1522,11 @@ CONFIG_HWMON_VID=m | |||
| 1323 | # CONFIG_SENSORS_ADM1029 is not set | 1522 | # CONFIG_SENSORS_ADM1029 is not set |
| 1324 | # CONFIG_SENSORS_ADM1031 is not set | 1523 | # CONFIG_SENSORS_ADM1031 is not set |
| 1325 | # CONFIG_SENSORS_ADM9240 is not set | 1524 | # CONFIG_SENSORS_ADM9240 is not set |
| 1525 | # CONFIG_SENSORS_ADT7411 is not set | ||
| 1326 | # CONFIG_SENSORS_ADT7462 is not set | 1526 | # CONFIG_SENSORS_ADT7462 is not set |
| 1327 | # CONFIG_SENSORS_ADT7470 is not set | 1527 | # CONFIG_SENSORS_ADT7470 is not set |
| 1328 | # CONFIG_SENSORS_ADT7473 is not set | ||
| 1329 | # CONFIG_SENSORS_ADT7475 is not set | 1528 | # CONFIG_SENSORS_ADT7475 is not set |
| 1529 | # CONFIG_SENSORS_ASC7621 is not set | ||
| 1330 | # CONFIG_SENSORS_ATXP1 is not set | 1530 | # CONFIG_SENSORS_ATXP1 is not set |
| 1331 | # CONFIG_SENSORS_DS1621 is not set | 1531 | # CONFIG_SENSORS_DS1621 is not set |
| 1332 | # CONFIG_SENSORS_F71805F is not set | 1532 | # CONFIG_SENSORS_F71805F is not set |
| @@ -1338,6 +1538,7 @@ CONFIG_HWMON_VID=m | |||
| 1338 | # CONFIG_SENSORS_IT87 is not set | 1538 | # CONFIG_SENSORS_IT87 is not set |
| 1339 | # CONFIG_SENSORS_LM63 is not set | 1539 | # CONFIG_SENSORS_LM63 is not set |
| 1340 | # CONFIG_SENSORS_LM70 is not set | 1540 | # CONFIG_SENSORS_LM70 is not set |
| 1541 | # CONFIG_SENSORS_LM73 is not set | ||
| 1341 | CONFIG_SENSORS_LM75=m | 1542 | CONFIG_SENSORS_LM75=m |
| 1342 | # CONFIG_SENSORS_LM77 is not set | 1543 | # CONFIG_SENSORS_LM77 is not set |
| 1343 | CONFIG_SENSORS_LM78=m | 1544 | CONFIG_SENSORS_LM78=m |
| @@ -1358,12 +1559,17 @@ CONFIG_SENSORS_LM85=m | |||
| 1358 | # CONFIG_SENSORS_PC87427 is not set | 1559 | # CONFIG_SENSORS_PC87427 is not set |
| 1359 | # CONFIG_SENSORS_PCF8591 is not set | 1560 | # CONFIG_SENSORS_PCF8591 is not set |
| 1360 | # CONFIG_SENSORS_SHT15 is not set | 1561 | # CONFIG_SENSORS_SHT15 is not set |
| 1562 | # CONFIG_SENSORS_S3C is not set | ||
| 1361 | # CONFIG_SENSORS_DME1737 is not set | 1563 | # CONFIG_SENSORS_DME1737 is not set |
| 1362 | # CONFIG_SENSORS_SMSC47M1 is not set | 1564 | # CONFIG_SENSORS_SMSC47M1 is not set |
| 1363 | # CONFIG_SENSORS_SMSC47M192 is not set | 1565 | # CONFIG_SENSORS_SMSC47M192 is not set |
| 1364 | # CONFIG_SENSORS_SMSC47B397 is not set | 1566 | # CONFIG_SENSORS_SMSC47B397 is not set |
| 1365 | # CONFIG_SENSORS_ADS7828 is not set | 1567 | # CONFIG_SENSORS_ADS7828 is not set |
| 1568 | # CONFIG_SENSORS_ADS7871 is not set | ||
| 1569 | # CONFIG_SENSORS_AMC6821 is not set | ||
| 1366 | # CONFIG_SENSORS_THMC50 is not set | 1570 | # CONFIG_SENSORS_THMC50 is not set |
| 1571 | # CONFIG_SENSORS_TMP401 is not set | ||
| 1572 | # CONFIG_SENSORS_TMP421 is not set | ||
| 1367 | # CONFIG_SENSORS_VT1211 is not set | 1573 | # CONFIG_SENSORS_VT1211 is not set |
| 1368 | # CONFIG_SENSORS_W83781D is not set | 1574 | # CONFIG_SENSORS_W83781D is not set |
| 1369 | # CONFIG_SENSORS_W83791D is not set | 1575 | # CONFIG_SENSORS_W83791D is not set |
| @@ -1374,9 +1580,8 @@ CONFIG_SENSORS_LM85=m | |||
| 1374 | # CONFIG_SENSORS_W83627HF is not set | 1580 | # CONFIG_SENSORS_W83627HF is not set |
| 1375 | # CONFIG_SENSORS_W83627EHF is not set | 1581 | # CONFIG_SENSORS_W83627EHF is not set |
| 1376 | # CONFIG_SENSORS_LIS3_SPI is not set | 1582 | # CONFIG_SENSORS_LIS3_SPI is not set |
| 1377 | # CONFIG_HWMON_DEBUG_CHIP is not set | 1583 | # CONFIG_SENSORS_LIS3_I2C is not set |
| 1378 | # CONFIG_THERMAL is not set | 1584 | # CONFIG_THERMAL is not set |
| 1379 | # CONFIG_THERMAL_HWMON is not set | ||
| 1380 | CONFIG_WATCHDOG=y | 1585 | CONFIG_WATCHDOG=y |
| 1381 | # CONFIG_WATCHDOG_NOWAYOUT is not set | 1586 | # CONFIG_WATCHDOG_NOWAYOUT is not set |
| 1382 | 1587 | ||
| @@ -1385,6 +1590,7 @@ CONFIG_WATCHDOG=y | |||
| 1385 | # | 1590 | # |
| 1386 | # CONFIG_SOFT_WATCHDOG is not set | 1591 | # CONFIG_SOFT_WATCHDOG is not set |
| 1387 | CONFIG_S3C2410_WATCHDOG=y | 1592 | CONFIG_S3C2410_WATCHDOG=y |
| 1593 | # CONFIG_MAX63XX_WATCHDOG is not set | ||
| 1388 | 1594 | ||
| 1389 | # | 1595 | # |
| 1390 | # ISA-based Watchdog Cards | 1596 | # ISA-based Watchdog Cards |
| @@ -1408,213 +1614,36 @@ CONFIG_SSB_POSSIBLE=y | |||
| 1408 | # Multifunction device drivers | 1614 | # Multifunction device drivers |
| 1409 | # | 1615 | # |
| 1410 | # CONFIG_MFD_CORE is not set | 1616 | # CONFIG_MFD_CORE is not set |
| 1617 | # CONFIG_MFD_88PM860X is not set | ||
| 1411 | CONFIG_MFD_SM501=y | 1618 | CONFIG_MFD_SM501=y |
| 1412 | # CONFIG_MFD_SM501_GPIO is not set | 1619 | # CONFIG_MFD_SM501_GPIO is not set |
| 1413 | # CONFIG_MFD_ASIC3 is not set | 1620 | # CONFIG_MFD_ASIC3 is not set |
| 1414 | # CONFIG_HTC_EGPIO is not set | 1621 | # CONFIG_HTC_EGPIO is not set |
| 1415 | # CONFIG_HTC_PASIC3 is not set | 1622 | # CONFIG_HTC_PASIC3 is not set |
| 1623 | # CONFIG_HTC_I2CPLD is not set | ||
| 1416 | # CONFIG_UCB1400_CORE is not set | 1624 | # CONFIG_UCB1400_CORE is not set |
| 1417 | # CONFIG_TPS65010 is not set | 1625 | CONFIG_TPS65010=m |
| 1418 | # CONFIG_TWL4030_CORE is not set | 1626 | # CONFIG_TWL4030_CORE is not set |
| 1419 | # CONFIG_MFD_TMIO is not set | 1627 | # CONFIG_MFD_TMIO is not set |
| 1420 | # CONFIG_MFD_T7L66XB is not set | 1628 | # CONFIG_MFD_T7L66XB is not set |
| 1421 | # CONFIG_MFD_TC6387XB is not set | 1629 | # CONFIG_MFD_TC6387XB is not set |
| 1422 | # CONFIG_MFD_TC6393XB is not set | 1630 | # CONFIG_MFD_TC6393XB is not set |
| 1423 | # CONFIG_PMIC_DA903X is not set | 1631 | # CONFIG_PMIC_DA903X is not set |
| 1632 | # CONFIG_PMIC_ADP5520 is not set | ||
| 1633 | # CONFIG_MFD_MAX8925 is not set | ||
| 1424 | # CONFIG_MFD_WM8400 is not set | 1634 | # CONFIG_MFD_WM8400 is not set |
| 1635 | # CONFIG_MFD_WM831X is not set | ||
| 1425 | # CONFIG_MFD_WM8350_I2C is not set | 1636 | # CONFIG_MFD_WM8350_I2C is not set |
| 1426 | # CONFIG_MFD_PCF50633 is not set | 1637 | # CONFIG_MFD_WM8994 is not set |
| 1427 | 1638 | CONFIG_MFD_PCF50633=y | |
| 1428 | # | 1639 | # CONFIG_MFD_MC13783 is not set |
| 1429 | # Multimedia devices | 1640 | # CONFIG_PCF50633_ADC is not set |
| 1430 | # | 1641 | CONFIG_PCF50633_GPIO=y |
| 1431 | 1642 | # CONFIG_AB3100_CORE is not set | |
| 1432 | # | 1643 | # CONFIG_EZX_PCAP is not set |
| 1433 | # Multimedia core support | 1644 | # CONFIG_AB4500_CORE is not set |
| 1434 | # | 1645 | # CONFIG_REGULATOR is not set |
| 1435 | CONFIG_VIDEO_DEV=m | 1646 | # CONFIG_MEDIA_SUPPORT is not set |
| 1436 | CONFIG_VIDEO_V4L2_COMMON=m | ||
| 1437 | CONFIG_VIDEO_ALLOW_V4L1=y | ||
| 1438 | CONFIG_VIDEO_V4L1_COMPAT=y | ||
| 1439 | CONFIG_DVB_CORE=m | ||
| 1440 | CONFIG_VIDEO_MEDIA=m | ||
| 1441 | |||
| 1442 | # | ||
| 1443 | # Multimedia drivers | ||
| 1444 | # | ||
| 1445 | CONFIG_MEDIA_ATTACH=y | ||
| 1446 | CONFIG_MEDIA_TUNER=m | ||
| 1447 | # CONFIG_MEDIA_TUNER_CUSTOMISE is not set | ||
| 1448 | CONFIG_MEDIA_TUNER_SIMPLE=m | ||
| 1449 | CONFIG_MEDIA_TUNER_TDA8290=m | ||
| 1450 | CONFIG_MEDIA_TUNER_TDA827X=m | ||
| 1451 | CONFIG_MEDIA_TUNER_TDA18271=m | ||
| 1452 | CONFIG_MEDIA_TUNER_TDA9887=m | ||
| 1453 | CONFIG_MEDIA_TUNER_TEA5761=m | ||
| 1454 | CONFIG_MEDIA_TUNER_TEA5767=m | ||
| 1455 | CONFIG_MEDIA_TUNER_MT20XX=m | ||
| 1456 | CONFIG_MEDIA_TUNER_MT2060=m | ||
| 1457 | CONFIG_MEDIA_TUNER_MT2266=m | ||
| 1458 | CONFIG_MEDIA_TUNER_QT1010=m | ||
| 1459 | CONFIG_MEDIA_TUNER_XC2028=m | ||
| 1460 | CONFIG_MEDIA_TUNER_XC5000=m | ||
| 1461 | CONFIG_MEDIA_TUNER_MXL5005S=m | ||
| 1462 | CONFIG_MEDIA_TUNER_MXL5007T=m | ||
| 1463 | CONFIG_MEDIA_TUNER_MC44S803=m | ||
| 1464 | CONFIG_VIDEO_V4L2=m | ||
| 1465 | CONFIG_VIDEO_V4L1=m | ||
| 1466 | CONFIG_VIDEOBUF_GEN=m | ||
| 1467 | CONFIG_VIDEOBUF_VMALLOC=m | ||
| 1468 | CONFIG_VIDEO_TVEEPROM=m | ||
| 1469 | CONFIG_VIDEO_CAPTURE_DRIVERS=y | ||
| 1470 | # CONFIG_VIDEO_ADV_DEBUG is not set | ||
| 1471 | # CONFIG_VIDEO_FIXED_MINOR_RANGES is not set | ||
| 1472 | CONFIG_VIDEO_HELPER_CHIPS_AUTO=y | ||
| 1473 | CONFIG_VIDEO_VIVI=m | ||
| 1474 | CONFIG_VIDEO_PMS=m | ||
| 1475 | CONFIG_VIDEO_BWQCAM=m | ||
| 1476 | CONFIG_VIDEO_CQCAM=m | ||
| 1477 | CONFIG_VIDEO_W9966=m | ||
| 1478 | CONFIG_VIDEO_CPIA=m | ||
| 1479 | CONFIG_VIDEO_CPIA_PP=m | ||
| 1480 | CONFIG_VIDEO_CPIA_USB=m | ||
| 1481 | CONFIG_VIDEO_CPIA2=m | ||
| 1482 | CONFIG_VIDEO_SAA5246A=m | ||
| 1483 | CONFIG_VIDEO_SAA5249=m | ||
| 1484 | CONFIG_VIDEO_AU0828=m | ||
| 1485 | # CONFIG_SOC_CAMERA is not set | ||
| 1486 | CONFIG_V4L_USB_DRIVERS=y | ||
| 1487 | # CONFIG_USB_VIDEO_CLASS is not set | ||
| 1488 | CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y | ||
| 1489 | CONFIG_USB_GSPCA=m | ||
| 1490 | # CONFIG_USB_M5602 is not set | ||
| 1491 | # CONFIG_USB_STV06XX is not set | ||
| 1492 | # CONFIG_USB_GSPCA_CONEX is not set | ||
| 1493 | # CONFIG_USB_GSPCA_ETOMS is not set | ||
| 1494 | # CONFIG_USB_GSPCA_FINEPIX is not set | ||
| 1495 | # CONFIG_USB_GSPCA_MARS is not set | ||
| 1496 | # CONFIG_USB_GSPCA_MR97310A is not set | ||
| 1497 | # CONFIG_USB_GSPCA_OV519 is not set | ||
| 1498 | # CONFIG_USB_GSPCA_OV534 is not set | ||
| 1499 | # CONFIG_USB_GSPCA_PAC207 is not set | ||
| 1500 | # CONFIG_USB_GSPCA_PAC7311 is not set | ||
| 1501 | # CONFIG_USB_GSPCA_SONIXB is not set | ||
| 1502 | # CONFIG_USB_GSPCA_SONIXJ is not set | ||
| 1503 | # CONFIG_USB_GSPCA_SPCA500 is not set | ||
| 1504 | # CONFIG_USB_GSPCA_SPCA501 is not set | ||
| 1505 | # CONFIG_USB_GSPCA_SPCA505 is not set | ||
| 1506 | # CONFIG_USB_GSPCA_SPCA506 is not set | ||
| 1507 | # CONFIG_USB_GSPCA_SPCA508 is not set | ||
| 1508 | # CONFIG_USB_GSPCA_SPCA561 is not set | ||
| 1509 | # CONFIG_USB_GSPCA_SQ905 is not set | ||
| 1510 | # CONFIG_USB_GSPCA_SQ905C is not set | ||
| 1511 | # CONFIG_USB_GSPCA_STK014 is not set | ||
| 1512 | # CONFIG_USB_GSPCA_SUNPLUS is not set | ||
| 1513 | # CONFIG_USB_GSPCA_T613 is not set | ||
| 1514 | # CONFIG_USB_GSPCA_TV8532 is not set | ||
| 1515 | # CONFIG_USB_GSPCA_VC032X is not set | ||
| 1516 | # CONFIG_USB_GSPCA_ZC3XX is not set | ||
| 1517 | # CONFIG_VIDEO_PVRUSB2 is not set | ||
| 1518 | # CONFIG_VIDEO_HDPVR is not set | ||
| 1519 | # CONFIG_VIDEO_EM28XX is not set | ||
| 1520 | # CONFIG_VIDEO_CX231XX is not set | ||
| 1521 | # CONFIG_VIDEO_USBVISION is not set | ||
| 1522 | # CONFIG_USB_VICAM is not set | ||
| 1523 | # CONFIG_USB_IBMCAM is not set | ||
| 1524 | # CONFIG_USB_KONICAWC is not set | ||
| 1525 | # CONFIG_USB_QUICKCAM_MESSENGER is not set | ||
| 1526 | # CONFIG_USB_ET61X251 is not set | ||
| 1527 | # CONFIG_VIDEO_OVCAMCHIP is not set | ||
| 1528 | # CONFIG_USB_OV511 is not set | ||
| 1529 | # CONFIG_USB_SE401 is not set | ||
| 1530 | # CONFIG_USB_SN9C102 is not set | ||
| 1531 | # CONFIG_USB_STV680 is not set | ||
| 1532 | # CONFIG_USB_ZC0301 is not set | ||
| 1533 | # CONFIG_USB_PWC is not set | ||
| 1534 | CONFIG_USB_PWC_INPUT_EVDEV=y | ||
| 1535 | # CONFIG_USB_ZR364XX is not set | ||
| 1536 | # CONFIG_USB_STKWEBCAM is not set | ||
| 1537 | # CONFIG_USB_S2255 is not set | ||
| 1538 | CONFIG_RADIO_ADAPTERS=y | ||
| 1539 | CONFIG_RADIO_CADET=m | ||
| 1540 | CONFIG_RADIO_RTRACK=m | ||
| 1541 | CONFIG_RADIO_RTRACK2=m | ||
| 1542 | CONFIG_RADIO_AZTECH=m | ||
| 1543 | CONFIG_RADIO_GEMTEK=m | ||
| 1544 | CONFIG_RADIO_SF16FMI=m | ||
| 1545 | CONFIG_RADIO_SF16FMR2=m | ||
| 1546 | CONFIG_RADIO_TERRATEC=m | ||
| 1547 | CONFIG_RADIO_TRUST=m | ||
| 1548 | CONFIG_RADIO_TYPHOON=m | ||
| 1549 | CONFIG_RADIO_TYPHOON_PROC_FS=y | ||
| 1550 | CONFIG_RADIO_ZOLTRIX=m | ||
| 1551 | CONFIG_USB_DSBR=m | ||
| 1552 | CONFIG_USB_SI470X=m | ||
| 1553 | CONFIG_USB_MR800=m | ||
| 1554 | CONFIG_RADIO_TEA5764=m | ||
| 1555 | CONFIG_DVB_DYNAMIC_MINORS=y | ||
| 1556 | CONFIG_DVB_CAPTURE_DRIVERS=y | ||
| 1557 | # CONFIG_TTPCI_EEPROM is not set | ||
| 1558 | |||
| 1559 | # | ||
| 1560 | # Supported USB Adapters | ||
| 1561 | # | ||
| 1562 | CONFIG_DVB_USB=m | ||
| 1563 | # CONFIG_DVB_USB_DEBUG is not set | ||
| 1564 | # CONFIG_DVB_USB_A800 is not set | ||
| 1565 | CONFIG_DVB_USB_DIBUSB_MB=m | ||
| 1566 | # CONFIG_DVB_USB_DIBUSB_MB_FAULTY is not set | ||
| 1567 | CONFIG_DVB_USB_DIBUSB_MC=m | ||
| 1568 | CONFIG_DVB_USB_DIB0700=m | ||
| 1569 | CONFIG_DVB_USB_UMT_010=m | ||
| 1570 | CONFIG_DVB_USB_CXUSB=m | ||
| 1571 | CONFIG_DVB_USB_M920X=m | ||
| 1572 | # CONFIG_DVB_USB_GL861 is not set | ||
| 1573 | # CONFIG_DVB_USB_AU6610 is not set | ||
| 1574 | # CONFIG_DVB_USB_DIGITV is not set | ||
| 1575 | # CONFIG_DVB_USB_VP7045 is not set | ||
| 1576 | # CONFIG_DVB_USB_VP702X is not set | ||
| 1577 | # CONFIG_DVB_USB_GP8PSK is not set | ||
| 1578 | # CONFIG_DVB_USB_NOVA_T_USB2 is not set | ||
| 1579 | # CONFIG_DVB_USB_TTUSB2 is not set | ||
| 1580 | # CONFIG_DVB_USB_DTT200U is not set | ||
| 1581 | # CONFIG_DVB_USB_OPERA1 is not set | ||
| 1582 | CONFIG_DVB_USB_AF9005=m | ||
| 1583 | # CONFIG_DVB_USB_AF9005_REMOTE is not set | ||
| 1584 | # CONFIG_DVB_USB_DW2102 is not set | ||
| 1585 | # CONFIG_DVB_USB_CINERGY_T2 is not set | ||
| 1586 | # CONFIG_DVB_USB_ANYSEE is not set | ||
| 1587 | # CONFIG_DVB_USB_DTV5100 is not set | ||
| 1588 | # CONFIG_DVB_USB_AF9015 is not set | ||
| 1589 | # CONFIG_DVB_USB_CE6230 is not set | ||
| 1590 | # CONFIG_DVB_SIANO_SMS1XXX is not set | ||
| 1591 | |||
| 1592 | # | ||
| 1593 | # Supported FlexCopII (B2C2) Adapters | ||
| 1594 | # | ||
| 1595 | # CONFIG_DVB_B2C2_FLEXCOP is not set | ||
| 1596 | |||
| 1597 | # | ||
| 1598 | # Supported DVB Frontends | ||
| 1599 | # | ||
| 1600 | # CONFIG_DVB_FE_CUSTOMISE is not set | ||
| 1601 | CONFIG_DVB_CX22702=m | ||
| 1602 | CONFIG_DVB_TDA1004X=m | ||
| 1603 | CONFIG_DVB_MT352=m | ||
| 1604 | CONFIG_DVB_ZL10353=m | ||
| 1605 | CONFIG_DVB_DIB3000MB=m | ||
| 1606 | CONFIG_DVB_DIB3000MC=m | ||
| 1607 | CONFIG_DVB_DIB7000M=m | ||
| 1608 | CONFIG_DVB_DIB7000P=m | ||
| 1609 | CONFIG_DVB_LGDT330X=m | ||
| 1610 | CONFIG_DVB_LGDT3305=m | ||
| 1611 | CONFIG_DVB_AU8522=m | ||
| 1612 | CONFIG_DVB_S5H1411=m | ||
| 1613 | CONFIG_DVB_PLL=m | ||
| 1614 | CONFIG_DVB_TUNER_DIB0070=m | ||
| 1615 | CONFIG_DVB_LGS8GL5=m | ||
| 1616 | CONFIG_DAB=y | ||
| 1617 | CONFIG_USB_DABUSB=m | ||
| 1618 | 1647 | ||
| 1619 | # | 1648 | # |
| 1620 | # Graphics support | 1649 | # Graphics support |
| @@ -1653,6 +1682,8 @@ CONFIG_FB_SM501=y | |||
| 1653 | # CONFIG_FB_BROADSHEET is not set | 1682 | # CONFIG_FB_BROADSHEET is not set |
| 1654 | CONFIG_BACKLIGHT_LCD_SUPPORT=y | 1683 | CONFIG_BACKLIGHT_LCD_SUPPORT=y |
| 1655 | CONFIG_LCD_CLASS_DEVICE=m | 1684 | CONFIG_LCD_CLASS_DEVICE=m |
| 1685 | # CONFIG_LCD_L4F00242T03 is not set | ||
| 1686 | # CONFIG_LCD_LMS283GF05 is not set | ||
| 1656 | # CONFIG_LCD_LTV350QV is not set | 1687 | # CONFIG_LCD_LTV350QV is not set |
| 1657 | # CONFIG_LCD_ILI9320 is not set | 1688 | # CONFIG_LCD_ILI9320 is not set |
| 1658 | # CONFIG_LCD_TDO24M is not set | 1689 | # CONFIG_LCD_TDO24M is not set |
| @@ -1682,6 +1713,7 @@ CONFIG_FONT_8x16=y | |||
| 1682 | # CONFIG_LOGO is not set | 1713 | # CONFIG_LOGO is not set |
| 1683 | CONFIG_SOUND=y | 1714 | CONFIG_SOUND=y |
| 1684 | CONFIG_SOUND_OSS_CORE=y | 1715 | CONFIG_SOUND_OSS_CORE=y |
| 1716 | CONFIG_SOUND_OSS_CORE_PRECLAIM=y | ||
| 1685 | CONFIG_SND=y | 1717 | CONFIG_SND=y |
| 1686 | CONFIG_SND_TIMER=y | 1718 | CONFIG_SND_TIMER=y |
| 1687 | CONFIG_SND_PCM=y | 1719 | CONFIG_SND_PCM=y |
| @@ -1701,36 +1733,44 @@ CONFIG_SND_VERBOSE_PROCFS=y | |||
| 1701 | CONFIG_SND_VERBOSE_PRINTK=y | 1733 | CONFIG_SND_VERBOSE_PRINTK=y |
| 1702 | # CONFIG_SND_DEBUG is not set | 1734 | # CONFIG_SND_DEBUG is not set |
| 1703 | CONFIG_SND_VMASTER=y | 1735 | CONFIG_SND_VMASTER=y |
| 1736 | CONFIG_SND_RAWMIDI_SEQ=m | ||
| 1737 | # CONFIG_SND_OPL3_LIB_SEQ is not set | ||
| 1738 | # CONFIG_SND_OPL4_LIB_SEQ is not set | ||
| 1739 | # CONFIG_SND_SBAWE_SEQ is not set | ||
| 1740 | # CONFIG_SND_EMU10K1_SEQ is not set | ||
| 1704 | CONFIG_SND_AC97_CODEC=m | 1741 | CONFIG_SND_AC97_CODEC=m |
| 1705 | # CONFIG_SND_DRIVERS is not set | 1742 | # CONFIG_SND_DRIVERS is not set |
| 1706 | # CONFIG_SND_ARM is not set | 1743 | # CONFIG_SND_ARM is not set |
| 1707 | # CONFIG_SND_SPI is not set | 1744 | # CONFIG_SND_SPI is not set |
| 1708 | CONFIG_SND_USB=y | 1745 | CONFIG_SND_USB=y |
| 1709 | CONFIG_SND_USB_AUDIO=m | 1746 | CONFIG_SND_USB_AUDIO=m |
| 1747 | # CONFIG_SND_USB_UA101 is not set | ||
| 1710 | CONFIG_SND_USB_CAIAQ=m | 1748 | CONFIG_SND_USB_CAIAQ=m |
| 1711 | # CONFIG_SND_USB_CAIAQ_INPUT is not set | 1749 | # CONFIG_SND_USB_CAIAQ_INPUT is not set |
| 1712 | CONFIG_SND_SOC=y | 1750 | CONFIG_SND_SOC=y |
| 1713 | CONFIG_SND_SOC_AC97_BUS=y | 1751 | CONFIG_SND_SOC_AC97_BUS=y |
| 1714 | CONFIG_SND_S3C24XX_SOC=y | 1752 | CONFIG_SND_S3C24XX_SOC=y |
| 1715 | CONFIG_SND_S3C24XX_SOC_I2S=m | 1753 | CONFIG_SND_S3C24XX_SOC_I2S=y |
| 1716 | CONFIG_SND_S3C_I2SV2_SOC=m | 1754 | CONFIG_SND_S3C_I2SV2_SOC=m |
| 1717 | CONFIG_SND_S3C2412_SOC_I2S=m | 1755 | CONFIG_SND_S3C2412_SOC_I2S=m |
| 1718 | CONFIG_SND_S3C2443_SOC_AC97=m | 1756 | CONFIG_SND_S3C_SOC_AC97=m |
| 1757 | # CONFIG_SND_S3C24XX_SOC_NEO1973_GTA02_WM8753 is not set | ||
| 1719 | CONFIG_SND_S3C24XX_SOC_JIVE_WM8750=m | 1758 | CONFIG_SND_S3C24XX_SOC_JIVE_WM8750=m |
| 1720 | CONFIG_SND_S3C24XX_SOC_SMDK2443_WM9710=m | 1759 | CONFIG_SND_S3C24XX_SOC_SMDK2443_WM9710=m |
| 1721 | CONFIG_SND_S3C24XX_SOC_LN2440SBC_ALC650=m | 1760 | CONFIG_SND_S3C24XX_SOC_LN2440SBC_ALC650=m |
| 1722 | CONFIG_SND_S3C24XX_SOC_S3C24XX_UDA134X=m | 1761 | CONFIG_SND_S3C24XX_SOC_S3C24XX_UDA134X=y |
| 1762 | # CONFIG_SND_S3C24XX_SOC_SIMTEC_TLV320AIC23 is not set | ||
| 1763 | # CONFIG_SND_S3C24XX_SOC_SIMTEC_HERMES is not set | ||
| 1723 | CONFIG_SND_SOC_I2C_AND_SPI=y | 1764 | CONFIG_SND_SOC_I2C_AND_SPI=y |
| 1724 | # CONFIG_SND_SOC_ALL_CODECS is not set | 1765 | # CONFIG_SND_SOC_ALL_CODECS is not set |
| 1725 | CONFIG_SND_SOC_AC97_CODEC=m | 1766 | CONFIG_SND_SOC_AC97_CODEC=m |
| 1726 | CONFIG_SND_SOC_L3=m | 1767 | CONFIG_SND_SOC_L3=y |
| 1727 | CONFIG_SND_SOC_UDA134X=m | 1768 | CONFIG_SND_SOC_UDA134X=y |
| 1728 | CONFIG_SND_SOC_WM8750=m | 1769 | CONFIG_SND_SOC_WM8750=m |
| 1729 | # CONFIG_SOUND_PRIME is not set | 1770 | # CONFIG_SOUND_PRIME is not set |
| 1730 | CONFIG_AC97_BUS=y | 1771 | CONFIG_AC97_BUS=y |
| 1731 | CONFIG_HID_SUPPORT=y | 1772 | CONFIG_HID_SUPPORT=y |
| 1732 | CONFIG_HID=y | 1773 | CONFIG_HID=y |
| 1733 | # CONFIG_HID_DEBUG is not set | ||
| 1734 | # CONFIG_HIDRAW is not set | 1774 | # CONFIG_HIDRAW is not set |
| 1735 | 1775 | ||
| 1736 | # | 1776 | # |
| @@ -1743,6 +1783,8 @@ CONFIG_HID=y | |||
| 1743 | # Special HID drivers | 1783 | # Special HID drivers |
| 1744 | # | 1784 | # |
| 1745 | CONFIG_HID_APPLE=m | 1785 | CONFIG_HID_APPLE=m |
| 1786 | # CONFIG_HID_MAGICMOUSE is not set | ||
| 1787 | # CONFIG_HID_WACOM is not set | ||
| 1746 | CONFIG_USB_SUPPORT=y | 1788 | CONFIG_USB_SUPPORT=y |
| 1747 | CONFIG_USB_ARCH_HAS_HCD=y | 1789 | CONFIG_USB_ARCH_HAS_HCD=y |
| 1748 | CONFIG_USB_ARCH_HAS_OHCI=y | 1790 | CONFIG_USB_ARCH_HAS_OHCI=y |
| @@ -1757,8 +1799,6 @@ CONFIG_USB=y | |||
| 1757 | CONFIG_USB_DEVICEFS=y | 1799 | CONFIG_USB_DEVICEFS=y |
| 1758 | CONFIG_USB_DEVICE_CLASS=y | 1800 | CONFIG_USB_DEVICE_CLASS=y |
| 1759 | # CONFIG_USB_DYNAMIC_MINORS is not set | 1801 | # CONFIG_USB_DYNAMIC_MINORS is not set |
| 1760 | # CONFIG_USB_SUSPEND is not set | ||
| 1761 | # CONFIG_USB_OTG is not set | ||
| 1762 | CONFIG_USB_MON=y | 1802 | CONFIG_USB_MON=y |
| 1763 | # CONFIG_USB_WUSB is not set | 1803 | # CONFIG_USB_WUSB is not set |
| 1764 | # CONFIG_USB_WUSB_CBAF is not set | 1804 | # CONFIG_USB_WUSB_CBAF is not set |
| @@ -1770,6 +1810,7 @@ CONFIG_USB_MON=y | |||
| 1770 | # CONFIG_USB_OXU210HP_HCD is not set | 1810 | # CONFIG_USB_OXU210HP_HCD is not set |
| 1771 | # CONFIG_USB_ISP116X_HCD is not set | 1811 | # CONFIG_USB_ISP116X_HCD is not set |
| 1772 | # CONFIG_USB_ISP1760_HCD is not set | 1812 | # CONFIG_USB_ISP1760_HCD is not set |
| 1813 | # CONFIG_USB_ISP1362_HCD is not set | ||
| 1773 | CONFIG_USB_OHCI_HCD=y | 1814 | CONFIG_USB_OHCI_HCD=y |
| 1774 | # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set | 1815 | # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set |
| 1775 | # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set | 1816 | # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set |
| @@ -1854,6 +1895,7 @@ CONFIG_USB_SERIAL_FTDI_SIO=y | |||
| 1854 | CONFIG_USB_SERIAL_NAVMAN=m | 1895 | CONFIG_USB_SERIAL_NAVMAN=m |
| 1855 | CONFIG_USB_SERIAL_PL2303=y | 1896 | CONFIG_USB_SERIAL_PL2303=y |
| 1856 | # CONFIG_USB_SERIAL_OTI6858 is not set | 1897 | # CONFIG_USB_SERIAL_OTI6858 is not set |
| 1898 | # CONFIG_USB_SERIAL_QCAUX is not set | ||
| 1857 | # CONFIG_USB_SERIAL_QUALCOMM is not set | 1899 | # CONFIG_USB_SERIAL_QUALCOMM is not set |
| 1858 | # CONFIG_USB_SERIAL_SPCP8X5 is not set | 1900 | # CONFIG_USB_SERIAL_SPCP8X5 is not set |
| 1859 | # CONFIG_USB_SERIAL_HP4X is not set | 1901 | # CONFIG_USB_SERIAL_HP4X is not set |
| @@ -1864,9 +1906,12 @@ CONFIG_USB_SERIAL_PL2303=y | |||
| 1864 | # CONFIG_USB_SERIAL_TI is not set | 1906 | # CONFIG_USB_SERIAL_TI is not set |
| 1865 | # CONFIG_USB_SERIAL_CYBERJACK is not set | 1907 | # CONFIG_USB_SERIAL_CYBERJACK is not set |
| 1866 | # CONFIG_USB_SERIAL_XIRCOM is not set | 1908 | # CONFIG_USB_SERIAL_XIRCOM is not set |
| 1909 | CONFIG_USB_SERIAL_WWAN=m | ||
| 1867 | CONFIG_USB_SERIAL_OPTION=m | 1910 | CONFIG_USB_SERIAL_OPTION=m |
| 1868 | # CONFIG_USB_SERIAL_OMNINET is not set | 1911 | # CONFIG_USB_SERIAL_OMNINET is not set |
| 1869 | # CONFIG_USB_SERIAL_OPTICON is not set | 1912 | # CONFIG_USB_SERIAL_OPTICON is not set |
| 1913 | # CONFIG_USB_SERIAL_VIVOPAY_SERIAL is not set | ||
| 1914 | # CONFIG_USB_SERIAL_ZIO is not set | ||
| 1870 | # CONFIG_USB_SERIAL_DEBUG is not set | 1915 | # CONFIG_USB_SERIAL_DEBUG is not set |
| 1871 | 1916 | ||
| 1872 | # | 1917 | # |
| @@ -1879,7 +1924,6 @@ CONFIG_USB_SEVSEG=m | |||
| 1879 | CONFIG_USB_RIO500=m | 1924 | CONFIG_USB_RIO500=m |
| 1880 | CONFIG_USB_LEGOTOWER=m | 1925 | CONFIG_USB_LEGOTOWER=m |
| 1881 | CONFIG_USB_LCD=m | 1926 | CONFIG_USB_LCD=m |
| 1882 | CONFIG_USB_BERRY_CHARGE=m | ||
| 1883 | CONFIG_USB_LED=m | 1927 | CONFIG_USB_LED=m |
| 1884 | CONFIG_USB_CYPRESS_CY7C63=m | 1928 | CONFIG_USB_CYPRESS_CY7C63=m |
| 1885 | CONFIG_USB_CYTHERM=m | 1929 | CONFIG_USB_CYTHERM=m |
| @@ -1891,13 +1935,13 @@ CONFIG_USB_TRANCEVIBRATOR=m | |||
| 1891 | CONFIG_USB_IOWARRIOR=m | 1935 | CONFIG_USB_IOWARRIOR=m |
| 1892 | CONFIG_USB_TEST=m | 1936 | CONFIG_USB_TEST=m |
| 1893 | # CONFIG_USB_ISIGHTFW is not set | 1937 | # CONFIG_USB_ISIGHTFW is not set |
| 1894 | # CONFIG_USB_VST is not set | ||
| 1895 | # CONFIG_USB_GADGET is not set | 1938 | # CONFIG_USB_GADGET is not set |
| 1896 | 1939 | ||
| 1897 | # | 1940 | # |
| 1898 | # OTG and related infrastructure | 1941 | # OTG and related infrastructure |
| 1899 | # | 1942 | # |
| 1900 | # CONFIG_USB_GPIO_VBUS is not set | 1943 | # CONFIG_USB_GPIO_VBUS is not set |
| 1944 | # CONFIG_USB_ULPI is not set | ||
| 1901 | # CONFIG_NOP_USB_XCEIV is not set | 1945 | # CONFIG_NOP_USB_XCEIV is not set |
| 1902 | CONFIG_MMC=y | 1946 | CONFIG_MMC=y |
| 1903 | # CONFIG_MMC_DEBUG is not set | 1947 | # CONFIG_MMC_DEBUG is not set |
| @@ -1915,10 +1959,15 @@ CONFIG_MMC_TEST=m | |||
| 1915 | # MMC/SD/SDIO Host Controller Drivers | 1959 | # MMC/SD/SDIO Host Controller Drivers |
| 1916 | # | 1960 | # |
| 1917 | CONFIG_MMC_SDHCI=m | 1961 | CONFIG_MMC_SDHCI=m |
| 1962 | # CONFIG_MMC_SDHCI_PLTFM is not set | ||
| 1963 | # CONFIG_MMC_SDHCI_S3C is not set | ||
| 1918 | CONFIG_MMC_SPI=m | 1964 | CONFIG_MMC_SPI=m |
| 1919 | CONFIG_MMC_S3C=y | 1965 | CONFIG_MMC_S3C=y |
| 1966 | # CONFIG_MMC_S3C_HW_SDIO_IRQ is not set | ||
| 1967 | CONFIG_MMC_S3C_PIO=y | ||
| 1968 | # CONFIG_MMC_S3C_DMA is not set | ||
| 1969 | # CONFIG_MMC_S3C_PIODMA is not set | ||
| 1920 | # CONFIG_MEMSTICK is not set | 1970 | # CONFIG_MEMSTICK is not set |
| 1921 | # CONFIG_ACCESSIBILITY is not set | ||
| 1922 | CONFIG_NEW_LEDS=y | 1971 | CONFIG_NEW_LEDS=y |
| 1923 | CONFIG_LEDS_CLASS=m | 1972 | CONFIG_LEDS_CLASS=m |
| 1924 | 1973 | ||
| @@ -1930,26 +1979,28 @@ CONFIG_LEDS_H1940=m | |||
| 1930 | CONFIG_LEDS_PCA9532=m | 1979 | CONFIG_LEDS_PCA9532=m |
| 1931 | CONFIG_LEDS_GPIO=m | 1980 | CONFIG_LEDS_GPIO=m |
| 1932 | CONFIG_LEDS_GPIO_PLATFORM=y | 1981 | CONFIG_LEDS_GPIO_PLATFORM=y |
| 1933 | CONFIG_LEDS_LP5521=m | 1982 | # CONFIG_LEDS_LP3944 is not set |
| 1934 | CONFIG_LEDS_PCA955X=m | 1983 | CONFIG_LEDS_PCA955X=m |
| 1935 | CONFIG_LEDS_DAC124S085=m | 1984 | CONFIG_LEDS_DAC124S085=m |
| 1936 | CONFIG_LEDS_PWM=m | 1985 | CONFIG_LEDS_PWM=m |
| 1937 | CONFIG_LEDS_BD2802=m | 1986 | CONFIG_LEDS_BD2802=m |
| 1987 | # CONFIG_LEDS_LT3593 is not set | ||
| 1988 | CONFIG_LEDS_TRIGGERS=y | ||
| 1938 | 1989 | ||
| 1939 | # | 1990 | # |
| 1940 | # LED Triggers | 1991 | # LED Triggers |
| 1941 | # | 1992 | # |
| 1942 | CONFIG_LEDS_TRIGGERS=y | ||
| 1943 | CONFIG_LEDS_TRIGGER_TIMER=m | 1993 | CONFIG_LEDS_TRIGGER_TIMER=m |
| 1944 | # CONFIG_LEDS_TRIGGER_IDE_DISK is not set | 1994 | # CONFIG_LEDS_TRIGGER_IDE_DISK is not set |
| 1945 | CONFIG_LEDS_TRIGGER_HEARTBEAT=m | 1995 | CONFIG_LEDS_TRIGGER_HEARTBEAT=m |
| 1946 | CONFIG_LEDS_TRIGGER_BACKLIGHT=m | 1996 | CONFIG_LEDS_TRIGGER_BACKLIGHT=y |
| 1947 | CONFIG_LEDS_TRIGGER_GPIO=m | 1997 | CONFIG_LEDS_TRIGGER_GPIO=m |
| 1948 | CONFIG_LEDS_TRIGGER_DEFAULT_ON=m | 1998 | CONFIG_LEDS_TRIGGER_DEFAULT_ON=m |
| 1949 | 1999 | ||
| 1950 | # | 2000 | # |
| 1951 | # iptables trigger is under Netfilter config (LED target) | 2001 | # iptables trigger is under Netfilter config (LED target) |
| 1952 | # | 2002 | # |
| 2003 | # CONFIG_ACCESSIBILITY is not set | ||
| 1953 | CONFIG_RTC_LIB=y | 2004 | CONFIG_RTC_LIB=y |
| 1954 | CONFIG_RTC_CLASS=y | 2005 | CONFIG_RTC_CLASS=y |
| 1955 | CONFIG_RTC_HCTOSYS=y | 2006 | CONFIG_RTC_HCTOSYS=y |
| @@ -1978,9 +2029,11 @@ CONFIG_RTC_INTF_DEV=y | |||
| 1978 | # CONFIG_RTC_DRV_PCF8563 is not set | 2029 | # CONFIG_RTC_DRV_PCF8563 is not set |
| 1979 | # CONFIG_RTC_DRV_PCF8583 is not set | 2030 | # CONFIG_RTC_DRV_PCF8583 is not set |
| 1980 | # CONFIG_RTC_DRV_M41T80 is not set | 2031 | # CONFIG_RTC_DRV_M41T80 is not set |
| 2032 | # CONFIG_RTC_DRV_BQ32K is not set | ||
| 1981 | # CONFIG_RTC_DRV_S35390A is not set | 2033 | # CONFIG_RTC_DRV_S35390A is not set |
| 1982 | # CONFIG_RTC_DRV_FM3130 is not set | 2034 | # CONFIG_RTC_DRV_FM3130 is not set |
| 1983 | # CONFIG_RTC_DRV_RX8581 is not set | 2035 | # CONFIG_RTC_DRV_RX8581 is not set |
| 2036 | # CONFIG_RTC_DRV_RX8025 is not set | ||
| 1984 | 2037 | ||
| 1985 | # | 2038 | # |
| 1986 | # SPI RTC drivers | 2039 | # SPI RTC drivers |
| @@ -1992,6 +2045,7 @@ CONFIG_RTC_INTF_DEV=y | |||
| 1992 | # CONFIG_RTC_DRV_R9701 is not set | 2045 | # CONFIG_RTC_DRV_R9701 is not set |
| 1993 | # CONFIG_RTC_DRV_RS5C348 is not set | 2046 | # CONFIG_RTC_DRV_RS5C348 is not set |
| 1994 | # CONFIG_RTC_DRV_DS3234 is not set | 2047 | # CONFIG_RTC_DRV_DS3234 is not set |
| 2048 | # CONFIG_RTC_DRV_PCF2123 is not set | ||
| 1995 | 2049 | ||
| 1996 | # | 2050 | # |
| 1997 | # Platform RTC drivers | 2051 | # Platform RTC drivers |
| @@ -2005,8 +2059,11 @@ CONFIG_RTC_INTF_DEV=y | |||
| 2005 | # CONFIG_RTC_DRV_M48T86 is not set | 2059 | # CONFIG_RTC_DRV_M48T86 is not set |
| 2006 | # CONFIG_RTC_DRV_M48T35 is not set | 2060 | # CONFIG_RTC_DRV_M48T35 is not set |
| 2007 | # CONFIG_RTC_DRV_M48T59 is not set | 2061 | # CONFIG_RTC_DRV_M48T59 is not set |
| 2062 | # CONFIG_RTC_DRV_MSM6242 is not set | ||
| 2008 | # CONFIG_RTC_DRV_BQ4802 is not set | 2063 | # CONFIG_RTC_DRV_BQ4802 is not set |
| 2064 | # CONFIG_RTC_DRV_RP5C01 is not set | ||
| 2009 | # CONFIG_RTC_DRV_V3020 is not set | 2065 | # CONFIG_RTC_DRV_V3020 is not set |
| 2066 | # CONFIG_RTC_DRV_PCF50633 is not set | ||
| 2010 | 2067 | ||
| 2011 | # | 2068 | # |
| 2012 | # on-CPU RTC drivers | 2069 | # on-CPU RTC drivers |
| @@ -2014,7 +2071,6 @@ CONFIG_RTC_INTF_DEV=y | |||
| 2014 | CONFIG_RTC_DRV_S3C=y | 2071 | CONFIG_RTC_DRV_S3C=y |
| 2015 | # CONFIG_DMADEVICES is not set | 2072 | # CONFIG_DMADEVICES is not set |
| 2016 | # CONFIG_AUXDISPLAY is not set | 2073 | # CONFIG_AUXDISPLAY is not set |
| 2017 | # CONFIG_REGULATOR is not set | ||
| 2018 | # CONFIG_UIO is not set | 2074 | # CONFIG_UIO is not set |
| 2019 | # CONFIG_STAGING is not set | 2075 | # CONFIG_STAGING is not set |
| 2020 | 2076 | ||
| @@ -2032,20 +2088,23 @@ CONFIG_EXT3_FS_XATTR=y | |||
| 2032 | CONFIG_EXT3_FS_POSIX_ACL=y | 2088 | CONFIG_EXT3_FS_POSIX_ACL=y |
| 2033 | # CONFIG_EXT3_FS_SECURITY is not set | 2089 | # CONFIG_EXT3_FS_SECURITY is not set |
| 2034 | CONFIG_EXT4_FS=m | 2090 | CONFIG_EXT4_FS=m |
| 2035 | # CONFIG_EXT4DEV_COMPAT is not set | ||
| 2036 | CONFIG_EXT4_FS_XATTR=y | 2091 | CONFIG_EXT4_FS_XATTR=y |
| 2037 | CONFIG_EXT4_FS_POSIX_ACL=y | 2092 | CONFIG_EXT4_FS_POSIX_ACL=y |
| 2038 | # CONFIG_EXT4_FS_SECURITY is not set | 2093 | # CONFIG_EXT4_FS_SECURITY is not set |
| 2094 | # CONFIG_EXT4_DEBUG is not set | ||
| 2039 | CONFIG_JBD=y | 2095 | CONFIG_JBD=y |
| 2040 | CONFIG_JBD2=m | 2096 | CONFIG_JBD2=m |
| 2041 | CONFIG_FS_MBCACHE=y | 2097 | CONFIG_FS_MBCACHE=y |
| 2042 | # CONFIG_REISERFS_FS is not set | 2098 | # CONFIG_REISERFS_FS is not set |
| 2043 | # CONFIG_JFS_FS is not set | 2099 | # CONFIG_JFS_FS is not set |
| 2044 | CONFIG_FS_POSIX_ACL=y | 2100 | CONFIG_FS_POSIX_ACL=y |
| 2045 | CONFIG_FILE_LOCKING=y | ||
| 2046 | # CONFIG_XFS_FS is not set | 2101 | # CONFIG_XFS_FS is not set |
| 2102 | # CONFIG_GFS2_FS is not set | ||
| 2047 | # CONFIG_OCFS2_FS is not set | 2103 | # CONFIG_OCFS2_FS is not set |
| 2048 | # CONFIG_BTRFS_FS is not set | 2104 | # CONFIG_BTRFS_FS is not set |
| 2105 | # CONFIG_NILFS2_FS is not set | ||
| 2106 | CONFIG_FILE_LOCKING=y | ||
| 2107 | CONFIG_FSNOTIFY=y | ||
| 2049 | CONFIG_DNOTIFY=y | 2108 | CONFIG_DNOTIFY=y |
| 2050 | CONFIG_INOTIFY=y | 2109 | CONFIG_INOTIFY=y |
| 2051 | CONFIG_INOTIFY_USER=y | 2110 | CONFIG_INOTIFY_USER=y |
| @@ -2053,6 +2112,7 @@ CONFIG_INOTIFY_USER=y | |||
| 2053 | CONFIG_AUTOFS_FS=m | 2112 | CONFIG_AUTOFS_FS=m |
| 2054 | CONFIG_AUTOFS4_FS=m | 2113 | CONFIG_AUTOFS4_FS=m |
| 2055 | CONFIG_FUSE_FS=m | 2114 | CONFIG_FUSE_FS=m |
| 2115 | # CONFIG_CUSE is not set | ||
| 2056 | CONFIG_GENERIC_ACL=y | 2116 | CONFIG_GENERIC_ACL=y |
| 2057 | 2117 | ||
| 2058 | # | 2118 | # |
| @@ -2111,6 +2171,7 @@ CONFIG_JFFS2_ZLIB=y | |||
| 2111 | # CONFIG_JFFS2_LZO is not set | 2171 | # CONFIG_JFFS2_LZO is not set |
| 2112 | CONFIG_JFFS2_RTIME=y | 2172 | CONFIG_JFFS2_RTIME=y |
| 2113 | # CONFIG_JFFS2_RUBIN is not set | 2173 | # CONFIG_JFFS2_RUBIN is not set |
| 2174 | # CONFIG_LOGFS is not set | ||
| 2114 | CONFIG_CRAMFS=y | 2175 | CONFIG_CRAMFS=y |
| 2115 | CONFIG_SQUASHFS=m | 2176 | CONFIG_SQUASHFS=m |
| 2116 | # CONFIG_SQUASHFS_EMBEDDED is not set | 2177 | # CONFIG_SQUASHFS_EMBEDDED is not set |
| @@ -2127,7 +2188,6 @@ CONFIG_ROMFS_BACKED_BY_BLOCK=y | |||
| 2127 | CONFIG_ROMFS_ON_BLOCK=y | 2188 | CONFIG_ROMFS_ON_BLOCK=y |
| 2128 | # CONFIG_SYSV_FS is not set | 2189 | # CONFIG_SYSV_FS is not set |
| 2129 | # CONFIG_UFS_FS is not set | 2190 | # CONFIG_UFS_FS is not set |
| 2130 | # CONFIG_NILFS2_FS is not set | ||
| 2131 | CONFIG_NETWORK_FILESYSTEMS=y | 2191 | CONFIG_NETWORK_FILESYSTEMS=y |
| 2132 | CONFIG_NFS_FS=y | 2192 | CONFIG_NFS_FS=y |
| 2133 | CONFIG_NFS_V3=y | 2193 | CONFIG_NFS_V3=y |
| @@ -2149,6 +2209,7 @@ CONFIG_SUNRPC_GSS=m | |||
| 2149 | CONFIG_RPCSEC_GSS_KRB5=m | 2209 | CONFIG_RPCSEC_GSS_KRB5=m |
| 2150 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | 2210 | # CONFIG_RPCSEC_GSS_SPKM3 is not set |
| 2151 | # CONFIG_SMB_FS is not set | 2211 | # CONFIG_SMB_FS is not set |
| 2212 | # CONFIG_CEPH_FS is not set | ||
| 2152 | CONFIG_CIFS=m | 2213 | CONFIG_CIFS=m |
| 2153 | # CONFIG_CIFS_STATS is not set | 2214 | # CONFIG_CIFS_STATS is not set |
| 2154 | # CONFIG_CIFS_WEAK_PW_HASH is not set | 2215 | # CONFIG_CIFS_WEAK_PW_HASH is not set |
| @@ -2230,6 +2291,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y | |||
| 2230 | CONFIG_ENABLE_MUST_CHECK=y | 2291 | CONFIG_ENABLE_MUST_CHECK=y |
| 2231 | CONFIG_FRAME_WARN=1024 | 2292 | CONFIG_FRAME_WARN=1024 |
| 2232 | CONFIG_MAGIC_SYSRQ=y | 2293 | CONFIG_MAGIC_SYSRQ=y |
| 2294 | # CONFIG_STRIP_ASM_SYMS is not set | ||
| 2233 | # CONFIG_UNUSED_SYMBOLS is not set | 2295 | # CONFIG_UNUSED_SYMBOLS is not set |
| 2234 | # CONFIG_DEBUG_FS is not set | 2296 | # CONFIG_DEBUG_FS is not set |
| 2235 | # CONFIG_HEADERS_CHECK is not set | 2297 | # CONFIG_HEADERS_CHECK is not set |
| @@ -2246,6 +2308,7 @@ CONFIG_SCHED_DEBUG=y | |||
| 2246 | # CONFIG_TIMER_STATS is not set | 2308 | # CONFIG_TIMER_STATS is not set |
| 2247 | # CONFIG_DEBUG_OBJECTS is not set | 2309 | # CONFIG_DEBUG_OBJECTS is not set |
| 2248 | # CONFIG_DEBUG_SLAB is not set | 2310 | # CONFIG_DEBUG_SLAB is not set |
| 2311 | # CONFIG_DEBUG_KMEMLEAK is not set | ||
| 2249 | # CONFIG_DEBUG_RT_MUTEXES is not set | 2312 | # CONFIG_DEBUG_RT_MUTEXES is not set |
| 2250 | # CONFIG_RT_MUTEX_TESTER is not set | 2313 | # CONFIG_RT_MUTEX_TESTER is not set |
| 2251 | # CONFIG_DEBUG_SPINLOCK is not set | 2314 | # CONFIG_DEBUG_SPINLOCK is not set |
| @@ -2264,32 +2327,34 @@ CONFIG_DEBUG_MEMORY_INIT=y | |||
| 2264 | # CONFIG_DEBUG_LIST is not set | 2327 | # CONFIG_DEBUG_LIST is not set |
| 2265 | # CONFIG_DEBUG_SG is not set | 2328 | # CONFIG_DEBUG_SG is not set |
| 2266 | # CONFIG_DEBUG_NOTIFIERS is not set | 2329 | # CONFIG_DEBUG_NOTIFIERS is not set |
| 2330 | # CONFIG_DEBUG_CREDENTIALS is not set | ||
| 2267 | CONFIG_FRAME_POINTER=y | 2331 | CONFIG_FRAME_POINTER=y |
| 2268 | # CONFIG_BOOT_PRINTK_DELAY is not set | 2332 | # CONFIG_BOOT_PRINTK_DELAY is not set |
| 2269 | # CONFIG_RCU_TORTURE_TEST is not set | 2333 | # CONFIG_RCU_TORTURE_TEST is not set |
| 2270 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | 2334 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set |
| 2271 | # CONFIG_BACKTRACE_SELF_TEST is not set | 2335 | # CONFIG_BACKTRACE_SELF_TEST is not set |
| 2272 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | 2336 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set |
| 2337 | # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set | ||
| 2273 | # CONFIG_FAULT_INJECTION is not set | 2338 | # CONFIG_FAULT_INJECTION is not set |
| 2274 | # CONFIG_LATENCYTOP is not set | 2339 | # CONFIG_LATENCYTOP is not set |
| 2275 | CONFIG_SYSCTL_SYSCALL_CHECK=y | 2340 | CONFIG_SYSCTL_SYSCALL_CHECK=y |
| 2276 | # CONFIG_PAGE_POISONING is not set | 2341 | # CONFIG_PAGE_POISONING is not set |
| 2277 | CONFIG_HAVE_FUNCTION_TRACER=y | 2342 | CONFIG_HAVE_FUNCTION_TRACER=y |
| 2278 | CONFIG_TRACING_SUPPORT=y | 2343 | CONFIG_TRACING_SUPPORT=y |
| 2279 | 2344 | CONFIG_FTRACE=y | |
| 2280 | # | ||
| 2281 | # Tracers | ||
| 2282 | # | ||
| 2283 | # CONFIG_FUNCTION_TRACER is not set | 2345 | # CONFIG_FUNCTION_TRACER is not set |
| 2346 | # CONFIG_IRQSOFF_TRACER is not set | ||
| 2284 | # CONFIG_SCHED_TRACER is not set | 2347 | # CONFIG_SCHED_TRACER is not set |
| 2285 | # CONFIG_CONTEXT_SWITCH_TRACER is not set | 2348 | # CONFIG_ENABLE_DEFAULT_TRACERS is not set |
| 2286 | # CONFIG_EVENT_TRACER is not set | ||
| 2287 | # CONFIG_BOOT_TRACER is not set | 2349 | # CONFIG_BOOT_TRACER is not set |
| 2288 | # CONFIG_TRACE_BRANCH_PROFILING is not set | 2350 | CONFIG_BRANCH_PROFILE_NONE=y |
| 2351 | # CONFIG_PROFILE_ANNOTATED_BRANCHES is not set | ||
| 2352 | # CONFIG_PROFILE_ALL_BRANCHES is not set | ||
| 2289 | # CONFIG_STACK_TRACER is not set | 2353 | # CONFIG_STACK_TRACER is not set |
| 2290 | # CONFIG_KMEMTRACE is not set | 2354 | # CONFIG_KMEMTRACE is not set |
| 2291 | # CONFIG_WORKQUEUE_TRACER is not set | 2355 | # CONFIG_WORKQUEUE_TRACER is not set |
| 2292 | # CONFIG_BLK_DEV_IO_TRACE is not set | 2356 | # CONFIG_BLK_DEV_IO_TRACE is not set |
| 2357 | # CONFIG_ATOMIC64_SELFTEST is not set | ||
| 2293 | # CONFIG_SAMPLES is not set | 2358 | # CONFIG_SAMPLES is not set |
| 2294 | CONFIG_HAVE_ARCH_KGDB=y | 2359 | CONFIG_HAVE_ARCH_KGDB=y |
| 2295 | # CONFIG_KGDB is not set | 2360 | # CONFIG_KGDB is not set |
| @@ -2297,7 +2362,9 @@ CONFIG_DEBUG_USER=y | |||
| 2297 | CONFIG_DEBUG_ERRORS=y | 2362 | CONFIG_DEBUG_ERRORS=y |
| 2298 | # CONFIG_DEBUG_STACK_USAGE is not set | 2363 | # CONFIG_DEBUG_STACK_USAGE is not set |
| 2299 | CONFIG_DEBUG_LL=y | 2364 | CONFIG_DEBUG_LL=y |
| 2365 | # CONFIG_EARLY_PRINTK is not set | ||
| 2300 | # CONFIG_DEBUG_ICEDCC is not set | 2366 | # CONFIG_DEBUG_ICEDCC is not set |
| 2367 | # CONFIG_OC_ETM is not set | ||
| 2301 | CONFIG_DEBUG_S3C_UART=0 | 2368 | CONFIG_DEBUG_S3C_UART=0 |
| 2302 | 2369 | ||
| 2303 | # | 2370 | # |
| @@ -2306,13 +2373,16 @@ CONFIG_DEBUG_S3C_UART=0 | |||
| 2306 | # CONFIG_KEYS is not set | 2373 | # CONFIG_KEYS is not set |
| 2307 | # CONFIG_SECURITY is not set | 2374 | # CONFIG_SECURITY is not set |
| 2308 | # CONFIG_SECURITYFS is not set | 2375 | # CONFIG_SECURITYFS is not set |
| 2309 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | 2376 | # CONFIG_DEFAULT_SECURITY_SELINUX is not set |
| 2377 | # CONFIG_DEFAULT_SECURITY_SMACK is not set | ||
| 2378 | # CONFIG_DEFAULT_SECURITY_TOMOYO is not set | ||
| 2379 | CONFIG_DEFAULT_SECURITY_DAC=y | ||
| 2380 | CONFIG_DEFAULT_SECURITY="" | ||
| 2310 | CONFIG_CRYPTO=y | 2381 | CONFIG_CRYPTO=y |
| 2311 | 2382 | ||
| 2312 | # | 2383 | # |
| 2313 | # Crypto core or helper | 2384 | # Crypto core or helper |
| 2314 | # | 2385 | # |
| 2315 | # CONFIG_CRYPTO_FIPS is not set | ||
| 2316 | CONFIG_CRYPTO_ALGAPI=m | 2386 | CONFIG_CRYPTO_ALGAPI=m |
| 2317 | CONFIG_CRYPTO_ALGAPI2=m | 2387 | CONFIG_CRYPTO_ALGAPI2=m |
| 2318 | CONFIG_CRYPTO_AEAD=m | 2388 | CONFIG_CRYPTO_AEAD=m |
| @@ -2355,11 +2425,13 @@ CONFIG_CRYPTO_ECB=m | |||
| 2355 | # | 2425 | # |
| 2356 | CONFIG_CRYPTO_HMAC=m | 2426 | CONFIG_CRYPTO_HMAC=m |
| 2357 | # CONFIG_CRYPTO_XCBC is not set | 2427 | # CONFIG_CRYPTO_XCBC is not set |
| 2428 | # CONFIG_CRYPTO_VMAC is not set | ||
| 2358 | 2429 | ||
| 2359 | # | 2430 | # |
| 2360 | # Digest | 2431 | # Digest |
| 2361 | # | 2432 | # |
| 2362 | CONFIG_CRYPTO_CRC32C=m | 2433 | CONFIG_CRYPTO_CRC32C=m |
| 2434 | # CONFIG_CRYPTO_GHASH is not set | ||
| 2363 | # CONFIG_CRYPTO_MD4 is not set | 2435 | # CONFIG_CRYPTO_MD4 is not set |
| 2364 | CONFIG_CRYPTO_MD5=m | 2436 | CONFIG_CRYPTO_MD5=m |
| 2365 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | 2437 | # CONFIG_CRYPTO_MICHAEL_MIC is not set |
| @@ -2420,9 +2492,11 @@ CONFIG_CRC7=m | |||
| 2420 | CONFIG_LIBCRC32C=m | 2492 | CONFIG_LIBCRC32C=m |
| 2421 | CONFIG_ZLIB_INFLATE=y | 2493 | CONFIG_ZLIB_INFLATE=y |
| 2422 | CONFIG_ZLIB_DEFLATE=y | 2494 | CONFIG_ZLIB_DEFLATE=y |
| 2495 | CONFIG_LZO_DECOMPRESS=y | ||
| 2423 | CONFIG_DECOMPRESS_GZIP=y | 2496 | CONFIG_DECOMPRESS_GZIP=y |
| 2424 | CONFIG_DECOMPRESS_BZIP2=y | 2497 | CONFIG_DECOMPRESS_BZIP2=y |
| 2425 | CONFIG_DECOMPRESS_LZMA=y | 2498 | CONFIG_DECOMPRESS_LZMA=y |
| 2499 | CONFIG_DECOMPRESS_LZO=y | ||
| 2426 | CONFIG_TEXTSEARCH=y | 2500 | CONFIG_TEXTSEARCH=y |
| 2427 | CONFIG_TEXTSEARCH_KMP=m | 2501 | CONFIG_TEXTSEARCH_KMP=m |
| 2428 | CONFIG_TEXTSEARCH_BM=m | 2502 | CONFIG_TEXTSEARCH_BM=m |
| @@ -2430,3 +2504,4 @@ CONFIG_TEXTSEARCH_FSM=m | |||
| 2430 | CONFIG_HAS_IOMEM=y | 2504 | CONFIG_HAS_IOMEM=y |
| 2431 | CONFIG_HAS_DMA=y | 2505 | CONFIG_HAS_DMA=y |
| 2432 | CONFIG_NLATTR=y | 2506 | CONFIG_NLATTR=y |
| 2507 | CONFIG_GENERIC_ATOMIC64=y | ||
diff --git a/arch/arm/configs/s3c6400_defconfig b/arch/arm/configs/s3c6400_defconfig index 5e7d4c1b8fc1..2b642386f030 100644 --- a/arch/arm/configs/s3c6400_defconfig +++ b/arch/arm/configs/s3c6400_defconfig | |||
| @@ -1,11 +1,15 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.33-rc4 | 3 | # Linux kernel version: 2.6.34 |
| 4 | # Tue Jan 19 13:12:40 2010 | 4 | # Fri May 28 19:05:39 2010 |
| 5 | # | 5 | # |
| 6 | CONFIG_ARM=y | 6 | CONFIG_ARM=y |
| 7 | CONFIG_HAVE_PWM=y | ||
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | 8 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y |
| 8 | CONFIG_GENERIC_GPIO=y | 9 | CONFIG_GENERIC_GPIO=y |
| 10 | CONFIG_GENERIC_TIME=y | ||
| 11 | CONFIG_ARCH_USES_GETTIMEOFFSET=y | ||
| 12 | CONFIG_HAVE_PROC_CPU=y | ||
| 9 | CONFIG_NO_IOPORT=y | 13 | CONFIG_NO_IOPORT=y |
| 10 | CONFIG_GENERIC_HARDIRQS=y | 14 | CONFIG_GENERIC_HARDIRQS=y |
| 11 | CONFIG_STACKTRACE_SUPPORT=y | 15 | CONFIG_STACKTRACE_SUPPORT=y |
| @@ -18,6 +22,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y | |||
| 18 | CONFIG_ARCH_HAS_CPUFREQ=y | 22 | CONFIG_ARCH_HAS_CPUFREQ=y |
| 19 | CONFIG_GENERIC_HWEIGHT=y | 23 | CONFIG_GENERIC_HWEIGHT=y |
| 20 | CONFIG_GENERIC_CALIBRATE_DELAY=y | 24 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
| 25 | CONFIG_NEED_DMA_MAP_STATE=y | ||
| 21 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | 26 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y |
| 22 | CONFIG_VECTORS_BASE=0xffff0000 | 27 | CONFIG_VECTORS_BASE=0xffff0000 |
| 23 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | 28 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" |
| @@ -32,6 +37,7 @@ CONFIG_INIT_ENV_ARG_LIMIT=32 | |||
| 32 | CONFIG_LOCALVERSION="" | 37 | CONFIG_LOCALVERSION="" |
| 33 | CONFIG_LOCALVERSION_AUTO=y | 38 | CONFIG_LOCALVERSION_AUTO=y |
| 34 | CONFIG_HAVE_KERNEL_GZIP=y | 39 | CONFIG_HAVE_KERNEL_GZIP=y |
| 40 | CONFIG_HAVE_KERNEL_LZMA=y | ||
| 35 | CONFIG_HAVE_KERNEL_LZO=y | 41 | CONFIG_HAVE_KERNEL_LZO=y |
| 36 | CONFIG_KERNEL_GZIP=y | 42 | CONFIG_KERNEL_GZIP=y |
| 37 | # CONFIG_KERNEL_BZIP2 is not set | 43 | # CONFIG_KERNEL_BZIP2 is not set |
| @@ -53,7 +59,6 @@ CONFIG_RCU_FANOUT=32 | |||
| 53 | # CONFIG_TREE_RCU_TRACE is not set | 59 | # CONFIG_TREE_RCU_TRACE is not set |
| 54 | # CONFIG_IKCONFIG is not set | 60 | # CONFIG_IKCONFIG is not set |
| 55 | CONFIG_LOG_BUF_SHIFT=17 | 61 | CONFIG_LOG_BUF_SHIFT=17 |
| 56 | # CONFIG_GROUP_SCHED is not set | ||
| 57 | # CONFIG_CGROUPS is not set | 62 | # CONFIG_CGROUPS is not set |
| 58 | CONFIG_SYSFS_DEPRECATED=y | 63 | CONFIG_SYSFS_DEPRECATED=y |
| 59 | CONFIG_SYSFS_DEPRECATED_V2=y | 64 | CONFIG_SYSFS_DEPRECATED_V2=y |
| @@ -89,10 +94,14 @@ CONFIG_TIMERFD=y | |||
| 89 | CONFIG_EVENTFD=y | 94 | CONFIG_EVENTFD=y |
| 90 | CONFIG_SHMEM=y | 95 | CONFIG_SHMEM=y |
| 91 | CONFIG_AIO=y | 96 | CONFIG_AIO=y |
| 97 | CONFIG_HAVE_PERF_EVENTS=y | ||
| 98 | CONFIG_PERF_USE_VMALLOC=y | ||
| 92 | 99 | ||
| 93 | # | 100 | # |
| 94 | # Kernel Performance Events And Counters | 101 | # Kernel Performance Events And Counters |
| 95 | # | 102 | # |
| 103 | # CONFIG_PERF_EVENTS is not set | ||
| 104 | # CONFIG_PERF_COUNTERS is not set | ||
| 96 | CONFIG_VM_EVENT_COUNTERS=y | 105 | CONFIG_VM_EVENT_COUNTERS=y |
| 97 | CONFIG_SLUB_DEBUG=y | 106 | CONFIG_SLUB_DEBUG=y |
| 98 | CONFIG_COMPAT_BRK=y | 107 | CONFIG_COMPAT_BRK=y |
| @@ -164,7 +173,7 @@ CONFIG_DEFAULT_IOSCHED="cfq" | |||
| 164 | # CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set | 173 | # CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set |
| 165 | # CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set | 174 | # CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set |
| 166 | # CONFIG_MUTEX_SPIN_ON_OWNER is not set | 175 | # CONFIG_MUTEX_SPIN_ON_OWNER is not set |
| 167 | # CONFIG_FREEZER is not set | 176 | CONFIG_FREEZER=y |
| 168 | 177 | ||
| 169 | # | 178 | # |
| 170 | # System Type | 179 | # System Type |
| @@ -174,8 +183,11 @@ CONFIG_MMU=y | |||
| 174 | # CONFIG_ARCH_INTEGRATOR is not set | 183 | # CONFIG_ARCH_INTEGRATOR is not set |
| 175 | # CONFIG_ARCH_REALVIEW is not set | 184 | # CONFIG_ARCH_REALVIEW is not set |
| 176 | # CONFIG_ARCH_VERSATILE is not set | 185 | # CONFIG_ARCH_VERSATILE is not set |
| 186 | # CONFIG_ARCH_VEXPRESS is not set | ||
| 177 | # CONFIG_ARCH_AT91 is not set | 187 | # CONFIG_ARCH_AT91 is not set |
| 188 | # CONFIG_ARCH_BCMRING is not set | ||
| 178 | # CONFIG_ARCH_CLPS711X is not set | 189 | # CONFIG_ARCH_CLPS711X is not set |
| 190 | # CONFIG_ARCH_CNS3XXX is not set | ||
| 179 | # CONFIG_ARCH_GEMINI is not set | 191 | # CONFIG_ARCH_GEMINI is not set |
| 180 | # CONFIG_ARCH_EBSA110 is not set | 192 | # CONFIG_ARCH_EBSA110 is not set |
| 181 | # CONFIG_ARCH_EP93XX is not set | 193 | # CONFIG_ARCH_EP93XX is not set |
| @@ -184,7 +196,6 @@ CONFIG_MMU=y | |||
| 184 | # CONFIG_ARCH_STMP3XXX is not set | 196 | # CONFIG_ARCH_STMP3XXX is not set |
| 185 | # CONFIG_ARCH_NETX is not set | 197 | # CONFIG_ARCH_NETX is not set |
| 186 | # CONFIG_ARCH_H720X is not set | 198 | # CONFIG_ARCH_H720X is not set |
| 187 | # CONFIG_ARCH_NOMADIK is not set | ||
| 188 | # CONFIG_ARCH_IOP13XX is not set | 199 | # CONFIG_ARCH_IOP13XX is not set |
| 189 | # CONFIG_ARCH_IOP32X is not set | 200 | # CONFIG_ARCH_IOP32X is not set |
| 190 | # CONFIG_ARCH_IOP33X is not set | 201 | # CONFIG_ARCH_IOP33X is not set |
| @@ -201,70 +212,89 @@ CONFIG_MMU=y | |||
| 201 | # CONFIG_ARCH_KS8695 is not set | 212 | # CONFIG_ARCH_KS8695 is not set |
| 202 | # CONFIG_ARCH_NS9XXX is not set | 213 | # CONFIG_ARCH_NS9XXX is not set |
| 203 | # CONFIG_ARCH_W90X900 is not set | 214 | # CONFIG_ARCH_W90X900 is not set |
| 215 | # CONFIG_ARCH_NUC93X is not set | ||
| 204 | # CONFIG_ARCH_PNX4008 is not set | 216 | # CONFIG_ARCH_PNX4008 is not set |
| 205 | # CONFIG_ARCH_PXA is not set | 217 | # CONFIG_ARCH_PXA is not set |
| 206 | # CONFIG_ARCH_MSM is not set | 218 | # CONFIG_ARCH_MSM is not set |
| 219 | # CONFIG_ARCH_SHMOBILE is not set | ||
| 207 | # CONFIG_ARCH_RPC is not set | 220 | # CONFIG_ARCH_RPC is not set |
| 208 | # CONFIG_ARCH_SA1100 is not set | 221 | # CONFIG_ARCH_SA1100 is not set |
| 209 | # CONFIG_ARCH_S3C2410 is not set | 222 | # CONFIG_ARCH_S3C2410 is not set |
| 210 | CONFIG_ARCH_S3C64XX=y | 223 | CONFIG_ARCH_S3C64XX=y |
| 211 | # CONFIG_ARCH_S5P6440 is not set | 224 | # CONFIG_ARCH_S5P6440 is not set |
| 212 | # CONFIG_ARCH_S5PC1XX is not set | 225 | # CONFIG_ARCH_S5P6442 is not set |
| 226 | # CONFIG_ARCH_S5PC100 is not set | ||
| 227 | # CONFIG_ARCH_S5PV210 is not set | ||
| 213 | # CONFIG_ARCH_SHARK is not set | 228 | # CONFIG_ARCH_SHARK is not set |
| 214 | # CONFIG_ARCH_LH7A40X is not set | 229 | # CONFIG_ARCH_LH7A40X is not set |
| 215 | # CONFIG_ARCH_U300 is not set | 230 | # CONFIG_ARCH_U300 is not set |
| 231 | # CONFIG_ARCH_U8500 is not set | ||
| 232 | # CONFIG_ARCH_NOMADIK is not set | ||
| 216 | # CONFIG_ARCH_DAVINCI is not set | 233 | # CONFIG_ARCH_DAVINCI is not set |
| 217 | # CONFIG_ARCH_OMAP is not set | 234 | # CONFIG_ARCH_OMAP is not set |
| 218 | # CONFIG_ARCH_BCMRING is not set | 235 | # CONFIG_PLAT_SPEAR is not set |
| 219 | # CONFIG_ARCH_U8500 is not set | ||
| 220 | CONFIG_PLAT_SAMSUNG=y | 236 | CONFIG_PLAT_SAMSUNG=y |
| 237 | |||
| 238 | # | ||
| 239 | # Boot options | ||
| 240 | # | ||
| 241 | CONFIG_S3C_BOOT_ERROR_RESET=y | ||
| 242 | CONFIG_S3C_BOOT_UART_FORCE_FIFO=y | ||
| 243 | CONFIG_S3C_LOWLEVEL_UART_PORT=0 | ||
| 221 | CONFIG_SAMSUNG_CLKSRC=y | 244 | CONFIG_SAMSUNG_CLKSRC=y |
| 222 | CONFIG_SAMSUNG_IRQ_VIC_TIMER=y | 245 | CONFIG_SAMSUNG_IRQ_VIC_TIMER=y |
| 223 | CONFIG_SAMSUNG_IRQ_UART=y | 246 | CONFIG_SAMSUNG_IRQ_UART=y |
| 247 | CONFIG_SAMSUNG_GPIOLIB_4BIT=y | ||
| 224 | CONFIG_S3C_GPIO_CFG_S3C24XX=y | 248 | CONFIG_S3C_GPIO_CFG_S3C24XX=y |
| 225 | CONFIG_S3C_GPIO_CFG_S3C64XX=y | 249 | CONFIG_S3C_GPIO_CFG_S3C64XX=y |
| 226 | CONFIG_S3C_GPIO_PULL_UPDOWN=y | 250 | CONFIG_S3C_GPIO_PULL_UPDOWN=y |
| 227 | CONFIG_SAMSUNG_GPIO_EXTRA=0 | 251 | CONFIG_SAMSUNG_GPIO_EXTRA=0 |
| 252 | CONFIG_S3C_GPIO_SPACE=0 | ||
| 253 | CONFIG_S3C_GPIO_TRACK=y | ||
| 228 | # CONFIG_S3C_ADC is not set | 254 | # CONFIG_S3C_ADC is not set |
| 229 | CONFIG_S3C_DEV_HSMMC=y | 255 | CONFIG_S3C_DEV_HSMMC=y |
| 230 | CONFIG_S3C_DEV_HSMMC1=y | 256 | CONFIG_S3C_DEV_HSMMC1=y |
| 257 | CONFIG_S3C_DEV_HSMMC2=y | ||
| 258 | CONFIG_S3C_DEV_HWMON=y | ||
| 231 | CONFIG_S3C_DEV_I2C1=y | 259 | CONFIG_S3C_DEV_I2C1=y |
| 232 | CONFIG_S3C_DEV_FB=y | 260 | CONFIG_S3C_DEV_FB=y |
| 233 | CONFIG_S3C_DEV_USB_HOST=y | 261 | CONFIG_S3C_DEV_USB_HOST=y |
| 234 | CONFIG_S3C_DEV_USB_HSOTG=y | 262 | CONFIG_S3C_DEV_USB_HSOTG=y |
| 263 | CONFIG_S3C_DEV_WDT=y | ||
| 235 | CONFIG_S3C_DEV_NAND=y | 264 | CONFIG_S3C_DEV_NAND=y |
| 236 | CONFIG_PLAT_S3C64XX=y | 265 | CONFIG_S3C_DEV_RTC=y |
| 237 | CONFIG_CPU_S3C6400_INIT=y | 266 | CONFIG_SAMSUNG_DEV_ADC=y |
| 238 | CONFIG_CPU_S3C6400_CLOCK=y | 267 | CONFIG_SAMSUNG_DEV_TS=y |
| 239 | # CONFIG_S3C64XX_DMA is not set | 268 | CONFIG_S3C_DMA=y |
| 240 | CONFIG_S3C64XX_SETUP_I2C0=y | ||
| 241 | CONFIG_S3C64XX_SETUP_I2C1=y | ||
| 242 | CONFIG_S3C64XX_SETUP_FB_24BPP=y | ||
| 243 | CONFIG_S3C64XX_SETUP_SDHCI_GPIO=y | ||
| 244 | CONFIG_PLAT_S3C=y | ||
| 245 | |||
| 246 | # | ||
| 247 | # Boot options | ||
| 248 | # | ||
| 249 | CONFIG_S3C_BOOT_ERROR_RESET=y | ||
| 250 | CONFIG_S3C_BOOT_UART_FORCE_FIFO=y | ||
| 251 | 269 | ||
| 252 | # | 270 | # |
| 253 | # Power management | 271 | # Power management |
| 254 | # | 272 | # |
| 255 | CONFIG_S3C_LOWLEVEL_UART_PORT=0 | 273 | # CONFIG_SAMSUNG_PM_DEBUG is not set |
| 256 | CONFIG_S3C_GPIO_SPACE=0 | 274 | # CONFIG_S3C_PM_DEBUG_LED_SMDK is not set |
| 257 | CONFIG_S3C_GPIO_TRACK=y | 275 | # CONFIG_SAMSUNG_PM_CHECK is not set |
| 258 | # CONFIG_MACH_SMDK6400 is not set | 276 | CONFIG_SAMSUNG_WAKEMASK=y |
| 277 | CONFIG_PLAT_S3C64XX=y | ||
| 278 | CONFIG_CPU_S3C6400=y | ||
| 259 | CONFIG_CPU_S3C6410=y | 279 | CONFIG_CPU_S3C6410=y |
| 260 | CONFIG_S3C6410_SETUP_SDHCI=y | 280 | CONFIG_S3C64XX_DMA=y |
| 261 | # CONFIG_MACH_ANW6410 is not set | 281 | CONFIG_S3C64XX_SETUP_SDHCI=y |
| 282 | CONFIG_S3C64XX_SETUP_I2C0=y | ||
| 283 | CONFIG_S3C64XX_SETUP_I2C1=y | ||
| 284 | CONFIG_S3C64XX_SETUP_FB_24BPP=y | ||
| 285 | CONFIG_S3C64XX_SETUP_SDHCI_GPIO=y | ||
| 286 | CONFIG_MACH_SMDK6400=y | ||
| 287 | CONFIG_MACH_ANW6410=y | ||
| 262 | CONFIG_MACH_SMDK6410=y | 288 | CONFIG_MACH_SMDK6410=y |
| 263 | CONFIG_SMDK6410_SD_CH0=y | 289 | CONFIG_SMDK6410_SD_CH0=y |
| 264 | # CONFIG_SMDK6410_SD_CH1 is not set | 290 | # CONFIG_SMDK6410_SD_CH1 is not set |
| 265 | # CONFIG_SMDK6410_WM1190_EV1 is not set | 291 | # CONFIG_SMDK6410_WM1190_EV1 is not set |
| 266 | # CONFIG_MACH_NCP is not set | 292 | # CONFIG_SMDK6410_WM1192_EV1 is not set |
| 267 | # CONFIG_MACH_HMT is not set | 293 | CONFIG_MACH_NCP=y |
| 294 | CONFIG_MACH_HMT=y | ||
| 295 | CONFIG_MACH_SMARTQ=y | ||
| 296 | CONFIG_MACH_SMARTQ5=y | ||
| 297 | CONFIG_MACH_SMARTQ7=y | ||
| 268 | 298 | ||
| 269 | # | 299 | # |
| 270 | # Processor Type | 300 | # Processor Type |
| @@ -290,6 +320,8 @@ CONFIG_ARM_THUMB=y | |||
| 290 | # CONFIG_CPU_DCACHE_DISABLE is not set | 320 | # CONFIG_CPU_DCACHE_DISABLE is not set |
| 291 | # CONFIG_CPU_BPREDICT_DISABLE is not set | 321 | # CONFIG_CPU_BPREDICT_DISABLE is not set |
| 292 | CONFIG_ARM_L1_CACHE_SHIFT=5 | 322 | CONFIG_ARM_L1_CACHE_SHIFT=5 |
| 323 | CONFIG_ARM_DMA_MEM_BUFFERABLE=y | ||
| 324 | CONFIG_CPU_HAS_PMU=y | ||
| 293 | # CONFIG_ARM_ERRATA_411920 is not set | 325 | # CONFIG_ARM_ERRATA_411920 is not set |
| 294 | CONFIG_ARM_VIC=y | 326 | CONFIG_ARM_VIC=y |
| 295 | CONFIG_ARM_VIC_NR=2 | 327 | CONFIG_ARM_VIC_NR=2 |
| @@ -339,6 +371,7 @@ CONFIG_ALIGNMENT_TRAP=y | |||
| 339 | CONFIG_ZBOOT_ROM_TEXT=0 | 371 | CONFIG_ZBOOT_ROM_TEXT=0 |
| 340 | CONFIG_ZBOOT_ROM_BSS=0 | 372 | CONFIG_ZBOOT_ROM_BSS=0 |
| 341 | CONFIG_CMDLINE="console=ttySAC0,115200 root=/dev/ram init=/linuxrc initrd=0x51000000,6M ramdisk_size=6144" | 373 | CONFIG_CMDLINE="console=ttySAC0,115200 root=/dev/ram init=/linuxrc initrd=0x51000000,6M ramdisk_size=6144" |
| 374 | # CONFIG_CMDLINE_FORCE is not set | ||
| 342 | # CONFIG_XIP_KERNEL is not set | 375 | # CONFIG_XIP_KERNEL is not set |
| 343 | # CONFIG_KEXEC is not set | 376 | # CONFIG_KEXEC is not set |
| 344 | 377 | ||
| @@ -371,7 +404,14 @@ CONFIG_HAVE_AOUT=y | |||
| 371 | # | 404 | # |
| 372 | # Power management options | 405 | # Power management options |
| 373 | # | 406 | # |
| 374 | # CONFIG_PM is not set | 407 | CONFIG_PM=y |
| 408 | # CONFIG_PM_DEBUG is not set | ||
| 409 | CONFIG_PM_SLEEP=y | ||
| 410 | CONFIG_SUSPEND=y | ||
| 411 | CONFIG_SUSPEND_FREEZER=y | ||
| 412 | # CONFIG_APM_EMULATION is not set | ||
| 413 | # CONFIG_PM_RUNTIME is not set | ||
| 414 | CONFIG_PM_OPS=y | ||
| 375 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | 415 | CONFIG_ARCH_SUSPEND_POSSIBLE=y |
| 376 | # CONFIG_NET is not set | 416 | # CONFIG_NET is not set |
| 377 | 417 | ||
| @@ -392,7 +432,96 @@ CONFIG_EXTRA_FIRMWARE="" | |||
| 392 | # CONFIG_DEBUG_DRIVER is not set | 432 | # CONFIG_DEBUG_DRIVER is not set |
| 393 | # CONFIG_DEBUG_DEVRES is not set | 433 | # CONFIG_DEBUG_DEVRES is not set |
| 394 | # CONFIG_SYS_HYPERVISOR is not set | 434 | # CONFIG_SYS_HYPERVISOR is not set |
| 395 | # CONFIG_MTD is not set | 435 | CONFIG_MTD=y |
| 436 | # CONFIG_MTD_DEBUG is not set | ||
| 437 | # CONFIG_MTD_TESTS is not set | ||
| 438 | # CONFIG_MTD_CONCAT is not set | ||
| 439 | # CONFIG_MTD_PARTITIONS is not set | ||
| 440 | |||
| 441 | # | ||
| 442 | # User Modules And Translation Layers | ||
| 443 | # | ||
| 444 | # CONFIG_MTD_CHAR is not set | ||
| 445 | # CONFIG_MTD_BLKDEVS is not set | ||
| 446 | # CONFIG_MTD_BLOCK is not set | ||
| 447 | # CONFIG_MTD_BLOCK_RO is not set | ||
| 448 | # CONFIG_FTL is not set | ||
| 449 | # CONFIG_NFTL is not set | ||
| 450 | # CONFIG_INFTL is not set | ||
| 451 | # CONFIG_RFD_FTL is not set | ||
| 452 | # CONFIG_SSFDC is not set | ||
| 453 | # CONFIG_SM_FTL is not set | ||
| 454 | # CONFIG_MTD_OOPS is not set | ||
| 455 | |||
| 456 | # | ||
| 457 | # RAM/ROM/Flash chip drivers | ||
| 458 | # | ||
| 459 | # CONFIG_MTD_CFI is not set | ||
| 460 | # CONFIG_MTD_JEDECPROBE is not set | ||
| 461 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
| 462 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
| 463 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
| 464 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
| 465 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
| 466 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
| 467 | CONFIG_MTD_CFI_I1=y | ||
| 468 | CONFIG_MTD_CFI_I2=y | ||
| 469 | # CONFIG_MTD_CFI_I4 is not set | ||
| 470 | # CONFIG_MTD_CFI_I8 is not set | ||
| 471 | # CONFIG_MTD_RAM is not set | ||
| 472 | # CONFIG_MTD_ROM is not set | ||
| 473 | # CONFIG_MTD_ABSENT is not set | ||
| 474 | |||
| 475 | # | ||
| 476 | # Mapping drivers for chip access | ||
| 477 | # | ||
| 478 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
| 479 | # CONFIG_MTD_PLATRAM is not set | ||
| 480 | |||
| 481 | # | ||
| 482 | # Self-contained MTD device drivers | ||
| 483 | # | ||
| 484 | # CONFIG_MTD_DATAFLASH is not set | ||
| 485 | # CONFIG_MTD_M25P80 is not set | ||
| 486 | # CONFIG_MTD_SST25L is not set | ||
| 487 | # CONFIG_MTD_SLRAM is not set | ||
| 488 | # CONFIG_MTD_PHRAM is not set | ||
| 489 | # CONFIG_MTD_MTDRAM is not set | ||
| 490 | # CONFIG_MTD_BLOCK2MTD is not set | ||
| 491 | |||
| 492 | # | ||
| 493 | # Disk-On-Chip Device Drivers | ||
| 494 | # | ||
| 495 | # CONFIG_MTD_DOC2000 is not set | ||
| 496 | # CONFIG_MTD_DOC2001 is not set | ||
| 497 | # CONFIG_MTD_DOC2001PLUS is not set | ||
| 498 | CONFIG_MTD_NAND=y | ||
| 499 | CONFIG_MTD_NAND_ECC=y | ||
| 500 | # CONFIG_MTD_NAND_ECC_SMC is not set | ||
| 501 | # CONFIG_MTD_NAND_VERIFY_WRITE is not set | ||
| 502 | # CONFIG_MTD_SM_COMMON is not set | ||
| 503 | # CONFIG_MTD_NAND_MUSEUM_IDS is not set | ||
| 504 | CONFIG_MTD_NAND_DENALI_SCRATCH_REG_ADDR=0xFF108018 | ||
| 505 | # CONFIG_MTD_NAND_GPIO is not set | ||
| 506 | CONFIG_MTD_NAND_IDS=y | ||
| 507 | CONFIG_MTD_NAND_S3C2410=y | ||
| 508 | # CONFIG_MTD_NAND_S3C2410_DEBUG is not set | ||
| 509 | # CONFIG_MTD_NAND_S3C2410_HWECC is not set | ||
| 510 | # CONFIG_MTD_NAND_S3C2410_CLKSTOP is not set | ||
| 511 | # CONFIG_MTD_NAND_DISKONCHIP is not set | ||
| 512 | # CONFIG_MTD_NAND_PLATFORM is not set | ||
| 513 | # CONFIG_MTD_ALAUDA is not set | ||
| 514 | # CONFIG_MTD_ONENAND is not set | ||
| 515 | |||
| 516 | # | ||
| 517 | # LPDDR flash memory drivers | ||
| 518 | # | ||
| 519 | # CONFIG_MTD_LPDDR is not set | ||
| 520 | |||
| 521 | # | ||
| 522 | # UBI - Unsorted block images | ||
| 523 | # | ||
| 524 | # CONFIG_MTD_UBI is not set | ||
| 396 | # CONFIG_PARPORT is not set | 525 | # CONFIG_PARPORT is not set |
| 397 | CONFIG_BLK_DEV=y | 526 | CONFIG_BLK_DEV=y |
| 398 | # CONFIG_BLK_DEV_COW_COMMON is not set | 527 | # CONFIG_BLK_DEV_COW_COMMON is not set |
| @@ -402,6 +531,7 @@ CONFIG_BLK_DEV_LOOP=y | |||
| 402 | # | 531 | # |
| 403 | # DRBD disabled because PROC_FS, INET or CONNECTOR not selected | 532 | # DRBD disabled because PROC_FS, INET or CONNECTOR not selected |
| 404 | # | 533 | # |
| 534 | # CONFIG_BLK_DEV_UB is not set | ||
| 405 | CONFIG_BLK_DEV_RAM=y | 535 | CONFIG_BLK_DEV_RAM=y |
| 406 | CONFIG_BLK_DEV_RAM_COUNT=16 | 536 | CONFIG_BLK_DEV_RAM_COUNT=16 |
| 407 | CONFIG_BLK_DEV_RAM_SIZE=4096 | 537 | CONFIG_BLK_DEV_RAM_SIZE=4096 |
| @@ -413,13 +543,16 @@ CONFIG_MISC_DEVICES=y | |||
| 413 | # CONFIG_ICS932S401 is not set | 543 | # CONFIG_ICS932S401 is not set |
| 414 | # CONFIG_ENCLOSURE_SERVICES is not set | 544 | # CONFIG_ENCLOSURE_SERVICES is not set |
| 415 | # CONFIG_ISL29003 is not set | 545 | # CONFIG_ISL29003 is not set |
| 546 | # CONFIG_SENSORS_TSL2550 is not set | ||
| 416 | # CONFIG_DS1682 is not set | 547 | # CONFIG_DS1682 is not set |
| 548 | # CONFIG_TI_DAC7512 is not set | ||
| 417 | # CONFIG_C2PORT is not set | 549 | # CONFIG_C2PORT is not set |
| 418 | 550 | ||
| 419 | # | 551 | # |
| 420 | # EEPROM support | 552 | # EEPROM support |
| 421 | # | 553 | # |
| 422 | CONFIG_EEPROM_AT24=y | 554 | CONFIG_EEPROM_AT24=y |
| 555 | # CONFIG_EEPROM_AT25 is not set | ||
| 423 | # CONFIG_EEPROM_LEGACY is not set | 556 | # CONFIG_EEPROM_LEGACY is not set |
| 424 | # CONFIG_EEPROM_MAX6875 is not set | 557 | # CONFIG_EEPROM_MAX6875 is not set |
| 425 | # CONFIG_EEPROM_93CX6 is not set | 558 | # CONFIG_EEPROM_93CX6 is not set |
| @@ -430,6 +563,7 @@ CONFIG_HAVE_IDE=y | |||
| 430 | # | 563 | # |
| 431 | # SCSI device support | 564 | # SCSI device support |
| 432 | # | 565 | # |
| 566 | CONFIG_SCSI_MOD=y | ||
| 433 | # CONFIG_RAID_ATTRS is not set | 567 | # CONFIG_RAID_ATTRS is not set |
| 434 | # CONFIG_SCSI is not set | 568 | # CONFIG_SCSI is not set |
| 435 | # CONFIG_SCSI_DMA is not set | 569 | # CONFIG_SCSI_DMA is not set |
| @@ -466,6 +600,7 @@ CONFIG_KEYBOARD_ATKBD=y | |||
| 466 | # CONFIG_QT2160 is not set | 600 | # CONFIG_QT2160 is not set |
| 467 | # CONFIG_KEYBOARD_LKKBD is not set | 601 | # CONFIG_KEYBOARD_LKKBD is not set |
| 468 | # CONFIG_KEYBOARD_GPIO is not set | 602 | # CONFIG_KEYBOARD_GPIO is not set |
| 603 | # CONFIG_KEYBOARD_TCA6416 is not set | ||
| 469 | # CONFIG_KEYBOARD_MATRIX is not set | 604 | # CONFIG_KEYBOARD_MATRIX is not set |
| 470 | # CONFIG_KEYBOARD_MAX7359 is not set | 605 | # CONFIG_KEYBOARD_MAX7359 is not set |
| 471 | # CONFIG_KEYBOARD_NEWTON is not set | 606 | # CONFIG_KEYBOARD_NEWTON is not set |
| @@ -527,12 +662,17 @@ CONFIG_SERIAL_8250_RUNTIME_UARTS=4 | |||
| 527 | # Non-8250 serial port support | 662 | # Non-8250 serial port support |
| 528 | # | 663 | # |
| 529 | CONFIG_SERIAL_SAMSUNG=y | 664 | CONFIG_SERIAL_SAMSUNG=y |
| 665 | CONFIG_SERIAL_SAMSUNG_UARTS_4=y | ||
| 530 | CONFIG_SERIAL_SAMSUNG_UARTS=4 | 666 | CONFIG_SERIAL_SAMSUNG_UARTS=4 |
| 531 | # CONFIG_SERIAL_SAMSUNG_DEBUG is not set | 667 | # CONFIG_SERIAL_SAMSUNG_DEBUG is not set |
| 532 | CONFIG_SERIAL_SAMSUNG_CONSOLE=y | 668 | CONFIG_SERIAL_SAMSUNG_CONSOLE=y |
| 533 | CONFIG_SERIAL_S3C6400=y | 669 | CONFIG_SERIAL_S3C6400=y |
| 670 | # CONFIG_SERIAL_MAX3100 is not set | ||
| 534 | CONFIG_SERIAL_CORE=y | 671 | CONFIG_SERIAL_CORE=y |
| 535 | CONFIG_SERIAL_CORE_CONSOLE=y | 672 | CONFIG_SERIAL_CORE_CONSOLE=y |
| 673 | # CONFIG_SERIAL_TIMBERDALE is not set | ||
| 674 | # CONFIG_SERIAL_ALTERA_JTAGUART is not set | ||
| 675 | # CONFIG_SERIAL_ALTERA_UART is not set | ||
| 536 | CONFIG_UNIX98_PTYS=y | 676 | CONFIG_UNIX98_PTYS=y |
| 537 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | 677 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set |
| 538 | CONFIG_LEGACY_PTYS=y | 678 | CONFIG_LEGACY_PTYS=y |
| @@ -561,28 +701,41 @@ CONFIG_I2C_HELPER_AUTO=y | |||
| 561 | # CONFIG_I2C_OCORES is not set | 701 | # CONFIG_I2C_OCORES is not set |
| 562 | CONFIG_I2C_S3C2410=y | 702 | CONFIG_I2C_S3C2410=y |
| 563 | # CONFIG_I2C_SIMTEC is not set | 703 | # CONFIG_I2C_SIMTEC is not set |
| 704 | # CONFIG_I2C_XILINX is not set | ||
| 564 | 705 | ||
| 565 | # | 706 | # |
| 566 | # External I2C/SMBus adapter drivers | 707 | # External I2C/SMBus adapter drivers |
| 567 | # | 708 | # |
| 568 | # CONFIG_I2C_PARPORT_LIGHT is not set | 709 | # CONFIG_I2C_PARPORT_LIGHT is not set |
| 569 | # CONFIG_I2C_TAOS_EVM is not set | 710 | # CONFIG_I2C_TAOS_EVM is not set |
| 711 | # CONFIG_I2C_TINY_USB is not set | ||
| 570 | 712 | ||
| 571 | # | 713 | # |
| 572 | # Other I2C/SMBus bus drivers | 714 | # Other I2C/SMBus bus drivers |
| 573 | # | 715 | # |
| 574 | # CONFIG_I2C_PCA_PLATFORM is not set | 716 | # CONFIG_I2C_PCA_PLATFORM is not set |
| 575 | # CONFIG_I2C_STUB is not set | 717 | # CONFIG_I2C_STUB is not set |
| 576 | |||
| 577 | # | ||
| 578 | # Miscellaneous I2C Chip support | ||
| 579 | # | ||
| 580 | # CONFIG_SENSORS_TSL2550 is not set | ||
| 581 | # CONFIG_I2C_DEBUG_CORE is not set | 718 | # CONFIG_I2C_DEBUG_CORE is not set |
| 582 | # CONFIG_I2C_DEBUG_ALGO is not set | 719 | # CONFIG_I2C_DEBUG_ALGO is not set |
| 583 | # CONFIG_I2C_DEBUG_BUS is not set | 720 | # CONFIG_I2C_DEBUG_BUS is not set |
| 584 | # CONFIG_I2C_DEBUG_CHIP is not set | 721 | CONFIG_SPI=y |
| 585 | # CONFIG_SPI is not set | 722 | # CONFIG_SPI_DEBUG is not set |
| 723 | CONFIG_SPI_MASTER=y | ||
| 724 | |||
| 725 | # | ||
| 726 | # SPI Master Controller Drivers | ||
| 727 | # | ||
| 728 | CONFIG_SPI_BITBANG=m | ||
| 729 | CONFIG_SPI_GPIO=m | ||
| 730 | CONFIG_SPI_S3C64XX=m | ||
| 731 | # CONFIG_SPI_XILINX is not set | ||
| 732 | # CONFIG_SPI_DESIGNWARE is not set | ||
| 733 | |||
| 734 | # | ||
| 735 | # SPI Protocol Masters | ||
| 736 | # | ||
| 737 | # CONFIG_SPI_SPIDEV is not set | ||
| 738 | # CONFIG_SPI_TLE62X0 is not set | ||
| 586 | 739 | ||
| 587 | # | 740 | # |
| 588 | # PPS support | 741 | # PPS support |
| @@ -596,10 +749,12 @@ CONFIG_GPIOLIB=y | |||
| 596 | # | 749 | # |
| 597 | # Memory mapped GPIO expanders: | 750 | # Memory mapped GPIO expanders: |
| 598 | # | 751 | # |
| 752 | # CONFIG_GPIO_IT8761E is not set | ||
| 599 | 753 | ||
| 600 | # | 754 | # |
| 601 | # I2C GPIO expanders: | 755 | # I2C GPIO expanders: |
| 602 | # | 756 | # |
| 757 | # CONFIG_GPIO_MAX7300 is not set | ||
| 603 | # CONFIG_GPIO_MAX732X is not set | 758 | # CONFIG_GPIO_MAX732X is not set |
| 604 | # CONFIG_GPIO_PCA953X is not set | 759 | # CONFIG_GPIO_PCA953X is not set |
| 605 | # CONFIG_GPIO_PCF857X is not set | 760 | # CONFIG_GPIO_PCF857X is not set |
| @@ -612,6 +767,9 @@ CONFIG_GPIOLIB=y | |||
| 612 | # | 767 | # |
| 613 | # SPI GPIO expanders: | 768 | # SPI GPIO expanders: |
| 614 | # | 769 | # |
| 770 | # CONFIG_GPIO_MAX7301 is not set | ||
| 771 | # CONFIG_GPIO_MCP23S08 is not set | ||
| 772 | # CONFIG_GPIO_MC33880 is not set | ||
| 615 | 773 | ||
| 616 | # | 774 | # |
| 617 | # AC97 GPIO expanders: | 775 | # AC97 GPIO expanders: |
| @@ -627,16 +785,18 @@ CONFIG_HWMON=y | |||
| 627 | # | 785 | # |
| 628 | # CONFIG_SENSORS_AD7414 is not set | 786 | # CONFIG_SENSORS_AD7414 is not set |
| 629 | # CONFIG_SENSORS_AD7418 is not set | 787 | # CONFIG_SENSORS_AD7418 is not set |
| 788 | # CONFIG_SENSORS_ADCXX is not set | ||
| 630 | # CONFIG_SENSORS_ADM1021 is not set | 789 | # CONFIG_SENSORS_ADM1021 is not set |
| 631 | # CONFIG_SENSORS_ADM1025 is not set | 790 | # CONFIG_SENSORS_ADM1025 is not set |
| 632 | # CONFIG_SENSORS_ADM1026 is not set | 791 | # CONFIG_SENSORS_ADM1026 is not set |
| 633 | # CONFIG_SENSORS_ADM1029 is not set | 792 | # CONFIG_SENSORS_ADM1029 is not set |
| 634 | # CONFIG_SENSORS_ADM1031 is not set | 793 | # CONFIG_SENSORS_ADM1031 is not set |
| 635 | # CONFIG_SENSORS_ADM9240 is not set | 794 | # CONFIG_SENSORS_ADM9240 is not set |
| 795 | # CONFIG_SENSORS_ADT7411 is not set | ||
| 636 | # CONFIG_SENSORS_ADT7462 is not set | 796 | # CONFIG_SENSORS_ADT7462 is not set |
| 637 | # CONFIG_SENSORS_ADT7470 is not set | 797 | # CONFIG_SENSORS_ADT7470 is not set |
| 638 | # CONFIG_SENSORS_ADT7473 is not set | ||
| 639 | # CONFIG_SENSORS_ADT7475 is not set | 798 | # CONFIG_SENSORS_ADT7475 is not set |
| 799 | # CONFIG_SENSORS_ASC7621 is not set | ||
| 640 | # CONFIG_SENSORS_ATXP1 is not set | 800 | # CONFIG_SENSORS_ATXP1 is not set |
| 641 | # CONFIG_SENSORS_DS1621 is not set | 801 | # CONFIG_SENSORS_DS1621 is not set |
| 642 | # CONFIG_SENSORS_F71805F is not set | 802 | # CONFIG_SENSORS_F71805F is not set |
| @@ -647,6 +807,7 @@ CONFIG_HWMON=y | |||
| 647 | # CONFIG_SENSORS_GL520SM is not set | 807 | # CONFIG_SENSORS_GL520SM is not set |
| 648 | # CONFIG_SENSORS_IT87 is not set | 808 | # CONFIG_SENSORS_IT87 is not set |
| 649 | # CONFIG_SENSORS_LM63 is not set | 809 | # CONFIG_SENSORS_LM63 is not set |
| 810 | # CONFIG_SENSORS_LM70 is not set | ||
| 650 | # CONFIG_SENSORS_LM73 is not set | 811 | # CONFIG_SENSORS_LM73 is not set |
| 651 | # CONFIG_SENSORS_LM75 is not set | 812 | # CONFIG_SENSORS_LM75 is not set |
| 652 | # CONFIG_SENSORS_LM77 is not set | 813 | # CONFIG_SENSORS_LM77 is not set |
| @@ -661,6 +822,7 @@ CONFIG_HWMON=y | |||
| 661 | # CONFIG_SENSORS_LTC4215 is not set | 822 | # CONFIG_SENSORS_LTC4215 is not set |
| 662 | # CONFIG_SENSORS_LTC4245 is not set | 823 | # CONFIG_SENSORS_LTC4245 is not set |
| 663 | # CONFIG_SENSORS_LM95241 is not set | 824 | # CONFIG_SENSORS_LM95241 is not set |
| 825 | # CONFIG_SENSORS_MAX1111 is not set | ||
| 664 | # CONFIG_SENSORS_MAX1619 is not set | 826 | # CONFIG_SENSORS_MAX1619 is not set |
| 665 | # CONFIG_SENSORS_MAX6650 is not set | 827 | # CONFIG_SENSORS_MAX6650 is not set |
| 666 | # CONFIG_SENSORS_PC87360 is not set | 828 | # CONFIG_SENSORS_PC87360 is not set |
| @@ -672,6 +834,7 @@ CONFIG_HWMON=y | |||
| 672 | # CONFIG_SENSORS_SMSC47M192 is not set | 834 | # CONFIG_SENSORS_SMSC47M192 is not set |
| 673 | # CONFIG_SENSORS_SMSC47B397 is not set | 835 | # CONFIG_SENSORS_SMSC47B397 is not set |
| 674 | # CONFIG_SENSORS_ADS7828 is not set | 836 | # CONFIG_SENSORS_ADS7828 is not set |
| 837 | # CONFIG_SENSORS_ADS7871 is not set | ||
| 675 | # CONFIG_SENSORS_AMC6821 is not set | 838 | # CONFIG_SENSORS_AMC6821 is not set |
| 676 | # CONFIG_SENSORS_THMC50 is not set | 839 | # CONFIG_SENSORS_THMC50 is not set |
| 677 | # CONFIG_SENSORS_TMP401 is not set | 840 | # CONFIG_SENSORS_TMP401 is not set |
| @@ -685,9 +848,11 @@ CONFIG_HWMON=y | |||
| 685 | # CONFIG_SENSORS_W83L786NG is not set | 848 | # CONFIG_SENSORS_W83L786NG is not set |
| 686 | # CONFIG_SENSORS_W83627HF is not set | 849 | # CONFIG_SENSORS_W83627HF is not set |
| 687 | # CONFIG_SENSORS_W83627EHF is not set | 850 | # CONFIG_SENSORS_W83627EHF is not set |
| 851 | # CONFIG_SENSORS_LIS3_SPI is not set | ||
| 688 | # CONFIG_SENSORS_LIS3_I2C is not set | 852 | # CONFIG_SENSORS_LIS3_I2C is not set |
| 689 | # CONFIG_THERMAL is not set | 853 | # CONFIG_THERMAL is not set |
| 690 | # CONFIG_WATCHDOG is not set | 854 | # CONFIG_WATCHDOG is not set |
| 855 | CONFIG_HAVE_S3C2410_WATCHDOG=y | ||
| 691 | CONFIG_SSB_POSSIBLE=y | 856 | CONFIG_SSB_POSSIBLE=y |
| 692 | 857 | ||
| 693 | # | 858 | # |
| @@ -699,10 +864,13 @@ CONFIG_SSB_POSSIBLE=y | |||
| 699 | # Multifunction device drivers | 864 | # Multifunction device drivers |
| 700 | # | 865 | # |
| 701 | # CONFIG_MFD_CORE is not set | 866 | # CONFIG_MFD_CORE is not set |
| 867 | # CONFIG_MFD_88PM860X is not set | ||
| 702 | # CONFIG_MFD_SM501 is not set | 868 | # CONFIG_MFD_SM501 is not set |
| 703 | # CONFIG_MFD_ASIC3 is not set | 869 | # CONFIG_MFD_ASIC3 is not set |
| 704 | # CONFIG_HTC_EGPIO is not set | 870 | # CONFIG_HTC_EGPIO is not set |
| 705 | # CONFIG_HTC_PASIC3 is not set | 871 | # CONFIG_HTC_PASIC3 is not set |
| 872 | # CONFIG_HTC_I2CPLD is not set | ||
| 873 | # CONFIG_UCB1400_CORE is not set | ||
| 706 | # CONFIG_TPS65010 is not set | 874 | # CONFIG_TPS65010 is not set |
| 707 | # CONFIG_TWL4030_CORE is not set | 875 | # CONFIG_TWL4030_CORE is not set |
| 708 | # CONFIG_MFD_TMIO is not set | 876 | # CONFIG_MFD_TMIO is not set |
| @@ -711,12 +879,16 @@ CONFIG_SSB_POSSIBLE=y | |||
| 711 | # CONFIG_MFD_TC6393XB is not set | 879 | # CONFIG_MFD_TC6393XB is not set |
| 712 | # CONFIG_PMIC_DA903X is not set | 880 | # CONFIG_PMIC_DA903X is not set |
| 713 | # CONFIG_PMIC_ADP5520 is not set | 881 | # CONFIG_PMIC_ADP5520 is not set |
| 882 | # CONFIG_MFD_MAX8925 is not set | ||
| 714 | # CONFIG_MFD_WM8400 is not set | 883 | # CONFIG_MFD_WM8400 is not set |
| 715 | # CONFIG_MFD_WM831X is not set | 884 | # CONFIG_MFD_WM831X is not set |
| 716 | # CONFIG_MFD_WM8350_I2C is not set | 885 | # CONFIG_MFD_WM8350_I2C is not set |
| 886 | # CONFIG_MFD_WM8994 is not set | ||
| 717 | # CONFIG_MFD_PCF50633 is not set | 887 | # CONFIG_MFD_PCF50633 is not set |
| 888 | # CONFIG_MFD_MC13783 is not set | ||
| 718 | # CONFIG_AB3100_CORE is not set | 889 | # CONFIG_AB3100_CORE is not set |
| 719 | # CONFIG_MFD_88PM8607 is not set | 890 | # CONFIG_EZX_PCAP is not set |
| 891 | # CONFIG_AB4500_CORE is not set | ||
| 720 | # CONFIG_REGULATOR is not set | 892 | # CONFIG_REGULATOR is not set |
| 721 | # CONFIG_MEDIA_SUPPORT is not set | 893 | # CONFIG_MEDIA_SUPPORT is not set |
| 722 | 894 | ||
| @@ -725,8 +897,47 @@ CONFIG_SSB_POSSIBLE=y | |||
| 725 | # | 897 | # |
| 726 | # CONFIG_VGASTATE is not set | 898 | # CONFIG_VGASTATE is not set |
| 727 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | 899 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set |
| 728 | # CONFIG_FB is not set | 900 | CONFIG_FB=y |
| 729 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | 901 | # CONFIG_FIRMWARE_EDID is not set |
| 902 | # CONFIG_FB_DDC is not set | ||
| 903 | # CONFIG_FB_BOOT_VESA_SUPPORT is not set | ||
| 904 | CONFIG_FB_CFB_FILLRECT=y | ||
| 905 | CONFIG_FB_CFB_COPYAREA=y | ||
| 906 | CONFIG_FB_CFB_IMAGEBLIT=y | ||
| 907 | # CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set | ||
| 908 | # CONFIG_FB_SYS_FILLRECT is not set | ||
| 909 | # CONFIG_FB_SYS_COPYAREA is not set | ||
| 910 | # CONFIG_FB_SYS_IMAGEBLIT is not set | ||
| 911 | # CONFIG_FB_FOREIGN_ENDIAN is not set | ||
| 912 | # CONFIG_FB_SYS_FOPS is not set | ||
| 913 | # CONFIG_FB_SVGALIB is not set | ||
| 914 | # CONFIG_FB_MACMODES is not set | ||
| 915 | # CONFIG_FB_BACKLIGHT is not set | ||
| 916 | # CONFIG_FB_MODE_HELPERS is not set | ||
| 917 | # CONFIG_FB_TILEBLITTING is not set | ||
| 918 | |||
| 919 | # | ||
| 920 | # Frame buffer hardware drivers | ||
| 921 | # | ||
| 922 | # CONFIG_FB_S1D13XXX is not set | ||
| 923 | CONFIG_FB_S3C=y | ||
| 924 | # CONFIG_FB_S3C_DEBUG_REGWRITE is not set | ||
| 925 | # CONFIG_FB_VIRTUAL is not set | ||
| 926 | # CONFIG_FB_METRONOME is not set | ||
| 927 | # CONFIG_FB_MB862XX is not set | ||
| 928 | # CONFIG_FB_BROADSHEET is not set | ||
| 929 | CONFIG_BACKLIGHT_LCD_SUPPORT=y | ||
| 930 | CONFIG_LCD_CLASS_DEVICE=y | ||
| 931 | # CONFIG_LCD_L4F00242T03 is not set | ||
| 932 | # CONFIG_LCD_LMS283GF05 is not set | ||
| 933 | CONFIG_LCD_LTV350QV=y | ||
| 934 | # CONFIG_LCD_ILI9320 is not set | ||
| 935 | # CONFIG_LCD_TDO24M is not set | ||
| 936 | # CONFIG_LCD_VGG2432A4 is not set | ||
| 937 | # CONFIG_LCD_PLATFORM is not set | ||
| 938 | CONFIG_BACKLIGHT_CLASS_DEVICE=y | ||
| 939 | CONFIG_BACKLIGHT_GENERIC=y | ||
| 940 | CONFIG_BACKLIGHT_PWM=y | ||
| 730 | 941 | ||
| 731 | # | 942 | # |
| 732 | # Display device support | 943 | # Display device support |
| @@ -738,33 +949,246 @@ CONFIG_SSB_POSSIBLE=y | |||
| 738 | # | 949 | # |
| 739 | # CONFIG_VGA_CONSOLE is not set | 950 | # CONFIG_VGA_CONSOLE is not set |
| 740 | CONFIG_DUMMY_CONSOLE=y | 951 | CONFIG_DUMMY_CONSOLE=y |
| 741 | # CONFIG_SOUND is not set | 952 | # CONFIG_FRAMEBUFFER_CONSOLE is not set |
| 953 | # CONFIG_LOGO is not set | ||
| 954 | CONFIG_SOUND=y | ||
| 955 | CONFIG_SOUND_OSS_CORE=y | ||
| 956 | CONFIG_SOUND_OSS_CORE_PRECLAIM=y | ||
| 957 | CONFIG_SND=m | ||
| 958 | CONFIG_SND_TIMER=m | ||
| 959 | CONFIG_SND_PCM=m | ||
| 960 | CONFIG_SND_JACK=y | ||
| 961 | # CONFIG_SND_SEQUENCER is not set | ||
| 962 | CONFIG_SND_OSSEMUL=y | ||
| 963 | CONFIG_SND_MIXER_OSS=m | ||
| 964 | CONFIG_SND_PCM_OSS=m | ||
| 965 | CONFIG_SND_PCM_OSS_PLUGINS=y | ||
| 966 | # CONFIG_SND_DYNAMIC_MINORS is not set | ||
| 967 | CONFIG_SND_SUPPORT_OLD_API=y | ||
| 968 | CONFIG_SND_VERBOSE_PROCFS=y | ||
| 969 | # CONFIG_SND_VERBOSE_PRINTK is not set | ||
| 970 | # CONFIG_SND_DEBUG is not set | ||
| 971 | # CONFIG_SND_RAWMIDI_SEQ is not set | ||
| 972 | # CONFIG_SND_OPL3_LIB_SEQ is not set | ||
| 973 | # CONFIG_SND_OPL4_LIB_SEQ is not set | ||
| 974 | # CONFIG_SND_SBAWE_SEQ is not set | ||
| 975 | # CONFIG_SND_EMU10K1_SEQ is not set | ||
| 976 | CONFIG_SND_DRIVERS=y | ||
| 977 | # CONFIG_SND_DUMMY is not set | ||
| 978 | # CONFIG_SND_MTPAV is not set | ||
| 979 | # CONFIG_SND_SERIAL_U16550 is not set | ||
| 980 | # CONFIG_SND_MPU401 is not set | ||
| 981 | CONFIG_SND_ARM=y | ||
| 982 | CONFIG_SND_SPI=y | ||
| 983 | CONFIG_SND_USB=y | ||
| 984 | # CONFIG_SND_USB_AUDIO is not set | ||
| 985 | # CONFIG_SND_USB_UA101 is not set | ||
| 986 | # CONFIG_SND_USB_CAIAQ is not set | ||
| 987 | CONFIG_SND_SOC=m | ||
| 988 | CONFIG_SND_SOC_AC97_BUS=y | ||
| 989 | CONFIG_SND_S3C24XX_SOC=m | ||
| 990 | CONFIG_SND_S3C_SOC_AC97=m | ||
| 991 | # CONFIG_SND_S3C64XX_SOC_WM8580 is not set | ||
| 992 | CONFIG_SND_SOC_SMDK_WM9713=m | ||
| 993 | CONFIG_SND_SOC_I2C_AND_SPI=m | ||
| 994 | # CONFIG_SND_SOC_ALL_CODECS is not set | ||
| 995 | CONFIG_SND_SOC_WM9713=m | ||
| 996 | # CONFIG_SOUND_PRIME is not set | ||
| 997 | CONFIG_AC97_BUS=m | ||
| 742 | CONFIG_HID_SUPPORT=y | 998 | CONFIG_HID_SUPPORT=y |
| 743 | CONFIG_HID=y | 999 | CONFIG_HID=y |
| 744 | # CONFIG_HIDRAW is not set | 1000 | # CONFIG_HIDRAW is not set |
| 1001 | |||
| 1002 | # | ||
| 1003 | # USB Input Devices | ||
| 1004 | # | ||
| 1005 | CONFIG_USB_HID=y | ||
| 745 | # CONFIG_HID_PID is not set | 1006 | # CONFIG_HID_PID is not set |
| 1007 | # CONFIG_USB_HIDDEV is not set | ||
| 746 | 1008 | ||
| 747 | # | 1009 | # |
| 748 | # Special HID drivers | 1010 | # Special HID drivers |
| 749 | # | 1011 | # |
| 1012 | # CONFIG_HID_3M_PCT is not set | ||
| 1013 | CONFIG_HID_A4TECH=y | ||
| 1014 | CONFIG_HID_APPLE=y | ||
| 1015 | CONFIG_HID_BELKIN=y | ||
| 1016 | # CONFIG_HID_CANDO is not set | ||
| 1017 | CONFIG_HID_CHERRY=y | ||
| 1018 | CONFIG_HID_CHICONY=y | ||
| 1019 | # CONFIG_HID_PRODIKEYS is not set | ||
| 1020 | CONFIG_HID_CYPRESS=y | ||
| 1021 | # CONFIG_HID_DRAGONRISE is not set | ||
| 1022 | # CONFIG_HID_EGALAX is not set | ||
| 1023 | CONFIG_HID_EZKEY=y | ||
| 1024 | CONFIG_HID_KYE=y | ||
| 1025 | # CONFIG_HID_GYRATION is not set | ||
| 1026 | # CONFIG_HID_TWINHAN is not set | ||
| 1027 | CONFIG_HID_KENSINGTON=y | ||
| 1028 | CONFIG_HID_LOGITECH=y | ||
| 1029 | # CONFIG_LOGITECH_FF is not set | ||
| 1030 | # CONFIG_LOGIRUMBLEPAD2_FF is not set | ||
| 1031 | # CONFIG_LOGIG940_FF is not set | ||
| 1032 | CONFIG_HID_MICROSOFT=y | ||
| 1033 | # CONFIG_HID_MOSART is not set | ||
| 1034 | CONFIG_HID_MONTEREY=y | ||
| 1035 | # CONFIG_HID_NTRIG is not set | ||
| 1036 | # CONFIG_HID_ORTEK is not set | ||
| 1037 | # CONFIG_HID_PANTHERLORD is not set | ||
| 1038 | # CONFIG_HID_PETALYNX is not set | ||
| 1039 | # CONFIG_HID_PICOLCD is not set | ||
| 1040 | # CONFIG_HID_QUANTA is not set | ||
| 1041 | # CONFIG_HID_ROCCAT_KONE is not set | ||
| 1042 | # CONFIG_HID_SAMSUNG is not set | ||
| 1043 | # CONFIG_HID_SONY is not set | ||
| 1044 | # CONFIG_HID_STANTUM is not set | ||
| 1045 | # CONFIG_HID_SUNPLUS is not set | ||
| 1046 | # CONFIG_HID_GREENASIA is not set | ||
| 1047 | # CONFIG_HID_SMARTJOYPLUS is not set | ||
| 1048 | # CONFIG_HID_TOPSEED is not set | ||
| 1049 | # CONFIG_HID_THRUSTMASTER is not set | ||
| 1050 | # CONFIG_HID_ZEROPLUS is not set | ||
| 1051 | # CONFIG_HID_ZYDACRON is not set | ||
| 750 | CONFIG_USB_SUPPORT=y | 1052 | CONFIG_USB_SUPPORT=y |
| 751 | CONFIG_USB_ARCH_HAS_HCD=y | 1053 | CONFIG_USB_ARCH_HAS_HCD=y |
| 752 | CONFIG_USB_ARCH_HAS_OHCI=y | 1054 | CONFIG_USB_ARCH_HAS_OHCI=y |
| 753 | # CONFIG_USB_ARCH_HAS_EHCI is not set | 1055 | # CONFIG_USB_ARCH_HAS_EHCI is not set |
| 754 | # CONFIG_USB is not set | 1056 | CONFIG_USB=y |
| 1057 | # CONFIG_USB_DEBUG is not set | ||
| 1058 | CONFIG_USB_ANNOUNCE_NEW_DEVICES=y | ||
| 1059 | |||
| 1060 | # | ||
| 1061 | # Miscellaneous USB options | ||
| 1062 | # | ||
| 1063 | CONFIG_USB_DEVICEFS=y | ||
| 1064 | CONFIG_USB_DEVICE_CLASS=y | ||
| 1065 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
| 1066 | # CONFIG_USB_MON is not set | ||
| 1067 | # CONFIG_USB_WUSB is not set | ||
| 1068 | # CONFIG_USB_WUSB_CBAF is not set | ||
| 1069 | |||
| 1070 | # | ||
| 1071 | # USB Host Controller Drivers | ||
| 1072 | # | ||
| 1073 | # CONFIG_USB_C67X00_HCD is not set | ||
| 1074 | # CONFIG_USB_OXU210HP_HCD is not set | ||
| 1075 | # CONFIG_USB_ISP116X_HCD is not set | ||
| 1076 | # CONFIG_USB_ISP1760_HCD is not set | ||
| 1077 | # CONFIG_USB_ISP1362_HCD is not set | ||
| 1078 | CONFIG_USB_OHCI_HCD=y | ||
| 1079 | # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set | ||
| 1080 | # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set | ||
| 1081 | CONFIG_USB_OHCI_LITTLE_ENDIAN=y | ||
| 1082 | # CONFIG_USB_SL811_HCD is not set | ||
| 1083 | # CONFIG_USB_R8A66597_HCD is not set | ||
| 1084 | # CONFIG_USB_HWA_HCD is not set | ||
| 1085 | # CONFIG_USB_MUSB_HDRC is not set | ||
| 755 | 1086 | ||
| 756 | # | 1087 | # |
| 757 | # Enable Host or Gadget support to see Inventra options | 1088 | # USB Device Class drivers |
| 758 | # | 1089 | # |
| 1090 | CONFIG_USB_ACM=m | ||
| 1091 | CONFIG_USB_PRINTER=m | ||
| 1092 | # CONFIG_USB_WDM is not set | ||
| 1093 | # CONFIG_USB_TMC is not set | ||
| 759 | 1094 | ||
| 760 | # | 1095 | # |
| 761 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may | 1096 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may |
| 762 | # | 1097 | # |
| 1098 | |||
| 1099 | # | ||
| 1100 | # also be needed; see USB_STORAGE Help for more info | ||
| 1101 | # | ||
| 1102 | # CONFIG_USB_LIBUSUAL is not set | ||
| 1103 | |||
| 1104 | # | ||
| 1105 | # USB Imaging devices | ||
| 1106 | # | ||
| 1107 | # CONFIG_USB_MDC800 is not set | ||
| 1108 | |||
| 1109 | # | ||
| 1110 | # USB port drivers | ||
| 1111 | # | ||
| 1112 | CONFIG_USB_SERIAL=m | ||
| 1113 | # CONFIG_USB_EZUSB is not set | ||
| 1114 | CONFIG_USB_SERIAL_GENERIC=y | ||
| 1115 | # CONFIG_USB_SERIAL_AIRCABLE is not set | ||
| 1116 | # CONFIG_USB_SERIAL_ARK3116 is not set | ||
| 1117 | # CONFIG_USB_SERIAL_BELKIN is not set | ||
| 1118 | # CONFIG_USB_SERIAL_CH341 is not set | ||
| 1119 | # CONFIG_USB_SERIAL_WHITEHEAT is not set | ||
| 1120 | # CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set | ||
| 1121 | # CONFIG_USB_SERIAL_CP210X is not set | ||
| 1122 | # CONFIG_USB_SERIAL_CYPRESS_M8 is not set | ||
| 1123 | CONFIG_USB_SERIAL_EMPEG=m | ||
| 1124 | CONFIG_USB_SERIAL_FTDI_SIO=m | ||
| 1125 | # CONFIG_USB_SERIAL_FUNSOFT is not set | ||
| 1126 | # CONFIG_USB_SERIAL_VISOR is not set | ||
| 1127 | # CONFIG_USB_SERIAL_IPAQ is not set | ||
| 1128 | # CONFIG_USB_SERIAL_IR is not set | ||
| 1129 | # CONFIG_USB_SERIAL_EDGEPORT is not set | ||
| 1130 | # CONFIG_USB_SERIAL_EDGEPORT_TI is not set | ||
| 1131 | # CONFIG_USB_SERIAL_GARMIN is not set | ||
| 1132 | # CONFIG_USB_SERIAL_IPW is not set | ||
| 1133 | # CONFIG_USB_SERIAL_IUU is not set | ||
| 1134 | # CONFIG_USB_SERIAL_KEYSPAN_PDA is not set | ||
| 1135 | # CONFIG_USB_SERIAL_KEYSPAN is not set | ||
| 1136 | # CONFIG_USB_SERIAL_KLSI is not set | ||
| 1137 | # CONFIG_USB_SERIAL_KOBIL_SCT is not set | ||
| 1138 | # CONFIG_USB_SERIAL_MCT_U232 is not set | ||
| 1139 | # CONFIG_USB_SERIAL_MOS7720 is not set | ||
| 1140 | # CONFIG_USB_SERIAL_MOS7840 is not set | ||
| 1141 | # CONFIG_USB_SERIAL_MOTOROLA is not set | ||
| 1142 | # CONFIG_USB_SERIAL_NAVMAN is not set | ||
| 1143 | CONFIG_USB_SERIAL_PL2303=m | ||
| 1144 | # CONFIG_USB_SERIAL_OTI6858 is not set | ||
| 1145 | # CONFIG_USB_SERIAL_QCAUX is not set | ||
| 1146 | # CONFIG_USB_SERIAL_QUALCOMM is not set | ||
| 1147 | # CONFIG_USB_SERIAL_SPCP8X5 is not set | ||
| 1148 | # CONFIG_USB_SERIAL_HP4X is not set | ||
| 1149 | # CONFIG_USB_SERIAL_SAFE is not set | ||
| 1150 | # CONFIG_USB_SERIAL_SIEMENS_MPI is not set | ||
| 1151 | # CONFIG_USB_SERIAL_SIERRAWIRELESS is not set | ||
| 1152 | # CONFIG_USB_SERIAL_SYMBOL is not set | ||
| 1153 | # CONFIG_USB_SERIAL_TI is not set | ||
| 1154 | # CONFIG_USB_SERIAL_CYBERJACK is not set | ||
| 1155 | # CONFIG_USB_SERIAL_XIRCOM is not set | ||
| 1156 | # CONFIG_USB_SERIAL_OPTION is not set | ||
| 1157 | # CONFIG_USB_SERIAL_OMNINET is not set | ||
| 1158 | # CONFIG_USB_SERIAL_OPTICON is not set | ||
| 1159 | # CONFIG_USB_SERIAL_VIVOPAY_SERIAL is not set | ||
| 1160 | # CONFIG_USB_SERIAL_ZIO is not set | ||
| 1161 | # CONFIG_USB_SERIAL_DEBUG is not set | ||
| 1162 | |||
| 1163 | # | ||
| 1164 | # USB Miscellaneous drivers | ||
| 1165 | # | ||
| 1166 | # CONFIG_USB_EMI62 is not set | ||
| 1167 | # CONFIG_USB_EMI26 is not set | ||
| 1168 | # CONFIG_USB_ADUTUX is not set | ||
| 1169 | # CONFIG_USB_SEVSEG is not set | ||
| 1170 | # CONFIG_USB_RIO500 is not set | ||
| 1171 | # CONFIG_USB_LEGOTOWER is not set | ||
| 1172 | # CONFIG_USB_LCD is not set | ||
| 1173 | # CONFIG_USB_LED is not set | ||
| 1174 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
| 1175 | # CONFIG_USB_CYTHERM is not set | ||
| 1176 | # CONFIG_USB_IDMOUSE is not set | ||
| 1177 | # CONFIG_USB_FTDI_ELAN is not set | ||
| 1178 | # CONFIG_USB_APPLEDISPLAY is not set | ||
| 1179 | # CONFIG_USB_LD is not set | ||
| 1180 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
| 1181 | # CONFIG_USB_IOWARRIOR is not set | ||
| 1182 | # CONFIG_USB_TEST is not set | ||
| 1183 | # CONFIG_USB_ISIGHTFW is not set | ||
| 763 | # CONFIG_USB_GADGET is not set | 1184 | # CONFIG_USB_GADGET is not set |
| 764 | 1185 | ||
| 765 | # | 1186 | # |
| 766 | # OTG and related infrastructure | 1187 | # OTG and related infrastructure |
| 767 | # | 1188 | # |
| 1189 | # CONFIG_USB_GPIO_VBUS is not set | ||
| 1190 | # CONFIG_USB_ULPI is not set | ||
| 1191 | # CONFIG_NOP_USB_XCEIV is not set | ||
| 768 | CONFIG_MMC=y | 1192 | CONFIG_MMC=y |
| 769 | CONFIG_MMC_DEBUG=y | 1193 | CONFIG_MMC_DEBUG=y |
| 770 | CONFIG_MMC_UNSAFE_RESUME=y | 1194 | CONFIG_MMC_UNSAFE_RESUME=y |
| @@ -784,20 +1208,80 @@ CONFIG_MMC_SDHCI=y | |||
| 784 | # CONFIG_MMC_SDHCI_PLTFM is not set | 1208 | # CONFIG_MMC_SDHCI_PLTFM is not set |
| 785 | CONFIG_MMC_SDHCI_S3C=y | 1209 | CONFIG_MMC_SDHCI_S3C=y |
| 786 | # CONFIG_MMC_SDHCI_S3C_DMA is not set | 1210 | # CONFIG_MMC_SDHCI_S3C_DMA is not set |
| 787 | # CONFIG_MMC_AT91 is not set | 1211 | # CONFIG_MMC_SPI is not set |
| 788 | # CONFIG_MMC_ATMELMCI is not set | ||
| 789 | # CONFIG_MEMSTICK is not set | 1212 | # CONFIG_MEMSTICK is not set |
| 790 | # CONFIG_NEW_LEDS is not set | 1213 | # CONFIG_NEW_LEDS is not set |
| 791 | # CONFIG_ACCESSIBILITY is not set | 1214 | # CONFIG_ACCESSIBILITY is not set |
| 792 | CONFIG_RTC_LIB=y | 1215 | CONFIG_RTC_LIB=y |
| 793 | # CONFIG_RTC_CLASS is not set | 1216 | CONFIG_RTC_CLASS=y |
| 794 | # CONFIG_DMADEVICES is not set | 1217 | CONFIG_RTC_HCTOSYS=y |
| 795 | # CONFIG_AUXDISPLAY is not set | 1218 | CONFIG_RTC_HCTOSYS_DEVICE="rtc0" |
| 796 | # CONFIG_UIO is not set | 1219 | # CONFIG_RTC_DEBUG is not set |
| 1220 | |||
| 1221 | # | ||
| 1222 | # RTC interfaces | ||
| 1223 | # | ||
| 1224 | CONFIG_RTC_INTF_SYSFS=y | ||
| 1225 | CONFIG_RTC_INTF_PROC=y | ||
| 1226 | CONFIG_RTC_INTF_DEV=y | ||
| 1227 | # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
| 1228 | # CONFIG_RTC_DRV_TEST is not set | ||
| 1229 | |||
| 1230 | # | ||
| 1231 | # I2C RTC drivers | ||
| 1232 | # | ||
| 1233 | # CONFIG_RTC_DRV_DS1307 is not set | ||
| 1234 | # CONFIG_RTC_DRV_DS1374 is not set | ||
| 1235 | # CONFIG_RTC_DRV_DS1672 is not set | ||
| 1236 | # CONFIG_RTC_DRV_MAX6900 is not set | ||
| 1237 | # CONFIG_RTC_DRV_RS5C372 is not set | ||
| 1238 | # CONFIG_RTC_DRV_ISL1208 is not set | ||
| 1239 | # CONFIG_RTC_DRV_X1205 is not set | ||
| 1240 | # CONFIG_RTC_DRV_PCF8563 is not set | ||
| 1241 | # CONFIG_RTC_DRV_PCF8583 is not set | ||
| 1242 | # CONFIG_RTC_DRV_M41T80 is not set | ||
| 1243 | # CONFIG_RTC_DRV_BQ32K is not set | ||
| 1244 | # CONFIG_RTC_DRV_S35390A is not set | ||
| 1245 | # CONFIG_RTC_DRV_FM3130 is not set | ||
| 1246 | # CONFIG_RTC_DRV_RX8581 is not set | ||
| 1247 | # CONFIG_RTC_DRV_RX8025 is not set | ||
| 1248 | |||
| 1249 | # | ||
| 1250 | # SPI RTC drivers | ||
| 1251 | # | ||
| 1252 | # CONFIG_RTC_DRV_M41T94 is not set | ||
| 1253 | # CONFIG_RTC_DRV_DS1305 is not set | ||
| 1254 | # CONFIG_RTC_DRV_DS1390 is not set | ||
| 1255 | # CONFIG_RTC_DRV_MAX6902 is not set | ||
| 1256 | # CONFIG_RTC_DRV_R9701 is not set | ||
| 1257 | # CONFIG_RTC_DRV_RS5C348 is not set | ||
| 1258 | # CONFIG_RTC_DRV_DS3234 is not set | ||
| 1259 | # CONFIG_RTC_DRV_PCF2123 is not set | ||
| 1260 | |||
| 1261 | # | ||
| 1262 | # Platform RTC drivers | ||
| 1263 | # | ||
| 1264 | # CONFIG_RTC_DRV_CMOS is not set | ||
| 1265 | # CONFIG_RTC_DRV_DS1286 is not set | ||
| 1266 | # CONFIG_RTC_DRV_DS1511 is not set | ||
| 1267 | # CONFIG_RTC_DRV_DS1553 is not set | ||
| 1268 | # CONFIG_RTC_DRV_DS1742 is not set | ||
| 1269 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
| 1270 | # CONFIG_RTC_DRV_M48T86 is not set | ||
| 1271 | # CONFIG_RTC_DRV_M48T35 is not set | ||
| 1272 | # CONFIG_RTC_DRV_M48T59 is not set | ||
| 1273 | # CONFIG_RTC_DRV_MSM6242 is not set | ||
| 1274 | # CONFIG_RTC_DRV_BQ4802 is not set | ||
| 1275 | # CONFIG_RTC_DRV_RP5C01 is not set | ||
| 1276 | # CONFIG_RTC_DRV_V3020 is not set | ||
| 797 | 1277 | ||
| 798 | # | 1278 | # |
| 799 | # TI VLYNQ | 1279 | # on-CPU RTC drivers |
| 800 | # | 1280 | # |
| 1281 | CONFIG_RTC_DRV_S3C=y | ||
| 1282 | # CONFIG_DMADEVICES is not set | ||
| 1283 | # CONFIG_AUXDISPLAY is not set | ||
| 1284 | # CONFIG_UIO is not set | ||
| 801 | # CONFIG_STAGING is not set | 1285 | # CONFIG_STAGING is not set |
| 802 | 1286 | ||
| 803 | # | 1287 | # |
| @@ -869,6 +1353,8 @@ CONFIG_MISC_FILESYSTEMS=y | |||
| 869 | # CONFIG_BEFS_FS is not set | 1353 | # CONFIG_BEFS_FS is not set |
| 870 | # CONFIG_BFS_FS is not set | 1354 | # CONFIG_BFS_FS is not set |
| 871 | # CONFIG_EFS_FS is not set | 1355 | # CONFIG_EFS_FS is not set |
| 1356 | # CONFIG_JFFS2_FS is not set | ||
| 1357 | # CONFIG_LOGFS is not set | ||
| 872 | CONFIG_CRAMFS=y | 1358 | CONFIG_CRAMFS=y |
| 873 | # CONFIG_SQUASHFS is not set | 1359 | # CONFIG_SQUASHFS is not set |
| 874 | # CONFIG_VXFS_FS is not set | 1360 | # CONFIG_VXFS_FS is not set |
| @@ -889,7 +1375,46 @@ CONFIG_ROMFS_ON_BLOCK=y | |||
| 889 | # | 1375 | # |
| 890 | # CONFIG_PARTITION_ADVANCED is not set | 1376 | # CONFIG_PARTITION_ADVANCED is not set |
| 891 | CONFIG_MSDOS_PARTITION=y | 1377 | CONFIG_MSDOS_PARTITION=y |
| 892 | # CONFIG_NLS is not set | 1378 | CONFIG_NLS=y |
| 1379 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
| 1380 | # CONFIG_NLS_CODEPAGE_437 is not set | ||
| 1381 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
| 1382 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
| 1383 | # CONFIG_NLS_CODEPAGE_850 is not set | ||
| 1384 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
| 1385 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
| 1386 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
| 1387 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
| 1388 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
| 1389 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
| 1390 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
| 1391 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
| 1392 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
| 1393 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
| 1394 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
| 1395 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
| 1396 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
| 1397 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
| 1398 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
| 1399 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
| 1400 | # CONFIG_NLS_ISO8859_8 is not set | ||
| 1401 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
| 1402 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
| 1403 | # CONFIG_NLS_ASCII is not set | ||
| 1404 | # CONFIG_NLS_ISO8859_1 is not set | ||
| 1405 | # CONFIG_NLS_ISO8859_2 is not set | ||
| 1406 | # CONFIG_NLS_ISO8859_3 is not set | ||
| 1407 | # CONFIG_NLS_ISO8859_4 is not set | ||
| 1408 | # CONFIG_NLS_ISO8859_5 is not set | ||
| 1409 | # CONFIG_NLS_ISO8859_6 is not set | ||
| 1410 | # CONFIG_NLS_ISO8859_7 is not set | ||
| 1411 | # CONFIG_NLS_ISO8859_9 is not set | ||
| 1412 | # CONFIG_NLS_ISO8859_13 is not set | ||
| 1413 | # CONFIG_NLS_ISO8859_14 is not set | ||
| 1414 | # CONFIG_NLS_ISO8859_15 is not set | ||
| 1415 | # CONFIG_NLS_KOI8_R is not set | ||
| 1416 | # CONFIG_NLS_KOI8_U is not set | ||
| 1417 | # CONFIG_NLS_UTF8 is not set | ||
| 893 | 1418 | ||
| 894 | # | 1419 | # |
| 895 | # Kernel hacking | 1420 | # Kernel hacking |
| @@ -952,6 +1477,7 @@ CONFIG_HAVE_FUNCTION_TRACER=y | |||
| 952 | CONFIG_TRACING_SUPPORT=y | 1477 | CONFIG_TRACING_SUPPORT=y |
| 953 | CONFIG_FTRACE=y | 1478 | CONFIG_FTRACE=y |
| 954 | # CONFIG_FUNCTION_TRACER is not set | 1479 | # CONFIG_FUNCTION_TRACER is not set |
| 1480 | # CONFIG_IRQSOFF_TRACER is not set | ||
| 955 | # CONFIG_SCHED_TRACER is not set | 1481 | # CONFIG_SCHED_TRACER is not set |
| 956 | # CONFIG_ENABLE_DEFAULT_TRACERS is not set | 1482 | # CONFIG_ENABLE_DEFAULT_TRACERS is not set |
| 957 | # CONFIG_BOOT_TRACER is not set | 1483 | # CONFIG_BOOT_TRACER is not set |
| @@ -962,6 +1488,7 @@ CONFIG_BRANCH_PROFILE_NONE=y | |||
| 962 | # CONFIG_KMEMTRACE is not set | 1488 | # CONFIG_KMEMTRACE is not set |
| 963 | # CONFIG_WORKQUEUE_TRACER is not set | 1489 | # CONFIG_WORKQUEUE_TRACER is not set |
| 964 | # CONFIG_BLK_DEV_IO_TRACE is not set | 1490 | # CONFIG_BLK_DEV_IO_TRACE is not set |
| 1491 | # CONFIG_ATOMIC64_SELFTEST is not set | ||
| 965 | # CONFIG_SAMPLES is not set | 1492 | # CONFIG_SAMPLES is not set |
| 966 | CONFIG_HAVE_ARCH_KGDB=y | 1493 | CONFIG_HAVE_ARCH_KGDB=y |
| 967 | # CONFIG_KGDB is not set | 1494 | # CONFIG_KGDB is not set |
diff --git a/arch/arm/configs/s5p6440_defconfig b/arch/arm/configs/s5p6440_defconfig index 279a15e53114..532e987beb4d 100644 --- a/arch/arm/configs/s5p6440_defconfig +++ b/arch/arm/configs/s5p6440_defconfig | |||
| @@ -1,11 +1,14 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.33-rc2 | 3 | # Linux kernel version: 2.6.34 |
| 4 | # Sat Jan 9 16:33:55 2010 | 4 | # Wed May 26 19:04:32 2010 |
| 5 | # | 5 | # |
| 6 | CONFIG_ARM=y | 6 | CONFIG_ARM=y |
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y |
| 8 | CONFIG_GENERIC_GPIO=y | 8 | CONFIG_GENERIC_GPIO=y |
| 9 | CONFIG_GENERIC_TIME=y | ||
| 10 | CONFIG_ARCH_USES_GETTIMEOFFSET=y | ||
| 11 | CONFIG_HAVE_PROC_CPU=y | ||
| 9 | CONFIG_NO_IOPORT=y | 12 | CONFIG_NO_IOPORT=y |
| 10 | CONFIG_GENERIC_HARDIRQS=y | 13 | CONFIG_GENERIC_HARDIRQS=y |
| 11 | CONFIG_STACKTRACE_SUPPORT=y | 14 | CONFIG_STACKTRACE_SUPPORT=y |
| @@ -17,6 +20,7 @@ CONFIG_GENERIC_IRQ_PROBE=y | |||
| 17 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | 20 | CONFIG_RWSEM_GENERIC_SPINLOCK=y |
| 18 | CONFIG_GENERIC_HWEIGHT=y | 21 | CONFIG_GENERIC_HWEIGHT=y |
| 19 | CONFIG_GENERIC_CALIBRATE_DELAY=y | 22 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
| 23 | CONFIG_NEED_DMA_MAP_STATE=y | ||
| 20 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | 24 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y |
| 21 | CONFIG_VECTORS_BASE=0xffff0000 | 25 | CONFIG_VECTORS_BASE=0xffff0000 |
| 22 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | 26 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" |
| @@ -30,6 +34,13 @@ CONFIG_BROKEN_ON_SMP=y | |||
| 30 | CONFIG_INIT_ENV_ARG_LIMIT=32 | 34 | CONFIG_INIT_ENV_ARG_LIMIT=32 |
| 31 | CONFIG_LOCALVERSION="" | 35 | CONFIG_LOCALVERSION="" |
| 32 | CONFIG_LOCALVERSION_AUTO=y | 36 | CONFIG_LOCALVERSION_AUTO=y |
| 37 | CONFIG_HAVE_KERNEL_GZIP=y | ||
| 38 | CONFIG_HAVE_KERNEL_LZMA=y | ||
| 39 | CONFIG_HAVE_KERNEL_LZO=y | ||
| 40 | CONFIG_KERNEL_GZIP=y | ||
| 41 | # CONFIG_KERNEL_BZIP2 is not set | ||
| 42 | # CONFIG_KERNEL_LZMA is not set | ||
| 43 | # CONFIG_KERNEL_LZO is not set | ||
| 33 | CONFIG_SWAP=y | 44 | CONFIG_SWAP=y |
| 34 | # CONFIG_SYSVIPC is not set | 45 | # CONFIG_SYSVIPC is not set |
| 35 | # CONFIG_BSD_PROCESS_ACCT is not set | 46 | # CONFIG_BSD_PROCESS_ACCT is not set |
| @@ -46,7 +57,6 @@ CONFIG_RCU_FANOUT=32 | |||
| 46 | # CONFIG_TREE_RCU_TRACE is not set | 57 | # CONFIG_TREE_RCU_TRACE is not set |
| 47 | # CONFIG_IKCONFIG is not set | 58 | # CONFIG_IKCONFIG is not set |
| 48 | CONFIG_LOG_BUF_SHIFT=17 | 59 | CONFIG_LOG_BUF_SHIFT=17 |
| 49 | # CONFIG_GROUP_SCHED is not set | ||
| 50 | # CONFIG_CGROUPS is not set | 60 | # CONFIG_CGROUPS is not set |
| 51 | CONFIG_SYSFS_DEPRECATED=y | 61 | CONFIG_SYSFS_DEPRECATED=y |
| 52 | CONFIG_SYSFS_DEPRECATED_V2=y | 62 | CONFIG_SYSFS_DEPRECATED_V2=y |
| @@ -60,6 +70,7 @@ CONFIG_INITRAMFS_SOURCE="" | |||
| 60 | CONFIG_RD_GZIP=y | 70 | CONFIG_RD_GZIP=y |
| 61 | CONFIG_RD_BZIP2=y | 71 | CONFIG_RD_BZIP2=y |
| 62 | CONFIG_RD_LZMA=y | 72 | CONFIG_RD_LZMA=y |
| 73 | CONFIG_RD_LZO=y | ||
| 63 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | 74 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y |
| 64 | CONFIG_SYSCTL=y | 75 | CONFIG_SYSCTL=y |
| 65 | CONFIG_ANON_INODES=y | 76 | CONFIG_ANON_INODES=y |
| @@ -81,10 +92,14 @@ CONFIG_TIMERFD=y | |||
| 81 | CONFIG_EVENTFD=y | 92 | CONFIG_EVENTFD=y |
| 82 | CONFIG_SHMEM=y | 93 | CONFIG_SHMEM=y |
| 83 | CONFIG_AIO=y | 94 | CONFIG_AIO=y |
| 95 | CONFIG_HAVE_PERF_EVENTS=y | ||
| 96 | CONFIG_PERF_USE_VMALLOC=y | ||
| 84 | 97 | ||
| 85 | # | 98 | # |
| 86 | # Kernel Performance Events And Counters | 99 | # Kernel Performance Events And Counters |
| 87 | # | 100 | # |
| 101 | # CONFIG_PERF_EVENTS is not set | ||
| 102 | # CONFIG_PERF_COUNTERS is not set | ||
| 88 | CONFIG_VM_EVENT_COUNTERS=y | 103 | CONFIG_VM_EVENT_COUNTERS=y |
| 89 | CONFIG_SLUB_DEBUG=y | 104 | CONFIG_SLUB_DEBUG=y |
| 90 | CONFIG_COMPAT_BRK=y | 105 | CONFIG_COMPAT_BRK=y |
| @@ -166,8 +181,11 @@ CONFIG_MMU=y | |||
| 166 | # CONFIG_ARCH_INTEGRATOR is not set | 181 | # CONFIG_ARCH_INTEGRATOR is not set |
| 167 | # CONFIG_ARCH_REALVIEW is not set | 182 | # CONFIG_ARCH_REALVIEW is not set |
| 168 | # CONFIG_ARCH_VERSATILE is not set | 183 | # CONFIG_ARCH_VERSATILE is not set |
| 184 | # CONFIG_ARCH_VEXPRESS is not set | ||
| 169 | # CONFIG_ARCH_AT91 is not set | 185 | # CONFIG_ARCH_AT91 is not set |
| 186 | # CONFIG_ARCH_BCMRING is not set | ||
| 170 | # CONFIG_ARCH_CLPS711X is not set | 187 | # CONFIG_ARCH_CLPS711X is not set |
| 188 | # CONFIG_ARCH_CNS3XXX is not set | ||
| 171 | # CONFIG_ARCH_GEMINI is not set | 189 | # CONFIG_ARCH_GEMINI is not set |
| 172 | # CONFIG_ARCH_EBSA110 is not set | 190 | # CONFIG_ARCH_EBSA110 is not set |
| 173 | # CONFIG_ARCH_EP93XX is not set | 191 | # CONFIG_ARCH_EP93XX is not set |
| @@ -176,7 +194,6 @@ CONFIG_MMU=y | |||
| 176 | # CONFIG_ARCH_STMP3XXX is not set | 194 | # CONFIG_ARCH_STMP3XXX is not set |
| 177 | # CONFIG_ARCH_NETX is not set | 195 | # CONFIG_ARCH_NETX is not set |
| 178 | # CONFIG_ARCH_H720X is not set | 196 | # CONFIG_ARCH_H720X is not set |
| 179 | # CONFIG_ARCH_NOMADIK is not set | ||
| 180 | # CONFIG_ARCH_IOP13XX is not set | 197 | # CONFIG_ARCH_IOP13XX is not set |
| 181 | # CONFIG_ARCH_IOP32X is not set | 198 | # CONFIG_ARCH_IOP32X is not set |
| 182 | # CONFIG_ARCH_IOP33X is not set | 199 | # CONFIG_ARCH_IOP33X is not set |
| @@ -193,44 +210,56 @@ CONFIG_MMU=y | |||
| 193 | # CONFIG_ARCH_KS8695 is not set | 210 | # CONFIG_ARCH_KS8695 is not set |
| 194 | # CONFIG_ARCH_NS9XXX is not set | 211 | # CONFIG_ARCH_NS9XXX is not set |
| 195 | # CONFIG_ARCH_W90X900 is not set | 212 | # CONFIG_ARCH_W90X900 is not set |
| 213 | # CONFIG_ARCH_NUC93X is not set | ||
| 196 | # CONFIG_ARCH_PNX4008 is not set | 214 | # CONFIG_ARCH_PNX4008 is not set |
| 197 | # CONFIG_ARCH_PXA is not set | 215 | # CONFIG_ARCH_PXA is not set |
| 198 | # CONFIG_ARCH_MSM is not set | 216 | # CONFIG_ARCH_MSM is not set |
| 217 | # CONFIG_ARCH_SHMOBILE is not set | ||
| 199 | # CONFIG_ARCH_RPC is not set | 218 | # CONFIG_ARCH_RPC is not set |
| 200 | # CONFIG_ARCH_SA1100 is not set | 219 | # CONFIG_ARCH_SA1100 is not set |
| 201 | # CONFIG_ARCH_S3C2410 is not set | 220 | # CONFIG_ARCH_S3C2410 is not set |
| 202 | # CONFIG_ARCH_S3C64XX is not set | 221 | # CONFIG_ARCH_S3C64XX is not set |
| 203 | CONFIG_ARCH_S5P6440=y | 222 | CONFIG_ARCH_S5P6440=y |
| 204 | # CONFIG_ARCH_S5PC1XX is not set | 223 | # CONFIG_ARCH_S5P6442 is not set |
| 224 | # CONFIG_ARCH_S5PC100 is not set | ||
| 225 | # CONFIG_ARCH_S5PV210 is not set | ||
| 205 | # CONFIG_ARCH_SHARK is not set | 226 | # CONFIG_ARCH_SHARK is not set |
| 206 | # CONFIG_ARCH_LH7A40X is not set | 227 | # CONFIG_ARCH_LH7A40X is not set |
| 207 | # CONFIG_ARCH_U300 is not set | 228 | # CONFIG_ARCH_U300 is not set |
| 229 | # CONFIG_ARCH_U8500 is not set | ||
| 230 | # CONFIG_ARCH_NOMADIK is not set | ||
| 208 | # CONFIG_ARCH_DAVINCI is not set | 231 | # CONFIG_ARCH_DAVINCI is not set |
| 209 | # CONFIG_ARCH_OMAP is not set | 232 | # CONFIG_ARCH_OMAP is not set |
| 210 | # CONFIG_ARCH_BCMRING is not set | 233 | # CONFIG_PLAT_SPEAR is not set |
| 211 | # CONFIG_ARCH_U8500 is not set | ||
| 212 | CONFIG_PLAT_SAMSUNG=y | 234 | CONFIG_PLAT_SAMSUNG=y |
| 213 | CONFIG_SAMSUNG_CLKSRC=y | ||
| 214 | CONFIG_SAMSUNG_IRQ_VIC_TIMER=y | ||
| 215 | CONFIG_SAMSUNG_IRQ_UART=y | ||
| 216 | CONFIG_SAMSUNG_GPIO_EXTRA=0 | ||
| 217 | CONFIG_PLAT_S3C=y | ||
| 218 | 235 | ||
| 219 | # | 236 | # |
| 220 | # Boot options | 237 | # Boot options |
| 221 | # | 238 | # |
| 222 | CONFIG_S3C_BOOT_ERROR_RESET=y | 239 | CONFIG_S3C_BOOT_ERROR_RESET=y |
| 223 | CONFIG_S3C_BOOT_UART_FORCE_FIFO=y | 240 | CONFIG_S3C_BOOT_UART_FORCE_FIFO=y |
| 241 | CONFIG_S3C_LOWLEVEL_UART_PORT=1 | ||
| 242 | CONFIG_SAMSUNG_CLKSRC=y | ||
| 243 | CONFIG_SAMSUNG_IRQ_VIC_TIMER=y | ||
| 244 | CONFIG_SAMSUNG_IRQ_UART=y | ||
| 245 | CONFIG_SAMSUNG_GPIOLIB_4BIT=y | ||
| 246 | CONFIG_S3C_GPIO_CFG_S3C24XX=y | ||
| 247 | CONFIG_S3C_GPIO_CFG_S3C64XX=y | ||
| 248 | CONFIG_S3C_GPIO_PULL_UPDOWN=y | ||
| 249 | CONFIG_S5P_GPIO_DRVSTR=y | ||
| 250 | CONFIG_SAMSUNG_GPIO_EXTRA=0 | ||
| 251 | CONFIG_S3C_GPIO_SPACE=0 | ||
| 252 | CONFIG_S3C_GPIO_TRACK=y | ||
| 253 | # CONFIG_S3C_ADC is not set | ||
| 254 | CONFIG_S3C_DEV_WDT=y | ||
| 255 | CONFIG_SAMSUNG_DEV_ADC=y | ||
| 256 | CONFIG_SAMSUNG_DEV_TS=y | ||
| 257 | CONFIG_S3C_PL330_DMA=y | ||
| 224 | 258 | ||
| 225 | # | 259 | # |
| 226 | # Power management | 260 | # Power management |
| 227 | # | 261 | # |
| 228 | CONFIG_S3C_LOWLEVEL_UART_PORT=1 | ||
| 229 | CONFIG_S3C_GPIO_SPACE=0 | ||
| 230 | CONFIG_S3C_GPIO_TRACK=y | ||
| 231 | CONFIG_PLAT_S5P=y | 262 | CONFIG_PLAT_S5P=y |
| 232 | CONFIG_CPU_S5P6440_INIT=y | ||
| 233 | CONFIG_CPU_S5P6440_CLOCK=y | ||
| 234 | CONFIG_CPU_S5P6440=y | 263 | CONFIG_CPU_S5P6440=y |
| 235 | CONFIG_MACH_SMDK6440=y | 264 | CONFIG_MACH_SMDK6440=y |
| 236 | 265 | ||
| @@ -258,9 +287,12 @@ CONFIG_ARM_THUMB=y | |||
| 258 | # CONFIG_CPU_DCACHE_DISABLE is not set | 287 | # CONFIG_CPU_DCACHE_DISABLE is not set |
| 259 | # CONFIG_CPU_BPREDICT_DISABLE is not set | 288 | # CONFIG_CPU_BPREDICT_DISABLE is not set |
| 260 | CONFIG_ARM_L1_CACHE_SHIFT=5 | 289 | CONFIG_ARM_L1_CACHE_SHIFT=5 |
| 290 | CONFIG_ARM_DMA_MEM_BUFFERABLE=y | ||
| 291 | CONFIG_CPU_HAS_PMU=y | ||
| 261 | # CONFIG_ARM_ERRATA_411920 is not set | 292 | # CONFIG_ARM_ERRATA_411920 is not set |
| 262 | CONFIG_ARM_VIC=y | 293 | CONFIG_ARM_VIC=y |
| 263 | CONFIG_ARM_VIC_NR=2 | 294 | CONFIG_ARM_VIC_NR=2 |
| 295 | CONFIG_PL330=y | ||
| 264 | 296 | ||
| 265 | # | 297 | # |
| 266 | # Bus support | 298 | # Bus support |
| @@ -307,6 +339,7 @@ CONFIG_ALIGNMENT_TRAP=y | |||
| 307 | CONFIG_ZBOOT_ROM_TEXT=0 | 339 | CONFIG_ZBOOT_ROM_TEXT=0 |
| 308 | CONFIG_ZBOOT_ROM_BSS=0 | 340 | CONFIG_ZBOOT_ROM_BSS=0 |
| 309 | CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc" | 341 | CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc" |
| 342 | # CONFIG_CMDLINE_FORCE is not set | ||
| 310 | # CONFIG_XIP_KERNEL is not set | 343 | # CONFIG_XIP_KERNEL is not set |
| 311 | # CONFIG_KEXEC is not set | 344 | # CONFIG_KEXEC is not set |
| 312 | 345 | ||
| @@ -382,6 +415,7 @@ CONFIG_HAVE_IDE=y | |||
| 382 | # | 415 | # |
| 383 | # SCSI device support | 416 | # SCSI device support |
| 384 | # | 417 | # |
| 418 | CONFIG_SCSI_MOD=y | ||
| 385 | # CONFIG_RAID_ATTRS is not set | 419 | # CONFIG_RAID_ATTRS is not set |
| 386 | CONFIG_SCSI=y | 420 | CONFIG_SCSI=y |
| 387 | CONFIG_SCSI_DMA=y | 421 | CONFIG_SCSI_DMA=y |
| @@ -470,7 +504,9 @@ CONFIG_MOUSE_PS2_TRACKPOINT=y | |||
| 470 | CONFIG_INPUT_TOUCHSCREEN=y | 504 | CONFIG_INPUT_TOUCHSCREEN=y |
| 471 | # CONFIG_TOUCHSCREEN_AD7879 is not set | 505 | # CONFIG_TOUCHSCREEN_AD7879 is not set |
| 472 | # CONFIG_TOUCHSCREEN_DYNAPRO is not set | 506 | # CONFIG_TOUCHSCREEN_DYNAPRO is not set |
| 507 | # CONFIG_TOUCHSCREEN_HAMPSHIRE is not set | ||
| 473 | # CONFIG_TOUCHSCREEN_FUJITSU is not set | 508 | # CONFIG_TOUCHSCREEN_FUJITSU is not set |
| 509 | # CONFIG_TOUCHSCREEN_S3C2410 is not set | ||
| 474 | # CONFIG_TOUCHSCREEN_GUNZE is not set | 510 | # CONFIG_TOUCHSCREEN_GUNZE is not set |
| 475 | # CONFIG_TOUCHSCREEN_ELO is not set | 511 | # CONFIG_TOUCHSCREEN_ELO is not set |
| 476 | # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set | 512 | # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set |
| @@ -518,12 +554,16 @@ CONFIG_SERIAL_8250_RUNTIME_UARTS=3 | |||
| 518 | # Non-8250 serial port support | 554 | # Non-8250 serial port support |
| 519 | # | 555 | # |
| 520 | CONFIG_SERIAL_SAMSUNG=y | 556 | CONFIG_SERIAL_SAMSUNG=y |
| 557 | CONFIG_SERIAL_SAMSUNG_UARTS_4=y | ||
| 521 | CONFIG_SERIAL_SAMSUNG_UARTS=4 | 558 | CONFIG_SERIAL_SAMSUNG_UARTS=4 |
| 522 | # CONFIG_SERIAL_SAMSUNG_DEBUG is not set | 559 | # CONFIG_SERIAL_SAMSUNG_DEBUG is not set |
| 523 | CONFIG_SERIAL_SAMSUNG_CONSOLE=y | 560 | CONFIG_SERIAL_SAMSUNG_CONSOLE=y |
| 524 | CONFIG_SERIAL_S5P6440=y | 561 | CONFIG_SERIAL_S3C6400=y |
| 525 | CONFIG_SERIAL_CORE=y | 562 | CONFIG_SERIAL_CORE=y |
| 526 | CONFIG_SERIAL_CORE_CONSOLE=y | 563 | CONFIG_SERIAL_CORE_CONSOLE=y |
| 564 | # CONFIG_SERIAL_TIMBERDALE is not set | ||
| 565 | # CONFIG_SERIAL_ALTERA_JTAGUART is not set | ||
| 566 | # CONFIG_SERIAL_ALTERA_UART is not set | ||
| 527 | CONFIG_UNIX98_PTYS=y | 567 | CONFIG_UNIX98_PTYS=y |
| 528 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | 568 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set |
| 529 | CONFIG_LEGACY_PTYS=y | 569 | CONFIG_LEGACY_PTYS=y |
| @@ -549,6 +589,7 @@ CONFIG_GPIOLIB=y | |||
| 549 | # | 589 | # |
| 550 | # Memory mapped GPIO expanders: | 590 | # Memory mapped GPIO expanders: |
| 551 | # | 591 | # |
| 592 | # CONFIG_GPIO_IT8761E is not set | ||
| 552 | 593 | ||
| 553 | # | 594 | # |
| 554 | # I2C GPIO expanders: | 595 | # I2C GPIO expanders: |
| @@ -570,6 +611,7 @@ CONFIG_GPIOLIB=y | |||
| 570 | # CONFIG_HWMON is not set | 611 | # CONFIG_HWMON is not set |
| 571 | # CONFIG_THERMAL is not set | 612 | # CONFIG_THERMAL is not set |
| 572 | # CONFIG_WATCHDOG is not set | 613 | # CONFIG_WATCHDOG is not set |
| 614 | CONFIG_HAVE_S3C2410_WATCHDOG=y | ||
| 573 | CONFIG_SSB_POSSIBLE=y | 615 | CONFIG_SSB_POSSIBLE=y |
| 574 | 616 | ||
| 575 | # | 617 | # |
| @@ -626,10 +668,6 @@ CONFIG_RTC_LIB=y | |||
| 626 | # CONFIG_DMADEVICES is not set | 668 | # CONFIG_DMADEVICES is not set |
| 627 | # CONFIG_AUXDISPLAY is not set | 669 | # CONFIG_AUXDISPLAY is not set |
| 628 | # CONFIG_UIO is not set | 670 | # CONFIG_UIO is not set |
| 629 | |||
| 630 | # | ||
| 631 | # TI VLYNQ | ||
| 632 | # | ||
| 633 | # CONFIG_STAGING is not set | 671 | # CONFIG_STAGING is not set |
| 634 | 672 | ||
| 635 | # | 673 | # |
| @@ -704,6 +742,7 @@ CONFIG_MISC_FILESYSTEMS=y | |||
| 704 | # CONFIG_BEFS_FS is not set | 742 | # CONFIG_BEFS_FS is not set |
| 705 | # CONFIG_BFS_FS is not set | 743 | # CONFIG_BFS_FS is not set |
| 706 | # CONFIG_EFS_FS is not set | 744 | # CONFIG_EFS_FS is not set |
| 745 | # CONFIG_LOGFS is not set | ||
| 707 | CONFIG_CRAMFS=y | 746 | CONFIG_CRAMFS=y |
| 708 | # CONFIG_SQUASHFS is not set | 747 | # CONFIG_SQUASHFS is not set |
| 709 | # CONFIG_VXFS_FS is not set | 748 | # CONFIG_VXFS_FS is not set |
| @@ -826,6 +865,7 @@ CONFIG_HAVE_FUNCTION_TRACER=y | |||
| 826 | CONFIG_TRACING_SUPPORT=y | 865 | CONFIG_TRACING_SUPPORT=y |
| 827 | CONFIG_FTRACE=y | 866 | CONFIG_FTRACE=y |
| 828 | # CONFIG_FUNCTION_TRACER is not set | 867 | # CONFIG_FUNCTION_TRACER is not set |
| 868 | # CONFIG_IRQSOFF_TRACER is not set | ||
| 829 | # CONFIG_SCHED_TRACER is not set | 869 | # CONFIG_SCHED_TRACER is not set |
| 830 | # CONFIG_ENABLE_DEFAULT_TRACERS is not set | 870 | # CONFIG_ENABLE_DEFAULT_TRACERS is not set |
| 831 | # CONFIG_BOOT_TRACER is not set | 871 | # CONFIG_BOOT_TRACER is not set |
| @@ -836,6 +876,7 @@ CONFIG_BRANCH_PROFILE_NONE=y | |||
| 836 | # CONFIG_KMEMTRACE is not set | 876 | # CONFIG_KMEMTRACE is not set |
| 837 | # CONFIG_WORKQUEUE_TRACER is not set | 877 | # CONFIG_WORKQUEUE_TRACER is not set |
| 838 | # CONFIG_BLK_DEV_IO_TRACE is not set | 878 | # CONFIG_BLK_DEV_IO_TRACE is not set |
| 879 | # CONFIG_ATOMIC64_SELFTEST is not set | ||
| 839 | # CONFIG_SAMPLES is not set | 880 | # CONFIG_SAMPLES is not set |
| 840 | CONFIG_HAVE_ARCH_KGDB=y | 881 | CONFIG_HAVE_ARCH_KGDB=y |
| 841 | # CONFIG_KGDB is not set | 882 | # CONFIG_KGDB is not set |
| @@ -962,8 +1003,10 @@ CONFIG_CRC32=y | |||
| 962 | # CONFIG_CRC7 is not set | 1003 | # CONFIG_CRC7 is not set |
| 963 | # CONFIG_LIBCRC32C is not set | 1004 | # CONFIG_LIBCRC32C is not set |
| 964 | CONFIG_ZLIB_INFLATE=y | 1005 | CONFIG_ZLIB_INFLATE=y |
| 1006 | CONFIG_LZO_DECOMPRESS=y | ||
| 965 | CONFIG_DECOMPRESS_GZIP=y | 1007 | CONFIG_DECOMPRESS_GZIP=y |
| 966 | CONFIG_DECOMPRESS_BZIP2=y | 1008 | CONFIG_DECOMPRESS_BZIP2=y |
| 967 | CONFIG_DECOMPRESS_LZMA=y | 1009 | CONFIG_DECOMPRESS_LZMA=y |
| 1010 | CONFIG_DECOMPRESS_LZO=y | ||
| 968 | CONFIG_HAS_IOMEM=y | 1011 | CONFIG_HAS_IOMEM=y |
| 969 | CONFIG_HAS_DMA=y | 1012 | CONFIG_HAS_DMA=y |
diff --git a/arch/arm/configs/s5p6442_defconfig b/arch/arm/configs/s5p6442_defconfig index 74e20bfc0487..068219b360f5 100644 --- a/arch/arm/configs/s5p6442_defconfig +++ b/arch/arm/configs/s5p6442_defconfig | |||
| @@ -1,11 +1,14 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.33-rc4 | 3 | # Linux kernel version: 2.6.34 |
| 4 | # Mon Jan 25 08:50:28 2010 | 4 | # Wed May 26 19:04:34 2010 |
| 5 | # | 5 | # |
| 6 | CONFIG_ARM=y | 6 | CONFIG_ARM=y |
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y |
| 8 | CONFIG_GENERIC_GPIO=y | 8 | CONFIG_GENERIC_GPIO=y |
| 9 | CONFIG_GENERIC_TIME=y | ||
| 10 | CONFIG_ARCH_USES_GETTIMEOFFSET=y | ||
| 11 | CONFIG_HAVE_PROC_CPU=y | ||
| 9 | CONFIG_NO_IOPORT=y | 12 | CONFIG_NO_IOPORT=y |
| 10 | CONFIG_GENERIC_HARDIRQS=y | 13 | CONFIG_GENERIC_HARDIRQS=y |
| 11 | CONFIG_STACKTRACE_SUPPORT=y | 14 | CONFIG_STACKTRACE_SUPPORT=y |
| @@ -17,6 +20,7 @@ CONFIG_GENERIC_IRQ_PROBE=y | |||
| 17 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | 20 | CONFIG_RWSEM_GENERIC_SPINLOCK=y |
| 18 | CONFIG_GENERIC_HWEIGHT=y | 21 | CONFIG_GENERIC_HWEIGHT=y |
| 19 | CONFIG_GENERIC_CALIBRATE_DELAY=y | 22 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
| 23 | CONFIG_NEED_DMA_MAP_STATE=y | ||
| 20 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | 24 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y |
| 21 | CONFIG_VECTORS_BASE=0xffff0000 | 25 | CONFIG_VECTORS_BASE=0xffff0000 |
| 22 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | 26 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" |
| @@ -31,6 +35,7 @@ CONFIG_INIT_ENV_ARG_LIMIT=32 | |||
| 31 | CONFIG_LOCALVERSION="" | 35 | CONFIG_LOCALVERSION="" |
| 32 | CONFIG_LOCALVERSION_AUTO=y | 36 | CONFIG_LOCALVERSION_AUTO=y |
| 33 | CONFIG_HAVE_KERNEL_GZIP=y | 37 | CONFIG_HAVE_KERNEL_GZIP=y |
| 38 | CONFIG_HAVE_KERNEL_LZMA=y | ||
| 34 | CONFIG_HAVE_KERNEL_LZO=y | 39 | CONFIG_HAVE_KERNEL_LZO=y |
| 35 | CONFIG_KERNEL_GZIP=y | 40 | CONFIG_KERNEL_GZIP=y |
| 36 | # CONFIG_KERNEL_BZIP2 is not set | 41 | # CONFIG_KERNEL_BZIP2 is not set |
| @@ -52,7 +57,6 @@ CONFIG_RCU_FANOUT=32 | |||
| 52 | # CONFIG_TREE_RCU_TRACE is not set | 57 | # CONFIG_TREE_RCU_TRACE is not set |
| 53 | # CONFIG_IKCONFIG is not set | 58 | # CONFIG_IKCONFIG is not set |
| 54 | CONFIG_LOG_BUF_SHIFT=17 | 59 | CONFIG_LOG_BUF_SHIFT=17 |
| 55 | # CONFIG_GROUP_SCHED is not set | ||
| 56 | # CONFIG_CGROUPS is not set | 60 | # CONFIG_CGROUPS is not set |
| 57 | CONFIG_SYSFS_DEPRECATED=y | 61 | CONFIG_SYSFS_DEPRECATED=y |
| 58 | CONFIG_SYSFS_DEPRECATED_V2=y | 62 | CONFIG_SYSFS_DEPRECATED_V2=y |
| @@ -88,10 +92,14 @@ CONFIG_TIMERFD=y | |||
| 88 | CONFIG_EVENTFD=y | 92 | CONFIG_EVENTFD=y |
| 89 | CONFIG_SHMEM=y | 93 | CONFIG_SHMEM=y |
| 90 | CONFIG_AIO=y | 94 | CONFIG_AIO=y |
| 95 | CONFIG_HAVE_PERF_EVENTS=y | ||
| 96 | CONFIG_PERF_USE_VMALLOC=y | ||
| 91 | 97 | ||
| 92 | # | 98 | # |
| 93 | # Kernel Performance Events And Counters | 99 | # Kernel Performance Events And Counters |
| 94 | # | 100 | # |
| 101 | # CONFIG_PERF_EVENTS is not set | ||
| 102 | # CONFIG_PERF_COUNTERS is not set | ||
| 95 | CONFIG_VM_EVENT_COUNTERS=y | 103 | CONFIG_VM_EVENT_COUNTERS=y |
| 96 | CONFIG_SLUB_DEBUG=y | 104 | CONFIG_SLUB_DEBUG=y |
| 97 | CONFIG_COMPAT_BRK=y | 105 | CONFIG_COMPAT_BRK=y |
| @@ -173,8 +181,11 @@ CONFIG_MMU=y | |||
| 173 | # CONFIG_ARCH_INTEGRATOR is not set | 181 | # CONFIG_ARCH_INTEGRATOR is not set |
| 174 | # CONFIG_ARCH_REALVIEW is not set | 182 | # CONFIG_ARCH_REALVIEW is not set |
| 175 | # CONFIG_ARCH_VERSATILE is not set | 183 | # CONFIG_ARCH_VERSATILE is not set |
| 184 | # CONFIG_ARCH_VEXPRESS is not set | ||
| 176 | # CONFIG_ARCH_AT91 is not set | 185 | # CONFIG_ARCH_AT91 is not set |
| 186 | # CONFIG_ARCH_BCMRING is not set | ||
| 177 | # CONFIG_ARCH_CLPS711X is not set | 187 | # CONFIG_ARCH_CLPS711X is not set |
| 188 | # CONFIG_ARCH_CNS3XXX is not set | ||
| 178 | # CONFIG_ARCH_GEMINI is not set | 189 | # CONFIG_ARCH_GEMINI is not set |
| 179 | # CONFIG_ARCH_EBSA110 is not set | 190 | # CONFIG_ARCH_EBSA110 is not set |
| 180 | # CONFIG_ARCH_EP93XX is not set | 191 | # CONFIG_ARCH_EP93XX is not set |
| @@ -183,7 +194,6 @@ CONFIG_MMU=y | |||
| 183 | # CONFIG_ARCH_STMP3XXX is not set | 194 | # CONFIG_ARCH_STMP3XXX is not set |
| 184 | # CONFIG_ARCH_NETX is not set | 195 | # CONFIG_ARCH_NETX is not set |
| 185 | # CONFIG_ARCH_H720X is not set | 196 | # CONFIG_ARCH_H720X is not set |
| 186 | # CONFIG_ARCH_NOMADIK is not set | ||
| 187 | # CONFIG_ARCH_IOP13XX is not set | 197 | # CONFIG_ARCH_IOP13XX is not set |
| 188 | # CONFIG_ARCH_IOP32X is not set | 198 | # CONFIG_ARCH_IOP32X is not set |
| 189 | # CONFIG_ARCH_IOP33X is not set | 199 | # CONFIG_ARCH_IOP33X is not set |
| @@ -200,24 +210,35 @@ CONFIG_MMU=y | |||
| 200 | # CONFIG_ARCH_KS8695 is not set | 210 | # CONFIG_ARCH_KS8695 is not set |
| 201 | # CONFIG_ARCH_NS9XXX is not set | 211 | # CONFIG_ARCH_NS9XXX is not set |
| 202 | # CONFIG_ARCH_W90X900 is not set | 212 | # CONFIG_ARCH_W90X900 is not set |
| 213 | # CONFIG_ARCH_NUC93X is not set | ||
| 203 | # CONFIG_ARCH_PNX4008 is not set | 214 | # CONFIG_ARCH_PNX4008 is not set |
| 204 | # CONFIG_ARCH_PXA is not set | 215 | # CONFIG_ARCH_PXA is not set |
| 205 | # CONFIG_ARCH_MSM is not set | 216 | # CONFIG_ARCH_MSM is not set |
| 217 | # CONFIG_ARCH_SHMOBILE is not set | ||
| 206 | # CONFIG_ARCH_RPC is not set | 218 | # CONFIG_ARCH_RPC is not set |
| 207 | # CONFIG_ARCH_SA1100 is not set | 219 | # CONFIG_ARCH_SA1100 is not set |
| 208 | # CONFIG_ARCH_S3C2410 is not set | 220 | # CONFIG_ARCH_S3C2410 is not set |
| 209 | # CONFIG_ARCH_S3C64XX is not set | 221 | # CONFIG_ARCH_S3C64XX is not set |
| 210 | # CONFIG_ARCH_S5P6440 is not set | 222 | # CONFIG_ARCH_S5P6440 is not set |
| 211 | CONFIG_ARCH_S5P6442=y | 223 | CONFIG_ARCH_S5P6442=y |
| 212 | # CONFIG_ARCH_S5PC1XX is not set | 224 | # CONFIG_ARCH_S5PC100 is not set |
| 225 | # CONFIG_ARCH_S5PV210 is not set | ||
| 213 | # CONFIG_ARCH_SHARK is not set | 226 | # CONFIG_ARCH_SHARK is not set |
| 214 | # CONFIG_ARCH_LH7A40X is not set | 227 | # CONFIG_ARCH_LH7A40X is not set |
| 215 | # CONFIG_ARCH_U300 is not set | 228 | # CONFIG_ARCH_U300 is not set |
| 229 | # CONFIG_ARCH_U8500 is not set | ||
| 230 | # CONFIG_ARCH_NOMADIK is not set | ||
| 216 | # CONFIG_ARCH_DAVINCI is not set | 231 | # CONFIG_ARCH_DAVINCI is not set |
| 217 | # CONFIG_ARCH_OMAP is not set | 232 | # CONFIG_ARCH_OMAP is not set |
| 218 | # CONFIG_ARCH_BCMRING is not set | 233 | # CONFIG_PLAT_SPEAR is not set |
| 219 | # CONFIG_ARCH_U8500 is not set | ||
| 220 | CONFIG_PLAT_SAMSUNG=y | 234 | CONFIG_PLAT_SAMSUNG=y |
| 235 | |||
| 236 | # | ||
| 237 | # Boot options | ||
| 238 | # | ||
| 239 | # CONFIG_S3C_BOOT_ERROR_RESET is not set | ||
| 240 | CONFIG_S3C_BOOT_UART_FORCE_FIFO=y | ||
| 241 | CONFIG_S3C_LOWLEVEL_UART_PORT=1 | ||
| 221 | CONFIG_SAMSUNG_CLKSRC=y | 242 | CONFIG_SAMSUNG_CLKSRC=y |
| 222 | CONFIG_SAMSUNG_IRQ_VIC_TIMER=y | 243 | CONFIG_SAMSUNG_IRQ_VIC_TIMER=y |
| 223 | CONFIG_SAMSUNG_IRQ_UART=y | 244 | CONFIG_SAMSUNG_IRQ_UART=y |
| @@ -225,22 +246,16 @@ CONFIG_SAMSUNG_GPIOLIB_4BIT=y | |||
| 225 | CONFIG_S3C_GPIO_CFG_S3C24XX=y | 246 | CONFIG_S3C_GPIO_CFG_S3C24XX=y |
| 226 | CONFIG_S3C_GPIO_CFG_S3C64XX=y | 247 | CONFIG_S3C_GPIO_CFG_S3C64XX=y |
| 227 | CONFIG_S3C_GPIO_PULL_UPDOWN=y | 248 | CONFIG_S3C_GPIO_PULL_UPDOWN=y |
| 249 | CONFIG_S5P_GPIO_DRVSTR=y | ||
| 228 | CONFIG_SAMSUNG_GPIO_EXTRA=0 | 250 | CONFIG_SAMSUNG_GPIO_EXTRA=0 |
| 251 | CONFIG_S3C_GPIO_SPACE=0 | ||
| 252 | CONFIG_S3C_GPIO_TRACK=y | ||
| 229 | # CONFIG_S3C_ADC is not set | 253 | # CONFIG_S3C_ADC is not set |
| 254 | CONFIG_S3C_PL330_DMA=y | ||
| 230 | 255 | ||
| 231 | # | 256 | # |
| 232 | # Power management | 257 | # Power management |
| 233 | # | 258 | # |
| 234 | CONFIG_PLAT_S3C=y | ||
| 235 | |||
| 236 | # | ||
| 237 | # Boot options | ||
| 238 | # | ||
| 239 | # CONFIG_S3C_BOOT_ERROR_RESET is not set | ||
| 240 | CONFIG_S3C_BOOT_UART_FORCE_FIFO=y | ||
| 241 | CONFIG_S3C_LOWLEVEL_UART_PORT=1 | ||
| 242 | CONFIG_S3C_GPIO_SPACE=0 | ||
| 243 | CONFIG_S3C_GPIO_TRACK=y | ||
| 244 | CONFIG_PLAT_S5P=y | 259 | CONFIG_PLAT_S5P=y |
| 245 | CONFIG_CPU_S5P6442=y | 260 | CONFIG_CPU_S5P6442=y |
| 246 | CONFIG_MACH_SMDK6442=y | 261 | CONFIG_MACH_SMDK6442=y |
| @@ -269,9 +284,12 @@ CONFIG_ARM_THUMB=y | |||
| 269 | # CONFIG_CPU_DCACHE_DISABLE is not set | 284 | # CONFIG_CPU_DCACHE_DISABLE is not set |
| 270 | # CONFIG_CPU_BPREDICT_DISABLE is not set | 285 | # CONFIG_CPU_BPREDICT_DISABLE is not set |
| 271 | CONFIG_ARM_L1_CACHE_SHIFT=5 | 286 | CONFIG_ARM_L1_CACHE_SHIFT=5 |
| 287 | CONFIG_ARM_DMA_MEM_BUFFERABLE=y | ||
| 288 | CONFIG_CPU_HAS_PMU=y | ||
| 272 | # CONFIG_ARM_ERRATA_411920 is not set | 289 | # CONFIG_ARM_ERRATA_411920 is not set |
| 273 | CONFIG_ARM_VIC=y | 290 | CONFIG_ARM_VIC=y |
| 274 | CONFIG_ARM_VIC_NR=2 | 291 | CONFIG_ARM_VIC_NR=2 |
| 292 | CONFIG_PL330=y | ||
| 275 | 293 | ||
| 276 | # | 294 | # |
| 277 | # Bus support | 295 | # Bus support |
| @@ -318,6 +336,7 @@ CONFIG_ALIGNMENT_TRAP=y | |||
| 318 | CONFIG_ZBOOT_ROM_TEXT=0 | 336 | CONFIG_ZBOOT_ROM_TEXT=0 |
| 319 | CONFIG_ZBOOT_ROM_BSS=0 | 337 | CONFIG_ZBOOT_ROM_BSS=0 |
| 320 | CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc" | 338 | CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc" |
| 339 | # CONFIG_CMDLINE_FORCE is not set | ||
| 321 | # CONFIG_XIP_KERNEL is not set | 340 | # CONFIG_XIP_KERNEL is not set |
| 322 | # CONFIG_KEXEC is not set | 341 | # CONFIG_KEXEC is not set |
| 323 | 342 | ||
| @@ -394,6 +413,7 @@ CONFIG_HAVE_IDE=y | |||
| 394 | # | 413 | # |
| 395 | # SCSI device support | 414 | # SCSI device support |
| 396 | # | 415 | # |
| 416 | CONFIG_SCSI_MOD=y | ||
| 397 | # CONFIG_RAID_ATTRS is not set | 417 | # CONFIG_RAID_ATTRS is not set |
| 398 | CONFIG_SCSI=y | 418 | CONFIG_SCSI=y |
| 399 | CONFIG_SCSI_DMA=y | 419 | CONFIG_SCSI_DMA=y |
| @@ -462,6 +482,7 @@ CONFIG_INPUT_EVDEV=y | |||
| 462 | CONFIG_INPUT_TOUCHSCREEN=y | 482 | CONFIG_INPUT_TOUCHSCREEN=y |
| 463 | # CONFIG_TOUCHSCREEN_AD7879 is not set | 483 | # CONFIG_TOUCHSCREEN_AD7879 is not set |
| 464 | # CONFIG_TOUCHSCREEN_DYNAPRO is not set | 484 | # CONFIG_TOUCHSCREEN_DYNAPRO is not set |
| 485 | # CONFIG_TOUCHSCREEN_HAMPSHIRE is not set | ||
| 465 | # CONFIG_TOUCHSCREEN_FUJITSU is not set | 486 | # CONFIG_TOUCHSCREEN_FUJITSU is not set |
| 466 | # CONFIG_TOUCHSCREEN_GUNZE is not set | 487 | # CONFIG_TOUCHSCREEN_GUNZE is not set |
| 467 | # CONFIG_TOUCHSCREEN_ELO is not set | 488 | # CONFIG_TOUCHSCREEN_ELO is not set |
| @@ -515,6 +536,9 @@ CONFIG_SERIAL_SAMSUNG_CONSOLE=y | |||
| 515 | CONFIG_SERIAL_S5PV210=y | 536 | CONFIG_SERIAL_S5PV210=y |
| 516 | CONFIG_SERIAL_CORE=y | 537 | CONFIG_SERIAL_CORE=y |
| 517 | CONFIG_SERIAL_CORE_CONSOLE=y | 538 | CONFIG_SERIAL_CORE_CONSOLE=y |
| 539 | # CONFIG_SERIAL_TIMBERDALE is not set | ||
| 540 | # CONFIG_SERIAL_ALTERA_JTAGUART is not set | ||
| 541 | # CONFIG_SERIAL_ALTERA_UART is not set | ||
| 518 | CONFIG_UNIX98_PTYS=y | 542 | CONFIG_UNIX98_PTYS=y |
| 519 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | 543 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set |
| 520 | CONFIG_LEGACY_PTYS=y | 544 | CONFIG_LEGACY_PTYS=y |
| @@ -540,6 +564,7 @@ CONFIG_GPIOLIB=y | |||
| 540 | # | 564 | # |
| 541 | # Memory mapped GPIO expanders: | 565 | # Memory mapped GPIO expanders: |
| 542 | # | 566 | # |
| 567 | # CONFIG_GPIO_IT8761E is not set | ||
| 543 | 568 | ||
| 544 | # | 569 | # |
| 545 | # I2C GPIO expanders: | 570 | # I2C GPIO expanders: |
| @@ -613,10 +638,6 @@ CONFIG_RTC_LIB=y | |||
| 613 | # CONFIG_DMADEVICES is not set | 638 | # CONFIG_DMADEVICES is not set |
| 614 | # CONFIG_AUXDISPLAY is not set | 639 | # CONFIG_AUXDISPLAY is not set |
| 615 | # CONFIG_UIO is not set | 640 | # CONFIG_UIO is not set |
| 616 | |||
| 617 | # | ||
| 618 | # TI VLYNQ | ||
| 619 | # | ||
| 620 | # CONFIG_STAGING is not set | 641 | # CONFIG_STAGING is not set |
| 621 | 642 | ||
| 622 | # | 643 | # |
| @@ -685,6 +706,7 @@ CONFIG_MISC_FILESYSTEMS=y | |||
| 685 | # CONFIG_BEFS_FS is not set | 706 | # CONFIG_BEFS_FS is not set |
| 686 | # CONFIG_BFS_FS is not set | 707 | # CONFIG_BFS_FS is not set |
| 687 | # CONFIG_EFS_FS is not set | 708 | # CONFIG_EFS_FS is not set |
| 709 | # CONFIG_LOGFS is not set | ||
| 688 | CONFIG_CRAMFS=y | 710 | CONFIG_CRAMFS=y |
| 689 | # CONFIG_SQUASHFS is not set | 711 | # CONFIG_SQUASHFS is not set |
| 690 | # CONFIG_VXFS_FS is not set | 712 | # CONFIG_VXFS_FS is not set |
| @@ -824,6 +846,7 @@ CONFIG_HAVE_FUNCTION_TRACER=y | |||
| 824 | CONFIG_TRACING_SUPPORT=y | 846 | CONFIG_TRACING_SUPPORT=y |
| 825 | CONFIG_FTRACE=y | 847 | CONFIG_FTRACE=y |
| 826 | # CONFIG_FUNCTION_TRACER is not set | 848 | # CONFIG_FUNCTION_TRACER is not set |
| 849 | # CONFIG_IRQSOFF_TRACER is not set | ||
| 827 | # CONFIG_SCHED_TRACER is not set | 850 | # CONFIG_SCHED_TRACER is not set |
| 828 | # CONFIG_ENABLE_DEFAULT_TRACERS is not set | 851 | # CONFIG_ENABLE_DEFAULT_TRACERS is not set |
| 829 | # CONFIG_BOOT_TRACER is not set | 852 | # CONFIG_BOOT_TRACER is not set |
| @@ -834,6 +857,7 @@ CONFIG_BRANCH_PROFILE_NONE=y | |||
| 834 | # CONFIG_KMEMTRACE is not set | 857 | # CONFIG_KMEMTRACE is not set |
| 835 | # CONFIG_WORKQUEUE_TRACER is not set | 858 | # CONFIG_WORKQUEUE_TRACER is not set |
| 836 | # CONFIG_BLK_DEV_IO_TRACE is not set | 859 | # CONFIG_BLK_DEV_IO_TRACE is not set |
| 860 | # CONFIG_ATOMIC64_SELFTEST is not set | ||
| 837 | # CONFIG_SAMPLES is not set | 861 | # CONFIG_SAMPLES is not set |
| 838 | CONFIG_HAVE_ARCH_KGDB=y | 862 | CONFIG_HAVE_ARCH_KGDB=y |
| 839 | # CONFIG_KGDB is not set | 863 | # CONFIG_KGDB is not set |
diff --git a/arch/arm/configs/s5pc100_defconfig b/arch/arm/configs/s5pc100_defconfig index dc108afc060c..ebc6245b9fca 100644 --- a/arch/arm/configs/s5pc100_defconfig +++ b/arch/arm/configs/s5pc100_defconfig | |||
| @@ -1,12 +1,14 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.30 | 3 | # Linux kernel version: 2.6.34 |
| 4 | # Wed Jul 1 15:53:07 2009 | 4 | # Wed May 26 19:04:35 2010 |
| 5 | # | 5 | # |
| 6 | CONFIG_ARM=y | 6 | CONFIG_ARM=y |
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y |
| 8 | CONFIG_GENERIC_GPIO=y | 8 | CONFIG_GENERIC_GPIO=y |
| 9 | CONFIG_MMU=y | 9 | CONFIG_GENERIC_TIME=y |
| 10 | CONFIG_ARCH_USES_GETTIMEOFFSET=y | ||
| 11 | CONFIG_HAVE_PROC_CPU=y | ||
| 10 | CONFIG_NO_IOPORT=y | 12 | CONFIG_NO_IOPORT=y |
| 11 | CONFIG_GENERIC_HARDIRQS=y | 13 | CONFIG_GENERIC_HARDIRQS=y |
| 12 | CONFIG_STACKTRACE_SUPPORT=y | 14 | CONFIG_STACKTRACE_SUPPORT=y |
| @@ -18,7 +20,9 @@ CONFIG_GENERIC_IRQ_PROBE=y | |||
| 18 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | 20 | CONFIG_RWSEM_GENERIC_SPINLOCK=y |
| 19 | CONFIG_GENERIC_HWEIGHT=y | 21 | CONFIG_GENERIC_HWEIGHT=y |
| 20 | CONFIG_GENERIC_CALIBRATE_DELAY=y | 22 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
| 23 | CONFIG_NEED_DMA_MAP_STATE=y | ||
| 21 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | 24 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y |
| 25 | CONFIG_ARM_L1_CACHE_SHIFT_6=y | ||
| 22 | CONFIG_VECTORS_BASE=0xffff0000 | 26 | CONFIG_VECTORS_BASE=0xffff0000 |
| 23 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | 27 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" |
| 24 | CONFIG_CONSTRUCTORS=y | 28 | CONFIG_CONSTRUCTORS=y |
| @@ -31,6 +35,13 @@ CONFIG_BROKEN_ON_SMP=y | |||
| 31 | CONFIG_INIT_ENV_ARG_LIMIT=32 | 35 | CONFIG_INIT_ENV_ARG_LIMIT=32 |
| 32 | CONFIG_LOCALVERSION="" | 36 | CONFIG_LOCALVERSION="" |
| 33 | CONFIG_LOCALVERSION_AUTO=y | 37 | CONFIG_LOCALVERSION_AUTO=y |
| 38 | CONFIG_HAVE_KERNEL_GZIP=y | ||
| 39 | CONFIG_HAVE_KERNEL_LZMA=y | ||
| 40 | CONFIG_HAVE_KERNEL_LZO=y | ||
| 41 | CONFIG_KERNEL_GZIP=y | ||
| 42 | # CONFIG_KERNEL_BZIP2 is not set | ||
| 43 | # CONFIG_KERNEL_LZMA is not set | ||
| 44 | # CONFIG_KERNEL_LZO is not set | ||
| 34 | CONFIG_SWAP=y | 45 | CONFIG_SWAP=y |
| 35 | # CONFIG_SYSVIPC is not set | 46 | # CONFIG_SYSVIPC is not set |
| 36 | # CONFIG_BSD_PROCESS_ACCT is not set | 47 | # CONFIG_BSD_PROCESS_ACCT is not set |
| @@ -38,14 +49,15 @@ CONFIG_SWAP=y | |||
| 38 | # | 49 | # |
| 39 | # RCU Subsystem | 50 | # RCU Subsystem |
| 40 | # | 51 | # |
| 41 | CONFIG_CLASSIC_RCU=y | 52 | CONFIG_TREE_RCU=y |
| 42 | # CONFIG_TREE_RCU is not set | 53 | # CONFIG_TREE_PREEMPT_RCU is not set |
| 43 | # CONFIG_PREEMPT_RCU is not set | 54 | # CONFIG_TINY_RCU is not set |
| 55 | # CONFIG_RCU_TRACE is not set | ||
| 56 | CONFIG_RCU_FANOUT=32 | ||
| 57 | # CONFIG_RCU_FANOUT_EXACT is not set | ||
| 44 | # CONFIG_TREE_RCU_TRACE is not set | 58 | # CONFIG_TREE_RCU_TRACE is not set |
| 45 | # CONFIG_PREEMPT_RCU_TRACE is not set | ||
| 46 | # CONFIG_IKCONFIG is not set | 59 | # CONFIG_IKCONFIG is not set |
| 47 | CONFIG_LOG_BUF_SHIFT=17 | 60 | CONFIG_LOG_BUF_SHIFT=17 |
| 48 | # CONFIG_GROUP_SCHED is not set | ||
| 49 | # CONFIG_CGROUPS is not set | 61 | # CONFIG_CGROUPS is not set |
| 50 | CONFIG_SYSFS_DEPRECATED=y | 62 | CONFIG_SYSFS_DEPRECATED=y |
| 51 | CONFIG_SYSFS_DEPRECATED_V2=y | 63 | CONFIG_SYSFS_DEPRECATED_V2=y |
| @@ -59,6 +71,7 @@ CONFIG_INITRAMFS_SOURCE="" | |||
| 59 | CONFIG_RD_GZIP=y | 71 | CONFIG_RD_GZIP=y |
| 60 | CONFIG_RD_BZIP2=y | 72 | CONFIG_RD_BZIP2=y |
| 61 | CONFIG_RD_LZMA=y | 73 | CONFIG_RD_LZMA=y |
| 74 | CONFIG_RD_LZO=y | ||
| 62 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | 75 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y |
| 63 | CONFIG_SYSCTL=y | 76 | CONFIG_SYSCTL=y |
| 64 | CONFIG_ANON_INODES=y | 77 | CONFIG_ANON_INODES=y |
| @@ -80,19 +93,21 @@ CONFIG_TIMERFD=y | |||
| 80 | CONFIG_EVENTFD=y | 93 | CONFIG_EVENTFD=y |
| 81 | CONFIG_SHMEM=y | 94 | CONFIG_SHMEM=y |
| 82 | CONFIG_AIO=y | 95 | CONFIG_AIO=y |
| 96 | CONFIG_HAVE_PERF_EVENTS=y | ||
| 97 | CONFIG_PERF_USE_VMALLOC=y | ||
| 83 | 98 | ||
| 84 | # | 99 | # |
| 85 | # Performance Counters | 100 | # Kernel Performance Events And Counters |
| 86 | # | 101 | # |
| 102 | # CONFIG_PERF_EVENTS is not set | ||
| 103 | # CONFIG_PERF_COUNTERS is not set | ||
| 87 | CONFIG_VM_EVENT_COUNTERS=y | 104 | CONFIG_VM_EVENT_COUNTERS=y |
| 88 | CONFIG_SLUB_DEBUG=y | 105 | CONFIG_SLUB_DEBUG=y |
| 89 | # CONFIG_STRIP_ASM_SYMS is not set | ||
| 90 | CONFIG_COMPAT_BRK=y | 106 | CONFIG_COMPAT_BRK=y |
| 91 | # CONFIG_SLAB is not set | 107 | # CONFIG_SLAB is not set |
| 92 | CONFIG_SLUB=y | 108 | CONFIG_SLUB=y |
| 93 | # CONFIG_SLOB is not set | 109 | # CONFIG_SLOB is not set |
| 94 | # CONFIG_PROFILING is not set | 110 | # CONFIG_PROFILING is not set |
| 95 | # CONFIG_MARKERS is not set | ||
| 96 | CONFIG_HAVE_OPROFILE=y | 111 | CONFIG_HAVE_OPROFILE=y |
| 97 | # CONFIG_KPROBES is not set | 112 | # CONFIG_KPROBES is not set |
| 98 | CONFIG_HAVE_KPROBES=y | 113 | CONFIG_HAVE_KPROBES=y |
| @@ -122,25 +137,56 @@ CONFIG_LBDAF=y | |||
| 122 | # IO Schedulers | 137 | # IO Schedulers |
| 123 | # | 138 | # |
| 124 | CONFIG_IOSCHED_NOOP=y | 139 | CONFIG_IOSCHED_NOOP=y |
| 125 | CONFIG_IOSCHED_AS=y | ||
| 126 | CONFIG_IOSCHED_DEADLINE=y | 140 | CONFIG_IOSCHED_DEADLINE=y |
| 127 | CONFIG_IOSCHED_CFQ=y | 141 | CONFIG_IOSCHED_CFQ=y |
| 128 | # CONFIG_DEFAULT_AS is not set | ||
| 129 | # CONFIG_DEFAULT_DEADLINE is not set | 142 | # CONFIG_DEFAULT_DEADLINE is not set |
| 130 | CONFIG_DEFAULT_CFQ=y | 143 | CONFIG_DEFAULT_CFQ=y |
| 131 | # CONFIG_DEFAULT_NOOP is not set | 144 | # CONFIG_DEFAULT_NOOP is not set |
| 132 | CONFIG_DEFAULT_IOSCHED="cfq" | 145 | CONFIG_DEFAULT_IOSCHED="cfq" |
| 146 | # CONFIG_INLINE_SPIN_TRYLOCK is not set | ||
| 147 | # CONFIG_INLINE_SPIN_TRYLOCK_BH is not set | ||
| 148 | # CONFIG_INLINE_SPIN_LOCK is not set | ||
| 149 | # CONFIG_INLINE_SPIN_LOCK_BH is not set | ||
| 150 | # CONFIG_INLINE_SPIN_LOCK_IRQ is not set | ||
| 151 | # CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set | ||
| 152 | # CONFIG_INLINE_SPIN_UNLOCK is not set | ||
| 153 | # CONFIG_INLINE_SPIN_UNLOCK_BH is not set | ||
| 154 | # CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set | ||
| 155 | # CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set | ||
| 156 | # CONFIG_INLINE_READ_TRYLOCK is not set | ||
| 157 | # CONFIG_INLINE_READ_LOCK is not set | ||
| 158 | # CONFIG_INLINE_READ_LOCK_BH is not set | ||
| 159 | # CONFIG_INLINE_READ_LOCK_IRQ is not set | ||
| 160 | # CONFIG_INLINE_READ_LOCK_IRQSAVE is not set | ||
| 161 | # CONFIG_INLINE_READ_UNLOCK is not set | ||
| 162 | # CONFIG_INLINE_READ_UNLOCK_BH is not set | ||
| 163 | # CONFIG_INLINE_READ_UNLOCK_IRQ is not set | ||
| 164 | # CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set | ||
| 165 | # CONFIG_INLINE_WRITE_TRYLOCK is not set | ||
| 166 | # CONFIG_INLINE_WRITE_LOCK is not set | ||
| 167 | # CONFIG_INLINE_WRITE_LOCK_BH is not set | ||
| 168 | # CONFIG_INLINE_WRITE_LOCK_IRQ is not set | ||
| 169 | # CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set | ||
| 170 | # CONFIG_INLINE_WRITE_UNLOCK is not set | ||
| 171 | # CONFIG_INLINE_WRITE_UNLOCK_BH is not set | ||
| 172 | # CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set | ||
| 173 | # CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set | ||
| 174 | # CONFIG_MUTEX_SPIN_ON_OWNER is not set | ||
| 133 | # CONFIG_FREEZER is not set | 175 | # CONFIG_FREEZER is not set |
| 134 | 176 | ||
| 135 | # | 177 | # |
| 136 | # System Type | 178 | # System Type |
| 137 | # | 179 | # |
| 180 | CONFIG_MMU=y | ||
| 138 | # CONFIG_ARCH_AAEC2000 is not set | 181 | # CONFIG_ARCH_AAEC2000 is not set |
| 139 | # CONFIG_ARCH_INTEGRATOR is not set | 182 | # CONFIG_ARCH_INTEGRATOR is not set |
| 140 | # CONFIG_ARCH_REALVIEW is not set | 183 | # CONFIG_ARCH_REALVIEW is not set |
| 141 | # CONFIG_ARCH_VERSATILE is not set | 184 | # CONFIG_ARCH_VERSATILE is not set |
| 185 | # CONFIG_ARCH_VEXPRESS is not set | ||
| 142 | # CONFIG_ARCH_AT91 is not set | 186 | # CONFIG_ARCH_AT91 is not set |
| 187 | # CONFIG_ARCH_BCMRING is not set | ||
| 143 | # CONFIG_ARCH_CLPS711X is not set | 188 | # CONFIG_ARCH_CLPS711X is not set |
| 189 | # CONFIG_ARCH_CNS3XXX is not set | ||
| 144 | # CONFIG_ARCH_GEMINI is not set | 190 | # CONFIG_ARCH_GEMINI is not set |
| 145 | # CONFIG_ARCH_EBSA110 is not set | 191 | # CONFIG_ARCH_EBSA110 is not set |
| 146 | # CONFIG_ARCH_EP93XX is not set | 192 | # CONFIG_ARCH_EP93XX is not set |
| @@ -156,6 +202,7 @@ CONFIG_DEFAULT_IOSCHED="cfq" | |||
| 156 | # CONFIG_ARCH_IXP2000 is not set | 202 | # CONFIG_ARCH_IXP2000 is not set |
| 157 | # CONFIG_ARCH_IXP4XX is not set | 203 | # CONFIG_ARCH_IXP4XX is not set |
| 158 | # CONFIG_ARCH_L7200 is not set | 204 | # CONFIG_ARCH_L7200 is not set |
| 205 | # CONFIG_ARCH_DOVE is not set | ||
| 159 | # CONFIG_ARCH_KIRKWOOD is not set | 206 | # CONFIG_ARCH_KIRKWOOD is not set |
| 160 | # CONFIG_ARCH_LOKI is not set | 207 | # CONFIG_ARCH_LOKI is not set |
| 161 | # CONFIG_ARCH_MV78XX0 is not set | 208 | # CONFIG_ARCH_MV78XX0 is not set |
| @@ -164,39 +211,64 @@ CONFIG_DEFAULT_IOSCHED="cfq" | |||
| 164 | # CONFIG_ARCH_KS8695 is not set | 211 | # CONFIG_ARCH_KS8695 is not set |
| 165 | # CONFIG_ARCH_NS9XXX is not set | 212 | # CONFIG_ARCH_NS9XXX is not set |
| 166 | # CONFIG_ARCH_W90X900 is not set | 213 | # CONFIG_ARCH_W90X900 is not set |
| 214 | # CONFIG_ARCH_NUC93X is not set | ||
| 167 | # CONFIG_ARCH_PNX4008 is not set | 215 | # CONFIG_ARCH_PNX4008 is not set |
| 168 | # CONFIG_ARCH_PXA is not set | 216 | # CONFIG_ARCH_PXA is not set |
| 169 | # CONFIG_ARCH_MSM is not set | 217 | # CONFIG_ARCH_MSM is not set |
| 218 | # CONFIG_ARCH_SHMOBILE is not set | ||
| 170 | # CONFIG_ARCH_RPC is not set | 219 | # CONFIG_ARCH_RPC is not set |
| 171 | # CONFIG_ARCH_SA1100 is not set | 220 | # CONFIG_ARCH_SA1100 is not set |
| 172 | # CONFIG_ARCH_S3C2410 is not set | 221 | # CONFIG_ARCH_S3C2410 is not set |
| 173 | # CONFIG_ARCH_S3C64XX is not set | 222 | # CONFIG_ARCH_S3C64XX is not set |
| 174 | CONFIG_ARCH_S5PC1XX=y | 223 | # CONFIG_ARCH_S5P6440 is not set |
| 224 | # CONFIG_ARCH_S5P6442 is not set | ||
| 225 | CONFIG_ARCH_S5PC100=y | ||
| 226 | # CONFIG_ARCH_S5PV210 is not set | ||
| 175 | # CONFIG_ARCH_SHARK is not set | 227 | # CONFIG_ARCH_SHARK is not set |
| 176 | # CONFIG_ARCH_LH7A40X is not set | 228 | # CONFIG_ARCH_LH7A40X is not set |
| 177 | # CONFIG_ARCH_U300 is not set | 229 | # CONFIG_ARCH_U300 is not set |
| 230 | # CONFIG_ARCH_U8500 is not set | ||
| 231 | # CONFIG_ARCH_NOMADIK is not set | ||
| 178 | # CONFIG_ARCH_DAVINCI is not set | 232 | # CONFIG_ARCH_DAVINCI is not set |
| 179 | # CONFIG_ARCH_OMAP is not set | 233 | # CONFIG_ARCH_OMAP is not set |
| 180 | CONFIG_PLAT_S3C=y | 234 | # CONFIG_PLAT_SPEAR is not set |
| 235 | CONFIG_PLAT_SAMSUNG=y | ||
| 181 | 236 | ||
| 182 | # | 237 | # |
| 183 | # Boot options | 238 | # Boot options |
| 184 | # | 239 | # |
| 185 | # CONFIG_S3C_BOOT_ERROR_RESET is not set | 240 | # CONFIG_S3C_BOOT_ERROR_RESET is not set |
| 186 | CONFIG_S3C_BOOT_UART_FORCE_FIFO=y | 241 | CONFIG_S3C_BOOT_UART_FORCE_FIFO=y |
| 242 | CONFIG_S3C_LOWLEVEL_UART_PORT=0 | ||
| 243 | CONFIG_SAMSUNG_CLKSRC=y | ||
| 244 | CONFIG_SAMSUNG_IRQ_VIC_TIMER=y | ||
| 245 | CONFIG_SAMSUNG_IRQ_UART=y | ||
| 246 | CONFIG_SAMSUNG_GPIOLIB_4BIT=y | ||
| 247 | CONFIG_S3C_GPIO_CFG_S3C24XX=y | ||
| 248 | CONFIG_S3C_GPIO_CFG_S3C64XX=y | ||
| 249 | CONFIG_S3C_GPIO_PULL_UPDOWN=y | ||
| 250 | CONFIG_S5P_GPIO_DRVSTR=y | ||
| 251 | CONFIG_SAMSUNG_GPIO_EXTRA=0 | ||
| 252 | CONFIG_S3C_GPIO_SPACE=0 | ||
| 253 | CONFIG_S3C_GPIO_TRACK=y | ||
| 254 | # CONFIG_S3C_ADC is not set | ||
| 255 | CONFIG_S3C_DEV_HSMMC=y | ||
| 256 | CONFIG_S3C_DEV_HSMMC1=y | ||
| 257 | CONFIG_S3C_DEV_HSMMC2=y | ||
| 258 | CONFIG_S3C_DEV_I2C1=y | ||
| 259 | CONFIG_S3C_DEV_FB=y | ||
| 260 | CONFIG_S3C_PL330_DMA=y | ||
| 187 | 261 | ||
| 188 | # | 262 | # |
| 189 | # Power management | 263 | # Power management |
| 190 | # | 264 | # |
| 191 | CONFIG_S3C_LOWLEVEL_UART_PORT=0 | 265 | CONFIG_PLAT_S5P=y |
| 192 | CONFIG_S3C_GPIO_SPACE=0 | 266 | CONFIG_S5P_EXT_INT=y |
| 193 | CONFIG_S3C_GPIO_TRACK=y | ||
| 194 | CONFIG_S3C_GPIO_PULL_UPDOWN=y | ||
| 195 | CONFIG_PLAT_S5PC1XX=y | ||
| 196 | CONFIG_CPU_S5PC100_INIT=y | ||
| 197 | CONFIG_CPU_S5PC100_CLOCK=y | ||
| 198 | CONFIG_S5PC100_SETUP_I2C0=y | ||
| 199 | CONFIG_CPU_S5PC100=y | 267 | CONFIG_CPU_S5PC100=y |
| 268 | CONFIG_S5PC100_SETUP_FB_24BPP=y | ||
| 269 | CONFIG_S5PC100_SETUP_I2C1=y | ||
| 270 | CONFIG_S5PC100_SETUP_SDHCI=y | ||
| 271 | CONFIG_S5PC100_SETUP_SDHCI_GPIO=y | ||
| 200 | CONFIG_MACH_SMDKC100=y | 272 | CONFIG_MACH_SMDKC100=y |
| 201 | 273 | ||
| 202 | # | 274 | # |
| @@ -206,7 +278,7 @@ CONFIG_CPU_32v6K=y | |||
| 206 | CONFIG_CPU_V7=y | 278 | CONFIG_CPU_V7=y |
| 207 | CONFIG_CPU_32v7=y | 279 | CONFIG_CPU_32v7=y |
| 208 | CONFIG_CPU_ABRT_EV7=y | 280 | CONFIG_CPU_ABRT_EV7=y |
| 209 | CONFIG_CPU_PABRT_IFAR=y | 281 | CONFIG_CPU_PABRT_V7=y |
| 210 | CONFIG_CPU_CACHE_V7=y | 282 | CONFIG_CPU_CACHE_V7=y |
| 211 | CONFIG_CPU_CACHE_VIPT=y | 283 | CONFIG_CPU_CACHE_VIPT=y |
| 212 | CONFIG_CPU_COPY_V6=y | 284 | CONFIG_CPU_COPY_V6=y |
| @@ -224,11 +296,15 @@ CONFIG_ARM_THUMB=y | |||
| 224 | # CONFIG_CPU_DCACHE_DISABLE is not set | 296 | # CONFIG_CPU_DCACHE_DISABLE is not set |
| 225 | # CONFIG_CPU_BPREDICT_DISABLE is not set | 297 | # CONFIG_CPU_BPREDICT_DISABLE is not set |
| 226 | CONFIG_HAS_TLS_REG=y | 298 | CONFIG_HAS_TLS_REG=y |
| 299 | CONFIG_ARM_L1_CACHE_SHIFT=6 | ||
| 300 | CONFIG_ARM_DMA_MEM_BUFFERABLE=y | ||
| 301 | CONFIG_CPU_HAS_PMU=y | ||
| 227 | # CONFIG_ARM_ERRATA_430973 is not set | 302 | # CONFIG_ARM_ERRATA_430973 is not set |
| 228 | # CONFIG_ARM_ERRATA_458693 is not set | 303 | # CONFIG_ARM_ERRATA_458693 is not set |
| 229 | # CONFIG_ARM_ERRATA_460075 is not set | 304 | # CONFIG_ARM_ERRATA_460075 is not set |
| 230 | CONFIG_ARM_VIC=y | 305 | CONFIG_ARM_VIC=y |
| 231 | CONFIG_ARM_VIC_NR=2 | 306 | CONFIG_ARM_VIC_NR=2 |
| 307 | CONFIG_PL330=y | ||
| 232 | 308 | ||
| 233 | # | 309 | # |
| 234 | # Bus support | 310 | # Bus support |
| @@ -244,8 +320,11 @@ CONFIG_VMSPLIT_3G=y | |||
| 244 | # CONFIG_VMSPLIT_2G is not set | 320 | # CONFIG_VMSPLIT_2G is not set |
| 245 | # CONFIG_VMSPLIT_1G is not set | 321 | # CONFIG_VMSPLIT_1G is not set |
| 246 | CONFIG_PAGE_OFFSET=0xC0000000 | 322 | CONFIG_PAGE_OFFSET=0xC0000000 |
| 323 | CONFIG_PREEMPT_NONE=y | ||
| 324 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
| 247 | # CONFIG_PREEMPT is not set | 325 | # CONFIG_PREEMPT is not set |
| 248 | CONFIG_HZ=100 | 326 | CONFIG_HZ=100 |
| 327 | # CONFIG_THUMB2_KERNEL is not set | ||
| 249 | CONFIG_AEABI=y | 328 | CONFIG_AEABI=y |
| 250 | CONFIG_OABI_COMPAT=y | 329 | CONFIG_OABI_COMPAT=y |
| 251 | # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set | 330 | # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set |
| @@ -258,12 +337,11 @@ CONFIG_FLATMEM_MANUAL=y | |||
| 258 | CONFIG_FLATMEM=y | 337 | CONFIG_FLATMEM=y |
| 259 | CONFIG_FLAT_NODE_MEM_MAP=y | 338 | CONFIG_FLAT_NODE_MEM_MAP=y |
| 260 | CONFIG_PAGEFLAGS_EXTENDED=y | 339 | CONFIG_PAGEFLAGS_EXTENDED=y |
| 261 | CONFIG_SPLIT_PTLOCK_CPUS=4 | 340 | CONFIG_SPLIT_PTLOCK_CPUS=999999 |
| 262 | # CONFIG_PHYS_ADDR_T_64BIT is not set | 341 | # CONFIG_PHYS_ADDR_T_64BIT is not set |
| 263 | CONFIG_ZONE_DMA_FLAG=0 | 342 | CONFIG_ZONE_DMA_FLAG=0 |
| 264 | CONFIG_VIRT_TO_BUS=y | 343 | CONFIG_VIRT_TO_BUS=y |
| 265 | CONFIG_HAVE_MLOCK=y | 344 | # CONFIG_KSM is not set |
| 266 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | ||
| 267 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | 345 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 |
| 268 | CONFIG_ALIGNMENT_TRAP=y | 346 | CONFIG_ALIGNMENT_TRAP=y |
| 269 | # CONFIG_UACCESS_WITH_MEMCPY is not set | 347 | # CONFIG_UACCESS_WITH_MEMCPY is not set |
| @@ -274,6 +352,7 @@ CONFIG_ALIGNMENT_TRAP=y | |||
| 274 | CONFIG_ZBOOT_ROM_TEXT=0 | 352 | CONFIG_ZBOOT_ROM_TEXT=0 |
| 275 | CONFIG_ZBOOT_ROM_BSS=0 | 353 | CONFIG_ZBOOT_ROM_BSS=0 |
| 276 | CONFIG_CMDLINE="root=/dev/mtdblock2 rootfstype=cramfs init=/linuxrc console=ttySAC2,115200 mem=128M" | 354 | CONFIG_CMDLINE="root=/dev/mtdblock2 rootfstype=cramfs init=/linuxrc console=ttySAC2,115200 mem=128M" |
| 355 | # CONFIG_CMDLINE_FORCE is not set | ||
| 277 | # CONFIG_XIP_KERNEL is not set | 356 | # CONFIG_XIP_KERNEL is not set |
| 278 | # CONFIG_KEXEC is not set | 357 | # CONFIG_KEXEC is not set |
| 279 | 358 | ||
| @@ -317,6 +396,7 @@ CONFIG_ARCH_SUSPEND_POSSIBLE=y | |||
| 317 | # Generic Driver Options | 396 | # Generic Driver Options |
| 318 | # | 397 | # |
| 319 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 398 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 399 | # CONFIG_DEVTMPFS is not set | ||
| 320 | CONFIG_STANDALONE=y | 400 | CONFIG_STANDALONE=y |
| 321 | CONFIG_PREVENT_FIRMWARE_BUILD=y | 401 | CONFIG_PREVENT_FIRMWARE_BUILD=y |
| 322 | CONFIG_FW_LOADER=y | 402 | CONFIG_FW_LOADER=y |
| @@ -331,6 +411,10 @@ CONFIG_BLK_DEV=y | |||
| 331 | # CONFIG_BLK_DEV_COW_COMMON is not set | 411 | # CONFIG_BLK_DEV_COW_COMMON is not set |
| 332 | CONFIG_BLK_DEV_LOOP=y | 412 | CONFIG_BLK_DEV_LOOP=y |
| 333 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | 413 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set |
| 414 | |||
| 415 | # | ||
| 416 | # DRBD disabled because PROC_FS, INET or CONNECTOR not selected | ||
| 417 | # | ||
| 334 | CONFIG_BLK_DEV_RAM=y | 418 | CONFIG_BLK_DEV_RAM=y |
| 335 | CONFIG_BLK_DEV_RAM_COUNT=16 | 419 | CONFIG_BLK_DEV_RAM_COUNT=16 |
| 336 | CONFIG_BLK_DEV_RAM_SIZE=8192 | 420 | CONFIG_BLK_DEV_RAM_SIZE=8192 |
| @@ -338,9 +422,12 @@ CONFIG_BLK_DEV_RAM_SIZE=8192 | |||
| 338 | # CONFIG_CDROM_PKTCDVD is not set | 422 | # CONFIG_CDROM_PKTCDVD is not set |
| 339 | # CONFIG_MG_DISK is not set | 423 | # CONFIG_MG_DISK is not set |
| 340 | CONFIG_MISC_DEVICES=y | 424 | CONFIG_MISC_DEVICES=y |
| 425 | # CONFIG_AD525X_DPOT is not set | ||
| 341 | # CONFIG_ICS932S401 is not set | 426 | # CONFIG_ICS932S401 is not set |
| 342 | # CONFIG_ENCLOSURE_SERVICES is not set | 427 | # CONFIG_ENCLOSURE_SERVICES is not set |
| 343 | # CONFIG_ISL29003 is not set | 428 | # CONFIG_ISL29003 is not set |
| 429 | # CONFIG_SENSORS_TSL2550 is not set | ||
| 430 | # CONFIG_DS1682 is not set | ||
| 344 | # CONFIG_C2PORT is not set | 431 | # CONFIG_C2PORT is not set |
| 345 | 432 | ||
| 346 | # | 433 | # |
| @@ -350,18 +437,21 @@ CONFIG_EEPROM_AT24=y | |||
| 350 | # CONFIG_EEPROM_LEGACY is not set | 437 | # CONFIG_EEPROM_LEGACY is not set |
| 351 | # CONFIG_EEPROM_MAX6875 is not set | 438 | # CONFIG_EEPROM_MAX6875 is not set |
| 352 | # CONFIG_EEPROM_93CX6 is not set | 439 | # CONFIG_EEPROM_93CX6 is not set |
| 440 | # CONFIG_IWMC3200TOP is not set | ||
| 353 | CONFIG_HAVE_IDE=y | 441 | CONFIG_HAVE_IDE=y |
| 354 | # CONFIG_IDE is not set | 442 | # CONFIG_IDE is not set |
| 355 | 443 | ||
| 356 | # | 444 | # |
| 357 | # SCSI device support | 445 | # SCSI device support |
| 358 | # | 446 | # |
| 447 | CONFIG_SCSI_MOD=y | ||
| 359 | # CONFIG_RAID_ATTRS is not set | 448 | # CONFIG_RAID_ATTRS is not set |
| 360 | # CONFIG_SCSI is not set | 449 | # CONFIG_SCSI is not set |
| 361 | # CONFIG_SCSI_DMA is not set | 450 | # CONFIG_SCSI_DMA is not set |
| 362 | # CONFIG_SCSI_NETLINK is not set | 451 | # CONFIG_SCSI_NETLINK is not set |
| 363 | # CONFIG_ATA is not set | 452 | # CONFIG_ATA is not set |
| 364 | # CONFIG_MD is not set | 453 | # CONFIG_MD is not set |
| 454 | # CONFIG_PHONE is not set | ||
| 365 | 455 | ||
| 366 | # | 456 | # |
| 367 | # Input device support | 457 | # Input device support |
| @@ -369,6 +459,7 @@ CONFIG_HAVE_IDE=y | |||
| 369 | CONFIG_INPUT=y | 459 | CONFIG_INPUT=y |
| 370 | # CONFIG_INPUT_FF_MEMLESS is not set | 460 | # CONFIG_INPUT_FF_MEMLESS is not set |
| 371 | # CONFIG_INPUT_POLLDEV is not set | 461 | # CONFIG_INPUT_POLLDEV is not set |
| 462 | # CONFIG_INPUT_SPARSEKMAP is not set | ||
| 372 | 463 | ||
| 373 | # | 464 | # |
| 374 | # Userland interfaces | 465 | # Userland interfaces |
| @@ -385,13 +476,19 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | |||
| 385 | # Input Device Drivers | 476 | # Input Device Drivers |
| 386 | # | 477 | # |
| 387 | CONFIG_INPUT_KEYBOARD=y | 478 | CONFIG_INPUT_KEYBOARD=y |
| 479 | # CONFIG_KEYBOARD_ADP5588 is not set | ||
| 388 | CONFIG_KEYBOARD_ATKBD=y | 480 | CONFIG_KEYBOARD_ATKBD=y |
| 389 | # CONFIG_KEYBOARD_SUNKBD is not set | 481 | # CONFIG_QT2160 is not set |
| 390 | # CONFIG_KEYBOARD_LKKBD is not set | 482 | # CONFIG_KEYBOARD_LKKBD is not set |
| 391 | # CONFIG_KEYBOARD_XTKBD is not set | 483 | # CONFIG_KEYBOARD_GPIO is not set |
| 484 | # CONFIG_KEYBOARD_TCA6416 is not set | ||
| 485 | # CONFIG_KEYBOARD_MATRIX is not set | ||
| 486 | # CONFIG_KEYBOARD_MAX7359 is not set | ||
| 392 | # CONFIG_KEYBOARD_NEWTON is not set | 487 | # CONFIG_KEYBOARD_NEWTON is not set |
| 488 | # CONFIG_KEYBOARD_OPENCORES is not set | ||
| 393 | # CONFIG_KEYBOARD_STOWAWAY is not set | 489 | # CONFIG_KEYBOARD_STOWAWAY is not set |
| 394 | # CONFIG_KEYBOARD_GPIO is not set | 490 | # CONFIG_KEYBOARD_SUNKBD is not set |
| 491 | # CONFIG_KEYBOARD_XTKBD is not set | ||
| 395 | CONFIG_INPUT_MOUSE=y | 492 | CONFIG_INPUT_MOUSE=y |
| 396 | CONFIG_MOUSE_PS2=y | 493 | CONFIG_MOUSE_PS2=y |
| 397 | CONFIG_MOUSE_PS2_ALPS=y | 494 | CONFIG_MOUSE_PS2_ALPS=y |
| @@ -399,6 +496,7 @@ CONFIG_MOUSE_PS2_LOGIPS2PP=y | |||
| 399 | CONFIG_MOUSE_PS2_SYNAPTICS=y | 496 | CONFIG_MOUSE_PS2_SYNAPTICS=y |
| 400 | CONFIG_MOUSE_PS2_TRACKPOINT=y | 497 | CONFIG_MOUSE_PS2_TRACKPOINT=y |
| 401 | # CONFIG_MOUSE_PS2_ELANTECH is not set | 498 | # CONFIG_MOUSE_PS2_ELANTECH is not set |
| 499 | # CONFIG_MOUSE_PS2_SENTELIC is not set | ||
| 402 | # CONFIG_MOUSE_PS2_TOUCHKIT is not set | 500 | # CONFIG_MOUSE_PS2_TOUCHKIT is not set |
| 403 | # CONFIG_MOUSE_SERIAL is not set | 501 | # CONFIG_MOUSE_SERIAL is not set |
| 404 | # CONFIG_MOUSE_APPLETOUCH is not set | 502 | # CONFIG_MOUSE_APPLETOUCH is not set |
| @@ -418,6 +516,7 @@ CONFIG_SERIO=y | |||
| 418 | CONFIG_SERIO_SERPORT=y | 516 | CONFIG_SERIO_SERPORT=y |
| 419 | CONFIG_SERIO_LIBPS2=y | 517 | CONFIG_SERIO_LIBPS2=y |
| 420 | # CONFIG_SERIO_RAW is not set | 518 | # CONFIG_SERIO_RAW is not set |
| 519 | # CONFIG_SERIO_ALTERA_PS2 is not set | ||
| 421 | # CONFIG_GAMEPORT is not set | 520 | # CONFIG_GAMEPORT is not set |
| 422 | 521 | ||
| 423 | # | 522 | # |
| @@ -444,11 +543,16 @@ CONFIG_SERIAL_8250_RUNTIME_UARTS=4 | |||
| 444 | # Non-8250 serial port support | 543 | # Non-8250 serial port support |
| 445 | # | 544 | # |
| 446 | CONFIG_SERIAL_SAMSUNG=y | 545 | CONFIG_SERIAL_SAMSUNG=y |
| 447 | CONFIG_SERIAL_SAMSUNG_UARTS=3 | 546 | CONFIG_SERIAL_SAMSUNG_UARTS_4=y |
| 547 | CONFIG_SERIAL_SAMSUNG_UARTS=4 | ||
| 448 | # CONFIG_SERIAL_SAMSUNG_DEBUG is not set | 548 | # CONFIG_SERIAL_SAMSUNG_DEBUG is not set |
| 449 | CONFIG_SERIAL_SAMSUNG_CONSOLE=y | 549 | CONFIG_SERIAL_SAMSUNG_CONSOLE=y |
| 550 | CONFIG_SERIAL_S3C6400=y | ||
| 450 | CONFIG_SERIAL_CORE=y | 551 | CONFIG_SERIAL_CORE=y |
| 451 | CONFIG_SERIAL_CORE_CONSOLE=y | 552 | CONFIG_SERIAL_CORE_CONSOLE=y |
| 553 | # CONFIG_SERIAL_TIMBERDALE is not set | ||
| 554 | # CONFIG_SERIAL_ALTERA_JTAGUART is not set | ||
| 555 | # CONFIG_SERIAL_ALTERA_UART is not set | ||
| 452 | CONFIG_UNIX98_PTYS=y | 556 | CONFIG_UNIX98_PTYS=y |
| 453 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | 557 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set |
| 454 | CONFIG_LEGACY_PTYS=y | 558 | CONFIG_LEGACY_PTYS=y |
| @@ -461,6 +565,7 @@ CONFIG_HW_RANDOM=y | |||
| 461 | # CONFIG_TCG_TPM is not set | 565 | # CONFIG_TCG_TPM is not set |
| 462 | CONFIG_I2C=y | 566 | CONFIG_I2C=y |
| 463 | CONFIG_I2C_BOARDINFO=y | 567 | CONFIG_I2C_BOARDINFO=y |
| 568 | CONFIG_I2C_COMPAT=y | ||
| 464 | CONFIG_I2C_CHARDEV=y | 569 | CONFIG_I2C_CHARDEV=y |
| 465 | CONFIG_I2C_HELPER_AUTO=y | 570 | CONFIG_I2C_HELPER_AUTO=y |
| 466 | 571 | ||
| @@ -471,9 +576,11 @@ CONFIG_I2C_HELPER_AUTO=y | |||
| 471 | # | 576 | # |
| 472 | # I2C system bus drivers (mostly embedded / system-on-chip) | 577 | # I2C system bus drivers (mostly embedded / system-on-chip) |
| 473 | # | 578 | # |
| 579 | # CONFIG_I2C_DESIGNWARE is not set | ||
| 474 | # CONFIG_I2C_GPIO is not set | 580 | # CONFIG_I2C_GPIO is not set |
| 475 | # CONFIG_I2C_OCORES is not set | 581 | # CONFIG_I2C_OCORES is not set |
| 476 | # CONFIG_I2C_SIMTEC is not set | 582 | # CONFIG_I2C_SIMTEC is not set |
| 583 | # CONFIG_I2C_XILINX is not set | ||
| 477 | 584 | ||
| 478 | # | 585 | # |
| 479 | # External I2C/SMBus adapter drivers | 586 | # External I2C/SMBus adapter drivers |
| @@ -486,20 +593,15 @@ CONFIG_I2C_HELPER_AUTO=y | |||
| 486 | # | 593 | # |
| 487 | # CONFIG_I2C_PCA_PLATFORM is not set | 594 | # CONFIG_I2C_PCA_PLATFORM is not set |
| 488 | # CONFIG_I2C_STUB is not set | 595 | # CONFIG_I2C_STUB is not set |
| 489 | |||
| 490 | # | ||
| 491 | # Miscellaneous I2C Chip support | ||
| 492 | # | ||
| 493 | # CONFIG_DS1682 is not set | ||
| 494 | # CONFIG_SENSORS_PCF8574 is not set | ||
| 495 | # CONFIG_PCF8575 is not set | ||
| 496 | # CONFIG_SENSORS_PCA9539 is not set | ||
| 497 | # CONFIG_SENSORS_TSL2550 is not set | ||
| 498 | # CONFIG_I2C_DEBUG_CORE is not set | 596 | # CONFIG_I2C_DEBUG_CORE is not set |
| 499 | # CONFIG_I2C_DEBUG_ALGO is not set | 597 | # CONFIG_I2C_DEBUG_ALGO is not set |
| 500 | # CONFIG_I2C_DEBUG_BUS is not set | 598 | # CONFIG_I2C_DEBUG_BUS is not set |
| 501 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
| 502 | # CONFIG_SPI is not set | 599 | # CONFIG_SPI is not set |
| 600 | |||
| 601 | # | ||
| 602 | # PPS support | ||
| 603 | # | ||
| 604 | # CONFIG_PPS is not set | ||
| 503 | CONFIG_ARCH_REQUIRE_GPIOLIB=y | 605 | CONFIG_ARCH_REQUIRE_GPIOLIB=y |
| 504 | CONFIG_GPIOLIB=y | 606 | CONFIG_GPIOLIB=y |
| 505 | # CONFIG_DEBUG_GPIO is not set | 607 | # CONFIG_DEBUG_GPIO is not set |
| @@ -508,13 +610,16 @@ CONFIG_GPIOLIB=y | |||
| 508 | # | 610 | # |
| 509 | # Memory mapped GPIO expanders: | 611 | # Memory mapped GPIO expanders: |
| 510 | # | 612 | # |
| 613 | # CONFIG_GPIO_IT8761E is not set | ||
| 511 | 614 | ||
| 512 | # | 615 | # |
| 513 | # I2C GPIO expanders: | 616 | # I2C GPIO expanders: |
| 514 | # | 617 | # |
| 618 | # CONFIG_GPIO_MAX7300 is not set | ||
| 515 | # CONFIG_GPIO_MAX732X is not set | 619 | # CONFIG_GPIO_MAX732X is not set |
| 516 | # CONFIG_GPIO_PCA953X is not set | 620 | # CONFIG_GPIO_PCA953X is not set |
| 517 | # CONFIG_GPIO_PCF857X is not set | 621 | # CONFIG_GPIO_PCF857X is not set |
| 622 | # CONFIG_GPIO_ADP5588 is not set | ||
| 518 | 623 | ||
| 519 | # | 624 | # |
| 520 | # PCI GPIO expanders: | 625 | # PCI GPIO expanders: |
| @@ -523,10 +628,19 @@ CONFIG_GPIOLIB=y | |||
| 523 | # | 628 | # |
| 524 | # SPI GPIO expanders: | 629 | # SPI GPIO expanders: |
| 525 | # | 630 | # |
| 631 | |||
| 632 | # | ||
| 633 | # AC97 GPIO expanders: | ||
| 634 | # | ||
| 526 | # CONFIG_W1 is not set | 635 | # CONFIG_W1 is not set |
| 527 | # CONFIG_POWER_SUPPLY is not set | 636 | # CONFIG_POWER_SUPPLY is not set |
| 528 | CONFIG_HWMON=y | 637 | CONFIG_HWMON=y |
| 529 | # CONFIG_HWMON_VID is not set | 638 | # CONFIG_HWMON_VID is not set |
| 639 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
| 640 | |||
| 641 | # | ||
| 642 | # Native drivers | ||
| 643 | # | ||
| 530 | # CONFIG_SENSORS_AD7414 is not set | 644 | # CONFIG_SENSORS_AD7414 is not set |
| 531 | # CONFIG_SENSORS_AD7418 is not set | 645 | # CONFIG_SENSORS_AD7418 is not set |
| 532 | # CONFIG_SENSORS_ADM1021 is not set | 646 | # CONFIG_SENSORS_ADM1021 is not set |
| @@ -535,10 +649,11 @@ CONFIG_HWMON=y | |||
| 535 | # CONFIG_SENSORS_ADM1029 is not set | 649 | # CONFIG_SENSORS_ADM1029 is not set |
| 536 | # CONFIG_SENSORS_ADM1031 is not set | 650 | # CONFIG_SENSORS_ADM1031 is not set |
| 537 | # CONFIG_SENSORS_ADM9240 is not set | 651 | # CONFIG_SENSORS_ADM9240 is not set |
| 652 | # CONFIG_SENSORS_ADT7411 is not set | ||
| 538 | # CONFIG_SENSORS_ADT7462 is not set | 653 | # CONFIG_SENSORS_ADT7462 is not set |
| 539 | # CONFIG_SENSORS_ADT7470 is not set | 654 | # CONFIG_SENSORS_ADT7470 is not set |
| 540 | # CONFIG_SENSORS_ADT7473 is not set | ||
| 541 | # CONFIG_SENSORS_ADT7475 is not set | 655 | # CONFIG_SENSORS_ADT7475 is not set |
| 656 | # CONFIG_SENSORS_ASC7621 is not set | ||
| 542 | # CONFIG_SENSORS_ATXP1 is not set | 657 | # CONFIG_SENSORS_ATXP1 is not set |
| 543 | # CONFIG_SENSORS_DS1621 is not set | 658 | # CONFIG_SENSORS_DS1621 is not set |
| 544 | # CONFIG_SENSORS_F71805F is not set | 659 | # CONFIG_SENSORS_F71805F is not set |
| @@ -549,6 +664,7 @@ CONFIG_HWMON=y | |||
| 549 | # CONFIG_SENSORS_GL520SM is not set | 664 | # CONFIG_SENSORS_GL520SM is not set |
| 550 | # CONFIG_SENSORS_IT87 is not set | 665 | # CONFIG_SENSORS_IT87 is not set |
| 551 | # CONFIG_SENSORS_LM63 is not set | 666 | # CONFIG_SENSORS_LM63 is not set |
| 667 | # CONFIG_SENSORS_LM73 is not set | ||
| 552 | # CONFIG_SENSORS_LM75 is not set | 668 | # CONFIG_SENSORS_LM75 is not set |
| 553 | # CONFIG_SENSORS_LM77 is not set | 669 | # CONFIG_SENSORS_LM77 is not set |
| 554 | # CONFIG_SENSORS_LM78 is not set | 670 | # CONFIG_SENSORS_LM78 is not set |
| @@ -573,8 +689,10 @@ CONFIG_HWMON=y | |||
| 573 | # CONFIG_SENSORS_SMSC47M192 is not set | 689 | # CONFIG_SENSORS_SMSC47M192 is not set |
| 574 | # CONFIG_SENSORS_SMSC47B397 is not set | 690 | # CONFIG_SENSORS_SMSC47B397 is not set |
| 575 | # CONFIG_SENSORS_ADS7828 is not set | 691 | # CONFIG_SENSORS_ADS7828 is not set |
| 692 | # CONFIG_SENSORS_AMC6821 is not set | ||
| 576 | # CONFIG_SENSORS_THMC50 is not set | 693 | # CONFIG_SENSORS_THMC50 is not set |
| 577 | # CONFIG_SENSORS_TMP401 is not set | 694 | # CONFIG_SENSORS_TMP401 is not set |
| 695 | # CONFIG_SENSORS_TMP421 is not set | ||
| 578 | # CONFIG_SENSORS_VT1211 is not set | 696 | # CONFIG_SENSORS_VT1211 is not set |
| 579 | # CONFIG_SENSORS_W83781D is not set | 697 | # CONFIG_SENSORS_W83781D is not set |
| 580 | # CONFIG_SENSORS_W83791D is not set | 698 | # CONFIG_SENSORS_W83791D is not set |
| @@ -584,9 +702,8 @@ CONFIG_HWMON=y | |||
| 584 | # CONFIG_SENSORS_W83L786NG is not set | 702 | # CONFIG_SENSORS_W83L786NG is not set |
| 585 | # CONFIG_SENSORS_W83627HF is not set | 703 | # CONFIG_SENSORS_W83627HF is not set |
| 586 | # CONFIG_SENSORS_W83627EHF is not set | 704 | # CONFIG_SENSORS_W83627EHF is not set |
| 587 | # CONFIG_HWMON_DEBUG_CHIP is not set | 705 | # CONFIG_SENSORS_LIS3_I2C is not set |
| 588 | # CONFIG_THERMAL is not set | 706 | # CONFIG_THERMAL is not set |
| 589 | # CONFIG_THERMAL_HWMON is not set | ||
| 590 | # CONFIG_WATCHDOG is not set | 707 | # CONFIG_WATCHDOG is not set |
| 591 | CONFIG_SSB_POSSIBLE=y | 708 | CONFIG_SSB_POSSIBLE=y |
| 592 | 709 | ||
| @@ -599,10 +716,12 @@ CONFIG_SSB_POSSIBLE=y | |||
| 599 | # Multifunction device drivers | 716 | # Multifunction device drivers |
| 600 | # | 717 | # |
| 601 | # CONFIG_MFD_CORE is not set | 718 | # CONFIG_MFD_CORE is not set |
| 719 | # CONFIG_MFD_88PM860X is not set | ||
| 602 | # CONFIG_MFD_SM501 is not set | 720 | # CONFIG_MFD_SM501 is not set |
| 603 | # CONFIG_MFD_ASIC3 is not set | 721 | # CONFIG_MFD_ASIC3 is not set |
| 604 | # CONFIG_HTC_EGPIO is not set | 722 | # CONFIG_HTC_EGPIO is not set |
| 605 | # CONFIG_HTC_PASIC3 is not set | 723 | # CONFIG_HTC_PASIC3 is not set |
| 724 | # CONFIG_HTC_I2CPLD is not set | ||
| 606 | # CONFIG_TPS65010 is not set | 725 | # CONFIG_TPS65010 is not set |
| 607 | # CONFIG_TWL4030_CORE is not set | 726 | # CONFIG_TWL4030_CORE is not set |
| 608 | # CONFIG_MFD_TMIO is not set | 727 | # CONFIG_MFD_TMIO is not set |
| @@ -610,10 +729,15 @@ CONFIG_SSB_POSSIBLE=y | |||
| 610 | # CONFIG_MFD_TC6387XB is not set | 729 | # CONFIG_MFD_TC6387XB is not set |
| 611 | # CONFIG_MFD_TC6393XB is not set | 730 | # CONFIG_MFD_TC6393XB is not set |
| 612 | # CONFIG_PMIC_DA903X is not set | 731 | # CONFIG_PMIC_DA903X is not set |
| 732 | # CONFIG_PMIC_ADP5520 is not set | ||
| 733 | # CONFIG_MFD_MAX8925 is not set | ||
| 613 | # CONFIG_MFD_WM8400 is not set | 734 | # CONFIG_MFD_WM8400 is not set |
| 735 | # CONFIG_MFD_WM831X is not set | ||
| 614 | # CONFIG_MFD_WM8350_I2C is not set | 736 | # CONFIG_MFD_WM8350_I2C is not set |
| 737 | # CONFIG_MFD_WM8994 is not set | ||
| 615 | # CONFIG_MFD_PCF50633 is not set | 738 | # CONFIG_MFD_PCF50633 is not set |
| 616 | # CONFIG_AB3100_CORE is not set | 739 | # CONFIG_AB3100_CORE is not set |
| 740 | # CONFIG_REGULATOR is not set | ||
| 617 | # CONFIG_MEDIA_SUPPORT is not set | 741 | # CONFIG_MEDIA_SUPPORT is not set |
| 618 | 742 | ||
| 619 | # | 743 | # |
| @@ -637,7 +761,6 @@ CONFIG_DUMMY_CONSOLE=y | |||
| 637 | # CONFIG_SOUND is not set | 761 | # CONFIG_SOUND is not set |
| 638 | CONFIG_HID_SUPPORT=y | 762 | CONFIG_HID_SUPPORT=y |
| 639 | CONFIG_HID=y | 763 | CONFIG_HID=y |
| 640 | CONFIG_HID_DEBUG=y | ||
| 641 | # CONFIG_HIDRAW is not set | 764 | # CONFIG_HIDRAW is not set |
| 642 | # CONFIG_HID_PID is not set | 765 | # CONFIG_HID_PID is not set |
| 643 | 766 | ||
| @@ -680,13 +803,12 @@ CONFIG_SDIO_UART=y | |||
| 680 | CONFIG_MMC_SDHCI=y | 803 | CONFIG_MMC_SDHCI=y |
| 681 | # CONFIG_MMC_SDHCI_PLTFM is not set | 804 | # CONFIG_MMC_SDHCI_PLTFM is not set |
| 682 | # CONFIG_MEMSTICK is not set | 805 | # CONFIG_MEMSTICK is not set |
| 683 | # CONFIG_ACCESSIBILITY is not set | ||
| 684 | # CONFIG_NEW_LEDS is not set | 806 | # CONFIG_NEW_LEDS is not set |
| 807 | # CONFIG_ACCESSIBILITY is not set | ||
| 685 | CONFIG_RTC_LIB=y | 808 | CONFIG_RTC_LIB=y |
| 686 | # CONFIG_RTC_CLASS is not set | 809 | # CONFIG_RTC_CLASS is not set |
| 687 | # CONFIG_DMADEVICES is not set | 810 | # CONFIG_DMADEVICES is not set |
| 688 | # CONFIG_AUXDISPLAY is not set | 811 | # CONFIG_AUXDISPLAY is not set |
| 689 | # CONFIG_REGULATOR is not set | ||
| 690 | # CONFIG_UIO is not set | 812 | # CONFIG_UIO is not set |
| 691 | # CONFIG_STAGING is not set | 813 | # CONFIG_STAGING is not set |
| 692 | 814 | ||
| @@ -710,6 +832,7 @@ CONFIG_FS_POSIX_ACL=y | |||
| 710 | # CONFIG_XFS_FS is not set | 832 | # CONFIG_XFS_FS is not set |
| 711 | # CONFIG_GFS2_FS is not set | 833 | # CONFIG_GFS2_FS is not set |
| 712 | # CONFIG_BTRFS_FS is not set | 834 | # CONFIG_BTRFS_FS is not set |
| 835 | # CONFIG_NILFS2_FS is not set | ||
| 713 | CONFIG_FILE_LOCKING=y | 836 | CONFIG_FILE_LOCKING=y |
| 714 | CONFIG_FSNOTIFY=y | 837 | CONFIG_FSNOTIFY=y |
| 715 | CONFIG_DNOTIFY=y | 838 | CONFIG_DNOTIFY=y |
| @@ -758,6 +881,7 @@ CONFIG_MISC_FILESYSTEMS=y | |||
| 758 | # CONFIG_BEFS_FS is not set | 881 | # CONFIG_BEFS_FS is not set |
| 759 | # CONFIG_BFS_FS is not set | 882 | # CONFIG_BFS_FS is not set |
| 760 | # CONFIG_EFS_FS is not set | 883 | # CONFIG_EFS_FS is not set |
| 884 | # CONFIG_LOGFS is not set | ||
| 761 | CONFIG_CRAMFS=y | 885 | CONFIG_CRAMFS=y |
| 762 | # CONFIG_SQUASHFS is not set | 886 | # CONFIG_SQUASHFS is not set |
| 763 | # CONFIG_VXFS_FS is not set | 887 | # CONFIG_VXFS_FS is not set |
| @@ -772,7 +896,6 @@ CONFIG_ROMFS_BACKED_BY_BLOCK=y | |||
| 772 | CONFIG_ROMFS_ON_BLOCK=y | 896 | CONFIG_ROMFS_ON_BLOCK=y |
| 773 | # CONFIG_SYSV_FS is not set | 897 | # CONFIG_SYSV_FS is not set |
| 774 | # CONFIG_UFS_FS is not set | 898 | # CONFIG_UFS_FS is not set |
| 775 | # CONFIG_NILFS2_FS is not set | ||
| 776 | 899 | ||
| 777 | # | 900 | # |
| 778 | # Partition Types | 901 | # Partition Types |
| @@ -789,6 +912,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y | |||
| 789 | CONFIG_ENABLE_MUST_CHECK=y | 912 | CONFIG_ENABLE_MUST_CHECK=y |
| 790 | CONFIG_FRAME_WARN=1024 | 913 | CONFIG_FRAME_WARN=1024 |
| 791 | CONFIG_MAGIC_SYSRQ=y | 914 | CONFIG_MAGIC_SYSRQ=y |
| 915 | # CONFIG_STRIP_ASM_SYMS is not set | ||
| 792 | # CONFIG_UNUSED_SYMBOLS is not set | 916 | # CONFIG_UNUSED_SYMBOLS is not set |
| 793 | # CONFIG_DEBUG_FS is not set | 917 | # CONFIG_DEBUG_FS is not set |
| 794 | # CONFIG_HEADERS_CHECK is not set | 918 | # CONFIG_HEADERS_CHECK is not set |
| @@ -826,11 +950,13 @@ CONFIG_DEBUG_MEMORY_INIT=y | |||
| 826 | # CONFIG_DEBUG_LIST is not set | 950 | # CONFIG_DEBUG_LIST is not set |
| 827 | # CONFIG_DEBUG_SG is not set | 951 | # CONFIG_DEBUG_SG is not set |
| 828 | # CONFIG_DEBUG_NOTIFIERS is not set | 952 | # CONFIG_DEBUG_NOTIFIERS is not set |
| 953 | # CONFIG_DEBUG_CREDENTIALS is not set | ||
| 829 | # CONFIG_BOOT_PRINTK_DELAY is not set | 954 | # CONFIG_BOOT_PRINTK_DELAY is not set |
| 830 | # CONFIG_RCU_TORTURE_TEST is not set | 955 | # CONFIG_RCU_TORTURE_TEST is not set |
| 831 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | 956 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set |
| 832 | # CONFIG_BACKTRACE_SELF_TEST is not set | 957 | # CONFIG_BACKTRACE_SELF_TEST is not set |
| 833 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | 958 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set |
| 959 | # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set | ||
| 834 | # CONFIG_FAULT_INJECTION is not set | 960 | # CONFIG_FAULT_INJECTION is not set |
| 835 | # CONFIG_LATENCYTOP is not set | 961 | # CONFIG_LATENCYTOP is not set |
| 836 | CONFIG_SYSCTL_SYSCALL_CHECK=y | 962 | CONFIG_SYSCTL_SYSCALL_CHECK=y |
| @@ -839,6 +965,7 @@ CONFIG_HAVE_FUNCTION_TRACER=y | |||
| 839 | CONFIG_TRACING_SUPPORT=y | 965 | CONFIG_TRACING_SUPPORT=y |
| 840 | CONFIG_FTRACE=y | 966 | CONFIG_FTRACE=y |
| 841 | # CONFIG_FUNCTION_TRACER is not set | 967 | # CONFIG_FUNCTION_TRACER is not set |
| 968 | # CONFIG_IRQSOFF_TRACER is not set | ||
| 842 | # CONFIG_SCHED_TRACER is not set | 969 | # CONFIG_SCHED_TRACER is not set |
| 843 | # CONFIG_ENABLE_DEFAULT_TRACERS is not set | 970 | # CONFIG_ENABLE_DEFAULT_TRACERS is not set |
| 844 | # CONFIG_BOOT_TRACER is not set | 971 | # CONFIG_BOOT_TRACER is not set |
| @@ -849,6 +976,7 @@ CONFIG_BRANCH_PROFILE_NONE=y | |||
| 849 | # CONFIG_KMEMTRACE is not set | 976 | # CONFIG_KMEMTRACE is not set |
| 850 | # CONFIG_WORKQUEUE_TRACER is not set | 977 | # CONFIG_WORKQUEUE_TRACER is not set |
| 851 | # CONFIG_BLK_DEV_IO_TRACE is not set | 978 | # CONFIG_BLK_DEV_IO_TRACE is not set |
| 979 | # CONFIG_ATOMIC64_SELFTEST is not set | ||
| 852 | # CONFIG_SAMPLES is not set | 980 | # CONFIG_SAMPLES is not set |
| 853 | CONFIG_HAVE_ARCH_KGDB=y | 981 | CONFIG_HAVE_ARCH_KGDB=y |
| 854 | # CONFIG_KGDB is not set | 982 | # CONFIG_KGDB is not set |
| @@ -857,8 +985,9 @@ CONFIG_DEBUG_USER=y | |||
| 857 | CONFIG_DEBUG_ERRORS=y | 985 | CONFIG_DEBUG_ERRORS=y |
| 858 | # CONFIG_DEBUG_STACK_USAGE is not set | 986 | # CONFIG_DEBUG_STACK_USAGE is not set |
| 859 | CONFIG_DEBUG_LL=y | 987 | CONFIG_DEBUG_LL=y |
| 988 | # CONFIG_EARLY_PRINTK is not set | ||
| 860 | # CONFIG_DEBUG_ICEDCC is not set | 989 | # CONFIG_DEBUG_ICEDCC is not set |
| 861 | CONFIG_DEBUG_S3C_PORT=y | 990 | # CONFIG_OC_ETM is not set |
| 862 | CONFIG_DEBUG_S3C_UART=0 | 991 | CONFIG_DEBUG_S3C_UART=0 |
| 863 | 992 | ||
| 864 | # | 993 | # |
| @@ -867,7 +996,11 @@ CONFIG_DEBUG_S3C_UART=0 | |||
| 867 | # CONFIG_KEYS is not set | 996 | # CONFIG_KEYS is not set |
| 868 | # CONFIG_SECURITY is not set | 997 | # CONFIG_SECURITY is not set |
| 869 | # CONFIG_SECURITYFS is not set | 998 | # CONFIG_SECURITYFS is not set |
| 870 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | 999 | # CONFIG_DEFAULT_SECURITY_SELINUX is not set |
| 1000 | # CONFIG_DEFAULT_SECURITY_SMACK is not set | ||
| 1001 | # CONFIG_DEFAULT_SECURITY_TOMOYO is not set | ||
| 1002 | CONFIG_DEFAULT_SECURITY_DAC=y | ||
| 1003 | CONFIG_DEFAULT_SECURITY="" | ||
| 871 | # CONFIG_CRYPTO is not set | 1004 | # CONFIG_CRYPTO is not set |
| 872 | # CONFIG_BINARY_PRINTF is not set | 1005 | # CONFIG_BINARY_PRINTF is not set |
| 873 | 1006 | ||
| @@ -884,8 +1017,10 @@ CONFIG_CRC32=y | |||
| 884 | # CONFIG_CRC7 is not set | 1017 | # CONFIG_CRC7 is not set |
| 885 | # CONFIG_LIBCRC32C is not set | 1018 | # CONFIG_LIBCRC32C is not set |
| 886 | CONFIG_ZLIB_INFLATE=y | 1019 | CONFIG_ZLIB_INFLATE=y |
| 1020 | CONFIG_LZO_DECOMPRESS=y | ||
| 887 | CONFIG_DECOMPRESS_GZIP=y | 1021 | CONFIG_DECOMPRESS_GZIP=y |
| 888 | CONFIG_DECOMPRESS_BZIP2=y | 1022 | CONFIG_DECOMPRESS_BZIP2=y |
| 889 | CONFIG_DECOMPRESS_LZMA=y | 1023 | CONFIG_DECOMPRESS_LZMA=y |
| 1024 | CONFIG_DECOMPRESS_LZO=y | ||
| 890 | CONFIG_HAS_IOMEM=y | 1025 | CONFIG_HAS_IOMEM=y |
| 891 | CONFIG_HAS_DMA=y | 1026 | CONFIG_HAS_DMA=y |
diff --git a/arch/arm/configs/s5pc110_defconfig b/arch/arm/configs/s5pc110_defconfig index 6ea636131ac8..c4de360b0f69 100644 --- a/arch/arm/configs/s5pc110_defconfig +++ b/arch/arm/configs/s5pc110_defconfig | |||
| @@ -1,11 +1,14 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.33-rc4 | 3 | # Linux kernel version: 2.6.34 |
| 4 | # Wed Feb 24 15:36:54 2010 | 4 | # Wed May 26 19:04:37 2010 |
| 5 | # | 5 | # |
| 6 | CONFIG_ARM=y | 6 | CONFIG_ARM=y |
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y |
| 8 | CONFIG_GENERIC_GPIO=y | 8 | CONFIG_GENERIC_GPIO=y |
| 9 | CONFIG_GENERIC_TIME=y | ||
| 10 | CONFIG_ARCH_USES_GETTIMEOFFSET=y | ||
| 11 | CONFIG_HAVE_PROC_CPU=y | ||
| 9 | CONFIG_NO_IOPORT=y | 12 | CONFIG_NO_IOPORT=y |
| 10 | CONFIG_GENERIC_HARDIRQS=y | 13 | CONFIG_GENERIC_HARDIRQS=y |
| 11 | CONFIG_STACKTRACE_SUPPORT=y | 14 | CONFIG_STACKTRACE_SUPPORT=y |
| @@ -17,6 +20,7 @@ CONFIG_GENERIC_IRQ_PROBE=y | |||
| 17 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | 20 | CONFIG_RWSEM_GENERIC_SPINLOCK=y |
| 18 | CONFIG_GENERIC_HWEIGHT=y | 21 | CONFIG_GENERIC_HWEIGHT=y |
| 19 | CONFIG_GENERIC_CALIBRATE_DELAY=y | 22 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
| 23 | CONFIG_NEED_DMA_MAP_STATE=y | ||
| 20 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | 24 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y |
| 21 | CONFIG_ARM_L1_CACHE_SHIFT_6=y | 25 | CONFIG_ARM_L1_CACHE_SHIFT_6=y |
| 22 | CONFIG_VECTORS_BASE=0xffff0000 | 26 | CONFIG_VECTORS_BASE=0xffff0000 |
| @@ -33,6 +37,7 @@ CONFIG_INIT_ENV_ARG_LIMIT=32 | |||
| 33 | CONFIG_LOCALVERSION="" | 37 | CONFIG_LOCALVERSION="" |
| 34 | CONFIG_LOCALVERSION_AUTO=y | 38 | CONFIG_LOCALVERSION_AUTO=y |
| 35 | CONFIG_HAVE_KERNEL_GZIP=y | 39 | CONFIG_HAVE_KERNEL_GZIP=y |
| 40 | CONFIG_HAVE_KERNEL_LZMA=y | ||
| 36 | CONFIG_HAVE_KERNEL_LZO=y | 41 | CONFIG_HAVE_KERNEL_LZO=y |
| 37 | CONFIG_KERNEL_GZIP=y | 42 | CONFIG_KERNEL_GZIP=y |
| 38 | # CONFIG_KERNEL_BZIP2 is not set | 43 | # CONFIG_KERNEL_BZIP2 is not set |
| @@ -54,7 +59,6 @@ CONFIG_RCU_FANOUT=32 | |||
| 54 | # CONFIG_TREE_RCU_TRACE is not set | 59 | # CONFIG_TREE_RCU_TRACE is not set |
| 55 | # CONFIG_IKCONFIG is not set | 60 | # CONFIG_IKCONFIG is not set |
| 56 | CONFIG_LOG_BUF_SHIFT=17 | 61 | CONFIG_LOG_BUF_SHIFT=17 |
| 57 | # CONFIG_GROUP_SCHED is not set | ||
| 58 | # CONFIG_CGROUPS is not set | 62 | # CONFIG_CGROUPS is not set |
| 59 | CONFIG_SYSFS_DEPRECATED=y | 63 | CONFIG_SYSFS_DEPRECATED=y |
| 60 | CONFIG_SYSFS_DEPRECATED_V2=y | 64 | CONFIG_SYSFS_DEPRECATED_V2=y |
| @@ -90,10 +94,14 @@ CONFIG_TIMERFD=y | |||
| 90 | CONFIG_EVENTFD=y | 94 | CONFIG_EVENTFD=y |
| 91 | CONFIG_SHMEM=y | 95 | CONFIG_SHMEM=y |
| 92 | CONFIG_AIO=y | 96 | CONFIG_AIO=y |
| 97 | CONFIG_HAVE_PERF_EVENTS=y | ||
| 98 | CONFIG_PERF_USE_VMALLOC=y | ||
| 93 | 99 | ||
| 94 | # | 100 | # |
| 95 | # Kernel Performance Events And Counters | 101 | # Kernel Performance Events And Counters |
| 96 | # | 102 | # |
| 103 | # CONFIG_PERF_EVENTS is not set | ||
| 104 | # CONFIG_PERF_COUNTERS is not set | ||
| 97 | CONFIG_VM_EVENT_COUNTERS=y | 105 | CONFIG_VM_EVENT_COUNTERS=y |
| 98 | CONFIG_SLUB_DEBUG=y | 106 | CONFIG_SLUB_DEBUG=y |
| 99 | CONFIG_COMPAT_BRK=y | 107 | CONFIG_COMPAT_BRK=y |
| @@ -175,8 +183,11 @@ CONFIG_MMU=y | |||
| 175 | # CONFIG_ARCH_INTEGRATOR is not set | 183 | # CONFIG_ARCH_INTEGRATOR is not set |
| 176 | # CONFIG_ARCH_REALVIEW is not set | 184 | # CONFIG_ARCH_REALVIEW is not set |
| 177 | # CONFIG_ARCH_VERSATILE is not set | 185 | # CONFIG_ARCH_VERSATILE is not set |
| 186 | # CONFIG_ARCH_VEXPRESS is not set | ||
| 178 | # CONFIG_ARCH_AT91 is not set | 187 | # CONFIG_ARCH_AT91 is not set |
| 188 | # CONFIG_ARCH_BCMRING is not set | ||
| 179 | # CONFIG_ARCH_CLPS711X is not set | 189 | # CONFIG_ARCH_CLPS711X is not set |
| 190 | # CONFIG_ARCH_CNS3XXX is not set | ||
| 180 | # CONFIG_ARCH_GEMINI is not set | 191 | # CONFIG_ARCH_GEMINI is not set |
| 181 | # CONFIG_ARCH_EBSA110 is not set | 192 | # CONFIG_ARCH_EBSA110 is not set |
| 182 | # CONFIG_ARCH_EP93XX is not set | 193 | # CONFIG_ARCH_EP93XX is not set |
| @@ -185,7 +196,6 @@ CONFIG_MMU=y | |||
| 185 | # CONFIG_ARCH_STMP3XXX is not set | 196 | # CONFIG_ARCH_STMP3XXX is not set |
| 186 | # CONFIG_ARCH_NETX is not set | 197 | # CONFIG_ARCH_NETX is not set |
| 187 | # CONFIG_ARCH_H720X is not set | 198 | # CONFIG_ARCH_H720X is not set |
| 188 | # CONFIG_ARCH_NOMADIK is not set | ||
| 189 | # CONFIG_ARCH_IOP13XX is not set | 199 | # CONFIG_ARCH_IOP13XX is not set |
| 190 | # CONFIG_ARCH_IOP32X is not set | 200 | # CONFIG_ARCH_IOP32X is not set |
| 191 | # CONFIG_ARCH_IOP33X is not set | 201 | # CONFIG_ARCH_IOP33X is not set |
| @@ -202,24 +212,27 @@ CONFIG_MMU=y | |||
| 202 | # CONFIG_ARCH_KS8695 is not set | 212 | # CONFIG_ARCH_KS8695 is not set |
| 203 | # CONFIG_ARCH_NS9XXX is not set | 213 | # CONFIG_ARCH_NS9XXX is not set |
| 204 | # CONFIG_ARCH_W90X900 is not set | 214 | # CONFIG_ARCH_W90X900 is not set |
| 215 | # CONFIG_ARCH_NUC93X is not set | ||
| 205 | # CONFIG_ARCH_PNX4008 is not set | 216 | # CONFIG_ARCH_PNX4008 is not set |
| 206 | # CONFIG_ARCH_PXA is not set | 217 | # CONFIG_ARCH_PXA is not set |
| 207 | # CONFIG_ARCH_MSM is not set | 218 | # CONFIG_ARCH_MSM is not set |
| 219 | # CONFIG_ARCH_SHMOBILE is not set | ||
| 208 | # CONFIG_ARCH_RPC is not set | 220 | # CONFIG_ARCH_RPC is not set |
| 209 | # CONFIG_ARCH_SA1100 is not set | 221 | # CONFIG_ARCH_SA1100 is not set |
| 210 | # CONFIG_ARCH_S3C2410 is not set | 222 | # CONFIG_ARCH_S3C2410 is not set |
| 211 | # CONFIG_ARCH_S3C64XX is not set | 223 | # CONFIG_ARCH_S3C64XX is not set |
| 212 | # CONFIG_ARCH_S5P6440 is not set | 224 | # CONFIG_ARCH_S5P6440 is not set |
| 213 | # CONFIG_ARCH_S5P6442 is not set | 225 | # CONFIG_ARCH_S5P6442 is not set |
| 214 | # CONFIG_ARCH_S5PC1XX is not set | 226 | # CONFIG_ARCH_S5PC100 is not set |
| 215 | CONFIG_ARCH_S5PV210=y | 227 | CONFIG_ARCH_S5PV210=y |
| 216 | # CONFIG_ARCH_SHARK is not set | 228 | # CONFIG_ARCH_SHARK is not set |
| 217 | # CONFIG_ARCH_LH7A40X is not set | 229 | # CONFIG_ARCH_LH7A40X is not set |
| 218 | # CONFIG_ARCH_U300 is not set | 230 | # CONFIG_ARCH_U300 is not set |
| 231 | # CONFIG_ARCH_U8500 is not set | ||
| 232 | # CONFIG_ARCH_NOMADIK is not set | ||
| 219 | # CONFIG_ARCH_DAVINCI is not set | 233 | # CONFIG_ARCH_DAVINCI is not set |
| 220 | # CONFIG_ARCH_OMAP is not set | 234 | # CONFIG_ARCH_OMAP is not set |
| 221 | # CONFIG_ARCH_BCMRING is not set | 235 | # CONFIG_PLAT_SPEAR is not set |
| 222 | # CONFIG_ARCH_U8500 is not set | ||
| 223 | CONFIG_PLAT_SAMSUNG=y | 236 | CONFIG_PLAT_SAMSUNG=y |
| 224 | 237 | ||
| 225 | # | 238 | # |
| @@ -235,16 +248,22 @@ CONFIG_SAMSUNG_GPIOLIB_4BIT=y | |||
| 235 | CONFIG_S3C_GPIO_CFG_S3C24XX=y | 248 | CONFIG_S3C_GPIO_CFG_S3C24XX=y |
| 236 | CONFIG_S3C_GPIO_CFG_S3C64XX=y | 249 | CONFIG_S3C_GPIO_CFG_S3C64XX=y |
| 237 | CONFIG_S3C_GPIO_PULL_UPDOWN=y | 250 | CONFIG_S3C_GPIO_PULL_UPDOWN=y |
| 251 | CONFIG_S5P_GPIO_DRVSTR=y | ||
| 238 | CONFIG_SAMSUNG_GPIO_EXTRA=0 | 252 | CONFIG_SAMSUNG_GPIO_EXTRA=0 |
| 239 | CONFIG_S3C_GPIO_SPACE=0 | 253 | CONFIG_S3C_GPIO_SPACE=0 |
| 240 | CONFIG_S3C_GPIO_TRACK=y | 254 | CONFIG_S3C_GPIO_TRACK=y |
| 241 | # CONFIG_S3C_ADC is not set | 255 | # CONFIG_S3C_ADC is not set |
| 256 | CONFIG_S3C_DEV_WDT=y | ||
| 257 | CONFIG_S3C_PL330_DMA=y | ||
| 242 | 258 | ||
| 243 | # | 259 | # |
| 244 | # Power management | 260 | # Power management |
| 245 | # | 261 | # |
| 246 | CONFIG_PLAT_S5P=y | 262 | CONFIG_PLAT_S5P=y |
| 263 | CONFIG_S5P_EXT_INT=y | ||
| 247 | CONFIG_CPU_S5PV210=y | 264 | CONFIG_CPU_S5PV210=y |
| 265 | # CONFIG_MACH_AQUILA is not set | ||
| 266 | # CONFIG_MACH_GONI is not set | ||
| 248 | # CONFIG_MACH_SMDKV210 is not set | 267 | # CONFIG_MACH_SMDKV210 is not set |
| 249 | CONFIG_MACH_SMDKC110=y | 268 | CONFIG_MACH_SMDKC110=y |
| 250 | 269 | ||
| @@ -274,11 +293,14 @@ CONFIG_ARM_THUMB=y | |||
| 274 | # CONFIG_CPU_BPREDICT_DISABLE is not set | 293 | # CONFIG_CPU_BPREDICT_DISABLE is not set |
| 275 | CONFIG_HAS_TLS_REG=y | 294 | CONFIG_HAS_TLS_REG=y |
| 276 | CONFIG_ARM_L1_CACHE_SHIFT=6 | 295 | CONFIG_ARM_L1_CACHE_SHIFT=6 |
| 296 | CONFIG_ARM_DMA_MEM_BUFFERABLE=y | ||
| 297 | CONFIG_CPU_HAS_PMU=y | ||
| 277 | # CONFIG_ARM_ERRATA_430973 is not set | 298 | # CONFIG_ARM_ERRATA_430973 is not set |
| 278 | # CONFIG_ARM_ERRATA_458693 is not set | 299 | # CONFIG_ARM_ERRATA_458693 is not set |
| 279 | # CONFIG_ARM_ERRATA_460075 is not set | 300 | # CONFIG_ARM_ERRATA_460075 is not set |
| 280 | CONFIG_ARM_VIC=y | 301 | CONFIG_ARM_VIC=y |
| 281 | CONFIG_ARM_VIC_NR=2 | 302 | CONFIG_ARM_VIC_NR=2 |
| 303 | CONFIG_PL330=y | ||
| 282 | 304 | ||
| 283 | # | 305 | # |
| 284 | # Bus support | 306 | # Bus support |
| @@ -327,6 +349,7 @@ CONFIG_ALIGNMENT_TRAP=y | |||
| 327 | CONFIG_ZBOOT_ROM_TEXT=0 | 349 | CONFIG_ZBOOT_ROM_TEXT=0 |
| 328 | CONFIG_ZBOOT_ROM_BSS=0 | 350 | CONFIG_ZBOOT_ROM_BSS=0 |
| 329 | CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc" | 351 | CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc" |
| 352 | # CONFIG_CMDLINE_FORCE is not set | ||
| 330 | # CONFIG_XIP_KERNEL is not set | 353 | # CONFIG_XIP_KERNEL is not set |
| 331 | # CONFIG_KEXEC is not set | 354 | # CONFIG_KEXEC is not set |
| 332 | 355 | ||
| @@ -404,6 +427,7 @@ CONFIG_HAVE_IDE=y | |||
| 404 | # | 427 | # |
| 405 | # SCSI device support | 428 | # SCSI device support |
| 406 | # | 429 | # |
| 430 | CONFIG_SCSI_MOD=y | ||
| 407 | # CONFIG_RAID_ATTRS is not set | 431 | # CONFIG_RAID_ATTRS is not set |
| 408 | CONFIG_SCSI=y | 432 | CONFIG_SCSI=y |
| 409 | CONFIG_SCSI_DMA=y | 433 | CONFIG_SCSI_DMA=y |
| @@ -472,6 +496,7 @@ CONFIG_INPUT_EVDEV=y | |||
| 472 | CONFIG_INPUT_TOUCHSCREEN=y | 496 | CONFIG_INPUT_TOUCHSCREEN=y |
| 473 | # CONFIG_TOUCHSCREEN_AD7879 is not set | 497 | # CONFIG_TOUCHSCREEN_AD7879 is not set |
| 474 | # CONFIG_TOUCHSCREEN_DYNAPRO is not set | 498 | # CONFIG_TOUCHSCREEN_DYNAPRO is not set |
| 499 | # CONFIG_TOUCHSCREEN_HAMPSHIRE is not set | ||
| 475 | # CONFIG_TOUCHSCREEN_FUJITSU is not set | 500 | # CONFIG_TOUCHSCREEN_FUJITSU is not set |
| 476 | # CONFIG_TOUCHSCREEN_GUNZE is not set | 501 | # CONFIG_TOUCHSCREEN_GUNZE is not set |
| 477 | # CONFIG_TOUCHSCREEN_ELO is not set | 502 | # CONFIG_TOUCHSCREEN_ELO is not set |
| @@ -526,6 +551,9 @@ CONFIG_SERIAL_SAMSUNG_CONSOLE=y | |||
| 526 | CONFIG_SERIAL_S5PV210=y | 551 | CONFIG_SERIAL_S5PV210=y |
| 527 | CONFIG_SERIAL_CORE=y | 552 | CONFIG_SERIAL_CORE=y |
| 528 | CONFIG_SERIAL_CORE_CONSOLE=y | 553 | CONFIG_SERIAL_CORE_CONSOLE=y |
| 554 | # CONFIG_SERIAL_TIMBERDALE is not set | ||
| 555 | # CONFIG_SERIAL_ALTERA_JTAGUART is not set | ||
| 556 | # CONFIG_SERIAL_ALTERA_UART is not set | ||
| 529 | CONFIG_UNIX98_PTYS=y | 557 | CONFIG_UNIX98_PTYS=y |
| 530 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | 558 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set |
| 531 | CONFIG_LEGACY_PTYS=y | 559 | CONFIG_LEGACY_PTYS=y |
| @@ -551,6 +579,7 @@ CONFIG_GPIOLIB=y | |||
| 551 | # | 579 | # |
| 552 | # Memory mapped GPIO expanders: | 580 | # Memory mapped GPIO expanders: |
| 553 | # | 581 | # |
| 582 | # CONFIG_GPIO_IT8761E is not set | ||
| 554 | 583 | ||
| 555 | # | 584 | # |
| 556 | # I2C GPIO expanders: | 585 | # I2C GPIO expanders: |
| @@ -572,6 +601,7 @@ CONFIG_GPIOLIB=y | |||
| 572 | # CONFIG_HWMON is not set | 601 | # CONFIG_HWMON is not set |
| 573 | # CONFIG_THERMAL is not set | 602 | # CONFIG_THERMAL is not set |
| 574 | # CONFIG_WATCHDOG is not set | 603 | # CONFIG_WATCHDOG is not set |
| 604 | CONFIG_HAVE_S3C2410_WATCHDOG=y | ||
| 575 | CONFIG_SSB_POSSIBLE=y | 605 | CONFIG_SSB_POSSIBLE=y |
| 576 | 606 | ||
| 577 | # | 607 | # |
| @@ -624,10 +654,6 @@ CONFIG_RTC_LIB=y | |||
| 624 | # CONFIG_DMADEVICES is not set | 654 | # CONFIG_DMADEVICES is not set |
| 625 | # CONFIG_AUXDISPLAY is not set | 655 | # CONFIG_AUXDISPLAY is not set |
| 626 | # CONFIG_UIO is not set | 656 | # CONFIG_UIO is not set |
| 627 | |||
| 628 | # | ||
| 629 | # TI VLYNQ | ||
| 630 | # | ||
| 631 | # CONFIG_STAGING is not set | 657 | # CONFIG_STAGING is not set |
| 632 | 658 | ||
| 633 | # | 659 | # |
| @@ -696,6 +722,7 @@ CONFIG_MISC_FILESYSTEMS=y | |||
| 696 | # CONFIG_BEFS_FS is not set | 722 | # CONFIG_BEFS_FS is not set |
| 697 | # CONFIG_BFS_FS is not set | 723 | # CONFIG_BFS_FS is not set |
| 698 | # CONFIG_EFS_FS is not set | 724 | # CONFIG_EFS_FS is not set |
| 725 | # CONFIG_LOGFS is not set | ||
| 699 | CONFIG_CRAMFS=y | 726 | CONFIG_CRAMFS=y |
| 700 | # CONFIG_SQUASHFS is not set | 727 | # CONFIG_SQUASHFS is not set |
| 701 | # CONFIG_VXFS_FS is not set | 728 | # CONFIG_VXFS_FS is not set |
| @@ -835,6 +862,8 @@ CONFIG_HAVE_FUNCTION_TRACER=y | |||
| 835 | CONFIG_TRACING_SUPPORT=y | 862 | CONFIG_TRACING_SUPPORT=y |
| 836 | CONFIG_FTRACE=y | 863 | CONFIG_FTRACE=y |
| 837 | # CONFIG_FUNCTION_TRACER is not set | 864 | # CONFIG_FUNCTION_TRACER is not set |
| 865 | # CONFIG_IRQSOFF_TRACER is not set | ||
| 866 | # CONFIG_PREEMPT_TRACER is not set | ||
| 838 | # CONFIG_SCHED_TRACER is not set | 867 | # CONFIG_SCHED_TRACER is not set |
| 839 | # CONFIG_ENABLE_DEFAULT_TRACERS is not set | 868 | # CONFIG_ENABLE_DEFAULT_TRACERS is not set |
| 840 | # CONFIG_BOOT_TRACER is not set | 869 | # CONFIG_BOOT_TRACER is not set |
| @@ -845,6 +874,7 @@ CONFIG_BRANCH_PROFILE_NONE=y | |||
| 845 | # CONFIG_KMEMTRACE is not set | 874 | # CONFIG_KMEMTRACE is not set |
| 846 | # CONFIG_WORKQUEUE_TRACER is not set | 875 | # CONFIG_WORKQUEUE_TRACER is not set |
| 847 | # CONFIG_BLK_DEV_IO_TRACE is not set | 876 | # CONFIG_BLK_DEV_IO_TRACE is not set |
| 877 | # CONFIG_ATOMIC64_SELFTEST is not set | ||
| 848 | # CONFIG_SAMPLES is not set | 878 | # CONFIG_SAMPLES is not set |
| 849 | CONFIG_HAVE_ARCH_KGDB=y | 879 | CONFIG_HAVE_ARCH_KGDB=y |
| 850 | # CONFIG_KGDB is not set | 880 | # CONFIG_KGDB is not set |
diff --git a/arch/arm/configs/s5pv210_defconfig b/arch/arm/configs/s5pv210_defconfig index 3f7d47491b54..e2f5bce29828 100644 --- a/arch/arm/configs/s5pv210_defconfig +++ b/arch/arm/configs/s5pv210_defconfig | |||
| @@ -1,11 +1,14 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.33-rc4 | 3 | # Linux kernel version: 2.6.34 |
| 4 | # Wed Feb 24 15:36:16 2010 | 4 | # Wed May 26 19:04:39 2010 |
| 5 | # | 5 | # |
| 6 | CONFIG_ARM=y | 6 | CONFIG_ARM=y |
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y |
| 8 | CONFIG_GENERIC_GPIO=y | 8 | CONFIG_GENERIC_GPIO=y |
| 9 | CONFIG_GENERIC_TIME=y | ||
| 10 | CONFIG_ARCH_USES_GETTIMEOFFSET=y | ||
| 11 | CONFIG_HAVE_PROC_CPU=y | ||
| 9 | CONFIG_NO_IOPORT=y | 12 | CONFIG_NO_IOPORT=y |
| 10 | CONFIG_GENERIC_HARDIRQS=y | 13 | CONFIG_GENERIC_HARDIRQS=y |
| 11 | CONFIG_STACKTRACE_SUPPORT=y | 14 | CONFIG_STACKTRACE_SUPPORT=y |
| @@ -17,6 +20,7 @@ CONFIG_GENERIC_IRQ_PROBE=y | |||
| 17 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | 20 | CONFIG_RWSEM_GENERIC_SPINLOCK=y |
| 18 | CONFIG_GENERIC_HWEIGHT=y | 21 | CONFIG_GENERIC_HWEIGHT=y |
| 19 | CONFIG_GENERIC_CALIBRATE_DELAY=y | 22 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
| 23 | CONFIG_NEED_DMA_MAP_STATE=y | ||
| 20 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | 24 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y |
| 21 | CONFIG_ARM_L1_CACHE_SHIFT_6=y | 25 | CONFIG_ARM_L1_CACHE_SHIFT_6=y |
| 22 | CONFIG_VECTORS_BASE=0xffff0000 | 26 | CONFIG_VECTORS_BASE=0xffff0000 |
| @@ -33,6 +37,7 @@ CONFIG_INIT_ENV_ARG_LIMIT=32 | |||
| 33 | CONFIG_LOCALVERSION="" | 37 | CONFIG_LOCALVERSION="" |
| 34 | CONFIG_LOCALVERSION_AUTO=y | 38 | CONFIG_LOCALVERSION_AUTO=y |
| 35 | CONFIG_HAVE_KERNEL_GZIP=y | 39 | CONFIG_HAVE_KERNEL_GZIP=y |
| 40 | CONFIG_HAVE_KERNEL_LZMA=y | ||
| 36 | CONFIG_HAVE_KERNEL_LZO=y | 41 | CONFIG_HAVE_KERNEL_LZO=y |
| 37 | CONFIG_KERNEL_GZIP=y | 42 | CONFIG_KERNEL_GZIP=y |
| 38 | # CONFIG_KERNEL_BZIP2 is not set | 43 | # CONFIG_KERNEL_BZIP2 is not set |
| @@ -54,7 +59,6 @@ CONFIG_RCU_FANOUT=32 | |||
| 54 | # CONFIG_TREE_RCU_TRACE is not set | 59 | # CONFIG_TREE_RCU_TRACE is not set |
| 55 | # CONFIG_IKCONFIG is not set | 60 | # CONFIG_IKCONFIG is not set |
| 56 | CONFIG_LOG_BUF_SHIFT=17 | 61 | CONFIG_LOG_BUF_SHIFT=17 |
| 57 | # CONFIG_GROUP_SCHED is not set | ||
| 58 | # CONFIG_CGROUPS is not set | 62 | # CONFIG_CGROUPS is not set |
| 59 | CONFIG_SYSFS_DEPRECATED=y | 63 | CONFIG_SYSFS_DEPRECATED=y |
| 60 | CONFIG_SYSFS_DEPRECATED_V2=y | 64 | CONFIG_SYSFS_DEPRECATED_V2=y |
| @@ -90,10 +94,14 @@ CONFIG_TIMERFD=y | |||
| 90 | CONFIG_EVENTFD=y | 94 | CONFIG_EVENTFD=y |
| 91 | CONFIG_SHMEM=y | 95 | CONFIG_SHMEM=y |
| 92 | CONFIG_AIO=y | 96 | CONFIG_AIO=y |
| 97 | CONFIG_HAVE_PERF_EVENTS=y | ||
| 98 | CONFIG_PERF_USE_VMALLOC=y | ||
| 93 | 99 | ||
| 94 | # | 100 | # |
| 95 | # Kernel Performance Events And Counters | 101 | # Kernel Performance Events And Counters |
| 96 | # | 102 | # |
| 103 | # CONFIG_PERF_EVENTS is not set | ||
| 104 | # CONFIG_PERF_COUNTERS is not set | ||
| 97 | CONFIG_VM_EVENT_COUNTERS=y | 105 | CONFIG_VM_EVENT_COUNTERS=y |
| 98 | CONFIG_SLUB_DEBUG=y | 106 | CONFIG_SLUB_DEBUG=y |
| 99 | CONFIG_COMPAT_BRK=y | 107 | CONFIG_COMPAT_BRK=y |
| @@ -175,8 +183,11 @@ CONFIG_MMU=y | |||
| 175 | # CONFIG_ARCH_INTEGRATOR is not set | 183 | # CONFIG_ARCH_INTEGRATOR is not set |
| 176 | # CONFIG_ARCH_REALVIEW is not set | 184 | # CONFIG_ARCH_REALVIEW is not set |
| 177 | # CONFIG_ARCH_VERSATILE is not set | 185 | # CONFIG_ARCH_VERSATILE is not set |
| 186 | # CONFIG_ARCH_VEXPRESS is not set | ||
| 178 | # CONFIG_ARCH_AT91 is not set | 187 | # CONFIG_ARCH_AT91 is not set |
| 188 | # CONFIG_ARCH_BCMRING is not set | ||
| 179 | # CONFIG_ARCH_CLPS711X is not set | 189 | # CONFIG_ARCH_CLPS711X is not set |
| 190 | # CONFIG_ARCH_CNS3XXX is not set | ||
| 180 | # CONFIG_ARCH_GEMINI is not set | 191 | # CONFIG_ARCH_GEMINI is not set |
| 181 | # CONFIG_ARCH_EBSA110 is not set | 192 | # CONFIG_ARCH_EBSA110 is not set |
| 182 | # CONFIG_ARCH_EP93XX is not set | 193 | # CONFIG_ARCH_EP93XX is not set |
| @@ -185,7 +196,6 @@ CONFIG_MMU=y | |||
| 185 | # CONFIG_ARCH_STMP3XXX is not set | 196 | # CONFIG_ARCH_STMP3XXX is not set |
| 186 | # CONFIG_ARCH_NETX is not set | 197 | # CONFIG_ARCH_NETX is not set |
| 187 | # CONFIG_ARCH_H720X is not set | 198 | # CONFIG_ARCH_H720X is not set |
| 188 | # CONFIG_ARCH_NOMADIK is not set | ||
| 189 | # CONFIG_ARCH_IOP13XX is not set | 199 | # CONFIG_ARCH_IOP13XX is not set |
| 190 | # CONFIG_ARCH_IOP32X is not set | 200 | # CONFIG_ARCH_IOP32X is not set |
| 191 | # CONFIG_ARCH_IOP33X is not set | 201 | # CONFIG_ARCH_IOP33X is not set |
| @@ -202,24 +212,27 @@ CONFIG_MMU=y | |||
| 202 | # CONFIG_ARCH_KS8695 is not set | 212 | # CONFIG_ARCH_KS8695 is not set |
| 203 | # CONFIG_ARCH_NS9XXX is not set | 213 | # CONFIG_ARCH_NS9XXX is not set |
| 204 | # CONFIG_ARCH_W90X900 is not set | 214 | # CONFIG_ARCH_W90X900 is not set |
| 215 | # CONFIG_ARCH_NUC93X is not set | ||
| 205 | # CONFIG_ARCH_PNX4008 is not set | 216 | # CONFIG_ARCH_PNX4008 is not set |
| 206 | # CONFIG_ARCH_PXA is not set | 217 | # CONFIG_ARCH_PXA is not set |
| 207 | # CONFIG_ARCH_MSM is not set | 218 | # CONFIG_ARCH_MSM is not set |
| 219 | # CONFIG_ARCH_SHMOBILE is not set | ||
| 208 | # CONFIG_ARCH_RPC is not set | 220 | # CONFIG_ARCH_RPC is not set |
| 209 | # CONFIG_ARCH_SA1100 is not set | 221 | # CONFIG_ARCH_SA1100 is not set |
| 210 | # CONFIG_ARCH_S3C2410 is not set | 222 | # CONFIG_ARCH_S3C2410 is not set |
| 211 | # CONFIG_ARCH_S3C64XX is not set | 223 | # CONFIG_ARCH_S3C64XX is not set |
| 212 | # CONFIG_ARCH_S5P6440 is not set | 224 | # CONFIG_ARCH_S5P6440 is not set |
| 213 | # CONFIG_ARCH_S5P6442 is not set | 225 | # CONFIG_ARCH_S5P6442 is not set |
| 214 | # CONFIG_ARCH_S5PC1XX is not set | 226 | # CONFIG_ARCH_S5PC100 is not set |
| 215 | CONFIG_ARCH_S5PV210=y | 227 | CONFIG_ARCH_S5PV210=y |
| 216 | # CONFIG_ARCH_SHARK is not set | 228 | # CONFIG_ARCH_SHARK is not set |
| 217 | # CONFIG_ARCH_LH7A40X is not set | 229 | # CONFIG_ARCH_LH7A40X is not set |
| 218 | # CONFIG_ARCH_U300 is not set | 230 | # CONFIG_ARCH_U300 is not set |
| 231 | # CONFIG_ARCH_U8500 is not set | ||
| 232 | # CONFIG_ARCH_NOMADIK is not set | ||
| 219 | # CONFIG_ARCH_DAVINCI is not set | 233 | # CONFIG_ARCH_DAVINCI is not set |
| 220 | # CONFIG_ARCH_OMAP is not set | 234 | # CONFIG_ARCH_OMAP is not set |
| 221 | # CONFIG_ARCH_BCMRING is not set | 235 | # CONFIG_PLAT_SPEAR is not set |
| 222 | # CONFIG_ARCH_U8500 is not set | ||
| 223 | CONFIG_PLAT_SAMSUNG=y | 236 | CONFIG_PLAT_SAMSUNG=y |
| 224 | 237 | ||
| 225 | # | 238 | # |
| @@ -235,16 +248,24 @@ CONFIG_SAMSUNG_GPIOLIB_4BIT=y | |||
| 235 | CONFIG_S3C_GPIO_CFG_S3C24XX=y | 248 | CONFIG_S3C_GPIO_CFG_S3C24XX=y |
| 236 | CONFIG_S3C_GPIO_CFG_S3C64XX=y | 249 | CONFIG_S3C_GPIO_CFG_S3C64XX=y |
| 237 | CONFIG_S3C_GPIO_PULL_UPDOWN=y | 250 | CONFIG_S3C_GPIO_PULL_UPDOWN=y |
| 251 | CONFIG_S5P_GPIO_DRVSTR=y | ||
| 238 | CONFIG_SAMSUNG_GPIO_EXTRA=0 | 252 | CONFIG_SAMSUNG_GPIO_EXTRA=0 |
| 239 | CONFIG_S3C_GPIO_SPACE=0 | 253 | CONFIG_S3C_GPIO_SPACE=0 |
| 240 | CONFIG_S3C_GPIO_TRACK=y | 254 | CONFIG_S3C_GPIO_TRACK=y |
| 241 | # CONFIG_S3C_ADC is not set | 255 | # CONFIG_S3C_ADC is not set |
| 256 | CONFIG_S3C_DEV_WDT=y | ||
| 257 | CONFIG_SAMSUNG_DEV_ADC=y | ||
| 258 | CONFIG_SAMSUNG_DEV_TS=y | ||
| 259 | CONFIG_S3C_PL330_DMA=y | ||
| 242 | 260 | ||
| 243 | # | 261 | # |
| 244 | # Power management | 262 | # Power management |
| 245 | # | 263 | # |
| 246 | CONFIG_PLAT_S5P=y | 264 | CONFIG_PLAT_S5P=y |
| 265 | CONFIG_S5P_EXT_INT=y | ||
| 247 | CONFIG_CPU_S5PV210=y | 266 | CONFIG_CPU_S5PV210=y |
| 267 | # CONFIG_MACH_AQUILA is not set | ||
| 268 | # CONFIG_MACH_GONI is not set | ||
| 248 | CONFIG_MACH_SMDKV210=y | 269 | CONFIG_MACH_SMDKV210=y |
| 249 | # CONFIG_MACH_SMDKC110 is not set | 270 | # CONFIG_MACH_SMDKC110 is not set |
| 250 | 271 | ||
| @@ -274,11 +295,14 @@ CONFIG_ARM_THUMB=y | |||
| 274 | # CONFIG_CPU_BPREDICT_DISABLE is not set | 295 | # CONFIG_CPU_BPREDICT_DISABLE is not set |
| 275 | CONFIG_HAS_TLS_REG=y | 296 | CONFIG_HAS_TLS_REG=y |
| 276 | CONFIG_ARM_L1_CACHE_SHIFT=6 | 297 | CONFIG_ARM_L1_CACHE_SHIFT=6 |
| 298 | CONFIG_ARM_DMA_MEM_BUFFERABLE=y | ||
| 299 | CONFIG_CPU_HAS_PMU=y | ||
| 277 | # CONFIG_ARM_ERRATA_430973 is not set | 300 | # CONFIG_ARM_ERRATA_430973 is not set |
| 278 | # CONFIG_ARM_ERRATA_458693 is not set | 301 | # CONFIG_ARM_ERRATA_458693 is not set |
| 279 | # CONFIG_ARM_ERRATA_460075 is not set | 302 | # CONFIG_ARM_ERRATA_460075 is not set |
| 280 | CONFIG_ARM_VIC=y | 303 | CONFIG_ARM_VIC=y |
| 281 | CONFIG_ARM_VIC_NR=2 | 304 | CONFIG_ARM_VIC_NR=2 |
| 305 | CONFIG_PL330=y | ||
| 282 | 306 | ||
| 283 | # | 307 | # |
| 284 | # Bus support | 308 | # Bus support |
| @@ -327,6 +351,7 @@ CONFIG_ALIGNMENT_TRAP=y | |||
| 327 | CONFIG_ZBOOT_ROM_TEXT=0 | 351 | CONFIG_ZBOOT_ROM_TEXT=0 |
| 328 | CONFIG_ZBOOT_ROM_BSS=0 | 352 | CONFIG_ZBOOT_ROM_BSS=0 |
| 329 | CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc" | 353 | CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc" |
| 354 | # CONFIG_CMDLINE_FORCE is not set | ||
| 330 | # CONFIG_XIP_KERNEL is not set | 355 | # CONFIG_XIP_KERNEL is not set |
| 331 | # CONFIG_KEXEC is not set | 356 | # CONFIG_KEXEC is not set |
| 332 | 357 | ||
| @@ -404,6 +429,7 @@ CONFIG_HAVE_IDE=y | |||
| 404 | # | 429 | # |
| 405 | # SCSI device support | 430 | # SCSI device support |
| 406 | # | 431 | # |
| 432 | CONFIG_SCSI_MOD=y | ||
| 407 | # CONFIG_RAID_ATTRS is not set | 433 | # CONFIG_RAID_ATTRS is not set |
| 408 | CONFIG_SCSI=y | 434 | CONFIG_SCSI=y |
| 409 | CONFIG_SCSI_DMA=y | 435 | CONFIG_SCSI_DMA=y |
| @@ -472,7 +498,9 @@ CONFIG_INPUT_EVDEV=y | |||
| 472 | CONFIG_INPUT_TOUCHSCREEN=y | 498 | CONFIG_INPUT_TOUCHSCREEN=y |
| 473 | # CONFIG_TOUCHSCREEN_AD7879 is not set | 499 | # CONFIG_TOUCHSCREEN_AD7879 is not set |
| 474 | # CONFIG_TOUCHSCREEN_DYNAPRO is not set | 500 | # CONFIG_TOUCHSCREEN_DYNAPRO is not set |
| 501 | # CONFIG_TOUCHSCREEN_HAMPSHIRE is not set | ||
| 475 | # CONFIG_TOUCHSCREEN_FUJITSU is not set | 502 | # CONFIG_TOUCHSCREEN_FUJITSU is not set |
| 503 | # CONFIG_TOUCHSCREEN_S3C2410 is not set | ||
| 476 | # CONFIG_TOUCHSCREEN_GUNZE is not set | 504 | # CONFIG_TOUCHSCREEN_GUNZE is not set |
| 477 | # CONFIG_TOUCHSCREEN_ELO is not set | 505 | # CONFIG_TOUCHSCREEN_ELO is not set |
| 478 | # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set | 506 | # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set |
| @@ -526,6 +554,9 @@ CONFIG_SERIAL_SAMSUNG_CONSOLE=y | |||
| 526 | CONFIG_SERIAL_S5PV210=y | 554 | CONFIG_SERIAL_S5PV210=y |
| 527 | CONFIG_SERIAL_CORE=y | 555 | CONFIG_SERIAL_CORE=y |
| 528 | CONFIG_SERIAL_CORE_CONSOLE=y | 556 | CONFIG_SERIAL_CORE_CONSOLE=y |
| 557 | # CONFIG_SERIAL_TIMBERDALE is not set | ||
| 558 | # CONFIG_SERIAL_ALTERA_JTAGUART is not set | ||
| 559 | # CONFIG_SERIAL_ALTERA_UART is not set | ||
| 529 | CONFIG_UNIX98_PTYS=y | 560 | CONFIG_UNIX98_PTYS=y |
| 530 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | 561 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set |
| 531 | CONFIG_LEGACY_PTYS=y | 562 | CONFIG_LEGACY_PTYS=y |
| @@ -551,6 +582,7 @@ CONFIG_GPIOLIB=y | |||
| 551 | # | 582 | # |
| 552 | # Memory mapped GPIO expanders: | 583 | # Memory mapped GPIO expanders: |
| 553 | # | 584 | # |
| 585 | # CONFIG_GPIO_IT8761E is not set | ||
| 554 | 586 | ||
| 555 | # | 587 | # |
| 556 | # I2C GPIO expanders: | 588 | # I2C GPIO expanders: |
| @@ -572,6 +604,7 @@ CONFIG_GPIOLIB=y | |||
| 572 | # CONFIG_HWMON is not set | 604 | # CONFIG_HWMON is not set |
| 573 | # CONFIG_THERMAL is not set | 605 | # CONFIG_THERMAL is not set |
| 574 | # CONFIG_WATCHDOG is not set | 606 | # CONFIG_WATCHDOG is not set |
| 607 | CONFIG_HAVE_S3C2410_WATCHDOG=y | ||
| 575 | CONFIG_SSB_POSSIBLE=y | 608 | CONFIG_SSB_POSSIBLE=y |
| 576 | 609 | ||
| 577 | # | 610 | # |
| @@ -624,10 +657,6 @@ CONFIG_RTC_LIB=y | |||
| 624 | # CONFIG_DMADEVICES is not set | 657 | # CONFIG_DMADEVICES is not set |
| 625 | # CONFIG_AUXDISPLAY is not set | 658 | # CONFIG_AUXDISPLAY is not set |
| 626 | # CONFIG_UIO is not set | 659 | # CONFIG_UIO is not set |
| 627 | |||
| 628 | # | ||
| 629 | # TI VLYNQ | ||
| 630 | # | ||
| 631 | # CONFIG_STAGING is not set | 660 | # CONFIG_STAGING is not set |
| 632 | 661 | ||
| 633 | # | 662 | # |
| @@ -696,6 +725,7 @@ CONFIG_MISC_FILESYSTEMS=y | |||
| 696 | # CONFIG_BEFS_FS is not set | 725 | # CONFIG_BEFS_FS is not set |
| 697 | # CONFIG_BFS_FS is not set | 726 | # CONFIG_BFS_FS is not set |
| 698 | # CONFIG_EFS_FS is not set | 727 | # CONFIG_EFS_FS is not set |
| 728 | # CONFIG_LOGFS is not set | ||
| 699 | CONFIG_CRAMFS=y | 729 | CONFIG_CRAMFS=y |
| 700 | # CONFIG_SQUASHFS is not set | 730 | # CONFIG_SQUASHFS is not set |
| 701 | # CONFIG_VXFS_FS is not set | 731 | # CONFIG_VXFS_FS is not set |
| @@ -835,6 +865,8 @@ CONFIG_HAVE_FUNCTION_TRACER=y | |||
| 835 | CONFIG_TRACING_SUPPORT=y | 865 | CONFIG_TRACING_SUPPORT=y |
| 836 | CONFIG_FTRACE=y | 866 | CONFIG_FTRACE=y |
| 837 | # CONFIG_FUNCTION_TRACER is not set | 867 | # CONFIG_FUNCTION_TRACER is not set |
| 868 | # CONFIG_IRQSOFF_TRACER is not set | ||
| 869 | # CONFIG_PREEMPT_TRACER is not set | ||
| 838 | # CONFIG_SCHED_TRACER is not set | 870 | # CONFIG_SCHED_TRACER is not set |
| 839 | # CONFIG_ENABLE_DEFAULT_TRACERS is not set | 871 | # CONFIG_ENABLE_DEFAULT_TRACERS is not set |
| 840 | # CONFIG_BOOT_TRACER is not set | 872 | # CONFIG_BOOT_TRACER is not set |
| @@ -845,6 +877,7 @@ CONFIG_BRANCH_PROFILE_NONE=y | |||
| 845 | # CONFIG_KMEMTRACE is not set | 877 | # CONFIG_KMEMTRACE is not set |
| 846 | # CONFIG_WORKQUEUE_TRACER is not set | 878 | # CONFIG_WORKQUEUE_TRACER is not set |
| 847 | # CONFIG_BLK_DEV_IO_TRACE is not set | 879 | # CONFIG_BLK_DEV_IO_TRACE is not set |
| 880 | # CONFIG_ATOMIC64_SELFTEST is not set | ||
| 848 | # CONFIG_SAMPLES is not set | 881 | # CONFIG_SAMPLES is not set |
| 849 | CONFIG_HAVE_ARCH_KGDB=y | 882 | CONFIG_HAVE_ARCH_KGDB=y |
| 850 | # CONFIG_KGDB is not set | 883 | # CONFIG_KGDB is not set |
diff --git a/arch/arm/include/asm/hardirq.h b/arch/arm/include/asm/hardirq.h index 182310b99195..6d7485aff955 100644 --- a/arch/arm/include/asm/hardirq.h +++ b/arch/arm/include/asm/hardirq.h | |||
| @@ -12,7 +12,9 @@ typedef struct { | |||
| 12 | 12 | ||
| 13 | #include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */ | 13 | #include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */ |
| 14 | 14 | ||
| 15 | #if NR_IRQS > 256 | 15 | #if NR_IRQS > 512 |
| 16 | #define HARDIRQ_BITS 10 | ||
| 17 | #elif NR_IRQS > 256 | ||
| 16 | #define HARDIRQ_BITS 9 | 18 | #define HARDIRQ_BITS 9 |
| 17 | #else | 19 | #else |
| 18 | #define HARDIRQ_BITS 8 | 20 | #define HARDIRQ_BITS 8 |
diff --git a/arch/arm/include/asm/scatterlist.h b/arch/arm/include/asm/scatterlist.h index bcda59f39941..2f87870d9347 100644 --- a/arch/arm/include/asm/scatterlist.h +++ b/arch/arm/include/asm/scatterlist.h | |||
| @@ -3,9 +3,6 @@ | |||
| 3 | 3 | ||
| 4 | #include <asm/memory.h> | 4 | #include <asm/memory.h> |
| 5 | #include <asm/types.h> | 5 | #include <asm/types.h> |
| 6 | |||
| 7 | #include <asm-generic/scatterlist.h> | 6 | #include <asm-generic/scatterlist.h> |
| 8 | 7 | ||
| 9 | #undef ARCH_HAS_SG_CHAIN | ||
| 10 | |||
| 11 | #endif /* _ASMARM_SCATTERLIST_H */ | 8 | #endif /* _ASMARM_SCATTERLIST_H */ |
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index c91c77b54dea..122d999bdc7c 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c | |||
| @@ -593,6 +593,7 @@ static int __init parse_tag_revision(const struct tag *tag) | |||
| 593 | 593 | ||
| 594 | __tagtable(ATAG_REVISION, parse_tag_revision); | 594 | __tagtable(ATAG_REVISION, parse_tag_revision); |
| 595 | 595 | ||
| 596 | #ifndef CONFIG_CMDLINE_FORCE | ||
| 596 | static int __init parse_tag_cmdline(const struct tag *tag) | 597 | static int __init parse_tag_cmdline(const struct tag *tag) |
| 597 | { | 598 | { |
| 598 | strlcpy(default_command_line, tag->u.cmdline.cmdline, COMMAND_LINE_SIZE); | 599 | strlcpy(default_command_line, tag->u.cmdline.cmdline, COMMAND_LINE_SIZE); |
| @@ -600,6 +601,7 @@ static int __init parse_tag_cmdline(const struct tag *tag) | |||
| 600 | } | 601 | } |
| 601 | 602 | ||
| 602 | __tagtable(ATAG_CMDLINE, parse_tag_cmdline); | 603 | __tagtable(ATAG_CMDLINE, parse_tag_cmdline); |
| 604 | #endif /* CONFIG_CMDLINE_FORCE */ | ||
| 603 | 605 | ||
| 604 | /* | 606 | /* |
| 605 | * Scan the tag table for this tag, and call its parse function. | 607 | * Scan the tag table for this tag, and call its parse function. |
diff --git a/arch/arm/kernel/unwind.c b/arch/arm/kernel/unwind.c index 50292cd9c120..dd81a918c106 100644 --- a/arch/arm/kernel/unwind.c +++ b/arch/arm/kernel/unwind.c | |||
| @@ -26,6 +26,7 @@ | |||
| 26 | * http://infocenter.arm.com/help/topic/com.arm.doc.subset.swdev.abi/index.html | 26 | * http://infocenter.arm.com/help/topic/com.arm.doc.subset.swdev.abi/index.html |
| 27 | */ | 27 | */ |
| 28 | 28 | ||
| 29 | #ifndef __CHECKER__ | ||
| 29 | #if !defined (__ARM_EABI__) | 30 | #if !defined (__ARM_EABI__) |
| 30 | #warning Your compiler does not have EABI support. | 31 | #warning Your compiler does not have EABI support. |
| 31 | #warning ARM unwind is known to compile only with EABI compilers. | 32 | #warning ARM unwind is known to compile only with EABI compilers. |
| @@ -34,6 +35,7 @@ | |||
| 34 | #warning Your compiler is too buggy; it is known to not compile ARM unwind support. | 35 | #warning Your compiler is too buggy; it is known to not compile ARM unwind support. |
| 35 | #warning Change compiler or disable ARM_UNWIND option. | 36 | #warning Change compiler or disable ARM_UNWIND option. |
| 36 | #endif | 37 | #endif |
| 38 | #endif /* __CHECKER__ */ | ||
| 37 | 39 | ||
| 38 | #include <linux/kernel.h> | 40 | #include <linux/kernel.h> |
| 39 | #include <linux/init.h> | 41 | #include <linux/init.h> |
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c index 98f9f4bc9396..ee800595594d 100644 --- a/arch/arm/mach-at91/board-sam9m10g45ek.c +++ b/arch/arm/mach-at91/board-sam9m10g45ek.c | |||
| @@ -25,7 +25,6 @@ | |||
| 25 | #include <linux/leds.h> | 25 | #include <linux/leds.h> |
| 26 | #include <linux/clk.h> | 26 | #include <linux/clk.h> |
| 27 | 27 | ||
| 28 | #include <mach/hardware.h> | ||
| 29 | #include <video/atmel_lcdc.h> | 28 | #include <video/atmel_lcdc.h> |
| 30 | 29 | ||
| 31 | #include <asm/setup.h> | 30 | #include <asm/setup.h> |
diff --git a/arch/arm/mach-clps711x/Makefile.boot b/arch/arm/mach-clps711x/Makefile.boot index d3d29339e149..a51fcef64fe0 100644 --- a/arch/arm/mach-clps711x/Makefile.boot +++ b/arch/arm/mach-clps711x/Makefile.boot | |||
| @@ -1,7 +1,6 @@ | |||
| 1 | # The standard locations for stuff on CLPS711x type processors | 1 | # The standard locations for stuff on CLPS711x type processors |
| 2 | zreladdr-y := 0xc0028000 | 2 | zreladdr-y := 0xc0028000 |
| 3 | params_phys-y := 0xc0000100 | 3 | params_phys-y := 0xc0000100 |
| 4 | # Should probably have some agreement on these... | 4 | # Should probably have some agreement on these... |
| 5 | initrd_phys-$(CONFIG_ARCH_P720T) := 0xc0400000 | 5 | initrd_phys-$(CONFIG_ARCH_P720T) := 0xc0400000 |
| 6 | initrd_phys-$(CONFIG_ARCH_CDB89712) := 0x00700000 | 6 | initrd_phys-$(CONFIG_ARCH_CDB89712) := 0x00700000 |
| 7 | |||
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c index abd04932917b..2ec3095ffb7b 100644 --- a/arch/arm/mach-davinci/board-da850-evm.c +++ b/arch/arm/mach-davinci/board-da850-evm.c | |||
| @@ -17,6 +17,7 @@ | |||
| 17 | #include <linux/i2c.h> | 17 | #include <linux/i2c.h> |
| 18 | #include <linux/i2c/at24.h> | 18 | #include <linux/i2c/at24.h> |
| 19 | #include <linux/i2c/pca953x.h> | 19 | #include <linux/i2c/pca953x.h> |
| 20 | #include <linux/mfd/tps6507x.h> | ||
| 20 | #include <linux/gpio.h> | 21 | #include <linux/gpio.h> |
| 21 | #include <linux/platform_device.h> | 22 | #include <linux/platform_device.h> |
| 22 | #include <linux/mtd/mtd.h> | 23 | #include <linux/mtd/mtd.h> |
| @@ -24,6 +25,8 @@ | |||
| 24 | #include <linux/mtd/partitions.h> | 25 | #include <linux/mtd/partitions.h> |
| 25 | #include <linux/mtd/physmap.h> | 26 | #include <linux/mtd/physmap.h> |
| 26 | #include <linux/regulator/machine.h> | 27 | #include <linux/regulator/machine.h> |
| 28 | #include <linux/mfd/tps6507x.h> | ||
| 29 | #include <linux/input/tps6507x-ts.h> | ||
| 27 | 30 | ||
| 28 | #include <asm/mach-types.h> | 31 | #include <asm/mach-types.h> |
| 29 | #include <asm/mach/arch.h> | 32 | #include <asm/mach/arch.h> |
| @@ -533,10 +536,24 @@ struct regulator_init_data tps65070_regulator_data[] = { | |||
| 533 | }, | 536 | }, |
| 534 | }; | 537 | }; |
| 535 | 538 | ||
| 539 | static struct touchscreen_init_data tps6507x_touchscreen_data = { | ||
| 540 | .poll_period = 30, /* ms between touch samples */ | ||
| 541 | .min_pressure = 0x30, /* minimum pressure to trigger touch */ | ||
| 542 | .vref = 0, /* turn off vref when not using A/D */ | ||
| 543 | .vendor = 0, /* /sys/class/input/input?/id/vendor */ | ||
| 544 | .product = 65070, /* /sys/class/input/input?/id/product */ | ||
| 545 | .version = 0x100, /* /sys/class/input/input?/id/version */ | ||
| 546 | }; | ||
| 547 | |||
| 548 | static struct tps6507x_board tps_board = { | ||
| 549 | .tps6507x_pmic_init_data = &tps65070_regulator_data[0], | ||
| 550 | .tps6507x_ts_init_data = &tps6507x_touchscreen_data, | ||
| 551 | }; | ||
| 552 | |||
| 536 | static struct i2c_board_info __initdata da850evm_tps65070_info[] = { | 553 | static struct i2c_board_info __initdata da850evm_tps65070_info[] = { |
| 537 | { | 554 | { |
| 538 | I2C_BOARD_INFO("tps6507x", 0x48), | 555 | I2C_BOARD_INFO("tps6507x", 0x48), |
| 539 | .platform_data = &tps65070_regulator_data[0], | 556 | .platform_data = &tps_board, |
| 540 | }, | 557 | }, |
| 541 | }; | 558 | }; |
| 542 | 559 | ||
diff --git a/arch/arm/mach-davinci/include/mach/mmc.h b/arch/arm/mach-davinci/include/mach/mmc.h index 5a85e24f3673..d4f1e9675069 100644 --- a/arch/arm/mach-davinci/include/mach/mmc.h +++ b/arch/arm/mach-davinci/include/mach/mmc.h | |||
| @@ -22,6 +22,9 @@ struct davinci_mmc_config { | |||
| 22 | 22 | ||
| 23 | /* Version of the MMC/SD controller */ | 23 | /* Version of the MMC/SD controller */ |
| 24 | u8 version; | 24 | u8 version; |
| 25 | |||
| 26 | /* Number of sg segments */ | ||
| 27 | u8 nr_sg; | ||
| 25 | }; | 28 | }; |
| 26 | void davinci_setup_mmc(int module, struct davinci_mmc_config *config); | 29 | void davinci_setup_mmc(int module, struct davinci_mmc_config *config); |
| 27 | 30 | ||
diff --git a/arch/arm/mach-ep93xx/include/mach/ep93xx_spi.h b/arch/arm/mach-ep93xx/include/mach/ep93xx_spi.h new file mode 100644 index 000000000000..0a37961b3453 --- /dev/null +++ b/arch/arm/mach-ep93xx/include/mach/ep93xx_spi.h | |||
| @@ -0,0 +1,27 @@ | |||
| 1 | #ifndef __ASM_MACH_EP93XX_SPI_H | ||
| 2 | #define __ASM_MACH_EP93XX_SPI_H | ||
| 3 | |||
| 4 | struct spi_device; | ||
| 5 | |||
| 6 | /** | ||
| 7 | * struct ep93xx_spi_info - EP93xx specific SPI descriptor | ||
| 8 | * @num_chipselect: number of chip selects on this board, must be | ||
| 9 | * at least one | ||
| 10 | */ | ||
| 11 | struct ep93xx_spi_info { | ||
| 12 | int num_chipselect; | ||
| 13 | }; | ||
| 14 | |||
| 15 | /** | ||
| 16 | * struct ep93xx_spi_chip_ops - operation callbacks for SPI slave device | ||
| 17 | * @setup: setup the chip select mechanism | ||
| 18 | * @cleanup: cleanup the chip select mechanism | ||
| 19 | * @cs_control: control the device chip select | ||
| 20 | */ | ||
| 21 | struct ep93xx_spi_chip_ops { | ||
| 22 | int (*setup)(struct spi_device *spi); | ||
| 23 | void (*cleanup)(struct spi_device *spi); | ||
| 24 | void (*cs_control)(struct spi_device *spi, int value); | ||
| 25 | }; | ||
| 26 | |||
| 27 | #endif /* __ASM_MACH_EP93XX_SPI_H */ | ||
diff --git a/arch/arm/mach-footbridge/ebsa285-pci.c b/arch/arm/mach-footbridge/ebsa285-pci.c index 720c0bac1702..e5ab5bddbc8c 100644 --- a/arch/arm/mach-footbridge/ebsa285-pci.c +++ b/arch/arm/mach-footbridge/ebsa285-pci.c | |||
| @@ -20,9 +20,9 @@ static int __init ebsa285_map_irq(struct pci_dev *dev, u8 slot, u8 pin) | |||
| 20 | if (dev->vendor == PCI_VENDOR_ID_CONTAQ && | 20 | if (dev->vendor == PCI_VENDOR_ID_CONTAQ && |
| 21 | dev->device == PCI_DEVICE_ID_CONTAQ_82C693) | 21 | dev->device == PCI_DEVICE_ID_CONTAQ_82C693) |
| 22 | switch (PCI_FUNC(dev->devfn)) { | 22 | switch (PCI_FUNC(dev->devfn)) { |
| 23 | case 1: return 14; | 23 | case 1: return 14; |
| 24 | case 2: return 15; | 24 | case 2: return 15; |
| 25 | case 3: return 12; | 25 | case 3: return 12; |
| 26 | } | 26 | } |
| 27 | 27 | ||
| 28 | return irqmap_ebsa285[(slot + pin) & 3]; | 28 | return irqmap_ebsa285[(slot + pin) & 3]; |
diff --git a/arch/arm/mach-h720x/common.h b/arch/arm/mach-h720x/common.h index d8798dbc44f8..7dd5fa604efc 100644 --- a/arch/arm/mach-h720x/common.h +++ b/arch/arm/mach-h720x/common.h | |||
| @@ -14,13 +14,13 @@ | |||
| 14 | */ | 14 | */ |
| 15 | 15 | ||
| 16 | extern unsigned long h720x_gettimeoffset(void); | 16 | extern unsigned long h720x_gettimeoffset(void); |
| 17 | extern void __init h720x_init_irq (void); | 17 | extern void __init h720x_init_irq(void); |
| 18 | extern void __init h720x_map_io(void); | 18 | extern void __init h720x_map_io(void); |
| 19 | 19 | ||
| 20 | #ifdef CONFIG_ARCH_H7202 | 20 | #ifdef CONFIG_ARCH_H7202 |
| 21 | extern struct sys_timer h7202_timer; | 21 | extern struct sys_timer h7202_timer; |
| 22 | extern void __init init_hw_h7202(void); | 22 | extern void __init init_hw_h7202(void); |
| 23 | extern void __init h7202_init_irq (void); | 23 | extern void __init h7202_init_irq(void); |
| 24 | extern void __init h7202_init_time(void); | 24 | extern void __init h7202_init_time(void); |
| 25 | #endif | 25 | #endif |
| 26 | 26 | ||
diff --git a/arch/arm/mach-msm/board-msm7x27.c b/arch/arm/mach-msm/board-msm7x27.c index cccb9f3c9d01..db9381b85bf0 100644 --- a/arch/arm/mach-msm/board-msm7x27.c +++ b/arch/arm/mach-msm/board-msm7x27.c | |||
| @@ -20,7 +20,6 @@ | |||
| 20 | #include <linux/input.h> | 20 | #include <linux/input.h> |
| 21 | #include <linux/io.h> | 21 | #include <linux/io.h> |
| 22 | #include <linux/delay.h> | 22 | #include <linux/delay.h> |
| 23 | #include <linux/bootmem.h> | ||
| 24 | #include <linux/power_supply.h> | 23 | #include <linux/power_supply.h> |
| 25 | 24 | ||
| 26 | #include <mach/hardware.h> | 25 | #include <mach/hardware.h> |
diff --git a/arch/arm/mach-msm/board-msm7x30.c b/arch/arm/mach-msm/board-msm7x30.c index bac1f3c38a3b..e32981928c77 100644 --- a/arch/arm/mach-msm/board-msm7x30.c +++ b/arch/arm/mach-msm/board-msm7x30.c | |||
| @@ -20,7 +20,6 @@ | |||
| 20 | #include <linux/gpio.h> | 20 | #include <linux/gpio.h> |
| 21 | #include <linux/platform_device.h> | 21 | #include <linux/platform_device.h> |
| 22 | #include <linux/delay.h> | 22 | #include <linux/delay.h> |
| 23 | #include <linux/bootmem.h> | ||
| 24 | #include <linux/io.h> | 23 | #include <linux/io.h> |
| 25 | #include <linux/smsc911x.h> | 24 | #include <linux/smsc911x.h> |
| 26 | 25 | ||
diff --git a/arch/arm/mach-msm/board-qsd8x50.c b/arch/arm/mach-msm/board-qsd8x50.c index ec4606643d2c..e3cc80792d6c 100644 --- a/arch/arm/mach-msm/board-qsd8x50.c +++ b/arch/arm/mach-msm/board-qsd8x50.c | |||
| @@ -19,7 +19,6 @@ | |||
| 19 | #include <linux/irq.h> | 19 | #include <linux/irq.h> |
| 20 | #include <linux/gpio.h> | 20 | #include <linux/gpio.h> |
| 21 | #include <linux/platform_device.h> | 21 | #include <linux/platform_device.h> |
| 22 | #include <linux/bootmem.h> | ||
| 23 | #include <linux/delay.h> | 22 | #include <linux/delay.h> |
| 24 | 23 | ||
| 25 | #include <asm/mach-types.h> | 24 | #include <asm/mach-types.h> |
diff --git a/arch/arm/mach-msm/dma.c b/arch/arm/mach-msm/dma.c index 3d725ae518e4..02cae5e2951c 100644 --- a/arch/arm/mach-msm/dma.c +++ b/arch/arm/mach-msm/dma.c | |||
| @@ -17,6 +17,7 @@ | |||
| 17 | #include <linux/err.h> | 17 | #include <linux/err.h> |
| 18 | #include <linux/io.h> | 18 | #include <linux/io.h> |
| 19 | #include <linux/interrupt.h> | 19 | #include <linux/interrupt.h> |
| 20 | #include <linux/completion.h> | ||
| 20 | #include <mach/dma.h> | 21 | #include <mach/dma.h> |
| 21 | 22 | ||
| 22 | #define MSM_DMOV_CHANNEL_COUNT 16 | 23 | #define MSM_DMOV_CHANNEL_COUNT 16 |
| @@ -69,6 +70,8 @@ void msm_dmov_enqueue_cmd(unsigned id, struct msm_dmov_cmd *cmd) | |||
| 69 | writel(DMOV_CONFIG_IRQ_EN, DMOV_CONFIG(id)); | 70 | writel(DMOV_CONFIG_IRQ_EN, DMOV_CONFIG(id)); |
| 70 | } | 71 | } |
| 71 | #endif | 72 | #endif |
| 73 | if (cmd->execute_func) | ||
| 74 | cmd->execute_func(cmd); | ||
| 72 | PRINT_IO("msm_dmov_enqueue_cmd(%d), start command, status %x\n", id, status); | 75 | PRINT_IO("msm_dmov_enqueue_cmd(%d), start command, status %x\n", id, status); |
| 73 | list_add_tail(&cmd->list, &active_commands[id]); | 76 | list_add_tail(&cmd->list, &active_commands[id]); |
| 74 | if (!channel_active) | 77 | if (!channel_active) |
| @@ -116,6 +119,7 @@ int msm_dmov_exec_cmd(unsigned id, unsigned int cmdptr) | |||
| 116 | 119 | ||
| 117 | cmd.dmov_cmd.cmdptr = cmdptr; | 120 | cmd.dmov_cmd.cmdptr = cmdptr; |
| 118 | cmd.dmov_cmd.complete_func = dmov_exec_cmdptr_complete_func; | 121 | cmd.dmov_cmd.complete_func = dmov_exec_cmdptr_complete_func; |
| 122 | cmd.dmov_cmd.execute_func = NULL; | ||
| 119 | cmd.id = id; | 123 | cmd.id = id; |
| 120 | init_completion(&cmd.complete); | 124 | init_completion(&cmd.complete); |
| 121 | 125 | ||
| @@ -221,6 +225,8 @@ static irqreturn_t msm_datamover_irq_handler(int irq, void *dev_id) | |||
| 221 | cmd = list_entry(ready_commands[id].next, typeof(*cmd), list); | 225 | cmd = list_entry(ready_commands[id].next, typeof(*cmd), list); |
| 222 | list_del(&cmd->list); | 226 | list_del(&cmd->list); |
| 223 | list_add_tail(&cmd->list, &active_commands[id]); | 227 | list_add_tail(&cmd->list, &active_commands[id]); |
| 228 | if (cmd->execute_func) | ||
| 229 | cmd->execute_func(cmd); | ||
| 224 | PRINT_FLOW("msm_datamover_irq_handler id %d, start command\n", id); | 230 | PRINT_FLOW("msm_datamover_irq_handler id %d, start command\n", id); |
| 225 | writel(cmd->cmdptr, DMOV_CMD_PTR(id)); | 231 | writel(cmd->cmdptr, DMOV_CMD_PTR(id)); |
| 226 | } | 232 | } |
diff --git a/arch/arm/mach-msm/include/mach/dma.h b/arch/arm/mach-msm/include/mach/dma.h index 04c51cc04f31..00f9bbfadbe6 100644 --- a/arch/arm/mach-msm/include/mach/dma.h +++ b/arch/arm/mach-msm/include/mach/dma.h | |||
| @@ -28,6 +28,8 @@ struct msm_dmov_cmd { | |||
| 28 | void (*complete_func)(struct msm_dmov_cmd *cmd, | 28 | void (*complete_func)(struct msm_dmov_cmd *cmd, |
| 29 | unsigned int result, | 29 | unsigned int result, |
| 30 | struct msm_dmov_errdata *err); | 30 | struct msm_dmov_errdata *err); |
| 31 | void (*execute_func)(struct msm_dmov_cmd *cmd); | ||
| 32 | void *data; | ||
| 31 | }; | 33 | }; |
| 32 | 34 | ||
| 33 | void msm_dmov_enqueue_cmd(unsigned id, struct msm_dmov_cmd *cmd); | 35 | void msm_dmov_enqueue_cmd(unsigned id, struct msm_dmov_cmd *cmd); |
diff --git a/arch/arm/mach-mx2/devices.c b/arch/arm/mach-mx2/devices.c index b91e412f7b3e..a0aeb8a4adc1 100644 --- a/arch/arm/mach-mx2/devices.c +++ b/arch/arm/mach-mx2/devices.c | |||
| @@ -109,12 +109,7 @@ DEFINE_IMX_GPT_DEVICE(4, MX27_GPT5_BASE_ADDR, MX27_INT_GPT5); | |||
| 109 | DEFINE_IMX_GPT_DEVICE(5, MX27_GPT6_BASE_ADDR, MX27_INT_GPT6); | 109 | DEFINE_IMX_GPT_DEVICE(5, MX27_GPT6_BASE_ADDR, MX27_INT_GPT6); |
| 110 | #endif | 110 | #endif |
| 111 | 111 | ||
| 112 | /* | 112 | /* Watchdog: i.MX1 has seperate driver, i.MX21 and i.MX27 are equal */ |
| 113 | * Watchdog: | ||
| 114 | * - i.MX1 | ||
| 115 | * - i.MX21 | ||
| 116 | * - i.MX27 | ||
| 117 | */ | ||
| 118 | static struct resource mxc_wdt_resources[] = { | 113 | static struct resource mxc_wdt_resources[] = { |
| 119 | { | 114 | { |
| 120 | .start = MX2x_WDOG_BASE_ADDR, | 115 | .start = MX2x_WDOG_BASE_ADDR, |
| @@ -124,7 +119,7 @@ static struct resource mxc_wdt_resources[] = { | |||
| 124 | }; | 119 | }; |
| 125 | 120 | ||
| 126 | struct platform_device mxc_wdt = { | 121 | struct platform_device mxc_wdt = { |
| 127 | .name = "mxc_wdt", | 122 | .name = "imx2-wdt", |
| 128 | .id = 0, | 123 | .id = 0, |
| 129 | .num_resources = ARRAY_SIZE(mxc_wdt_resources), | 124 | .num_resources = ARRAY_SIZE(mxc_wdt_resources), |
| 130 | .resource = mxc_wdt_resources, | 125 | .resource = mxc_wdt_resources, |
| @@ -483,8 +478,8 @@ int __init mxc_register_gpios(void) | |||
| 483 | #ifdef CONFIG_MACH_MX21 | 478 | #ifdef CONFIG_MACH_MX21 |
| 484 | static struct resource mx21_usbhc_resources[] = { | 479 | static struct resource mx21_usbhc_resources[] = { |
| 485 | { | 480 | { |
| 486 | .start = MX21_BASE_ADDR, | 481 | .start = MX21_USBOTG_BASE_ADDR, |
| 487 | .end = MX21_BASE_ADDR + 0x1FFF, | 482 | .end = MX21_USBOTG_BASE_ADDR + SZ_8K - 1, |
| 488 | .flags = IORESOURCE_MEM, | 483 | .flags = IORESOURCE_MEM, |
| 489 | }, | 484 | }, |
| 490 | { | 485 | { |
diff --git a/arch/arm/mach-mx2/mach-pca100.c b/arch/arm/mach-mx2/mach-pca100.c index 778fff230918..a87422ed4ff5 100644 --- a/arch/arm/mach-mx2/mach-pca100.c +++ b/arch/arm/mach-mx2/mach-pca100.c | |||
| @@ -145,6 +145,7 @@ static struct mxc_nand_platform_data pca100_nand_board_info = { | |||
| 145 | static struct platform_device *platform_devices[] __initdata = { | 145 | static struct platform_device *platform_devices[] __initdata = { |
| 146 | &mxc_w1_master_device, | 146 | &mxc_w1_master_device, |
| 147 | &mxc_fec_device, | 147 | &mxc_fec_device, |
| 148 | &mxc_wdt, | ||
| 148 | }; | 149 | }; |
| 149 | 150 | ||
| 150 | static struct imxi2c_platform_data pca100_i2c_1_data = { | 151 | static struct imxi2c_platform_data pca100_i2c_1_data = { |
diff --git a/arch/arm/mach-mx2/mach-pcm038.c b/arch/arm/mach-mx2/mach-pcm038.c index 035fbe046ec0..36c89431679a 100644 --- a/arch/arm/mach-mx2/mach-pcm038.c +++ b/arch/arm/mach-mx2/mach-pcm038.c | |||
| @@ -182,6 +182,7 @@ static struct platform_device *platform_devices[] __initdata = { | |||
| 182 | &mxc_w1_master_device, | 182 | &mxc_w1_master_device, |
| 183 | &mxc_fec_device, | 183 | &mxc_fec_device, |
| 184 | &pcm038_sram_mtd_device, | 184 | &pcm038_sram_mtd_device, |
| 185 | &mxc_wdt, | ||
| 185 | }; | 186 | }; |
| 186 | 187 | ||
| 187 | /* On pcm038 there's a sram attached to CS1, we enable the chipselect here and | 188 | /* On pcm038 there's a sram attached to CS1, we enable the chipselect here and |
diff --git a/arch/arm/mach-mx25/devices.c b/arch/arm/mach-mx25/devices.c index 3f4b8a0b5fac..3a405fa400eb 100644 --- a/arch/arm/mach-mx25/devices.c +++ b/arch/arm/mach-mx25/devices.c | |||
| @@ -500,3 +500,18 @@ struct platform_device mx25_fb_device = { | |||
| 500 | .coherent_dma_mask = 0xFFFFFFFF, | 500 | .coherent_dma_mask = 0xFFFFFFFF, |
| 501 | }, | 501 | }, |
| 502 | }; | 502 | }; |
| 503 | |||
| 504 | static struct resource mxc_wdt_resources[] = { | ||
| 505 | { | ||
| 506 | .start = MX25_WDOG_BASE_ADDR, | ||
| 507 | .end = MX25_WDOG_BASE_ADDR + SZ_16K - 1, | ||
| 508 | .flags = IORESOURCE_MEM, | ||
| 509 | }, | ||
| 510 | }; | ||
| 511 | |||
| 512 | struct platform_device mxc_wdt = { | ||
| 513 | .name = "imx2-wdt", | ||
| 514 | .id = 0, | ||
| 515 | .num_resources = ARRAY_SIZE(mxc_wdt_resources), | ||
| 516 | .resource = mxc_wdt_resources, | ||
| 517 | }; | ||
diff --git a/arch/arm/mach-mx25/devices.h b/arch/arm/mach-mx25/devices.h index 39560e13bc0d..cee12c0a0be6 100644 --- a/arch/arm/mach-mx25/devices.h +++ b/arch/arm/mach-mx25/devices.h | |||
| @@ -21,3 +21,4 @@ extern struct platform_device mx25_fec_device; | |||
| 21 | extern struct platform_device mxc_nand_device; | 21 | extern struct platform_device mxc_nand_device; |
| 22 | extern struct platform_device mx25_rtc_device; | 22 | extern struct platform_device mx25_rtc_device; |
| 23 | extern struct platform_device mx25_fb_device; | 23 | extern struct platform_device mx25_fb_device; |
| 24 | extern struct platform_device mxc_wdt; | ||
diff --git a/arch/arm/mach-mx3/Kconfig b/arch/arm/mach-mx3/Kconfig index 170f68e46dd5..344753fdf25e 100644 --- a/arch/arm/mach-mx3/Kconfig +++ b/arch/arm/mach-mx3/Kconfig | |||
| @@ -82,6 +82,7 @@ config MACH_MX31MOBOARD | |||
| 82 | config MACH_MX31LILLY | 82 | config MACH_MX31LILLY |
| 83 | bool "Support MX31 LILLY-1131 platforms (INCO startec)" | 83 | bool "Support MX31 LILLY-1131 platforms (INCO startec)" |
| 84 | select ARCH_MX31 | 84 | select ARCH_MX31 |
| 85 | select MXC_ULPI if USB_ULPI | ||
| 85 | help | 86 | help |
| 86 | Include support for mx31 based LILLY1131 modules. This includes | 87 | Include support for mx31 based LILLY1131 modules. This includes |
| 87 | specific configurations for the board and its peripherals. | 88 | specific configurations for the board and its peripherals. |
diff --git a/arch/arm/mach-mx3/devices.c b/arch/arm/mach-mx3/devices.c index f8911154a9fa..db7acd6e9101 100644 --- a/arch/arm/mach-mx3/devices.c +++ b/arch/arm/mach-mx3/devices.c | |||
| @@ -582,12 +582,50 @@ static struct resource imx_wdt_resources[] = { | |||
| 582 | }; | 582 | }; |
| 583 | 583 | ||
| 584 | struct platform_device imx_wdt_device0 = { | 584 | struct platform_device imx_wdt_device0 = { |
| 585 | .name = "imx-wdt", | 585 | .name = "imx2-wdt", |
| 586 | .id = 0, | 586 | .id = 0, |
| 587 | .num_resources = ARRAY_SIZE(imx_wdt_resources), | 587 | .num_resources = ARRAY_SIZE(imx_wdt_resources), |
| 588 | .resource = imx_wdt_resources, | 588 | .resource = imx_wdt_resources, |
| 589 | }; | 589 | }; |
| 590 | 590 | ||
| 591 | static struct resource imx_rtc_resources[] = { | ||
| 592 | { | ||
| 593 | .start = MX31_RTC_BASE_ADDR, | ||
| 594 | .end = MX31_RTC_BASE_ADDR + 0x3fff, | ||
| 595 | .flags = IORESOURCE_MEM, | ||
| 596 | }, | ||
| 597 | { | ||
| 598 | .start = MX31_INT_RTC, | ||
| 599 | .flags = IORESOURCE_IRQ, | ||
| 600 | }, | ||
| 601 | }; | ||
| 602 | |||
| 603 | struct platform_device imx_rtc_device0 = { | ||
| 604 | .name = "mxc_rtc", | ||
| 605 | .id = -1, | ||
| 606 | .num_resources = ARRAY_SIZE(imx_rtc_resources), | ||
| 607 | .resource = imx_rtc_resources, | ||
| 608 | }; | ||
| 609 | |||
| 610 | static struct resource imx_kpp_resources[] = { | ||
| 611 | { | ||
| 612 | .start = MX3x_KPP_BASE_ADDR, | ||
| 613 | .end = MX3x_KPP_BASE_ADDR + 0xf, | ||
| 614 | .flags = IORESOURCE_MEM | ||
| 615 | }, { | ||
| 616 | .start = MX3x_INT_KPP, | ||
| 617 | .end = MX3x_INT_KPP, | ||
| 618 | .flags = IORESOURCE_IRQ, | ||
| 619 | }, | ||
| 620 | }; | ||
| 621 | |||
| 622 | struct platform_device imx_kpp_device = { | ||
| 623 | .name = "imx-keypad", | ||
| 624 | .id = -1, | ||
| 625 | .num_resources = ARRAY_SIZE(imx_kpp_resources), | ||
| 626 | .resource = imx_kpp_resources, | ||
| 627 | }; | ||
| 628 | |||
| 591 | static int __init mx3_devices_init(void) | 629 | static int __init mx3_devices_init(void) |
| 592 | { | 630 | { |
| 593 | if (cpu_is_mx31()) { | 631 | if (cpu_is_mx31()) { |
diff --git a/arch/arm/mach-mx3/devices.h b/arch/arm/mach-mx3/devices.h index 4f77eb501274..2c3c8646a29e 100644 --- a/arch/arm/mach-mx3/devices.h +++ b/arch/arm/mach-mx3/devices.h | |||
| @@ -27,3 +27,5 @@ extern struct platform_device imx_ssi_device0; | |||
| 27 | extern struct platform_device imx_ssi_device1; | 27 | extern struct platform_device imx_ssi_device1; |
| 28 | extern struct platform_device imx_ssi_device1; | 28 | extern struct platform_device imx_ssi_device1; |
| 29 | extern struct platform_device imx_wdt_device0; | 29 | extern struct platform_device imx_wdt_device0; |
| 30 | extern struct platform_device imx_rtc_device0; | ||
| 31 | extern struct platform_device imx_kpp_device; | ||
diff --git a/arch/arm/mach-mx3/mach-mx31_3ds.c b/arch/arm/mach-mx3/mach-mx31_3ds.c index f54af1e29ca4..58e57291b79d 100644 --- a/arch/arm/mach-mx3/mach-mx31_3ds.c +++ b/arch/arm/mach-mx3/mach-mx31_3ds.c | |||
| @@ -16,6 +16,7 @@ | |||
| 16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 17 | */ | 17 | */ |
| 18 | 18 | ||
| 19 | #include <linux/delay.h> | ||
| 19 | #include <linux/types.h> | 20 | #include <linux/types.h> |
| 20 | #include <linux/init.h> | 21 | #include <linux/init.h> |
| 21 | #include <linux/clk.h> | 22 | #include <linux/clk.h> |
| @@ -26,6 +27,8 @@ | |||
| 26 | #include <linux/mfd/mc13783.h> | 27 | #include <linux/mfd/mc13783.h> |
| 27 | #include <linux/spi/spi.h> | 28 | #include <linux/spi/spi.h> |
| 28 | #include <linux/regulator/machine.h> | 29 | #include <linux/regulator/machine.h> |
| 30 | #include <linux/fsl_devices.h> | ||
| 31 | #include <linux/input/matrix_keypad.h> | ||
| 29 | 32 | ||
| 30 | #include <mach/hardware.h> | 33 | #include <mach/hardware.h> |
| 31 | #include <asm/mach-types.h> | 34 | #include <asm/mach-types.h> |
| @@ -65,6 +68,50 @@ static int mx31_3ds_pins[] = { | |||
| 65 | MX31_PIN_CSPI2_SS2__SS2, /*CS for MC13783 */ | 68 | MX31_PIN_CSPI2_SS2__SS2, /*CS for MC13783 */ |
| 66 | /* MC13783 IRQ */ | 69 | /* MC13783 IRQ */ |
| 67 | IOMUX_MODE(MX31_PIN_GPIO1_3, IOMUX_CONFIG_GPIO), | 70 | IOMUX_MODE(MX31_PIN_GPIO1_3, IOMUX_CONFIG_GPIO), |
| 71 | /* USB OTG reset */ | ||
| 72 | IOMUX_MODE(MX31_PIN_USB_PWR, IOMUX_CONFIG_GPIO), | ||
| 73 | /* USB OTG */ | ||
| 74 | MX31_PIN_USBOTG_DATA0__USBOTG_DATA0, | ||
| 75 | MX31_PIN_USBOTG_DATA1__USBOTG_DATA1, | ||
| 76 | MX31_PIN_USBOTG_DATA2__USBOTG_DATA2, | ||
| 77 | MX31_PIN_USBOTG_DATA3__USBOTG_DATA3, | ||
| 78 | MX31_PIN_USBOTG_DATA4__USBOTG_DATA4, | ||
| 79 | MX31_PIN_USBOTG_DATA5__USBOTG_DATA5, | ||
| 80 | MX31_PIN_USBOTG_DATA6__USBOTG_DATA6, | ||
| 81 | MX31_PIN_USBOTG_DATA7__USBOTG_DATA7, | ||
| 82 | MX31_PIN_USBOTG_CLK__USBOTG_CLK, | ||
| 83 | MX31_PIN_USBOTG_DIR__USBOTG_DIR, | ||
| 84 | MX31_PIN_USBOTG_NXT__USBOTG_NXT, | ||
| 85 | MX31_PIN_USBOTG_STP__USBOTG_STP, | ||
| 86 | /*Keyboard*/ | ||
| 87 | MX31_PIN_KEY_ROW0_KEY_ROW0, | ||
| 88 | MX31_PIN_KEY_ROW1_KEY_ROW1, | ||
| 89 | MX31_PIN_KEY_ROW2_KEY_ROW2, | ||
| 90 | MX31_PIN_KEY_COL0_KEY_COL0, | ||
| 91 | MX31_PIN_KEY_COL1_KEY_COL1, | ||
| 92 | MX31_PIN_KEY_COL2_KEY_COL2, | ||
| 93 | MX31_PIN_KEY_COL3_KEY_COL3, | ||
| 94 | }; | ||
| 95 | |||
| 96 | /* | ||
| 97 | * Matrix keyboard | ||
| 98 | */ | ||
| 99 | |||
| 100 | static const uint32_t mx31_3ds_keymap[] = { | ||
| 101 | KEY(0, 0, KEY_UP), | ||
| 102 | KEY(0, 1, KEY_DOWN), | ||
| 103 | KEY(1, 0, KEY_RIGHT), | ||
| 104 | KEY(1, 1, KEY_LEFT), | ||
| 105 | KEY(1, 2, KEY_ENTER), | ||
| 106 | KEY(2, 0, KEY_F6), | ||
| 107 | KEY(2, 1, KEY_F8), | ||
| 108 | KEY(2, 2, KEY_F9), | ||
| 109 | KEY(2, 3, KEY_F10), | ||
| 110 | }; | ||
| 111 | |||
| 112 | static struct matrix_keymap_data mx31_3ds_keymap_data = { | ||
| 113 | .keymap = mx31_3ds_keymap, | ||
| 114 | .keymap_size = ARRAY_SIZE(mx31_3ds_keymap), | ||
| 68 | }; | 115 | }; |
| 69 | 116 | ||
| 70 | /* Regulators */ | 117 | /* Regulators */ |
| @@ -126,6 +173,41 @@ static struct mxc_nand_platform_data imx31_3ds_nand_flash_pdata = { | |||
| 126 | #endif | 173 | #endif |
| 127 | }; | 174 | }; |
| 128 | 175 | ||
| 176 | /* | ||
| 177 | * USB OTG | ||
| 178 | */ | ||
| 179 | |||
| 180 | #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ | ||
| 181 | PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU) | ||
| 182 | |||
| 183 | #define USBOTG_RST_B IOMUX_TO_GPIO(MX31_PIN_USB_PWR) | ||
| 184 | |||
| 185 | static void mx31_3ds_usbotg_init(void) | ||
| 186 | { | ||
| 187 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG); | ||
| 188 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG); | ||
| 189 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG); | ||
| 190 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG); | ||
| 191 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG); | ||
| 192 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG); | ||
| 193 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG); | ||
| 194 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG); | ||
| 195 | mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG); | ||
| 196 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG); | ||
| 197 | mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG); | ||
| 198 | mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG); | ||
| 199 | |||
| 200 | gpio_request(USBOTG_RST_B, "otgusb-reset"); | ||
| 201 | gpio_direction_output(USBOTG_RST_B, 0); | ||
| 202 | mdelay(1); | ||
| 203 | gpio_set_value(USBOTG_RST_B, 1); | ||
| 204 | } | ||
| 205 | |||
| 206 | static struct fsl_usb2_platform_data usbotg_pdata = { | ||
| 207 | .operating_mode = FSL_USB2_DR_DEVICE, | ||
| 208 | .phy_mode = FSL_USB2_PHY_ULPI, | ||
| 209 | }; | ||
| 210 | |||
| 129 | static struct imxuart_platform_data uart_pdata = { | 211 | static struct imxuart_platform_data uart_pdata = { |
| 130 | .flags = IMXUART_HAVE_RTSCTS, | 212 | .flags = IMXUART_HAVE_RTSCTS, |
| 131 | }; | 213 | }; |
| @@ -315,6 +397,11 @@ static void __init mxc_board_init(void) | |||
| 315 | spi_register_board_info(mx31_3ds_spi_devs, | 397 | spi_register_board_info(mx31_3ds_spi_devs, |
| 316 | ARRAY_SIZE(mx31_3ds_spi_devs)); | 398 | ARRAY_SIZE(mx31_3ds_spi_devs)); |
| 317 | 399 | ||
| 400 | mxc_register_device(&imx_kpp_device, &mx31_3ds_keymap_data); | ||
| 401 | |||
| 402 | mx31_3ds_usbotg_init(); | ||
| 403 | mxc_register_device(&mxc_otg_udc_device, &usbotg_pdata); | ||
| 404 | |||
| 318 | if (!mx31_3ds_init_expio()) | 405 | if (!mx31_3ds_init_expio()) |
| 319 | platform_device_register(&smsc911x_device); | 406 | platform_device_register(&smsc911x_device); |
| 320 | } | 407 | } |
diff --git a/arch/arm/mach-mx3/mach-mx31lilly.c b/arch/arm/mach-mx3/mach-mx31lilly.c index 80847b04c063..d3d5877c750e 100644 --- a/arch/arm/mach-mx3/mach-mx31lilly.c +++ b/arch/arm/mach-mx3/mach-mx31lilly.c | |||
| @@ -27,12 +27,15 @@ | |||
| 27 | #include <linux/types.h> | 27 | #include <linux/types.h> |
| 28 | #include <linux/init.h> | 28 | #include <linux/init.h> |
| 29 | #include <linux/clk.h> | 29 | #include <linux/clk.h> |
| 30 | #include <linux/gpio.h> | ||
| 30 | #include <linux/platform_device.h> | 31 | #include <linux/platform_device.h> |
| 31 | #include <linux/interrupt.h> | 32 | #include <linux/interrupt.h> |
| 32 | #include <linux/smsc911x.h> | 33 | #include <linux/smsc911x.h> |
| 33 | #include <linux/mtd/physmap.h> | 34 | #include <linux/mtd/physmap.h> |
| 34 | #include <linux/spi/spi.h> | 35 | #include <linux/spi/spi.h> |
| 35 | #include <linux/mfd/mc13783.h> | 36 | #include <linux/mfd/mc13783.h> |
| 37 | #include <linux/usb/otg.h> | ||
| 38 | #include <linux/usb/ulpi.h> | ||
| 36 | 39 | ||
| 37 | #include <asm/mach-types.h> | 40 | #include <asm/mach-types.h> |
| 38 | #include <asm/mach/arch.h> | 41 | #include <asm/mach/arch.h> |
| @@ -44,6 +47,8 @@ | |||
| 44 | #include <mach/iomux-mx3.h> | 47 | #include <mach/iomux-mx3.h> |
| 45 | #include <mach/board-mx31lilly.h> | 48 | #include <mach/board-mx31lilly.h> |
| 46 | #include <mach/spi.h> | 49 | #include <mach/spi.h> |
| 50 | #include <mach/mxc_ehci.h> | ||
| 51 | #include <mach/ulpi.h> | ||
| 47 | 52 | ||
| 48 | #include "devices.h" | 53 | #include "devices.h" |
| 49 | 54 | ||
| @@ -108,6 +113,137 @@ static struct platform_device physmap_flash_device = { | |||
| 108 | .num_resources = 1, | 113 | .num_resources = 1, |
| 109 | }; | 114 | }; |
| 110 | 115 | ||
| 116 | /* USB */ | ||
| 117 | |||
| 118 | #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ | ||
| 119 | PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU) | ||
| 120 | |||
| 121 | static int usbotg_init(struct platform_device *pdev) | ||
| 122 | { | ||
| 123 | unsigned int pins[] = { | ||
| 124 | MX31_PIN_USBOTG_DATA0__USBOTG_DATA0, | ||
| 125 | MX31_PIN_USBOTG_DATA1__USBOTG_DATA1, | ||
| 126 | MX31_PIN_USBOTG_DATA2__USBOTG_DATA2, | ||
| 127 | MX31_PIN_USBOTG_DATA3__USBOTG_DATA3, | ||
| 128 | MX31_PIN_USBOTG_DATA4__USBOTG_DATA4, | ||
| 129 | MX31_PIN_USBOTG_DATA5__USBOTG_DATA5, | ||
| 130 | MX31_PIN_USBOTG_DATA6__USBOTG_DATA6, | ||
| 131 | MX31_PIN_USBOTG_DATA7__USBOTG_DATA7, | ||
| 132 | MX31_PIN_USBOTG_CLK__USBOTG_CLK, | ||
| 133 | MX31_PIN_USBOTG_DIR__USBOTG_DIR, | ||
| 134 | MX31_PIN_USBOTG_NXT__USBOTG_NXT, | ||
| 135 | MX31_PIN_USBOTG_STP__USBOTG_STP, | ||
| 136 | }; | ||
| 137 | |||
| 138 | mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB OTG"); | ||
| 139 | |||
| 140 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG); | ||
| 141 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG); | ||
| 142 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG); | ||
| 143 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG); | ||
| 144 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG); | ||
| 145 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG); | ||
| 146 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG); | ||
| 147 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG); | ||
| 148 | mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG); | ||
| 149 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG); | ||
| 150 | mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG); | ||
| 151 | mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG); | ||
| 152 | |||
| 153 | mxc_iomux_set_gpr(MUX_PGP_USB_4WIRE, true); | ||
| 154 | mxc_iomux_set_gpr(MUX_PGP_USB_COMMON, true); | ||
| 155 | |||
| 156 | /* chip select */ | ||
| 157 | mxc_iomux_alloc_pin(IOMUX_MODE(MX31_PIN_DTR_DCE2, IOMUX_CONFIG_GPIO), | ||
| 158 | "USBOTG_CS"); | ||
| 159 | gpio_request(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE2), "USBH1 CS"); | ||
| 160 | gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE2), 0); | ||
| 161 | |||
| 162 | return 0; | ||
| 163 | } | ||
| 164 | |||
| 165 | static int usbh1_init(struct platform_device *pdev) | ||
| 166 | { | ||
| 167 | int pins[] = { | ||
| 168 | MX31_PIN_CSPI1_MOSI__USBH1_RXDM, | ||
| 169 | MX31_PIN_CSPI1_MISO__USBH1_RXDP, | ||
| 170 | MX31_PIN_CSPI1_SS0__USBH1_TXDM, | ||
| 171 | MX31_PIN_CSPI1_SS1__USBH1_TXDP, | ||
| 172 | MX31_PIN_CSPI1_SS2__USBH1_RCV, | ||
| 173 | MX31_PIN_CSPI1_SCLK__USBH1_OEB, | ||
| 174 | MX31_PIN_CSPI1_SPI_RDY__USBH1_FS, | ||
| 175 | }; | ||
| 176 | |||
| 177 | mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB H1"); | ||
| 178 | |||
| 179 | mxc_iomux_set_pad(MX31_PIN_CSPI1_MOSI, USB_PAD_CFG); | ||
| 180 | mxc_iomux_set_pad(MX31_PIN_CSPI1_MISO, USB_PAD_CFG); | ||
| 181 | mxc_iomux_set_pad(MX31_PIN_CSPI1_SS0, USB_PAD_CFG); | ||
| 182 | mxc_iomux_set_pad(MX31_PIN_CSPI1_SS1, USB_PAD_CFG); | ||
| 183 | mxc_iomux_set_pad(MX31_PIN_CSPI1_SS2, USB_PAD_CFG); | ||
| 184 | mxc_iomux_set_pad(MX31_PIN_CSPI1_SCLK, USB_PAD_CFG); | ||
| 185 | mxc_iomux_set_pad(MX31_PIN_CSPI1_SPI_RDY, USB_PAD_CFG); | ||
| 186 | |||
| 187 | mxc_iomux_set_gpr(MUX_PGP_USB_SUSPEND, true); | ||
| 188 | |||
| 189 | return 0; | ||
| 190 | } | ||
| 191 | |||
| 192 | static int usbh2_init(struct platform_device *pdev) | ||
| 193 | { | ||
| 194 | int pins[] = { | ||
| 195 | MX31_PIN_USBH2_DATA0__USBH2_DATA0, | ||
| 196 | MX31_PIN_USBH2_DATA1__USBH2_DATA1, | ||
| 197 | MX31_PIN_USBH2_CLK__USBH2_CLK, | ||
| 198 | MX31_PIN_USBH2_DIR__USBH2_DIR, | ||
| 199 | MX31_PIN_USBH2_NXT__USBH2_NXT, | ||
| 200 | MX31_PIN_USBH2_STP__USBH2_STP, | ||
| 201 | }; | ||
| 202 | |||
| 203 | mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB H2"); | ||
| 204 | |||
| 205 | mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG); | ||
| 206 | mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG); | ||
| 207 | mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG); | ||
| 208 | mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG); | ||
| 209 | mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG); | ||
| 210 | mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG); | ||
| 211 | mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG); | ||
| 212 | mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG); | ||
| 213 | mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG); | ||
| 214 | mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG); | ||
| 215 | mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG); | ||
| 216 | mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG); | ||
| 217 | |||
| 218 | mxc_iomux_set_gpr(MUX_PGP_UH2, true); | ||
| 219 | |||
| 220 | /* chip select */ | ||
| 221 | mxc_iomux_alloc_pin(IOMUX_MODE(MX31_PIN_DTR_DCE1, IOMUX_CONFIG_GPIO), | ||
| 222 | "USBH2_CS"); | ||
| 223 | gpio_request(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), "USBH2 CS"); | ||
| 224 | gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), 0); | ||
| 225 | |||
| 226 | return 0; | ||
| 227 | } | ||
| 228 | |||
| 229 | static struct mxc_usbh_platform_data usbotg_pdata = { | ||
| 230 | .init = usbotg_init, | ||
| 231 | .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT, | ||
| 232 | .flags = MXC_EHCI_POWER_PINS_ENABLED, | ||
| 233 | }; | ||
| 234 | |||
| 235 | static struct mxc_usbh_platform_data usbh1_pdata = { | ||
| 236 | .init = usbh1_init, | ||
| 237 | .portsc = MXC_EHCI_MODE_UTMI | MXC_EHCI_SERIAL, | ||
| 238 | .flags = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_SINGLE_UNI, | ||
| 239 | }; | ||
| 240 | |||
| 241 | static struct mxc_usbh_platform_data usbh2_pdata = { | ||
| 242 | .init = usbh2_init, | ||
| 243 | .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT, | ||
| 244 | .flags = MXC_EHCI_POWER_PINS_ENABLED, | ||
| 245 | }; | ||
| 246 | |||
| 111 | static struct platform_device *devices[] __initdata = { | 247 | static struct platform_device *devices[] __initdata = { |
| 112 | &smsc91x_device, | 248 | &smsc91x_device, |
| 113 | &physmap_flash_device, | 249 | &physmap_flash_device, |
| @@ -183,6 +319,15 @@ static void __init mx31lilly_board_init(void) | |||
| 183 | spi_register_board_info(&mc13783_dev, 1); | 319 | spi_register_board_info(&mc13783_dev, 1); |
| 184 | 320 | ||
| 185 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 321 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
| 322 | |||
| 323 | /* USB */ | ||
| 324 | usbotg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, | ||
| 325 | USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); | ||
| 326 | usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, | ||
| 327 | USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); | ||
| 328 | |||
| 329 | mxc_register_device(&mxc_usbh1, &usbh1_pdata); | ||
| 330 | mxc_register_device(&mxc_usbh2, &usbh2_pdata); | ||
| 186 | } | 331 | } |
| 187 | 332 | ||
| 188 | static void __init mx31lilly_timer_init(void) | 333 | static void __init mx31lilly_timer_init(void) |
diff --git a/arch/arm/mach-mx3/mach-mx31moboard.c b/arch/arm/mach-mx3/mach-mx31moboard.c index fccb9207b78d..62b5e40165df 100644 --- a/arch/arm/mach-mx3/mach-mx31moboard.c +++ b/arch/arm/mach-mx3/mach-mx31moboard.c | |||
| @@ -18,7 +18,6 @@ | |||
| 18 | 18 | ||
| 19 | #include <linux/delay.h> | 19 | #include <linux/delay.h> |
| 20 | #include <linux/dma-mapping.h> | 20 | #include <linux/dma-mapping.h> |
| 21 | #include <linux/fsl_devices.h> | ||
| 22 | #include <linux/gfp.h> | 21 | #include <linux/gfp.h> |
| 23 | #include <linux/gpio.h> | 22 | #include <linux/gpio.h> |
| 24 | #include <linux/init.h> | 23 | #include <linux/init.h> |
| @@ -221,11 +220,54 @@ static struct mc13783_regulator_init_data moboard_regulators[] = { | |||
| 221 | }, | 220 | }, |
| 222 | }; | 221 | }; |
| 223 | 222 | ||
| 223 | static struct mc13783_led_platform_data moboard_led[] = { | ||
| 224 | { | ||
| 225 | .id = MC13783_LED_R1, | ||
| 226 | .name = "coreboard-led-4:red", | ||
| 227 | .max_current = 2, | ||
| 228 | }, | ||
| 229 | { | ||
| 230 | .id = MC13783_LED_G1, | ||
| 231 | .name = "coreboard-led-4:green", | ||
| 232 | .max_current = 2, | ||
| 233 | }, | ||
| 234 | { | ||
| 235 | .id = MC13783_LED_B1, | ||
| 236 | .name = "coreboard-led-4:blue", | ||
| 237 | .max_current = 2, | ||
| 238 | }, | ||
| 239 | { | ||
| 240 | .id = MC13783_LED_R2, | ||
| 241 | .name = "coreboard-led-5:red", | ||
| 242 | .max_current = 3, | ||
| 243 | }, | ||
| 244 | { | ||
| 245 | .id = MC13783_LED_G2, | ||
| 246 | .name = "coreboard-led-5:green", | ||
| 247 | .max_current = 3, | ||
| 248 | }, | ||
| 249 | { | ||
| 250 | .id = MC13783_LED_B2, | ||
| 251 | .name = "coreboard-led-5:blue", | ||
| 252 | .max_current = 3, | ||
| 253 | }, | ||
| 254 | }; | ||
| 255 | |||
| 256 | static struct mc13783_leds_platform_data moboard_leds = { | ||
| 257 | .num_leds = ARRAY_SIZE(moboard_led), | ||
| 258 | .led = moboard_led, | ||
| 259 | .flags = MC13783_LED_SLEWLIMTC, | ||
| 260 | .abmode = MC13783_LED_AB_DISABLED, | ||
| 261 | .tc1_period = MC13783_LED_PERIOD_10MS, | ||
| 262 | .tc2_period = MC13783_LED_PERIOD_10MS, | ||
| 263 | }; | ||
| 264 | |||
| 224 | static struct mc13783_platform_data moboard_pmic = { | 265 | static struct mc13783_platform_data moboard_pmic = { |
| 225 | .regulators = moboard_regulators, | 266 | .regulators = moboard_regulators, |
| 226 | .num_regulators = ARRAY_SIZE(moboard_regulators), | 267 | .num_regulators = ARRAY_SIZE(moboard_regulators), |
| 268 | .leds = &moboard_leds, | ||
| 227 | .flags = MC13783_USE_REGULATOR | MC13783_USE_RTC | | 269 | .flags = MC13783_USE_REGULATOR | MC13783_USE_RTC | |
| 228 | MC13783_USE_ADC, | 270 | MC13783_USE_ADC | MC13783_USE_LED, |
| 229 | }; | 271 | }; |
| 230 | 272 | ||
| 231 | static struct spi_board_info moboard_spi_board_info[] __initdata = { | 273 | static struct spi_board_info moboard_spi_board_info[] __initdata = { |
| @@ -306,84 +348,56 @@ static struct imxmmc_platform_data sdhc1_pdata = { | |||
| 306 | * this pin is dedicated for all mx31moboard systems, so we do it here | 348 | * this pin is dedicated for all mx31moboard systems, so we do it here |
| 307 | */ | 349 | */ |
| 308 | #define USB_RESET_B IOMUX_TO_GPIO(MX31_PIN_GPIO1_0) | 350 | #define USB_RESET_B IOMUX_TO_GPIO(MX31_PIN_GPIO1_0) |
| 309 | |||
| 310 | static void usb_xcvr_reset(void) | ||
| 311 | { | ||
| 312 | gpio_request(USB_RESET_B, "usb-reset"); | ||
| 313 | gpio_direction_output(USB_RESET_B, 0); | ||
| 314 | mdelay(1); | ||
| 315 | gpio_set_value(USB_RESET_B, 1); | ||
| 316 | } | ||
| 317 | |||
| 318 | #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ | 351 | #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ |
| 319 | PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU) | 352 | PAD_CTL_ODE_CMOS) |
| 320 | 353 | ||
| 321 | #define OTG_EN_B IOMUX_TO_GPIO(MX31_PIN_USB_OC) | 354 | #define OTG_EN_B IOMUX_TO_GPIO(MX31_PIN_USB_OC) |
| 322 | |||
| 323 | static void moboard_usbotg_init(void) | ||
| 324 | { | ||
| 325 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG); | ||
| 326 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG); | ||
| 327 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG); | ||
| 328 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG); | ||
| 329 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG); | ||
| 330 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG); | ||
| 331 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG); | ||
| 332 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG); | ||
| 333 | mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG); | ||
| 334 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG); | ||
| 335 | mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG); | ||
| 336 | mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG); | ||
| 337 | |||
| 338 | gpio_request(OTG_EN_B, "usb-udc-en"); | ||
| 339 | gpio_direction_output(OTG_EN_B, 0); | ||
| 340 | } | ||
| 341 | |||
| 342 | static struct fsl_usb2_platform_data usb_pdata = { | ||
| 343 | .operating_mode = FSL_USB2_DR_DEVICE, | ||
| 344 | .phy_mode = FSL_USB2_PHY_ULPI, | ||
| 345 | }; | ||
| 346 | |||
| 347 | #if defined(CONFIG_USB_ULPI) | ||
| 348 | |||
| 349 | #define USBH2_EN_B IOMUX_TO_GPIO(MX31_PIN_SCK6) | 355 | #define USBH2_EN_B IOMUX_TO_GPIO(MX31_PIN_SCK6) |
| 350 | 356 | ||
| 351 | static int moboard_usbh2_hw_init(struct platform_device *pdev) | 357 | static void usb_xcvr_reset(void) |
| 352 | { | 358 | { |
| 353 | int ret; | 359 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG | PAD_CTL_100K_PD); |
| 360 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG | PAD_CTL_100K_PD); | ||
| 361 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG | PAD_CTL_100K_PD); | ||
| 362 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG | PAD_CTL_100K_PD); | ||
| 363 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG | PAD_CTL_100K_PD); | ||
| 364 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG | PAD_CTL_100K_PD); | ||
| 365 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG | PAD_CTL_100K_PD); | ||
| 366 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG | PAD_CTL_100K_PD); | ||
| 367 | mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG | PAD_CTL_100K_PU); | ||
| 368 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG | PAD_CTL_100K_PU); | ||
| 369 | mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG | PAD_CTL_100K_PU); | ||
| 370 | mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG | PAD_CTL_100K_PU); | ||
| 354 | 371 | ||
| 355 | mxc_iomux_set_gpr(MUX_PGP_UH2, true); | 372 | mxc_iomux_set_gpr(MUX_PGP_UH2, true); |
| 373 | mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG | PAD_CTL_100K_PU); | ||
| 374 | mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG | PAD_CTL_100K_PU); | ||
| 375 | mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG | PAD_CTL_100K_PU); | ||
| 376 | mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG | PAD_CTL_100K_PU); | ||
| 377 | mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG | PAD_CTL_100K_PD); | ||
| 378 | mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG | PAD_CTL_100K_PD); | ||
| 379 | mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG | PAD_CTL_100K_PD); | ||
| 380 | mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG | PAD_CTL_100K_PD); | ||
| 381 | mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG | PAD_CTL_100K_PD); | ||
| 382 | mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG | PAD_CTL_100K_PD); | ||
| 383 | mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG | PAD_CTL_100K_PD); | ||
| 384 | mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG | PAD_CTL_100K_PD); | ||
| 356 | 385 | ||
| 357 | mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG); | 386 | gpio_request(OTG_EN_B, "usb-udc-en"); |
| 358 | mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG); | 387 | gpio_direction_output(OTG_EN_B, 0); |
| 359 | mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG); | 388 | gpio_request(USBH2_EN_B, "usbh2-en"); |
| 360 | mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG); | ||
| 361 | mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG); | ||
| 362 | mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG); | ||
| 363 | mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG); | ||
| 364 | mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG); | ||
| 365 | mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG); | ||
| 366 | mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG); | ||
| 367 | mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG); | ||
| 368 | mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG); | ||
| 369 | |||
| 370 | ret = gpio_request(USBH2_EN_B, "usbh2-en"); | ||
| 371 | if (ret) | ||
| 372 | return ret; | ||
| 373 | gpio_direction_output(USBH2_EN_B, 0); | 389 | gpio_direction_output(USBH2_EN_B, 0); |
| 374 | 390 | ||
| 375 | return 0; | 391 | gpio_request(USB_RESET_B, "usb-reset"); |
| 392 | gpio_direction_output(USB_RESET_B, 0); | ||
| 393 | mdelay(1); | ||
| 394 | gpio_set_value(USB_RESET_B, 1); | ||
| 395 | mdelay(1); | ||
| 376 | } | 396 | } |
| 377 | 397 | ||
| 378 | static int moboard_usbh2_hw_exit(struct platform_device *pdev) | 398 | #if defined(CONFIG_USB_ULPI) |
| 379 | { | ||
| 380 | gpio_free(USBH2_EN_B); | ||
| 381 | return 0; | ||
| 382 | } | ||
| 383 | 399 | ||
| 384 | static struct mxc_usbh_platform_data usbh2_pdata = { | 400 | static struct mxc_usbh_platform_data usbh2_pdata = { |
| 385 | .init = moboard_usbh2_hw_init, | ||
| 386 | .exit = moboard_usbh2_hw_exit, | ||
| 387 | .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT, | 401 | .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT, |
| 388 | .flags = MXC_EHCI_POWER_PINS_ENABLED, | 402 | .flags = MXC_EHCI_POWER_PINS_ENABLED, |
| 389 | }; | 403 | }; |
| @@ -508,8 +522,6 @@ static void __init mxc_board_init(void) | |||
| 508 | 522 | ||
| 509 | usb_xcvr_reset(); | 523 | usb_xcvr_reset(); |
| 510 | 524 | ||
| 511 | moboard_usbotg_init(); | ||
| 512 | mxc_register_device(&mxc_otg_udc_device, &usb_pdata); | ||
| 513 | moboard_usbh2_init(); | 525 | moboard_usbh2_init(); |
| 514 | 526 | ||
| 515 | switch (mx31moboard_baseboard) { | 527 | switch (mx31moboard_baseboard) { |
| @@ -522,7 +534,8 @@ static void __init mxc_board_init(void) | |||
| 522 | mx31moboard_marxbot_init(); | 534 | mx31moboard_marxbot_init(); |
| 523 | break; | 535 | break; |
| 524 | case MX31SMARTBOT: | 536 | case MX31SMARTBOT: |
| 525 | mx31moboard_smartbot_init(); | 537 | case MX31EYEBOT: |
| 538 | mx31moboard_smartbot_init(mx31moboard_baseboard); | ||
| 526 | break; | 539 | break; |
| 527 | default: | 540 | default: |
| 528 | printk(KERN_ERR "Illegal mx31moboard_baseboard type %d\n", | 541 | printk(KERN_ERR "Illegal mx31moboard_baseboard type %d\n", |
diff --git a/arch/arm/mach-mx3/mach-pcm037.c b/arch/arm/mach-mx3/mach-pcm037.c index 78ecd751549b..cce410662383 100644 --- a/arch/arm/mach-mx3/mach-pcm037.c +++ b/arch/arm/mach-mx3/mach-pcm037.c | |||
| @@ -449,6 +449,7 @@ static int __init pcm037_camera_alloc_dma(const size_t buf_size) | |||
| 449 | static struct platform_device *devices[] __initdata = { | 449 | static struct platform_device *devices[] __initdata = { |
| 450 | &pcm037_flash, | 450 | &pcm037_flash, |
| 451 | &pcm037_sram_device, | 451 | &pcm037_sram_device, |
| 452 | &imx_wdt_device0, | ||
| 452 | &pcm037_mt9t031, | 453 | &pcm037_mt9t031, |
| 453 | &pcm037_mt9v022, | 454 | &pcm037_mt9v022, |
| 454 | }; | 455 | }; |
diff --git a/arch/arm/mach-mx3/mach-pcm043.c b/arch/arm/mach-mx3/mach-pcm043.c index 1bf1ec2eef5e..78d9185a9d4b 100644 --- a/arch/arm/mach-mx3/mach-pcm043.c +++ b/arch/arm/mach-mx3/mach-pcm043.c | |||
| @@ -150,6 +150,7 @@ static struct i2c_board_info pcm043_i2c_devices[] = { | |||
| 150 | static struct platform_device *devices[] __initdata = { | 150 | static struct platform_device *devices[] __initdata = { |
| 151 | &pcm043_flash, | 151 | &pcm043_flash, |
| 152 | &mxc_fec_device, | 152 | &mxc_fec_device, |
| 153 | &imx_wdt_device0, | ||
| 153 | }; | 154 | }; |
| 154 | 155 | ||
| 155 | static struct pad_desc pcm043_pads[] = { | 156 | static struct pad_desc pcm043_pads[] = { |
diff --git a/arch/arm/mach-mx3/mx31lite-db.c b/arch/arm/mach-mx3/mx31lite-db.c index 093c595ca581..5f05bfbec380 100644 --- a/arch/arm/mach-mx3/mx31lite-db.c +++ b/arch/arm/mach-mx3/mx31lite-db.c | |||
| @@ -206,5 +206,6 @@ void __init mx31lite_db_init(void) | |||
| 206 | mxc_register_device(&mxc_spi_device0, &spi0_pdata); | 206 | mxc_register_device(&mxc_spi_device0, &spi0_pdata); |
| 207 | platform_device_register(&litekit_led_device); | 207 | platform_device_register(&litekit_led_device); |
| 208 | mxc_register_device(&imx_wdt_device0, NULL); | 208 | mxc_register_device(&imx_wdt_device0, NULL); |
| 209 | mxc_register_device(&imx_rtc_device0, NULL); | ||
| 209 | } | 210 | } |
| 210 | 211 | ||
diff --git a/arch/arm/mach-mx3/mx31moboard-devboard.c b/arch/arm/mach-mx3/mx31moboard-devboard.c index 11b906ce7eae..582299cb2c08 100644 --- a/arch/arm/mach-mx3/mx31moboard-devboard.c +++ b/arch/arm/mach-mx3/mx31moboard-devboard.c | |||
| @@ -22,6 +22,7 @@ | |||
| 22 | #include <linux/platform_device.h> | 22 | #include <linux/platform_device.h> |
| 23 | #include <linux/slab.h> | 23 | #include <linux/slab.h> |
| 24 | #include <linux/types.h> | 24 | #include <linux/types.h> |
| 25 | #include <linux/fsl_devices.h> | ||
| 25 | 26 | ||
| 26 | #include <linux/usb/otg.h> | 27 | #include <linux/usb/otg.h> |
| 27 | 28 | ||
| @@ -213,6 +214,12 @@ static int __init devboard_usbh1_init(void) | |||
| 213 | return mxc_register_device(&mxc_usbh1, &usbh1_pdata); | 214 | return mxc_register_device(&mxc_usbh1, &usbh1_pdata); |
| 214 | } | 215 | } |
| 215 | 216 | ||
| 217 | |||
| 218 | static struct fsl_usb2_platform_data usb_pdata = { | ||
| 219 | .operating_mode = FSL_USB2_DR_DEVICE, | ||
| 220 | .phy_mode = FSL_USB2_PHY_ULPI, | ||
| 221 | }; | ||
| 222 | |||
| 216 | /* | 223 | /* |
| 217 | * system init for baseboard usage. Will be called by mx31moboard init. | 224 | * system init for baseboard usage. Will be called by mx31moboard init. |
| 218 | */ | 225 | */ |
| @@ -229,5 +236,7 @@ void __init mx31moboard_devboard_init(void) | |||
| 229 | 236 | ||
| 230 | devboard_init_sel_gpios(); | 237 | devboard_init_sel_gpios(); |
| 231 | 238 | ||
| 239 | mxc_register_device(&mxc_otg_udc_device, &usb_pdata); | ||
| 240 | |||
| 232 | devboard_usbh1_init(); | 241 | devboard_usbh1_init(); |
| 233 | } | 242 | } |
diff --git a/arch/arm/mach-mx3/mx31moboard-marxbot.c b/arch/arm/mach-mx3/mx31moboard-marxbot.c index ffb105e14d88..4930f8c27e66 100644 --- a/arch/arm/mach-mx3/mx31moboard-marxbot.c +++ b/arch/arm/mach-mx3/mx31moboard-marxbot.c | |||
| @@ -25,6 +25,7 @@ | |||
| 25 | #include <linux/slab.h> | 25 | #include <linux/slab.h> |
| 26 | #include <linux/platform_device.h> | 26 | #include <linux/platform_device.h> |
| 27 | #include <linux/types.h> | 27 | #include <linux/types.h> |
| 28 | #include <linux/fsl_devices.h> | ||
| 28 | 29 | ||
| 29 | #include <linux/usb/otg.h> | 30 | #include <linux/usb/otg.h> |
| 30 | 31 | ||
| @@ -329,6 +330,11 @@ static int __init marxbot_usbh1_init(void) | |||
| 329 | return mxc_register_device(&mxc_usbh1, &usbh1_pdata); | 330 | return mxc_register_device(&mxc_usbh1, &usbh1_pdata); |
| 330 | } | 331 | } |
| 331 | 332 | ||
| 333 | static struct fsl_usb2_platform_data usb_pdata = { | ||
| 334 | .operating_mode = FSL_USB2_DR_DEVICE, | ||
| 335 | .phy_mode = FSL_USB2_PHY_ULPI, | ||
| 336 | }; | ||
| 337 | |||
| 332 | /* | 338 | /* |
| 333 | * system init for baseboard usage. Will be called by mx31moboard init. | 339 | * system init for baseboard usage. Will be called by mx31moboard init. |
| 334 | */ | 340 | */ |
| @@ -356,5 +362,7 @@ void __init mx31moboard_marxbot_init(void) | |||
| 356 | gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_LCS0)); | 362 | gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_LCS0)); |
| 357 | gpio_export(IOMUX_TO_GPIO(MX31_PIN_LCS0), false); | 363 | gpio_export(IOMUX_TO_GPIO(MX31_PIN_LCS0), false); |
| 358 | 364 | ||
| 365 | mxc_register_device(&mxc_otg_udc_device, &usb_pdata); | ||
| 366 | |||
| 359 | marxbot_usbh1_init(); | 367 | marxbot_usbh1_init(); |
| 360 | } | 368 | } |
diff --git a/arch/arm/mach-mx3/mx31moboard-smartbot.c b/arch/arm/mach-mx3/mx31moboard-smartbot.c index 52a69fc8b14f..293eea6d9d97 100644 --- a/arch/arm/mach-mx3/mx31moboard-smartbot.c +++ b/arch/arm/mach-mx3/mx31moboard-smartbot.c | |||
| @@ -23,11 +23,18 @@ | |||
| 23 | #include <linux/i2c.h> | 23 | #include <linux/i2c.h> |
| 24 | #include <linux/platform_device.h> | 24 | #include <linux/platform_device.h> |
| 25 | #include <linux/types.h> | 25 | #include <linux/types.h> |
| 26 | #include <linux/fsl_devices.h> | ||
| 27 | |||
| 28 | #include <linux/usb/otg.h> | ||
| 29 | #include <linux/usb/ulpi.h> | ||
| 26 | 30 | ||
| 27 | #include <mach/common.h> | 31 | #include <mach/common.h> |
| 28 | #include <mach/hardware.h> | 32 | #include <mach/hardware.h> |
| 29 | #include <mach/imx-uart.h> | 33 | #include <mach/imx-uart.h> |
| 30 | #include <mach/iomux-mx3.h> | 34 | #include <mach/iomux-mx3.h> |
| 35 | #include <mach/board-mx31moboard.h> | ||
| 36 | #include <mach/mxc_ehci.h> | ||
| 37 | #include <mach/ulpi.h> | ||
| 31 | 38 | ||
| 32 | #include <media/soc_camera.h> | 39 | #include <media/soc_camera.h> |
| 33 | 40 | ||
| @@ -116,10 +123,33 @@ static int __init smartbot_cam_init(void) | |||
| 116 | return 0; | 123 | return 0; |
| 117 | } | 124 | } |
| 118 | 125 | ||
| 126 | static struct fsl_usb2_platform_data usb_pdata = { | ||
| 127 | .operating_mode = FSL_USB2_DR_DEVICE, | ||
| 128 | .phy_mode = FSL_USB2_PHY_ULPI, | ||
| 129 | }; | ||
| 130 | |||
| 131 | #if defined(CONFIG_USB_ULPI) | ||
| 132 | |||
| 133 | static struct mxc_usbh_platform_data otg_host_pdata = { | ||
| 134 | .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT, | ||
| 135 | .flags = MXC_EHCI_POWER_PINS_ENABLED, | ||
| 136 | }; | ||
| 137 | |||
| 138 | static int __init smartbot_otg_host_init(void) | ||
| 139 | { | ||
| 140 | otg_host_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, | ||
| 141 | USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); | ||
| 142 | |||
| 143 | return mxc_register_device(&mxc_otg_host, &otg_host_pdata); | ||
| 144 | } | ||
| 145 | #else | ||
| 146 | static inline int smartbot_otg_host_init(void) { return 0; } | ||
| 147 | #endif | ||
| 148 | |||
| 119 | #define POWER_EN IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1) | 149 | #define POWER_EN IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1) |
| 120 | #define DSPIC_RST_B IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1) | 150 | #define DSPIC_RST_B IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1) |
| 121 | #define TRSLAT_RST_B IOMUX_TO_GPIO(MX31_PIN_RI_DCE1) | 151 | #define TRSLAT_RST_B IOMUX_TO_GPIO(MX31_PIN_RI_DCE1) |
| 122 | #define SEL3 IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1) | 152 | #define TRSLAT_SRC_CHOICE IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1) |
| 123 | 153 | ||
| 124 | static void smartbot_resets_init(void) | 154 | static void smartbot_resets_init(void) |
| 125 | { | 155 | { |
| @@ -138,15 +168,15 @@ static void smartbot_resets_init(void) | |||
| 138 | gpio_export(TRSLAT_RST_B, false); | 168 | gpio_export(TRSLAT_RST_B, false); |
| 139 | } | 169 | } |
| 140 | 170 | ||
| 141 | if (!gpio_request(SEL3, "sel3")) { | 171 | if (!gpio_request(TRSLAT_SRC_CHOICE, "translator-src-choice")) { |
| 142 | gpio_direction_input(SEL3); | 172 | gpio_direction_output(TRSLAT_SRC_CHOICE, 0); |
| 143 | gpio_export(SEL3, true); | 173 | gpio_export(TRSLAT_SRC_CHOICE, false); |
| 144 | } | 174 | } |
| 145 | } | 175 | } |
| 146 | /* | 176 | /* |
| 147 | * system init for baseboard usage. Will be called by mx31moboard init. | 177 | * system init for baseboard usage. Will be called by mx31moboard init. |
| 148 | */ | 178 | */ |
| 149 | void __init mx31moboard_smartbot_init(void) | 179 | void __init mx31moboard_smartbot_init(int board) |
| 150 | { | 180 | { |
| 151 | printk(KERN_INFO "Initializing mx31smartbot peripherals\n"); | 181 | printk(KERN_INFO "Initializing mx31smartbot peripherals\n"); |
| 152 | 182 | ||
| @@ -155,6 +185,19 @@ void __init mx31moboard_smartbot_init(void) | |||
| 155 | 185 | ||
| 156 | mxc_register_device(&mxc_uart_device1, &uart_pdata); | 186 | mxc_register_device(&mxc_uart_device1, &uart_pdata); |
| 157 | 187 | ||
| 188 | |||
| 189 | switch (board) { | ||
| 190 | case MX31SMARTBOT: | ||
| 191 | mxc_register_device(&mxc_otg_udc_device, &usb_pdata); | ||
| 192 | break; | ||
| 193 | case MX31EYEBOT: | ||
| 194 | smartbot_otg_host_init(); | ||
| 195 | break; | ||
| 196 | default: | ||
| 197 | printk(KERN_WARNING "Unknown board %d, USB OTG not initialized", | ||
| 198 | board); | ||
| 199 | } | ||
| 200 | |||
| 158 | smartbot_resets_init(); | 201 | smartbot_resets_init(); |
| 159 | 202 | ||
| 160 | smartbot_cam_init(); | 203 | smartbot_cam_init(); |
diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c index ee67a71db80d..ed885f9d7b73 100644 --- a/arch/arm/mach-mx5/board-mx51_babbage.c +++ b/arch/arm/mach-mx5/board-mx51_babbage.c | |||
| @@ -12,11 +12,16 @@ | |||
| 12 | 12 | ||
| 13 | #include <linux/init.h> | 13 | #include <linux/init.h> |
| 14 | #include <linux/platform_device.h> | 14 | #include <linux/platform_device.h> |
| 15 | #include <linux/gpio.h> | ||
| 16 | #include <linux/delay.h> | ||
| 17 | #include <linux/io.h> | ||
| 18 | #include <linux/fsl_devices.h> | ||
| 15 | 19 | ||
| 16 | #include <mach/common.h> | 20 | #include <mach/common.h> |
| 17 | #include <mach/hardware.h> | 21 | #include <mach/hardware.h> |
| 18 | #include <mach/imx-uart.h> | 22 | #include <mach/imx-uart.h> |
| 19 | #include <mach/iomux-mx51.h> | 23 | #include <mach/iomux-mx51.h> |
| 24 | #include <mach/mxc_ehci.h> | ||
| 20 | 25 | ||
| 21 | #include <asm/irq.h> | 26 | #include <asm/irq.h> |
| 22 | #include <asm/setup.h> | 27 | #include <asm/setup.h> |
| @@ -26,6 +31,18 @@ | |||
| 26 | 31 | ||
| 27 | #include "devices.h" | 32 | #include "devices.h" |
| 28 | 33 | ||
| 34 | #define BABBAGE_USB_HUB_RESET (0*32 + 7) /* GPIO_1_7 */ | ||
| 35 | #define BABBAGE_USBH1_STP (0*32 + 27) /* GPIO_1_27 */ | ||
| 36 | #define BABBAGE_PHY_RESET (1*32 +5) /* GPIO_2_5 */ | ||
| 37 | |||
| 38 | /* USB_CTRL_1 */ | ||
| 39 | #define MX51_USB_CTRL_1_OFFSET 0x10 | ||
| 40 | #define MX51_USB_CTRL_UH1_EXT_CLK_EN (1 << 25) | ||
| 41 | |||
| 42 | #define MX51_USB_PLLDIV_12_MHZ 0x00 | ||
| 43 | #define MX51_USB_PLL_DIV_19_2_MHZ 0x01 | ||
| 44 | #define MX51_USB_PLL_DIV_24_MHZ 0x02 | ||
| 45 | |||
| 29 | static struct platform_device *devices[] __initdata = { | 46 | static struct platform_device *devices[] __initdata = { |
| 30 | &mxc_fec_device, | 47 | &mxc_fec_device, |
| 31 | }; | 48 | }; |
| @@ -46,6 +63,22 @@ static struct pad_desc mx51babbage_pads[] = { | |||
| 46 | MX51_PAD_EIM_D26__UART3_TXD, | 63 | MX51_PAD_EIM_D26__UART3_TXD, |
| 47 | MX51_PAD_EIM_D27__UART3_RTS, | 64 | MX51_PAD_EIM_D27__UART3_RTS, |
| 48 | MX51_PAD_EIM_D24__UART3_CTS, | 65 | MX51_PAD_EIM_D24__UART3_CTS, |
| 66 | |||
| 67 | /* USB HOST1 */ | ||
| 68 | MX51_PAD_USBH1_CLK__USBH1_CLK, | ||
| 69 | MX51_PAD_USBH1_DIR__USBH1_DIR, | ||
| 70 | MX51_PAD_USBH1_NXT__USBH1_NXT, | ||
| 71 | MX51_PAD_USBH1_DATA0__USBH1_DATA0, | ||
| 72 | MX51_PAD_USBH1_DATA1__USBH1_DATA1, | ||
| 73 | MX51_PAD_USBH1_DATA2__USBH1_DATA2, | ||
| 74 | MX51_PAD_USBH1_DATA3__USBH1_DATA3, | ||
| 75 | MX51_PAD_USBH1_DATA4__USBH1_DATA4, | ||
| 76 | MX51_PAD_USBH1_DATA5__USBH1_DATA5, | ||
| 77 | MX51_PAD_USBH1_DATA6__USBH1_DATA6, | ||
| 78 | MX51_PAD_USBH1_DATA7__USBH1_DATA7, | ||
| 79 | |||
| 80 | /* USB HUB reset line*/ | ||
| 81 | MX51_PAD_GPIO_1_7__GPIO1_7, | ||
| 49 | }; | 82 | }; |
| 50 | 83 | ||
| 51 | /* Serial ports */ | 84 | /* Serial ports */ |
| @@ -66,15 +99,149 @@ static inline void mxc_init_imx_uart(void) | |||
| 66 | } | 99 | } |
| 67 | #endif /* SERIAL_IMX */ | 100 | #endif /* SERIAL_IMX */ |
| 68 | 101 | ||
| 102 | static int gpio_usbh1_active(void) | ||
| 103 | { | ||
| 104 | struct pad_desc usbh1stp_gpio = MX51_PAD_USBH1_STP__GPIO_1_27; | ||
| 105 | struct pad_desc phyreset_gpio = MX51_PAD_EIM_D21__GPIO_2_5; | ||
| 106 | int ret; | ||
| 107 | |||
| 108 | /* Set USBH1_STP to GPIO and toggle it */ | ||
| 109 | mxc_iomux_v3_setup_pad(&usbh1stp_gpio); | ||
| 110 | ret = gpio_request(BABBAGE_USBH1_STP, "usbh1_stp"); | ||
| 111 | |||
| 112 | if (ret) { | ||
| 113 | pr_debug("failed to get MX51_PAD_USBH1_STP__GPIO_1_27: %d\n", ret); | ||
| 114 | return ret; | ||
| 115 | } | ||
| 116 | gpio_direction_output(BABBAGE_USBH1_STP, 0); | ||
| 117 | gpio_set_value(BABBAGE_USBH1_STP, 1); | ||
| 118 | msleep(100); | ||
| 119 | gpio_free(BABBAGE_USBH1_STP); | ||
| 120 | |||
| 121 | /* De-assert USB PHY RESETB */ | ||
| 122 | mxc_iomux_v3_setup_pad(&phyreset_gpio); | ||
| 123 | ret = gpio_request(BABBAGE_PHY_RESET, "phy_reset"); | ||
| 124 | |||
| 125 | if (ret) { | ||
| 126 | pr_debug("failed to get MX51_PAD_EIM_D21__GPIO_2_5: %d\n", ret); | ||
| 127 | return ret; | ||
| 128 | } | ||
| 129 | gpio_direction_output(BABBAGE_PHY_RESET, 1); | ||
| 130 | return 0; | ||
| 131 | } | ||
| 132 | |||
| 133 | static inline void babbage_usbhub_reset(void) | ||
| 134 | { | ||
| 135 | int ret; | ||
| 136 | |||
| 137 | /* Bring USB hub out of reset */ | ||
| 138 | ret = gpio_request(BABBAGE_USB_HUB_RESET, "GPIO1_7"); | ||
| 139 | if (ret) { | ||
| 140 | printk(KERN_ERR"failed to get GPIO_USB_HUB_RESET: %d\n", ret); | ||
| 141 | return; | ||
| 142 | } | ||
| 143 | gpio_direction_output(BABBAGE_USB_HUB_RESET, 0); | ||
| 144 | |||
| 145 | /* USB HUB RESET - De-assert USB HUB RESET_N */ | ||
| 146 | msleep(1); | ||
| 147 | gpio_set_value(BABBAGE_USB_HUB_RESET, 0); | ||
| 148 | msleep(1); | ||
| 149 | gpio_set_value(BABBAGE_USB_HUB_RESET, 1); | ||
| 150 | } | ||
| 151 | |||
| 152 | /* This function is board specific as the bit mask for the plldiv will also | ||
| 153 | be different for other Freescale SoCs, thus a common bitmask is not | ||
| 154 | possible and cannot get place in /plat-mxc/ehci.c.*/ | ||
| 155 | static int initialize_otg_port(struct platform_device *pdev) | ||
| 156 | { | ||
| 157 | u32 v; | ||
| 158 | void __iomem *usb_base; | ||
| 159 | u32 usbother_base; | ||
| 160 | |||
| 161 | usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); | ||
| 162 | usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET; | ||
| 163 | |||
| 164 | /* Set the PHY clock to 19.2MHz */ | ||
| 165 | v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET); | ||
| 166 | v &= ~MX5_USB_UTMI_PHYCTRL1_PLLDIV_MASK; | ||
| 167 | v |= MX51_USB_PLL_DIV_19_2_MHZ; | ||
| 168 | __raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET); | ||
| 169 | iounmap(usb_base); | ||
| 170 | return 0; | ||
| 171 | } | ||
| 172 | |||
| 173 | static int initialize_usbh1_port(struct platform_device *pdev) | ||
| 174 | { | ||
| 175 | u32 v; | ||
| 176 | void __iomem *usb_base; | ||
| 177 | u32 usbother_base; | ||
| 178 | |||
| 179 | usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); | ||
| 180 | usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET; | ||
| 181 | |||
| 182 | /* The clock for the USBH1 ULPI port will come externally from the PHY. */ | ||
| 183 | v = __raw_readl(usbother_base + MX51_USB_CTRL_1_OFFSET); | ||
| 184 | __raw_writel(v | MX51_USB_CTRL_UH1_EXT_CLK_EN, usbother_base + MX51_USB_CTRL_1_OFFSET); | ||
| 185 | iounmap(usb_base); | ||
| 186 | return 0; | ||
| 187 | } | ||
| 188 | |||
| 189 | static struct mxc_usbh_platform_data dr_utmi_config = { | ||
| 190 | .init = initialize_otg_port, | ||
| 191 | .portsc = MXC_EHCI_UTMI_16BIT, | ||
| 192 | .flags = MXC_EHCI_INTERNAL_PHY, | ||
| 193 | }; | ||
| 194 | |||
| 195 | static struct fsl_usb2_platform_data usb_pdata = { | ||
| 196 | .operating_mode = FSL_USB2_DR_DEVICE, | ||
| 197 | .phy_mode = FSL_USB2_PHY_UTMI_WIDE, | ||
| 198 | }; | ||
| 199 | |||
| 200 | static struct mxc_usbh_platform_data usbh1_config = { | ||
| 201 | .init = initialize_usbh1_port, | ||
| 202 | .portsc = MXC_EHCI_MODE_ULPI, | ||
| 203 | .flags = (MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_ITC_NO_THRESHOLD), | ||
| 204 | }; | ||
| 205 | |||
| 206 | static int otg_mode_host; | ||
| 207 | |||
| 208 | static int __init babbage_otg_mode(char *options) | ||
| 209 | { | ||
| 210 | if (!strcmp(options, "host")) | ||
| 211 | otg_mode_host = 1; | ||
| 212 | else if (!strcmp(options, "device")) | ||
| 213 | otg_mode_host = 0; | ||
| 214 | else | ||
| 215 | pr_info("otg_mode neither \"host\" nor \"device\". " | ||
| 216 | "Defaulting to device\n"); | ||
| 217 | return 0; | ||
| 218 | } | ||
| 219 | __setup("otg_mode=", babbage_otg_mode); | ||
| 220 | |||
| 69 | /* | 221 | /* |
| 70 | * Board specific initialization. | 222 | * Board specific initialization. |
| 71 | */ | 223 | */ |
| 72 | static void __init mxc_board_init(void) | 224 | static void __init mxc_board_init(void) |
| 73 | { | 225 | { |
| 226 | struct pad_desc usbh1stp = MX51_PAD_USBH1_STP__USBH1_STP; | ||
| 227 | |||
| 74 | mxc_iomux_v3_setup_multiple_pads(mx51babbage_pads, | 228 | mxc_iomux_v3_setup_multiple_pads(mx51babbage_pads, |
| 75 | ARRAY_SIZE(mx51babbage_pads)); | 229 | ARRAY_SIZE(mx51babbage_pads)); |
| 76 | mxc_init_imx_uart(); | 230 | mxc_init_imx_uart(); |
| 77 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 231 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
| 232 | |||
| 233 | if (otg_mode_host) | ||
| 234 | mxc_register_device(&mxc_usbdr_host_device, &dr_utmi_config); | ||
| 235 | else { | ||
| 236 | initialize_otg_port(NULL); | ||
| 237 | mxc_register_device(&mxc_usbdr_udc_device, &usb_pdata); | ||
| 238 | } | ||
| 239 | |||
| 240 | gpio_usbh1_active(); | ||
| 241 | mxc_register_device(&mxc_usbh1_device, &usbh1_config); | ||
| 242 | /* setback USBH1_STP to be function */ | ||
| 243 | mxc_iomux_v3_setup_pad(&usbh1stp); | ||
| 244 | babbage_usbhub_reset(); | ||
| 78 | } | 245 | } |
| 79 | 246 | ||
| 80 | static void __init mx51_babbage_timer_init(void) | 247 | static void __init mx51_babbage_timer_init(void) |
diff --git a/arch/arm/mach-mx5/clock-mx51.c b/arch/arm/mach-mx5/clock-mx51.c index 1ee6ce4087b8..d9f612d3370e 100644 --- a/arch/arm/mach-mx5/clock-mx51.c +++ b/arch/arm/mach-mx5/clock-mx51.c | |||
| @@ -37,6 +37,7 @@ static struct clk lp_apm_clk; | |||
| 37 | static struct clk periph_apm_clk; | 37 | static struct clk periph_apm_clk; |
| 38 | static struct clk ahb_clk; | 38 | static struct clk ahb_clk; |
| 39 | static struct clk ipg_clk; | 39 | static struct clk ipg_clk; |
| 40 | static struct clk usboh3_clk; | ||
| 40 | 41 | ||
| 41 | #define MAX_DPLL_WAIT_TRIES 1000 /* 1000 * udelay(1) = 1ms */ | 42 | #define MAX_DPLL_WAIT_TRIES 1000 /* 1000 * udelay(1) = 1ms */ |
| 42 | 43 | ||
| @@ -570,6 +571,35 @@ static int _clk_uart_set_parent(struct clk *clk, struct clk *parent) | |||
| 570 | return 0; | 571 | return 0; |
| 571 | } | 572 | } |
| 572 | 573 | ||
| 574 | static unsigned long clk_usboh3_get_rate(struct clk *clk) | ||
| 575 | { | ||
| 576 | u32 reg, prediv, podf; | ||
| 577 | unsigned long parent_rate; | ||
| 578 | |||
| 579 | parent_rate = clk_get_rate(clk->parent); | ||
| 580 | |||
| 581 | reg = __raw_readl(MXC_CCM_CSCDR1); | ||
| 582 | prediv = ((reg & MXC_CCM_CSCDR1_USBOH3_CLK_PRED_MASK) >> | ||
| 583 | MXC_CCM_CSCDR1_USBOH3_CLK_PRED_OFFSET) + 1; | ||
| 584 | podf = ((reg & MXC_CCM_CSCDR1_USBOH3_CLK_PODF_MASK) >> | ||
| 585 | MXC_CCM_CSCDR1_USBOH3_CLK_PODF_OFFSET) + 1; | ||
| 586 | |||
| 587 | return parent_rate / (prediv * podf); | ||
| 588 | } | ||
| 589 | |||
| 590 | static int _clk_usboh3_set_parent(struct clk *clk, struct clk *parent) | ||
| 591 | { | ||
| 592 | u32 reg, mux; | ||
| 593 | |||
| 594 | mux = _get_mux(parent, &pll1_sw_clk, &pll2_sw_clk, &pll3_sw_clk, | ||
| 595 | &lp_apm_clk); | ||
| 596 | reg = __raw_readl(MXC_CCM_CSCMR1) & ~MXC_CCM_CSCMR1_USBOH3_CLK_SEL_MASK; | ||
| 597 | reg |= mux << MXC_CCM_CSCMR1_USBOH3_CLK_SEL_OFFSET; | ||
| 598 | __raw_writel(reg, MXC_CCM_CSCMR1); | ||
| 599 | |||
| 600 | return 0; | ||
| 601 | } | ||
| 602 | |||
| 573 | static unsigned long get_high_reference_clock_rate(struct clk *clk) | 603 | static unsigned long get_high_reference_clock_rate(struct clk *clk) |
| 574 | { | 604 | { |
| 575 | return external_high_reference; | 605 | return external_high_reference; |
| @@ -691,6 +721,12 @@ static struct clk uart_root_clk = { | |||
| 691 | .set_parent = _clk_uart_set_parent, | 721 | .set_parent = _clk_uart_set_parent, |
| 692 | }; | 722 | }; |
| 693 | 723 | ||
| 724 | static struct clk usboh3_clk = { | ||
| 725 | .parent = &pll2_sw_clk, | ||
| 726 | .get_rate = clk_usboh3_get_rate, | ||
| 727 | .set_parent = _clk_usboh3_set_parent, | ||
| 728 | }; | ||
| 729 | |||
| 694 | static struct clk ahb_max_clk = { | 730 | static struct clk ahb_max_clk = { |
| 695 | .parent = &ahb_clk, | 731 | .parent = &ahb_clk, |
| 696 | .enable_reg = MXC_CCM_CCGR0, | 732 | .enable_reg = MXC_CCM_CCGR0, |
| @@ -779,6 +815,12 @@ static struct clk_lookup lookups[] = { | |||
| 779 | _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk) | 815 | _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk) |
| 780 | _REGISTER_CLOCK(NULL, "gpt", gpt_clk) | 816 | _REGISTER_CLOCK(NULL, "gpt", gpt_clk) |
| 781 | _REGISTER_CLOCK("fec.0", NULL, fec_clk) | 817 | _REGISTER_CLOCK("fec.0", NULL, fec_clk) |
| 818 | _REGISTER_CLOCK("mxc-ehci.0", "usb", usboh3_clk) | ||
| 819 | _REGISTER_CLOCK("mxc-ehci.0", "usb_ahb", ahb_clk) | ||
| 820 | _REGISTER_CLOCK("mxc-ehci.1", "usb", usboh3_clk) | ||
| 821 | _REGISTER_CLOCK("mxc-ehci.1", "usb_ahb", ahb_clk) | ||
| 822 | _REGISTER_CLOCK("fsl-usb2-udc", "usb", usboh3_clk) | ||
| 823 | _REGISTER_CLOCK("fsl-usb2-udc", "usb_ahb", ahb_clk) | ||
| 782 | }; | 824 | }; |
| 783 | 825 | ||
| 784 | static void clk_tree_init(void) | 826 | static void clk_tree_init(void) |
| @@ -819,6 +861,9 @@ int __init mx51_clocks_init(unsigned long ckil, unsigned long osc, | |||
| 819 | clk_enable(&cpu_clk); | 861 | clk_enable(&cpu_clk); |
| 820 | clk_enable(&main_bus_clk); | 862 | clk_enable(&main_bus_clk); |
| 821 | 863 | ||
| 864 | /* set the usboh3_clk parent to pll2_sw_clk */ | ||
| 865 | clk_set_parent(&usboh3_clk, &pll2_sw_clk); | ||
| 866 | |||
| 822 | /* System timer */ | 867 | /* System timer */ |
| 823 | mxc_timer_init(&gpt_clk, MX51_IO_ADDRESS(MX51_GPT1_BASE_ADDR), | 868 | mxc_timer_init(&gpt_clk, MX51_IO_ADDRESS(MX51_GPT1_BASE_ADDR), |
| 824 | MX51_MXC_INT_GPT); | 869 | MX51_MXC_INT_GPT); |
diff --git a/arch/arm/mach-mx5/devices.c b/arch/arm/mach-mx5/devices.c index d6fd3961ade9..7130449aacdc 100644 --- a/arch/arm/mach-mx5/devices.c +++ b/arch/arm/mach-mx5/devices.c | |||
| @@ -1,5 +1,6 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Copyright 2009 Amit Kucheria <amit.kucheria@canonical.com> | 2 | * Copyright 2009 Amit Kucheria <amit.kucheria@canonical.com> |
| 3 | * Copyright (C) 2010 Freescale Semiconductor, Inc. | ||
| 3 | * | 4 | * |
| 4 | * The code contained herein is licensed under the GNU General Public | 5 | * The code contained herein is licensed under the GNU General Public |
| 5 | * License. You may obtain a copy of the GNU General Public License | 6 | * License. You may obtain a copy of the GNU General Public License |
| @@ -10,8 +11,11 @@ | |||
| 10 | */ | 11 | */ |
| 11 | 12 | ||
| 12 | #include <linux/platform_device.h> | 13 | #include <linux/platform_device.h> |
| 14 | #include <linux/dma-mapping.h> | ||
| 15 | #include <linux/gpio.h> | ||
| 13 | #include <mach/hardware.h> | 16 | #include <mach/hardware.h> |
| 14 | #include <mach/imx-uart.h> | 17 | #include <mach/imx-uart.h> |
| 18 | #include <mach/irqs.h> | ||
| 15 | 19 | ||
| 16 | static struct resource uart0[] = { | 20 | static struct resource uart0[] = { |
| 17 | { | 21 | { |
| @@ -89,8 +93,109 @@ struct platform_device mxc_fec_device = { | |||
| 89 | .resource = mxc_fec_resources, | 93 | .resource = mxc_fec_resources, |
| 90 | }; | 94 | }; |
| 91 | 95 | ||
| 92 | /* Dummy definition to allow compiling in AVIC and TZIC simultaneously */ | 96 | static u64 usb_dma_mask = DMA_BIT_MASK(32); |
| 97 | |||
| 98 | static struct resource usbotg_resources[] = { | ||
| 99 | { | ||
| 100 | .start = MX51_OTG_BASE_ADDR, | ||
| 101 | .end = MX51_OTG_BASE_ADDR + 0x1ff, | ||
| 102 | .flags = IORESOURCE_MEM, | ||
| 103 | }, | ||
| 104 | { | ||
| 105 | .start = MX51_MXC_INT_USB_OTG, | ||
| 106 | .flags = IORESOURCE_IRQ, | ||
| 107 | }, | ||
| 108 | }; | ||
| 109 | |||
| 110 | /* OTG gadget device */ | ||
| 111 | struct platform_device mxc_usbdr_udc_device = { | ||
| 112 | .name = "fsl-usb2-udc", | ||
| 113 | .id = -1, | ||
| 114 | .num_resources = ARRAY_SIZE(usbotg_resources), | ||
| 115 | .resource = usbotg_resources, | ||
| 116 | .dev = { | ||
| 117 | .dma_mask = &usb_dma_mask, | ||
| 118 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
| 119 | }, | ||
| 120 | }; | ||
| 121 | |||
| 122 | struct platform_device mxc_usbdr_host_device = { | ||
| 123 | .name = "mxc-ehci", | ||
| 124 | .id = 0, | ||
| 125 | .num_resources = ARRAY_SIZE(usbotg_resources), | ||
| 126 | .resource = usbotg_resources, | ||
| 127 | .dev = { | ||
| 128 | .dma_mask = &usb_dma_mask, | ||
| 129 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
| 130 | }, | ||
| 131 | }; | ||
| 132 | |||
| 133 | static struct resource usbh1_resources[] = { | ||
| 134 | { | ||
| 135 | .start = MX51_OTG_BASE_ADDR + 0x200, | ||
| 136 | .end = MX51_OTG_BASE_ADDR + 0x200 + 0x1ff, | ||
| 137 | .flags = IORESOURCE_MEM, | ||
| 138 | }, | ||
| 139 | { | ||
| 140 | .start = MX51_MXC_INT_USB_H1, | ||
| 141 | .flags = IORESOURCE_IRQ, | ||
| 142 | }, | ||
| 143 | }; | ||
| 144 | |||
| 145 | struct platform_device mxc_usbh1_device = { | ||
| 146 | .name = "mxc-ehci", | ||
| 147 | .id = 1, | ||
| 148 | .num_resources = ARRAY_SIZE(usbh1_resources), | ||
| 149 | .resource = usbh1_resources, | ||
| 150 | .dev = { | ||
| 151 | .dma_mask = &usb_dma_mask, | ||
| 152 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
| 153 | }, | ||
| 154 | }; | ||
| 155 | |||
| 156 | static struct resource mxc_wdt_resources[] = { | ||
| 157 | { | ||
| 158 | .start = MX51_WDOG_BASE_ADDR, | ||
| 159 | .end = MX51_WDOG_BASE_ADDR + SZ_16K - 1, | ||
| 160 | .flags = IORESOURCE_MEM, | ||
| 161 | }, | ||
| 162 | }; | ||
| 163 | |||
| 164 | struct platform_device mxc_wdt = { | ||
| 165 | .name = "imx2-wdt", | ||
| 166 | .id = 0, | ||
| 167 | .num_resources = ARRAY_SIZE(mxc_wdt_resources), | ||
| 168 | .resource = mxc_wdt_resources, | ||
| 169 | }; | ||
| 170 | |||
| 171 | static struct mxc_gpio_port mxc_gpio_ports[] = { | ||
| 172 | { | ||
| 173 | .chip.label = "gpio-0", | ||
| 174 | .base = MX51_IO_ADDRESS(MX51_GPIO1_BASE_ADDR), | ||
| 175 | .irq = MX51_MXC_INT_GPIO1_LOW, | ||
| 176 | .virtual_irq_start = MXC_GPIO_IRQ_START | ||
| 177 | }, | ||
| 178 | { | ||
| 179 | .chip.label = "gpio-1", | ||
| 180 | .base = MX51_IO_ADDRESS(MX51_GPIO2_BASE_ADDR), | ||
| 181 | .irq = MX51_MXC_INT_GPIO2_LOW, | ||
| 182 | .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 1 | ||
| 183 | }, | ||
| 184 | { | ||
| 185 | .chip.label = "gpio-2", | ||
| 186 | .base = MX51_IO_ADDRESS(MX51_GPIO3_BASE_ADDR), | ||
| 187 | .irq = MX51_MXC_INT_GPIO3_LOW, | ||
| 188 | .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 2 | ||
| 189 | }, | ||
| 190 | { | ||
| 191 | .chip.label = "gpio-3", | ||
| 192 | .base = MX51_IO_ADDRESS(MX51_GPIO4_BASE_ADDR), | ||
| 193 | .irq = MX51_MXC_INT_GPIO4_LOW, | ||
| 194 | .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 3 | ||
| 195 | }, | ||
| 196 | }; | ||
| 197 | |||
| 93 | int __init mxc_register_gpios(void) | 198 | int __init mxc_register_gpios(void) |
| 94 | { | 199 | { |
| 95 | return 0; | 200 | return mxc_gpio_init(mxc_gpio_ports, ARRAY_SIZE(mxc_gpio_ports)); |
| 96 | } | 201 | } |
diff --git a/arch/arm/mach-mx5/devices.h b/arch/arm/mach-mx5/devices.h index f339ab8c19be..c879ae71cd5b 100644 --- a/arch/arm/mach-mx5/devices.h +++ b/arch/arm/mach-mx5/devices.h | |||
| @@ -2,3 +2,7 @@ extern struct platform_device mxc_uart_device0; | |||
| 2 | extern struct platform_device mxc_uart_device1; | 2 | extern struct platform_device mxc_uart_device1; |
| 3 | extern struct platform_device mxc_uart_device2; | 3 | extern struct platform_device mxc_uart_device2; |
| 4 | extern struct platform_device mxc_fec_device; | 4 | extern struct platform_device mxc_fec_device; |
| 5 | extern struct platform_device mxc_usbdr_host_device; | ||
| 6 | extern struct platform_device mxc_usbh1_device; | ||
| 7 | extern struct platform_device mxc_usbdr_udc_device; | ||
| 8 | extern struct platform_device mxc_wdt; | ||
diff --git a/arch/arm/mach-nomadik/clock.c b/arch/arm/mach-nomadik/clock.c index 60f5bee09f2e..f035f4185274 100644 --- a/arch/arm/mach-nomadik/clock.c +++ b/arch/arm/mach-nomadik/clock.c | |||
| @@ -32,7 +32,10 @@ void clk_disable(struct clk *clk) | |||
| 32 | } | 32 | } |
| 33 | EXPORT_SYMBOL(clk_disable); | 33 | EXPORT_SYMBOL(clk_disable); |
| 34 | 34 | ||
| 35 | /* We have a fixed clock alone, for now */ | 35 | static struct clk clk_24 = { |
| 36 | .rate = 2400000, | ||
| 37 | }; | ||
| 38 | |||
| 36 | static struct clk clk_48 = { | 39 | static struct clk clk_48 = { |
| 37 | .rate = 48 * 1000 * 1000, | 40 | .rate = 48 * 1000 * 1000, |
| 38 | }; | 41 | }; |
| @@ -50,18 +53,19 @@ static struct clk clk_default; | |||
| 50 | } | 53 | } |
| 51 | 54 | ||
| 52 | static struct clk_lookup lookups[] = { | 55 | static struct clk_lookup lookups[] = { |
| 56 | CLK(&clk_24, "mtu0"), | ||
| 57 | CLK(&clk_24, "mtu1"), | ||
| 53 | CLK(&clk_48, "uart0"), | 58 | CLK(&clk_48, "uart0"), |
| 54 | CLK(&clk_48, "uart1"), | 59 | CLK(&clk_48, "uart1"), |
| 55 | CLK(&clk_default, "gpio.0"), | 60 | CLK(&clk_default, "gpio.0"), |
| 56 | CLK(&clk_default, "gpio.1"), | 61 | CLK(&clk_default, "gpio.1"), |
| 57 | CLK(&clk_default, "gpio.2"), | 62 | CLK(&clk_default, "gpio.2"), |
| 58 | CLK(&clk_default, "gpio.3"), | 63 | CLK(&clk_default, "gpio.3"), |
| 64 | CLK(&clk_default, "rng"), | ||
| 59 | }; | 65 | }; |
| 60 | 66 | ||
| 61 | static int __init clk_init(void) | 67 | int __init clk_init(void) |
| 62 | { | 68 | { |
| 63 | clkdev_add_table(lookups, ARRAY_SIZE(lookups)); | 69 | clkdev_add_table(lookups, ARRAY_SIZE(lookups)); |
| 64 | return 0; | 70 | return 0; |
| 65 | } | 71 | } |
| 66 | |||
| 67 | arch_initcall(clk_init); | ||
diff --git a/arch/arm/mach-nomadik/clock.h b/arch/arm/mach-nomadik/clock.h index 5563985a2cc7..78da2e7c3985 100644 --- a/arch/arm/mach-nomadik/clock.h +++ b/arch/arm/mach-nomadik/clock.h | |||
| @@ -11,3 +11,5 @@ | |||
| 11 | struct clk { | 11 | struct clk { |
| 12 | unsigned long rate; | 12 | unsigned long rate; |
| 13 | }; | 13 | }; |
| 14 | |||
| 15 | int __init clk_init(void); | ||
diff --git a/arch/arm/mach-nomadik/cpu-8815.c b/arch/arm/mach-nomadik/cpu-8815.c index 91c3c901b469..ac58e3b03b1a 100644 --- a/arch/arm/mach-nomadik/cpu-8815.c +++ b/arch/arm/mach-nomadik/cpu-8815.c | |||
| @@ -31,6 +31,8 @@ | |||
| 31 | #include <asm/cacheflush.h> | 31 | #include <asm/cacheflush.h> |
| 32 | #include <asm/hardware/cache-l2x0.h> | 32 | #include <asm/hardware/cache-l2x0.h> |
| 33 | 33 | ||
| 34 | #include "clock.h" | ||
| 35 | |||
| 34 | #define __MEM_4K_RESOURCE(x) \ | 36 | #define __MEM_4K_RESOURCE(x) \ |
| 35 | .res = {.start = (x), .end = (x) + SZ_4K - 1, .flags = IORESOURCE_MEM} | 37 | .res = {.start = (x), .end = (x) + SZ_4K - 1, .flags = IORESOURCE_MEM} |
| 36 | 38 | ||
| @@ -143,6 +145,12 @@ void __init cpu8815_init_irq(void) | |||
| 143 | /* This modified VIC cell has two register blocks, at 0 and 0x20 */ | 145 | /* This modified VIC cell has two register blocks, at 0 and 0x20 */ |
| 144 | vic_init(io_p2v(NOMADIK_IC_BASE + 0x00), IRQ_VIC_START + 0, ~0, 0); | 146 | vic_init(io_p2v(NOMADIK_IC_BASE + 0x00), IRQ_VIC_START + 0, ~0, 0); |
| 145 | vic_init(io_p2v(NOMADIK_IC_BASE + 0x20), IRQ_VIC_START + 32, ~0, 0); | 147 | vic_init(io_p2v(NOMADIK_IC_BASE + 0x20), IRQ_VIC_START + 32, ~0, 0); |
| 148 | |||
| 149 | /* | ||
| 150 | * Init clocks here so that they are available for system timer | ||
| 151 | * initialization. | ||
| 152 | */ | ||
| 153 | clk_init(); | ||
| 146 | } | 154 | } |
| 147 | 155 | ||
| 148 | /* | 156 | /* |
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index d28e9e5702a0..ea52b034e963 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile | |||
| @@ -119,6 +119,7 @@ obj-$(CONFIG_MACH_NOKIA_N8X0) += board-n8x0.o | |||
| 119 | obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51.o \ | 119 | obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51.o \ |
| 120 | board-rx51-sdram.o \ | 120 | board-rx51-sdram.o \ |
| 121 | board-rx51-peripherals.o \ | 121 | board-rx51-peripherals.o \ |
| 122 | board-rx51-video.o \ | ||
| 122 | hsmmc.o | 123 | hsmmc.o |
| 123 | obj-$(CONFIG_MACH_OMAP_ZOOM2) += board-zoom2.o \ | 124 | obj-$(CONFIG_MACH_OMAP_ZOOM2) += board-zoom2.o \ |
| 124 | board-zoom-peripherals.o \ | 125 | board-zoom-peripherals.o \ |
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c index e7d629b3c76a..f474a80b8867 100644 --- a/arch/arm/mach-omap2/board-3430sdp.c +++ b/arch/arm/mach-omap2/board-3430sdp.c | |||
| @@ -137,9 +137,7 @@ static void ads7846_dev_init(void) | |||
| 137 | } | 137 | } |
| 138 | 138 | ||
| 139 | gpio_direction_input(ts_gpio); | 139 | gpio_direction_input(ts_gpio); |
| 140 | 140 | gpio_set_debounce(ts_gpio, 310); | |
| 141 | omap_set_gpio_debounce(ts_gpio, 1); | ||
| 142 | omap_set_gpio_debounce_time(ts_gpio, 0xa); | ||
| 143 | } | 141 | } |
| 144 | 142 | ||
| 145 | static int ads7846_get_pendown_state(void) | 143 | static int ads7846_get_pendown_state(void) |
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c index 5fcb52e71298..fefd7e6e9779 100644 --- a/arch/arm/mach-omap2/board-ldp.c +++ b/arch/arm/mach-omap2/board-ldp.c | |||
| @@ -209,8 +209,7 @@ static void ads7846_dev_init(void) | |||
| 209 | } | 209 | } |
| 210 | 210 | ||
| 211 | gpio_direction_input(ts_gpio); | 211 | gpio_direction_input(ts_gpio); |
| 212 | omap_set_gpio_debounce(ts_gpio, 1); | 212 | gpio_set_debounce(ts_gpio, 310); |
| 213 | omap_set_gpio_debounce_time(ts_gpio, 0xa); | ||
| 214 | } | 213 | } |
| 215 | 214 | ||
| 216 | static int ads7846_get_pendown_state(void) | 215 | static int ads7846_get_pendown_state(void) |
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c index 962d377970e9..69b154cdc75d 100644 --- a/arch/arm/mach-omap2/board-omap3beagle.c +++ b/arch/arm/mach-omap2/board-omap3beagle.c | |||
| @@ -39,6 +39,7 @@ | |||
| 39 | 39 | ||
| 40 | #include <plat/board.h> | 40 | #include <plat/board.h> |
| 41 | #include <plat/common.h> | 41 | #include <plat/common.h> |
| 42 | #include <plat/display.h> | ||
| 42 | #include <plat/gpmc.h> | 43 | #include <plat/gpmc.h> |
| 43 | #include <plat/nand.h> | 44 | #include <plat/nand.h> |
| 44 | #include <plat/usb.h> | 45 | #include <plat/usb.h> |
| @@ -106,6 +107,77 @@ static struct platform_device omap3beagle_nand_device = { | |||
| 106 | .resource = &omap3beagle_nand_resource, | 107 | .resource = &omap3beagle_nand_resource, |
| 107 | }; | 108 | }; |
| 108 | 109 | ||
| 110 | /* DSS */ | ||
| 111 | |||
| 112 | static int beagle_enable_dvi(struct omap_dss_device *dssdev) | ||
| 113 | { | ||
| 114 | if (gpio_is_valid(dssdev->reset_gpio)) | ||
| 115 | gpio_set_value(dssdev->reset_gpio, 1); | ||
| 116 | |||
| 117 | return 0; | ||
| 118 | } | ||
| 119 | |||
| 120 | static void beagle_disable_dvi(struct omap_dss_device *dssdev) | ||
| 121 | { | ||
| 122 | if (gpio_is_valid(dssdev->reset_gpio)) | ||
| 123 | gpio_set_value(dssdev->reset_gpio, 0); | ||
| 124 | } | ||
| 125 | |||
| 126 | static struct omap_dss_device beagle_dvi_device = { | ||
| 127 | .type = OMAP_DISPLAY_TYPE_DPI, | ||
| 128 | .name = "dvi", | ||
| 129 | .driver_name = "generic_panel", | ||
| 130 | .phy.dpi.data_lines = 24, | ||
| 131 | .reset_gpio = 170, | ||
| 132 | .platform_enable = beagle_enable_dvi, | ||
| 133 | .platform_disable = beagle_disable_dvi, | ||
| 134 | }; | ||
| 135 | |||
| 136 | static struct omap_dss_device beagle_tv_device = { | ||
| 137 | .name = "tv", | ||
| 138 | .driver_name = "venc", | ||
| 139 | .type = OMAP_DISPLAY_TYPE_VENC, | ||
| 140 | .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, | ||
| 141 | }; | ||
| 142 | |||
| 143 | static struct omap_dss_device *beagle_dss_devices[] = { | ||
| 144 | &beagle_dvi_device, | ||
| 145 | &beagle_tv_device, | ||
| 146 | }; | ||
| 147 | |||
| 148 | static struct omap_dss_board_info beagle_dss_data = { | ||
| 149 | .num_devices = ARRAY_SIZE(beagle_dss_devices), | ||
| 150 | .devices = beagle_dss_devices, | ||
| 151 | .default_device = &beagle_dvi_device, | ||
| 152 | }; | ||
| 153 | |||
| 154 | static struct platform_device beagle_dss_device = { | ||
| 155 | .name = "omapdss", | ||
| 156 | .id = -1, | ||
| 157 | .dev = { | ||
| 158 | .platform_data = &beagle_dss_data, | ||
| 159 | }, | ||
| 160 | }; | ||
| 161 | |||
| 162 | static struct regulator_consumer_supply beagle_vdac_supply = | ||
| 163 | REGULATOR_SUPPLY("vdda_dac", "omapdss"); | ||
| 164 | |||
| 165 | static struct regulator_consumer_supply beagle_vdvi_supply = | ||
| 166 | REGULATOR_SUPPLY("vdds_dsi", "omapdss"); | ||
| 167 | |||
| 168 | static void __init beagle_display_init(void) | ||
| 169 | { | ||
| 170 | int r; | ||
| 171 | |||
| 172 | r = gpio_request(beagle_dvi_device.reset_gpio, "DVI reset"); | ||
| 173 | if (r < 0) { | ||
| 174 | printk(KERN_ERR "Unable to get DVI reset GPIO\n"); | ||
| 175 | return; | ||
| 176 | } | ||
| 177 | |||
| 178 | gpio_direction_output(beagle_dvi_device.reset_gpio, 0); | ||
| 179 | } | ||
| 180 | |||
| 109 | #include "sdram-micron-mt46h32m32lf-6.h" | 181 | #include "sdram-micron-mt46h32m32lf-6.h" |
| 110 | 182 | ||
| 111 | static struct omap2_hsmmc_info mmc[] = { | 183 | static struct omap2_hsmmc_info mmc[] = { |
| @@ -117,15 +189,6 @@ static struct omap2_hsmmc_info mmc[] = { | |||
| 117 | {} /* Terminator */ | 189 | {} /* Terminator */ |
| 118 | }; | 190 | }; |
| 119 | 191 | ||
| 120 | static struct platform_device omap3_beagle_lcd_device = { | ||
| 121 | .name = "omap3beagle_lcd", | ||
| 122 | .id = -1, | ||
| 123 | }; | ||
| 124 | |||
| 125 | static struct omap_lcd_config omap3_beagle_lcd_config __initdata = { | ||
| 126 | .ctrl_name = "internal", | ||
| 127 | }; | ||
| 128 | |||
| 129 | static struct regulator_consumer_supply beagle_vmmc1_supply = { | 192 | static struct regulator_consumer_supply beagle_vmmc1_supply = { |
| 130 | .supply = "vmmc", | 193 | .supply = "vmmc", |
| 131 | }; | 194 | }; |
| @@ -181,16 +244,6 @@ static struct twl4030_gpio_platform_data beagle_gpio_data = { | |||
| 181 | .setup = beagle_twl_gpio_setup, | 244 | .setup = beagle_twl_gpio_setup, |
| 182 | }; | 245 | }; |
| 183 | 246 | ||
| 184 | static struct regulator_consumer_supply beagle_vdac_supply = { | ||
| 185 | .supply = "vdac", | ||
| 186 | .dev = &omap3_beagle_lcd_device.dev, | ||
| 187 | }; | ||
| 188 | |||
| 189 | static struct regulator_consumer_supply beagle_vdvi_supply = { | ||
| 190 | .supply = "vdvi", | ||
| 191 | .dev = &omap3_beagle_lcd_device.dev, | ||
| 192 | }; | ||
| 193 | |||
| 194 | /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ | 247 | /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ |
| 195 | static struct regulator_init_data beagle_vmmc1 = { | 248 | static struct regulator_init_data beagle_vmmc1 = { |
| 196 | .constraints = { | 249 | .constraints = { |
| @@ -349,14 +402,8 @@ static struct platform_device keys_gpio = { | |||
| 349 | }, | 402 | }, |
| 350 | }; | 403 | }; |
| 351 | 404 | ||
| 352 | static struct omap_board_config_kernel omap3_beagle_config[] __initdata = { | ||
| 353 | { OMAP_TAG_LCD, &omap3_beagle_lcd_config }, | ||
| 354 | }; | ||
| 355 | |||
| 356 | static void __init omap3_beagle_init_irq(void) | 405 | static void __init omap3_beagle_init_irq(void) |
| 357 | { | 406 | { |
| 358 | omap_board_config = omap3_beagle_config; | ||
| 359 | omap_board_config_size = ARRAY_SIZE(omap3_beagle_config); | ||
| 360 | omap2_init_common_hw(mt46h32m32lf6_sdrc_params, | 407 | omap2_init_common_hw(mt46h32m32lf6_sdrc_params, |
| 361 | mt46h32m32lf6_sdrc_params); | 408 | mt46h32m32lf6_sdrc_params); |
| 362 | omap_init_irq(); | 409 | omap_init_irq(); |
| @@ -367,9 +414,9 @@ static void __init omap3_beagle_init_irq(void) | |||
| 367 | } | 414 | } |
| 368 | 415 | ||
| 369 | static struct platform_device *omap3_beagle_devices[] __initdata = { | 416 | static struct platform_device *omap3_beagle_devices[] __initdata = { |
| 370 | &omap3_beagle_lcd_device, | ||
| 371 | &leds_gpio, | 417 | &leds_gpio, |
| 372 | &keys_gpio, | 418 | &keys_gpio, |
| 419 | &beagle_dss_device, | ||
| 373 | }; | 420 | }; |
| 374 | 421 | ||
| 375 | static void __init omap3beagle_flash_init(void) | 422 | static void __init omap3beagle_flash_init(void) |
| @@ -456,6 +503,8 @@ static void __init omap3_beagle_init(void) | |||
| 456 | /* Ensure SDRC pins are mux'd for self-refresh */ | 503 | /* Ensure SDRC pins are mux'd for self-refresh */ |
| 457 | omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); | 504 | omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); |
| 458 | omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT); | 505 | omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT); |
| 506 | |||
| 507 | beagle_display_init(); | ||
| 459 | } | 508 | } |
| 460 | 509 | ||
| 461 | static void __init omap3_beagle_map_io(void) | 510 | static void __init omap3_beagle_map_io(void) |
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c index 81bba194b030..b95261013812 100644 --- a/arch/arm/mach-omap2/board-omap3evm.c +++ b/arch/arm/mach-omap2/board-omap3evm.c | |||
| @@ -579,9 +579,7 @@ static void ads7846_dev_init(void) | |||
| 579 | printk(KERN_ERR "can't get ads7846 pen down GPIO\n"); | 579 | printk(KERN_ERR "can't get ads7846 pen down GPIO\n"); |
| 580 | 580 | ||
| 581 | gpio_direction_input(OMAP3_EVM_TS_GPIO); | 581 | gpio_direction_input(OMAP3_EVM_TS_GPIO); |
| 582 | 582 | gpio_set_debounce(OMAP3_EVM_TS_GPIO, 310); | |
| 583 | omap_set_gpio_debounce(OMAP3_EVM_TS_GPIO, 1); | ||
| 584 | omap_set_gpio_debounce_time(OMAP3_EVM_TS_GPIO, 0xa); | ||
| 585 | } | 583 | } |
| 586 | 584 | ||
| 587 | static int ads7846_get_pendown_state(void) | 585 | static int ads7846_get_pendown_state(void) |
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c index 395d049bf010..db06dc910ba7 100644 --- a/arch/arm/mach-omap2/board-omap3pandora.c +++ b/arch/arm/mach-omap2/board-omap3pandora.c | |||
| @@ -130,8 +130,8 @@ static struct platform_device pandora_keys_gpio = { | |||
| 130 | static void __init pandora_keys_gpio_init(void) | 130 | static void __init pandora_keys_gpio_init(void) |
| 131 | { | 131 | { |
| 132 | /* set debounce time for GPIO banks 4 and 6 */ | 132 | /* set debounce time for GPIO banks 4 and 6 */ |
| 133 | omap_set_gpio_debounce_time(32 * 3, GPIO_DEBOUNCE_TIME); | 133 | gpio_set_debounce(32 * 3, GPIO_DEBOUNCE_TIME); |
| 134 | omap_set_gpio_debounce_time(32 * 5, GPIO_DEBOUNCE_TIME); | 134 | gpio_set_debounce(32 * 5, GPIO_DEBOUNCE_TIME); |
| 135 | } | 135 | } |
| 136 | 136 | ||
| 137 | static int board_keymap[] = { | 137 | static int board_keymap[] = { |
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c index 2504d41f923e..2f5f8233dd5b 100644 --- a/arch/arm/mach-omap2/board-omap3touchbook.c +++ b/arch/arm/mach-omap2/board-omap3touchbook.c | |||
| @@ -328,8 +328,7 @@ static void __init omap3_ads7846_init(void) | |||
| 328 | } | 328 | } |
| 329 | 329 | ||
| 330 | gpio_direction_input(OMAP3_TS_GPIO); | 330 | gpio_direction_input(OMAP3_TS_GPIO); |
| 331 | omap_set_gpio_debounce(OMAP3_TS_GPIO, 1); | 331 | gpio_set_debounce(OMAP3_TS_GPIO, 310); |
| 332 | omap_set_gpio_debounce_time(OMAP3_TS_GPIO, 0xa); | ||
| 333 | } | 332 | } |
| 334 | 333 | ||
| 335 | static struct ads7846_platform_data ads7846_config = { | 334 | static struct ads7846_platform_data ads7846_config = { |
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c index 966f5f84f2bd..abdf321c2d41 100644 --- a/arch/arm/mach-omap2/board-rx51-peripherals.c +++ b/arch/arm/mach-omap2/board-rx51-peripherals.c | |||
| @@ -45,6 +45,8 @@ | |||
| 45 | /* list all spi devices here */ | 45 | /* list all spi devices here */ |
| 46 | enum { | 46 | enum { |
| 47 | RX51_SPI_WL1251, | 47 | RX51_SPI_WL1251, |
| 48 | RX51_SPI_MIPID, /* LCD panel */ | ||
| 49 | RX51_SPI_TSC2005, /* Touch Controller */ | ||
| 48 | }; | 50 | }; |
| 49 | 51 | ||
| 50 | static struct wl12xx_platform_data wl1251_pdata; | 52 | static struct wl12xx_platform_data wl1251_pdata; |
| @@ -54,6 +56,16 @@ static struct omap2_mcspi_device_config wl1251_mcspi_config = { | |||
| 54 | .single_channel = 1, | 56 | .single_channel = 1, |
| 55 | }; | 57 | }; |
| 56 | 58 | ||
| 59 | static struct omap2_mcspi_device_config mipid_mcspi_config = { | ||
| 60 | .turbo_mode = 0, | ||
| 61 | .single_channel = 1, | ||
| 62 | }; | ||
| 63 | |||
| 64 | static struct omap2_mcspi_device_config tsc2005_mcspi_config = { | ||
| 65 | .turbo_mode = 0, | ||
| 66 | .single_channel = 1, | ||
| 67 | }; | ||
| 68 | |||
| 57 | static struct spi_board_info rx51_peripherals_spi_board_info[] __initdata = { | 69 | static struct spi_board_info rx51_peripherals_spi_board_info[] __initdata = { |
| 58 | [RX51_SPI_WL1251] = { | 70 | [RX51_SPI_WL1251] = { |
| 59 | .modalias = "wl1251", | 71 | .modalias = "wl1251", |
| @@ -64,6 +76,22 @@ static struct spi_board_info rx51_peripherals_spi_board_info[] __initdata = { | |||
| 64 | .controller_data = &wl1251_mcspi_config, | 76 | .controller_data = &wl1251_mcspi_config, |
| 65 | .platform_data = &wl1251_pdata, | 77 | .platform_data = &wl1251_pdata, |
| 66 | }, | 78 | }, |
| 79 | [RX51_SPI_MIPID] = { | ||
| 80 | .modalias = "acx565akm", | ||
| 81 | .bus_num = 1, | ||
| 82 | .chip_select = 2, | ||
| 83 | .max_speed_hz = 6000000, | ||
| 84 | .controller_data = &mipid_mcspi_config, | ||
| 85 | }, | ||
| 86 | [RX51_SPI_TSC2005] = { | ||
| 87 | .modalias = "tsc2005", | ||
| 88 | .bus_num = 1, | ||
| 89 | .chip_select = 0, | ||
| 90 | /* .irq = OMAP_GPIO_IRQ(RX51_TSC2005_IRQ_GPIO),*/ | ||
| 91 | .max_speed_hz = 6000000, | ||
| 92 | .controller_data = &tsc2005_mcspi_config, | ||
| 93 | /* .platform_data = &tsc2005_config,*/ | ||
| 94 | }, | ||
| 67 | }; | 95 | }; |
| 68 | 96 | ||
| 69 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) | 97 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) |
diff --git a/arch/arm/mach-omap2/board-rx51-video.c b/arch/arm/mach-omap2/board-rx51-video.c new file mode 100644 index 000000000000..b743a4f42649 --- /dev/null +++ b/arch/arm/mach-omap2/board-rx51-video.c | |||
| @@ -0,0 +1,109 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/mach-omap2/board-rx51-video.c | ||
| 3 | * | ||
| 4 | * Copyright (C) 2010 Nokia | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #include <linux/kernel.h> | ||
| 12 | #include <linux/init.h> | ||
| 13 | #include <linux/platform_device.h> | ||
| 14 | #include <linux/gpio.h> | ||
| 15 | #include <linux/spi/spi.h> | ||
| 16 | #include <linux/mm.h> | ||
| 17 | |||
| 18 | #include <asm/mach-types.h> | ||
| 19 | #include <plat/mux.h> | ||
| 20 | #include <plat/display.h> | ||
| 21 | #include <plat/vram.h> | ||
| 22 | #include <plat/mcspi.h> | ||
| 23 | |||
| 24 | #include "mux.h" | ||
| 25 | |||
| 26 | #define RX51_LCD_RESET_GPIO 90 | ||
| 27 | |||
| 28 | #if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE) | ||
| 29 | |||
| 30 | static int rx51_lcd_enable(struct omap_dss_device *dssdev) | ||
| 31 | { | ||
| 32 | gpio_set_value(dssdev->reset_gpio, 1); | ||
| 33 | return 0; | ||
| 34 | } | ||
| 35 | |||
| 36 | static void rx51_lcd_disable(struct omap_dss_device *dssdev) | ||
| 37 | { | ||
| 38 | gpio_set_value(dssdev->reset_gpio, 0); | ||
| 39 | } | ||
| 40 | |||
| 41 | static struct omap_dss_device rx51_lcd_device = { | ||
| 42 | .name = "lcd", | ||
| 43 | .driver_name = "panel-acx565akm", | ||
| 44 | .type = OMAP_DISPLAY_TYPE_SDI, | ||
| 45 | .phy.sdi.datapairs = 2, | ||
| 46 | .reset_gpio = RX51_LCD_RESET_GPIO, | ||
| 47 | .platform_enable = rx51_lcd_enable, | ||
| 48 | .platform_disable = rx51_lcd_disable, | ||
| 49 | }; | ||
| 50 | |||
| 51 | static struct omap_dss_device *rx51_dss_devices[] = { | ||
| 52 | &rx51_lcd_device, | ||
| 53 | }; | ||
| 54 | |||
| 55 | static struct omap_dss_board_info rx51_dss_board_info = { | ||
| 56 | .num_devices = ARRAY_SIZE(rx51_dss_devices), | ||
| 57 | .devices = rx51_dss_devices, | ||
| 58 | .default_device = &rx51_lcd_device, | ||
| 59 | }; | ||
| 60 | |||
| 61 | struct platform_device rx51_display_device = { | ||
| 62 | .name = "omapdss", | ||
| 63 | .id = -1, | ||
| 64 | .dev = { | ||
| 65 | .platform_data = &rx51_dss_board_info, | ||
| 66 | }, | ||
| 67 | }; | ||
| 68 | |||
| 69 | static struct platform_device *rx51_video_devices[] __initdata = { | ||
| 70 | &rx51_display_device, | ||
| 71 | }; | ||
| 72 | |||
| 73 | static int __init rx51_video_init(void) | ||
| 74 | { | ||
| 75 | if (!machine_is_nokia_rx51()) | ||
| 76 | return 0; | ||
| 77 | |||
| 78 | if (omap_mux_init_gpio(RX51_LCD_RESET_GPIO, OMAP_PIN_OUTPUT)) { | ||
| 79 | pr_err("%s cannot configure MUX for LCD RESET\n", __func__); | ||
| 80 | return 0; | ||
| 81 | } | ||
| 82 | |||
| 83 | if (gpio_request(RX51_LCD_RESET_GPIO, "LCD ACX565AKM reset")) { | ||
| 84 | pr_err("%s failed to get LCD Reset GPIO\n", __func__); | ||
| 85 | return 0; | ||
| 86 | } | ||
| 87 | |||
| 88 | gpio_direction_output(RX51_LCD_RESET_GPIO, 1); | ||
| 89 | |||
| 90 | platform_add_devices(rx51_video_devices, | ||
| 91 | ARRAY_SIZE(rx51_video_devices)); | ||
| 92 | return 0; | ||
| 93 | } | ||
| 94 | |||
| 95 | subsys_initcall(rx51_video_init); | ||
| 96 | |||
| 97 | void __init rx51_video_mem_init(void) | ||
| 98 | { | ||
| 99 | /* | ||
| 100 | * GFX 864x480x32bpp | ||
| 101 | * VID1/2 1280x720x32bpp double buffered | ||
| 102 | */ | ||
| 103 | omap_vram_set_sdram_vram(PAGE_ALIGN(864 * 480 * 4) + | ||
| 104 | 2 * PAGE_ALIGN(1280 * 720 * 4 * 2), 0); | ||
| 105 | } | ||
| 106 | |||
| 107 | #else | ||
| 108 | void __init rx51_video_mem_init(void) { } | ||
| 109 | #endif /* defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE) */ | ||
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c index b155c366c650..1b86b5bb87a2 100644 --- a/arch/arm/mach-omap2/board-rx51.c +++ b/arch/arm/mach-omap2/board-rx51.c | |||
| @@ -36,6 +36,7 @@ | |||
| 36 | #define RX51_GPIO_SLEEP_IND 162 | 36 | #define RX51_GPIO_SLEEP_IND 162 |
| 37 | 37 | ||
| 38 | struct omap_sdrc_params *rx51_get_sdram_timings(void); | 38 | struct omap_sdrc_params *rx51_get_sdram_timings(void); |
| 39 | extern void rx51_video_mem_init(void); | ||
| 39 | 40 | ||
| 40 | static struct gpio_led gpio_leds[] = { | 41 | static struct gpio_led gpio_leds[] = { |
| 41 | { | 42 | { |
| @@ -143,6 +144,7 @@ static void __init rx51_init(void) | |||
| 143 | static void __init rx51_map_io(void) | 144 | static void __init rx51_map_io(void) |
| 144 | { | 145 | { |
| 145 | omap2_set_globals_343x(); | 146 | omap2_set_globals_343x(); |
| 147 | rx51_video_mem_init(); | ||
| 146 | omap34xx_map_common_io(); | 148 | omap34xx_map_common_io(); |
| 147 | } | 149 | } |
| 148 | 150 | ||
diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c index 23bc981574f6..37d65d62ed8f 100644 --- a/arch/arm/mach-omap2/clock2420_data.c +++ b/arch/arm/mach-omap2/clock2420_data.c | |||
| @@ -1836,7 +1836,7 @@ static struct omap_clk omap2420_clks[] = { | |||
| 1836 | CLK(NULL, "vlynq_ick", &vlynq_ick, CK_242X), | 1836 | CLK(NULL, "vlynq_ick", &vlynq_ick, CK_242X), |
| 1837 | CLK(NULL, "vlynq_fck", &vlynq_fck, CK_242X), | 1837 | CLK(NULL, "vlynq_fck", &vlynq_fck, CK_242X), |
| 1838 | CLK(NULL, "des_ick", &des_ick, CK_242X), | 1838 | CLK(NULL, "des_ick", &des_ick, CK_242X), |
| 1839 | CLK(NULL, "sha_ick", &sha_ick, CK_242X), | 1839 | CLK("omap-sham", "ick", &sha_ick, CK_242X), |
| 1840 | CLK("omap_rng", "ick", &rng_ick, CK_242X), | 1840 | CLK("omap_rng", "ick", &rng_ick, CK_242X), |
| 1841 | CLK(NULL, "aes_ick", &aes_ick, CK_242X), | 1841 | CLK(NULL, "aes_ick", &aes_ick, CK_242X), |
| 1842 | CLK(NULL, "pka_ick", &pka_ick, CK_242X), | 1842 | CLK(NULL, "pka_ick", &pka_ick, CK_242X), |
diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c index 2df50d97deb2..b33118fb6a87 100644 --- a/arch/arm/mach-omap2/clock2430_data.c +++ b/arch/arm/mach-omap2/clock2430_data.c | |||
| @@ -1924,7 +1924,7 @@ static struct omap_clk omap2430_clks[] = { | |||
| 1924 | CLK(NULL, "sdma_ick", &sdma_ick, CK_243X), | 1924 | CLK(NULL, "sdma_ick", &sdma_ick, CK_243X), |
| 1925 | CLK(NULL, "sdrc_ick", &sdrc_ick, CK_243X), | 1925 | CLK(NULL, "sdrc_ick", &sdrc_ick, CK_243X), |
| 1926 | CLK(NULL, "des_ick", &des_ick, CK_243X), | 1926 | CLK(NULL, "des_ick", &des_ick, CK_243X), |
| 1927 | CLK(NULL, "sha_ick", &sha_ick, CK_243X), | 1927 | CLK("omap-sham", "ick", &sha_ick, CK_243X), |
| 1928 | CLK("omap_rng", "ick", &rng_ick, CK_243X), | 1928 | CLK("omap_rng", "ick", &rng_ick, CK_243X), |
| 1929 | CLK(NULL, "aes_ick", &aes_ick, CK_243X), | 1929 | CLK(NULL, "aes_ick", &aes_ick, CK_243X), |
| 1930 | CLK(NULL, "pka_ick", &pka_ick, CK_243X), | 1930 | CLK(NULL, "pka_ick", &pka_ick, CK_243X), |
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c index 833be485c89e..41b155acfca7 100644 --- a/arch/arm/mach-omap2/clock3xxx_data.c +++ b/arch/arm/mach-omap2/clock3xxx_data.c | |||
| @@ -3284,7 +3284,7 @@ static struct omap_clk omap3xxx_clks[] = { | |||
| 3284 | CLK("mmci-omap-hs.2", "ick", &mmchs3_ick, CK_3430ES2 | CK_AM35XX), | 3284 | CLK("mmci-omap-hs.2", "ick", &mmchs3_ick, CK_3430ES2 | CK_AM35XX), |
| 3285 | CLK(NULL, "icr_ick", &icr_ick, CK_343X), | 3285 | CLK(NULL, "icr_ick", &icr_ick, CK_343X), |
| 3286 | CLK(NULL, "aes2_ick", &aes2_ick, CK_343X), | 3286 | CLK(NULL, "aes2_ick", &aes2_ick, CK_343X), |
| 3287 | CLK(NULL, "sha12_ick", &sha12_ick, CK_343X), | 3287 | CLK("omap-sham", "ick", &sha12_ick, CK_343X), |
| 3288 | CLK(NULL, "des2_ick", &des2_ick, CK_343X), | 3288 | CLK(NULL, "des2_ick", &des2_ick, CK_343X), |
| 3289 | CLK("mmci-omap-hs.1", "ick", &mmchs2_ick, CK_3XXX), | 3289 | CLK("mmci-omap-hs.1", "ick", &mmchs2_ick, CK_3XXX), |
| 3290 | CLK("mmci-omap-hs.0", "ick", &mmchs1_ick, CK_3XXX), | 3290 | CLK("mmci-omap-hs.0", "ick", &mmchs1_ick, CK_3XXX), |
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 705a7a30a87f..03e6c9ed82a4 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c | |||
| @@ -28,6 +28,7 @@ | |||
| 28 | #include <plat/mux.h> | 28 | #include <plat/mux.h> |
| 29 | #include <mach/gpio.h> | 29 | #include <mach/gpio.h> |
| 30 | #include <plat/mmc.h> | 30 | #include <plat/mmc.h> |
| 31 | #include <plat/dma.h> | ||
| 31 | 32 | ||
| 32 | #include "mux.h" | 33 | #include "mux.h" |
| 33 | 34 | ||
| @@ -486,8 +487,10 @@ static void omap_init_pmu(void) | |||
| 486 | } | 487 | } |
| 487 | 488 | ||
| 488 | 489 | ||
| 489 | #ifdef CONFIG_OMAP_SHA1_MD5 | 490 | #if defined(CONFIG_CRYPTO_DEV_OMAP_SHAM) || defined(CONFIG_CRYPTO_DEV_OMAP_SHAM_MODULE) |
| 490 | static struct resource sha1_md5_resources[] = { | 491 | |
| 492 | #ifdef CONFIG_ARCH_OMAP2 | ||
| 493 | static struct resource omap2_sham_resources[] = { | ||
| 491 | { | 494 | { |
| 492 | .start = OMAP24XX_SEC_SHA1MD5_BASE, | 495 | .start = OMAP24XX_SEC_SHA1MD5_BASE, |
| 493 | .end = OMAP24XX_SEC_SHA1MD5_BASE + 0x64, | 496 | .end = OMAP24XX_SEC_SHA1MD5_BASE + 0x64, |
| @@ -498,20 +501,55 @@ static struct resource sha1_md5_resources[] = { | |||
| 498 | .flags = IORESOURCE_IRQ, | 501 | .flags = IORESOURCE_IRQ, |
| 499 | } | 502 | } |
| 500 | }; | 503 | }; |
| 504 | static int omap2_sham_resources_sz = ARRAY_SIZE(omap2_sham_resources); | ||
| 505 | #else | ||
| 506 | #define omap2_sham_resources NULL | ||
| 507 | #define omap2_sham_resources_sz 0 | ||
| 508 | #endif | ||
| 501 | 509 | ||
| 502 | static struct platform_device sha1_md5_device = { | 510 | #ifdef CONFIG_ARCH_OMAP3 |
| 503 | .name = "OMAP SHA1/MD5", | 511 | static struct resource omap3_sham_resources[] = { |
| 512 | { | ||
| 513 | .start = OMAP34XX_SEC_SHA1MD5_BASE, | ||
| 514 | .end = OMAP34XX_SEC_SHA1MD5_BASE + 0x64, | ||
| 515 | .flags = IORESOURCE_MEM, | ||
| 516 | }, | ||
| 517 | { | ||
| 518 | .start = INT_34XX_SHA1MD52_IRQ, | ||
| 519 | .flags = IORESOURCE_IRQ, | ||
| 520 | }, | ||
| 521 | { | ||
| 522 | .start = OMAP34XX_DMA_SHA1MD5_RX, | ||
| 523 | .flags = IORESOURCE_DMA, | ||
| 524 | } | ||
| 525 | }; | ||
| 526 | static int omap3_sham_resources_sz = ARRAY_SIZE(omap3_sham_resources); | ||
| 527 | #else | ||
| 528 | #define omap3_sham_resources NULL | ||
| 529 | #define omap3_sham_resources_sz 0 | ||
| 530 | #endif | ||
| 531 | |||
| 532 | static struct platform_device sham_device = { | ||
| 533 | .name = "omap-sham", | ||
| 504 | .id = -1, | 534 | .id = -1, |
| 505 | .num_resources = ARRAY_SIZE(sha1_md5_resources), | ||
| 506 | .resource = sha1_md5_resources, | ||
| 507 | }; | 535 | }; |
| 508 | 536 | ||
| 509 | static void omap_init_sha1_md5(void) | 537 | static void omap_init_sham(void) |
| 510 | { | 538 | { |
| 511 | platform_device_register(&sha1_md5_device); | 539 | if (cpu_is_omap24xx()) { |
| 540 | sham_device.resource = omap2_sham_resources; | ||
| 541 | sham_device.num_resources = omap2_sham_resources_sz; | ||
| 542 | } else if (cpu_is_omap34xx()) { | ||
| 543 | sham_device.resource = omap3_sham_resources; | ||
| 544 | sham_device.num_resources = omap3_sham_resources_sz; | ||
| 545 | } else { | ||
| 546 | pr_err("%s: platform not supported\n", __func__); | ||
| 547 | return; | ||
| 548 | } | ||
| 549 | platform_device_register(&sham_device); | ||
| 512 | } | 550 | } |
| 513 | #else | 551 | #else |
| 514 | static inline void omap_init_sha1_md5(void) { } | 552 | static inline void omap_init_sham(void) { } |
| 515 | #endif | 553 | #endif |
| 516 | 554 | ||
| 517 | /*-------------------------------------------------------------------------*/ | 555 | /*-------------------------------------------------------------------------*/ |
| @@ -869,7 +907,7 @@ static int __init omap2_init_devices(void) | |||
| 869 | omap_init_pmu(); | 907 | omap_init_pmu(); |
| 870 | omap_hdq_init(); | 908 | omap_hdq_init(); |
| 871 | omap_init_sti(); | 909 | omap_init_sti(); |
| 872 | omap_init_sha1_md5(); | 910 | omap_init_sham(); |
| 873 | omap_init_vout(); | 911 | omap_init_vout(); |
| 874 | 912 | ||
| 875 | return 0; | 913 | return 0; |
diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c index 685f34a9634b..fe0de1698edc 100644 --- a/arch/arm/mach-orion5x/dns323-setup.c +++ b/arch/arm/mach-orion5x/dns323-setup.c | |||
| @@ -240,22 +240,23 @@ error_fail: | |||
| 240 | 240 | ||
| 241 | #define ORION_BLINK_HALF_PERIOD 100 /* ms */ | 241 | #define ORION_BLINK_HALF_PERIOD 100 /* ms */ |
| 242 | 242 | ||
| 243 | static int dns323_gpio_blink_set(unsigned gpio, | 243 | static int dns323_gpio_blink_set(unsigned gpio, int state, |
| 244 | unsigned long *delay_on, unsigned long *delay_off) | 244 | unsigned long *delay_on, unsigned long *delay_off) |
| 245 | { | 245 | { |
| 246 | static int value = 0; | ||
| 247 | 246 | ||
| 248 | if (!*delay_on && !*delay_off) | 247 | if (delay_on && delay_off && !*delay_on && !*delay_off) |
| 249 | *delay_on = *delay_off = ORION_BLINK_HALF_PERIOD; | 248 | *delay_on = *delay_off = ORION_BLINK_HALF_PERIOD; |
| 250 | 249 | ||
| 251 | if (ORION_BLINK_HALF_PERIOD == *delay_on | 250 | switch(state) { |
| 252 | && ORION_BLINK_HALF_PERIOD == *delay_off) { | 251 | case GPIO_LED_NO_BLINK_LOW: |
| 253 | value = !value; | 252 | case GPIO_LED_NO_BLINK_HIGH: |
| 254 | orion_gpio_set_blink(gpio, value); | 253 | orion_gpio_set_blink(gpio, 0); |
| 255 | return 0; | 254 | gpio_set_value(gpio, state); |
| 255 | break; | ||
| 256 | case GPIO_LED_BLINK: | ||
| 257 | orion_gpio_set_blink(gpio, 1); | ||
| 256 | } | 258 | } |
| 257 | 259 | return 0; | |
| 258 | return -EINVAL; | ||
| 259 | } | 260 | } |
| 260 | 261 | ||
| 261 | static struct gpio_led dns323_leds[] = { | 262 | static struct gpio_led dns323_leds[] = { |
| @@ -263,6 +264,7 @@ static struct gpio_led dns323_leds[] = { | |||
| 263 | .name = "power:blue", | 264 | .name = "power:blue", |
| 264 | .gpio = DNS323_GPIO_LED_POWER2, | 265 | .gpio = DNS323_GPIO_LED_POWER2, |
| 265 | .default_trigger = "timer", | 266 | .default_trigger = "timer", |
| 267 | .active_low = 1, | ||
| 266 | }, { | 268 | }, { |
| 267 | .name = "right:amber", | 269 | .name = "right:amber", |
| 268 | .gpio = DNS323_GPIO_LED_RIGHT_AMBER, | 270 | .gpio = DNS323_GPIO_LED_RIGHT_AMBER, |
diff --git a/arch/arm/mach-pxa/palmtc.c b/arch/arm/mach-pxa/palmtc.c index 033b567e50bb..ce1104d1bc17 100644 --- a/arch/arm/mach-pxa/palmtc.c +++ b/arch/arm/mach-pxa/palmtc.c | |||
| @@ -263,11 +263,11 @@ const struct matrix_keymap_data palmtc_keymap_data = { | |||
| 263 | .keymap_size = ARRAY_SIZE(palmtc_matrix_keys), | 263 | .keymap_size = ARRAY_SIZE(palmtc_matrix_keys), |
| 264 | }; | 264 | }; |
| 265 | 265 | ||
| 266 | const static unsigned int palmtc_keypad_row_gpios[] = { | 266 | static const unsigned int palmtc_keypad_row_gpios[] = { |
| 267 | 0, 9, 10, 11 | 267 | 0, 9, 10, 11 |
| 268 | }; | 268 | }; |
| 269 | 269 | ||
| 270 | const static unsigned int palmtc_keypad_col_gpios[] = { | 270 | static const unsigned int palmtc_keypad_col_gpios[] = { |
| 271 | 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 79, 80 | 271 | 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 79, 80 |
| 272 | }; | 272 | }; |
| 273 | 273 | ||
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c index 4d2413ed0ffa..c1048a35f187 100644 --- a/arch/arm/mach-pxa/spitz.c +++ b/arch/arm/mach-pxa/spitz.c | |||
| @@ -818,6 +818,9 @@ static struct i2c_board_info akita_i2c_board_info[] = { | |||
| 818 | .type = "max7310", | 818 | .type = "max7310", |
| 819 | .addr = 0x18, | 819 | .addr = 0x18, |
| 820 | .platform_data = &akita_ioexp, | 820 | .platform_data = &akita_ioexp, |
| 821 | }, { | ||
| 822 | .type = "wm8750", | ||
| 823 | .addr = 0x1b, | ||
| 821 | }, | 824 | }, |
| 822 | }; | 825 | }; |
| 823 | 826 | ||
diff --git a/arch/arm/mach-s3c2410/include/mach/map.h b/arch/arm/mach-s3c2410/include/mach/map.h index 091c98a639d9..cd3983ad4160 100644 --- a/arch/arm/mach-s3c2410/include/mach/map.h +++ b/arch/arm/mach-s3c2410/include/mach/map.h | |||
| @@ -114,6 +114,7 @@ | |||
| 114 | #define S3C_PA_USBHOST S3C2410_PA_USBHOST | 114 | #define S3C_PA_USBHOST S3C2410_PA_USBHOST |
| 115 | #define S3C_PA_HSMMC0 S3C2443_PA_HSMMC | 115 | #define S3C_PA_HSMMC0 S3C2443_PA_HSMMC |
| 116 | #define S3C_PA_HSMMC1 S3C2416_PA_HSMMC0 | 116 | #define S3C_PA_HSMMC1 S3C2416_PA_HSMMC0 |
| 117 | #define S3C_PA_WDT S3C2410_PA_WATCHDOG | ||
| 117 | #define S3C_PA_NAND S3C24XX_PA_NAND | 118 | #define S3C_PA_NAND S3C24XX_PA_NAND |
| 118 | 119 | ||
| 119 | #endif /* __ASM_ARCH_MAP_H */ | 120 | #endif /* __ASM_ARCH_MAP_H */ |
diff --git a/arch/arm/mach-s3c2440/mach-gta02.c b/arch/arm/mach-s3c2440/mach-gta02.c index 45799c608d8f..9e39faa283b9 100644 --- a/arch/arm/mach-s3c2440/mach-gta02.c +++ b/arch/arm/mach-s3c2440/mach-gta02.c | |||
| @@ -49,7 +49,6 @@ | |||
| 49 | #include <linux/io.h> | 49 | #include <linux/io.h> |
| 50 | 50 | ||
| 51 | #include <linux/i2c.h> | 51 | #include <linux/i2c.h> |
| 52 | #include <linux/backlight.h> | ||
| 53 | #include <linux/regulator/machine.h> | 52 | #include <linux/regulator/machine.h> |
| 54 | 53 | ||
| 55 | #include <linux/mfd/pcf50633/core.h> | 54 | #include <linux/mfd/pcf50633/core.h> |
| @@ -57,6 +56,7 @@ | |||
| 57 | #include <linux/mfd/pcf50633/adc.h> | 56 | #include <linux/mfd/pcf50633/adc.h> |
| 58 | #include <linux/mfd/pcf50633/gpio.h> | 57 | #include <linux/mfd/pcf50633/gpio.h> |
| 59 | #include <linux/mfd/pcf50633/pmic.h> | 58 | #include <linux/mfd/pcf50633/pmic.h> |
| 59 | #include <linux/mfd/pcf50633/backlight.h> | ||
| 60 | 60 | ||
| 61 | #include <asm/mach/arch.h> | 61 | #include <asm/mach/arch.h> |
| 62 | #include <asm/mach/map.h> | 62 | #include <asm/mach/map.h> |
| @@ -254,6 +254,12 @@ static char *gta02_batteries[] = { | |||
| 254 | "battery", | 254 | "battery", |
| 255 | }; | 255 | }; |
| 256 | 256 | ||
| 257 | static struct pcf50633_bl_platform_data gta02_backlight_data = { | ||
| 258 | .default_brightness = 0x3f, | ||
| 259 | .default_brightness_limit = 0, | ||
| 260 | .ramp_time = 5, | ||
| 261 | }; | ||
| 262 | |||
| 257 | struct pcf50633_platform_data gta02_pcf_pdata = { | 263 | struct pcf50633_platform_data gta02_pcf_pdata = { |
| 258 | .resumers = { | 264 | .resumers = { |
| 259 | [0] = PCF50633_INT1_USBINS | | 265 | [0] = PCF50633_INT1_USBINS | |
| @@ -271,6 +277,8 @@ struct pcf50633_platform_data gta02_pcf_pdata = { | |||
| 271 | 277 | ||
| 272 | .charger_reference_current_ma = 1000, | 278 | .charger_reference_current_ma = 1000, |
| 273 | 279 | ||
| 280 | .backlight_data = >a02_backlight_data, | ||
| 281 | |||
| 274 | .reg_init_data = { | 282 | .reg_init_data = { |
| 275 | [PCF50633_REGULATOR_AUTO] = { | 283 | [PCF50633_REGULATOR_AUTO] = { |
| 276 | .constraints = { | 284 | .constraints = { |
| @@ -478,71 +486,6 @@ static struct s3c2410_udc_mach_info gta02_udc_cfg = { | |||
| 478 | 486 | ||
| 479 | }; | 487 | }; |
| 480 | 488 | ||
| 481 | |||
| 482 | |||
| 483 | static void gta02_bl_set_intensity(int intensity) | ||
| 484 | { | ||
| 485 | struct pcf50633 *pcf = gta02_pcf; | ||
| 486 | int old_intensity = pcf50633_reg_read(pcf, PCF50633_REG_LEDOUT); | ||
| 487 | |||
| 488 | /* We map 8-bit intensity to 6-bit intensity in hardware. */ | ||
| 489 | intensity >>= 2; | ||
| 490 | |||
| 491 | /* | ||
| 492 | * This can happen during, eg, print of panic on blanked console, | ||
| 493 | * but we can't service i2c without interrupts active, so abort. | ||
| 494 | */ | ||
| 495 | if (in_atomic()) { | ||
| 496 | printk(KERN_ERR "gta02_bl_set_intensity called while atomic\n"); | ||
| 497 | return; | ||
| 498 | } | ||
| 499 | |||
| 500 | old_intensity = pcf50633_reg_read(pcf, PCF50633_REG_LEDOUT); | ||
| 501 | if (intensity == old_intensity) | ||
| 502 | return; | ||
| 503 | |||
| 504 | /* We can't do this anywhere else. */ | ||
| 505 | pcf50633_reg_write(pcf, PCF50633_REG_LEDDIM, 5); | ||
| 506 | |||
| 507 | if (!(pcf50633_reg_read(pcf, PCF50633_REG_LEDENA) & 3)) | ||
| 508 | old_intensity = 0; | ||
| 509 | |||
| 510 | /* | ||
| 511 | * The PCF50633 cannot handle LEDOUT = 0 (datasheet p60) | ||
| 512 | * if seen, you have to re-enable the LED unit. | ||
| 513 | */ | ||
| 514 | if (!intensity || !old_intensity) | ||
| 515 | pcf50633_reg_write(pcf, PCF50633_REG_LEDENA, 0); | ||
| 516 | |||
| 517 | /* Illegal to set LEDOUT to 0. */ | ||
| 518 | if (!intensity) | ||
| 519 | pcf50633_reg_set_bit_mask(pcf, PCF50633_REG_LEDOUT, 0x3f, 2); | ||
| 520 | else | ||
| 521 | pcf50633_reg_set_bit_mask(pcf, PCF50633_REG_LEDOUT, 0x3f, | ||
| 522 | intensity); | ||
| 523 | |||
| 524 | if (intensity) | ||
| 525 | pcf50633_reg_write(pcf, PCF50633_REG_LEDENA, 2); | ||
| 526 | |||
| 527 | } | ||
| 528 | |||
| 529 | static struct generic_bl_info gta02_bl_info = { | ||
| 530 | .name = "gta02-bl", | ||
| 531 | .max_intensity = 0xff, | ||
| 532 | .default_intensity = 0xff, | ||
| 533 | .set_bl_intensity = gta02_bl_set_intensity, | ||
| 534 | }; | ||
| 535 | |||
| 536 | static struct platform_device gta02_bl_dev = { | ||
| 537 | .name = "generic-bl", | ||
| 538 | .id = 1, | ||
| 539 | .dev = { | ||
| 540 | .platform_data = >a02_bl_info, | ||
| 541 | }, | ||
| 542 | }; | ||
| 543 | |||
| 544 | |||
| 545 | |||
| 546 | /* USB */ | 489 | /* USB */ |
| 547 | static struct s3c2410_hcd_info gta02_usb_info __initdata = { | 490 | static struct s3c2410_hcd_info gta02_usb_info __initdata = { |
| 548 | .port[0] = { | 491 | .port[0] = { |
| @@ -579,7 +522,6 @@ static struct platform_device *gta02_devices[] __initdata = { | |||
| 579 | /* These guys DO need to be children of PMU. */ | 522 | /* These guys DO need to be children of PMU. */ |
| 580 | 523 | ||
| 581 | static struct platform_device *gta02_devices_pmu_children[] = { | 524 | static struct platform_device *gta02_devices_pmu_children[] = { |
| 582 | >a02_bl_dev, | ||
| 583 | }; | 525 | }; |
| 584 | 526 | ||
| 585 | 527 | ||
diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig index 69e9fbfea917..f5a59727949f 100644 --- a/arch/arm/mach-s3c64xx/Kconfig +++ b/arch/arm/mach-s3c64xx/Kconfig | |||
| @@ -7,6 +7,7 @@ | |||
| 7 | config PLAT_S3C64XX | 7 | config PLAT_S3C64XX |
| 8 | bool | 8 | bool |
| 9 | depends on ARCH_S3C64XX | 9 | depends on ARCH_S3C64XX |
| 10 | select SAMSUNG_WAKEMASK | ||
| 10 | default y | 11 | default y |
| 11 | help | 12 | help |
| 12 | Base platform code for any Samsung S3C64XX device | 13 | Base platform code for any Samsung S3C64XX device |
| @@ -35,6 +36,11 @@ config S3C64XX_SETUP_SDHCI | |||
| 35 | Internal configuration for default SDHCI setup for S3C6400 and | 36 | Internal configuration for default SDHCI setup for S3C6400 and |
| 36 | S3C6410 SoCs. | 37 | S3C6410 SoCs. |
| 37 | 38 | ||
| 39 | config S3C64XX_DEV_ONENAND1 | ||
| 40 | bool | ||
| 41 | help | ||
| 42 | Compile in platform device definition for OneNAND1 controller | ||
| 43 | |||
| 38 | # platform specific device setup | 44 | # platform specific device setup |
| 39 | 45 | ||
| 40 | config S3C64XX_SETUP_I2C0 | 46 | config S3C64XX_SETUP_I2C0 |
| @@ -90,8 +96,11 @@ config MACH_SMDK6410 | |||
| 90 | select S3C_DEV_HSMMC1 | 96 | select S3C_DEV_HSMMC1 |
| 91 | select S3C_DEV_I2C1 | 97 | select S3C_DEV_I2C1 |
| 92 | select S3C_DEV_FB | 98 | select S3C_DEV_FB |
| 99 | select SAMSUNG_DEV_TS | ||
| 93 | select S3C_DEV_USB_HOST | 100 | select S3C_DEV_USB_HOST |
| 94 | select S3C_DEV_USB_HSOTG | 101 | select S3C_DEV_USB_HSOTG |
| 102 | select S3C_DEV_WDT | ||
| 103 | select HAVE_S3C2410_WATCHDOG | ||
| 95 | select S3C64XX_SETUP_SDHCI | 104 | select S3C64XX_SETUP_SDHCI |
| 96 | select S3C64XX_SETUP_I2C1 | 105 | select S3C64XX_SETUP_I2C1 |
| 97 | select S3C64XX_SETUP_FB_24BPP | 106 | select S3C64XX_SETUP_FB_24BPP |
| @@ -179,3 +188,34 @@ config MACH_HMT | |||
| 179 | select HAVE_PWM | 188 | select HAVE_PWM |
| 180 | help | 189 | help |
| 181 | Machine support for the Airgoo HMT | 190 | Machine support for the Airgoo HMT |
| 191 | |||
| 192 | config MACH_SMARTQ | ||
| 193 | bool | ||
| 194 | select CPU_S3C6410 | ||
| 195 | select S3C_DEV_HSMMC | ||
| 196 | select S3C_DEV_HSMMC1 | ||
| 197 | select S3C_DEV_HSMMC2 | ||
| 198 | select S3C_DEV_FB | ||
| 199 | select S3C_DEV_HWMON | ||
| 200 | select S3C_DEV_RTC | ||
| 201 | select S3C_DEV_USB_HSOTG | ||
| 202 | select S3C_DEV_USB_HOST | ||
| 203 | select S3C64XX_SETUP_SDHCI | ||
| 204 | select S3C64XX_SETUP_FB_24BPP | ||
| 205 | select SAMSUNG_DEV_ADC | ||
| 206 | select SAMSUNG_DEV_TS | ||
| 207 | select HAVE_PWM | ||
| 208 | help | ||
| 209 | Shared machine support for SmartQ 5/7 | ||
| 210 | |||
| 211 | config MACH_SMARTQ5 | ||
| 212 | bool "SmartQ 5" | ||
| 213 | select MACH_SMARTQ | ||
| 214 | help | ||
| 215 | Machine support for the SmartQ 5 | ||
| 216 | |||
| 217 | config MACH_SMARTQ7 | ||
| 218 | bool "SmartQ 7" | ||
| 219 | select MACH_SMARTQ | ||
| 220 | help | ||
| 221 | Machine support for the SmartQ 7 | ||
diff --git a/arch/arm/mach-s3c64xx/Makefile b/arch/arm/mach-s3c64xx/Makefile index a10f1fc6b023..9d1006938f5c 100644 --- a/arch/arm/mach-s3c64xx/Makefile +++ b/arch/arm/mach-s3c64xx/Makefile | |||
| @@ -52,6 +52,9 @@ obj-$(CONFIG_MACH_SMDK6400) += mach-smdk6400.o | |||
| 52 | obj-$(CONFIG_MACH_SMDK6410) += mach-smdk6410.o | 52 | obj-$(CONFIG_MACH_SMDK6410) += mach-smdk6410.o |
| 53 | obj-$(CONFIG_MACH_NCP) += mach-ncp.o | 53 | obj-$(CONFIG_MACH_NCP) += mach-ncp.o |
| 54 | obj-$(CONFIG_MACH_HMT) += mach-hmt.o | 54 | obj-$(CONFIG_MACH_HMT) += mach-hmt.o |
| 55 | obj-$(CONFIG_MACH_SMARTQ) += mach-smartq.o | ||
| 56 | obj-$(CONFIG_MACH_SMARTQ5) += mach-smartq5.o | ||
| 57 | obj-$(CONFIG_MACH_SMARTQ7) += mach-smartq7.o | ||
| 55 | 58 | ||
| 56 | # device support | 59 | # device support |
| 57 | 60 | ||
| @@ -59,3 +62,4 @@ obj-y += dev-uart.o | |||
| 59 | obj-y += dev-audio.o | 62 | obj-y += dev-audio.o |
| 60 | obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o | 63 | obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o |
| 61 | obj-$(CONFIG_S3C64XX_DEV_TS) += dev-ts.o | 64 | obj-$(CONFIG_S3C64XX_DEV_TS) += dev-ts.o |
| 65 | obj-$(CONFIG_S3C64XX_DEV_ONENAND1) += dev-onenand1.o | ||
diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c index 7a4138beb665..fbd85a9b7bbf 100644 --- a/arch/arm/mach-s3c64xx/clock.c +++ b/arch/arm/mach-s3c64xx/clock.c | |||
| @@ -259,6 +259,12 @@ static struct clk init_clocks[] = { | |||
| 259 | .enable = s3c64xx_hclk_ctrl, | 259 | .enable = s3c64xx_hclk_ctrl, |
| 260 | .ctrlbit = S3C_CLKCON_HCLK_HSMMC2, | 260 | .ctrlbit = S3C_CLKCON_HCLK_HSMMC2, |
| 261 | }, { | 261 | }, { |
| 262 | .name = "otg", | ||
| 263 | .id = -1, | ||
| 264 | .parent = &clk_h, | ||
| 265 | .enable = s3c64xx_hclk_ctrl, | ||
| 266 | .ctrlbit = S3C_CLKCON_HCLK_USB, | ||
| 267 | }, { | ||
| 262 | .name = "timers", | 268 | .name = "timers", |
| 263 | .id = -1, | 269 | .id = -1, |
| 264 | .parent = &clk_p, | 270 | .parent = &clk_p, |
diff --git a/arch/arm/mach-s3c64xx/dev-onenand1.c b/arch/arm/mach-s3c64xx/dev-onenand1.c new file mode 100644 index 000000000000..92ffd5bac104 --- /dev/null +++ b/arch/arm/mach-s3c64xx/dev-onenand1.c | |||
| @@ -0,0 +1,55 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/mach-s3c64xx/dev-onenand1.c | ||
| 3 | * | ||
| 4 | * Copyright (c) 2008-2010 Samsung Electronics | ||
| 5 | * Kyungmin Park <kyungmin.park@samsung.com> | ||
| 6 | * | ||
| 7 | * S3C64XX series device definition for OneNAND devices | ||
| 8 | * | ||
| 9 | * This program is free software; you can redistribute it and/or modify | ||
| 10 | * it under the terms of the GNU General Public License version 2 as | ||
| 11 | * published by the Free Software Foundation. | ||
| 12 | */ | ||
| 13 | |||
| 14 | #include <linux/kernel.h> | ||
| 15 | #include <linux/platform_device.h> | ||
| 16 | #include <linux/mtd/mtd.h> | ||
| 17 | #include <linux/mtd/onenand.h> | ||
| 18 | |||
| 19 | #include <mach/irqs.h> | ||
| 20 | #include <mach/map.h> | ||
| 21 | |||
| 22 | static struct resource s3c64xx_onenand1_resources[] = { | ||
| 23 | [0] = { | ||
| 24 | .start = S3C64XX_PA_ONENAND1, | ||
| 25 | .end = S3C64XX_PA_ONENAND1 + 0x400 - 1, | ||
| 26 | .flags = IORESOURCE_MEM, | ||
| 27 | }, | ||
| 28 | [1] = { | ||
| 29 | .start = S3C64XX_PA_ONENAND1_BUF, | ||
| 30 | .end = S3C64XX_PA_ONENAND1_BUF + S3C64XX_SZ_ONENAND1_BUF - 1, | ||
| 31 | .flags = IORESOURCE_MEM, | ||
| 32 | }, | ||
| 33 | [2] = { | ||
| 34 | .start = IRQ_ONENAND1, | ||
| 35 | .end = IRQ_ONENAND1, | ||
| 36 | .flags = IORESOURCE_IRQ, | ||
| 37 | }, | ||
| 38 | }; | ||
| 39 | |||
| 40 | struct platform_device s3c64xx_device_onenand1 = { | ||
| 41 | .name = "samsung-onenand", | ||
| 42 | .id = 1, | ||
| 43 | .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources), | ||
| 44 | .resource = s3c64xx_onenand1_resources, | ||
| 45 | }; | ||
| 46 | |||
| 47 | void s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata) | ||
| 48 | { | ||
| 49 | struct onenand_platform_data *pd; | ||
| 50 | |||
| 51 | pd = kmemdup(pdata, sizeof(struct onenand_platform_data), GFP_KERNEL); | ||
| 52 | if (!pd) | ||
| 53 | printk(KERN_ERR "%s: no memory for platform data\n", __func__); | ||
| 54 | s3c64xx_device_onenand1.dev.platform_data = pd; | ||
| 55 | } | ||
diff --git a/arch/arm/mach-s3c64xx/include/mach/irqs.h b/arch/arm/mach-s3c64xx/include/mach/irqs.h index e9ab4ac0b9a8..8e2df26cf14a 100644 --- a/arch/arm/mach-s3c64xx/include/mach/irqs.h +++ b/arch/arm/mach-s3c64xx/include/mach/irqs.h | |||
| @@ -212,5 +212,9 @@ | |||
| 212 | 212 | ||
| 213 | #define NR_IRQS (IRQ_BOARD_END + 1) | 213 | #define NR_IRQS (IRQ_BOARD_END + 1) |
| 214 | 214 | ||
| 215 | /* Compatibility */ | ||
| 216 | |||
| 217 | #define IRQ_ONENAND IRQ_ONENAND0 | ||
| 218 | |||
| 215 | #endif /* __ASM_MACH_S3C64XX_IRQS_H */ | 219 | #endif /* __ASM_MACH_S3C64XX_IRQS_H */ |
| 216 | 220 | ||
diff --git a/arch/arm/mach-s3c64xx/include/mach/map.h b/arch/arm/mach-s3c64xx/include/mach/map.h index 9fdd50c8c767..e1eab3c94aea 100644 --- a/arch/arm/mach-s3c64xx/include/mach/map.h +++ b/arch/arm/mach-s3c64xx/include/mach/map.h | |||
| @@ -52,6 +52,16 @@ | |||
| 52 | 52 | ||
| 53 | #define S3C64XX_PA_SROM (0x70000000) | 53 | #define S3C64XX_PA_SROM (0x70000000) |
| 54 | 54 | ||
| 55 | #define S3C64XX_PA_ONENAND0 (0x70100000) | ||
| 56 | #define S3C64XX_PA_ONENAND0_BUF (0x20000000) | ||
| 57 | #define S3C64XX_SZ_ONENAND0_BUF (SZ_64M) | ||
| 58 | |||
| 59 | /* NAND and OneNAND1 controllers occupy the same register region | ||
| 60 | (depending on SoC POP version) */ | ||
| 61 | #define S3C64XX_PA_ONENAND1 (0x70200000) | ||
| 62 | #define S3C64XX_PA_ONENAND1_BUF (0x28000000) | ||
| 63 | #define S3C64XX_SZ_ONENAND1_BUF (SZ_64M) | ||
| 64 | |||
| 55 | #define S3C64XX_PA_NAND (0x70200000) | 65 | #define S3C64XX_PA_NAND (0x70200000) |
| 56 | #define S3C64XX_PA_FB (0x77100000) | 66 | #define S3C64XX_PA_FB (0x77100000) |
| 57 | #define S3C64XX_PA_USB_HSOTG (0x7C000000) | 67 | #define S3C64XX_PA_USB_HSOTG (0x7C000000) |
| @@ -99,11 +109,15 @@ | |||
| 99 | #define S3C_PA_IIC S3C64XX_PA_IIC0 | 109 | #define S3C_PA_IIC S3C64XX_PA_IIC0 |
| 100 | #define S3C_PA_IIC1 S3C64XX_PA_IIC1 | 110 | #define S3C_PA_IIC1 S3C64XX_PA_IIC1 |
| 101 | #define S3C_PA_NAND S3C64XX_PA_NAND | 111 | #define S3C_PA_NAND S3C64XX_PA_NAND |
| 112 | #define S3C_PA_ONENAND S3C64XX_PA_ONENAND0 | ||
| 113 | #define S3C_PA_ONENAND_BUF S3C64XX_PA_ONENAND0_BUF | ||
| 114 | #define S3C_SZ_ONENAND_BUF S3C64XX_SZ_ONENAND0_BUF | ||
| 102 | #define S3C_PA_FB S3C64XX_PA_FB | 115 | #define S3C_PA_FB S3C64XX_PA_FB |
| 103 | #define S3C_PA_USBHOST S3C64XX_PA_USBHOST | 116 | #define S3C_PA_USBHOST S3C64XX_PA_USBHOST |
| 104 | #define S3C_PA_USB_HSOTG S3C64XX_PA_USB_HSOTG | 117 | #define S3C_PA_USB_HSOTG S3C64XX_PA_USB_HSOTG |
| 105 | #define S3C_VA_USB_HSPHY S3C64XX_VA_USB_HSPHY | 118 | #define S3C_VA_USB_HSPHY S3C64XX_VA_USB_HSPHY |
| 106 | #define S3C_PA_RTC S3C64XX_PA_RTC | 119 | #define S3C_PA_RTC S3C64XX_PA_RTC |
| 120 | #define S3C_PA_WDT S3C64XX_PA_WATCHDOG | ||
| 107 | 121 | ||
| 108 | #define SAMSUNG_PA_ADC S3C64XX_PA_ADC | 122 | #define SAMSUNG_PA_ADC S3C64XX_PA_ADC |
| 109 | 123 | ||
diff --git a/arch/arm/mach-s3c64xx/mach-smartq.c b/arch/arm/mach-s3c64xx/mach-smartq.c new file mode 100644 index 000000000000..028d080dcd35 --- /dev/null +++ b/arch/arm/mach-s3c64xx/mach-smartq.c | |||
| @@ -0,0 +1,363 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/mach-s3c64xx/mach-smartq.c | ||
| 3 | * | ||
| 4 | * Copyright (C) 2010 Maurus Cuelenaere | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | * | ||
| 10 | */ | ||
| 11 | |||
| 12 | #include <linux/delay.h> | ||
| 13 | #include <linux/fb.h> | ||
| 14 | #include <linux/gpio.h> | ||
| 15 | #include <linux/init.h> | ||
| 16 | #include <linux/platform_device.h> | ||
| 17 | #include <linux/pwm_backlight.h> | ||
| 18 | #include <linux/serial_core.h> | ||
| 19 | #include <linux/usb/gpio_vbus.h> | ||
| 20 | |||
| 21 | #include <asm/mach-types.h> | ||
| 22 | #include <asm/mach/map.h> | ||
| 23 | |||
| 24 | #include <mach/map.h> | ||
| 25 | #include <mach/regs-gpio.h> | ||
| 26 | #include <mach/regs-modem.h> | ||
| 27 | |||
| 28 | #include <plat/clock.h> | ||
| 29 | #include <plat/cpu.h> | ||
| 30 | #include <plat/devs.h> | ||
| 31 | #include <plat/iic.h> | ||
| 32 | #include <plat/gpio-cfg.h> | ||
| 33 | #include <plat/hwmon.h> | ||
| 34 | #include <plat/regs-serial.h> | ||
| 35 | #include <plat/udc-hs.h> | ||
| 36 | #include <plat/usb-control.h> | ||
| 37 | #include <plat/sdhci.h> | ||
| 38 | #include <plat/ts.h> | ||
| 39 | |||
| 40 | #include <video/platform_lcd.h> | ||
| 41 | |||
| 42 | #define UCON S3C2410_UCON_DEFAULT | ||
| 43 | #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE) | ||
| 44 | #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) | ||
| 45 | |||
| 46 | static struct s3c2410_uartcfg smartq_uartcfgs[] __initdata = { | ||
| 47 | [0] = { | ||
| 48 | .hwport = 0, | ||
| 49 | .flags = 0, | ||
| 50 | .ucon = UCON, | ||
| 51 | .ulcon = ULCON, | ||
| 52 | .ufcon = UFCON, | ||
| 53 | }, | ||
| 54 | [1] = { | ||
| 55 | .hwport = 1, | ||
| 56 | .flags = 0, | ||
| 57 | .ucon = UCON, | ||
| 58 | .ulcon = ULCON, | ||
| 59 | .ufcon = UFCON, | ||
| 60 | }, | ||
| 61 | [2] = { | ||
| 62 | .hwport = 2, | ||
| 63 | .flags = 0, | ||
| 64 | .ucon = UCON, | ||
| 65 | .ulcon = ULCON, | ||
| 66 | .ufcon = UFCON, | ||
| 67 | }, | ||
| 68 | }; | ||
| 69 | |||
| 70 | static void smartq_usb_host_powercontrol(int port, int to) | ||
| 71 | { | ||
| 72 | pr_debug("%s(%d, %d)\n", __func__, port, to); | ||
| 73 | |||
| 74 | if (port == 0) { | ||
| 75 | gpio_set_value(S3C64XX_GPL(0), to); | ||
| 76 | gpio_set_value(S3C64XX_GPL(1), to); | ||
| 77 | } | ||
| 78 | } | ||
| 79 | |||
| 80 | static irqreturn_t smartq_usb_host_ocirq(int irq, void *pw) | ||
| 81 | { | ||
| 82 | struct s3c2410_hcd_info *info = pw; | ||
| 83 | |||
| 84 | if (gpio_get_value(S3C64XX_GPL(10)) == 0) { | ||
| 85 | pr_debug("%s: over-current irq (oc detected)\n", __func__); | ||
| 86 | s3c2410_usb_report_oc(info, 3); | ||
| 87 | } else { | ||
| 88 | pr_debug("%s: over-current irq (oc cleared)\n", __func__); | ||
| 89 | s3c2410_usb_report_oc(info, 0); | ||
| 90 | } | ||
| 91 | |||
| 92 | return IRQ_HANDLED; | ||
| 93 | } | ||
| 94 | |||
| 95 | static void smartq_usb_host_enableoc(struct s3c2410_hcd_info *info, int on) | ||
| 96 | { | ||
| 97 | int ret; | ||
| 98 | |||
| 99 | /* This isn't present on a SmartQ 5 board */ | ||
| 100 | if (machine_is_smartq5()) | ||
| 101 | return; | ||
| 102 | |||
| 103 | if (on) { | ||
| 104 | ret = request_irq(gpio_to_irq(S3C64XX_GPL(10)), | ||
| 105 | smartq_usb_host_ocirq, IRQF_DISABLED | | ||
| 106 | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, | ||
| 107 | "USB host overcurrent", info); | ||
| 108 | if (ret != 0) | ||
| 109 | pr_err("failed to request usb oc irq: %d\n", ret); | ||
| 110 | } else { | ||
| 111 | free_irq(gpio_to_irq(S3C64XX_GPL(10)), info); | ||
| 112 | } | ||
| 113 | } | ||
| 114 | |||
| 115 | static struct s3c2410_hcd_info smartq_usb_host_info = { | ||
| 116 | .port[0] = { | ||
| 117 | .flags = S3C_HCDFLG_USED | ||
| 118 | }, | ||
| 119 | .port[1] = { | ||
| 120 | .flags = 0 | ||
| 121 | }, | ||
| 122 | |||
| 123 | .power_control = smartq_usb_host_powercontrol, | ||
| 124 | .enable_oc = smartq_usb_host_enableoc, | ||
| 125 | }; | ||
| 126 | |||
| 127 | static struct gpio_vbus_mach_info smartq_usb_otg_vbus_pdata = { | ||
| 128 | .gpio_vbus = S3C64XX_GPL(9), | ||
| 129 | .gpio_pullup = -1, | ||
| 130 | .gpio_vbus_inverted = true, | ||
| 131 | }; | ||
| 132 | |||
| 133 | static struct platform_device smartq_usb_otg_vbus_dev = { | ||
| 134 | .name = "gpio-vbus", | ||
| 135 | .dev.platform_data = &smartq_usb_otg_vbus_pdata, | ||
| 136 | }; | ||
| 137 | |||
| 138 | static int __init smartq_bl_init(struct device *dev) | ||
| 139 | { | ||
| 140 | s3c_gpio_cfgpin(S3C64XX_GPF(15), S3C_GPIO_SFN(2)); | ||
| 141 | |||
| 142 | return 0; | ||
| 143 | } | ||
| 144 | |||
| 145 | static struct platform_pwm_backlight_data smartq_backlight_data = { | ||
| 146 | .pwm_id = 1, | ||
| 147 | .max_brightness = 1000, | ||
| 148 | .dft_brightness = 600, | ||
| 149 | .pwm_period_ns = 1000000000 / (1000 * 20), | ||
| 150 | .init = smartq_bl_init, | ||
| 151 | }; | ||
| 152 | |||
| 153 | static struct platform_device smartq_backlight_device = { | ||
| 154 | .name = "pwm-backlight", | ||
| 155 | .dev = { | ||
| 156 | .parent = &s3c_device_timer[1].dev, | ||
| 157 | .platform_data = &smartq_backlight_data, | ||
| 158 | }, | ||
| 159 | }; | ||
| 160 | |||
| 161 | static struct s3c2410_ts_mach_info smartq_touchscreen_pdata __initdata = { | ||
| 162 | .delay = 65535, | ||
| 163 | .presc = 99, | ||
| 164 | .oversampling_shift = 4, | ||
| 165 | }; | ||
| 166 | |||
| 167 | static struct s3c_sdhci_platdata smartq_internal_hsmmc_pdata = { | ||
| 168 | .max_width = 4, | ||
| 169 | /*.broken_card_detection = true,*/ | ||
| 170 | }; | ||
| 171 | |||
| 172 | static struct s3c_hwmon_pdata smartq_hwmon_pdata __initdata = { | ||
| 173 | /* Battery voltage (?-4.2V) */ | ||
| 174 | .in[0] = &(struct s3c_hwmon_chcfg) { | ||
| 175 | .name = "smartq:battery-voltage", | ||
| 176 | .mult = 3300, | ||
| 177 | .div = 2048, | ||
| 178 | }, | ||
| 179 | /* Reference voltage (1.2V) */ | ||
| 180 | .in[1] = &(struct s3c_hwmon_chcfg) { | ||
| 181 | .name = "smartq:reference-voltage", | ||
| 182 | .mult = 3300, | ||
| 183 | .div = 4096, | ||
| 184 | }, | ||
| 185 | }; | ||
| 186 | |||
| 187 | static void smartq_lcd_power_set(struct plat_lcd_data *pd, unsigned int power) | ||
| 188 | { | ||
| 189 | gpio_direction_output(S3C64XX_GPM(3), power); | ||
| 190 | } | ||
| 191 | |||
| 192 | static struct plat_lcd_data smartq_lcd_power_data = { | ||
| 193 | .set_power = smartq_lcd_power_set, | ||
| 194 | }; | ||
| 195 | |||
| 196 | static struct platform_device smartq_lcd_power_device = { | ||
| 197 | .name = "platform-lcd", | ||
| 198 | .dev.parent = &s3c_device_fb.dev, | ||
| 199 | .dev.platform_data = &smartq_lcd_power_data, | ||
| 200 | }; | ||
| 201 | |||
| 202 | |||
| 203 | static struct platform_device *smartq_devices[] __initdata = { | ||
| 204 | &s3c_device_hsmmc1, /* Init iNAND first, ... */ | ||
| 205 | &s3c_device_hsmmc0, /* ... then the external SD card */ | ||
| 206 | &s3c_device_hsmmc2, | ||
| 207 | &s3c_device_adc, | ||
| 208 | &s3c_device_fb, | ||
| 209 | &s3c_device_hwmon, | ||
| 210 | &s3c_device_i2c0, | ||
| 211 | &s3c_device_ohci, | ||
| 212 | &s3c_device_rtc, | ||
| 213 | &s3c_device_timer[1], | ||
| 214 | &s3c_device_ts, | ||
| 215 | &s3c_device_usb_hsotg, | ||
| 216 | &smartq_backlight_device, | ||
| 217 | &smartq_lcd_power_device, | ||
| 218 | &smartq_usb_otg_vbus_dev, | ||
| 219 | }; | ||
| 220 | |||
| 221 | static void __init smartq_lcd_mode_set(void) | ||
| 222 | { | ||
| 223 | u32 tmp; | ||
| 224 | |||
| 225 | /* set the LCD type */ | ||
| 226 | tmp = __raw_readl(S3C64XX_SPCON); | ||
| 227 | tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK; | ||
| 228 | tmp |= S3C64XX_SPCON_LCD_SEL_RGB; | ||
| 229 | __raw_writel(tmp, S3C64XX_SPCON); | ||
| 230 | |||
| 231 | /* remove the LCD bypass */ | ||
| 232 | tmp = __raw_readl(S3C64XX_MODEM_MIFPCON); | ||
| 233 | tmp &= ~MIFPCON_LCD_BYPASS; | ||
| 234 | __raw_writel(tmp, S3C64XX_MODEM_MIFPCON); | ||
| 235 | } | ||
| 236 | |||
| 237 | static void smartq_power_off(void) | ||
| 238 | { | ||
| 239 | gpio_direction_output(S3C64XX_GPK(15), 1); | ||
| 240 | } | ||
| 241 | |||
| 242 | static int __init smartq_power_off_init(void) | ||
| 243 | { | ||
| 244 | int ret; | ||
| 245 | |||
| 246 | ret = gpio_request(S3C64XX_GPK(15), "Power control"); | ||
| 247 | if (ret < 0) { | ||
| 248 | pr_err("%s: failed to get GPK15\n", __func__); | ||
| 249 | return ret; | ||
| 250 | } | ||
| 251 | |||
| 252 | /* leave power on */ | ||
| 253 | gpio_direction_output(S3C64XX_GPK(15), 0); | ||
| 254 | |||
| 255 | |||
| 256 | pm_power_off = smartq_power_off; | ||
| 257 | |||
| 258 | return ret; | ||
| 259 | } | ||
| 260 | |||
| 261 | static int __init smartq_usb_host_init(void) | ||
| 262 | { | ||
| 263 | int ret; | ||
| 264 | |||
| 265 | ret = gpio_request(S3C64XX_GPL(0), "USB power control"); | ||
| 266 | if (ret < 0) { | ||
| 267 | pr_err("%s: failed to get GPL0\n", __func__); | ||
| 268 | return ret; | ||
| 269 | } | ||
| 270 | |||
| 271 | ret = gpio_request(S3C64XX_GPL(1), "USB host power control"); | ||
| 272 | if (ret < 0) { | ||
| 273 | pr_err("%s: failed to get GPL1\n", __func__); | ||
| 274 | goto err; | ||
| 275 | } | ||
| 276 | |||
| 277 | if (!machine_is_smartq5()) { | ||
| 278 | /* This isn't present on a SmartQ 5 board */ | ||
| 279 | ret = gpio_request(S3C64XX_GPL(10), "USB host overcurrent"); | ||
| 280 | if (ret < 0) { | ||
| 281 | pr_err("%s: failed to get GPL10\n", __func__); | ||
| 282 | goto err2; | ||
| 283 | } | ||
| 284 | } | ||
| 285 | |||
| 286 | /* turn power off */ | ||
| 287 | gpio_direction_output(S3C64XX_GPL(0), 0); | ||
| 288 | gpio_direction_output(S3C64XX_GPL(1), 0); | ||
| 289 | if (!machine_is_smartq5()) | ||
| 290 | gpio_direction_input(S3C64XX_GPL(10)); | ||
| 291 | |||
| 292 | s3c_device_ohci.dev.platform_data = &smartq_usb_host_info; | ||
| 293 | |||
| 294 | return 0; | ||
| 295 | |||
| 296 | err2: | ||
| 297 | gpio_free(S3C64XX_GPL(1)); | ||
| 298 | err: | ||
| 299 | gpio_free(S3C64XX_GPL(0)); | ||
| 300 | return ret; | ||
| 301 | } | ||
| 302 | |||
| 303 | static int __init smartq_usb_otg_init(void) | ||
| 304 | { | ||
| 305 | clk_xusbxti.rate = 12000000; | ||
| 306 | |||
| 307 | return 0; | ||
| 308 | } | ||
| 309 | |||
| 310 | static int __init smartq_wifi_init(void) | ||
| 311 | { | ||
| 312 | int ret; | ||
| 313 | |||
| 314 | ret = gpio_request(S3C64XX_GPK(1), "wifi control"); | ||
| 315 | if (ret < 0) { | ||
| 316 | pr_err("%s: failed to get GPK1\n", __func__); | ||
| 317 | return ret; | ||
| 318 | } | ||
| 319 | |||
| 320 | ret = gpio_request(S3C64XX_GPK(2), "wifi reset"); | ||
| 321 | if (ret < 0) { | ||
| 322 | pr_err("%s: failed to get GPK2\n", __func__); | ||
| 323 | gpio_free(S3C64XX_GPK(1)); | ||
| 324 | return ret; | ||
| 325 | } | ||
| 326 | |||
| 327 | /* turn power on */ | ||
| 328 | gpio_direction_output(S3C64XX_GPK(1), 1); | ||
| 329 | |||
| 330 | /* reset device */ | ||
| 331 | gpio_direction_output(S3C64XX_GPK(2), 0); | ||
| 332 | mdelay(100); | ||
| 333 | gpio_set_value(S3C64XX_GPK(2), 1); | ||
| 334 | gpio_direction_input(S3C64XX_GPK(2)); | ||
| 335 | |||
| 336 | return 0; | ||
| 337 | } | ||
| 338 | |||
| 339 | static struct map_desc smartq_iodesc[] __initdata = {}; | ||
| 340 | void __init smartq_map_io(void) | ||
| 341 | { | ||
| 342 | s3c64xx_init_io(smartq_iodesc, ARRAY_SIZE(smartq_iodesc)); | ||
| 343 | s3c24xx_init_clocks(12000000); | ||
| 344 | s3c24xx_init_uarts(smartq_uartcfgs, ARRAY_SIZE(smartq_uartcfgs)); | ||
| 345 | |||
| 346 | smartq_lcd_mode_set(); | ||
| 347 | } | ||
| 348 | |||
| 349 | void __init smartq_machine_init(void) | ||
| 350 | { | ||
| 351 | s3c_i2c0_set_platdata(NULL); | ||
| 352 | s3c_hwmon_set_platdata(&smartq_hwmon_pdata); | ||
| 353 | s3c_sdhci1_set_platdata(&smartq_internal_hsmmc_pdata); | ||
| 354 | s3c_sdhci2_set_platdata(&smartq_internal_hsmmc_pdata); | ||
| 355 | s3c24xx_ts_set_platdata(&smartq_touchscreen_pdata); | ||
| 356 | |||
| 357 | WARN_ON(smartq_power_off_init()); | ||
| 358 | WARN_ON(smartq_usb_host_init()); | ||
| 359 | WARN_ON(smartq_usb_otg_init()); | ||
| 360 | WARN_ON(smartq_wifi_init()); | ||
| 361 | |||
| 362 | platform_add_devices(smartq_devices, ARRAY_SIZE(smartq_devices)); | ||
| 363 | } | ||
diff --git a/arch/arm/mach-s3c64xx/mach-smartq.h b/arch/arm/mach-s3c64xx/mach-smartq.h new file mode 100644 index 000000000000..8e8b693db3af --- /dev/null +++ b/arch/arm/mach-s3c64xx/mach-smartq.h | |||
| @@ -0,0 +1,20 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/mach-s3c64xx/mach-smartq.h | ||
| 3 | * | ||
| 4 | * Copyright (C) 2010 Maurus Cuelenaere | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | * | ||
| 10 | */ | ||
| 11 | |||
| 12 | #ifndef __MACH_SMARTQ_H | ||
| 13 | #define __MACH_SMARTQ_H __FILE__ | ||
| 14 | |||
| 15 | #include <linux/init.h> | ||
| 16 | |||
| 17 | extern void __init smartq_map_io(void); | ||
| 18 | extern void __init smartq_machine_init(void); | ||
| 19 | |||
| 20 | #endif /* __MACH_SMARTQ_H */ | ||
diff --git a/arch/arm/mach-s3c64xx/mach-smartq5.c b/arch/arm/mach-s3c64xx/mach-smartq5.c new file mode 100644 index 000000000000..1d0326ead90f --- /dev/null +++ b/arch/arm/mach-s3c64xx/mach-smartq5.c | |||
| @@ -0,0 +1,185 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/mach-s3c64xx/mach-smartq5.c | ||
| 3 | * | ||
| 4 | * Copyright (C) 2010 Maurus Cuelenaere | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | * | ||
| 10 | */ | ||
| 11 | |||
| 12 | #include <linux/fb.h> | ||
| 13 | #include <linux/gpio.h> | ||
| 14 | #include <linux/gpio_keys.h> | ||
| 15 | #include <linux/i2c-gpio.h> | ||
| 16 | #include <linux/init.h> | ||
| 17 | #include <linux/input.h> | ||
| 18 | #include <linux/leds.h> | ||
| 19 | #include <linux/platform_device.h> | ||
| 20 | |||
| 21 | #include <asm/mach-types.h> | ||
| 22 | #include <asm/mach/arch.h> | ||
| 23 | |||
| 24 | #include <mach/map.h> | ||
| 25 | #include <mach/regs-fb.h> | ||
| 26 | #include <mach/regs-gpio.h> | ||
| 27 | #include <mach/s3c6410.h> | ||
| 28 | |||
| 29 | #include <plat/cpu.h> | ||
| 30 | #include <plat/devs.h> | ||
| 31 | #include <plat/fb.h> | ||
| 32 | #include <plat/gpio-cfg.h> | ||
| 33 | |||
| 34 | #include "mach-smartq.h" | ||
| 35 | |||
| 36 | static void __init smartq5_lcd_setup_gpio(void) | ||
| 37 | { | ||
| 38 | gpio_request(S3C64XX_GPM(0), "LCD SCEN pin"); | ||
| 39 | gpio_request(S3C64XX_GPM(1), "LCD SCL pin"); | ||
| 40 | gpio_request(S3C64XX_GPM(2), "LCD SDA pin"); | ||
| 41 | gpio_request(S3C64XX_GPM(3), "LCD power"); | ||
| 42 | |||
| 43 | /* turn power off */ | ||
| 44 | gpio_direction_output(S3C64XX_GPM(0), 1); | ||
| 45 | gpio_direction_input(S3C64XX_GPM(1)); | ||
| 46 | gpio_direction_input(S3C64XX_GPM(2)); | ||
| 47 | gpio_direction_output(S3C64XX_GPM(3), 0); | ||
| 48 | } | ||
| 49 | |||
| 50 | static struct i2c_gpio_platform_data smartq5_lcd_control = { | ||
| 51 | .sda_pin = S3C64XX_GPM(2), | ||
| 52 | .scl_pin = S3C64XX_GPM(1), | ||
| 53 | }; | ||
| 54 | |||
| 55 | static struct platform_device smartq5_lcd_control_device = { | ||
| 56 | .name = "i2c-gpio", | ||
| 57 | .id = 1, | ||
| 58 | .dev.platform_data = &smartq5_lcd_control, | ||
| 59 | }; | ||
| 60 | |||
| 61 | static struct gpio_led smartq5_leds[] __initdata = { | ||
| 62 | { | ||
| 63 | .name = "smartq5:green", | ||
| 64 | .active_low = 1, | ||
| 65 | .gpio = S3C64XX_GPN(8), | ||
| 66 | }, | ||
| 67 | { | ||
| 68 | .name = "smartq5:red", | ||
| 69 | .active_low = 1, | ||
| 70 | .gpio = S3C64XX_GPN(9), | ||
| 71 | }, | ||
| 72 | }; | ||
| 73 | |||
| 74 | static struct gpio_led_platform_data smartq5_led_data = { | ||
| 75 | .num_leds = ARRAY_SIZE(smartq5_leds), | ||
| 76 | .leds = smartq5_leds, | ||
| 77 | }; | ||
| 78 | |||
| 79 | static struct platform_device smartq5_leds_device = { | ||
| 80 | .name = "leds-gpio", | ||
| 81 | .id = -1, | ||
| 82 | .dev.platform_data = &smartq5_led_data, | ||
| 83 | }; | ||
| 84 | |||
| 85 | /* Labels according to the SmartQ manual */ | ||
| 86 | static struct gpio_keys_button smartq5_buttons[] = { | ||
| 87 | { | ||
| 88 | .gpio = S3C64XX_GPL(14), | ||
| 89 | .code = KEY_POWER, | ||
| 90 | .desc = "Power", | ||
| 91 | .active_low = 1, | ||
| 92 | .debounce_interval = 5, | ||
| 93 | .type = EV_KEY, | ||
| 94 | }, | ||
| 95 | { | ||
| 96 | .gpio = S3C64XX_GPN(2), | ||
| 97 | .code = KEY_KPMINUS, | ||
| 98 | .desc = "Minus", | ||
| 99 | .active_low = 1, | ||
| 100 | .debounce_interval = 5, | ||
| 101 | .type = EV_KEY, | ||
| 102 | }, | ||
| 103 | { | ||
| 104 | .gpio = S3C64XX_GPN(12), | ||
| 105 | .code = KEY_KPPLUS, | ||
| 106 | .desc = "Plus", | ||
| 107 | .active_low = 1, | ||
| 108 | .debounce_interval = 5, | ||
| 109 | .type = EV_KEY, | ||
| 110 | }, | ||
| 111 | { | ||
| 112 | .gpio = S3C64XX_GPN(15), | ||
| 113 | .code = KEY_ENTER, | ||
| 114 | .desc = "Move", | ||
| 115 | .active_low = 1, | ||
| 116 | .debounce_interval = 5, | ||
| 117 | .type = EV_KEY, | ||
| 118 | }, | ||
| 119 | }; | ||
| 120 | |||
| 121 | static struct gpio_keys_platform_data smartq5_buttons_data = { | ||
| 122 | .buttons = smartq5_buttons, | ||
| 123 | .nbuttons = ARRAY_SIZE(smartq5_buttons), | ||
| 124 | }; | ||
| 125 | |||
| 126 | static struct platform_device smartq5_buttons_device = { | ||
| 127 | .name = "gpio-keys", | ||
| 128 | .id = 0, | ||
| 129 | .num_resources = 0, | ||
| 130 | .dev = { | ||
| 131 | .platform_data = &smartq5_buttons_data, | ||
| 132 | } | ||
| 133 | }; | ||
| 134 | |||
| 135 | static struct s3c_fb_pd_win smartq5_fb_win0 = { | ||
| 136 | .win_mode = { | ||
| 137 | .pixclock = 1000000000000ULL / | ||
| 138 | ((40+1+216+800)*(10+1+35+480)*80), | ||
| 139 | .left_margin = 40, | ||
| 140 | .right_margin = 216, | ||
| 141 | .upper_margin = 10, | ||
| 142 | .lower_margin = 35, | ||
| 143 | .hsync_len = 1, | ||
| 144 | .vsync_len = 1, | ||
| 145 | .xres = 800, | ||
| 146 | .yres = 480, | ||
| 147 | }, | ||
| 148 | .max_bpp = 32, | ||
| 149 | .default_bpp = 16, | ||
| 150 | }; | ||
| 151 | |||
| 152 | static struct s3c_fb_platdata smartq5_lcd_pdata __initdata = { | ||
| 153 | .setup_gpio = s3c64xx_fb_gpio_setup_24bpp, | ||
| 154 | .win[0] = &smartq5_fb_win0, | ||
| 155 | .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, | ||
| 156 | .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC | | ||
| 157 | VIDCON1_INV_VDEN, | ||
| 158 | }; | ||
| 159 | |||
| 160 | static struct platform_device *smartq5_devices[] __initdata = { | ||
| 161 | &smartq5_leds_device, | ||
| 162 | &smartq5_buttons_device, | ||
| 163 | &smartq5_lcd_control_device, | ||
| 164 | }; | ||
| 165 | |||
| 166 | static void __init smartq5_machine_init(void) | ||
| 167 | { | ||
| 168 | s3c_fb_set_platdata(&smartq5_lcd_pdata); | ||
| 169 | |||
| 170 | smartq_machine_init(); | ||
| 171 | smartq5_lcd_setup_gpio(); | ||
| 172 | |||
| 173 | platform_add_devices(smartq5_devices, ARRAY_SIZE(smartq5_devices)); | ||
| 174 | } | ||
| 175 | |||
| 176 | MACHINE_START(SMARTQ5, "SmartQ 5") | ||
| 177 | /* Maintainer: Maurus Cuelenaere <mcuelenaere AT gmail DOT com> */ | ||
| 178 | .phys_io = S3C_PA_UART & 0xfff00000, | ||
| 179 | .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, | ||
| 180 | .boot_params = S3C64XX_PA_SDRAM + 0x100, | ||
| 181 | .init_irq = s3c6410_init_irq, | ||
| 182 | .map_io = smartq_map_io, | ||
| 183 | .init_machine = smartq5_machine_init, | ||
| 184 | .timer = &s3c24xx_timer, | ||
| 185 | MACHINE_END | ||
diff --git a/arch/arm/mach-s3c64xx/mach-smartq7.c b/arch/arm/mach-s3c64xx/mach-smartq7.c new file mode 100644 index 000000000000..e0bc78ecb156 --- /dev/null +++ b/arch/arm/mach-s3c64xx/mach-smartq7.c | |||
| @@ -0,0 +1,201 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/mach-s3c64xx/mach-smartq7.c | ||
| 3 | * | ||
| 4 | * Copyright (C) 2010 Maurus Cuelenaere | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | * | ||
| 10 | */ | ||
| 11 | |||
| 12 | #include <linux/fb.h> | ||
| 13 | #include <linux/gpio.h> | ||
| 14 | #include <linux/gpio_keys.h> | ||
| 15 | #include <linux/i2c-gpio.h> | ||
| 16 | #include <linux/init.h> | ||
| 17 | #include <linux/input.h> | ||
| 18 | #include <linux/leds.h> | ||
| 19 | #include <linux/platform_device.h> | ||
| 20 | |||
| 21 | #include <asm/mach-types.h> | ||
| 22 | #include <asm/mach/arch.h> | ||
| 23 | |||
| 24 | #include <mach/map.h> | ||
| 25 | #include <mach/regs-fb.h> | ||
| 26 | #include <mach/regs-gpio.h> | ||
| 27 | #include <mach/s3c6410.h> | ||
| 28 | |||
| 29 | #include <plat/cpu.h> | ||
| 30 | #include <plat/devs.h> | ||
| 31 | #include <plat/fb.h> | ||
| 32 | #include <plat/gpio-cfg.h> | ||
| 33 | |||
| 34 | #include "mach-smartq.h" | ||
| 35 | |||
| 36 | static void __init smartq7_lcd_setup_gpio(void) | ||
| 37 | { | ||
| 38 | gpio_request(S3C64XX_GPM(0), "LCD CSB pin"); | ||
| 39 | gpio_request(S3C64XX_GPM(3), "LCD power"); | ||
| 40 | gpio_request(S3C64XX_GPM(4), "LCD power status"); | ||
| 41 | |||
| 42 | /* turn power off */ | ||
| 43 | gpio_direction_output(S3C64XX_GPM(0), 1); | ||
| 44 | gpio_direction_output(S3C64XX_GPM(3), 0); | ||
| 45 | gpio_direction_input(S3C64XX_GPM(4)); | ||
| 46 | } | ||
| 47 | |||
| 48 | static struct i2c_gpio_platform_data smartq7_lcd_control = { | ||
| 49 | .sda_pin = S3C64XX_GPM(2), | ||
| 50 | .scl_pin = S3C64XX_GPM(1), | ||
| 51 | .sda_is_open_drain = 1, | ||
| 52 | .scl_is_open_drain = 1, | ||
| 53 | }; | ||
| 54 | |||
| 55 | static struct platform_device smartq7_lcd_control_device = { | ||
| 56 | .name = "i2c-gpio", | ||
| 57 | .id = 1, | ||
| 58 | .dev.platform_data = &smartq7_lcd_control, | ||
| 59 | }; | ||
| 60 | |||
| 61 | static struct gpio_led smartq7_leds[] __initdata = { | ||
| 62 | { | ||
| 63 | .name = "smartq7:red", | ||
| 64 | .active_low = 1, | ||
| 65 | .gpio = S3C64XX_GPN(8), | ||
| 66 | }, | ||
| 67 | { | ||
| 68 | .name = "smartq7:green", | ||
| 69 | .active_low = 1, | ||
| 70 | .gpio = S3C64XX_GPN(9), | ||
| 71 | }, | ||
| 72 | }; | ||
| 73 | |||
| 74 | static struct gpio_led_platform_data smartq7_led_data = { | ||
| 75 | .num_leds = ARRAY_SIZE(smartq7_leds), | ||
| 76 | .leds = smartq7_leds, | ||
| 77 | }; | ||
| 78 | |||
| 79 | static struct platform_device smartq7_leds_device = { | ||
| 80 | .name = "leds-gpio", | ||
| 81 | .id = -1, | ||
| 82 | .dev.platform_data = &smartq7_led_data, | ||
| 83 | }; | ||
| 84 | |||
| 85 | /* Labels according to the SmartQ manual */ | ||
| 86 | static struct gpio_keys_button smartq7_buttons[] = { | ||
| 87 | { | ||
| 88 | .gpio = S3C64XX_GPL(14), | ||
| 89 | .code = KEY_POWER, | ||
| 90 | .desc = "Power", | ||
| 91 | .active_low = 1, | ||
| 92 | .debounce_interval = 5, | ||
| 93 | .type = EV_KEY, | ||
| 94 | }, | ||
| 95 | { | ||
| 96 | .gpio = S3C64XX_GPN(2), | ||
| 97 | .code = KEY_FN, | ||
| 98 | .desc = "Function", | ||
| 99 | .active_low = 1, | ||
| 100 | .debounce_interval = 5, | ||
| 101 | .type = EV_KEY, | ||
| 102 | }, | ||
| 103 | { | ||
| 104 | .gpio = S3C64XX_GPN(3), | ||
| 105 | .code = KEY_KPMINUS, | ||
| 106 | .desc = "Minus", | ||
| 107 | .active_low = 1, | ||
| 108 | .debounce_interval = 5, | ||
| 109 | .type = EV_KEY, | ||
| 110 | }, | ||
| 111 | { | ||
| 112 | .gpio = S3C64XX_GPN(4), | ||
| 113 | .code = KEY_KPPLUS, | ||
| 114 | .desc = "Plus", | ||
| 115 | .active_low = 1, | ||
| 116 | .debounce_interval = 5, | ||
| 117 | .type = EV_KEY, | ||
| 118 | }, | ||
| 119 | { | ||
| 120 | .gpio = S3C64XX_GPN(12), | ||
| 121 | .code = KEY_ENTER, | ||
| 122 | .desc = "Enter", | ||
| 123 | .active_low = 1, | ||
| 124 | .debounce_interval = 5, | ||
| 125 | .type = EV_KEY, | ||
| 126 | }, | ||
| 127 | { | ||
| 128 | .gpio = S3C64XX_GPN(15), | ||
| 129 | .code = KEY_ESC, | ||
| 130 | .desc = "Cancel", | ||
| 131 | .active_low = 1, | ||
| 132 | .debounce_interval = 5, | ||
| 133 | .type = EV_KEY, | ||
| 134 | }, | ||
| 135 | }; | ||
| 136 | |||
| 137 | static struct gpio_keys_platform_data smartq7_buttons_data = { | ||
| 138 | .buttons = smartq7_buttons, | ||
| 139 | .nbuttons = ARRAY_SIZE(smartq7_buttons), | ||
| 140 | }; | ||
| 141 | |||
| 142 | static struct platform_device smartq7_buttons_device = { | ||
| 143 | .name = "gpio-keys", | ||
| 144 | .id = 0, | ||
| 145 | .num_resources = 0, | ||
| 146 | .dev = { | ||
| 147 | .platform_data = &smartq7_buttons_data, | ||
| 148 | } | ||
| 149 | }; | ||
| 150 | |||
| 151 | static struct s3c_fb_pd_win smartq7_fb_win0 = { | ||
| 152 | .win_mode = { | ||
| 153 | .pixclock = 1000000000000ULL / | ||
| 154 | ((3+10+5+800)*(1+3+20+480)*80), | ||
| 155 | .left_margin = 3, | ||
| 156 | .right_margin = 5, | ||
| 157 | .upper_margin = 1, | ||
| 158 | .lower_margin = 20, | ||
| 159 | .hsync_len = 10, | ||
| 160 | .vsync_len = 3, | ||
| 161 | .xres = 800, | ||
| 162 | .yres = 480, | ||
| 163 | }, | ||
| 164 | .max_bpp = 32, | ||
| 165 | .default_bpp = 16, | ||
| 166 | }; | ||
| 167 | |||
| 168 | static struct s3c_fb_platdata smartq7_lcd_pdata __initdata = { | ||
| 169 | .setup_gpio = s3c64xx_fb_gpio_setup_24bpp, | ||
| 170 | .win[0] = &smartq7_fb_win0, | ||
| 171 | .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, | ||
| 172 | .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC | | ||
| 173 | VIDCON1_INV_VCLK, | ||
| 174 | }; | ||
| 175 | |||
| 176 | static struct platform_device *smartq7_devices[] __initdata = { | ||
| 177 | &smartq7_leds_device, | ||
| 178 | &smartq7_buttons_device, | ||
| 179 | &smartq7_lcd_control_device, | ||
| 180 | }; | ||
| 181 | |||
| 182 | static void __init smartq7_machine_init(void) | ||
| 183 | { | ||
| 184 | s3c_fb_set_platdata(&smartq7_lcd_pdata); | ||
| 185 | |||
| 186 | smartq_machine_init(); | ||
| 187 | smartq7_lcd_setup_gpio(); | ||
| 188 | |||
| 189 | platform_add_devices(smartq7_devices, ARRAY_SIZE(smartq7_devices)); | ||
| 190 | } | ||
| 191 | |||
| 192 | MACHINE_START(SMARTQ7, "SmartQ 7") | ||
| 193 | /* Maintainer: Maurus Cuelenaere <mcuelenaere AT gmail DOT com> */ | ||
| 194 | .phys_io = S3C_PA_UART & 0xfff00000, | ||
| 195 | .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, | ||
| 196 | .boot_params = S3C64XX_PA_SDRAM + 0x100, | ||
| 197 | .init_irq = s3c6410_init_irq, | ||
| 198 | .map_io = smartq_map_io, | ||
| 199 | .init_machine = smartq7_machine_init, | ||
| 200 | .timer = &s3c24xx_timer, | ||
| 201 | MACHINE_END | ||
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c index 9d51455feb31..d9a03555f88b 100644 --- a/arch/arm/mach-s3c64xx/mach-smdk6410.c +++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c | |||
| @@ -64,6 +64,8 @@ | |||
| 64 | #include <plat/clock.h> | 64 | #include <plat/clock.h> |
| 65 | #include <plat/devs.h> | 65 | #include <plat/devs.h> |
| 66 | #include <plat/cpu.h> | 66 | #include <plat/cpu.h> |
| 67 | #include <plat/adc.h> | ||
| 68 | #include <plat/ts.h> | ||
| 67 | 69 | ||
| 68 | #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK | 70 | #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK |
| 69 | #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB | 71 | #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB |
| @@ -262,6 +264,9 @@ static struct platform_device *smdk6410_devices[] __initdata = { | |||
| 262 | &smdk6410_lcd_powerdev, | 264 | &smdk6410_lcd_powerdev, |
| 263 | 265 | ||
| 264 | &smdk6410_smsc911x, | 266 | &smdk6410_smsc911x, |
| 267 | &s3c_device_adc, | ||
| 268 | &s3c_device_ts, | ||
| 269 | &s3c_device_wdt, | ||
| 265 | }; | 270 | }; |
| 266 | 271 | ||
| 267 | #ifdef CONFIG_REGULATOR | 272 | #ifdef CONFIG_REGULATOR |
| @@ -596,6 +601,12 @@ static struct i2c_board_info i2c_devs1[] __initdata = { | |||
| 596 | { I2C_BOARD_INFO("24c128", 0x57), }, /* Samsung S524AD0XD1 */ | 601 | { I2C_BOARD_INFO("24c128", 0x57), }, /* Samsung S524AD0XD1 */ |
| 597 | }; | 602 | }; |
| 598 | 603 | ||
| 604 | static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = { | ||
| 605 | .delay = 10000, | ||
| 606 | .presc = 49, | ||
| 607 | .oversampling_shift = 2, | ||
| 608 | }; | ||
| 609 | |||
| 599 | static void __init smdk6410_map_io(void) | 610 | static void __init smdk6410_map_io(void) |
| 600 | { | 611 | { |
| 601 | u32 tmp; | 612 | u32 tmp; |
| @@ -625,6 +636,8 @@ static void __init smdk6410_machine_init(void) | |||
| 625 | s3c_i2c1_set_platdata(NULL); | 636 | s3c_i2c1_set_platdata(NULL); |
| 626 | s3c_fb_set_platdata(&smdk6410_lcd_pdata); | 637 | s3c_fb_set_platdata(&smdk6410_lcd_pdata); |
| 627 | 638 | ||
| 639 | s3c24xx_ts_set_platdata(&s3c_ts_platform); | ||
| 640 | |||
| 628 | /* configure nCS1 width to 16 bits */ | 641 | /* configure nCS1 width to 16 bits */ |
| 629 | 642 | ||
| 630 | cs1 = __raw_readl(S3C64XX_SROM_BW) & | 643 | cs1 = __raw_readl(S3C64XX_SROM_BW) & |
diff --git a/arch/arm/mach-s3c64xx/pm.c b/arch/arm/mach-s3c64xx/pm.c index b8ac4597fad7..79412f735a8d 100644 --- a/arch/arm/mach-s3c64xx/pm.c +++ b/arch/arm/mach-s3c64xx/pm.c | |||
| @@ -18,8 +18,11 @@ | |||
| 18 | #include <linux/io.h> | 18 | #include <linux/io.h> |
| 19 | 19 | ||
| 20 | #include <mach/map.h> | 20 | #include <mach/map.h> |
| 21 | #include <mach/irqs.h> | ||
| 21 | 22 | ||
| 22 | #include <plat/pm.h> | 23 | #include <plat/pm.h> |
| 24 | #include <plat/wakeup-mask.h> | ||
| 25 | |||
| 23 | #include <mach/regs-sys.h> | 26 | #include <mach/regs-sys.h> |
| 24 | #include <mach/regs-gpio.h> | 27 | #include <mach/regs-gpio.h> |
| 25 | #include <mach/regs-clock.h> | 28 | #include <mach/regs-clock.h> |
| @@ -153,8 +156,25 @@ static void s3c64xx_cpu_suspend(void) | |||
| 153 | panic("sleep resumed to originator?"); | 156 | panic("sleep resumed to originator?"); |
| 154 | } | 157 | } |
| 155 | 158 | ||
| 159 | /* mapping of interrupts to parts of the wakeup mask */ | ||
| 160 | static struct samsung_wakeup_mask wake_irqs[] = { | ||
| 161 | { .irq = IRQ_RTC_ALARM, .bit = S3C64XX_PWRCFG_RTC_ALARM_DISABLE, }, | ||
| 162 | { .irq = IRQ_RTC_TIC, .bit = S3C64XX_PWRCFG_RTC_TICK_DISABLE, }, | ||
| 163 | { .irq = IRQ_PENDN, .bit = S3C64XX_PWRCFG_TS_DISABLE, }, | ||
| 164 | { .irq = IRQ_HSMMC0, .bit = S3C64XX_PWRCFG_MMC0_DISABLE, }, | ||
| 165 | { .irq = IRQ_HSMMC1, .bit = S3C64XX_PWRCFG_MMC1_DISABLE, }, | ||
| 166 | { .irq = IRQ_HSMMC2, .bit = S3C64XX_PWRCFG_MMC2_DISABLE, }, | ||
| 167 | { .irq = NO_WAKEUP_IRQ, .bit = S3C64XX_PWRCFG_BATF_DISABLE}, | ||
| 168 | { .irq = NO_WAKEUP_IRQ, .bit = S3C64XX_PWRCFG_MSM_DISABLE }, | ||
| 169 | { .irq = NO_WAKEUP_IRQ, .bit = S3C64XX_PWRCFG_HSI_DISABLE }, | ||
| 170 | { .irq = NO_WAKEUP_IRQ, .bit = S3C64XX_PWRCFG_MSM_DISABLE }, | ||
| 171 | }; | ||
| 172 | |||
| 156 | static void s3c64xx_pm_prepare(void) | 173 | static void s3c64xx_pm_prepare(void) |
| 157 | { | 174 | { |
| 175 | samsung_sync_wakemask(S3C64XX_PWR_CFG, | ||
| 176 | wake_irqs, ARRAY_SIZE(wake_irqs)); | ||
| 177 | |||
| 158 | /* store address of resume. */ | 178 | /* store address of resume. */ |
| 159 | __raw_writel(virt_to_phys(s3c_cpu_resume), S3C64XX_INFORM0); | 179 | __raw_writel(virt_to_phys(s3c_cpu_resume), S3C64XX_INFORM0); |
| 160 | 180 | ||
diff --git a/arch/arm/mach-s3c64xx/s3c6400.c b/arch/arm/mach-s3c64xx/s3c6400.c index 707e34e3afd1..5e93fe3f3f40 100644 --- a/arch/arm/mach-s3c64xx/s3c6400.c +++ b/arch/arm/mach-s3c64xx/s3c6400.c | |||
| @@ -37,6 +37,7 @@ | |||
| 37 | #include <plat/clock.h> | 37 | #include <plat/clock.h> |
| 38 | #include <plat/sdhci.h> | 38 | #include <plat/sdhci.h> |
| 39 | #include <plat/iic-core.h> | 39 | #include <plat/iic-core.h> |
| 40 | #include <plat/onenand-core.h> | ||
| 40 | #include <mach/s3c6400.h> | 41 | #include <mach/s3c6400.h> |
| 41 | 42 | ||
| 42 | void __init s3c6400_map_io(void) | 43 | void __init s3c6400_map_io(void) |
| @@ -51,6 +52,9 @@ void __init s3c6400_map_io(void) | |||
| 51 | s3c_i2c0_setname("s3c2440-i2c"); | 52 | s3c_i2c0_setname("s3c2440-i2c"); |
| 52 | 53 | ||
| 53 | s3c_device_nand.name = "s3c6400-nand"; | 54 | s3c_device_nand.name = "s3c6400-nand"; |
| 55 | |||
| 56 | s3c_onenand_setname("s3c6400-onenand"); | ||
| 57 | s3c64xx_onenand1_setname("s3c6400-onenand"); | ||
| 54 | } | 58 | } |
| 55 | 59 | ||
| 56 | void __init s3c6400_init_clocks(int xtal) | 60 | void __init s3c6400_init_clocks(int xtal) |
diff --git a/arch/arm/mach-s3c64xx/s3c6410.c b/arch/arm/mach-s3c64xx/s3c6410.c index 3ab695c691ee..014401c39f36 100644 --- a/arch/arm/mach-s3c64xx/s3c6410.c +++ b/arch/arm/mach-s3c64xx/s3c6410.c | |||
| @@ -39,6 +39,7 @@ | |||
| 39 | #include <plat/sdhci.h> | 39 | #include <plat/sdhci.h> |
| 40 | #include <plat/iic-core.h> | 40 | #include <plat/iic-core.h> |
| 41 | #include <plat/adc.h> | 41 | #include <plat/adc.h> |
| 42 | #include <plat/onenand-core.h> | ||
| 42 | #include <mach/s3c6400.h> | 43 | #include <mach/s3c6400.h> |
| 43 | #include <mach/s3c6410.h> | 44 | #include <mach/s3c6410.h> |
| 44 | 45 | ||
| @@ -55,6 +56,8 @@ void __init s3c6410_map_io(void) | |||
| 55 | 56 | ||
| 56 | s3c_device_adc.name = "s3c64xx-adc"; | 57 | s3c_device_adc.name = "s3c64xx-adc"; |
| 57 | s3c_device_nand.name = "s3c6400-nand"; | 58 | s3c_device_nand.name = "s3c6400-nand"; |
| 59 | s3c_onenand_setname("s3c6410-onenand"); | ||
| 60 | s3c64xx_onenand1_setname("s3c6410-onenand"); | ||
| 58 | } | 61 | } |
| 59 | 62 | ||
| 60 | void __init s3c6410_init_clocks(int xtal) | 63 | void __init s3c6410_init_clocks(int xtal) |
diff --git a/arch/arm/mach-s5p6440/Kconfig b/arch/arm/mach-s5p6440/Kconfig index 77aeffd17330..f066fae07c57 100644 --- a/arch/arm/mach-s5p6440/Kconfig +++ b/arch/arm/mach-s5p6440/Kconfig | |||
| @@ -16,6 +16,10 @@ config CPU_S5P6440 | |||
| 16 | config MACH_SMDK6440 | 16 | config MACH_SMDK6440 |
| 17 | bool "SMDK6440" | 17 | bool "SMDK6440" |
| 18 | select CPU_S5P6440 | 18 | select CPU_S5P6440 |
| 19 | select SAMSUNG_DEV_TS | ||
| 20 | select SAMSUNG_DEV_ADC | ||
| 21 | select S3C_DEV_WDT | ||
| 22 | select HAVE_S3C2410_WATCHDOG | ||
| 19 | help | 23 | help |
| 20 | Machine support for the Samsung SMDK6440 | 24 | Machine support for the Samsung SMDK6440 |
| 21 | 25 | ||
diff --git a/arch/arm/mach-s5p6440/Makefile b/arch/arm/mach-s5p6440/Makefile index 44facf43d59f..be3c53aab23f 100644 --- a/arch/arm/mach-s5p6440/Makefile +++ b/arch/arm/mach-s5p6440/Makefile | |||
| @@ -21,3 +21,4 @@ obj-$(CONFIG_MACH_SMDK6440) += mach-smdk6440.o | |||
| 21 | 21 | ||
| 22 | # device support | 22 | # device support |
| 23 | obj-y += dev-audio.o | 23 | obj-y += dev-audio.o |
| 24 | obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o | ||
diff --git a/arch/arm/mach-s5p6440/cpu.c b/arch/arm/mach-s5p6440/cpu.c index ca3b3206e6f8..b2fe6a58155a 100644 --- a/arch/arm/mach-s5p6440/cpu.c +++ b/arch/arm/mach-s5p6440/cpu.c | |||
| @@ -61,6 +61,7 @@ static void s5p6440_idle(void) | |||
| 61 | void __init s5p6440_map_io(void) | 61 | void __init s5p6440_map_io(void) |
| 62 | { | 62 | { |
| 63 | /* initialize any device information early */ | 63 | /* initialize any device information early */ |
| 64 | s3c_device_adc.name = "s3c64xx-adc"; | ||
| 64 | } | 65 | } |
| 65 | 66 | ||
| 66 | void __init s5p6440_init_clocks(int xtal) | 67 | void __init s5p6440_init_clocks(int xtal) |
diff --git a/arch/arm/mach-s5p6440/dev-spi.c b/arch/arm/mach-s5p6440/dev-spi.c new file mode 100644 index 000000000000..0a30280019c0 --- /dev/null +++ b/arch/arm/mach-s5p6440/dev-spi.c | |||
| @@ -0,0 +1,176 @@ | |||
| 1 | /* linux/arch/arm/mach-s5p6440/dev-spi.c | ||
| 2 | * | ||
| 3 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
| 4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #include <linux/platform_device.h> | ||
| 12 | #include <linux/dma-mapping.h> | ||
| 13 | |||
| 14 | #include <mach/dma.h> | ||
| 15 | #include <mach/map.h> | ||
| 16 | #include <mach/irqs.h> | ||
| 17 | #include <mach/gpio.h> | ||
| 18 | #include <mach/spi-clocks.h> | ||
| 19 | |||
| 20 | #include <plat/s3c64xx-spi.h> | ||
| 21 | #include <plat/gpio-cfg.h> | ||
| 22 | |||
| 23 | static char *spi_src_clks[] = { | ||
| 24 | [S5P6440_SPI_SRCCLK_PCLK] = "pclk", | ||
| 25 | [S5P6440_SPI_SRCCLK_SCLK] = "spi_epll", | ||
| 26 | }; | ||
| 27 | |||
| 28 | /* SPI Controller platform_devices */ | ||
| 29 | |||
| 30 | /* Since we emulate multi-cs capability, we do not touch the CS. | ||
| 31 | * The emulated CS is toggled by board specific mechanism, as it can | ||
| 32 | * be either some immediate GPIO or some signal out of some other | ||
| 33 | * chip in between ... or some yet another way. | ||
| 34 | * We simply do not assume anything about CS. | ||
| 35 | */ | ||
| 36 | static int s5p6440_spi_cfg_gpio(struct platform_device *pdev) | ||
| 37 | { | ||
| 38 | switch (pdev->id) { | ||
| 39 | case 0: | ||
| 40 | s3c_gpio_cfgpin(S5P6440_GPC(0), S3C_GPIO_SFN(2)); | ||
| 41 | s3c_gpio_cfgpin(S5P6440_GPC(1), S3C_GPIO_SFN(2)); | ||
| 42 | s3c_gpio_cfgpin(S5P6440_GPC(2), S3C_GPIO_SFN(2)); | ||
| 43 | s3c_gpio_setpull(S5P6440_GPC(0), S3C_GPIO_PULL_UP); | ||
| 44 | s3c_gpio_setpull(S5P6440_GPC(1), S3C_GPIO_PULL_UP); | ||
| 45 | s3c_gpio_setpull(S5P6440_GPC(2), S3C_GPIO_PULL_UP); | ||
| 46 | break; | ||
| 47 | |||
| 48 | case 1: | ||
| 49 | s3c_gpio_cfgpin(S5P6440_GPC(4), S3C_GPIO_SFN(2)); | ||
| 50 | s3c_gpio_cfgpin(S5P6440_GPC(5), S3C_GPIO_SFN(2)); | ||
| 51 | s3c_gpio_cfgpin(S5P6440_GPC(6), S3C_GPIO_SFN(2)); | ||
| 52 | s3c_gpio_setpull(S5P6440_GPC(4), S3C_GPIO_PULL_UP); | ||
| 53 | s3c_gpio_setpull(S5P6440_GPC(5), S3C_GPIO_PULL_UP); | ||
| 54 | s3c_gpio_setpull(S5P6440_GPC(6), S3C_GPIO_PULL_UP); | ||
| 55 | break; | ||
| 56 | |||
| 57 | default: | ||
| 58 | dev_err(&pdev->dev, "Invalid SPI Controller number!"); | ||
| 59 | return -EINVAL; | ||
| 60 | } | ||
| 61 | |||
| 62 | return 0; | ||
| 63 | } | ||
| 64 | |||
| 65 | static struct resource s5p6440_spi0_resource[] = { | ||
| 66 | [0] = { | ||
| 67 | .start = S5P6440_PA_SPI0, | ||
| 68 | .end = S5P6440_PA_SPI0 + 0x100 - 1, | ||
| 69 | .flags = IORESOURCE_MEM, | ||
| 70 | }, | ||
| 71 | [1] = { | ||
| 72 | .start = DMACH_SPI0_TX, | ||
| 73 | .end = DMACH_SPI0_TX, | ||
| 74 | .flags = IORESOURCE_DMA, | ||
| 75 | }, | ||
| 76 | [2] = { | ||
| 77 | .start = DMACH_SPI0_RX, | ||
| 78 | .end = DMACH_SPI0_RX, | ||
| 79 | .flags = IORESOURCE_DMA, | ||
| 80 | }, | ||
| 81 | [3] = { | ||
| 82 | .start = IRQ_SPI0, | ||
| 83 | .end = IRQ_SPI0, | ||
| 84 | .flags = IORESOURCE_IRQ, | ||
| 85 | }, | ||
| 86 | }; | ||
| 87 | |||
| 88 | static struct s3c64xx_spi_info s5p6440_spi0_pdata = { | ||
| 89 | .cfg_gpio = s5p6440_spi_cfg_gpio, | ||
| 90 | .fifo_lvl_mask = 0x1ff, | ||
| 91 | .rx_lvl_offset = 15, | ||
| 92 | }; | ||
| 93 | |||
| 94 | static u64 spi_dmamask = DMA_BIT_MASK(32); | ||
| 95 | |||
| 96 | struct platform_device s5p6440_device_spi0 = { | ||
| 97 | .name = "s3c64xx-spi", | ||
| 98 | .id = 0, | ||
| 99 | .num_resources = ARRAY_SIZE(s5p6440_spi0_resource), | ||
| 100 | .resource = s5p6440_spi0_resource, | ||
| 101 | .dev = { | ||
| 102 | .dma_mask = &spi_dmamask, | ||
| 103 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
| 104 | .platform_data = &s5p6440_spi0_pdata, | ||
| 105 | }, | ||
| 106 | }; | ||
| 107 | |||
| 108 | static struct resource s5p6440_spi1_resource[] = { | ||
| 109 | [0] = { | ||
| 110 | .start = S5P6440_PA_SPI1, | ||
| 111 | .end = S5P6440_PA_SPI1 + 0x100 - 1, | ||
| 112 | .flags = IORESOURCE_MEM, | ||
| 113 | }, | ||
| 114 | [1] = { | ||
| 115 | .start = DMACH_SPI1_TX, | ||
| 116 | .end = DMACH_SPI1_TX, | ||
| 117 | .flags = IORESOURCE_DMA, | ||
| 118 | }, | ||
| 119 | [2] = { | ||
| 120 | .start = DMACH_SPI1_RX, | ||
| 121 | .end = DMACH_SPI1_RX, | ||
| 122 | .flags = IORESOURCE_DMA, | ||
| 123 | }, | ||
| 124 | [3] = { | ||
| 125 | .start = IRQ_SPI1, | ||
| 126 | .end = IRQ_SPI1, | ||
| 127 | .flags = IORESOURCE_IRQ, | ||
| 128 | }, | ||
| 129 | }; | ||
| 130 | |||
| 131 | static struct s3c64xx_spi_info s5p6440_spi1_pdata = { | ||
| 132 | .cfg_gpio = s5p6440_spi_cfg_gpio, | ||
| 133 | .fifo_lvl_mask = 0x7f, | ||
| 134 | .rx_lvl_offset = 15, | ||
| 135 | }; | ||
| 136 | |||
| 137 | struct platform_device s5p6440_device_spi1 = { | ||
| 138 | .name = "s3c64xx-spi", | ||
| 139 | .id = 1, | ||
| 140 | .num_resources = ARRAY_SIZE(s5p6440_spi1_resource), | ||
| 141 | .resource = s5p6440_spi1_resource, | ||
| 142 | .dev = { | ||
| 143 | .dma_mask = &spi_dmamask, | ||
| 144 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
| 145 | .platform_data = &s5p6440_spi1_pdata, | ||
| 146 | }, | ||
| 147 | }; | ||
| 148 | |||
| 149 | void __init s5p6440_spi_set_info(int cntrlr, int src_clk_nr, int num_cs) | ||
| 150 | { | ||
| 151 | struct s3c64xx_spi_info *pd; | ||
| 152 | |||
| 153 | /* Reject invalid configuration */ | ||
| 154 | if (!num_cs || src_clk_nr < 0 | ||
| 155 | || src_clk_nr > S5P6440_SPI_SRCCLK_SCLK) { | ||
| 156 | printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__); | ||
| 157 | return; | ||
| 158 | } | ||
| 159 | |||
| 160 | switch (cntrlr) { | ||
| 161 | case 0: | ||
| 162 | pd = &s5p6440_spi0_pdata; | ||
| 163 | break; | ||
| 164 | case 1: | ||
| 165 | pd = &s5p6440_spi1_pdata; | ||
| 166 | break; | ||
| 167 | default: | ||
| 168 | printk(KERN_ERR "%s: Invalid SPI controller(%d)\n", | ||
| 169 | __func__, cntrlr); | ||
| 170 | return; | ||
| 171 | } | ||
| 172 | |||
| 173 | pd->num_cs = num_cs; | ||
| 174 | pd->src_clk_nr = src_clk_nr; | ||
| 175 | pd->src_clk_name = spi_src_clks[src_clk_nr]; | ||
| 176 | } | ||
diff --git a/arch/arm/mach-s5p6440/gpio.c b/arch/arm/mach-s5p6440/gpio.c index 262dc75d5bea..92efc05b1ba2 100644 --- a/arch/arm/mach-s5p6440/gpio.c +++ b/arch/arm/mach-s5p6440/gpio.c | |||
| @@ -46,6 +46,7 @@ static int s5p6440_gpiolib_rbank_4bit2_input(struct gpio_chip *chip, | |||
| 46 | void __iomem *base = ourchip->base; | 46 | void __iomem *base = ourchip->base; |
| 47 | void __iomem *regcon = base; | 47 | void __iomem *regcon = base; |
| 48 | unsigned long con; | 48 | unsigned long con; |
| 49 | unsigned long flags; | ||
| 49 | 50 | ||
| 50 | switch (offset) { | 51 | switch (offset) { |
| 51 | case 6: | 52 | case 6: |
| @@ -63,10 +64,14 @@ static int s5p6440_gpiolib_rbank_4bit2_input(struct gpio_chip *chip, | |||
| 63 | break; | 64 | break; |
| 64 | } | 65 | } |
| 65 | 66 | ||
| 67 | s3c_gpio_lock(ourchip, flags); | ||
| 68 | |||
| 66 | con = __raw_readl(regcon); | 69 | con = __raw_readl(regcon); |
| 67 | con &= ~(0xf << con_4bit_shift(offset)); | 70 | con &= ~(0xf << con_4bit_shift(offset)); |
| 68 | __raw_writel(con, regcon); | 71 | __raw_writel(con, regcon); |
| 69 | 72 | ||
| 73 | s3c_gpio_unlock(ourchip, flags); | ||
| 74 | |||
| 70 | return 0; | 75 | return 0; |
| 71 | } | 76 | } |
| 72 | 77 | ||
| @@ -78,6 +83,7 @@ static int s5p6440_gpiolib_rbank_4bit2_output(struct gpio_chip *chip, | |||
| 78 | void __iomem *regcon = base; | 83 | void __iomem *regcon = base; |
| 79 | unsigned long con; | 84 | unsigned long con; |
| 80 | unsigned long dat; | 85 | unsigned long dat; |
| 86 | unsigned long flags; | ||
| 81 | unsigned con_offset = offset; | 87 | unsigned con_offset = offset; |
| 82 | 88 | ||
| 83 | switch (con_offset) { | 89 | switch (con_offset) { |
| @@ -96,6 +102,8 @@ static int s5p6440_gpiolib_rbank_4bit2_output(struct gpio_chip *chip, | |||
| 96 | break; | 102 | break; |
| 97 | } | 103 | } |
| 98 | 104 | ||
| 105 | s3c_gpio_lock(ourchip, flags); | ||
| 106 | |||
| 99 | con = __raw_readl(regcon); | 107 | con = __raw_readl(regcon); |
| 100 | con &= ~(0xf << con_4bit_shift(con_offset)); | 108 | con &= ~(0xf << con_4bit_shift(con_offset)); |
| 101 | con |= 0x1 << con_4bit_shift(con_offset); | 109 | con |= 0x1 << con_4bit_shift(con_offset); |
| @@ -109,6 +117,8 @@ static int s5p6440_gpiolib_rbank_4bit2_output(struct gpio_chip *chip, | |||
| 109 | __raw_writel(con, regcon); | 117 | __raw_writel(con, regcon); |
| 110 | __raw_writel(dat, base + GPIODAT_OFF); | 118 | __raw_writel(dat, base + GPIODAT_OFF); |
| 111 | 119 | ||
| 120 | s3c_gpio_unlock(ourchip, flags); | ||
| 121 | |||
| 112 | return 0; | 122 | return 0; |
| 113 | } | 123 | } |
| 114 | 124 | ||
| @@ -117,6 +127,7 @@ int s5p6440_gpio_setcfg_4bit_rbank(struct s3c_gpio_chip *chip, | |||
| 117 | { | 127 | { |
| 118 | void __iomem *reg = chip->base; | 128 | void __iomem *reg = chip->base; |
| 119 | unsigned int shift; | 129 | unsigned int shift; |
| 130 | unsigned long flags; | ||
| 120 | u32 con; | 131 | u32 con; |
| 121 | 132 | ||
| 122 | switch (off) { | 133 | switch (off) { |
| @@ -142,11 +153,15 @@ int s5p6440_gpio_setcfg_4bit_rbank(struct s3c_gpio_chip *chip, | |||
| 142 | cfg <<= shift; | 153 | cfg <<= shift; |
| 143 | } | 154 | } |
| 144 | 155 | ||
| 156 | s3c_gpio_lock(chip, flags); | ||
| 157 | |||
| 145 | con = __raw_readl(reg); | 158 | con = __raw_readl(reg); |
| 146 | con &= ~(0xf << shift); | 159 | con &= ~(0xf << shift); |
| 147 | con |= cfg; | 160 | con |= cfg; |
| 148 | __raw_writel(con, reg); | 161 | __raw_writel(con, reg); |
| 149 | 162 | ||
| 163 | s3c_gpio_unlock(chip, flags); | ||
| 164 | |||
| 150 | return 0; | 165 | return 0; |
| 151 | } | 166 | } |
| 152 | 167 | ||
diff --git a/arch/arm/mach-s5p6440/include/mach/irqs.h b/arch/arm/mach-s5p6440/include/mach/irqs.h index a4b9b40d18f2..911854d9ad42 100644 --- a/arch/arm/mach-s5p6440/include/mach/irqs.h +++ b/arch/arm/mach-s5p6440/include/mach/irqs.h | |||
| @@ -72,7 +72,14 @@ | |||
| 72 | #define S5P_IRQ_EINT_BASE (S5P_IRQ_VIC1(31) + 6) | 72 | #define S5P_IRQ_EINT_BASE (S5P_IRQ_VIC1(31) + 6) |
| 73 | 73 | ||
| 74 | #define S5P_EINT(x) ((x) + S5P_IRQ_EINT_BASE) | 74 | #define S5P_EINT(x) ((x) + S5P_IRQ_EINT_BASE) |
| 75 | #define IRQ_EINT(x) S5P_EINT(x) | 75 | |
| 76 | #define S5P_EINT_BASE1 (S5P_IRQ_EINT_BASE) | ||
| 77 | /* | ||
| 78 | * S5P6440 has 0-15 external interrupts in group 0. Only these can be used | ||
| 79 | * to wake up from sleep. If request is beyond this range, by mistake, a large | ||
| 80 | * return value for an irq number should be indication of something amiss. | ||
| 81 | */ | ||
| 82 | #define S5P_EINT_BASE2 (0xf0000000) | ||
| 76 | 83 | ||
| 77 | /* | 84 | /* |
| 78 | * Next the external interrupt groups. These are similar to the IRQ_EINT(x) | 85 | * Next the external interrupt groups. These are similar to the IRQ_EINT(x) |
diff --git a/arch/arm/mach-s5p6440/include/mach/map.h b/arch/arm/mach-s5p6440/include/mach/map.h index 72aedadd412c..44011b91fbd1 100644 --- a/arch/arm/mach-s5p6440/include/mach/map.h +++ b/arch/arm/mach-s5p6440/include/mach/map.h | |||
| @@ -54,6 +54,9 @@ | |||
| 54 | 54 | ||
| 55 | #define S5P6440_PA_IIC0 (0xEC104000) | 55 | #define S5P6440_PA_IIC0 (0xEC104000) |
| 56 | 56 | ||
| 57 | #define S5P6440_PA_SPI0 0xEC400000 | ||
| 58 | #define S5P6440_PA_SPI1 0xEC500000 | ||
| 59 | |||
| 57 | #define S5P6440_PA_HSOTG (0xED100000) | 60 | #define S5P6440_PA_HSOTG (0xED100000) |
| 58 | 61 | ||
| 59 | #define S5P6440_PA_HSMMC0 (0xED800000) | 62 | #define S5P6440_PA_HSMMC0 (0xED800000) |
| @@ -69,8 +72,13 @@ | |||
| 69 | /* PCM */ | 72 | /* PCM */ |
| 70 | #define S5P6440_PA_PCM 0xF2100000 | 73 | #define S5P6440_PA_PCM 0xF2100000 |
| 71 | 74 | ||
| 75 | #define S5P6440_PA_ADC (0xF3000000) | ||
| 76 | |||
| 72 | /* compatibiltiy defines. */ | 77 | /* compatibiltiy defines. */ |
| 73 | #define S3C_PA_UART S5P6440_PA_UART | 78 | #define S3C_PA_UART S5P6440_PA_UART |
| 74 | #define S3C_PA_IIC S5P6440_PA_IIC0 | 79 | #define S3C_PA_IIC S5P6440_PA_IIC0 |
| 80 | #define S3C_PA_WDT S5P6440_PA_WDT | ||
| 81 | |||
| 82 | #define SAMSUNG_PA_ADC S5P6440_PA_ADC | ||
| 75 | 83 | ||
| 76 | #endif /* __ASM_ARCH_MAP_H */ | 84 | #endif /* __ASM_ARCH_MAP_H */ |
diff --git a/arch/arm/mach-s5p6440/include/mach/spi-clocks.h b/arch/arm/mach-s5p6440/include/mach/spi-clocks.h new file mode 100644 index 000000000000..5fbca50d1cfb --- /dev/null +++ b/arch/arm/mach-s5p6440/include/mach/spi-clocks.h | |||
| @@ -0,0 +1,17 @@ | |||
| 1 | /* linux/arch/arm/mach-s5p6440/include/mach/spi-clocks.h | ||
| 2 | * | ||
| 3 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
| 4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #ifndef __S5P6440_PLAT_SPI_CLKS_H | ||
| 12 | #define __S5P6440_PLAT_SPI_CLKS_H __FILE__ | ||
| 13 | |||
| 14 | #define S5P6440_SPI_SRCCLK_PCLK 0 | ||
| 15 | #define S5P6440_SPI_SRCCLK_SCLK 1 | ||
| 16 | |||
| 17 | #endif /* __S5P6440_PLAT_SPI_CLKS_H */ | ||
diff --git a/arch/arm/mach-s5p6440/mach-smdk6440.c b/arch/arm/mach-s5p6440/mach-smdk6440.c index d7fede971ca6..8291fecc701a 100644 --- a/arch/arm/mach-s5p6440/mach-smdk6440.c +++ b/arch/arm/mach-s5p6440/mach-smdk6440.c | |||
| @@ -38,6 +38,8 @@ | |||
| 38 | #include <plat/devs.h> | 38 | #include <plat/devs.h> |
| 39 | #include <plat/cpu.h> | 39 | #include <plat/cpu.h> |
| 40 | #include <plat/pll.h> | 40 | #include <plat/pll.h> |
| 41 | #include <plat/adc.h> | ||
| 42 | #include <plat/ts.h> | ||
| 41 | 43 | ||
| 42 | #define S5P6440_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | 44 | #define S5P6440_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
| 43 | S3C2410_UCON_RXILEVEL | \ | 45 | S3C2410_UCON_RXILEVEL | \ |
| @@ -85,6 +87,15 @@ static struct s3c2410_uartcfg smdk6440_uartcfgs[] __initdata = { | |||
| 85 | 87 | ||
| 86 | static struct platform_device *smdk6440_devices[] __initdata = { | 88 | static struct platform_device *smdk6440_devices[] __initdata = { |
| 87 | &s5p6440_device_iis, | 89 | &s5p6440_device_iis, |
| 90 | &s3c_device_adc, | ||
| 91 | &s3c_device_ts, | ||
| 92 | &s3c_device_wdt, | ||
| 93 | }; | ||
| 94 | |||
| 95 | static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = { | ||
| 96 | .delay = 10000, | ||
| 97 | .presc = 49, | ||
| 98 | .oversampling_shift = 2, | ||
| 88 | }; | 99 | }; |
| 89 | 100 | ||
| 90 | static void __init smdk6440_map_io(void) | 101 | static void __init smdk6440_map_io(void) |
| @@ -96,6 +107,8 @@ static void __init smdk6440_map_io(void) | |||
| 96 | 107 | ||
| 97 | static void __init smdk6440_machine_init(void) | 108 | static void __init smdk6440_machine_init(void) |
| 98 | { | 109 | { |
| 110 | s3c24xx_ts_set_platdata(&s3c_ts_platform); | ||
| 111 | |||
| 99 | platform_add_devices(smdk6440_devices, ARRAY_SIZE(smdk6440_devices)); | 112 | platform_add_devices(smdk6440_devices, ARRAY_SIZE(smdk6440_devices)); |
| 100 | } | 113 | } |
| 101 | 114 | ||
diff --git a/arch/arm/mach-s5p6442/Makefile b/arch/arm/mach-s5p6442/Makefile index e30a7f76aee6..90a3d8373416 100644 --- a/arch/arm/mach-s5p6442/Makefile +++ b/arch/arm/mach-s5p6442/Makefile | |||
| @@ -21,3 +21,4 @@ obj-$(CONFIG_MACH_SMDK6442) += mach-smdk6442.o | |||
| 21 | 21 | ||
| 22 | # device support | 22 | # device support |
| 23 | obj-y += dev-audio.o | 23 | obj-y += dev-audio.o |
| 24 | obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o | ||
diff --git a/arch/arm/mach-s5p6442/dev-spi.c b/arch/arm/mach-s5p6442/dev-spi.c new file mode 100644 index 000000000000..30199525daca --- /dev/null +++ b/arch/arm/mach-s5p6442/dev-spi.c | |||
| @@ -0,0 +1,123 @@ | |||
| 1 | /* linux/arch/arm/mach-s5p6442/dev-spi.c | ||
| 2 | * | ||
| 3 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
| 4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #include <linux/platform_device.h> | ||
| 12 | #include <linux/dma-mapping.h> | ||
| 13 | |||
| 14 | #include <mach/dma.h> | ||
| 15 | #include <mach/map.h> | ||
| 16 | #include <mach/irqs.h> | ||
| 17 | #include <mach/gpio.h> | ||
| 18 | #include <mach/spi-clocks.h> | ||
| 19 | |||
| 20 | #include <plat/s3c64xx-spi.h> | ||
| 21 | #include <plat/gpio-cfg.h> | ||
| 22 | |||
| 23 | static char *spi_src_clks[] = { | ||
| 24 | [S5P6442_SPI_SRCCLK_PCLK] = "pclk", | ||
| 25 | [S5P6442_SPI_SRCCLK_SCLK] = "spi_epll", | ||
| 26 | }; | ||
| 27 | |||
| 28 | /* SPI Controller platform_devices */ | ||
| 29 | |||
| 30 | /* Since we emulate multi-cs capability, we do not touch the CS. | ||
| 31 | * The emulated CS is toggled by board specific mechanism, as it can | ||
| 32 | * be either some immediate GPIO or some signal out of some other | ||
| 33 | * chip in between ... or some yet another way. | ||
| 34 | * We simply do not assume anything about CS. | ||
| 35 | */ | ||
| 36 | static int s5p6442_spi_cfg_gpio(struct platform_device *pdev) | ||
| 37 | { | ||
| 38 | switch (pdev->id) { | ||
| 39 | case 0: | ||
| 40 | s3c_gpio_cfgpin(S5P6442_GPB(0), S3C_GPIO_SFN(2)); | ||
| 41 | s3c_gpio_cfgpin(S5P6442_GPB(2), S3C_GPIO_SFN(2)); | ||
| 42 | s3c_gpio_cfgpin(S5P6442_GPB(3), S3C_GPIO_SFN(2)); | ||
| 43 | s3c_gpio_setpull(S5P6442_GPB(0), S3C_GPIO_PULL_UP); | ||
| 44 | s3c_gpio_setpull(S5P6442_GPB(2), S3C_GPIO_PULL_UP); | ||
| 45 | s3c_gpio_setpull(S5P6442_GPB(3), S3C_GPIO_PULL_UP); | ||
| 46 | break; | ||
| 47 | |||
| 48 | default: | ||
| 49 | dev_err(&pdev->dev, "Invalid SPI Controller number!"); | ||
| 50 | return -EINVAL; | ||
| 51 | } | ||
| 52 | |||
| 53 | return 0; | ||
| 54 | } | ||
| 55 | |||
| 56 | static struct resource s5p6442_spi0_resource[] = { | ||
| 57 | [0] = { | ||
| 58 | .start = S5P6442_PA_SPI, | ||
| 59 | .end = S5P6442_PA_SPI + 0x100 - 1, | ||
| 60 | .flags = IORESOURCE_MEM, | ||
| 61 | }, | ||
| 62 | [1] = { | ||
| 63 | .start = DMACH_SPI0_TX, | ||
| 64 | .end = DMACH_SPI0_TX, | ||
| 65 | .flags = IORESOURCE_DMA, | ||
| 66 | }, | ||
| 67 | [2] = { | ||
| 68 | .start = DMACH_SPI0_RX, | ||
| 69 | .end = DMACH_SPI0_RX, | ||
| 70 | .flags = IORESOURCE_DMA, | ||
| 71 | }, | ||
| 72 | [3] = { | ||
| 73 | .start = IRQ_SPI0, | ||
| 74 | .end = IRQ_SPI0, | ||
| 75 | .flags = IORESOURCE_IRQ, | ||
| 76 | }, | ||
| 77 | }; | ||
| 78 | |||
| 79 | static struct s3c64xx_spi_info s5p6442_spi0_pdata = { | ||
| 80 | .cfg_gpio = s5p6442_spi_cfg_gpio, | ||
| 81 | .fifo_lvl_mask = 0x1ff, | ||
| 82 | .rx_lvl_offset = 15, | ||
| 83 | }; | ||
| 84 | |||
| 85 | static u64 spi_dmamask = DMA_BIT_MASK(32); | ||
| 86 | |||
| 87 | struct platform_device s5p6442_device_spi = { | ||
| 88 | .name = "s3c64xx-spi", | ||
| 89 | .id = 0, | ||
| 90 | .num_resources = ARRAY_SIZE(s5p6442_spi0_resource), | ||
| 91 | .resource = s5p6442_spi0_resource, | ||
| 92 | .dev = { | ||
| 93 | .dma_mask = &spi_dmamask, | ||
| 94 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
| 95 | .platform_data = &s5p6442_spi0_pdata, | ||
| 96 | }, | ||
| 97 | }; | ||
| 98 | |||
| 99 | void __init s5p6442_spi_set_info(int cntrlr, int src_clk_nr, int num_cs) | ||
| 100 | { | ||
| 101 | struct s3c64xx_spi_info *pd; | ||
| 102 | |||
| 103 | /* Reject invalid configuration */ | ||
| 104 | if (!num_cs || src_clk_nr < 0 | ||
| 105 | || src_clk_nr > S5P6442_SPI_SRCCLK_SCLK) { | ||
| 106 | printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__); | ||
| 107 | return; | ||
| 108 | } | ||
| 109 | |||
| 110 | switch (cntrlr) { | ||
| 111 | case 0: | ||
| 112 | pd = &s5p6442_spi0_pdata; | ||
| 113 | break; | ||
| 114 | default: | ||
| 115 | printk(KERN_ERR "%s: Invalid SPI controller(%d)\n", | ||
| 116 | __func__, cntrlr); | ||
| 117 | return; | ||
| 118 | } | ||
| 119 | |||
| 120 | pd->num_cs = num_cs; | ||
| 121 | pd->src_clk_nr = src_clk_nr; | ||
| 122 | pd->src_clk_name = spi_src_clks[src_clk_nr]; | ||
| 123 | } | ||
diff --git a/arch/arm/mach-s5p6442/include/mach/irqs.h b/arch/arm/mach-s5p6442/include/mach/irqs.h index da665809f6e4..02c23749c023 100644 --- a/arch/arm/mach-s5p6442/include/mach/irqs.h +++ b/arch/arm/mach-s5p6442/include/mach/irqs.h | |||
| @@ -77,8 +77,9 @@ | |||
| 77 | 77 | ||
| 78 | #define S5P_IRQ_EINT_BASE (IRQ_VIC_END + 1) | 78 | #define S5P_IRQ_EINT_BASE (IRQ_VIC_END + 1) |
| 79 | 79 | ||
| 80 | #define IRQ_EINT(x) ((x) < 16 ? S5P_IRQ_VIC0(x) : \ | 80 | #define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0)) |
| 81 | (S5P_IRQ_EINT_BASE + (x)-16)) | 81 | #define S5P_EINT_BASE2 (S5P_IRQ_EINT_BASE) |
| 82 | |||
| 82 | /* Set the default NR_IRQS */ | 83 | /* Set the default NR_IRQS */ |
| 83 | 84 | ||
| 84 | #define NR_IRQS (IRQ_EINT(31) + 1) | 85 | #define NR_IRQS (IRQ_EINT(31) + 1) |
diff --git a/arch/arm/mach-s5p6442/include/mach/map.h b/arch/arm/mach-s5p6442/include/mach/map.h index 7568dc0d6be0..32ca424ef7f9 100644 --- a/arch/arm/mach-s5p6442/include/mach/map.h +++ b/arch/arm/mach-s5p6442/include/mach/map.h | |||
| @@ -54,6 +54,8 @@ | |||
| 54 | #define S5P6442_PA_SDRAM (0x20000000) | 54 | #define S5P6442_PA_SDRAM (0x20000000) |
| 55 | #define S5P_PA_SDRAM S5P6442_PA_SDRAM | 55 | #define S5P_PA_SDRAM S5P6442_PA_SDRAM |
| 56 | 56 | ||
| 57 | #define S5P6442_PA_SPI 0xEC300000 | ||
| 58 | |||
| 57 | /* I2S */ | 59 | /* I2S */ |
| 58 | #define S5P6442_PA_I2S0 0xC0B00000 | 60 | #define S5P6442_PA_I2S0 0xC0B00000 |
| 59 | #define S5P6442_PA_I2S1 0xF2200000 | 61 | #define S5P6442_PA_I2S1 0xF2200000 |
diff --git a/arch/arm/mach-s5p6442/include/mach/spi-clocks.h b/arch/arm/mach-s5p6442/include/mach/spi-clocks.h new file mode 100644 index 000000000000..7fd88205a97c --- /dev/null +++ b/arch/arm/mach-s5p6442/include/mach/spi-clocks.h | |||
| @@ -0,0 +1,17 @@ | |||
| 1 | /* linux/arch/arm/mach-s5p6442/include/mach/spi-clocks.h | ||
| 2 | * | ||
| 3 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
| 4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #ifndef __S5P6442_PLAT_SPI_CLKS_H | ||
| 12 | #define __S5P6442_PLAT_SPI_CLKS_H __FILE__ | ||
| 13 | |||
| 14 | #define S5P6442_SPI_SRCCLK_PCLK 0 | ||
| 15 | #define S5P6442_SPI_SRCCLK_SCLK 1 | ||
| 16 | |||
| 17 | #endif /* __S5P6442_PLAT_SPI_CLKS_H */ | ||
diff --git a/arch/arm/mach-s5pc100/Kconfig b/arch/arm/mach-s5pc100/Kconfig index 8593337784e1..b2a11dfa3399 100644 --- a/arch/arm/mach-s5pc100/Kconfig +++ b/arch/arm/mach-s5pc100/Kconfig | |||
| @@ -5,10 +5,13 @@ | |||
| 5 | 5 | ||
| 6 | # Configuration options for the S5PC100 CPU | 6 | # Configuration options for the S5PC100 CPU |
| 7 | 7 | ||
| 8 | if ARCH_S5PC100 | ||
| 9 | |||
| 8 | config CPU_S5PC100 | 10 | config CPU_S5PC100 |
| 9 | bool | 11 | bool |
| 10 | select CPU_S5PC100_INIT | 12 | select PLAT_S5P |
| 11 | select CPU_S5PC100_CLOCK | 13 | select S5P_EXT_INT |
| 14 | select S3C_PL330_DMA | ||
| 12 | help | 15 | help |
| 13 | Enable S5PC100 CPU support | 16 | Enable S5PC100 CPU support |
| 14 | 17 | ||
| @@ -17,17 +20,22 @@ config S5PC100_SETUP_FB_24BPP | |||
| 17 | help | 20 | help |
| 18 | Common setup code for S5PC1XX with an 24bpp RGB display helper. | 21 | Common setup code for S5PC1XX with an 24bpp RGB display helper. |
| 19 | 22 | ||
| 20 | config S5PC100_SETUP_SDHCI | ||
| 21 | bool | ||
| 22 | select S5PC1XX_SETUP_SDHCI_GPIO | ||
| 23 | help | ||
| 24 | Internal helper functions for S5PC100 based SDHCI systems | ||
| 25 | |||
| 26 | config S5PC100_SETUP_I2C1 | 23 | config S5PC100_SETUP_I2C1 |
| 27 | bool | 24 | bool |
| 28 | help | 25 | help |
| 29 | Common setup code for i2c bus 1. | 26 | Common setup code for i2c bus 1. |
| 30 | 27 | ||
| 28 | config S5PC100_SETUP_SDHCI | ||
| 29 | bool | ||
| 30 | select S5PC100_SETUP_SDHCI_GPIO | ||
| 31 | help | ||
| 32 | Internal helper functions for S5PC100 based SDHCI systems | ||
| 33 | |||
| 34 | config S5PC100_SETUP_SDHCI_GPIO | ||
| 35 | bool | ||
| 36 | help | ||
| 37 | Common setup code for SDHCI gpio. | ||
| 38 | |||
| 31 | config MACH_SMDKC100 | 39 | config MACH_SMDKC100 |
| 32 | bool "SMDKC100" | 40 | bool "SMDKC100" |
| 33 | select CPU_S5PC100 | 41 | select CPU_S5PC100 |
| @@ -41,3 +49,5 @@ config MACH_SMDKC100 | |||
| 41 | select S5PC100_SETUP_SDHCI | 49 | select S5PC100_SETUP_SDHCI |
| 42 | help | 50 | help |
| 43 | Machine support for the Samsung SMDKC100 | 51 | Machine support for the Samsung SMDKC100 |
| 52 | |||
| 53 | endif | ||
diff --git a/arch/arm/mach-s5pc100/Makefile b/arch/arm/mach-s5pc100/Makefile index 373bc546eae8..543f3de5131e 100644 --- a/arch/arm/mach-s5pc100/Makefile +++ b/arch/arm/mach-s5pc100/Makefile | |||
| @@ -11,14 +11,24 @@ obj- := | |||
| 11 | 11 | ||
| 12 | # Core support for S5PC100 system | 12 | # Core support for S5PC100 system |
| 13 | 13 | ||
| 14 | obj-$(CONFIG_CPU_S5PC100) += cpu.o gpiolib.o | 14 | obj-$(CONFIG_CPU_S5PC100) += cpu.o init.o clock.o gpiolib.o irq-gpio.o |
| 15 | obj-$(CONFIG_CPU_S5PC100) += setup-i2c0.o | 15 | obj-$(CONFIG_CPU_S5PC100) += setup-i2c0.o |
| 16 | obj-$(CONFIG_CPU_S5PC100) += dma.o | ||
| 16 | 17 | ||
| 17 | # Helper and device support | 18 | # Helper and device support |
| 18 | 19 | ||
| 19 | obj-$(CONFIG_S5PC100_SETUP_FB_24BPP) += setup-fb-24bpp.o | 20 | obj-$(CONFIG_S5PC100_SETUP_FB_24BPP) += setup-fb-24bpp.o |
| 20 | obj-$(CONFIG_S5PC100_SETUP_I2C1) += setup-i2c1.o | 21 | obj-$(CONFIG_S5PC100_SETUP_I2C1) += setup-i2c1.o |
| 21 | obj-$(CONFIG_S5PC100_SETUP_SDHCI) += setup-sdhci.o | 22 | obj-$(CONFIG_S5PC100_SETUP_SDHCI) += setup-sdhci.o |
| 23 | obj-$(CONFIG_S5PC100_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o | ||
| 24 | |||
| 25 | # device support | ||
| 26 | obj-y += dev-audio.o | ||
| 27 | obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o | ||
| 22 | 28 | ||
| 23 | # machine support | 29 | # machine support |
| 30 | |||
| 24 | obj-$(CONFIG_MACH_SMDKC100) += mach-smdkc100.o | 31 | obj-$(CONFIG_MACH_SMDKC100) += mach-smdkc100.o |
| 32 | |||
| 33 | # device support | ||
| 34 | obj-y += dev-audio.o | ||
diff --git a/arch/arm/mach-s5pc100/cpu.c b/arch/arm/mach-s5pc100/cpu.c index d79e7574a852..7b5bdbc9a5df 100644 --- a/arch/arm/mach-s5pc100/cpu.c +++ b/arch/arm/mach-s5pc100/cpu.c | |||
| @@ -22,47 +22,55 @@ | |||
| 22 | #include <linux/serial_core.h> | 22 | #include <linux/serial_core.h> |
| 23 | #include <linux/platform_device.h> | 23 | #include <linux/platform_device.h> |
| 24 | 24 | ||
| 25 | #include <asm/proc-fns.h> | ||
| 26 | |||
| 27 | #include <asm/mach/arch.h> | 25 | #include <asm/mach/arch.h> |
| 28 | #include <asm/mach/map.h> | 26 | #include <asm/mach/map.h> |
| 29 | #include <asm/mach/irq.h> | 27 | #include <asm/mach/irq.h> |
| 30 | 28 | ||
| 29 | #include <asm/proc-fns.h> | ||
| 30 | |||
| 31 | #include <mach/hardware.h> | 31 | #include <mach/hardware.h> |
| 32 | #include <mach/map.h> | 32 | #include <mach/map.h> |
| 33 | #include <asm/irq.h> | 33 | #include <asm/irq.h> |
| 34 | 34 | ||
| 35 | #include <plat/cpu-freq.h> | ||
| 36 | #include <plat/regs-serial.h> | 35 | #include <plat/regs-serial.h> |
| 37 | #include <plat/regs-power.h> | 36 | #include <mach/regs-clock.h> |
| 38 | 37 | ||
| 39 | #include <plat/cpu.h> | 38 | #include <plat/cpu.h> |
| 40 | #include <plat/devs.h> | 39 | #include <plat/devs.h> |
| 41 | #include <plat/clock.h> | 40 | #include <plat/clock.h> |
| 42 | #include <plat/sdhci.h> | ||
| 43 | #include <plat/iic-core.h> | 41 | #include <plat/iic-core.h> |
| 42 | #include <plat/sdhci.h> | ||
| 43 | #include <plat/onenand-core.h> | ||
| 44 | |||
| 44 | #include <plat/s5pc100.h> | 45 | #include <plat/s5pc100.h> |
| 45 | 46 | ||
| 46 | /* Initial IO mappings */ | 47 | /* Initial IO mappings */ |
| 47 | 48 | ||
| 48 | static struct map_desc s5pc100_iodesc[] __initdata = { | 49 | static struct map_desc s5pc100_iodesc[] __initdata = { |
| 50 | { | ||
| 51 | .virtual = (unsigned long)S5P_VA_SYSTIMER, | ||
| 52 | .pfn = __phys_to_pfn(S5PC100_PA_SYSTIMER), | ||
| 53 | .length = SZ_16K, | ||
| 54 | .type = MT_DEVICE, | ||
| 55 | }, { | ||
| 56 | .virtual = (unsigned long)VA_VIC2, | ||
| 57 | .pfn = __phys_to_pfn(S5P_PA_VIC2), | ||
| 58 | .length = SZ_16K, | ||
| 59 | .type = MT_DEVICE, | ||
| 60 | }, { | ||
| 61 | .virtual = (unsigned long)S5PC100_VA_OTHERS, | ||
| 62 | .pfn = __phys_to_pfn(S5PC100_PA_OTHERS), | ||
| 63 | .length = SZ_4K, | ||
| 64 | .type = MT_DEVICE, | ||
| 65 | } | ||
| 49 | }; | 66 | }; |
| 50 | 67 | ||
| 51 | static void s5pc100_idle(void) | 68 | static void s5pc100_idle(void) |
| 52 | { | 69 | { |
| 53 | unsigned long tmp; | 70 | if (!need_resched()) |
| 54 | 71 | cpu_do_idle(); | |
| 55 | tmp = __raw_readl(S5PC100_PWR_CFG); | ||
| 56 | tmp &= ~S5PC100_PWRCFG_CFG_DEEP_IDLE; | ||
| 57 | tmp &= ~S5PC100_PWRCFG_CFG_WFI_MASK; | ||
| 58 | tmp |= S5PC100_PWRCFG_CFG_WFI_DEEP_IDLE; | ||
| 59 | __raw_writel(tmp, S5PC100_PWR_CFG); | ||
| 60 | |||
| 61 | tmp = __raw_readl(S5PC100_OTHERS); | ||
| 62 | tmp |= S5PC100_PMU_INT_DISABLE; | ||
| 63 | __raw_writel(tmp, S5PC100_OTHERS); | ||
| 64 | 72 | ||
| 65 | cpu_do_idle(); | 73 | local_irq_enable(); |
| 66 | } | 74 | } |
| 67 | 75 | ||
| 68 | /* s5pc100_map_io | 76 | /* s5pc100_map_io |
| @@ -82,26 +90,29 @@ void __init s5pc100_map_io(void) | |||
| 82 | /* the i2c devices are directly compatible with s3c2440 */ | 90 | /* the i2c devices are directly compatible with s3c2440 */ |
| 83 | s3c_i2c0_setname("s3c2440-i2c"); | 91 | s3c_i2c0_setname("s3c2440-i2c"); |
| 84 | s3c_i2c1_setname("s3c2440-i2c"); | 92 | s3c_i2c1_setname("s3c2440-i2c"); |
| 93 | |||
| 94 | s3c_onenand_setname("s5pc100-onenand"); | ||
| 85 | } | 95 | } |
| 86 | 96 | ||
| 87 | void __init s5pc100_init_clocks(int xtal) | 97 | void __init s5pc100_init_clocks(int xtal) |
| 88 | { | 98 | { |
| 89 | printk(KERN_DEBUG "%s: initialising clocks\n", __func__); | 99 | printk(KERN_DEBUG "%s: initializing clocks\n", __func__); |
| 100 | |||
| 90 | s3c24xx_register_baseclocks(xtal); | 101 | s3c24xx_register_baseclocks(xtal); |
| 91 | s5pc1xx_register_clocks(); | 102 | s5p_register_clocks(xtal); |
| 92 | s5pc100_register_clocks(); | 103 | s5pc100_register_clocks(); |
| 93 | s5pc100_setup_clocks(); | 104 | s5pc100_setup_clocks(); |
| 94 | } | 105 | } |
| 95 | 106 | ||
| 96 | void __init s5pc100_init_irq(void) | 107 | void __init s5pc100_init_irq(void) |
| 97 | { | 108 | { |
| 98 | u32 vic_valid[] = {~0, ~0, ~0}; | 109 | u32 vic[] = {~0, ~0, ~0}; |
| 99 | 110 | ||
| 100 | /* VIC0, VIC1, and VIC2 are fully populated. */ | 111 | /* VIC0, VIC1, and VIC2 are fully populated. */ |
| 101 | s5pc1xx_init_irq(vic_valid, ARRAY_SIZE(vic_valid)); | 112 | s5p_init_irq(vic, ARRAY_SIZE(vic)); |
| 102 | } | 113 | } |
| 103 | 114 | ||
| 104 | struct sysdev_class s5pc100_sysclass = { | 115 | static struct sysdev_class s5pc100_sysclass = { |
| 105 | .name = "s5pc100-core", | 116 | .name = "s5pc100-core", |
| 106 | }; | 117 | }; |
| 107 | 118 | ||
| @@ -118,9 +129,10 @@ core_initcall(s5pc100_core_init); | |||
| 118 | 129 | ||
| 119 | int __init s5pc100_init(void) | 130 | int __init s5pc100_init(void) |
| 120 | { | 131 | { |
| 121 | printk(KERN_DEBUG "S5PC100: Initialising architecture\n"); | 132 | printk(KERN_INFO "S5PC100: Initializing architecture\n"); |
| 122 | 133 | ||
| 123 | s5pc1xx_idle = s5pc100_idle; | 134 | /* set idle function */ |
| 135 | pm_idle = s5pc100_idle; | ||
| 124 | 136 | ||
| 125 | return sysdev_register(&s5pc100_sysdev); | 137 | return sysdev_register(&s5pc100_sysdev); |
| 126 | } | 138 | } |
diff --git a/arch/arm/mach-s5pc100/dev-audio.c b/arch/arm/mach-s5pc100/dev-audio.c new file mode 100644 index 000000000000..18cfe9ae1936 --- /dev/null +++ b/arch/arm/mach-s5pc100/dev-audio.c | |||
| @@ -0,0 +1,287 @@ | |||
| 1 | /* linux/arch/arm/mach-s5pc100/dev-audio.c | ||
| 2 | * | ||
| 3 | * Copyright (c) 2010 Samsung Electronics Co. Ltd | ||
| 4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #include <linux/platform_device.h> | ||
| 12 | #include <linux/dma-mapping.h> | ||
| 13 | |||
| 14 | #include <plat/gpio-cfg.h> | ||
| 15 | #include <plat/audio.h> | ||
| 16 | |||
| 17 | #include <mach/gpio.h> | ||
| 18 | #include <mach/map.h> | ||
| 19 | #include <mach/dma.h> | ||
| 20 | #include <mach/irqs.h> | ||
| 21 | |||
| 22 | static int s5pc100_cfg_i2s(struct platform_device *pdev) | ||
| 23 | { | ||
| 24 | /* configure GPIO for i2s port */ | ||
| 25 | switch (pdev->id) { | ||
| 26 | case 1: | ||
| 27 | s3c_gpio_cfgpin(S5PC100_GPC(0), S3C_GPIO_SFN(2)); | ||
| 28 | s3c_gpio_cfgpin(S5PC100_GPC(1), S3C_GPIO_SFN(2)); | ||
| 29 | s3c_gpio_cfgpin(S5PC100_GPC(2), S3C_GPIO_SFN(2)); | ||
| 30 | s3c_gpio_cfgpin(S5PC100_GPC(3), S3C_GPIO_SFN(2)); | ||
| 31 | s3c_gpio_cfgpin(S5PC100_GPC(4), S3C_GPIO_SFN(2)); | ||
| 32 | break; | ||
| 33 | |||
| 34 | case 2: | ||
| 35 | s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(4)); | ||
| 36 | s3c_gpio_cfgpin(S5PC100_GPG3(1), S3C_GPIO_SFN(4)); | ||
| 37 | s3c_gpio_cfgpin(S5PC100_GPG3(2), S3C_GPIO_SFN(4)); | ||
| 38 | s3c_gpio_cfgpin(S5PC100_GPG3(3), S3C_GPIO_SFN(4)); | ||
| 39 | s3c_gpio_cfgpin(S5PC100_GPG3(4), S3C_GPIO_SFN(4)); | ||
| 40 | break; | ||
| 41 | |||
| 42 | case -1: /* Dedicated pins */ | ||
| 43 | break; | ||
| 44 | |||
| 45 | default: | ||
| 46 | printk(KERN_ERR "Invalid Device %d\n", pdev->id); | ||
| 47 | return -EINVAL; | ||
| 48 | } | ||
| 49 | |||
| 50 | return 0; | ||
| 51 | } | ||
| 52 | |||
| 53 | static struct s3c_audio_pdata s3c_i2s_pdata = { | ||
| 54 | .cfg_gpio = s5pc100_cfg_i2s, | ||
| 55 | }; | ||
| 56 | |||
| 57 | static struct resource s5pc100_iis0_resource[] = { | ||
| 58 | [0] = { | ||
| 59 | .start = S5PC100_PA_I2S0, | ||
| 60 | .end = S5PC100_PA_I2S0 + 0x100 - 1, | ||
| 61 | .flags = IORESOURCE_MEM, | ||
| 62 | }, | ||
| 63 | [1] = { | ||
| 64 | .start = DMACH_I2S0_TX, | ||
| 65 | .end = DMACH_I2S0_TX, | ||
| 66 | .flags = IORESOURCE_DMA, | ||
| 67 | }, | ||
| 68 | [2] = { | ||
| 69 | .start = DMACH_I2S0_RX, | ||
| 70 | .end = DMACH_I2S0_RX, | ||
| 71 | .flags = IORESOURCE_DMA, | ||
| 72 | }, | ||
| 73 | }; | ||
| 74 | |||
| 75 | struct platform_device s5pc100_device_iis0 = { | ||
| 76 | .name = "s3c64xx-iis-v4", | ||
| 77 | .id = -1, | ||
| 78 | .num_resources = ARRAY_SIZE(s5pc100_iis0_resource), | ||
| 79 | .resource = s5pc100_iis0_resource, | ||
| 80 | .dev = { | ||
| 81 | .platform_data = &s3c_i2s_pdata, | ||
| 82 | }, | ||
| 83 | }; | ||
| 84 | |||
| 85 | static struct resource s5pc100_iis1_resource[] = { | ||
| 86 | [0] = { | ||
| 87 | .start = S5PC100_PA_I2S1, | ||
| 88 | .end = S5PC100_PA_I2S1 + 0x100 - 1, | ||
| 89 | .flags = IORESOURCE_MEM, | ||
| 90 | }, | ||
| 91 | [1] = { | ||
| 92 | .start = DMACH_I2S1_TX, | ||
| 93 | .end = DMACH_I2S1_TX, | ||
| 94 | .flags = IORESOURCE_DMA, | ||
| 95 | }, | ||
| 96 | [2] = { | ||
| 97 | .start = DMACH_I2S1_RX, | ||
| 98 | .end = DMACH_I2S1_RX, | ||
| 99 | .flags = IORESOURCE_DMA, | ||
| 100 | }, | ||
| 101 | }; | ||
| 102 | |||
| 103 | struct platform_device s5pc100_device_iis1 = { | ||
| 104 | .name = "s3c64xx-iis", | ||
| 105 | .id = 1, | ||
| 106 | .num_resources = ARRAY_SIZE(s5pc100_iis1_resource), | ||
| 107 | .resource = s5pc100_iis1_resource, | ||
| 108 | .dev = { | ||
| 109 | .platform_data = &s3c_i2s_pdata, | ||
| 110 | }, | ||
| 111 | }; | ||
| 112 | |||
| 113 | static struct resource s5pc100_iis2_resource[] = { | ||
| 114 | [0] = { | ||
| 115 | .start = S5PC100_PA_I2S2, | ||
| 116 | .end = S5PC100_PA_I2S2 + 0x100 - 1, | ||
| 117 | .flags = IORESOURCE_MEM, | ||
| 118 | }, | ||
| 119 | [1] = { | ||
| 120 | .start = DMACH_I2S2_TX, | ||
| 121 | .end = DMACH_I2S2_TX, | ||
| 122 | .flags = IORESOURCE_DMA, | ||
| 123 | }, | ||
| 124 | [2] = { | ||
| 125 | .start = DMACH_I2S2_RX, | ||
| 126 | .end = DMACH_I2S2_RX, | ||
| 127 | .flags = IORESOURCE_DMA, | ||
| 128 | }, | ||
| 129 | }; | ||
| 130 | |||
| 131 | struct platform_device s5pc100_device_iis2 = { | ||
| 132 | .name = "s3c64xx-iis", | ||
| 133 | .id = 2, | ||
| 134 | .num_resources = ARRAY_SIZE(s5pc100_iis2_resource), | ||
| 135 | .resource = s5pc100_iis2_resource, | ||
| 136 | .dev = { | ||
| 137 | .platform_data = &s3c_i2s_pdata, | ||
| 138 | }, | ||
| 139 | }; | ||
| 140 | |||
| 141 | /* PCM Controller platform_devices */ | ||
| 142 | |||
| 143 | static int s5pc100_pcm_cfg_gpio(struct platform_device *pdev) | ||
| 144 | { | ||
| 145 | switch (pdev->id) { | ||
| 146 | case 0: | ||
| 147 | s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(5)); | ||
| 148 | s3c_gpio_cfgpin(S5PC100_GPG3(1), S3C_GPIO_SFN(5)); | ||
| 149 | s3c_gpio_cfgpin(S5PC100_GPG3(2), S3C_GPIO_SFN(5)); | ||
| 150 | s3c_gpio_cfgpin(S5PC100_GPG3(3), S3C_GPIO_SFN(5)); | ||
| 151 | s3c_gpio_cfgpin(S5PC100_GPG3(4), S3C_GPIO_SFN(5)); | ||
| 152 | break; | ||
| 153 | |||
| 154 | case 1: | ||
| 155 | s3c_gpio_cfgpin(S5PC100_GPC(0), S3C_GPIO_SFN(3)); | ||
| 156 | s3c_gpio_cfgpin(S5PC100_GPC(1), S3C_GPIO_SFN(3)); | ||
| 157 | s3c_gpio_cfgpin(S5PC100_GPC(2), S3C_GPIO_SFN(3)); | ||
| 158 | s3c_gpio_cfgpin(S5PC100_GPC(3), S3C_GPIO_SFN(3)); | ||
| 159 | s3c_gpio_cfgpin(S5PC100_GPC(4), S3C_GPIO_SFN(3)); | ||
| 160 | break; | ||
| 161 | |||
| 162 | default: | ||
| 163 | printk(KERN_DEBUG "Invalid PCM Controller number!"); | ||
| 164 | return -EINVAL; | ||
| 165 | } | ||
| 166 | |||
| 167 | return 0; | ||
| 168 | } | ||
| 169 | |||
| 170 | static struct s3c_audio_pdata s3c_pcm_pdata = { | ||
| 171 | .cfg_gpio = s5pc100_pcm_cfg_gpio, | ||
| 172 | }; | ||
| 173 | |||
| 174 | static struct resource s5pc100_pcm0_resource[] = { | ||
| 175 | [0] = { | ||
| 176 | .start = S5PC100_PA_PCM0, | ||
| 177 | .end = S5PC100_PA_PCM0 + 0x100 - 1, | ||
| 178 | .flags = IORESOURCE_MEM, | ||
| 179 | }, | ||
| 180 | [1] = { | ||
| 181 | .start = DMACH_PCM0_TX, | ||
| 182 | .end = DMACH_PCM0_TX, | ||
| 183 | .flags = IORESOURCE_DMA, | ||
| 184 | }, | ||
| 185 | [2] = { | ||
| 186 | .start = DMACH_PCM0_RX, | ||
| 187 | .end = DMACH_PCM0_RX, | ||
| 188 | .flags = IORESOURCE_DMA, | ||
| 189 | }, | ||
| 190 | }; | ||
| 191 | |||
| 192 | struct platform_device s5pc100_device_pcm0 = { | ||
| 193 | .name = "samsung-pcm", | ||
| 194 | .id = 0, | ||
| 195 | .num_resources = ARRAY_SIZE(s5pc100_pcm0_resource), | ||
| 196 | .resource = s5pc100_pcm0_resource, | ||
| 197 | .dev = { | ||
| 198 | .platform_data = &s3c_pcm_pdata, | ||
| 199 | }, | ||
| 200 | }; | ||
| 201 | |||
| 202 | static struct resource s5pc100_pcm1_resource[] = { | ||
| 203 | [0] = { | ||
| 204 | .start = S5PC100_PA_PCM1, | ||
| 205 | .end = S5PC100_PA_PCM1 + 0x100 - 1, | ||
| 206 | .flags = IORESOURCE_MEM, | ||
| 207 | }, | ||
| 208 | [1] = { | ||
| 209 | .start = DMACH_PCM1_TX, | ||
| 210 | .end = DMACH_PCM1_TX, | ||
| 211 | .flags = IORESOURCE_DMA, | ||
| 212 | }, | ||
| 213 | [2] = { | ||
| 214 | .start = DMACH_PCM1_RX, | ||
| 215 | .end = DMACH_PCM1_RX, | ||
| 216 | .flags = IORESOURCE_DMA, | ||
| 217 | }, | ||
| 218 | }; | ||
| 219 | |||
| 220 | struct platform_device s5pc100_device_pcm1 = { | ||
| 221 | .name = "samsung-pcm", | ||
| 222 | .id = 1, | ||
| 223 | .num_resources = ARRAY_SIZE(s5pc100_pcm1_resource), | ||
| 224 | .resource = s5pc100_pcm1_resource, | ||
| 225 | .dev = { | ||
| 226 | .platform_data = &s3c_pcm_pdata, | ||
| 227 | }, | ||
| 228 | }; | ||
| 229 | |||
| 230 | /* AC97 Controller platform devices */ | ||
| 231 | |||
| 232 | static int s5pc100_ac97_cfg_gpio(struct platform_device *pdev) | ||
| 233 | { | ||
| 234 | s3c_gpio_cfgpin(S5PC100_GPC(0), S3C_GPIO_SFN(4)); | ||
| 235 | s3c_gpio_cfgpin(S5PC100_GPC(1), S3C_GPIO_SFN(4)); | ||
| 236 | s3c_gpio_cfgpin(S5PC100_GPC(2), S3C_GPIO_SFN(4)); | ||
| 237 | s3c_gpio_cfgpin(S5PC100_GPC(3), S3C_GPIO_SFN(4)); | ||
| 238 | s3c_gpio_cfgpin(S5PC100_GPC(4), S3C_GPIO_SFN(4)); | ||
| 239 | |||
| 240 | return 0; | ||
| 241 | } | ||
| 242 | |||
| 243 | static struct resource s5pc100_ac97_resource[] = { | ||
| 244 | [0] = { | ||
| 245 | .start = S5PC100_PA_AC97, | ||
| 246 | .end = S5PC100_PA_AC97 + 0x100 - 1, | ||
| 247 | .flags = IORESOURCE_MEM, | ||
| 248 | }, | ||
| 249 | [1] = { | ||
| 250 | .start = DMACH_AC97_PCMOUT, | ||
| 251 | .end = DMACH_AC97_PCMOUT, | ||
| 252 | .flags = IORESOURCE_DMA, | ||
| 253 | }, | ||
| 254 | [2] = { | ||
| 255 | .start = DMACH_AC97_PCMIN, | ||
| 256 | .end = DMACH_AC97_PCMIN, | ||
| 257 | .flags = IORESOURCE_DMA, | ||
| 258 | }, | ||
| 259 | [3] = { | ||
| 260 | .start = DMACH_AC97_MICIN, | ||
| 261 | .end = DMACH_AC97_MICIN, | ||
| 262 | .flags = IORESOURCE_DMA, | ||
| 263 | }, | ||
| 264 | [4] = { | ||
| 265 | .start = IRQ_AC97, | ||
| 266 | .end = IRQ_AC97, | ||
| 267 | .flags = IORESOURCE_IRQ, | ||
| 268 | }, | ||
| 269 | }; | ||
| 270 | |||
| 271 | static struct s3c_audio_pdata s3c_ac97_pdata = { | ||
| 272 | .cfg_gpio = s5pc100_ac97_cfg_gpio, | ||
| 273 | }; | ||
| 274 | |||
| 275 | static u64 s5pc100_ac97_dmamask = DMA_BIT_MASK(32); | ||
| 276 | |||
| 277 | struct platform_device s5pc100_device_ac97 = { | ||
| 278 | .name = "s3c-ac97", | ||
| 279 | .id = -1, | ||
| 280 | .num_resources = ARRAY_SIZE(s5pc100_ac97_resource), | ||
| 281 | .resource = s5pc100_ac97_resource, | ||
| 282 | .dev = { | ||
| 283 | .platform_data = &s3c_ac97_pdata, | ||
| 284 | .dma_mask = &s5pc100_ac97_dmamask, | ||
| 285 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
| 286 | }, | ||
| 287 | }; | ||
diff --git a/arch/arm/mach-s5pc100/dev-spi.c b/arch/arm/mach-s5pc100/dev-spi.c new file mode 100644 index 000000000000..14618c346057 --- /dev/null +++ b/arch/arm/mach-s5pc100/dev-spi.c | |||
| @@ -0,0 +1,233 @@ | |||
| 1 | /* linux/arch/arm/mach-s5pc100/dev-spi.c | ||
| 2 | * | ||
| 3 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
| 4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #include <linux/platform_device.h> | ||
| 12 | #include <linux/dma-mapping.h> | ||
| 13 | |||
| 14 | #include <mach/dma.h> | ||
| 15 | #include <mach/map.h> | ||
| 16 | #include <mach/gpio.h> | ||
| 17 | #include <mach/spi-clocks.h> | ||
| 18 | |||
| 19 | #include <plat/s3c64xx-spi.h> | ||
| 20 | #include <plat/gpio-cfg.h> | ||
| 21 | #include <plat/irqs.h> | ||
| 22 | |||
| 23 | static char *spi_src_clks[] = { | ||
| 24 | [S5PC100_SPI_SRCCLK_PCLK] = "pclk", | ||
| 25 | [S5PC100_SPI_SRCCLK_48M] = "spi_48m", | ||
| 26 | [S5PC100_SPI_SRCCLK_SPIBUS] = "spi_bus", | ||
| 27 | }; | ||
| 28 | |||
| 29 | /* SPI Controller platform_devices */ | ||
| 30 | |||
| 31 | /* Since we emulate multi-cs capability, we do not touch the CS. | ||
| 32 | * The emulated CS is toggled by board specific mechanism, as it can | ||
| 33 | * be either some immediate GPIO or some signal out of some other | ||
| 34 | * chip in between ... or some yet another way. | ||
| 35 | * We simply do not assume anything about CS. | ||
| 36 | */ | ||
| 37 | static int s5pc100_spi_cfg_gpio(struct platform_device *pdev) | ||
| 38 | { | ||
| 39 | switch (pdev->id) { | ||
| 40 | case 0: | ||
| 41 | s3c_gpio_cfgpin(S5PC100_GPB(0), S3C_GPIO_SFN(2)); | ||
| 42 | s3c_gpio_cfgpin(S5PC100_GPB(1), S3C_GPIO_SFN(2)); | ||
| 43 | s3c_gpio_cfgpin(S5PC100_GPB(2), S3C_GPIO_SFN(2)); | ||
| 44 | s3c_gpio_setpull(S5PC100_GPB(0), S3C_GPIO_PULL_UP); | ||
| 45 | s3c_gpio_setpull(S5PC100_GPB(1), S3C_GPIO_PULL_UP); | ||
| 46 | s3c_gpio_setpull(S5PC100_GPB(2), S3C_GPIO_PULL_UP); | ||
| 47 | break; | ||
| 48 | |||
| 49 | case 1: | ||
| 50 | s3c_gpio_cfgpin(S5PC100_GPB(4), S3C_GPIO_SFN(2)); | ||
| 51 | s3c_gpio_cfgpin(S5PC100_GPB(5), S3C_GPIO_SFN(2)); | ||
| 52 | s3c_gpio_cfgpin(S5PC100_GPB(6), S3C_GPIO_SFN(2)); | ||
| 53 | s3c_gpio_setpull(S5PC100_GPB(4), S3C_GPIO_PULL_UP); | ||
| 54 | s3c_gpio_setpull(S5PC100_GPB(5), S3C_GPIO_PULL_UP); | ||
| 55 | s3c_gpio_setpull(S5PC100_GPB(6), S3C_GPIO_PULL_UP); | ||
| 56 | break; | ||
| 57 | |||
| 58 | case 2: | ||
| 59 | s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(3)); | ||
| 60 | s3c_gpio_cfgpin(S5PC100_GPG3(2), S3C_GPIO_SFN(3)); | ||
| 61 | s3c_gpio_cfgpin(S5PC100_GPG3(3), S3C_GPIO_SFN(3)); | ||
| 62 | s3c_gpio_setpull(S5PC100_GPG3(0), S3C_GPIO_PULL_UP); | ||
| 63 | s3c_gpio_setpull(S5PC100_GPG3(2), S3C_GPIO_PULL_UP); | ||
| 64 | s3c_gpio_setpull(S5PC100_GPG3(3), S3C_GPIO_PULL_UP); | ||
| 65 | break; | ||
| 66 | |||
| 67 | default: | ||
| 68 | dev_err(&pdev->dev, "Invalid SPI Controller number!"); | ||
| 69 | return -EINVAL; | ||
| 70 | } | ||
| 71 | |||
| 72 | return 0; | ||
| 73 | } | ||
| 74 | |||
| 75 | static struct resource s5pc100_spi0_resource[] = { | ||
| 76 | [0] = { | ||
| 77 | .start = S5PC100_PA_SPI0, | ||
| 78 | .end = S5PC100_PA_SPI0 + 0x100 - 1, | ||
| 79 | .flags = IORESOURCE_MEM, | ||
| 80 | }, | ||
| 81 | [1] = { | ||
| 82 | .start = DMACH_SPI0_TX, | ||
| 83 | .end = DMACH_SPI0_TX, | ||
| 84 | .flags = IORESOURCE_DMA, | ||
| 85 | }, | ||
| 86 | [2] = { | ||
| 87 | .start = DMACH_SPI0_RX, | ||
| 88 | .end = DMACH_SPI0_RX, | ||
| 89 | .flags = IORESOURCE_DMA, | ||
| 90 | }, | ||
| 91 | [3] = { | ||
| 92 | .start = IRQ_SPI0, | ||
| 93 | .end = IRQ_SPI0, | ||
| 94 | .flags = IORESOURCE_IRQ, | ||
| 95 | }, | ||
| 96 | }; | ||
| 97 | |||
| 98 | static struct s3c64xx_spi_info s5pc100_spi0_pdata = { | ||
| 99 | .cfg_gpio = s5pc100_spi_cfg_gpio, | ||
| 100 | .fifo_lvl_mask = 0x7f, | ||
| 101 | .rx_lvl_offset = 13, | ||
| 102 | .high_speed = 1, | ||
| 103 | }; | ||
| 104 | |||
| 105 | static u64 spi_dmamask = DMA_BIT_MASK(32); | ||
| 106 | |||
| 107 | struct platform_device s5pc100_device_spi0 = { | ||
| 108 | .name = "s3c64xx-spi", | ||
| 109 | .id = 0, | ||
| 110 | .num_resources = ARRAY_SIZE(s5pc100_spi0_resource), | ||
| 111 | .resource = s5pc100_spi0_resource, | ||
| 112 | .dev = { | ||
| 113 | .dma_mask = &spi_dmamask, | ||
| 114 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
| 115 | .platform_data = &s5pc100_spi0_pdata, | ||
| 116 | }, | ||
| 117 | }; | ||
| 118 | |||
| 119 | static struct resource s5pc100_spi1_resource[] = { | ||
| 120 | [0] = { | ||
| 121 | .start = S5PC100_PA_SPI1, | ||
| 122 | .end = S5PC100_PA_SPI1 + 0x100 - 1, | ||
| 123 | .flags = IORESOURCE_MEM, | ||
| 124 | }, | ||
| 125 | [1] = { | ||
| 126 | .start = DMACH_SPI1_TX, | ||
| 127 | .end = DMACH_SPI1_TX, | ||
| 128 | .flags = IORESOURCE_DMA, | ||
| 129 | }, | ||
| 130 | [2] = { | ||
| 131 | .start = DMACH_SPI1_RX, | ||
| 132 | .end = DMACH_SPI1_RX, | ||
| 133 | .flags = IORESOURCE_DMA, | ||
| 134 | }, | ||
| 135 | [3] = { | ||
| 136 | .start = IRQ_SPI1, | ||
| 137 | .end = IRQ_SPI1, | ||
| 138 | .flags = IORESOURCE_IRQ, | ||
| 139 | }, | ||
| 140 | }; | ||
| 141 | |||
| 142 | static struct s3c64xx_spi_info s5pc100_spi1_pdata = { | ||
| 143 | .cfg_gpio = s5pc100_spi_cfg_gpio, | ||
| 144 | .fifo_lvl_mask = 0x7f, | ||
| 145 | .rx_lvl_offset = 13, | ||
| 146 | .high_speed = 1, | ||
| 147 | }; | ||
| 148 | |||
| 149 | struct platform_device s5pc100_device_spi1 = { | ||
| 150 | .name = "s3c64xx-spi", | ||
| 151 | .id = 1, | ||
| 152 | .num_resources = ARRAY_SIZE(s5pc100_spi1_resource), | ||
| 153 | .resource = s5pc100_spi1_resource, | ||
| 154 | .dev = { | ||
| 155 | .dma_mask = &spi_dmamask, | ||
| 156 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
| 157 | .platform_data = &s5pc100_spi1_pdata, | ||
| 158 | }, | ||
| 159 | }; | ||
| 160 | |||
| 161 | static struct resource s5pc100_spi2_resource[] = { | ||
| 162 | [0] = { | ||
| 163 | .start = S5PC100_PA_SPI2, | ||
| 164 | .end = S5PC100_PA_SPI2 + 0x100 - 1, | ||
| 165 | .flags = IORESOURCE_MEM, | ||
| 166 | }, | ||
| 167 | [1] = { | ||
| 168 | .start = DMACH_SPI2_TX, | ||
| 169 | .end = DMACH_SPI2_TX, | ||
| 170 | .flags = IORESOURCE_DMA, | ||
| 171 | }, | ||
| 172 | [2] = { | ||
| 173 | .start = DMACH_SPI2_RX, | ||
| 174 | .end = DMACH_SPI2_RX, | ||
| 175 | .flags = IORESOURCE_DMA, | ||
| 176 | }, | ||
| 177 | [3] = { | ||
| 178 | .start = IRQ_SPI2, | ||
| 179 | .end = IRQ_SPI2, | ||
| 180 | .flags = IORESOURCE_IRQ, | ||
| 181 | }, | ||
| 182 | }; | ||
| 183 | |||
| 184 | static struct s3c64xx_spi_info s5pc100_spi2_pdata = { | ||
| 185 | .cfg_gpio = s5pc100_spi_cfg_gpio, | ||
| 186 | .fifo_lvl_mask = 0x7f, | ||
| 187 | .rx_lvl_offset = 13, | ||
| 188 | .high_speed = 1, | ||
| 189 | }; | ||
| 190 | |||
| 191 | struct platform_device s5pc100_device_spi2 = { | ||
| 192 | .name = "s3c64xx-spi", | ||
| 193 | .id = 2, | ||
| 194 | .num_resources = ARRAY_SIZE(s5pc100_spi2_resource), | ||
| 195 | .resource = s5pc100_spi2_resource, | ||
| 196 | .dev = { | ||
| 197 | .dma_mask = &spi_dmamask, | ||
| 198 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
| 199 | .platform_data = &s5pc100_spi2_pdata, | ||
| 200 | }, | ||
| 201 | }; | ||
| 202 | |||
| 203 | void __init s5pc100_spi_set_info(int cntrlr, int src_clk_nr, int num_cs) | ||
| 204 | { | ||
| 205 | struct s3c64xx_spi_info *pd; | ||
| 206 | |||
| 207 | /* Reject invalid configuration */ | ||
| 208 | if (!num_cs || src_clk_nr < 0 | ||
| 209 | || src_clk_nr > S5PC100_SPI_SRCCLK_SPIBUS) { | ||
| 210 | printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__); | ||
| 211 | return; | ||
| 212 | } | ||
| 213 | |||
| 214 | switch (cntrlr) { | ||
| 215 | case 0: | ||
| 216 | pd = &s5pc100_spi0_pdata; | ||
| 217 | break; | ||
| 218 | case 1: | ||
| 219 | pd = &s5pc100_spi1_pdata; | ||
| 220 | break; | ||
| 221 | case 2: | ||
| 222 | pd = &s5pc100_spi2_pdata; | ||
| 223 | break; | ||
| 224 | default: | ||
| 225 | printk(KERN_ERR "%s: Invalid SPI controller(%d)\n", | ||
| 226 | __func__, cntrlr); | ||
| 227 | return; | ||
| 228 | } | ||
| 229 | |||
| 230 | pd->num_cs = num_cs; | ||
| 231 | pd->src_clk_nr = src_clk_nr; | ||
| 232 | pd->src_clk_name = spi_src_clks[src_clk_nr]; | ||
| 233 | } | ||
diff --git a/arch/arm/mach-s5pc100/dma.c b/arch/arm/mach-s5pc100/dma.c new file mode 100644 index 000000000000..0f5517571e2c --- /dev/null +++ b/arch/arm/mach-s5pc100/dma.c | |||
| @@ -0,0 +1,167 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
| 3 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
| 4 | * | ||
| 5 | * This program is free software; you can redistribute it and/or modify | ||
| 6 | * it under the terms of the GNU General Public License as published by | ||
| 7 | * the Free Software Foundation; either version 2 of the License, or | ||
| 8 | * (at your option) any later version. | ||
| 9 | * | ||
| 10 | * This program is distributed in the hope that it will be useful, | ||
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 13 | * GNU General Public License for more details. | ||
| 14 | * | ||
| 15 | * You should have received a copy of the GNU General Public License | ||
| 16 | * along with this program; if not, write to the Free Software | ||
| 17 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
| 18 | */ | ||
| 19 | |||
| 20 | #include <linux/platform_device.h> | ||
| 21 | #include <linux/dma-mapping.h> | ||
| 22 | |||
| 23 | #include <plat/devs.h> | ||
| 24 | |||
| 25 | #include <mach/map.h> | ||
| 26 | #include <mach/irqs.h> | ||
| 27 | |||
| 28 | #include <plat/s3c-pl330-pdata.h> | ||
| 29 | |||
| 30 | static u64 dma_dmamask = DMA_BIT_MASK(32); | ||
| 31 | |||
| 32 | static struct resource s5pc100_pdma0_resource[] = { | ||
| 33 | [0] = { | ||
| 34 | .start = S5PC100_PA_PDMA0, | ||
| 35 | .end = S5PC100_PA_PDMA0 + SZ_4K, | ||
| 36 | .flags = IORESOURCE_MEM, | ||
| 37 | }, | ||
| 38 | [1] = { | ||
| 39 | .start = IRQ_PDMA0, | ||
| 40 | .end = IRQ_PDMA0, | ||
| 41 | .flags = IORESOURCE_IRQ, | ||
| 42 | }, | ||
| 43 | }; | ||
| 44 | |||
| 45 | static struct s3c_pl330_platdata s5pc100_pdma0_pdata = { | ||
| 46 | .peri = { | ||
| 47 | [0] = DMACH_UART0_RX, | ||
| 48 | [1] = DMACH_UART0_TX, | ||
| 49 | [2] = DMACH_UART1_RX, | ||
| 50 | [3] = DMACH_UART1_TX, | ||
| 51 | [4] = DMACH_UART2_RX, | ||
| 52 | [5] = DMACH_UART2_TX, | ||
| 53 | [6] = DMACH_UART3_RX, | ||
| 54 | [7] = DMACH_UART3_TX, | ||
| 55 | [8] = DMACH_IRDA, | ||
| 56 | [9] = DMACH_I2S0_RX, | ||
| 57 | [10] = DMACH_I2S0_TX, | ||
| 58 | [11] = DMACH_I2S0S_TX, | ||
| 59 | [12] = DMACH_I2S1_RX, | ||
| 60 | [13] = DMACH_I2S1_TX, | ||
| 61 | [14] = DMACH_I2S2_RX, | ||
| 62 | [15] = DMACH_I2S2_TX, | ||
| 63 | [16] = DMACH_SPI0_RX, | ||
| 64 | [17] = DMACH_SPI0_TX, | ||
| 65 | [18] = DMACH_SPI1_RX, | ||
| 66 | [19] = DMACH_SPI1_TX, | ||
| 67 | [20] = DMACH_SPI2_RX, | ||
| 68 | [21] = DMACH_SPI2_TX, | ||
| 69 | [22] = DMACH_AC97_MICIN, | ||
| 70 | [23] = DMACH_AC97_PCMIN, | ||
| 71 | [24] = DMACH_AC97_PCMOUT, | ||
| 72 | [25] = DMACH_EXTERNAL, | ||
| 73 | [26] = DMACH_PWM, | ||
| 74 | [27] = DMACH_SPDIF, | ||
| 75 | [28] = DMACH_HSI_RX, | ||
| 76 | [29] = DMACH_HSI_TX, | ||
| 77 | [30] = DMACH_MAX, | ||
| 78 | [31] = DMACH_MAX, | ||
| 79 | }, | ||
| 80 | }; | ||
| 81 | |||
| 82 | static struct platform_device s5pc100_device_pdma0 = { | ||
| 83 | .name = "s3c-pl330", | ||
| 84 | .id = 1, | ||
| 85 | .num_resources = ARRAY_SIZE(s5pc100_pdma0_resource), | ||
| 86 | .resource = s5pc100_pdma0_resource, | ||
| 87 | .dev = { | ||
| 88 | .dma_mask = &dma_dmamask, | ||
| 89 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
| 90 | .platform_data = &s5pc100_pdma0_pdata, | ||
| 91 | }, | ||
| 92 | }; | ||
| 93 | |||
| 94 | static struct resource s5pc100_pdma1_resource[] = { | ||
| 95 | [0] = { | ||
| 96 | .start = S5PC100_PA_PDMA1, | ||
| 97 | .end = S5PC100_PA_PDMA1 + SZ_4K, | ||
| 98 | .flags = IORESOURCE_MEM, | ||
| 99 | }, | ||
| 100 | [1] = { | ||
| 101 | .start = IRQ_PDMA1, | ||
| 102 | .end = IRQ_PDMA1, | ||
| 103 | .flags = IORESOURCE_IRQ, | ||
| 104 | }, | ||
| 105 | }; | ||
| 106 | |||
| 107 | static struct s3c_pl330_platdata s5pc100_pdma1_pdata = { | ||
| 108 | .peri = { | ||
| 109 | [0] = DMACH_UART0_RX, | ||
| 110 | [1] = DMACH_UART0_TX, | ||
| 111 | [2] = DMACH_UART1_RX, | ||
| 112 | [3] = DMACH_UART1_TX, | ||
| 113 | [4] = DMACH_UART2_RX, | ||
| 114 | [5] = DMACH_UART2_TX, | ||
| 115 | [6] = DMACH_UART3_RX, | ||
| 116 | [7] = DMACH_UART3_TX, | ||
| 117 | [8] = DMACH_IRDA, | ||
| 118 | [9] = DMACH_I2S0_RX, | ||
| 119 | [10] = DMACH_I2S0_TX, | ||
| 120 | [11] = DMACH_I2S0S_TX, | ||
| 121 | [12] = DMACH_I2S1_RX, | ||
| 122 | [13] = DMACH_I2S1_TX, | ||
| 123 | [14] = DMACH_I2S2_RX, | ||
| 124 | [15] = DMACH_I2S2_TX, | ||
| 125 | [16] = DMACH_SPI0_RX, | ||
| 126 | [17] = DMACH_SPI0_TX, | ||
| 127 | [18] = DMACH_SPI1_RX, | ||
| 128 | [19] = DMACH_SPI1_TX, | ||
| 129 | [20] = DMACH_SPI2_RX, | ||
| 130 | [21] = DMACH_SPI2_TX, | ||
| 131 | [22] = DMACH_PCM0_RX, | ||
| 132 | [23] = DMACH_PCM0_TX, | ||
| 133 | [24] = DMACH_PCM1_RX, | ||
| 134 | [25] = DMACH_PCM1_TX, | ||
| 135 | [26] = DMACH_MSM_REQ0, | ||
| 136 | [27] = DMACH_MSM_REQ1, | ||
| 137 | [28] = DMACH_MSM_REQ2, | ||
| 138 | [29] = DMACH_MSM_REQ3, | ||
| 139 | [30] = DMACH_MAX, | ||
| 140 | [31] = DMACH_MAX, | ||
| 141 | }, | ||
| 142 | }; | ||
| 143 | |||
| 144 | static struct platform_device s5pc100_device_pdma1 = { | ||
| 145 | .name = "s3c-pl330", | ||
| 146 | .id = 2, | ||
| 147 | .num_resources = ARRAY_SIZE(s5pc100_pdma1_resource), | ||
| 148 | .resource = s5pc100_pdma1_resource, | ||
| 149 | .dev = { | ||
| 150 | .dma_mask = &dma_dmamask, | ||
| 151 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
| 152 | .platform_data = &s5pc100_pdma1_pdata, | ||
| 153 | }, | ||
| 154 | }; | ||
| 155 | |||
| 156 | static struct platform_device *s5pc100_dmacs[] __initdata = { | ||
| 157 | &s5pc100_device_pdma0, | ||
| 158 | &s5pc100_device_pdma1, | ||
| 159 | }; | ||
| 160 | |||
| 161 | static int __init s5pc100_dma_init(void) | ||
| 162 | { | ||
| 163 | platform_add_devices(s5pc100_dmacs, ARRAY_SIZE(s5pc100_dmacs)); | ||
| 164 | |||
| 165 | return 0; | ||
| 166 | } | ||
| 167 | arch_initcall(s5pc100_dma_init); | ||
diff --git a/arch/arm/mach-s5pc100/gpiolib.c b/arch/arm/mach-s5pc100/gpiolib.c index c8e8336a3a12..0fab7f2cd8bf 100644 --- a/arch/arm/mach-s5pc100/gpiolib.c +++ b/arch/arm/mach-s5pc100/gpiolib.c | |||
| @@ -1,10 +1,10 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * arch/arm/plat-s5pc1xx/gpiolib.c | 2 | * arch/arm/plat-s5pc100/gpiolib.c |
| 3 | * | 3 | * |
| 4 | * Copyright 2009 Samsung Electronics Co | 4 | * Copyright 2009 Samsung Electronics Co |
| 5 | * Kyungmin Park <kyungmin.park@samsung.com> | 5 | * Kyungmin Park <kyungmin.park@samsung.com> |
| 6 | * | 6 | * |
| 7 | * S5PC1XX - GPIOlib support | 7 | * S5PC100 - GPIOlib support |
| 8 | * | 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify | 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License version 2 as | 10 | * it under the terms of the GNU General Public License version 2 as |
| @@ -61,13 +61,12 @@ | |||
| 61 | * L3 8 4Bit None | 61 | * L3 8 4Bit None |
| 62 | */ | 62 | */ |
| 63 | 63 | ||
| 64 | #if 0 | 64 | static int s5pc100_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset) |
| 65 | static int s5pc1xx_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset) | ||
| 66 | { | 65 | { |
| 67 | return S3C_IRQ_GPIO(chip->base + offset); | 66 | return S3C_IRQ_GPIO(chip->base + offset); |
| 68 | } | 67 | } |
| 69 | 68 | ||
| 70 | static int s5pc1xx_gpiolib_to_eint(struct gpio_chip *chip, unsigned int offset) | 69 | static int s5pc100_gpiolib_to_eint(struct gpio_chip *chip, unsigned int offset) |
| 71 | { | 70 | { |
| 72 | int base; | 71 | int base; |
| 73 | 72 | ||
| @@ -85,7 +84,7 @@ static int s5pc1xx_gpiolib_to_eint(struct gpio_chip *chip, unsigned int offset) | |||
| 85 | return IRQ_EINT(24 + offset); | 84 | return IRQ_EINT(24 + offset); |
| 86 | return -EINVAL; | 85 | return -EINVAL; |
| 87 | } | 86 | } |
| 88 | #endif | 87 | |
| 89 | static struct s3c_gpio_cfg gpio_cfg = { | 88 | static struct s3c_gpio_cfg gpio_cfg = { |
| 90 | .set_config = s3c_gpio_setcfg_s3c64xx_4bit, | 89 | .set_config = s3c_gpio_setcfg_s3c64xx_4bit, |
| 91 | .set_pull = s3c_gpio_setpull_updown, | 90 | .set_pull = s3c_gpio_setpull_updown, |
| @@ -382,31 +381,30 @@ static struct s3c_gpio_chip s5pc100_gpio_chips[] = { | |||
| 382 | }; | 381 | }; |
| 383 | 382 | ||
| 384 | /* FIXME move from irq-gpio.c */ | 383 | /* FIXME move from irq-gpio.c */ |
| 385 | extern struct irq_chip s5pc1xx_gpioint; | 384 | extern struct irq_chip s5pc100_gpioint; |
| 386 | extern void s5pc1xx_irq_gpioint_handler(unsigned int irq, struct irq_desc *desc); | 385 | extern void s5pc100_irq_gpioint_handler(unsigned int irq, struct irq_desc *desc); |
| 387 | 386 | ||
| 388 | static __init void s5pc100_gpiolib_link(struct s3c_gpio_chip *chip) | 387 | static __init void s5pc100_gpiolib_link(struct s3c_gpio_chip *chip) |
| 389 | { | 388 | { |
| 390 | #if 0 | ||
| 391 | /* Interrupt */ | 389 | /* Interrupt */ |
| 392 | if (chip->config == &gpio_cfg) { | 390 | if (chip->config == &gpio_cfg) { |
| 393 | int i, irq; | 391 | int i, irq; |
| 394 | 392 | ||
| 395 | chip->chip.to_irq = s5pc1xx_gpiolib_to_irq; | 393 | chip->chip.to_irq = s5pc100_gpiolib_to_irq; |
| 396 | 394 | ||
| 397 | for (i = 0; i < chip->chip.ngpio; i++) { | 395 | for (i = 0; i < chip->chip.ngpio; i++) { |
| 398 | irq = S3C_IRQ_GPIO_BASE + chip->chip.base + i; | 396 | irq = S3C_IRQ_GPIO_BASE + chip->chip.base + i; |
| 399 | set_irq_chip(irq, &s5pc1xx_gpioint); | 397 | set_irq_chip(irq, &s5pc100_gpioint); |
| 400 | set_irq_data(irq, &chip->chip); | 398 | set_irq_data(irq, &chip->chip); |
| 401 | set_irq_handler(irq, handle_level_irq); | 399 | set_irq_handler(irq, handle_level_irq); |
| 402 | set_irq_flags(irq, IRQF_VALID); | 400 | set_irq_flags(irq, IRQF_VALID); |
| 403 | } | 401 | } |
| 404 | } else if (chip->config == &gpio_cfg_eint) | 402 | } else if (chip->config == &gpio_cfg_eint) { |
| 405 | chip->chip.to_irq = s5pc1xx_gpiolib_to_eint; | 403 | chip->chip.to_irq = s5pc100_gpiolib_to_eint; |
| 406 | #endif | 404 | } |
| 407 | } | 405 | } |
| 408 | 406 | ||
| 409 | static __init int s5pc1xx_gpiolib_init(void) | 407 | static __init int s5pc100_gpiolib_init(void) |
| 410 | { | 408 | { |
| 411 | struct s3c_gpio_chip *chip; | 409 | struct s3c_gpio_chip *chip; |
| 412 | int nr_chips; | 410 | int nr_chips; |
| @@ -419,10 +417,10 @@ static __init int s5pc1xx_gpiolib_init(void) | |||
| 419 | 417 | ||
| 420 | samsung_gpiolib_add_4bit_chips(s5pc100_gpio_chips, | 418 | samsung_gpiolib_add_4bit_chips(s5pc100_gpio_chips, |
| 421 | ARRAY_SIZE(s5pc100_gpio_chips)); | 419 | ARRAY_SIZE(s5pc100_gpio_chips)); |
| 422 | #if 0 | 420 | |
| 423 | /* Interrupt */ | 421 | /* Interrupt */ |
| 424 | set_irq_chained_handler(IRQ_GPIOINT, s5pc1xx_irq_gpioint_handler); | 422 | set_irq_chained_handler(IRQ_GPIOINT, s5pc100_irq_gpioint_handler); |
| 425 | #endif | 423 | |
| 426 | return 0; | 424 | return 0; |
| 427 | } | 425 | } |
| 428 | core_initcall(s5pc1xx_gpiolib_init); | 426 | core_initcall(s5pc100_gpiolib_init); |
diff --git a/arch/arm/mach-s5pc100/include/mach/debug-macro.S b/arch/arm/mach-s5pc100/include/mach/debug-macro.S index e181f5789482..70e02e91ee3c 100644 --- a/arch/arm/mach-s5pc100/include/mach/debug-macro.S +++ b/arch/arm/mach-s5pc100/include/mach/debug-macro.S | |||
| @@ -22,12 +22,14 @@ | |||
| 22 | * aligned and add in the offset when we load the value here. | 22 | * aligned and add in the offset when we load the value here. |
| 23 | */ | 23 | */ |
| 24 | 24 | ||
| 25 | .macro addruart, rx, tmp | 25 | .macro addruart, rx, rtmp |
| 26 | mrc p15, 0, \rx, c1, c0 | 26 | mrc p15, 0, \rx, c1, c0 |
| 27 | tst \rx, #1 | 27 | tst \rx, #1 |
| 28 | ldreq \rx, = S3C_PA_UART | 28 | ldreq \rx, = S3C_PA_UART |
| 29 | ldrne \rx, = (S3C_VA_UART + S3C_PA_UART & 0xfffff) | 29 | ldrne \rx, = S3C_VA_UART |
| 30 | #if CONFIG_DEBUG_S3C_UART != 0 | ||
| 30 | add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART) | 31 | add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART) |
| 32 | #endif | ||
| 31 | .endm | 33 | .endm |
| 32 | 34 | ||
| 33 | /* include the reset of the code which will do the work, we're only | 35 | /* include the reset of the code which will do the work, we're only |
diff --git a/arch/arm/mach-s5pc100/include/mach/dma.h b/arch/arm/mach-s5pc100/include/mach/dma.h new file mode 100644 index 000000000000..81209eb1409b --- /dev/null +++ b/arch/arm/mach-s5pc100/include/mach/dma.h | |||
| @@ -0,0 +1,26 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
| 3 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
| 4 | * | ||
| 5 | * This program is free software; you can redistribute it and/or modify | ||
| 6 | * it under the terms of the GNU General Public License as published by | ||
| 7 | * the Free Software Foundation; either version 2 of the License, or | ||
| 8 | * (at your option) any later version. | ||
| 9 | * | ||
| 10 | * This program is distributed in the hope that it will be useful, | ||
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 13 | * GNU General Public License for more details. | ||
| 14 | * | ||
| 15 | * You should have received a copy of the GNU General Public License | ||
| 16 | * along with this program; if not, write to the Free Software | ||
| 17 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
| 18 | */ | ||
| 19 | |||
| 20 | #ifndef __MACH_DMA_H | ||
| 21 | #define __MACH_DMA_H | ||
| 22 | |||
| 23 | /* This platform uses the common S3C DMA API driver for PL330 */ | ||
| 24 | #include <plat/s3c-dma-pl330.h> | ||
| 25 | |||
| 26 | #endif /* __MACH_DMA_H */ | ||
diff --git a/arch/arm/mach-s5pc100/include/mach/entry-macro.S b/arch/arm/mach-s5pc100/include/mach/entry-macro.S index 67131939e626..ba76af052c81 100644 --- a/arch/arm/mach-s5pc100/include/mach/entry-macro.S +++ b/arch/arm/mach-s5pc100/include/mach/entry-macro.S | |||
| @@ -20,7 +20,7 @@ | |||
| 20 | .endm | 20 | .endm |
| 21 | 21 | ||
| 22 | .macro get_irqnr_preamble, base, tmp | 22 | .macro get_irqnr_preamble, base, tmp |
| 23 | ldr \base, =S3C_VA_VIC0 | 23 | ldr \base, =VA_VIC0 |
| 24 | .endm | 24 | .endm |
| 25 | 25 | ||
| 26 | .macro arch_ret_to_user, tmp1, tmp2 | 26 | .macro arch_ret_to_user, tmp1, tmp2 |
| @@ -29,18 +29,18 @@ | |||
| 29 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 29 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
| 30 | 30 | ||
| 31 | @ check the vic0 | 31 | @ check the vic0 |
| 32 | mov \irqnr, # S3C_IRQ_OFFSET + 31 | 32 | mov \irqnr, # S5P_IRQ_OFFSET + 31 |
| 33 | ldr \irqstat, [ \base, # VIC_IRQ_STATUS ] | 33 | ldr \irqstat, [ \base, # VIC_IRQ_STATUS ] |
| 34 | teq \irqstat, #0 | 34 | teq \irqstat, #0 |
| 35 | 35 | ||
| 36 | @ otherwise try vic1 | 36 | @ otherwise try vic1 |
| 37 | addeq \tmp, \base, #(S3C_VA_VIC1 - S3C_VA_VIC0) | 37 | addeq \tmp, \base, #(VA_VIC1 - VA_VIC0) |
| 38 | addeq \irqnr, \irqnr, #32 | 38 | addeq \irqnr, \irqnr, #32 |
| 39 | ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ] | 39 | ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ] |
| 40 | teqeq \irqstat, #0 | 40 | teqeq \irqstat, #0 |
| 41 | 41 | ||
| 42 | @ otherwise try vic2 | 42 | @ otherwise try vic2 |
| 43 | addeq \tmp, \base, #(S3C_VA_VIC2 - S3C_VA_VIC0) | 43 | addeq \tmp, \base, #(VA_VIC2 - VA_VIC0) |
| 44 | addeq \irqnr, \irqnr, #32 | 44 | addeq \irqnr, \irqnr, #32 |
| 45 | ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ] | 45 | ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ] |
| 46 | teqeq \irqstat, #0 | 46 | teqeq \irqstat, #0 |
diff --git a/arch/arm/mach-s5pc100/include/mach/gpio.h b/arch/arm/mach-s5pc100/include/mach/gpio.h index 29a8a12d9b4f..71ae1f52df1d 100644 --- a/arch/arm/mach-s5pc100/include/mach/gpio.h +++ b/arch/arm/mach-s5pc100/include/mach/gpio.h | |||
| @@ -146,6 +146,13 @@ enum s5p_gpio_number { | |||
| 146 | /* define the number of gpios we need to the one after the MP04() range */ | 146 | /* define the number of gpios we need to the one after the MP04() range */ |
| 147 | #define ARCH_NR_GPIOS (S5PC100_GPIO_END + 1) | 147 | #define ARCH_NR_GPIOS (S5PC100_GPIO_END + 1) |
| 148 | 148 | ||
| 149 | #define EINT_MODE S3C_GPIO_SFN(0x2) | ||
| 150 | |||
| 151 | #define EINT_GPIO_0(x) S5PC100_GPH0(x) | ||
| 152 | #define EINT_GPIO_1(x) S5PC100_GPH1(x) | ||
| 153 | #define EINT_GPIO_2(x) S5PC100_GPH2(x) | ||
| 154 | #define EINT_GPIO_3(x) S5PC100_GPH3(x) | ||
| 155 | |||
| 149 | #include <asm-generic/gpio.h> | 156 | #include <asm-generic/gpio.h> |
| 150 | 157 | ||
| 151 | #endif /* __ASM_ARCH_GPIO_H */ | 158 | #endif /* __ASM_ARCH_GPIO_H */ |
diff --git a/arch/arm/mach-s5pc100/include/mach/irqs.h b/arch/arm/mach-s5pc100/include/mach/irqs.h index b53fa48a52c6..28aa551dc3a8 100644 --- a/arch/arm/mach-s5pc100/include/mach/irqs.h +++ b/arch/arm/mach-s5pc100/include/mach/irqs.h | |||
| @@ -11,9 +11,104 @@ | |||
| 11 | 11 | ||
| 12 | #include <plat/irqs.h> | 12 | #include <plat/irqs.h> |
| 13 | 13 | ||
| 14 | /* LCD */ | 14 | /* VIC0: system, DMA, timer */ |
| 15 | #define IRQ_EINT16_31 S5P_IRQ_VIC0(16) | ||
| 16 | #define IRQ_BATF S5P_IRQ_VIC0(17) | ||
| 17 | #define IRQ_MDMA S5P_IRQ_VIC0(18) | ||
| 18 | #define IRQ_PDMA0 S5P_IRQ_VIC0(19) | ||
| 19 | #define IRQ_PDMA1 S5P_IRQ_VIC0(20) | ||
| 20 | #define IRQ_TIMER0_VIC S5P_IRQ_VIC0(21) | ||
| 21 | #define IRQ_TIMER1_VIC S5P_IRQ_VIC0(22) | ||
| 22 | #define IRQ_TIMER2_VIC S5P_IRQ_VIC0(23) | ||
| 23 | #define IRQ_TIMER3_VIC S5P_IRQ_VIC0(24) | ||
| 24 | #define IRQ_TIMER4_VIC S5P_IRQ_VIC0(25) | ||
| 25 | #define IRQ_SYSTIMER S5P_IRQ_VIC0(26) | ||
| 26 | #define IRQ_WDT S5P_IRQ_VIC0(27) | ||
| 27 | #define IRQ_RTC_ALARM S5P_IRQ_VIC0(28) | ||
| 28 | #define IRQ_RTC_TIC S5P_IRQ_VIC0(29) | ||
| 29 | #define IRQ_GPIOINT S5P_IRQ_VIC0(30) | ||
| 30 | |||
| 31 | /* VIC1: ARM, power, memory, connectivity */ | ||
| 32 | #define IRQ_CORTEX0 S5P_IRQ_VIC1(0) | ||
| 33 | #define IRQ_CORTEX1 S5P_IRQ_VIC1(1) | ||
| 34 | #define IRQ_CORTEX2 S5P_IRQ_VIC1(2) | ||
| 35 | #define IRQ_CORTEX3 S5P_IRQ_VIC1(3) | ||
| 36 | #define IRQ_CORTEX4 S5P_IRQ_VIC1(4) | ||
| 37 | #define IRQ_IEMAPC S5P_IRQ_VIC1(5) | ||
| 38 | #define IRQ_IEMIEC S5P_IRQ_VIC1(6) | ||
| 39 | #define IRQ_ONENAND S5P_IRQ_VIC1(7) | ||
| 40 | #define IRQ_NFC S5P_IRQ_VIC1(8) | ||
| 41 | #define IRQ_CFC S5P_IRQ_VIC1(9) | ||
| 42 | #define IRQ_UART0 S5P_IRQ_VIC1(10) | ||
| 43 | #define IRQ_UART1 S5P_IRQ_VIC1(11) | ||
| 44 | #define IRQ_UART2 S5P_IRQ_VIC1(12) | ||
| 45 | #define IRQ_UART3 S5P_IRQ_VIC1(13) | ||
| 46 | #define IRQ_IIC S5P_IRQ_VIC1(14) | ||
| 47 | #define IRQ_SPI0 S5P_IRQ_VIC1(15) | ||
| 48 | #define IRQ_SPI1 S5P_IRQ_VIC1(16) | ||
| 49 | #define IRQ_SPI2 S5P_IRQ_VIC1(17) | ||
| 50 | #define IRQ_IRDA S5P_IRQ_VIC1(18) | ||
| 51 | #define IRQ_CAN0 S5P_IRQ_VIC1(19) | ||
| 52 | #define IRQ_CAN1 S5P_IRQ_VIC1(20) | ||
| 53 | #define IRQ_HSIRX S5P_IRQ_VIC1(21) | ||
| 54 | #define IRQ_HSITX S5P_IRQ_VIC1(22) | ||
| 55 | #define IRQ_UHOST S5P_IRQ_VIC1(23) | ||
| 56 | #define IRQ_OTG S5P_IRQ_VIC1(24) | ||
| 57 | #define IRQ_MSM S5P_IRQ_VIC1(25) | ||
| 58 | #define IRQ_HSMMC0 S5P_IRQ_VIC1(26) | ||
| 59 | #define IRQ_HSMMC1 S5P_IRQ_VIC1(27) | ||
| 60 | #define IRQ_HSMMC2 S5P_IRQ_VIC1(28) | ||
| 61 | #define IRQ_MIPICSI S5P_IRQ_VIC1(29) | ||
| 62 | #define IRQ_MIPIDSI S5P_IRQ_VIC1(30) | ||
| 63 | |||
| 64 | /* VIC2: multimedia, audio, security */ | ||
| 65 | #define IRQ_LCD0 S5P_IRQ_VIC2(0) | ||
| 66 | #define IRQ_LCD1 S5P_IRQ_VIC2(1) | ||
| 67 | #define IRQ_LCD2 S5P_IRQ_VIC2(2) | ||
| 68 | #define IRQ_LCD3 S5P_IRQ_VIC2(3) | ||
| 69 | #define IRQ_ROTATOR S5P_IRQ_VIC2(4) | ||
| 70 | #define IRQ_FIMC0 S5P_IRQ_VIC2(5) | ||
| 71 | #define IRQ_FIMC1 S5P_IRQ_VIC2(6) | ||
| 72 | #define IRQ_FIMC2 S5P_IRQ_VIC2(7) | ||
| 73 | #define IRQ_JPEG S5P_IRQ_VIC2(8) | ||
| 74 | #define IRQ_2D S5P_IRQ_VIC2(9) | ||
| 75 | #define IRQ_3D S5P_IRQ_VIC2(10) | ||
| 76 | #define IRQ_MIXER S5P_IRQ_VIC2(11) | ||
| 77 | #define IRQ_HDMI S5P_IRQ_VIC2(12) | ||
| 78 | #define IRQ_IIC1 S5P_IRQ_VIC2(13) | ||
| 79 | #define IRQ_MFC S5P_IRQ_VIC2(14) | ||
| 80 | #define IRQ_TVENC S5P_IRQ_VIC2(15) | ||
| 81 | #define IRQ_I2S0 S5P_IRQ_VIC2(16) | ||
| 82 | #define IRQ_I2S1 S5P_IRQ_VIC2(17) | ||
| 83 | #define IRQ_I2S2 S5P_IRQ_VIC2(18) | ||
| 84 | #define IRQ_AC97 S5P_IRQ_VIC2(19) | ||
| 85 | #define IRQ_PCM0 S5P_IRQ_VIC2(20) | ||
| 86 | #define IRQ_PCM1 S5P_IRQ_VIC2(21) | ||
| 87 | #define IRQ_SPDIF S5P_IRQ_VIC2(22) | ||
| 88 | #define IRQ_ADC S5P_IRQ_VIC2(23) | ||
| 89 | #define IRQ_PENDN S5P_IRQ_VIC2(24) | ||
| 90 | #define IRQ_TC IRQ_PENDN | ||
| 91 | #define IRQ_KEYPAD S5P_IRQ_VIC2(25) | ||
| 92 | #define IRQ_CG S5P_IRQ_VIC2(26) | ||
| 93 | #define IRQ_SEC S5P_IRQ_VIC2(27) | ||
| 94 | #define IRQ_SECRX S5P_IRQ_VIC2(28) | ||
| 95 | #define IRQ_SECTX S5P_IRQ_VIC2(29) | ||
| 96 | #define IRQ_SDMIRQ S5P_IRQ_VIC2(30) | ||
| 97 | #define IRQ_SDMFIQ S5P_IRQ_VIC2(31) | ||
| 98 | #define IRQ_VIC_END S5P_IRQ_VIC2(31) | ||
| 99 | |||
| 100 | #define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0)) | ||
| 101 | #define S5P_EINT_BASE2 (IRQ_VIC_END + 1) | ||
| 102 | |||
| 103 | #define S3C_IRQ_GPIO_BASE (IRQ_EINT(31) + 1) | ||
| 104 | #define S3C_IRQ_GPIO(x) (S3C_IRQ_GPIO_BASE + (x)) | ||
| 105 | |||
| 106 | /* Until MP04 Groups -> 40 (exactly 39) Groups * 8 ~= 320 GPIOs */ | ||
| 107 | #define NR_IRQS (S3C_IRQ_GPIO(320) + 1) | ||
| 108 | |||
| 109 | /* Compatibility */ | ||
| 15 | #define IRQ_LCD_FIFO IRQ_LCD0 | 110 | #define IRQ_LCD_FIFO IRQ_LCD0 |
| 16 | #define IRQ_LCD_VSYNC IRQ_LCD1 | 111 | #define IRQ_LCD_VSYNC IRQ_LCD1 |
| 17 | #define IRQ_LCD_SYSTEM IRQ_LCD2 | 112 | #define IRQ_LCD_SYSTEM IRQ_LCD2 |
| 18 | 113 | ||
| 19 | #endif /* __ASM_ARCH_IRQ_H */ | 114 | #endif /* __ASM_ARCH_IRQS_H */ |
diff --git a/arch/arm/mach-s5pc100/include/mach/map.h b/arch/arm/mach-s5pc100/include/mach/map.h index 4681ebe8bef6..cadae4305688 100644 --- a/arch/arm/mach-s5pc100/include/mach/map.h +++ b/arch/arm/mach-s5pc100/include/mach/map.h | |||
| @@ -3,9 +3,7 @@ | |||
| 3 | * Copyright 2009 Samsung Electronics Co. | 3 | * Copyright 2009 Samsung Electronics Co. |
| 4 | * Byungho Min <bhmin@samsung.com> | 4 | * Byungho Min <bhmin@samsung.com> |
| 5 | * | 5 | * |
| 6 | * Based on mach-s3c6400/include/mach/map.h | 6 | * S5PC100 - Memory map definitions |
| 7 | * | ||
| 8 | * S5PC1XX - Memory map definitions | ||
| 9 | * | 7 | * |
| 10 | * This program is free software; you can redistribute it and/or modify | 8 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License version 2 as | 9 | * it under the terms of the GNU General Public License version 2 as |
| @@ -16,6 +14,7 @@ | |||
| 16 | #define __ASM_ARCH_MAP_H __FILE__ | 14 | #define __ASM_ARCH_MAP_H __FILE__ |
| 17 | 15 | ||
| 18 | #include <plat/map-base.h> | 16 | #include <plat/map-base.h> |
| 17 | #include <plat/map-s5p.h> | ||
| 19 | 18 | ||
| 20 | /* | 19 | /* |
| 21 | * map-base.h has already defined virtual memory address | 20 | * map-base.h has already defined virtual memory address |
| @@ -31,25 +30,21 @@ | |||
| 31 | * | 30 | * |
| 32 | */ | 31 | */ |
| 33 | 32 | ||
| 33 | #define S5PC100_PA_ONENAND_BUF (0xB0000000) | ||
| 34 | #define S5PC100_SZ_ONENAND_BUF (SZ_256M - SZ_32M) | ||
| 35 | |||
| 34 | /* Chip ID */ | 36 | /* Chip ID */ |
| 37 | |||
| 35 | #define S5PC100_PA_CHIPID (0xE0000000) | 38 | #define S5PC100_PA_CHIPID (0xE0000000) |
| 36 | #define S5PC1XX_PA_CHIPID S5PC100_PA_CHIPID | 39 | #define S5P_PA_CHIPID S5PC100_PA_CHIPID |
| 37 | #define S5PC1XX_VA_CHIPID S3C_VA_SYS | 40 | |
| 38 | 41 | #define S5PC100_PA_SYSCON (0xE0100000) | |
| 39 | /* System */ | 42 | #define S5P_PA_SYSCON S5PC100_PA_SYSCON |
| 40 | #define S5PC100_PA_CLK (0xE0100000) | 43 | |
| 41 | #define S5PC100_PA_CLK_OTHER (0xE0200000) | 44 | #define S5PC100_PA_OTHERS (0xE0200000) |
| 42 | #define S5PC100_PA_PWR (0xE0108000) | 45 | #define S5PC100_VA_OTHERS (S3C_VA_SYS + 0x10000) |
| 43 | #define S5PC1XX_PA_CLK S5PC100_PA_CLK | 46 | |
| 44 | #define S5PC1XX_PA_PWR S5PC100_PA_PWR | 47 | #define S5P_PA_GPIO (0xE0300000) |
| 45 | #define S5PC1XX_PA_CLK_OTHER S5PC100_PA_CLK_OTHER | ||
| 46 | #define S5PC1XX_VA_CLK (S3C_VA_SYS + 0x10000) | ||
| 47 | #define S5PC1XX_VA_PWR (S3C_VA_SYS + 0x20000) | ||
| 48 | #define S5PC1XX_VA_CLK_OTHER (S3C_VA_SYS + 0x30000) | ||
| 49 | |||
| 50 | /* GPIO */ | ||
| 51 | #define S5PC100_PA_GPIO (0xE0300000) | ||
| 52 | #define S5PC1XX_PA_GPIO S5PC100_PA_GPIO | ||
| 53 | #define S5PC1XX_VA_GPIO S3C_ADDR(0x00500000) | 48 | #define S5PC1XX_VA_GPIO S3C_ADDR(0x00500000) |
| 54 | 49 | ||
| 55 | /* Interrupt */ | 50 | /* Interrupt */ |
| @@ -59,6 +54,12 @@ | |||
| 59 | #define S5PC100_VA_VIC_OFFSET 0x10000 | 54 | #define S5PC100_VA_VIC_OFFSET 0x10000 |
| 60 | #define S5PC1XX_PA_VIC(x) (S5PC100_PA_VIC + ((x) * S5PC100_PA_VIC_OFFSET)) | 55 | #define S5PC1XX_PA_VIC(x) (S5PC100_PA_VIC + ((x) * S5PC100_PA_VIC_OFFSET)) |
| 61 | #define S5PC1XX_VA_VIC(x) (S5PC100_VA_VIC + ((x) * S5PC100_VA_VIC_OFFSET)) | 56 | #define S5PC1XX_VA_VIC(x) (S5PC100_VA_VIC + ((x) * S5PC100_VA_VIC_OFFSET)) |
| 57 | #define S5P_PA_VIC0 S5PC1XX_PA_VIC(0) | ||
| 58 | #define S5P_PA_VIC1 S5PC1XX_PA_VIC(1) | ||
| 59 | #define S5P_PA_VIC2 S5PC1XX_PA_VIC(2) | ||
| 60 | |||
| 61 | |||
| 62 | #define S5PC100_PA_ONENAND (0xE7100000) | ||
| 62 | 63 | ||
| 63 | /* DMA */ | 64 | /* DMA */ |
| 64 | #define S5PC100_PA_MDMA (0xE8100000) | 65 | #define S5PC100_PA_MDMA (0xE8100000) |
| @@ -67,84 +68,71 @@ | |||
| 67 | 68 | ||
| 68 | /* Timer */ | 69 | /* Timer */ |
| 69 | #define S5PC100_PA_TIMER (0xEA000000) | 70 | #define S5PC100_PA_TIMER (0xEA000000) |
| 70 | #define S5PC1XX_PA_TIMER S5PC100_PA_TIMER | 71 | #define S5P_PA_TIMER S5PC100_PA_TIMER |
| 71 | #define S5PC1XX_VA_TIMER S3C_VA_TIMER | ||
| 72 | 72 | ||
| 73 | /* RTC */ | 73 | #define S5PC100_PA_SYSTIMER (0xEA100000) |
| 74 | #define S5PC100_PA_RTC (0xEA300000) | ||
| 75 | 74 | ||
| 76 | /* UART */ | ||
| 77 | #define S5PC100_PA_UART (0xEC000000) | 75 | #define S5PC100_PA_UART (0xEC000000) |
| 78 | #define S5PC1XX_PA_UART S5PC100_PA_UART | ||
| 79 | #define S5PC1XX_VA_UART S3C_VA_UART | ||
| 80 | 76 | ||
| 81 | /* I2C */ | 77 | #define S5P_PA_UART0 (S5PC100_PA_UART + 0x0) |
| 82 | #define S5PC100_PA_I2C (0xEC100000) | 78 | #define S5P_PA_UART1 (S5PC100_PA_UART + 0x400) |
| 83 | #define S5PC100_PA_I2C1 (0xEC200000) | 79 | #define S5P_PA_UART2 (S5PC100_PA_UART + 0x800) |
| 80 | #define S5P_PA_UART3 (S5PC100_PA_UART + 0xC00) | ||
| 81 | #define S5P_SZ_UART SZ_256 | ||
| 82 | |||
| 83 | #define S5PC100_PA_IIC0 (0xEC100000) | ||
| 84 | #define S5PC100_PA_IIC1 (0xEC200000) | ||
| 85 | |||
| 86 | /* SPI */ | ||
| 87 | #define S5PC100_PA_SPI0 0xEC300000 | ||
| 88 | #define S5PC100_PA_SPI1 0xEC400000 | ||
| 89 | #define S5PC100_PA_SPI2 0xEC500000 | ||
| 84 | 90 | ||
| 85 | /* USB HS OTG */ | 91 | /* USB HS OTG */ |
| 86 | #define S5PC100_PA_USB_HSOTG (0xED200000) | 92 | #define S5PC100_PA_USB_HSOTG (0xED200000) |
| 87 | #define S5PC100_PA_USB_HSPHY (0xED300000) | 93 | #define S5PC100_PA_USB_HSPHY (0xED300000) |
| 88 | 94 | ||
| 89 | /* SD/MMC */ | ||
| 90 | #define S5PC100_PA_HSMMC(x) (0xED800000 + ((x) * 0x100000)) | ||
| 91 | #define S5PC100_PA_HSMMC0 S5PC100_PA_HSMMC(0) | ||
| 92 | #define S5PC100_PA_HSMMC1 S5PC100_PA_HSMMC(1) | ||
| 93 | #define S5PC100_PA_HSMMC2 S5PC100_PA_HSMMC(2) | ||
| 94 | |||
| 95 | /* LCD */ | ||
| 96 | #define S5PC100_PA_FB (0xEE000000) | 95 | #define S5PC100_PA_FB (0xEE000000) |
| 97 | 96 | ||
| 98 | /* Multimedia */ | ||
| 99 | #define S5PC100_PA_G2D (0xEE800000) | ||
| 100 | #define S5PC100_PA_JPEG (0xEE500000) | ||
| 101 | #define S5PC100_PA_ROTATOR (0xEE100000) | ||
| 102 | #define S5PC100_PA_G3D (0xEF000000) | ||
| 103 | |||
| 104 | /* I2S */ | ||
| 105 | #define S5PC100_PA_I2S0 (0xF2000000) | 97 | #define S5PC100_PA_I2S0 (0xF2000000) |
| 106 | #define S5PC100_PA_I2S1 (0xF2100000) | 98 | #define S5PC100_PA_I2S1 (0xF2100000) |
| 107 | #define S5PC100_PA_I2S2 (0xF2200000) | 99 | #define S5PC100_PA_I2S2 (0xF2200000) |
| 108 | 100 | ||
| 101 | #define S5PC100_PA_AC97 0xF2300000 | ||
| 102 | |||
| 103 | /* PCM */ | ||
| 104 | #define S5PC100_PA_PCM0 0xF2400000 | ||
| 105 | #define S5PC100_PA_PCM1 0xF2500000 | ||
| 106 | |||
| 109 | /* KEYPAD */ | 107 | /* KEYPAD */ |
| 110 | #define S5PC100_PA_KEYPAD (0xF3100000) | 108 | #define S5PC100_PA_KEYPAD (0xF3100000) |
| 111 | 109 | ||
| 112 | /* ADC & TouchScreen */ | 110 | #define S5PC100_PA_HSMMC(x) (0xED800000 + ((x) * 0x100000)) |
| 113 | #define S5PC100_PA_TSADC (0xF3000000) | ||
| 114 | 111 | ||
| 115 | /* ETC */ | ||
| 116 | #define S5PC100_PA_SDRAM (0x20000000) | 112 | #define S5PC100_PA_SDRAM (0x20000000) |
| 117 | #define S5PC1XX_PA_SDRAM S5PC100_PA_SDRAM | 113 | #define S5P_PA_SDRAM S5PC100_PA_SDRAM |
| 118 | 114 | ||
| 119 | /* compatibility defines. */ | 115 | /* compatibiltiy defines. */ |
| 120 | #define S3C_PA_RTC S5PC100_PA_RTC | ||
| 121 | #define S3C_PA_UART S5PC100_PA_UART | 116 | #define S3C_PA_UART S5PC100_PA_UART |
| 122 | #define S3C_PA_UART0 (S5PC100_PA_UART + 0x0) | 117 | #define S3C_PA_IIC S5PC100_PA_IIC0 |
| 123 | #define S3C_PA_UART1 (S5PC100_PA_UART + 0x400) | 118 | #define S3C_PA_IIC1 S5PC100_PA_IIC1 |
| 124 | #define S3C_PA_UART2 (S5PC100_PA_UART + 0x800) | ||
| 125 | #define S3C_PA_UART3 (S5PC100_PA_UART + 0xC00) | ||
| 126 | #define S3C_VA_UART0 (S3C_VA_UART + 0x0) | ||
| 127 | #define S3C_VA_UART1 (S3C_VA_UART + 0x400) | ||
| 128 | #define S3C_VA_UART2 (S3C_VA_UART + 0x800) | ||
| 129 | #define S3C_VA_UART3 (S3C_VA_UART + 0xC00) | ||
| 130 | #define S3C_UART_OFFSET 0x400 | ||
| 131 | #define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET)) | ||
| 132 | #define S3C_PA_FB S5PC100_PA_FB | 119 | #define S3C_PA_FB S5PC100_PA_FB |
| 133 | #define S3C_PA_G2D S5PC100_PA_G2D | 120 | #define S3C_PA_G2D S5PC100_PA_G2D |
| 134 | #define S3C_PA_G3D S5PC100_PA_G3D | 121 | #define S3C_PA_G3D S5PC100_PA_G3D |
| 135 | #define S3C_PA_JPEG S5PC100_PA_JPEG | 122 | #define S3C_PA_JPEG S5PC100_PA_JPEG |
| 136 | #define S3C_PA_ROTATOR S5PC100_PA_ROTATOR | 123 | #define S3C_PA_ROTATOR S5PC100_PA_ROTATOR |
| 137 | #define S3C_VA_VIC0 (S3C_VA_IRQ + 0x0) | 124 | #define S5P_VA_VIC0 S5PC1XX_VA_VIC(0) |
| 138 | #define S3C_VA_VIC1 (S3C_VA_IRQ + 0x10000) | 125 | #define S5P_VA_VIC1 S5PC1XX_VA_VIC(1) |
| 139 | #define S3C_VA_VIC2 (S3C_VA_IRQ + 0x20000) | 126 | #define S5P_VA_VIC2 S5PC1XX_VA_VIC(2) |
| 140 | #define S3C_PA_IIC S5PC100_PA_I2C | ||
| 141 | #define S3C_PA_IIC1 S5PC100_PA_I2C1 | ||
| 142 | #define S3C_PA_USB_HSOTG S5PC100_PA_USB_HSOTG | 127 | #define S3C_PA_USB_HSOTG S5PC100_PA_USB_HSOTG |
| 143 | #define S3C_PA_USB_HSPHY S5PC100_PA_USB_HSPHY | 128 | #define S3C_PA_USB_HSPHY S5PC100_PA_USB_HSPHY |
| 144 | #define S3C_PA_HSMMC0 S5PC100_PA_HSMMC0 | 129 | #define S3C_PA_HSMMC0 S5PC100_PA_HSMMC(0) |
| 145 | #define S3C_PA_HSMMC1 S5PC100_PA_HSMMC1 | 130 | #define S3C_PA_HSMMC1 S5PC100_PA_HSMMC(1) |
| 146 | #define S3C_PA_HSMMC2 S5PC100_PA_HSMMC2 | 131 | #define S3C_PA_HSMMC2 S5PC100_PA_HSMMC(2) |
| 147 | #define S3C_PA_KEYPAD S5PC100_PA_KEYPAD | 132 | #define S3C_PA_KEYPAD S5PC100_PA_KEYPAD |
| 148 | #define S3C_PA_TSADC S5PC100_PA_TSADC | 133 | #define S3C_PA_TSADC S5PC100_PA_TSADC |
| 134 | #define S3C_PA_ONENAND S5PC100_PA_ONENAND | ||
| 135 | #define S3C_PA_ONENAND_BUF S5PC100_PA_ONENAND_BUF | ||
| 136 | #define S3C_SZ_ONENAND_BUF S5PC100_SZ_ONENAND_BUF | ||
| 149 | 137 | ||
| 150 | #endif /* __ASM_ARCH_C100_MAP_H */ | 138 | #endif /* __ASM_ARCH_C100_MAP_H */ |
diff --git a/arch/arm/mach-s5pc100/include/mach/regs-clock.h b/arch/arm/mach-s5pc100/include/mach/regs-clock.h index f2283bdc941e..5d27d286d504 100644 --- a/arch/arm/mach-s5pc100/include/mach/regs-clock.h +++ b/arch/arm/mach-s5pc100/include/mach/regs-clock.h | |||
| @@ -17,6 +17,8 @@ | |||
| 17 | 17 | ||
| 18 | #define S5P_CLKREG(x) (S3C_VA_SYS + (x)) | 18 | #define S5P_CLKREG(x) (S3C_VA_SYS + (x)) |
| 19 | 19 | ||
| 20 | #define S5PC100_REG_OTHERS(x) (S5PC100_VA_OTHERS + (x)) | ||
| 21 | |||
| 20 | #define S5P_APLL_LOCK S5P_CLKREG(0x00) | 22 | #define S5P_APLL_LOCK S5P_CLKREG(0x00) |
| 21 | #define S5P_MPLL_LOCK S5P_CLKREG(0x04) | 23 | #define S5P_MPLL_LOCK S5P_CLKREG(0x04) |
| 22 | #define S5P_EPLL_LOCK S5P_CLKREG(0x08) | 24 | #define S5P_EPLL_LOCK S5P_CLKREG(0x08) |
| @@ -68,4 +70,8 @@ | |||
| 68 | #define S5P_CLKDIV1_PCLKD1_MASK (0x7<<16) | 70 | #define S5P_CLKDIV1_PCLKD1_MASK (0x7<<16) |
| 69 | #define S5P_CLKDIV1_PCLKD1_SHIFT (16) | 71 | #define S5P_CLKDIV1_PCLKD1_SHIFT (16) |
| 70 | 72 | ||
| 73 | #define S5PC100_SWRESET S5PC100_REG_OTHERS(0x000) | ||
| 74 | |||
| 75 | #define S5PC100_SWRESET_RESETVAL 0xc100 | ||
| 76 | |||
| 71 | #endif /* __ASM_ARCH_REGS_CLOCK_H */ | 77 | #endif /* __ASM_ARCH_REGS_CLOCK_H */ |
diff --git a/arch/arm/mach-s5pc100/include/mach/regs-gpio.h b/arch/arm/mach-s5pc100/include/mach/regs-gpio.h index 68666913354c..dd6295e1251d 100644 --- a/arch/arm/mach-s5pc100/include/mach/regs-gpio.h +++ b/arch/arm/mach-s5pc100/include/mach/regs-gpio.h | |||
| @@ -1,4 +1,4 @@ | |||
| 1 | /* linux/arch/arm/plat-s5pc1xx/include/plat/regs-gpio.h | 1 | /* linux/arch/arm/plat-s5pc100/include/plat/regs-gpio.h |
| 2 | * | 2 | * |
| 3 | * Copyright 2009 Samsung Electronics Co. | 3 | * Copyright 2009 Samsung Electronics Co. |
| 4 | * Byungho Min <bhmin@samsung.com> | 4 | * Byungho Min <bhmin@samsung.com> |
| @@ -12,7 +12,7 @@ | |||
| 12 | #include <mach/map.h> | 12 | #include <mach/map.h> |
| 13 | 13 | ||
| 14 | /* S5PC100 */ | 14 | /* S5PC100 */ |
| 15 | #define S5PC100_GPIO_BASE S5PC1XX_VA_GPIO | 15 | #define S5PC100_GPIO_BASE S5P_VA_GPIO |
| 16 | #define S5PC100_GPA0_BASE (S5PC100_GPIO_BASE + 0x0000) | 16 | #define S5PC100_GPA0_BASE (S5PC100_GPIO_BASE + 0x0000) |
| 17 | #define S5PC100_GPA1_BASE (S5PC100_GPIO_BASE + 0x0020) | 17 | #define S5PC100_GPA1_BASE (S5PC100_GPIO_BASE + 0x0020) |
| 18 | #define S5PC100_GPB_BASE (S5PC100_GPIO_BASE + 0x0040) | 18 | #define S5PC100_GPB_BASE (S5PC100_GPIO_BASE + 0x0040) |
| @@ -47,24 +47,29 @@ | |||
| 47 | #define S5PC100_GPL2_BASE (S5PC100_GPIO_BASE + 0x0360) | 47 | #define S5PC100_GPL2_BASE (S5PC100_GPIO_BASE + 0x0360) |
| 48 | #define S5PC100_GPL3_BASE (S5PC100_GPIO_BASE + 0x0380) | 48 | #define S5PC100_GPL3_BASE (S5PC100_GPIO_BASE + 0x0380) |
| 49 | #define S5PC100_GPL4_BASE (S5PC100_GPIO_BASE + 0x03A0) | 49 | #define S5PC100_GPL4_BASE (S5PC100_GPIO_BASE + 0x03A0) |
| 50 | #define S5PC100_EINT_BASE (S5PC100_GPIO_BASE + 0x0E00) | ||
| 51 | 50 | ||
| 52 | #define S5PC100_UHOST (S5PC100_GPIO_BASE + 0x0B68) | 51 | #define S5PC100EINT30CON (S5P_VA_GPIO + 0xE00) |
| 53 | #define S5PC100_PDNEN (S5PC100_GPIO_BASE + 0x0F80) | 52 | #define S5P_EINT_CON(x) (S5PC100EINT30CON + ((x) * 0x4)) |
| 54 | 53 | ||
| 55 | /* PDNEN */ | 54 | #define S5PC100EINT30FLTCON0 (S5P_VA_GPIO + 0xE80) |
| 56 | #define S5PC100_PDNEN_CFG_PDNEN (1 << 1) | 55 | #define S5P_EINT_FLTCON(x) (S5PC100EINT30FLTCON0 + ((x) * 0x4)) |
| 57 | #define S5PC100_PDNEN_CFG_AUTO (0 << 1) | ||
| 58 | #define S5PC100_PDNEN_POWERDOWN (1 << 0) | ||
| 59 | #define S5PC100_PDNEN_NORMAL (0 << 0) | ||
| 60 | 56 | ||
| 61 | /* Common part */ | 57 | #define S5PC100EINT30MASK (S5P_VA_GPIO + 0xF00) |
| 62 | /* External interrupt base is same at both s5pc100 and s5pc110 */ | 58 | #define S5P_EINT_MASK(x) (S5PC100EINT30MASK + ((x) * 0x4)) |
| 63 | #define S5PC1XX_EINT_BASE (S5PC100_EINT_BASE) | ||
| 64 | 59 | ||
| 65 | #define S5PC100_GPx_INPUT(__gpio) (0x0 << ((__gpio) * 4)) | 60 | #define S5PC100EINT30PEND (S5P_VA_GPIO + 0xF40) |
| 66 | #define S5PC100_GPx_OUTPUT(__gpio) (0x1 << ((__gpio) * 4)) | 61 | #define S5P_EINT_PEND(x) (S5PC100EINT30PEND + ((x) * 0x4)) |
| 67 | #define S5PC100_GPx_CONMASK(__gpio) (0xf << ((__gpio) * 4)) | 62 | |
| 63 | #define EINT_REG_NR(x) (EINT_OFFSET(x) >> 3) | ||
| 64 | |||
| 65 | #define eint_irq_to_bit(irq) (1 << (EINT_OFFSET(irq) & 0x7)) | ||
| 66 | |||
| 67 | /* values for S5P_EXTINT0 */ | ||
| 68 | #define S5P_EXTINT_LOWLEV (0x00) | ||
| 69 | #define S5P_EXTINT_HILEV (0x01) | ||
| 70 | #define S5P_EXTINT_FALLEDGE (0x02) | ||
| 71 | #define S5P_EXTINT_RISEEDGE (0x03) | ||
| 72 | #define S5P_EXTINT_BOTHEDGE (0x04) | ||
| 68 | 73 | ||
| 69 | #endif /* __ASM_MACH_S5PC100_REGS_GPIO_H */ | 74 | #endif /* __ASM_MACH_S5PC100_REGS_GPIO_H */ |
| 70 | 75 | ||
diff --git a/arch/arm/mach-s5pc100/include/mach/regs-irq.h b/arch/arm/mach-s5pc100/include/mach/regs-irq.h index 751ac15438c8..4d9036d0f288 100644 --- a/arch/arm/mach-s5pc100/include/mach/regs-irq.h +++ b/arch/arm/mach-s5pc100/include/mach/regs-irq.h | |||
| @@ -3,7 +3,7 @@ | |||
| 3 | * Copyright 2009 Samsung Electronics Co. | 3 | * Copyright 2009 Samsung Electronics Co. |
| 4 | * Byungho Min <bhmin@samsung.com> | 4 | * Byungho Min <bhmin@samsung.com> |
| 5 | * | 5 | * |
| 6 | * S5PC1XX - IRQ register definitions | 6 | * S5PC100 - IRQ register definitions |
| 7 | * | 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify | 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as | 9 | * it under the terms of the GNU General Public License version 2 as |
| @@ -16,9 +16,4 @@ | |||
| 16 | #include <mach/map.h> | 16 | #include <mach/map.h> |
| 17 | #include <asm/hardware/vic.h> | 17 | #include <asm/hardware/vic.h> |
| 18 | 18 | ||
| 19 | /* interrupt controller */ | ||
| 20 | #define S5PC1XX_VIC0REG(x) ((x) + S5PC1XX_VA_VIC(0)) | ||
| 21 | #define S5PC1XX_VIC1REG(x) ((x) + S5PC1XX_VA_VIC(1)) | ||
| 22 | #define S5PC1XX_VIC2REG(x) ((x) + S5PC1XX_VA_VIC(2)) | ||
| 23 | |||
| 24 | #endif /* __ASM_ARCH_REGS_IRQ_H */ | 19 | #endif /* __ASM_ARCH_REGS_IRQ_H */ |
diff --git a/arch/arm/mach-s5pc100/include/mach/spi-clocks.h b/arch/arm/mach-s5pc100/include/mach/spi-clocks.h new file mode 100644 index 000000000000..65e426370bb2 --- /dev/null +++ b/arch/arm/mach-s5pc100/include/mach/spi-clocks.h | |||
| @@ -0,0 +1,18 @@ | |||
| 1 | /* linux/arch/arm/mach-s5pc100/include/mach/spi-clocks.h | ||
| 2 | * | ||
| 3 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
| 4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #ifndef __S5PC100_PLAT_SPI_CLKS_H | ||
| 12 | #define __S5PC100_PLAT_SPI_CLKS_H __FILE__ | ||
| 13 | |||
| 14 | #define S5PC100_SPI_SRCCLK_PCLK 0 | ||
| 15 | #define S5PC100_SPI_SRCCLK_48M 1 | ||
| 16 | #define S5PC100_SPI_SRCCLK_SPIBUS 2 | ||
| 17 | |||
| 18 | #endif /* __S5PC100_PLAT_SPI_CLKS_H */ | ||
diff --git a/arch/arm/mach-s5pc100/include/mach/system.h b/arch/arm/mach-s5pc100/include/mach/system.h index f0d31a2a598c..681f626a9ae1 100644 --- a/arch/arm/mach-s5pc100/include/mach/system.h +++ b/arch/arm/mach-s5pc100/include/mach/system.h | |||
| @@ -3,7 +3,7 @@ | |||
| 3 | * Copyright 2009 Samsung Electronics Co. | 3 | * Copyright 2009 Samsung Electronics Co. |
| 4 | * Byungho Min <bhmin@samsung.com> | 4 | * Byungho Min <bhmin@samsung.com> |
| 5 | * | 5 | * |
| 6 | * S5PC1XX - system implementation | 6 | * S5PC100 - system implementation |
| 7 | * | 7 | * |
| 8 | * Based on mach-s3c6400/include/mach/system.h | 8 | * Based on mach-s3c6400/include/mach/system.h |
| 9 | */ | 9 | */ |
| @@ -13,14 +13,11 @@ | |||
| 13 | 13 | ||
| 14 | #include <linux/io.h> | 14 | #include <linux/io.h> |
| 15 | #include <mach/map.h> | 15 | #include <mach/map.h> |
| 16 | #include <plat/regs-clock.h> | 16 | #include <mach/regs-clock.h> |
| 17 | |||
| 18 | void (*s5pc1xx_idle)(void); | ||
| 19 | 17 | ||
| 20 | static void arch_idle(void) | 18 | static void arch_idle(void) |
| 21 | { | 19 | { |
| 22 | if (s5pc1xx_idle) | 20 | /* nothing here yet */ |
| 23 | s5pc1xx_idle(); | ||
| 24 | } | 21 | } |
| 25 | 22 | ||
| 26 | static void arch_reset(char mode, const char *cmd) | 23 | static void arch_reset(char mode, const char *cmd) |
diff --git a/arch/arm/mach-s5pc100/include/mach/tick.h b/arch/arm/mach-s5pc100/include/mach/tick.h index f338c9eec717..20f68730ed18 100644 --- a/arch/arm/mach-s5pc100/include/mach/tick.h +++ b/arch/arm/mach-s5pc100/include/mach/tick.h | |||
| @@ -20,8 +20,8 @@ | |||
| 20 | */ | 20 | */ |
| 21 | static inline u32 s3c24xx_ostimer_pending(void) | 21 | static inline u32 s3c24xx_ostimer_pending(void) |
| 22 | { | 22 | { |
| 23 | u32 pend = __raw_readl(S3C_VA_VIC0 + VIC_RAW_STATUS); | 23 | u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS); |
| 24 | return pend & 1 << (IRQ_TIMER4_VIC - S5PC1XX_IRQ_VIC0(0)); | 24 | return pend & (1 << (IRQ_TIMER4_VIC - S5P_IRQ_VIC0(0))); |
| 25 | } | 25 | } |
| 26 | 26 | ||
| 27 | #define TICK_MAX (0xffffffff) | 27 | #define TICK_MAX (0xffffffff) |
diff --git a/arch/arm/plat-s5pc1xx/s5pc100-init.c b/arch/arm/mach-s5pc100/init.c index c58710884ceb..19d7b523c137 100644 --- a/arch/arm/plat-s5pc1xx/s5pc100-init.c +++ b/arch/arm/mach-s5pc100/init.c | |||
| @@ -1,9 +1,8 @@ | |||
| 1 | /* linux/arch/arm/plat-s5pc1xx/s5pc100-init.c | 1 | /* linux/arch/arm/plat-s5pc100/s5pc100-init.c |
| 2 | * | 2 | * |
| 3 | * Copyright 2009 Samsung Electronics Co. | 3 | * Copyright 2009 Samsung Electronics Co. |
| 4 | * Byungho Min <bhmin@samsung.com> | 4 | * Byungho Min <bhmin@samsung.com> |
| 5 | * | 5 | * |
| 6 | * S5PC100 - CPU initialisation (common with other S5PC1XX chips) | ||
| 7 | * | 6 | * |
| 8 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as | 8 | * it under the terms of the GNU General Public License version 2 as |
| @@ -19,9 +18,7 @@ | |||
| 19 | #include <plat/s5pc100.h> | 18 | #include <plat/s5pc100.h> |
| 20 | 19 | ||
| 21 | /* uart registration process */ | 20 | /* uart registration process */ |
| 22 | |||
| 23 | void __init s5pc100_common_init_uarts(struct s3c2410_uartcfg *cfg, int no) | 21 | void __init s5pc100_common_init_uarts(struct s3c2410_uartcfg *cfg, int no) |
| 24 | { | 22 | { |
| 25 | /* The driver name is s3c6400-uart to reuse s3c6400_serial_drv */ | 23 | s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no); |
| 26 | s3c24xx_init_uartdevs("s3c6400-uart", s5pc1xx_uart_resources, cfg, no); | ||
| 27 | } | 24 | } |
diff --git a/arch/arm/plat-s5pc1xx/irq-gpio.c b/arch/arm/mach-s5pc100/irq-gpio.c index fecca7a679b0..2bf86c18bc73 100644 --- a/arch/arm/plat-s5pc1xx/irq-gpio.c +++ b/arch/arm/mach-s5pc100/irq-gpio.c | |||
| @@ -1,9 +1,9 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * arch/arm/plat-s5pc1xx/irq-gpio.c | 2 | * arch/arm/mach-s5pc100/irq-gpio.c |
| 3 | * | 3 | * |
| 4 | * Copyright (C) 2009 Samsung Electronics | 4 | * Copyright (C) 2009 Samsung Electronics |
| 5 | * | 5 | * |
| 6 | * S5PC1XX - Interrupt handling for IRQ_GPIO${group}(x) | 6 | * S5PC100 - Interrupt handling for IRQ_GPIO${group}(x) |
| 7 | * | 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify | 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as | 9 | * it under the terms of the GNU General Public License version 2 as |
| @@ -19,7 +19,7 @@ | |||
| 19 | #include <mach/map.h> | 19 | #include <mach/map.h> |
| 20 | #include <plat/gpio-cfg.h> | 20 | #include <plat/gpio-cfg.h> |
| 21 | 21 | ||
| 22 | #define S5PC1XX_GPIOREG(x) (S5PC1XX_VA_GPIO + (x)) | 22 | #define S5P_GPIOREG(x) (S5P_VA_GPIO + (x)) |
| 23 | 23 | ||
| 24 | #define CON_OFFSET 0x700 | 24 | #define CON_OFFSET 0x700 |
| 25 | #define MASK_OFFSET 0x900 | 25 | #define MASK_OFFSET 0x900 |
| @@ -49,7 +49,7 @@ static int group_to_pend_offset(int group) | |||
| 49 | return group << 2; | 49 | return group << 2; |
| 50 | } | 50 | } |
| 51 | 51 | ||
| 52 | static int s5pc1xx_get_start(unsigned int group) | 52 | static int s5pc100_get_start(unsigned int group) |
| 53 | { | 53 | { |
| 54 | switch (group) { | 54 | switch (group) { |
| 55 | case 0: return S5PC100_GPIO_A0_START; | 55 | case 0: return S5PC100_GPIO_A0_START; |
| @@ -80,7 +80,7 @@ static int s5pc1xx_get_start(unsigned int group) | |||
| 80 | return -EINVAL; | 80 | return -EINVAL; |
| 81 | } | 81 | } |
| 82 | 82 | ||
| 83 | static int s5pc1xx_get_group(unsigned int irq) | 83 | static int s5pc100_get_group(unsigned int irq) |
| 84 | { | 84 | { |
| 85 | irq -= S3C_IRQ_GPIO(0); | 85 | irq -= S3C_IRQ_GPIO(0); |
| 86 | 86 | ||
| @@ -134,67 +134,67 @@ static int s5pc1xx_get_group(unsigned int irq) | |||
| 134 | return -EINVAL; | 134 | return -EINVAL; |
| 135 | } | 135 | } |
| 136 | 136 | ||
| 137 | static int s5pc1xx_get_offset(unsigned int irq) | 137 | static int s5pc100_get_offset(unsigned int irq) |
| 138 | { | 138 | { |
| 139 | struct gpio_chip *chip = get_irq_data(irq); | 139 | struct gpio_chip *chip = get_irq_data(irq); |
| 140 | return irq - S3C_IRQ_GPIO(chip->base); | 140 | return irq - S3C_IRQ_GPIO(chip->base); |
| 141 | } | 141 | } |
| 142 | 142 | ||
| 143 | static void s5pc1xx_gpioint_ack(unsigned int irq) | 143 | static void s5pc100_gpioint_ack(unsigned int irq) |
| 144 | { | 144 | { |
| 145 | int group, offset, pend_offset; | 145 | int group, offset, pend_offset; |
| 146 | unsigned int value; | 146 | unsigned int value; |
| 147 | 147 | ||
| 148 | group = s5pc1xx_get_group(irq); | 148 | group = s5pc100_get_group(irq); |
| 149 | offset = s5pc1xx_get_offset(irq); | 149 | offset = s5pc100_get_offset(irq); |
| 150 | pend_offset = group_to_pend_offset(group); | 150 | pend_offset = group_to_pend_offset(group); |
| 151 | 151 | ||
| 152 | value = __raw_readl(S5PC1XX_GPIOREG(PEND_OFFSET) + pend_offset); | 152 | value = __raw_readl(S5P_GPIOREG(PEND_OFFSET) + pend_offset); |
| 153 | value |= 1 << offset; | 153 | value |= 1 << offset; |
| 154 | __raw_writel(value, S5PC1XX_GPIOREG(PEND_OFFSET) + pend_offset); | 154 | __raw_writel(value, S5P_GPIOREG(PEND_OFFSET) + pend_offset); |
| 155 | } | 155 | } |
| 156 | 156 | ||
| 157 | static void s5pc1xx_gpioint_mask(unsigned int irq) | 157 | static void s5pc100_gpioint_mask(unsigned int irq) |
| 158 | { | 158 | { |
| 159 | int group, offset, mask_offset; | 159 | int group, offset, mask_offset; |
| 160 | unsigned int value; | 160 | unsigned int value; |
| 161 | 161 | ||
| 162 | group = s5pc1xx_get_group(irq); | 162 | group = s5pc100_get_group(irq); |
| 163 | offset = s5pc1xx_get_offset(irq); | 163 | offset = s5pc100_get_offset(irq); |
| 164 | mask_offset = group_to_mask_offset(group); | 164 | mask_offset = group_to_mask_offset(group); |
| 165 | 165 | ||
| 166 | value = __raw_readl(S5PC1XX_GPIOREG(MASK_OFFSET) + mask_offset); | 166 | value = __raw_readl(S5P_GPIOREG(MASK_OFFSET) + mask_offset); |
| 167 | value |= 1 << offset; | 167 | value |= 1 << offset; |
| 168 | __raw_writel(value, S5PC1XX_GPIOREG(MASK_OFFSET) + mask_offset); | 168 | __raw_writel(value, S5P_GPIOREG(MASK_OFFSET) + mask_offset); |
| 169 | } | 169 | } |
| 170 | 170 | ||
| 171 | static void s5pc1xx_gpioint_unmask(unsigned int irq) | 171 | static void s5pc100_gpioint_unmask(unsigned int irq) |
| 172 | { | 172 | { |
| 173 | int group, offset, mask_offset; | 173 | int group, offset, mask_offset; |
| 174 | unsigned int value; | 174 | unsigned int value; |
| 175 | 175 | ||
| 176 | group = s5pc1xx_get_group(irq); | 176 | group = s5pc100_get_group(irq); |
| 177 | offset = s5pc1xx_get_offset(irq); | 177 | offset = s5pc100_get_offset(irq); |
| 178 | mask_offset = group_to_mask_offset(group); | 178 | mask_offset = group_to_mask_offset(group); |
| 179 | 179 | ||
| 180 | value = __raw_readl(S5PC1XX_GPIOREG(MASK_OFFSET) + mask_offset); | 180 | value = __raw_readl(S5P_GPIOREG(MASK_OFFSET) + mask_offset); |
| 181 | value &= ~(1 << offset); | 181 | value &= ~(1 << offset); |
| 182 | __raw_writel(value, S5PC1XX_GPIOREG(MASK_OFFSET) + mask_offset); | 182 | __raw_writel(value, S5P_GPIOREG(MASK_OFFSET) + mask_offset); |
| 183 | } | 183 | } |
| 184 | 184 | ||
| 185 | static void s5pc1xx_gpioint_mask_ack(unsigned int irq) | 185 | static void s5pc100_gpioint_mask_ack(unsigned int irq) |
| 186 | { | 186 | { |
| 187 | s5pc1xx_gpioint_mask(irq); | 187 | s5pc100_gpioint_mask(irq); |
| 188 | s5pc1xx_gpioint_ack(irq); | 188 | s5pc100_gpioint_ack(irq); |
| 189 | } | 189 | } |
| 190 | 190 | ||
| 191 | static int s5pc1xx_gpioint_set_type(unsigned int irq, unsigned int type) | 191 | static int s5pc100_gpioint_set_type(unsigned int irq, unsigned int type) |
| 192 | { | 192 | { |
| 193 | int group, offset, con_offset; | 193 | int group, offset, con_offset; |
| 194 | unsigned int value; | 194 | unsigned int value; |
| 195 | 195 | ||
| 196 | group = s5pc1xx_get_group(irq); | 196 | group = s5pc100_get_group(irq); |
| 197 | offset = s5pc1xx_get_offset(irq); | 197 | offset = s5pc100_get_offset(irq); |
| 198 | con_offset = group_to_con_offset(group); | 198 | con_offset = group_to_con_offset(group); |
| 199 | 199 | ||
| 200 | switch (type) { | 200 | switch (type) { |
| @@ -221,24 +221,24 @@ static int s5pc1xx_gpioint_set_type(unsigned int irq, unsigned int type) | |||
| 221 | } | 221 | } |
| 222 | 222 | ||
| 223 | 223 | ||
| 224 | value = __raw_readl(S5PC1XX_GPIOREG(CON_OFFSET) + con_offset); | 224 | value = __raw_readl(S5P_GPIOREG(CON_OFFSET) + con_offset); |
| 225 | value &= ~(0xf << (offset * 0x4)); | 225 | value &= ~(0xf << (offset * 0x4)); |
| 226 | value |= (type << (offset * 0x4)); | 226 | value |= (type << (offset * 0x4)); |
| 227 | __raw_writel(value, S5PC1XX_GPIOREG(CON_OFFSET) + con_offset); | 227 | __raw_writel(value, S5P_GPIOREG(CON_OFFSET) + con_offset); |
| 228 | 228 | ||
| 229 | return 0; | 229 | return 0; |
| 230 | } | 230 | } |
| 231 | 231 | ||
| 232 | struct irq_chip s5pc1xx_gpioint = { | 232 | struct irq_chip s5pc100_gpioint = { |
| 233 | .name = "GPIO", | 233 | .name = "GPIO", |
| 234 | .ack = s5pc1xx_gpioint_ack, | 234 | .ack = s5pc100_gpioint_ack, |
| 235 | .mask = s5pc1xx_gpioint_mask, | 235 | .mask = s5pc100_gpioint_mask, |
| 236 | .mask_ack = s5pc1xx_gpioint_mask_ack, | 236 | .mask_ack = s5pc100_gpioint_mask_ack, |
| 237 | .unmask = s5pc1xx_gpioint_unmask, | 237 | .unmask = s5pc100_gpioint_unmask, |
| 238 | .set_type = s5pc1xx_gpioint_set_type, | 238 | .set_type = s5pc100_gpioint_set_type, |
| 239 | }; | 239 | }; |
| 240 | 240 | ||
| 241 | void s5pc1xx_irq_gpioint_handler(unsigned int irq, struct irq_desc *desc) | 241 | void s5pc100_irq_gpioint_handler(unsigned int irq, struct irq_desc *desc) |
| 242 | { | 242 | { |
| 243 | int group, offset, pend_offset, mask_offset; | 243 | int group, offset, pend_offset, mask_offset; |
| 244 | int real_irq, group_end; | 244 | int real_irq, group_end; |
| @@ -248,17 +248,17 @@ void s5pc1xx_irq_gpioint_handler(unsigned int irq, struct irq_desc *desc) | |||
| 248 | 248 | ||
| 249 | for (group = 0; group < group_end; group++) { | 249 | for (group = 0; group < group_end; group++) { |
| 250 | pend_offset = group_to_pend_offset(group); | 250 | pend_offset = group_to_pend_offset(group); |
| 251 | pend = __raw_readl(S5PC1XX_GPIOREG(PEND_OFFSET) + pend_offset); | 251 | pend = __raw_readl(S5P_GPIOREG(PEND_OFFSET) + pend_offset); |
| 252 | if (!pend) | 252 | if (!pend) |
| 253 | continue; | 253 | continue; |
| 254 | 254 | ||
| 255 | mask_offset = group_to_mask_offset(group); | 255 | mask_offset = group_to_mask_offset(group); |
| 256 | mask = __raw_readl(S5PC1XX_GPIOREG(MASK_OFFSET) + mask_offset); | 256 | mask = __raw_readl(S5P_GPIOREG(MASK_OFFSET) + mask_offset); |
| 257 | pend &= ~mask; | 257 | pend &= ~mask; |
| 258 | 258 | ||
| 259 | for (offset = 0; offset < 8; offset++) { | 259 | for (offset = 0; offset < 8; offset++) { |
| 260 | if (pend & (1 << offset)) { | 260 | if (pend & (1 << offset)) { |
| 261 | real_irq = s5pc1xx_get_start(group) + offset; | 261 | real_irq = s5pc100_get_start(group) + offset; |
| 262 | generic_handle_irq(S3C_IRQ_GPIO(real_irq)); | 262 | generic_handle_irq(S3C_IRQ_GPIO(real_irq)); |
| 263 | } | 263 | } |
| 264 | } | 264 | } |
diff --git a/arch/arm/mach-s5pc100/mach-smdkc100.c b/arch/arm/mach-s5pc100/mach-smdkc100.c index bfe67db34f04..af22f8202a07 100644 --- a/arch/arm/mach-s5pc100/mach-smdkc100.c +++ b/arch/arm/mach-s5pc100/mach-smdkc100.c | |||
| @@ -43,38 +43,48 @@ | |||
| 43 | #include <plat/fb.h> | 43 | #include <plat/fb.h> |
| 44 | #include <plat/iic.h> | 44 | #include <plat/iic.h> |
| 45 | 45 | ||
| 46 | #define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK) | 46 | /* Following are default values for UCON, ULCON and UFCON UART registers */ |
| 47 | #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) | 47 | #define S5PC100_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
| 48 | #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) | 48 | S3C2410_UCON_RXILEVEL | \ |
| 49 | S3C2410_UCON_TXIRQMODE | \ | ||
| 50 | S3C2410_UCON_RXIRQMODE | \ | ||
| 51 | S3C2410_UCON_RXFIFO_TOI | \ | ||
| 52 | S3C2443_UCON_RXERR_IRQEN) | ||
| 53 | |||
| 54 | #define S5PC100_ULCON_DEFAULT S3C2410_LCON_CS8 | ||
| 55 | |||
| 56 | #define S5PC100_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ | ||
| 57 | S3C2440_UFCON_RXTRIG8 | \ | ||
| 58 | S3C2440_UFCON_TXTRIG16) | ||
| 49 | 59 | ||
| 50 | static struct s3c2410_uartcfg smdkc100_uartcfgs[] __initdata = { | 60 | static struct s3c2410_uartcfg smdkc100_uartcfgs[] __initdata = { |
| 51 | [0] = { | 61 | [0] = { |
| 52 | .hwport = 0, | 62 | .hwport = 0, |
| 53 | .flags = 0, | 63 | .flags = 0, |
| 54 | .ucon = 0x3c5, | 64 | .ucon = S5PC100_UCON_DEFAULT, |
| 55 | .ulcon = 0x03, | 65 | .ulcon = S5PC100_ULCON_DEFAULT, |
| 56 | .ufcon = 0x51, | 66 | .ufcon = S5PC100_UFCON_DEFAULT, |
| 57 | }, | 67 | }, |
| 58 | [1] = { | 68 | [1] = { |
| 59 | .hwport = 1, | 69 | .hwport = 1, |
| 60 | .flags = 0, | 70 | .flags = 0, |
| 61 | .ucon = 0x3c5, | 71 | .ucon = S5PC100_UCON_DEFAULT, |
| 62 | .ulcon = 0x03, | 72 | .ulcon = S5PC100_ULCON_DEFAULT, |
| 63 | .ufcon = 0x51, | 73 | .ufcon = S5PC100_UFCON_DEFAULT, |
| 64 | }, | 74 | }, |
| 65 | [2] = { | 75 | [2] = { |
| 66 | .hwport = 2, | 76 | .hwport = 2, |
| 67 | .flags = 0, | 77 | .flags = 0, |
| 68 | .ucon = 0x3c5, | 78 | .ucon = S5PC100_UCON_DEFAULT, |
| 69 | .ulcon = 0x03, | 79 | .ulcon = S5PC100_ULCON_DEFAULT, |
| 70 | .ufcon = 0x51, | 80 | .ufcon = S5PC100_UFCON_DEFAULT, |
| 71 | }, | 81 | }, |
| 72 | [3] = { | 82 | [3] = { |
| 73 | .hwport = 3, | 83 | .hwport = 3, |
| 74 | .flags = 0, | 84 | .flags = 0, |
| 75 | .ucon = 0x3c5, | 85 | .ucon = S5PC100_UCON_DEFAULT, |
| 76 | .ulcon = 0x03, | 86 | .ulcon = S5PC100_ULCON_DEFAULT, |
| 77 | .ufcon = 0x51, | 87 | .ufcon = S5PC100_UFCON_DEFAULT, |
| 78 | }, | 88 | }, |
| 79 | }; | 89 | }; |
| 80 | 90 | ||
| @@ -118,8 +128,7 @@ static struct platform_device smdkc100_lcd_powerdev = { | |||
| 118 | static struct s3c_fb_pd_win smdkc100_fb_win0 = { | 128 | static struct s3c_fb_pd_win smdkc100_fb_win0 = { |
| 119 | /* this is to ensure we use win0 */ | 129 | /* this is to ensure we use win0 */ |
| 120 | .win_mode = { | 130 | .win_mode = { |
| 121 | .refresh = 70, | 131 | .pixclock = 1000000000000ULL / ((8+13+3+800)*(7+5+1+480)*80), |
| 122 | .pixclock = (8+13+3+800)*(7+5+1+480), | ||
| 123 | .left_margin = 8, | 132 | .left_margin = 8, |
| 124 | .right_margin = 13, | 133 | .right_margin = 13, |
| 125 | .upper_margin = 7, | 134 | .upper_margin = 7, |
| @@ -140,8 +149,6 @@ static struct s3c_fb_platdata smdkc100_lcd_pdata __initdata = { | |||
| 140 | .setup_gpio = s5pc100_fb_gpio_setup_24bpp, | 149 | .setup_gpio = s5pc100_fb_gpio_setup_24bpp, |
| 141 | }; | 150 | }; |
| 142 | 151 | ||
| 143 | static struct map_desc smdkc100_iodesc[] = {}; | ||
| 144 | |||
| 145 | static struct platform_device *smdkc100_devices[] __initdata = { | 152 | static struct platform_device *smdkc100_devices[] __initdata = { |
| 146 | &s3c_device_i2c0, | 153 | &s3c_device_i2c0, |
| 147 | &s3c_device_i2c1, | 154 | &s3c_device_i2c1, |
| @@ -150,11 +157,13 @@ static struct platform_device *smdkc100_devices[] __initdata = { | |||
| 150 | &s3c_device_hsmmc1, | 157 | &s3c_device_hsmmc1, |
| 151 | &s3c_device_hsmmc2, | 158 | &s3c_device_hsmmc2, |
| 152 | &smdkc100_lcd_powerdev, | 159 | &smdkc100_lcd_powerdev, |
| 160 | &s5pc100_device_iis0, | ||
| 161 | &s5pc100_device_ac97, | ||
| 153 | }; | 162 | }; |
| 154 | 163 | ||
| 155 | static void __init smdkc100_map_io(void) | 164 | static void __init smdkc100_map_io(void) |
| 156 | { | 165 | { |
| 157 | s5pc1xx_init_io(smdkc100_iodesc, ARRAY_SIZE(smdkc100_iodesc)); | 166 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); |
| 158 | s3c24xx_init_clocks(12000000); | 167 | s3c24xx_init_clocks(12000000); |
| 159 | s3c24xx_init_uarts(smdkc100_uartcfgs, ARRAY_SIZE(smdkc100_uartcfgs)); | 168 | s3c24xx_init_uarts(smdkc100_uartcfgs, ARRAY_SIZE(smdkc100_uartcfgs)); |
| 160 | } | 169 | } |
| @@ -178,10 +187,9 @@ static void __init smdkc100_machine_init(void) | |||
| 178 | 187 | ||
| 179 | MACHINE_START(SMDKC100, "SMDKC100") | 188 | MACHINE_START(SMDKC100, "SMDKC100") |
| 180 | /* Maintainer: Byungho Min <bhmin@samsung.com> */ | 189 | /* Maintainer: Byungho Min <bhmin@samsung.com> */ |
| 181 | .phys_io = S5PC100_PA_UART & 0xfff00000, | 190 | .phys_io = S3C_PA_UART & 0xfff00000, |
| 182 | .io_pg_offst = (((u32)S5PC1XX_VA_UART) >> 18) & 0xfffc, | 191 | .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, |
| 183 | .boot_params = S5PC100_PA_SDRAM + 0x100, | 192 | .boot_params = S5P_PA_SDRAM + 0x100, |
| 184 | |||
| 185 | .init_irq = s5pc100_init_irq, | 193 | .init_irq = s5pc100_init_irq, |
| 186 | .map_io = smdkc100_map_io, | 194 | .map_io = smdkc100_map_io, |
| 187 | .init_machine = smdkc100_machine_init, | 195 | .init_machine = smdkc100_machine_init, |
diff --git a/arch/arm/plat-s5pc1xx/setup-sdhci-gpio.c b/arch/arm/mach-s5pc100/setup-sdhci-gpio.c index 185c8941e644..7769c760c9ef 100644 --- a/arch/arm/plat-s5pc1xx/setup-sdhci-gpio.c +++ b/arch/arm/mach-s5pc100/setup-sdhci-gpio.c | |||
| @@ -1,8 +1,8 @@ | |||
| 1 | /* linux/arch/arm/plat-s5pc1xx/setup-sdhci-gpio.c | 1 | /* linux/arch/arm/plat-s5pc100/setup-sdhci-gpio.c |
| 2 | * | 2 | * |
| 3 | * Copyright 2009 Samsung Eletronics | 3 | * Copyright 2009 Samsung Eletronics |
| 4 | * | 4 | * |
| 5 | * S5PC1XX - Helper functions for setting up SDHCI device(s) GPIO (HSMMC) | 5 | * S5PC100 - Helper functions for setting up SDHCI device(s) GPIO (HSMMC) |
| 6 | * | 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as | 8 | * it under the terms of the GNU General Public License version 2 as |
diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig index 7601c28e240b..0761eac9aaea 100644 --- a/arch/arm/mach-s5pv210/Kconfig +++ b/arch/arm/mach-s5pv210/Kconfig | |||
| @@ -13,18 +13,68 @@ config CPU_S5PV210 | |||
| 13 | bool | 13 | bool |
| 14 | select PLAT_S5P | 14 | select PLAT_S5P |
| 15 | select S3C_PL330_DMA | 15 | select S3C_PL330_DMA |
| 16 | select S5P_EXT_INT | ||
| 16 | help | 17 | help |
| 17 | Enable S5PV210 CPU support | 18 | Enable S5PV210 CPU support |
| 18 | 19 | ||
| 19 | choice | 20 | config S5PV210_SETUP_I2C1 |
| 20 | prompt "Select machine type" | 21 | bool |
| 21 | depends on ARCH_S5PV210 | 22 | help |
| 22 | default MACH_SMDKV210 | 23 | Common setup code for i2c bus 1. |
| 24 | |||
| 25 | config S5PV210_SETUP_I2C2 | ||
| 26 | bool | ||
| 27 | help | ||
| 28 | Common setup code for i2c bus 2. | ||
| 29 | |||
| 30 | config S5PV210_SETUP_FB_24BPP | ||
| 31 | bool | ||
| 32 | help | ||
| 33 | Common setup code for S5PV210 with an 24bpp RGB display helper. | ||
| 34 | |||
| 35 | config S5PV210_SETUP_SDHCI | ||
| 36 | bool | ||
| 37 | select S5PV210_SETUP_SDHCI_GPIO | ||
| 38 | help | ||
| 39 | Internal helper functions for S5PV210 based SDHCI systems | ||
| 40 | |||
| 41 | config S5PV210_SETUP_SDHCI_GPIO | ||
| 42 | bool | ||
| 43 | help | ||
| 44 | Common setup code for SDHCI gpio. | ||
| 45 | |||
| 46 | # machine support | ||
| 47 | |||
| 48 | config MACH_AQUILA | ||
| 49 | bool "Samsung Aquila" | ||
| 50 | select CPU_S5PV210 | ||
| 51 | select ARCH_SPARSEMEM_ENABLE | ||
| 52 | select S5PV210_SETUP_FB_24BPP | ||
| 53 | select S3C_DEV_FB | ||
| 54 | help | ||
| 55 | Machine support for the Samsung Aquila target based on S5PC110 SoC | ||
| 56 | |||
| 57 | config MACH_GONI | ||
| 58 | bool "GONI" | ||
| 59 | select CPU_S5PV210 | ||
| 60 | select ARCH_SPARSEMEM_ENABLE | ||
| 61 | help | ||
| 62 | Machine support for Samsung GONI board | ||
| 63 | S5PC110(MCP) is one of package option of S5PV210 | ||
| 64 | |||
| 65 | config S5PC110_DEV_ONENAND | ||
| 66 | bool | ||
| 67 | help | ||
| 68 | Compile in platform device definition for OneNAND1 controller | ||
| 23 | 69 | ||
| 24 | config MACH_SMDKV210 | 70 | config MACH_SMDKV210 |
| 25 | bool "SMDKV210" | 71 | bool "SMDKV210" |
| 26 | select CPU_S5PV210 | 72 | select CPU_S5PV210 |
| 27 | select ARCH_SPARSEMEM_ENABLE | 73 | select ARCH_SPARSEMEM_ENABLE |
| 74 | select SAMSUNG_DEV_ADC | ||
| 75 | select SAMSUNG_DEV_TS | ||
| 76 | select S3C_DEV_WDT | ||
| 77 | select HAVE_S3C2410_WATCHDOG | ||
| 28 | help | 78 | help |
| 29 | Machine support for Samsung SMDKV210 | 79 | Machine support for Samsung SMDKV210 |
| 30 | 80 | ||
| @@ -32,10 +82,10 @@ config MACH_SMDKC110 | |||
| 32 | bool "SMDKC110" | 82 | bool "SMDKC110" |
| 33 | select CPU_S5PV210 | 83 | select CPU_S5PV210 |
| 34 | select ARCH_SPARSEMEM_ENABLE | 84 | select ARCH_SPARSEMEM_ENABLE |
| 85 | select S3C_DEV_WDT | ||
| 86 | select HAVE_S3C2410_WATCHDOG | ||
| 35 | help | 87 | help |
| 36 | Machine support for Samsung SMDKC110 | 88 | Machine support for Samsung SMDKC110 |
| 37 | S5PC110(MCP) is one of package option of S5PV210 | 89 | S5PC110(MCP) is one of package option of S5PV210 |
| 38 | 90 | ||
| 39 | endchoice | ||
| 40 | |||
| 41 | endif | 91 | endif |
diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile index 99827813d293..30be9a6a4620 100644 --- a/arch/arm/mach-s5pv210/Makefile +++ b/arch/arm/mach-s5pv210/Makefile | |||
| @@ -17,9 +17,19 @@ obj-$(CONFIG_CPU_S5PV210) += setup-i2c0.o | |||
| 17 | 17 | ||
| 18 | # machine support | 18 | # machine support |
| 19 | 19 | ||
| 20 | obj-$(CONFIG_MACH_AQUILA) += mach-aquila.o | ||
| 20 | obj-$(CONFIG_MACH_SMDKV210) += mach-smdkv210.o | 21 | obj-$(CONFIG_MACH_SMDKV210) += mach-smdkv210.o |
| 21 | obj-$(CONFIG_MACH_SMDKC110) += mach-smdkc110.o | 22 | obj-$(CONFIG_MACH_SMDKC110) += mach-smdkc110.o |
| 23 | obj-$(CONFIG_MACH_GONI) += mach-goni.o | ||
| 22 | 24 | ||
| 23 | # device support | 25 | # device support |
| 24 | 26 | ||
| 25 | obj-y += dev-audio.o | 27 | obj-y += dev-audio.o |
| 28 | obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o | ||
| 29 | obj-$(CONFIG_S5PC110_DEV_ONENAND) += dev-onenand.o | ||
| 30 | |||
| 31 | obj-$(CONFIG_S5PV210_SETUP_FB_24BPP) += setup-fb-24bpp.o | ||
| 32 | obj-$(CONFIG_S5PV210_SETUP_I2C1) += setup-i2c1.o | ||
| 33 | obj-$(CONFIG_S5PV210_SETUP_I2C2) += setup-i2c2.o | ||
| 34 | obj-$(CONFIG_S5PV210_SETUP_SDHCI) += setup-sdhci.o | ||
| 35 | obj-$(CONFIG_S5PV210_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o | ||
diff --git a/arch/arm/mach-s5pv210/cpu.c b/arch/arm/mach-s5pv210/cpu.c index 2b776eb5d150..411a4a9cbfc7 100644 --- a/arch/arm/mach-s5pv210/cpu.c +++ b/arch/arm/mach-s5pv210/cpu.c | |||
| @@ -32,6 +32,8 @@ | |||
| 32 | #include <plat/devs.h> | 32 | #include <plat/devs.h> |
| 33 | #include <plat/clock.h> | 33 | #include <plat/clock.h> |
| 34 | #include <plat/s5pv210.h> | 34 | #include <plat/s5pv210.h> |
| 35 | #include <plat/iic-core.h> | ||
| 36 | #include <plat/sdhci.h> | ||
| 35 | 37 | ||
| 36 | /* Initial IO mappings */ | 38 | /* Initial IO mappings */ |
| 37 | 39 | ||
| @@ -74,7 +76,21 @@ static void s5pv210_idle(void) | |||
| 74 | 76 | ||
| 75 | void __init s5pv210_map_io(void) | 77 | void __init s5pv210_map_io(void) |
| 76 | { | 78 | { |
| 79 | #ifdef CONFIG_S3C_DEV_ADC | ||
| 80 | s3c_device_adc.name = "s3c64xx-adc"; | ||
| 81 | #endif | ||
| 82 | |||
| 77 | iotable_init(s5pv210_iodesc, ARRAY_SIZE(s5pv210_iodesc)); | 83 | iotable_init(s5pv210_iodesc, ARRAY_SIZE(s5pv210_iodesc)); |
| 84 | |||
| 85 | /* initialise device information early */ | ||
| 86 | s5pv210_default_sdhci0(); | ||
| 87 | s5pv210_default_sdhci1(); | ||
| 88 | s5pv210_default_sdhci2(); | ||
| 89 | |||
| 90 | /* the i2c devices are directly compatible with s3c2440 */ | ||
| 91 | s3c_i2c0_setname("s3c2440-i2c"); | ||
| 92 | s3c_i2c1_setname("s3c2440-i2c"); | ||
| 93 | s3c_i2c2_setname("s3c2440-i2c"); | ||
| 78 | } | 94 | } |
| 79 | 95 | ||
| 80 | void __init s5pv210_init_clocks(int xtal) | 96 | void __init s5pv210_init_clocks(int xtal) |
diff --git a/arch/arm/mach-s5pv210/dev-onenand.c b/arch/arm/mach-s5pv210/dev-onenand.c new file mode 100644 index 000000000000..34997b752f93 --- /dev/null +++ b/arch/arm/mach-s5pv210/dev-onenand.c | |||
| @@ -0,0 +1,50 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/mach-s5pv210/dev-onenand.c | ||
| 3 | * | ||
| 4 | * Copyright (c) 2008-2010 Samsung Electronics | ||
| 5 | * Kyungmin Park <kyungmin.park@samsung.com> | ||
| 6 | * | ||
| 7 | * S5PC110 series device definition for OneNAND devices | ||
| 8 | * | ||
| 9 | * This program is free software; you can redistribute it and/or modify | ||
| 10 | * it under the terms of the GNU General Public License version 2 as | ||
| 11 | * published by the Free Software Foundation. | ||
| 12 | */ | ||
| 13 | |||
| 14 | #include <linux/kernel.h> | ||
| 15 | #include <linux/platform_device.h> | ||
| 16 | #include <linux/mtd/mtd.h> | ||
| 17 | #include <linux/mtd/onenand.h> | ||
| 18 | |||
| 19 | #include <mach/irqs.h> | ||
| 20 | #include <mach/map.h> | ||
| 21 | |||
| 22 | static struct resource s5pc110_onenand_resources[] = { | ||
| 23 | [0] = { | ||
| 24 | .start = S5PC110_PA_ONENAND, | ||
| 25 | .end = S5PC110_PA_ONENAND + SZ_128K - 1, | ||
| 26 | .flags = IORESOURCE_MEM, | ||
| 27 | }, | ||
| 28 | [1] = { | ||
| 29 | .start = S5PC110_PA_ONENAND_DMA, | ||
| 30 | .end = S5PC110_PA_ONENAND_DMA + SZ_2K - 1, | ||
| 31 | .flags = IORESOURCE_MEM, | ||
| 32 | }, | ||
| 33 | }; | ||
| 34 | |||
| 35 | struct platform_device s5pc110_device_onenand = { | ||
| 36 | .name = "s5pc110-onenand", | ||
| 37 | .id = -1, | ||
| 38 | .num_resources = ARRAY_SIZE(s5pc110_onenand_resources), | ||
| 39 | .resource = s5pc110_onenand_resources, | ||
| 40 | }; | ||
| 41 | |||
| 42 | void s5pc110_onenand_set_platdata(struct onenand_platform_data *pdata) | ||
| 43 | { | ||
| 44 | struct onenand_platform_data *pd; | ||
| 45 | |||
| 46 | pd = kmemdup(pdata, sizeof(struct onenand_platform_data), GFP_KERNEL); | ||
| 47 | if (!pd) | ||
| 48 | printk(KERN_ERR "%s: no memory for platform data\n", __func__); | ||
| 49 | s5pc110_device_onenand.dev.platform_data = pd; | ||
| 50 | } | ||
diff --git a/arch/arm/mach-s5pv210/dev-spi.c b/arch/arm/mach-s5pv210/dev-spi.c new file mode 100644 index 000000000000..337a62b57a0b --- /dev/null +++ b/arch/arm/mach-s5pv210/dev-spi.c | |||
| @@ -0,0 +1,178 @@ | |||
| 1 | /* linux/arch/arm/mach-s5pv210/dev-spi.c | ||
| 2 | * | ||
| 3 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
| 4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #include <linux/platform_device.h> | ||
| 12 | #include <linux/dma-mapping.h> | ||
| 13 | |||
| 14 | #include <mach/dma.h> | ||
| 15 | #include <mach/map.h> | ||
| 16 | #include <mach/irqs.h> | ||
| 17 | #include <mach/gpio.h> | ||
| 18 | #include <mach/spi-clocks.h> | ||
| 19 | |||
| 20 | #include <plat/s3c64xx-spi.h> | ||
| 21 | #include <plat/gpio-cfg.h> | ||
| 22 | |||
| 23 | static char *spi_src_clks[] = { | ||
| 24 | [S5PV210_SPI_SRCCLK_PCLK] = "pclk", | ||
| 25 | [S5PV210_SPI_SRCCLK_SCLK] = "sclk_spi", | ||
| 26 | }; | ||
| 27 | |||
| 28 | /* SPI Controller platform_devices */ | ||
| 29 | |||
| 30 | /* Since we emulate multi-cs capability, we do not touch the CS. | ||
| 31 | * The emulated CS is toggled by board specific mechanism, as it can | ||
| 32 | * be either some immediate GPIO or some signal out of some other | ||
| 33 | * chip in between ... or some yet another way. | ||
| 34 | * We simply do not assume anything about CS. | ||
| 35 | */ | ||
| 36 | static int s5pv210_spi_cfg_gpio(struct platform_device *pdev) | ||
| 37 | { | ||
| 38 | switch (pdev->id) { | ||
| 39 | case 0: | ||
| 40 | s3c_gpio_cfgpin(S5PV210_GPB(0), S3C_GPIO_SFN(2)); | ||
| 41 | s3c_gpio_cfgpin(S5PV210_GPB(1), S3C_GPIO_SFN(2)); | ||
| 42 | s3c_gpio_cfgpin(S5PV210_GPB(2), S3C_GPIO_SFN(2)); | ||
| 43 | s3c_gpio_setpull(S5PV210_GPB(0), S3C_GPIO_PULL_UP); | ||
| 44 | s3c_gpio_setpull(S5PV210_GPB(1), S3C_GPIO_PULL_UP); | ||
| 45 | s3c_gpio_setpull(S5PV210_GPB(2), S3C_GPIO_PULL_UP); | ||
| 46 | break; | ||
| 47 | |||
| 48 | case 1: | ||
| 49 | s3c_gpio_cfgpin(S5PV210_GPB(4), S3C_GPIO_SFN(2)); | ||
| 50 | s3c_gpio_cfgpin(S5PV210_GPB(5), S3C_GPIO_SFN(2)); | ||
| 51 | s3c_gpio_cfgpin(S5PV210_GPB(6), S3C_GPIO_SFN(2)); | ||
| 52 | s3c_gpio_setpull(S5PV210_GPB(4), S3C_GPIO_PULL_UP); | ||
| 53 | s3c_gpio_setpull(S5PV210_GPB(5), S3C_GPIO_PULL_UP); | ||
| 54 | s3c_gpio_setpull(S5PV210_GPB(6), S3C_GPIO_PULL_UP); | ||
| 55 | break; | ||
| 56 | |||
| 57 | default: | ||
| 58 | dev_err(&pdev->dev, "Invalid SPI Controller number!"); | ||
| 59 | return -EINVAL; | ||
| 60 | } | ||
| 61 | |||
| 62 | return 0; | ||
| 63 | } | ||
| 64 | |||
| 65 | static struct resource s5pv210_spi0_resource[] = { | ||
| 66 | [0] = { | ||
| 67 | .start = S5PV210_PA_SPI0, | ||
| 68 | .end = S5PV210_PA_SPI0 + 0x100 - 1, | ||
| 69 | .flags = IORESOURCE_MEM, | ||
| 70 | }, | ||
| 71 | [1] = { | ||
| 72 | .start = DMACH_SPI0_TX, | ||
| 73 | .end = DMACH_SPI0_TX, | ||
| 74 | .flags = IORESOURCE_DMA, | ||
| 75 | }, | ||
| 76 | [2] = { | ||
| 77 | .start = DMACH_SPI0_RX, | ||
| 78 | .end = DMACH_SPI0_RX, | ||
| 79 | .flags = IORESOURCE_DMA, | ||
| 80 | }, | ||
| 81 | [3] = { | ||
| 82 | .start = IRQ_SPI0, | ||
| 83 | .end = IRQ_SPI0, | ||
| 84 | .flags = IORESOURCE_IRQ, | ||
| 85 | }, | ||
| 86 | }; | ||
| 87 | |||
| 88 | static struct s3c64xx_spi_info s5pv210_spi0_pdata = { | ||
| 89 | .cfg_gpio = s5pv210_spi_cfg_gpio, | ||
| 90 | .fifo_lvl_mask = 0x1ff, | ||
| 91 | .rx_lvl_offset = 15, | ||
| 92 | .high_speed = 1, | ||
| 93 | }; | ||
| 94 | |||
| 95 | static u64 spi_dmamask = DMA_BIT_MASK(32); | ||
| 96 | |||
| 97 | struct platform_device s5pv210_device_spi0 = { | ||
| 98 | .name = "s3c64xx-spi", | ||
| 99 | .id = 0, | ||
| 100 | .num_resources = ARRAY_SIZE(s5pv210_spi0_resource), | ||
| 101 | .resource = s5pv210_spi0_resource, | ||
| 102 | .dev = { | ||
| 103 | .dma_mask = &spi_dmamask, | ||
| 104 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
| 105 | .platform_data = &s5pv210_spi0_pdata, | ||
| 106 | }, | ||
| 107 | }; | ||
| 108 | |||
| 109 | static struct resource s5pv210_spi1_resource[] = { | ||
| 110 | [0] = { | ||
| 111 | .start = S5PV210_PA_SPI1, | ||
| 112 | .end = S5PV210_PA_SPI1 + 0x100 - 1, | ||
| 113 | .flags = IORESOURCE_MEM, | ||
| 114 | }, | ||
| 115 | [1] = { | ||
| 116 | .start = DMACH_SPI1_TX, | ||
| 117 | .end = DMACH_SPI1_TX, | ||
| 118 | .flags = IORESOURCE_DMA, | ||
| 119 | }, | ||
| 120 | [2] = { | ||
| 121 | .start = DMACH_SPI1_RX, | ||
| 122 | .end = DMACH_SPI1_RX, | ||
| 123 | .flags = IORESOURCE_DMA, | ||
| 124 | }, | ||
| 125 | [3] = { | ||
| 126 | .start = IRQ_SPI1, | ||
| 127 | .end = IRQ_SPI1, | ||
| 128 | .flags = IORESOURCE_IRQ, | ||
| 129 | }, | ||
| 130 | }; | ||
| 131 | |||
| 132 | static struct s3c64xx_spi_info s5pv210_spi1_pdata = { | ||
| 133 | .cfg_gpio = s5pv210_spi_cfg_gpio, | ||
| 134 | .fifo_lvl_mask = 0x7f, | ||
| 135 | .rx_lvl_offset = 15, | ||
| 136 | .high_speed = 1, | ||
| 137 | }; | ||
| 138 | |||
| 139 | struct platform_device s5pv210_device_spi1 = { | ||
| 140 | .name = "s3c64xx-spi", | ||
| 141 | .id = 1, | ||
| 142 | .num_resources = ARRAY_SIZE(s5pv210_spi1_resource), | ||
| 143 | .resource = s5pv210_spi1_resource, | ||
| 144 | .dev = { | ||
| 145 | .dma_mask = &spi_dmamask, | ||
| 146 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
| 147 | .platform_data = &s5pv210_spi1_pdata, | ||
| 148 | }, | ||
| 149 | }; | ||
| 150 | |||
| 151 | void __init s5pv210_spi_set_info(int cntrlr, int src_clk_nr, int num_cs) | ||
| 152 | { | ||
| 153 | struct s3c64xx_spi_info *pd; | ||
| 154 | |||
| 155 | /* Reject invalid configuration */ | ||
| 156 | if (!num_cs || src_clk_nr < 0 | ||
| 157 | || src_clk_nr > S5PV210_SPI_SRCCLK_SCLK) { | ||
| 158 | printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__); | ||
| 159 | return; | ||
| 160 | } | ||
| 161 | |||
| 162 | switch (cntrlr) { | ||
| 163 | case 0: | ||
| 164 | pd = &s5pv210_spi0_pdata; | ||
| 165 | break; | ||
| 166 | case 1: | ||
| 167 | pd = &s5pv210_spi1_pdata; | ||
| 168 | break; | ||
| 169 | default: | ||
| 170 | printk(KERN_ERR "%s: Invalid SPI controller(%d)\n", | ||
| 171 | __func__, cntrlr); | ||
| 172 | return; | ||
| 173 | } | ||
| 174 | |||
| 175 | pd->num_cs = num_cs; | ||
| 176 | pd->src_clk_nr = src_clk_nr; | ||
| 177 | pd->src_clk_name = spi_src_clks[src_clk_nr]; | ||
| 178 | } | ||
diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h index 62c5175ef291..96895378ea27 100644 --- a/arch/arm/mach-s5pv210/include/mach/irqs.h +++ b/arch/arm/mach-s5pv210/include/mach/irqs.h | |||
| @@ -17,22 +17,6 @@ | |||
| 17 | 17 | ||
| 18 | /* VIC0: System, DMA, Timer */ | 18 | /* VIC0: System, DMA, Timer */ |
| 19 | 19 | ||
| 20 | #define IRQ_EINT0 S5P_IRQ_VIC0(0) | ||
| 21 | #define IRQ_EINT1 S5P_IRQ_VIC0(1) | ||
| 22 | #define IRQ_EINT2 S5P_IRQ_VIC0(2) | ||
| 23 | #define IRQ_EINT3 S5P_IRQ_VIC0(3) | ||
| 24 | #define IRQ_EINT4 S5P_IRQ_VIC0(4) | ||
| 25 | #define IRQ_EINT5 S5P_IRQ_VIC0(5) | ||
| 26 | #define IRQ_EINT6 S5P_IRQ_VIC0(6) | ||
| 27 | #define IRQ_EINT7 S5P_IRQ_VIC0(7) | ||
| 28 | #define IRQ_EINT8 S5P_IRQ_VIC0(8) | ||
| 29 | #define IRQ_EINT9 S5P_IRQ_VIC0(9) | ||
| 30 | #define IRQ_EINT10 S5P_IRQ_VIC0(10) | ||
| 31 | #define IRQ_EINT11 S5P_IRQ_VIC0(11) | ||
| 32 | #define IRQ_EINT12 S5P_IRQ_VIC0(12) | ||
| 33 | #define IRQ_EINT13 S5P_IRQ_VIC0(13) | ||
| 34 | #define IRQ_EINT14 S5P_IRQ_VIC0(14) | ||
| 35 | #define IRQ_EINT15 S5P_IRQ_VIC0(15) | ||
| 36 | #define IRQ_EINT16_31 S5P_IRQ_VIC0(16) | 20 | #define IRQ_EINT16_31 S5P_IRQ_VIC0(16) |
| 37 | #define IRQ_BATF S5P_IRQ_VIC0(17) | 21 | #define IRQ_BATF S5P_IRQ_VIC0(17) |
| 38 | #define IRQ_MDMA S5P_IRQ_VIC0(18) | 22 | #define IRQ_MDMA S5P_IRQ_VIC0(18) |
| @@ -134,13 +118,15 @@ | |||
| 134 | #define IRQ_MDNIE3 S5P_IRQ_VIC3(8) | 118 | #define IRQ_MDNIE3 S5P_IRQ_VIC3(8) |
| 135 | #define IRQ_VIC_END S5P_IRQ_VIC3(31) | 119 | #define IRQ_VIC_END S5P_IRQ_VIC3(31) |
| 136 | 120 | ||
| 137 | #define S5P_IRQ_EINT_BASE (IRQ_VIC_END + 1) | 121 | #define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0)) |
| 138 | 122 | #define S5P_EINT_BASE2 (IRQ_VIC_END + 1) | |
| 139 | #define S5P_EINT(x) ((x) + S5P_IRQ_EINT_BASE) | ||
| 140 | #define IRQ_EINT(x) S5P_EINT(x) | ||
| 141 | 123 | ||
| 142 | /* Set the default NR_IRQS */ | 124 | /* Set the default NR_IRQS */ |
| 125 | #define NR_IRQS (IRQ_EINT(31) + 1) | ||
| 143 | 126 | ||
| 144 | #define NR_IRQS (IRQ_EINT(31) + 1) | 127 | /* Compatibility */ |
| 128 | #define IRQ_LCD_FIFO IRQ_LCD0 | ||
| 129 | #define IRQ_LCD_VSYNC IRQ_LCD1 | ||
| 130 | #define IRQ_LCD_SYSTEM IRQ_LCD2 | ||
| 145 | 131 | ||
| 146 | #endif /* ASM_ARCH_IRQS_H */ | 132 | #endif /* ASM_ARCH_IRQS_H */ |
diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-s5pv210/include/mach/map.h index 5adcb9f26e44..34eb168ec950 100644 --- a/arch/arm/mach-s5pv210/include/mach/map.h +++ b/arch/arm/mach-s5pv210/include/mach/map.h | |||
| @@ -16,6 +16,9 @@ | |||
| 16 | #include <plat/map-base.h> | 16 | #include <plat/map-base.h> |
| 17 | #include <plat/map-s5p.h> | 17 | #include <plat/map-s5p.h> |
| 18 | 18 | ||
| 19 | #define S5PC110_PA_ONENAND (0xB0000000) | ||
| 20 | #define S5PC110_PA_ONENAND_DMA (0xB0600000) | ||
| 21 | |||
| 19 | #define S5PV210_PA_CHIPID (0xE0000000) | 22 | #define S5PV210_PA_CHIPID (0xE0000000) |
| 20 | #define S5P_PA_CHIPID S5PV210_PA_CHIPID | 23 | #define S5P_PA_CHIPID S5PV210_PA_CHIPID |
| 21 | 24 | ||
| @@ -25,13 +28,21 @@ | |||
| 25 | #define S5PV210_PA_GPIO (0xE0200000) | 28 | #define S5PV210_PA_GPIO (0xE0200000) |
| 26 | #define S5P_PA_GPIO S5PV210_PA_GPIO | 29 | #define S5P_PA_GPIO S5PV210_PA_GPIO |
| 27 | 30 | ||
| 31 | /* SPI */ | ||
| 32 | #define S5PV210_PA_SPI0 0xE1300000 | ||
| 33 | #define S5PV210_PA_SPI1 0xE1400000 | ||
| 34 | |||
| 28 | #define S5PV210_PA_IIC0 (0xE1800000) | 35 | #define S5PV210_PA_IIC0 (0xE1800000) |
| 36 | #define S5PV210_PA_IIC1 (0xFAB00000) | ||
| 37 | #define S5PV210_PA_IIC2 (0xE1A00000) | ||
| 29 | 38 | ||
| 30 | #define S5PV210_PA_TIMER (0xE2500000) | 39 | #define S5PV210_PA_TIMER (0xE2500000) |
| 31 | #define S5P_PA_TIMER S5PV210_PA_TIMER | 40 | #define S5P_PA_TIMER S5PV210_PA_TIMER |
| 32 | 41 | ||
| 33 | #define S5PV210_PA_SYSTIMER (0xE2600000) | 42 | #define S5PV210_PA_SYSTIMER (0xE2600000) |
| 34 | 43 | ||
| 44 | #define S5PV210_PA_WATCHDOG (0xE2700000) | ||
| 45 | |||
| 35 | #define S5PV210_PA_UART (0xE2900000) | 46 | #define S5PV210_PA_UART (0xE2900000) |
| 36 | 47 | ||
| 37 | #define S5P_PA_UART0 (S5PV210_PA_UART + 0x0) | 48 | #define S5P_PA_UART0 (S5PV210_PA_UART + 0x0) |
| @@ -47,6 +58,10 @@ | |||
| 47 | #define S5PV210_PA_PDMA0 0xE0900000 | 58 | #define S5PV210_PA_PDMA0 0xE0900000 |
| 48 | #define S5PV210_PA_PDMA1 0xE0A00000 | 59 | #define S5PV210_PA_PDMA1 0xE0A00000 |
| 49 | 60 | ||
| 61 | #define S5PV210_PA_FB (0xF8000000) | ||
| 62 | |||
| 63 | #define S5PV210_PA_HSMMC(x) (0xEB000000 + ((x) * 0x100000)) | ||
| 64 | |||
| 50 | #define S5PV210_PA_VIC0 (0xF2000000) | 65 | #define S5PV210_PA_VIC0 (0xF2000000) |
| 51 | #define S5P_PA_VIC0 S5PV210_PA_VIC0 | 66 | #define S5P_PA_VIC0 S5PV210_PA_VIC0 |
| 52 | 67 | ||
| @@ -75,8 +90,19 @@ | |||
| 75 | /* AC97 */ | 90 | /* AC97 */ |
| 76 | #define S5PV210_PA_AC97 0xE2200000 | 91 | #define S5PV210_PA_AC97 0xE2200000 |
| 77 | 92 | ||
| 93 | #define S5PV210_PA_ADC (0xE1700000) | ||
| 94 | |||
| 78 | /* compatibiltiy defines. */ | 95 | /* compatibiltiy defines. */ |
| 79 | #define S3C_PA_UART S5PV210_PA_UART | 96 | #define S3C_PA_UART S5PV210_PA_UART |
| 97 | #define S3C_PA_HSMMC0 S5PV210_PA_HSMMC(0) | ||
| 98 | #define S3C_PA_HSMMC1 S5PV210_PA_HSMMC(1) | ||
| 99 | #define S3C_PA_HSMMC2 S5PV210_PA_HSMMC(2) | ||
| 80 | #define S3C_PA_IIC S5PV210_PA_IIC0 | 100 | #define S3C_PA_IIC S5PV210_PA_IIC0 |
| 101 | #define S3C_PA_IIC1 S5PV210_PA_IIC1 | ||
| 102 | #define S3C_PA_IIC2 S5PV210_PA_IIC2 | ||
| 103 | #define S3C_PA_FB S5PV210_PA_FB | ||
| 104 | #define S3C_PA_WDT S5PV210_PA_WATCHDOG | ||
| 105 | |||
| 106 | #define SAMSUNG_PA_ADC S5PV210_PA_ADC | ||
| 81 | 107 | ||
| 82 | #endif /* __ASM_ARCH_MAP_H */ | 108 | #endif /* __ASM_ARCH_MAP_H */ |
diff --git a/arch/arm/mach-s5pv210/include/mach/regs-clock.h b/arch/arm/mach-s5pv210/include/mach/regs-clock.h index e56e0e4673ed..2a25ab40c863 100644 --- a/arch/arm/mach-s5pv210/include/mach/regs-clock.h +++ b/arch/arm/mach-s5pv210/include/mach/regs-clock.h | |||
| @@ -126,6 +126,7 @@ | |||
| 126 | 126 | ||
| 127 | #define S5P_RST_STAT S5P_CLKREG(0xA000) | 127 | #define S5P_RST_STAT S5P_CLKREG(0xA000) |
| 128 | #define S5P_OSC_CON S5P_CLKREG(0x8000) | 128 | #define S5P_OSC_CON S5P_CLKREG(0x8000) |
| 129 | #define S5P_MDNIE_SEL S5P_CLKREG(0x7008) | ||
| 129 | #define S5P_MIPI_PHY_CON0 S5P_CLKREG(0x7200) | 130 | #define S5P_MIPI_PHY_CON0 S5P_CLKREG(0x7200) |
| 130 | #define S5P_MIPI_PHY_CON1 S5P_CLKREG(0x7204) | 131 | #define S5P_MIPI_PHY_CON1 S5P_CLKREG(0x7204) |
| 131 | #define S5P_MIPI_CONTROL S5P_CLKREG(0xE814) | 132 | #define S5P_MIPI_CONTROL S5P_CLKREG(0xE814) |
diff --git a/arch/arm/mach-s5pv210/include/mach/regs-fb.h b/arch/arm/mach-s5pv210/include/mach/regs-fb.h new file mode 100644 index 000000000000..60d992989bdc --- /dev/null +++ b/arch/arm/mach-s5pv210/include/mach/regs-fb.h | |||
| @@ -0,0 +1,21 @@ | |||
| 1 | /* | ||
| 2 | * Copyright 2010 Ben Dooks <ben-linux@fluff.org> | ||
| 3 | * | ||
| 4 | * Dummy framebuffer to allow build for the moment. | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #ifndef __ASM_ARCH_MACH_REGS_FB_H | ||
| 12 | #define __ASM_ARCH_MACH_REGS_FB_H __FILE__ | ||
| 13 | |||
| 14 | #include <plat/regs-fb-v4.h> | ||
| 15 | |||
| 16 | static inline unsigned int s3c_fb_pal_reg(unsigned int window, int reg) | ||
| 17 | { | ||
| 18 | return 0x2400 + (window * 256 *4 ) + reg; | ||
| 19 | } | ||
| 20 | |||
| 21 | #endif /* __ASM_ARCH_MACH_REGS_FB_H */ | ||
diff --git a/arch/arm/mach-s5pv210/include/mach/regs-gpio.h b/arch/arm/mach-s5pv210/include/mach/regs-gpio.h new file mode 100644 index 000000000000..49e029b4978a --- /dev/null +++ b/arch/arm/mach-s5pv210/include/mach/regs-gpio.h | |||
| @@ -0,0 +1,48 @@ | |||
| 1 | /* linux/arch/arm/mach-s5pv210/include/mach/regs-gpio.h | ||
| 2 | * | ||
| 3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
| 4 | * http://www.samsung.com | ||
| 5 | * | ||
| 6 | * S5PV210 - GPIO (including EINT) register definitions | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License version 2 as | ||
| 10 | * published by the Free Software Foundation. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #ifndef __ASM_ARCH_REGS_GPIO_H | ||
| 14 | #define __ASM_ARCH_REGS_GPIO_H __FILE__ | ||
| 15 | |||
| 16 | #include <mach/map.h> | ||
| 17 | |||
| 18 | #define S5PV210_EINT30CON (S5P_VA_GPIO + 0xE00) | ||
| 19 | #define S5P_EINT_CON(x) (S5PV210_EINT30CON + ((x) * 0x4)) | ||
| 20 | |||
| 21 | #define S5PV210_EINT30FLTCON0 (S5P_VA_GPIO + 0xE80) | ||
| 22 | #define S5P_EINT_FLTCON(x) (S5PV210_EINT30FLTCON0 + ((x) * 0x4)) | ||
| 23 | |||
| 24 | #define S5PV210_EINT30MASK (S5P_VA_GPIO + 0xF00) | ||
| 25 | #define S5P_EINT_MASK(x) (S5PV210_EINT30MASK + ((x) * 0x4)) | ||
| 26 | |||
| 27 | #define S5PV210_EINT30PEND (S5P_VA_GPIO + 0xF40) | ||
| 28 | #define S5P_EINT_PEND(x) (S5PV210_EINT30PEND + ((x) * 0x4)) | ||
| 29 | |||
| 30 | #define EINT_REG_NR(x) (EINT_OFFSET(x) >> 3) | ||
| 31 | |||
| 32 | #define eint_irq_to_bit(irq) (1 << (EINT_OFFSET(irq) & 0x7)) | ||
| 33 | |||
| 34 | /* values for S5P_EXTINT0 */ | ||
| 35 | #define S5P_EXTINT_LOWLEV (0x00) | ||
| 36 | #define S5P_EXTINT_HILEV (0x01) | ||
| 37 | #define S5P_EXTINT_FALLEDGE (0x02) | ||
| 38 | #define S5P_EXTINT_RISEEDGE (0x03) | ||
| 39 | #define S5P_EXTINT_BOTHEDGE (0x04) | ||
| 40 | |||
| 41 | #define EINT_MODE S3C_GPIO_SFN(0xf) | ||
| 42 | |||
| 43 | #define EINT_GPIO_0(x) S5PV210_GPH0(x) | ||
| 44 | #define EINT_GPIO_1(x) S5PV210_GPH1(x) | ||
| 45 | #define EINT_GPIO_2(x) S5PV210_GPH2(x) | ||
| 46 | #define EINT_GPIO_3(x) S5PV210_GPH3(x) | ||
| 47 | |||
| 48 | #endif /* __ASM_ARCH_REGS_GPIO_H */ | ||
diff --git a/arch/arm/mach-s5pv210/include/mach/spi-clocks.h b/arch/arm/mach-s5pv210/include/mach/spi-clocks.h new file mode 100644 index 000000000000..02acded5f73d --- /dev/null +++ b/arch/arm/mach-s5pv210/include/mach/spi-clocks.h | |||
| @@ -0,0 +1,17 @@ | |||
| 1 | /* linux/arch/arm/mach-s5pv210/include/mach/spi-clocks.h | ||
| 2 | * | ||
| 3 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
| 4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #ifndef __S5PV210_PLAT_SPI_CLKS_H | ||
| 12 | #define __S5PV210_PLAT_SPI_CLKS_H __FILE__ | ||
| 13 | |||
| 14 | #define S5PV210_SPI_SRCCLK_PCLK 0 | ||
| 15 | #define S5PV210_SPI_SRCCLK_SCLK 1 | ||
| 16 | |||
| 17 | #endif /* __S5PV210_PLAT_SPI_CLKS_H */ | ||
diff --git a/arch/arm/mach-s5pv210/mach-aquila.c b/arch/arm/mach-s5pv210/mach-aquila.c new file mode 100644 index 000000000000..10bc76ec4025 --- /dev/null +++ b/arch/arm/mach-s5pv210/mach-aquila.c | |||
| @@ -0,0 +1,149 @@ | |||
| 1 | /* linux/arch/arm/mach-s5pv210/mach-aquila.c | ||
| 2 | * | ||
| 3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
| 4 | * http://www.samsung.com/ | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #include <linux/kernel.h> | ||
| 12 | #include <linux/types.h> | ||
| 13 | #include <linux/init.h> | ||
| 14 | #include <linux/serial_core.h> | ||
| 15 | #include <linux/fb.h> | ||
| 16 | |||
| 17 | #include <asm/mach/arch.h> | ||
| 18 | #include <asm/mach/map.h> | ||
| 19 | #include <asm/setup.h> | ||
| 20 | #include <asm/mach-types.h> | ||
| 21 | |||
| 22 | #include <mach/map.h> | ||
| 23 | #include <mach/regs-clock.h> | ||
| 24 | #include <mach/regs-fb.h> | ||
| 25 | |||
| 26 | #include <plat/regs-serial.h> | ||
| 27 | #include <plat/s5pv210.h> | ||
| 28 | #include <plat/devs.h> | ||
| 29 | #include <plat/cpu.h> | ||
| 30 | #include <plat/fb.h> | ||
| 31 | |||
| 32 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | ||
| 33 | #define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | ||
| 34 | S3C2410_UCON_RXILEVEL | \ | ||
| 35 | S3C2410_UCON_TXIRQMODE | \ | ||
| 36 | S3C2410_UCON_RXIRQMODE | \ | ||
| 37 | S3C2410_UCON_RXFIFO_TOI | \ | ||
| 38 | S3C2443_UCON_RXERR_IRQEN) | ||
| 39 | |||
| 40 | #define S5PV210_ULCON_DEFAULT S3C2410_LCON_CS8 | ||
| 41 | |||
| 42 | #define S5PV210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ | ||
| 43 | S5PV210_UFCON_TXTRIG4 | \ | ||
| 44 | S5PV210_UFCON_RXTRIG4) | ||
| 45 | |||
| 46 | static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = { | ||
| 47 | [0] = { | ||
| 48 | .hwport = 0, | ||
| 49 | .flags = 0, | ||
| 50 | .ucon = S5PV210_UCON_DEFAULT, | ||
| 51 | .ulcon = S5PV210_ULCON_DEFAULT, | ||
| 52 | .ufcon = S5PV210_UFCON_DEFAULT, | ||
| 53 | }, | ||
| 54 | [1] = { | ||
| 55 | .hwport = 1, | ||
| 56 | .flags = 0, | ||
| 57 | .ucon = S5PV210_UCON_DEFAULT, | ||
| 58 | .ulcon = S5PV210_ULCON_DEFAULT, | ||
| 59 | .ufcon = S5PV210_UFCON_DEFAULT, | ||
| 60 | }, | ||
| 61 | [2] = { | ||
| 62 | .hwport = 2, | ||
| 63 | .flags = 0, | ||
| 64 | .ucon = S5PV210_UCON_DEFAULT, | ||
| 65 | .ulcon = S5PV210_ULCON_DEFAULT, | ||
| 66 | .ufcon = S5PV210_UFCON_DEFAULT, | ||
| 67 | }, | ||
| 68 | [3] = { | ||
| 69 | .hwport = 3, | ||
| 70 | .flags = 0, | ||
| 71 | .ucon = S5PV210_UCON_DEFAULT, | ||
| 72 | .ulcon = S5PV210_ULCON_DEFAULT, | ||
| 73 | .ufcon = S5PV210_UFCON_DEFAULT, | ||
| 74 | }, | ||
| 75 | }; | ||
| 76 | |||
| 77 | /* Frame Buffer */ | ||
| 78 | static struct s3c_fb_pd_win aquila_fb_win0 = { | ||
| 79 | .win_mode = { | ||
| 80 | .pixclock = 1000000000000ULL / ((16+16+2+480)*(28+3+2+800)*60), | ||
| 81 | .left_margin = 16, | ||
| 82 | .right_margin = 16, | ||
| 83 | .upper_margin = 3, | ||
| 84 | .lower_margin = 28, | ||
| 85 | .hsync_len = 2, | ||
| 86 | .vsync_len = 2, | ||
| 87 | .xres = 480, | ||
| 88 | .yres = 800, | ||
| 89 | }, | ||
| 90 | .max_bpp = 32, | ||
| 91 | .default_bpp = 16, | ||
| 92 | }; | ||
| 93 | |||
| 94 | static struct s3c_fb_pd_win aquila_fb_win1 = { | ||
| 95 | .win_mode = { | ||
| 96 | .pixclock = 1000000000000ULL / ((16+16+2+480)*(28+3+2+800)*60), | ||
| 97 | .left_margin = 16, | ||
| 98 | .right_margin = 16, | ||
| 99 | .upper_margin = 3, | ||
| 100 | .lower_margin = 28, | ||
| 101 | .hsync_len = 2, | ||
| 102 | .vsync_len = 2, | ||
| 103 | .xres = 480, | ||
| 104 | .yres = 800, | ||
| 105 | }, | ||
| 106 | .max_bpp = 32, | ||
| 107 | .default_bpp = 16, | ||
| 108 | }; | ||
| 109 | |||
| 110 | static struct s3c_fb_platdata aquila_lcd_pdata __initdata = { | ||
| 111 | .win[0] = &aquila_fb_win0, | ||
| 112 | .win[1] = &aquila_fb_win1, | ||
| 113 | .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, | ||
| 114 | .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC | | ||
| 115 | VIDCON1_INV_VCLK | VIDCON1_INV_VDEN, | ||
| 116 | .setup_gpio = s5pv210_fb_gpio_setup_24bpp, | ||
| 117 | }; | ||
| 118 | |||
| 119 | static struct platform_device *aquila_devices[] __initdata = { | ||
| 120 | &s3c_device_fb, | ||
| 121 | }; | ||
| 122 | |||
| 123 | static void __init aquila_map_io(void) | ||
| 124 | { | ||
| 125 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); | ||
| 126 | s3c24xx_init_clocks(24000000); | ||
| 127 | s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs)); | ||
| 128 | } | ||
| 129 | |||
| 130 | static void __init aquila_machine_init(void) | ||
| 131 | { | ||
| 132 | /* FB */ | ||
| 133 | s3c_fb_set_platdata(&aquila_lcd_pdata); | ||
| 134 | |||
| 135 | platform_add_devices(aquila_devices, ARRAY_SIZE(aquila_devices)); | ||
| 136 | } | ||
| 137 | |||
| 138 | MACHINE_START(AQUILA, "Aquila") | ||
| 139 | /* Maintainers: | ||
| 140 | Marek Szyprowski <m.szyprowski@samsung.com> | ||
| 141 | Kyungmin Park <kyungmin.park@samsung.com> */ | ||
| 142 | .phys_io = S3C_PA_UART & 0xfff00000, | ||
| 143 | .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, | ||
| 144 | .boot_params = S5P_PA_SDRAM + 0x100, | ||
| 145 | .init_irq = s5pv210_init_irq, | ||
| 146 | .map_io = aquila_map_io, | ||
| 147 | .init_machine = aquila_machine_init, | ||
| 148 | .timer = &s3c24xx_timer, | ||
| 149 | MACHINE_END | ||
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c new file mode 100644 index 000000000000..4863b13824e4 --- /dev/null +++ b/arch/arm/mach-s5pv210/mach-goni.c | |||
| @@ -0,0 +1,98 @@ | |||
| 1 | /* linux/arch/arm/mach-s5pv210/mach-goni.c | ||
| 2 | * | ||
| 3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
| 4 | * http://www.samsung.com/ | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #include <linux/kernel.h> | ||
| 12 | #include <linux/types.h> | ||
| 13 | #include <linux/init.h> | ||
| 14 | #include <linux/serial_core.h> | ||
| 15 | |||
| 16 | #include <asm/mach/arch.h> | ||
| 17 | #include <asm/mach/map.h> | ||
| 18 | #include <asm/setup.h> | ||
| 19 | #include <asm/mach-types.h> | ||
| 20 | |||
| 21 | #include <mach/map.h> | ||
| 22 | #include <mach/regs-clock.h> | ||
| 23 | |||
| 24 | #include <plat/regs-serial.h> | ||
| 25 | #include <plat/s5pv210.h> | ||
| 26 | #include <plat/devs.h> | ||
| 27 | #include <plat/cpu.h> | ||
| 28 | |||
| 29 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | ||
| 30 | #define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | ||
| 31 | S3C2410_UCON_RXILEVEL | \ | ||
| 32 | S3C2410_UCON_TXIRQMODE | \ | ||
| 33 | S3C2410_UCON_RXIRQMODE | \ | ||
| 34 | S3C2410_UCON_RXFIFO_TOI | \ | ||
| 35 | S3C2443_UCON_RXERR_IRQEN) | ||
| 36 | |||
| 37 | #define S5PV210_ULCON_DEFAULT S3C2410_LCON_CS8 | ||
| 38 | |||
| 39 | #define S5PV210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ | ||
| 40 | S5PV210_UFCON_TXTRIG4 | \ | ||
| 41 | S5PV210_UFCON_RXTRIG4) | ||
| 42 | |||
| 43 | static struct s3c2410_uartcfg goni_uartcfgs[] __initdata = { | ||
| 44 | [0] = { | ||
| 45 | .hwport = 0, | ||
| 46 | .flags = 0, | ||
| 47 | .ucon = S5PV210_UCON_DEFAULT, | ||
| 48 | .ulcon = S5PV210_ULCON_DEFAULT, | ||
| 49 | .ufcon = S5PV210_UFCON_DEFAULT, | ||
| 50 | }, | ||
| 51 | [1] = { | ||
| 52 | .hwport = 1, | ||
| 53 | .flags = 0, | ||
| 54 | .ucon = S5PV210_UCON_DEFAULT, | ||
| 55 | .ulcon = S5PV210_ULCON_DEFAULT, | ||
| 56 | .ufcon = S5PV210_UFCON_DEFAULT, | ||
| 57 | }, | ||
| 58 | [2] = { | ||
| 59 | .hwport = 2, | ||
| 60 | .flags = 0, | ||
| 61 | .ucon = S5PV210_UCON_DEFAULT, | ||
| 62 | .ulcon = S5PV210_ULCON_DEFAULT, | ||
| 63 | .ufcon = S5PV210_UFCON_DEFAULT, | ||
| 64 | }, | ||
| 65 | [3] = { | ||
| 66 | .hwport = 3, | ||
| 67 | .flags = 0, | ||
| 68 | .ucon = S5PV210_UCON_DEFAULT, | ||
| 69 | .ulcon = S5PV210_ULCON_DEFAULT, | ||
| 70 | .ufcon = S5PV210_UFCON_DEFAULT, | ||
| 71 | }, | ||
| 72 | }; | ||
| 73 | |||
| 74 | static struct platform_device *goni_devices[] __initdata = { | ||
| 75 | }; | ||
| 76 | |||
| 77 | static void __init goni_map_io(void) | ||
| 78 | { | ||
| 79 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); | ||
| 80 | s3c24xx_init_clocks(24000000); | ||
| 81 | s3c24xx_init_uarts(goni_uartcfgs, ARRAY_SIZE(goni_uartcfgs)); | ||
| 82 | } | ||
| 83 | |||
| 84 | static void __init goni_machine_init(void) | ||
| 85 | { | ||
| 86 | platform_add_devices(goni_devices, ARRAY_SIZE(goni_devices)); | ||
| 87 | } | ||
| 88 | |||
| 89 | MACHINE_START(GONI, "GONI") | ||
| 90 | /* Maintainers: Kyungmin Park <kyungmin.park@samsung.com> */ | ||
| 91 | .phys_io = S3C_PA_UART & 0xfff00000, | ||
| 92 | .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, | ||
| 93 | .boot_params = S5P_PA_SDRAM + 0x100, | ||
| 94 | .init_irq = s5pv210_init_irq, | ||
| 95 | .map_io = goni_map_io, | ||
| 96 | .init_machine = goni_machine_init, | ||
| 97 | .timer = &s3c24xx_timer, | ||
| 98 | MACHINE_END | ||
diff --git a/arch/arm/mach-s5pv210/mach-smdkc110.c b/arch/arm/mach-s5pv210/mach-smdkc110.c index 6f9fd3274e2e..4c8903c6d104 100644 --- a/arch/arm/mach-s5pv210/mach-smdkc110.c +++ b/arch/arm/mach-s5pv210/mach-smdkc110.c | |||
| @@ -74,6 +74,7 @@ static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = { | |||
| 74 | static struct platform_device *smdkc110_devices[] __initdata = { | 74 | static struct platform_device *smdkc110_devices[] __initdata = { |
| 75 | &s5pv210_device_iis0, | 75 | &s5pv210_device_iis0, |
| 76 | &s5pv210_device_ac97, | 76 | &s5pv210_device_ac97, |
| 77 | &s3c_device_wdt, | ||
| 77 | }; | 78 | }; |
| 78 | 79 | ||
| 79 | static void __init smdkc110_map_io(void) | 80 | static void __init smdkc110_map_io(void) |
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c index 3c29e18528a5..0d4627948040 100644 --- a/arch/arm/mach-s5pv210/mach-smdkv210.c +++ b/arch/arm/mach-s5pv210/mach-smdkv210.c | |||
| @@ -25,6 +25,8 @@ | |||
| 25 | #include <plat/s5pv210.h> | 25 | #include <plat/s5pv210.h> |
| 26 | #include <plat/devs.h> | 26 | #include <plat/devs.h> |
| 27 | #include <plat/cpu.h> | 27 | #include <plat/cpu.h> |
| 28 | #include <plat/adc.h> | ||
| 29 | #include <plat/ts.h> | ||
| 28 | 30 | ||
| 29 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | 31 | /* Following are default values for UCON, ULCON and UFCON UART registers */ |
| 30 | #define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | 32 | #define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
| @@ -74,6 +76,15 @@ static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = { | |||
| 74 | static struct platform_device *smdkv210_devices[] __initdata = { | 76 | static struct platform_device *smdkv210_devices[] __initdata = { |
| 75 | &s5pv210_device_iis0, | 77 | &s5pv210_device_iis0, |
| 76 | &s5pv210_device_ac97, | 78 | &s5pv210_device_ac97, |
| 79 | &s3c_device_adc, | ||
| 80 | &s3c_device_ts, | ||
| 81 | &s3c_device_wdt, | ||
| 82 | }; | ||
| 83 | |||
| 84 | static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = { | ||
| 85 | .delay = 10000, | ||
| 86 | .presc = 49, | ||
| 87 | .oversampling_shift = 2, | ||
| 77 | }; | 88 | }; |
| 78 | 89 | ||
| 79 | static void __init smdkv210_map_io(void) | 90 | static void __init smdkv210_map_io(void) |
| @@ -85,6 +96,7 @@ static void __init smdkv210_map_io(void) | |||
| 85 | 96 | ||
| 86 | static void __init smdkv210_machine_init(void) | 97 | static void __init smdkv210_machine_init(void) |
| 87 | { | 98 | { |
| 99 | s3c24xx_ts_set_platdata(&s3c_ts_platform); | ||
| 88 | platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices)); | 100 | platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices)); |
| 89 | } | 101 | } |
| 90 | 102 | ||
diff --git a/arch/arm/mach-s5pv210/setup-fb-24bpp.c b/arch/arm/mach-s5pv210/setup-fb-24bpp.c new file mode 100644 index 000000000000..a50cbac8720d --- /dev/null +++ b/arch/arm/mach-s5pv210/setup-fb-24bpp.c | |||
| @@ -0,0 +1,62 @@ | |||
| 1 | /* linux/arch/arm/plat-s5pv210/setup-fb-24bpp.c | ||
| 2 | * | ||
| 3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. | ||
| 4 | * http://www.samsung.com/ | ||
| 5 | * | ||
| 6 | * Base s5pv210 setup information for 24bpp LCD framebuffer | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License version 2 as | ||
| 10 | * published by the Free Software Foundation. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #include <linux/kernel.h> | ||
| 14 | #include <linux/types.h> | ||
| 15 | #include <linux/fb.h> | ||
| 16 | |||
| 17 | #include <mach/regs-fb.h> | ||
| 18 | #include <mach/gpio.h> | ||
| 19 | #include <mach/map.h> | ||
| 20 | #include <plat/fb.h> | ||
| 21 | #include <mach/regs-clock.h> | ||
| 22 | #include <plat/gpio-cfg.h> | ||
| 23 | |||
| 24 | void s5pv210_fb_gpio_setup_24bpp(void) | ||
| 25 | { | ||
| 26 | unsigned int gpio = 0; | ||
| 27 | |||
| 28 | for (gpio = S5PV210_GPF0(0); gpio <= S5PV210_GPF0(7); gpio++) { | ||
| 29 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | ||
| 30 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
| 31 | s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); | ||
| 32 | } | ||
| 33 | |||
| 34 | for (gpio = S5PV210_GPF1(0); gpio <= S5PV210_GPF1(7); gpio++) { | ||
| 35 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | ||
| 36 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
| 37 | s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); | ||
| 38 | } | ||
| 39 | |||
| 40 | for (gpio = S5PV210_GPF2(0); gpio <= S5PV210_GPF2(7); gpio++) { | ||
| 41 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | ||
| 42 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
| 43 | s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); | ||
| 44 | } | ||
| 45 | |||
| 46 | for (gpio = S5PV210_GPF3(0); gpio <= S5PV210_GPF3(3); gpio++) { | ||
| 47 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | ||
| 48 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
| 49 | s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); | ||
| 50 | } | ||
| 51 | |||
| 52 | /* Set DISPLAY_CONTROL register for Display path selection. | ||
| 53 | * | ||
| 54 | * ouput | RGB | I80 | ITU | ||
| 55 | * ----------------------------------- | ||
| 56 | * 00 | MIE | FIMD | FIMD | ||
| 57 | * 01 | MDNIE | MDNIE | FIMD | ||
| 58 | * 10 | FIMD | FIMD | FIMD | ||
| 59 | * 11 | FIMD | FIMD | FIMD | ||
| 60 | */ | ||
| 61 | writel(0x2, S5P_MDNIE_SEL); | ||
| 62 | } | ||
diff --git a/arch/arm/mach-s5pv210/setup-i2c0.c b/arch/arm/mach-s5pv210/setup-i2c0.c index 9ec6845840e5..c718253c70b8 100644 --- a/arch/arm/mach-s5pv210/setup-i2c0.c +++ b/arch/arm/mach-s5pv210/setup-i2c0.c | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* linux/arch/arm/mach-s5pv210/setup-i2c0.c | 1 | /* linux/arch/arm/mach-s5pv210/setup-i2c0.c |
| 2 | * | 2 | * |
| 3 | * Copyright (c) 2009 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. |
| 4 | * http://www.samsung.com/ | 4 | * http://www.samsung.com/ |
| 5 | * | 5 | * |
| 6 | * I2C0 GPIO configuration. | 6 | * I2C0 GPIO configuration. |
| @@ -17,9 +17,14 @@ | |||
| 17 | 17 | ||
| 18 | struct platform_device; /* don't need the contents */ | 18 | struct platform_device; /* don't need the contents */ |
| 19 | 19 | ||
| 20 | #include <mach/gpio.h> | ||
| 20 | #include <plat/iic.h> | 21 | #include <plat/iic.h> |
| 22 | #include <plat/gpio-cfg.h> | ||
| 21 | 23 | ||
| 22 | void s3c_i2c0_cfg_gpio(struct platform_device *dev) | 24 | void s3c_i2c0_cfg_gpio(struct platform_device *dev) |
| 23 | { | 25 | { |
| 24 | /* Will be populated later */ | 26 | s3c_gpio_cfgpin(S5PV210_GPD1(0), S3C_GPIO_SFN(2)); |
| 27 | s3c_gpio_setpull(S5PV210_GPD1(0), S3C_GPIO_PULL_UP); | ||
| 28 | s3c_gpio_cfgpin(S5PV210_GPD1(1), S3C_GPIO_SFN(2)); | ||
| 29 | s3c_gpio_setpull(S5PV210_GPD1(1), S3C_GPIO_PULL_UP); | ||
| 25 | } | 30 | } |
diff --git a/arch/arm/mach-s5pv210/setup-i2c1.c b/arch/arm/mach-s5pv210/setup-i2c1.c new file mode 100644 index 000000000000..45e0e6ed2ed0 --- /dev/null +++ b/arch/arm/mach-s5pv210/setup-i2c1.c | |||
| @@ -0,0 +1,30 @@ | |||
| 1 | /* linux/arch/arm/mach-s5pv210/setup-i2c1.c | ||
| 2 | * | ||
| 3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. | ||
| 4 | * http://www.samsung.com/ | ||
| 5 | * | ||
| 6 | * I2C1 GPIO configuration. | ||
| 7 | * | ||
| 8 | * Based on plat-s3c64xx/setup-i2c1.c | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License version 2 as | ||
| 12 | * published by the Free Software Foundation. | ||
| 13 | */ | ||
| 14 | |||
| 15 | #include <linux/kernel.h> | ||
| 16 | #include <linux/types.h> | ||
| 17 | |||
| 18 | struct platform_device; /* don't need the contents */ | ||
| 19 | |||
| 20 | #include <mach/gpio.h> | ||
| 21 | #include <plat/iic.h> | ||
| 22 | #include <plat/gpio-cfg.h> | ||
| 23 | |||
| 24 | void s3c_i2c1_cfg_gpio(struct platform_device *dev) | ||
| 25 | { | ||
| 26 | s3c_gpio_cfgpin(S5PV210_GPD1(2), S3C_GPIO_SFN(2)); | ||
| 27 | s3c_gpio_setpull(S5PV210_GPD1(2), S3C_GPIO_PULL_UP); | ||
| 28 | s3c_gpio_cfgpin(S5PV210_GPD1(3), S3C_GPIO_SFN(2)); | ||
| 29 | s3c_gpio_setpull(S5PV210_GPD1(3), S3C_GPIO_PULL_UP); | ||
| 30 | } | ||
diff --git a/arch/arm/mach-s5pv210/setup-i2c2.c b/arch/arm/mach-s5pv210/setup-i2c2.c new file mode 100644 index 000000000000..b11b4bff69ac --- /dev/null +++ b/arch/arm/mach-s5pv210/setup-i2c2.c | |||
| @@ -0,0 +1,30 @@ | |||
| 1 | /* linux/arch/arm/mach-s5pv210/setup-i2c2.c | ||
| 2 | * | ||
| 3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. | ||
| 4 | * http://www.samsung.com/ | ||
| 5 | * | ||
| 6 | * I2C2 GPIO configuration. | ||
| 7 | * | ||
| 8 | * Based on plat-s3c64xx/setup-i2c0.c | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License version 2 as | ||
| 12 | * published by the Free Software Foundation. | ||
| 13 | */ | ||
| 14 | |||
| 15 | #include <linux/kernel.h> | ||
| 16 | #include <linux/types.h> | ||
| 17 | |||
| 18 | struct platform_device; /* don't need the contents */ | ||
| 19 | |||
| 20 | #include <mach/gpio.h> | ||
| 21 | #include <plat/iic.h> | ||
| 22 | #include <plat/gpio-cfg.h> | ||
| 23 | |||
| 24 | void s3c_i2c2_cfg_gpio(struct platform_device *dev) | ||
| 25 | { | ||
| 26 | s3c_gpio_cfgpin(S5PV210_GPD1(4), S3C_GPIO_SFN(2)); | ||
| 27 | s3c_gpio_setpull(S5PV210_GPD1(4), S3C_GPIO_PULL_UP); | ||
| 28 | s3c_gpio_cfgpin(S5PV210_GPD1(5), S3C_GPIO_SFN(2)); | ||
| 29 | s3c_gpio_setpull(S5PV210_GPD1(5), S3C_GPIO_PULL_UP); | ||
| 30 | } | ||
diff --git a/arch/arm/mach-s5pv210/setup-sdhci-gpio.c b/arch/arm/mach-s5pv210/setup-sdhci-gpio.c new file mode 100644 index 000000000000..fe7d86dad14c --- /dev/null +++ b/arch/arm/mach-s5pv210/setup-sdhci-gpio.c | |||
| @@ -0,0 +1,104 @@ | |||
| 1 | /* linux/arch/arm/plat-s5pc1xx/setup-sdhci-gpio.c | ||
| 2 | * | ||
| 3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. | ||
| 4 | * http://www.samsung.com/ | ||
| 5 | * | ||
| 6 | * S5PV210 - Helper functions for setting up SDHCI device(s) GPIO (HSMMC) | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License version 2 as | ||
| 10 | * published by the Free Software Foundation. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #include <linux/kernel.h> | ||
| 14 | #include <linux/types.h> | ||
| 15 | #include <linux/interrupt.h> | ||
| 16 | #include <linux/platform_device.h> | ||
| 17 | #include <linux/io.h> | ||
| 18 | #include <linux/mmc/host.h> | ||
| 19 | #include <linux/mmc/card.h> | ||
| 20 | |||
| 21 | #include <mach/gpio.h> | ||
| 22 | #include <plat/gpio-cfg.h> | ||
| 23 | #include <plat/regs-sdhci.h> | ||
| 24 | |||
| 25 | void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) | ||
| 26 | { | ||
| 27 | unsigned int gpio; | ||
| 28 | |||
| 29 | /* Set all the necessary GPG0/GPG1 pins to special-function 2 */ | ||
| 30 | for (gpio = S5PV210_GPG0(0); gpio < S5PV210_GPG0(2); gpio++) { | ||
| 31 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | ||
| 32 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
| 33 | } | ||
| 34 | switch (width) { | ||
| 35 | case 8: | ||
| 36 | /* GPG1[3:6] special-funtion 3 */ | ||
| 37 | for (gpio = S5PV210_GPG1(3); gpio <= S5PV210_GPG1(6); gpio++) { | ||
| 38 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); | ||
| 39 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
| 40 | } | ||
| 41 | case 4: | ||
| 42 | /* GPG0[3:6] special-funtion 2 */ | ||
| 43 | for (gpio = S5PV210_GPG0(3); gpio <= S5PV210_GPG0(6); gpio++) { | ||
| 44 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | ||
| 45 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
| 46 | } | ||
| 47 | default: | ||
| 48 | break; | ||
| 49 | } | ||
| 50 | |||
| 51 | s3c_gpio_setpull(S5PV210_GPG0(2), S3C_GPIO_PULL_UP); | ||
| 52 | s3c_gpio_cfgpin(S5PV210_GPG0(2), S3C_GPIO_SFN(2)); | ||
| 53 | } | ||
| 54 | |||
| 55 | void s5pv210_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) | ||
| 56 | { | ||
| 57 | unsigned int gpio; | ||
| 58 | |||
| 59 | /* Set all the necessary GPG1[0:1] pins to special-function 2 */ | ||
| 60 | for (gpio = S5PV210_GPG1(0); gpio < S5PV210_GPG1(2); gpio++) { | ||
| 61 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | ||
| 62 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
| 63 | } | ||
| 64 | |||
| 65 | /* Data pin GPG1[3:6] to special-function 2 */ | ||
| 66 | for (gpio = S5PV210_GPG1(3); gpio <= S5PV210_GPG1(6); gpio++) { | ||
| 67 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | ||
| 68 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
| 69 | } | ||
| 70 | |||
| 71 | s3c_gpio_setpull(S5PV210_GPG1(2), S3C_GPIO_PULL_UP); | ||
| 72 | s3c_gpio_cfgpin(S5PV210_GPG1(2), S3C_GPIO_SFN(2)); | ||
| 73 | } | ||
| 74 | |||
| 75 | void s5pv210_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) | ||
| 76 | { | ||
| 77 | unsigned int gpio; | ||
| 78 | |||
| 79 | /* Set all the necessary GPG2[0:1] pins to special-function 2 */ | ||
| 80 | for (gpio = S5PV210_GPG2(0); gpio < S5PV210_GPG2(2); gpio++) { | ||
| 81 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | ||
| 82 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
| 83 | } | ||
| 84 | |||
| 85 | switch (width) { | ||
| 86 | case 8: | ||
| 87 | /* Data pin GPG3[3:6] to special-function 3 */ | ||
| 88 | for (gpio = S5PV210_GPG3(3); gpio <= S5PV210_GPG3(6); gpio++) { | ||
| 89 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); | ||
| 90 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
| 91 | } | ||
| 92 | case 4: | ||
| 93 | /* Data pin GPG2[3:6] to special-function 2 */ | ||
| 94 | for (gpio = S5PV210_GPG2(3); gpio <= S5PV210_GPG2(6); gpio++) { | ||
| 95 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | ||
| 96 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
| 97 | } | ||
| 98 | default: | ||
| 99 | break; | ||
| 100 | } | ||
| 101 | |||
| 102 | s3c_gpio_setpull(S5PV210_GPG2(2), S3C_GPIO_PULL_UP); | ||
| 103 | s3c_gpio_cfgpin(S5PV210_GPG2(2), S3C_GPIO_SFN(2)); | ||
| 104 | } | ||
diff --git a/arch/arm/mach-s5pv210/setup-sdhci.c b/arch/arm/mach-s5pv210/setup-sdhci.c new file mode 100644 index 000000000000..51815ec60c2a --- /dev/null +++ b/arch/arm/mach-s5pv210/setup-sdhci.c | |||
| @@ -0,0 +1,63 @@ | |||
| 1 | /* linux/arch/arm/mach-s5pv210/setup-sdhci.c | ||
| 2 | * | ||
| 3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. | ||
| 4 | * http://www.samsung.com/ | ||
| 5 | * | ||
| 6 | * S5PV210 - Helper functions for settign up SDHCI device(s) (HSMMC) | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License version 2 as | ||
| 10 | * published by the Free Software Foundation. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #include <linux/kernel.h> | ||
| 14 | #include <linux/types.h> | ||
| 15 | #include <linux/interrupt.h> | ||
| 16 | #include <linux/platform_device.h> | ||
| 17 | #include <linux/io.h> | ||
| 18 | |||
| 19 | #include <linux/mmc/card.h> | ||
| 20 | #include <linux/mmc/host.h> | ||
| 21 | |||
| 22 | #include <plat/regs-sdhci.h> | ||
| 23 | #include <plat/sdhci.h> | ||
| 24 | |||
| 25 | /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */ | ||
| 26 | |||
| 27 | char *s5pv210_hsmmc_clksrcs[4] = { | ||
| 28 | [0] = "hsmmc", /* HCLK */ | ||
| 29 | [1] = "hsmmc", /* HCLK */ | ||
| 30 | [2] = "sclk_mmc", /* mmc_bus */ | ||
| 31 | /*[4] = reserved */ | ||
| 32 | }; | ||
| 33 | |||
| 34 | void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev, | ||
| 35 | void __iomem *r, | ||
| 36 | struct mmc_ios *ios, | ||
| 37 | struct mmc_card *card) | ||
| 38 | { | ||
| 39 | u32 ctrl2, ctrl3; | ||
| 40 | |||
| 41 | /* don't need to alter anything acording to card-type */ | ||
| 42 | |||
| 43 | writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4); | ||
| 44 | |||
| 45 | ctrl2 = readl(r + S3C_SDHCI_CONTROL2); | ||
| 46 | ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK; | ||
| 47 | ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR | | ||
| 48 | S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK | | ||
| 49 | S3C_SDHCI_CTRL2_ENFBCLKRX | | ||
| 50 | S3C_SDHCI_CTRL2_DFCNT_NONE | | ||
| 51 | S3C_SDHCI_CTRL2_ENCLKOUTHOLD); | ||
| 52 | |||
| 53 | if (ios->clock < 25 * 1000000) | ||
| 54 | ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 | | ||
| 55 | S3C_SDHCI_CTRL3_FCSEL2 | | ||
| 56 | S3C_SDHCI_CTRL3_FCSEL1 | | ||
| 57 | S3C_SDHCI_CTRL3_FCSEL0); | ||
| 58 | else | ||
| 59 | ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0); | ||
| 60 | |||
| 61 | writel(ctrl2, r + S3C_SDHCI_CONTROL2); | ||
| 62 | writel(ctrl3, r + S3C_SDHCI_CONTROL3); | ||
| 63 | } | ||
diff --git a/arch/arm/mach-sa1100/leds.c b/arch/arm/mach-sa1100/leds.c index 4cf7c565aaed..bbfe197fb4d6 100644 --- a/arch/arm/mach-sa1100/leds.c +++ b/arch/arm/mach-sa1100/leds.c | |||
| @@ -2,7 +2,7 @@ | |||
| 2 | * linux/arch/arm/mach-sa1100/leds.c | 2 | * linux/arch/arm/mach-sa1100/leds.c |
| 3 | * | 3 | * |
| 4 | * SA1100 LEDs dispatcher | 4 | * SA1100 LEDs dispatcher |
| 5 | * | 5 | * |
| 6 | * Copyright (C) 2001 Nicolas Pitre | 6 | * Copyright (C) 2001 Nicolas Pitre |
| 7 | */ | 7 | */ |
| 8 | #include <linux/compiler.h> | 8 | #include <linux/compiler.h> |
| @@ -18,10 +18,10 @@ sa1100_leds_init(void) | |||
| 18 | { | 18 | { |
| 19 | if (machine_is_assabet()) | 19 | if (machine_is_assabet()) |
| 20 | leds_event = assabet_leds_event; | 20 | leds_event = assabet_leds_event; |
| 21 | if (machine_is_consus()) | 21 | if (machine_is_consus()) |
| 22 | leds_event = consus_leds_event; | 22 | leds_event = consus_leds_event; |
| 23 | if (machine_is_badge4()) | 23 | if (machine_is_badge4()) |
| 24 | leds_event = badge4_leds_event; | 24 | leds_event = badge4_leds_event; |
| 25 | if (machine_is_brutus()) | 25 | if (machine_is_brutus()) |
| 26 | leds_event = brutus_leds_event; | 26 | leds_event = brutus_leds_event; |
| 27 | if (machine_is_cerf()) | 27 | if (machine_is_cerf()) |
diff --git a/arch/arm/mach-shark/pci.c b/arch/arm/mach-shark/pci.c index 37a7112d4117..89d175ce74d2 100644 --- a/arch/arm/mach-shark/pci.c +++ b/arch/arm/mach-shark/pci.c | |||
| @@ -16,16 +16,19 @@ | |||
| 16 | static int __init shark_map_irq(struct pci_dev *dev, u8 slot, u8 pin) | 16 | static int __init shark_map_irq(struct pci_dev *dev, u8 slot, u8 pin) |
| 17 | { | 17 | { |
| 18 | if (dev->bus->number == 0) | 18 | if (dev->bus->number == 0) |
| 19 | if (dev->devfn == 0) return 255; | 19 | if (dev->devfn == 0) |
| 20 | else return 11; | 20 | return 255; |
| 21 | else return 255; | 21 | else |
| 22 | return 11; | ||
| 23 | else | ||
| 24 | return 255; | ||
| 22 | } | 25 | } |
| 23 | 26 | ||
| 24 | extern void __init via82c505_preinit(void); | 27 | extern void __init via82c505_preinit(void); |
| 25 | 28 | ||
| 26 | static struct hw_pci shark_pci __initdata = { | 29 | static struct hw_pci shark_pci __initdata = { |
| 27 | .setup = via82c505_setup, | 30 | .setup = via82c505_setup, |
| 28 | .swizzle = pci_std_swizzle, | 31 | .swizzle = pci_std_swizzle, |
| 29 | .map_irq = shark_map_irq, | 32 | .map_irq = shark_map_irq, |
| 30 | .nr_controllers = 1, | 33 | .nr_controllers = 1, |
| 31 | .scan = via82c505_scan_bus, | 34 | .scan = via82c505_scan_bus, |
diff --git a/arch/arm/mach-spear6xx/spear6xx.c b/arch/arm/mach-spear6xx/spear6xx.c index b67e571d4bf7..baf6bcc3169c 100644 --- a/arch/arm/mach-spear6xx/spear6xx.c +++ b/arch/arm/mach-spear6xx/spear6xx.c | |||
| @@ -13,7 +13,6 @@ | |||
| 13 | 13 | ||
| 14 | #include <linux/types.h> | 14 | #include <linux/types.h> |
| 15 | #include <linux/amba/pl061.h> | 15 | #include <linux/amba/pl061.h> |
| 16 | #include <linux/types.h> | ||
| 17 | #include <linux/ptrace.h> | 16 | #include <linux/ptrace.h> |
| 18 | #include <linux/io.h> | 17 | #include <linux/io.h> |
| 19 | #include <asm/hardware/vic.h> | 18 | #include <asm/hardware/vic.h> |
diff --git a/arch/arm/mach-u300/i2c.c b/arch/arm/mach-u300/i2c.c index c73ed06b6065..f0394baa11fa 100644 --- a/arch/arm/mach-u300/i2c.c +++ b/arch/arm/mach-u300/i2c.c | |||
| @@ -9,7 +9,7 @@ | |||
| 9 | */ | 9 | */ |
| 10 | #include <linux/kernel.h> | 10 | #include <linux/kernel.h> |
| 11 | #include <linux/i2c.h> | 11 | #include <linux/i2c.h> |
| 12 | #include <linux/mfd/ab3100.h> | 12 | #include <linux/mfd/abx500.h> |
| 13 | #include <linux/regulator/machine.h> | 13 | #include <linux/regulator/machine.h> |
| 14 | #include <linux/amba/bus.h> | 14 | #include <linux/amba/bus.h> |
| 15 | #include <mach/irqs.h> | 15 | #include <mach/irqs.h> |
| @@ -46,6 +46,7 @@ | |||
| 46 | /* BUCK SLEEP 0xAC: 1.05V, Not used, SLEEP_A and B, Not used */ | 46 | /* BUCK SLEEP 0xAC: 1.05V, Not used, SLEEP_A and B, Not used */ |
| 47 | #define BUCK_SLEEP_SETTING 0xAC | 47 | #define BUCK_SLEEP_SETTING 0xAC |
| 48 | 48 | ||
| 49 | #ifdef CONFIG_AB3100_CORE | ||
| 49 | static struct regulator_consumer_supply supply_ldo_c[] = { | 50 | static struct regulator_consumer_supply supply_ldo_c[] = { |
| 50 | { | 51 | { |
| 51 | .dev_name = "ab3100-codec", | 52 | .dev_name = "ab3100-codec", |
| @@ -253,14 +254,68 @@ static struct ab3100_platform_data ab3100_plf_data = { | |||
| 253 | LDO_D_SETTING, | 254 | LDO_D_SETTING, |
| 254 | }, | 255 | }, |
| 255 | }; | 256 | }; |
| 257 | #endif | ||
| 258 | |||
| 259 | #ifdef CONFIG_AB3550_CORE | ||
| 260 | static struct abx500_init_settings ab3550_init_settings[] = { | ||
| 261 | { | ||
| 262 | .bank = 0, | ||
| 263 | .reg = AB3550_IMR1, | ||
| 264 | .setting = 0xff | ||
| 265 | }, | ||
| 266 | { | ||
| 267 | .bank = 0, | ||
| 268 | .reg = AB3550_IMR2, | ||
| 269 | .setting = 0xff | ||
| 270 | }, | ||
| 271 | { | ||
| 272 | .bank = 0, | ||
| 273 | .reg = AB3550_IMR3, | ||
| 274 | .setting = 0xff | ||
| 275 | }, | ||
| 276 | { | ||
| 277 | .bank = 0, | ||
| 278 | .reg = AB3550_IMR4, | ||
| 279 | .setting = 0xff | ||
| 280 | }, | ||
| 281 | { | ||
| 282 | .bank = 0, | ||
| 283 | .reg = AB3550_IMR5, | ||
| 284 | /* The two most significant bits are not used */ | ||
| 285 | .setting = 0x3f | ||
| 286 | }, | ||
| 287 | }; | ||
| 288 | |||
| 289 | static struct ab3550_platform_data ab3550_plf_data = { | ||
| 290 | .irq = { | ||
| 291 | .base = IRQ_AB3550_BASE, | ||
| 292 | .count = (IRQ_AB3550_END - IRQ_AB3550_BASE + 1), | ||
| 293 | }, | ||
| 294 | .dev_data = { | ||
| 295 | }, | ||
| 296 | .init_settings = ab3550_init_settings, | ||
| 297 | .init_settings_sz = ARRAY_SIZE(ab3550_init_settings), | ||
| 298 | }; | ||
| 299 | #endif | ||
| 256 | 300 | ||
| 257 | static struct i2c_board_info __initdata bus0_i2c_board_info[] = { | 301 | static struct i2c_board_info __initdata bus0_i2c_board_info[] = { |
| 302 | #if defined(CONFIG_AB3550_CORE) | ||
| 303 | { | ||
| 304 | .type = "ab3550", | ||
| 305 | .addr = 0x4A, | ||
| 306 | .irq = IRQ_U300_IRQ0_EXT, | ||
| 307 | .platform_data = &ab3550_plf_data, | ||
| 308 | }, | ||
| 309 | #elif defined(CONFIG_AB3100_CORE) | ||
| 258 | { | 310 | { |
| 259 | .type = "ab3100", | 311 | .type = "ab3100", |
| 260 | .addr = 0x48, | 312 | .addr = 0x48, |
| 261 | .irq = IRQ_U300_IRQ0_EXT, | 313 | .irq = IRQ_U300_IRQ0_EXT, |
| 262 | .platform_data = &ab3100_plf_data, | 314 | .platform_data = &ab3100_plf_data, |
| 263 | }, | 315 | }, |
| 316 | #else | ||
| 317 | { }, | ||
| 318 | #endif | ||
| 264 | }; | 319 | }; |
| 265 | 320 | ||
| 266 | static struct i2c_board_info __initdata bus1_i2c_board_info[] = { | 321 | static struct i2c_board_info __initdata bus1_i2c_board_info[] = { |
diff --git a/arch/arm/mach-u300/include/mach/coh901318.h b/arch/arm/mach-u300/include/mach/coh901318.h index b8155b4e5ffa..193da2df732c 100644 --- a/arch/arm/mach-u300/include/mach/coh901318.h +++ b/arch/arm/mach-u300/include/mach/coh901318.h | |||
| @@ -103,27 +103,6 @@ struct coh901318_platform { | |||
| 103 | }; | 103 | }; |
| 104 | 104 | ||
| 105 | /** | 105 | /** |
| 106 | * coh901318_get_bytes_left() - Get number of bytes left on a current transfer | ||
| 107 | * @chan: dma channel handle | ||
| 108 | * return number of bytes left, or negative on error | ||
| 109 | */ | ||
| 110 | u32 coh901318_get_bytes_left(struct dma_chan *chan); | ||
| 111 | |||
| 112 | /** | ||
| 113 | * coh901318_stop() - Stops dma transfer | ||
| 114 | * @chan: dma channel handle | ||
| 115 | * return 0 on success otherwise negative value | ||
| 116 | */ | ||
| 117 | void coh901318_stop(struct dma_chan *chan); | ||
| 118 | |||
| 119 | /** | ||
| 120 | * coh901318_continue() - Resumes a stopped dma transfer | ||
| 121 | * @chan: dma channel handle | ||
| 122 | * return 0 on success otherwise negative value | ||
| 123 | */ | ||
| 124 | void coh901318_continue(struct dma_chan *chan); | ||
| 125 | |||
| 126 | /** | ||
| 127 | * coh901318_filter_id() - DMA channel filter function | 106 | * coh901318_filter_id() - DMA channel filter function |
| 128 | * @chan: dma channel handle | 107 | * @chan: dma channel handle |
| 129 | * @chan_id: id of dma channel to be filter out | 108 | * @chan_id: id of dma channel to be filter out |
diff --git a/arch/arm/mach-u300/include/mach/irqs.h b/arch/arm/mach-u300/include/mach/irqs.h index a6867b12773e..09b1b28fa8fd 100644 --- a/arch/arm/mach-u300/include/mach/irqs.h +++ b/arch/arm/mach-u300/include/mach/irqs.h | |||
| @@ -109,6 +109,13 @@ | |||
| 109 | #define U300_NR_IRQS 48 | 109 | #define U300_NR_IRQS 48 |
| 110 | #endif | 110 | #endif |
| 111 | 111 | ||
| 112 | #ifdef CONFIG_AB3550_CORE | ||
| 113 | #define IRQ_AB3550_BASE (U300_NR_IRQS) | ||
| 114 | #define IRQ_AB3550_END (IRQ_AB3550_BASE + 37) | ||
| 115 | |||
| 116 | #define NR_IRQS (IRQ_AB3550_END + 1) | ||
| 117 | #else | ||
| 112 | #define NR_IRQS U300_NR_IRQS | 118 | #define NR_IRQS U300_NR_IRQS |
| 119 | #endif | ||
| 113 | 120 | ||
| 114 | #endif | 121 | #endif |
diff --git a/arch/arm/mach-ux500/Makefile b/arch/arm/mach-ux500/Makefile index c7bc4199e3a8..4556aea9c3c5 100644 --- a/arch/arm/mach-ux500/Makefile +++ b/arch/arm/mach-ux500/Makefile | |||
| @@ -7,4 +7,5 @@ obj-$(CONFIG_UX500_SOC_DB5500) += cpu-db5500.o devices-db5500.o | |||
| 7 | obj-$(CONFIG_UX500_SOC_DB8500) += cpu-db8500.o devices-db8500.o | 7 | obj-$(CONFIG_UX500_SOC_DB8500) += cpu-db8500.o devices-db8500.o |
| 8 | obj-$(CONFIG_MACH_U8500_MOP) += board-mop500.o | 8 | obj-$(CONFIG_MACH_U8500_MOP) += board-mop500.o |
| 9 | obj-$(CONFIG_MACH_U5500) += board-u5500.o | 9 | obj-$(CONFIG_MACH_U5500) += board-u5500.o |
| 10 | obj-$(CONFIG_SMP) += platsmp.o headsmp.o localtimer.o | 10 | obj-$(CONFIG_SMP) += platsmp.o headsmp.o |
| 11 | obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o | ||
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c index 072196c57263..bb8d7b771817 100644 --- a/arch/arm/mach-ux500/board-mop500.c +++ b/arch/arm/mach-ux500/board-mop500.c | |||
| @@ -50,7 +50,7 @@ struct pl022_config_chip ab4500_chip_info = { | |||
| 50 | 50 | ||
| 51 | static struct spi_board_info u8500_spi_devices[] = { | 51 | static struct spi_board_info u8500_spi_devices[] = { |
| 52 | { | 52 | { |
| 53 | .modalias = "ab4500", | 53 | .modalias = "ab8500", |
| 54 | .controller_data = &ab4500_chip_info, | 54 | .controller_data = &ab4500_chip_info, |
| 55 | .max_speed_hz = 12000000, | 55 | .max_speed_hz = 12000000, |
| 56 | .bus_num = 0, | 56 | .bus_num = 0, |
diff --git a/arch/arm/mach-ux500/clock.c b/arch/arm/mach-ux500/clock.c index 1b2c9890e8b4..fe84b9021c7a 100644 --- a/arch/arm/mach-ux500/clock.c +++ b/arch/arm/mach-ux500/clock.c | |||
| @@ -16,6 +16,7 @@ | |||
| 16 | 16 | ||
| 17 | #include <asm/clkdev.h> | 17 | #include <asm/clkdev.h> |
| 18 | 18 | ||
| 19 | #include <plat/mtu.h> | ||
| 19 | #include <mach/hardware.h> | 20 | #include <mach/hardware.h> |
| 20 | #include "clock.h" | 21 | #include "clock.h" |
| 21 | 22 | ||
| @@ -59,6 +60,9 @@ | |||
| 59 | #define PRCM_DMACLK_MGT 0x074 | 60 | #define PRCM_DMACLK_MGT 0x074 |
| 60 | #define PRCM_B2R2CLK_MGT 0x078 | 61 | #define PRCM_B2R2CLK_MGT 0x078 |
| 61 | #define PRCM_TVCLK_MGT 0x07C | 62 | #define PRCM_TVCLK_MGT 0x07C |
| 63 | #define PRCM_TCR 0x1C8 | ||
| 64 | #define PRCM_TCR_STOPPED (1 << 16) | ||
| 65 | #define PRCM_TCR_DOZE_MODE (1 << 17) | ||
| 62 | #define PRCM_UNIPROCLK_MGT 0x278 | 66 | #define PRCM_UNIPROCLK_MGT 0x278 |
| 63 | #define PRCM_SSPCLK_MGT 0x280 | 67 | #define PRCM_SSPCLK_MGT 0x280 |
| 64 | #define PRCM_RNGCLK_MGT 0x284 | 68 | #define PRCM_RNGCLK_MGT 0x284 |
| @@ -120,10 +124,95 @@ void clk_disable(struct clk *clk) | |||
| 120 | } | 124 | } |
| 121 | EXPORT_SYMBOL(clk_disable); | 125 | EXPORT_SYMBOL(clk_disable); |
| 122 | 126 | ||
| 127 | /* | ||
| 128 | * The MTU has a separate, rather complex muxing setup | ||
| 129 | * with alternative parents (peripheral cluster or | ||
| 130 | * ULP or fixed 32768 Hz) depending on settings | ||
| 131 | */ | ||
| 132 | static unsigned long clk_mtu_get_rate(struct clk *clk) | ||
| 133 | { | ||
| 134 | void __iomem *addr = __io_address(U8500_PRCMU_BASE) | ||
| 135 | + PRCM_TCR; | ||
| 136 | u32 tcr = readl(addr); | ||
| 137 | int mtu = (int) clk->data; | ||
| 138 | /* | ||
| 139 | * One of these is selected eventually | ||
| 140 | * TODO: Replace the constant with a reference | ||
| 141 | * to the ULP source once this is modeled. | ||
| 142 | */ | ||
| 143 | unsigned long clk32k = 32768; | ||
| 144 | unsigned long mturate; | ||
| 145 | unsigned long retclk; | ||
| 146 | |||
| 147 | /* Get the rate from the parent as a default */ | ||
| 148 | if (clk->parent_periph) | ||
| 149 | mturate = clk_get_rate(clk->parent_periph); | ||
| 150 | else if (clk->parent_cluster) | ||
| 151 | mturate = clk_get_rate(clk->parent_cluster); | ||
| 152 | else | ||
| 153 | /* We need to be connected SOMEWHERE */ | ||
| 154 | BUG(); | ||
| 155 | |||
| 156 | /* | ||
| 157 | * Are we in doze mode? | ||
| 158 | * In this mode the parent peripheral or the fixed 32768 Hz | ||
| 159 | * clock is fed into the block. | ||
| 160 | */ | ||
| 161 | if (!(tcr & PRCM_TCR_DOZE_MODE)) { | ||
| 162 | /* | ||
| 163 | * Here we're using the clock input from the APE ULP | ||
| 164 | * clock domain. But first: are the timers stopped? | ||
| 165 | */ | ||
| 166 | if (tcr & PRCM_TCR_STOPPED) { | ||
| 167 | clk32k = 0; | ||
| 168 | mturate = 0; | ||
| 169 | } else { | ||
| 170 | /* Else default mode: 0 and 2.4 MHz */ | ||
| 171 | clk32k = 0; | ||
| 172 | if (cpu_is_u5500()) | ||
| 173 | /* DB5500 divides by 8 */ | ||
| 174 | mturate /= 8; | ||
| 175 | else if (cpu_is_u8500ed()) { | ||
| 176 | /* | ||
| 177 | * This clocking setting must not be used | ||
| 178 | * in the ED chip, it is simply not | ||
| 179 | * connected anywhere! | ||
| 180 | */ | ||
| 181 | mturate = 0; | ||
| 182 | BUG(); | ||
| 183 | } else | ||
| 184 | /* | ||
| 185 | * In this mode the ulp38m4 clock is divided | ||
| 186 | * by a factor 16, on the DB8500 typically | ||
| 187 | * 38400000 / 16 ~ 2.4 MHz. | ||
| 188 | * TODO: Replace the constant with a reference | ||
| 189 | * to the ULP source once this is modeled. | ||
| 190 | */ | ||
| 191 | mturate = 38400000 / 16; | ||
| 192 | } | ||
| 193 | } | ||
| 194 | |||
| 195 | /* Return the clock selected for this MTU */ | ||
| 196 | if (tcr & (1 << mtu)) | ||
| 197 | retclk = clk32k; | ||
| 198 | else | ||
| 199 | retclk = mturate; | ||
| 200 | |||
| 201 | pr_info("MTU%d clock rate: %lu Hz\n", mtu, retclk); | ||
| 202 | return retclk; | ||
| 203 | } | ||
| 204 | |||
| 123 | unsigned long clk_get_rate(struct clk *clk) | 205 | unsigned long clk_get_rate(struct clk *clk) |
| 124 | { | 206 | { |
| 125 | unsigned long rate; | 207 | unsigned long rate; |
| 126 | 208 | ||
| 209 | /* | ||
| 210 | * If there is a custom getrate callback for this clock, | ||
| 211 | * it will take precedence. | ||
| 212 | */ | ||
| 213 | if (clk->get_rate) | ||
| 214 | return clk->get_rate(clk); | ||
| 215 | |||
| 127 | if (clk->ops && clk->ops->get_rate) | 216 | if (clk->ops && clk->ops->get_rate) |
| 128 | return clk->ops->get_rate(clk); | 217 | return clk->ops->get_rate(clk); |
| 129 | 218 | ||
| @@ -341,8 +430,9 @@ static DEFINE_PRCC_CLK(5, usb_v1, 0, 0, NULL); | |||
| 341 | 430 | ||
| 342 | /* Peripheral Cluster #6 */ | 431 | /* Peripheral Cluster #6 */ |
| 343 | 432 | ||
| 344 | static DEFINE_PRCC_CLK(6, mtu1_v1, 8, -1, NULL); | 433 | /* MTU ID in data */ |
| 345 | static DEFINE_PRCC_CLK(6, mtu0_v1, 7, -1, NULL); | 434 | static DEFINE_PRCC_CLK_CUSTOM(6, mtu1_v1, 8, -1, NULL, clk_mtu_get_rate, 1); |
| 435 | static DEFINE_PRCC_CLK_CUSTOM(6, mtu0_v1, 7, -1, NULL, clk_mtu_get_rate, 0); | ||
| 346 | static DEFINE_PRCC_CLK(6, cfgreg_v1, 6, 6, NULL); | 436 | static DEFINE_PRCC_CLK(6, cfgreg_v1, 6, 6, NULL); |
| 347 | static DEFINE_PRCC_CLK(6, dmc_ed, 6, 6, NULL); | 437 | static DEFINE_PRCC_CLK(6, dmc_ed, 6, 6, NULL); |
| 348 | static DEFINE_PRCC_CLK(6, hash1, 5, -1, NULL); | 438 | static DEFINE_PRCC_CLK(6, hash1, 5, -1, NULL); |
| @@ -357,8 +447,9 @@ static DEFINE_PRCC_CLK(6, rng_v1, 0, 0, &clk_rngclk); | |||
| 357 | /* Peripheral Cluster #7 */ | 447 | /* Peripheral Cluster #7 */ |
| 358 | 448 | ||
| 359 | static DEFINE_PRCC_CLK(7, tzpc0_ed, 4, -1, NULL); | 449 | static DEFINE_PRCC_CLK(7, tzpc0_ed, 4, -1, NULL); |
| 360 | static DEFINE_PRCC_CLK(7, mtu1_ed, 3, -1, NULL); | 450 | /* MTU ID in data */ |
| 361 | static DEFINE_PRCC_CLK(7, mtu0_ed, 2, -1, NULL); | 451 | static DEFINE_PRCC_CLK_CUSTOM(7, mtu1_ed, 3, -1, NULL, clk_mtu_get_rate, 1); |
| 452 | static DEFINE_PRCC_CLK_CUSTOM(7, mtu0_ed, 2, -1, NULL, clk_mtu_get_rate, 0); | ||
| 362 | static DEFINE_PRCC_CLK(7, wdg_ed, 1, -1, NULL); | 453 | static DEFINE_PRCC_CLK(7, wdg_ed, 1, -1, NULL); |
| 363 | static DEFINE_PRCC_CLK(7, cfgreg_ed, 0, -1, NULL); | 454 | static DEFINE_PRCC_CLK(7, cfgreg_ed, 0, -1, NULL); |
| 364 | 455 | ||
| @@ -411,7 +502,7 @@ static struct clk_lookup u8500_common_clks[] = { | |||
| 411 | CLK(apetraceclk, "apetrace", NULL), | 502 | CLK(apetraceclk, "apetrace", NULL), |
| 412 | CLK(mcdeclk, "mcde", NULL), | 503 | CLK(mcdeclk, "mcde", NULL), |
| 413 | CLK(ipi2clk, "ipi2", NULL), | 504 | CLK(ipi2clk, "ipi2", NULL), |
| 414 | CLK(dmaclk, "dma40", NULL), | 505 | CLK(dmaclk, "dma40.0", NULL), |
| 415 | CLK(b2r2clk, "b2r2", NULL), | 506 | CLK(b2r2clk, "b2r2", NULL), |
| 416 | CLK(tvclk, "tv", NULL), | 507 | CLK(tvclk, "tv", NULL), |
| 417 | }; | 508 | }; |
| @@ -503,15 +594,17 @@ static struct clk_lookup u8500_v1_clks[] = { | |||
| 503 | CLK(uiccclk, "uicc", NULL), | 594 | CLK(uiccclk, "uicc", NULL), |
| 504 | }; | 595 | }; |
| 505 | 596 | ||
| 506 | static int __init clk_init(void) | 597 | int __init clk_init(void) |
| 507 | { | 598 | { |
| 508 | if (cpu_is_u8500ed()) { | 599 | if (cpu_is_u8500ed()) { |
| 509 | clk_prcmu_ops.enable = clk_prcmu_ed_enable; | 600 | clk_prcmu_ops.enable = clk_prcmu_ed_enable; |
| 510 | clk_prcmu_ops.disable = clk_prcmu_ed_disable; | 601 | clk_prcmu_ops.disable = clk_prcmu_ed_disable; |
| 602 | clk_per6clk.rate = 100000000; | ||
| 511 | } else if (cpu_is_u5500()) { | 603 | } else if (cpu_is_u5500()) { |
| 512 | /* Clock tree for U5500 not implemented yet */ | 604 | /* Clock tree for U5500 not implemented yet */ |
| 513 | clk_prcc_ops.enable = clk_prcc_ops.disable = NULL; | 605 | clk_prcc_ops.enable = clk_prcc_ops.disable = NULL; |
| 514 | clk_prcmu_ops.enable = clk_prcmu_ops.disable = NULL; | 606 | clk_prcmu_ops.enable = clk_prcmu_ops.disable = NULL; |
| 607 | clk_per6clk.rate = 26000000; | ||
| 515 | } | 608 | } |
| 516 | 609 | ||
| 517 | clkdev_add_table(u8500_common_clks, ARRAY_SIZE(u8500_common_clks)); | 610 | clkdev_add_table(u8500_common_clks, ARRAY_SIZE(u8500_common_clks)); |
| @@ -522,4 +615,3 @@ static int __init clk_init(void) | |||
| 522 | 615 | ||
| 523 | return 0; | 616 | return 0; |
| 524 | } | 617 | } |
| 525 | arch_initcall(clk_init); | ||
diff --git a/arch/arm/mach-ux500/clock.h b/arch/arm/mach-ux500/clock.h index e4f99b65026f..a05802501527 100644 --- a/arch/arm/mach-ux500/clock.h +++ b/arch/arm/mach-ux500/clock.h | |||
| @@ -28,6 +28,9 @@ struct clkops { | |||
| 28 | * @ops: pointer to clkops struct used to control this clock | 28 | * @ops: pointer to clkops struct used to control this clock |
| 29 | * @name: name, for debugging | 29 | * @name: name, for debugging |
| 30 | * @enabled: refcount. positive if enabled, zero if disabled | 30 | * @enabled: refcount. positive if enabled, zero if disabled |
| 31 | * @get_rate: custom callback for getting the clock rate | ||
| 32 | * @data: custom per-clock data for example for the get_rate | ||
| 33 | * callback | ||
| 31 | * @rate: fixed rate for clocks which don't implement | 34 | * @rate: fixed rate for clocks which don't implement |
| 32 | * ops->getrate | 35 | * ops->getrate |
| 33 | * @prcmu_cg_off: address offset of the combined enable/disable register | 36 | * @prcmu_cg_off: address offset of the combined enable/disable register |
| @@ -67,6 +70,8 @@ struct clk { | |||
| 67 | const struct clkops *ops; | 70 | const struct clkops *ops; |
| 68 | const char *name; | 71 | const char *name; |
| 69 | unsigned int enabled; | 72 | unsigned int enabled; |
| 73 | unsigned long (*get_rate)(struct clk *); | ||
| 74 | void *data; | ||
| 70 | 75 | ||
| 71 | unsigned long rate; | 76 | unsigned long rate; |
| 72 | struct list_head list; | 77 | struct list_head list; |
| @@ -117,9 +122,26 @@ struct clk clk_##_name = { \ | |||
| 117 | .parent_periph = _kernclk \ | 122 | .parent_periph = _kernclk \ |
| 118 | } | 123 | } |
| 119 | 124 | ||
| 125 | #define DEFINE_PRCC_CLK_CUSTOM(_pclust, _name, _bus_en, _kernel_en, _kernclk, _callback, _data) \ | ||
| 126 | struct clk clk_##_name = { \ | ||
| 127 | .name = #_name, \ | ||
| 128 | .ops = &clk_prcc_ops, \ | ||
| 129 | .cluster = _pclust, \ | ||
| 130 | .prcc_bus = _bus_en, \ | ||
| 131 | .prcc_kernel = _kernel_en, \ | ||
| 132 | .parent_cluster = &clk_per##_pclust##clk, \ | ||
| 133 | .parent_periph = _kernclk, \ | ||
| 134 | .get_rate = _callback, \ | ||
| 135 | .data = (void *) _data \ | ||
| 136 | } | ||
| 137 | |||
| 138 | |||
| 120 | #define CLK(_clk, _devname, _conname) \ | 139 | #define CLK(_clk, _devname, _conname) \ |
| 121 | { \ | 140 | { \ |
| 122 | .clk = &clk_##_clk, \ | 141 | .clk = &clk_##_clk, \ |
| 123 | .dev_id = _devname, \ | 142 | .dev_id = _devname, \ |
| 124 | .con_id = _conname, \ | 143 | .con_id = _conname, \ |
| 125 | } | 144 | } |
| 145 | |||
| 146 | int __init clk_db8500_ed_fixup(void); | ||
| 147 | int __init clk_init(void); | ||
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c index d04299f3b6b5..f21c444edd99 100644 --- a/arch/arm/mach-ux500/cpu-db8500.c +++ b/arch/arm/mach-ux500/cpu-db8500.c | |||
| @@ -32,6 +32,7 @@ static struct platform_device *platform_devs[] __initdata = { | |||
| 32 | &u8500_gpio_devs[6], | 32 | &u8500_gpio_devs[6], |
| 33 | &u8500_gpio_devs[7], | 33 | &u8500_gpio_devs[7], |
| 34 | &u8500_gpio_devs[8], | 34 | &u8500_gpio_devs[8], |
| 35 | &u8500_dma40_device, | ||
| 35 | }; | 36 | }; |
| 36 | 37 | ||
| 37 | /* minimum static i/o mapping required to boot U8500 platforms */ | 38 | /* minimum static i/o mapping required to boot U8500 platforms */ |
| @@ -71,6 +72,9 @@ void __init u8500_init_devices(void) | |||
| 71 | { | 72 | { |
| 72 | ux500_init_devices(); | 73 | ux500_init_devices(); |
| 73 | 74 | ||
| 75 | if (cpu_is_u8500ed()) | ||
| 76 | dma40_u8500ed_fixup(); | ||
| 77 | |||
| 74 | /* Register the platform devices */ | 78 | /* Register the platform devices */ |
| 75 | platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs)); | 79 | platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs)); |
| 76 | 80 | ||
diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c index d81ad023963c..e0fd747e447a 100644 --- a/arch/arm/mach-ux500/cpu.c +++ b/arch/arm/mach-ux500/cpu.c | |||
| @@ -62,6 +62,12 @@ void __init ux500_init_irq(void) | |||
| 62 | { | 62 | { |
| 63 | gic_dist_init(0, __io_address(UX500_GIC_DIST_BASE), 29); | 63 | gic_dist_init(0, __io_address(UX500_GIC_DIST_BASE), 29); |
| 64 | gic_cpu_init(0, __io_address(UX500_GIC_CPU_BASE)); | 64 | gic_cpu_init(0, __io_address(UX500_GIC_CPU_BASE)); |
| 65 | |||
| 66 | /* | ||
| 67 | * Init clocks here so that they are available for system timer | ||
| 68 | * initialization. | ||
| 69 | */ | ||
| 70 | clk_init(); | ||
| 65 | } | 71 | } |
| 66 | 72 | ||
| 67 | #ifdef CONFIG_CACHE_L2X0 | 73 | #ifdef CONFIG_CACHE_L2X0 |
diff --git a/arch/arm/mach-ux500/devices-db8500.c b/arch/arm/mach-ux500/devices-db8500.c index 20334236afce..822903421943 100644 --- a/arch/arm/mach-ux500/devices-db8500.c +++ b/arch/arm/mach-ux500/devices-db8500.c | |||
| @@ -12,9 +12,13 @@ | |||
| 12 | #include <linux/gpio.h> | 12 | #include <linux/gpio.h> |
| 13 | #include <linux/amba/bus.h> | 13 | #include <linux/amba/bus.h> |
| 14 | 14 | ||
| 15 | #include <plat/ste_dma40.h> | ||
| 16 | |||
| 15 | #include <mach/hardware.h> | 17 | #include <mach/hardware.h> |
| 16 | #include <mach/setup.h> | 18 | #include <mach/setup.h> |
| 17 | 19 | ||
| 20 | #include "ste-dma40-db8500.h" | ||
| 21 | |||
| 18 | static struct nmk_gpio_platform_data u8500_gpio_data[] = { | 22 | static struct nmk_gpio_platform_data u8500_gpio_data[] = { |
| 19 | GPIO_DATA("GPIO-0-31", 0), | 23 | GPIO_DATA("GPIO-0-31", 0), |
| 20 | GPIO_DATA("GPIO-32-63", 32), /* 37..63 not routed to pin */ | 24 | GPIO_DATA("GPIO-32-63", 32), /* 37..63 not routed to pin */ |
| @@ -105,3 +109,108 @@ struct platform_device u8500_i2c4_device = { | |||
| 105 | .resource = u8500_i2c4_resources, | 109 | .resource = u8500_i2c4_resources, |
| 106 | .num_resources = ARRAY_SIZE(u8500_i2c4_resources), | 110 | .num_resources = ARRAY_SIZE(u8500_i2c4_resources), |
| 107 | }; | 111 | }; |
| 112 | |||
| 113 | static struct resource dma40_resources[] = { | ||
| 114 | [0] = { | ||
| 115 | .start = U8500_DMA_BASE, | ||
| 116 | .end = U8500_DMA_BASE + SZ_4K - 1, | ||
| 117 | .flags = IORESOURCE_MEM, | ||
| 118 | .name = "base", | ||
| 119 | }, | ||
| 120 | [1] = { | ||
| 121 | .start = U8500_DMA_LCPA_BASE, | ||
| 122 | .end = U8500_DMA_LCPA_BASE + SZ_4K - 1, | ||
| 123 | .flags = IORESOURCE_MEM, | ||
| 124 | .name = "lcpa", | ||
| 125 | }, | ||
| 126 | [2] = { | ||
| 127 | .start = U8500_DMA_LCLA_BASE, | ||
| 128 | .end = U8500_DMA_LCLA_BASE + 16 * 1024 - 1, | ||
| 129 | .flags = IORESOURCE_MEM, | ||
| 130 | .name = "lcla", | ||
| 131 | }, | ||
| 132 | [3] = { | ||
| 133 | .start = IRQ_DMA, | ||
| 134 | .end = IRQ_DMA, | ||
| 135 | .flags = IORESOURCE_IRQ} | ||
| 136 | }; | ||
| 137 | |||
| 138 | /* Default configuration for physcial memcpy */ | ||
| 139 | struct stedma40_chan_cfg dma40_memcpy_conf_phy = { | ||
| 140 | .channel_type = (STEDMA40_CHANNEL_IN_PHY_MODE | | ||
| 141 | STEDMA40_LOW_PRIORITY_CHANNEL | | ||
| 142 | STEDMA40_PCHAN_BASIC_MODE), | ||
| 143 | .dir = STEDMA40_MEM_TO_MEM, | ||
| 144 | |||
| 145 | .src_info.endianess = STEDMA40_LITTLE_ENDIAN, | ||
| 146 | .src_info.data_width = STEDMA40_BYTE_WIDTH, | ||
| 147 | .src_info.psize = STEDMA40_PSIZE_PHY_1, | ||
| 148 | |||
| 149 | .dst_info.endianess = STEDMA40_LITTLE_ENDIAN, | ||
| 150 | .dst_info.data_width = STEDMA40_BYTE_WIDTH, | ||
| 151 | .dst_info.psize = STEDMA40_PSIZE_PHY_1, | ||
| 152 | |||
| 153 | }; | ||
| 154 | /* Default configuration for logical memcpy */ | ||
| 155 | struct stedma40_chan_cfg dma40_memcpy_conf_log = { | ||
| 156 | .channel_type = (STEDMA40_CHANNEL_IN_LOG_MODE | | ||
| 157 | STEDMA40_LOW_PRIORITY_CHANNEL | | ||
| 158 | STEDMA40_LCHAN_SRC_LOG_DST_LOG | | ||
| 159 | STEDMA40_NO_TIM_FOR_LINK), | ||
| 160 | .dir = STEDMA40_MEM_TO_MEM, | ||
| 161 | |||
| 162 | .src_info.endianess = STEDMA40_LITTLE_ENDIAN, | ||
| 163 | .src_info.data_width = STEDMA40_BYTE_WIDTH, | ||
| 164 | .src_info.psize = STEDMA40_PSIZE_LOG_1, | ||
| 165 | |||
| 166 | .dst_info.endianess = STEDMA40_LITTLE_ENDIAN, | ||
| 167 | .dst_info.data_width = STEDMA40_BYTE_WIDTH, | ||
| 168 | .dst_info.psize = STEDMA40_PSIZE_LOG_1, | ||
| 169 | |||
| 170 | }; | ||
| 171 | |||
| 172 | /* | ||
| 173 | * Mapping between destination event lines and physical device address. | ||
| 174 | * The event line is tied to a device and therefor the address is constant. | ||
| 175 | */ | ||
| 176 | static const dma_addr_t dma40_tx_map[STEDMA40_NR_DEV]; | ||
| 177 | |||
| 178 | /* Mapping between source event lines and physical device address */ | ||
| 179 | static const dma_addr_t dma40_rx_map[STEDMA40_NR_DEV]; | ||
| 180 | |||
| 181 | /* Reserved event lines for memcpy only */ | ||
| 182 | static int dma40_memcpy_event[] = { | ||
| 183 | STEDMA40_MEMCPY_TX_1, | ||
| 184 | STEDMA40_MEMCPY_TX_2, | ||
| 185 | STEDMA40_MEMCPY_TX_3, | ||
| 186 | STEDMA40_MEMCPY_TX_4, | ||
| 187 | }; | ||
| 188 | |||
| 189 | static struct stedma40_platform_data dma40_plat_data = { | ||
| 190 | .dev_len = STEDMA40_NR_DEV, | ||
| 191 | .dev_rx = dma40_rx_map, | ||
| 192 | .dev_tx = dma40_tx_map, | ||
| 193 | .memcpy = dma40_memcpy_event, | ||
| 194 | .memcpy_len = ARRAY_SIZE(dma40_memcpy_event), | ||
| 195 | .memcpy_conf_phy = &dma40_memcpy_conf_phy, | ||
| 196 | .memcpy_conf_log = &dma40_memcpy_conf_log, | ||
| 197 | .llis_per_log = 8, | ||
| 198 | }; | ||
| 199 | |||
| 200 | struct platform_device u8500_dma40_device = { | ||
| 201 | .dev = { | ||
| 202 | .platform_data = &dma40_plat_data, | ||
| 203 | }, | ||
| 204 | .name = "dma40", | ||
| 205 | .id = 0, | ||
| 206 | .num_resources = ARRAY_SIZE(dma40_resources), | ||
| 207 | .resource = dma40_resources | ||
| 208 | }; | ||
| 209 | |||
| 210 | void dma40_u8500ed_fixup(void) | ||
| 211 | { | ||
| 212 | dma40_plat_data.memcpy = NULL; | ||
| 213 | dma40_plat_data.memcpy_len = 0; | ||
| 214 | dma40_resources[0].start = U8500_DMA_BASE_ED; | ||
| 215 | dma40_resources[0].end = U8500_DMA_BASE_ED + SZ_4K - 1; | ||
| 216 | } | ||
diff --git a/arch/arm/mach-ux500/include/mach/db8500-regs.h b/arch/arm/mach-ux500/include/mach/db8500-regs.h index 9169e1e382a3..85fc6a80b386 100644 --- a/arch/arm/mach-ux500/include/mach/db8500-regs.h +++ b/arch/arm/mach-ux500/include/mach/db8500-regs.h | |||
| @@ -7,6 +7,18 @@ | |||
| 7 | #ifndef __MACH_DB8500_REGS_H | 7 | #ifndef __MACH_DB8500_REGS_H |
| 8 | #define __MACH_DB8500_REGS_H | 8 | #define __MACH_DB8500_REGS_H |
| 9 | 9 | ||
| 10 | /* Base address and bank offsets for ESRAM */ | ||
| 11 | #define U8500_ESRAM_BASE 0x40000000 | ||
| 12 | #define U8500_ESRAM_BANK_SIZE 0x00020000 | ||
| 13 | #define U8500_ESRAM_BANK0 U8500_ESRAM_BASE | ||
| 14 | #define U8500_ESRAM_BANK1 (U8500_ESRAM_BASE + U8500_ESRAM_BANK_SIZE) | ||
| 15 | #define U8500_ESRAM_BANK2 (U8500_ESRAM_BANK1 + U8500_ESRAM_BANK_SIZE) | ||
| 16 | #define U8500_ESRAM_BANK3 (U8500_ESRAM_BANK2 + U8500_ESRAM_BANK_SIZE) | ||
| 17 | #define U8500_ESRAM_BANK4 (U8500_ESRAM_BANK3 + U8500_ESRAM_BANK_SIZE) | ||
| 18 | /* Use bank 4 for DMA LCLA and LCPA */ | ||
| 19 | #define U8500_DMA_LCLA_BASE U8500_ESRAM_BANK4 | ||
| 20 | #define U8500_DMA_LCPA_BASE (U8500_ESRAM_BANK4 + 0x4000) | ||
| 21 | |||
| 10 | #define U8500_PER3_BASE 0x80000000 | 22 | #define U8500_PER3_BASE 0x80000000 |
| 11 | #define U8500_STM_BASE 0x80100000 | 23 | #define U8500_STM_BASE 0x80100000 |
| 12 | #define U8500_STM_REG_BASE (U8500_STM_BASE + 0xF000) | 24 | #define U8500_STM_REG_BASE (U8500_STM_BASE + 0xF000) |
diff --git a/arch/arm/mach-ux500/include/mach/devices.h b/arch/arm/mach-ux500/include/mach/devices.h index 0422af00a56e..c2b2f2574947 100644 --- a/arch/arm/mach-ux500/include/mach/devices.h +++ b/arch/arm/mach-ux500/include/mach/devices.h | |||
| @@ -25,5 +25,8 @@ extern struct platform_device ux500_i2c3_device; | |||
| 25 | 25 | ||
| 26 | extern struct platform_device u8500_i2c0_device; | 26 | extern struct platform_device u8500_i2c0_device; |
| 27 | extern struct platform_device u8500_i2c4_device; | 27 | extern struct platform_device u8500_i2c4_device; |
| 28 | extern struct platform_device u8500_dma40_device; | ||
| 29 | |||
| 30 | void dma40_u8500ed_fixup(void); | ||
| 28 | 31 | ||
| 29 | #endif | 32 | #endif |
diff --git a/arch/arm/mach-ux500/ste-dma40-db8500.h b/arch/arm/mach-ux500/ste-dma40-db8500.h new file mode 100644 index 000000000000..e7016278dfa9 --- /dev/null +++ b/arch/arm/mach-ux500/ste-dma40-db8500.h | |||
| @@ -0,0 +1,154 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-ux500/ste_dma40_db8500.h | ||
| 3 | * DB8500-SoC-specific configuration for DMA40 | ||
| 4 | * | ||
| 5 | * Copyright (C) ST-Ericsson 2007-2010 | ||
| 6 | * License terms: GNU General Public License (GPL) version 2 | ||
| 7 | * Author: Per Friden <per.friden@stericsson.com> | ||
| 8 | * Author: Jonas Aaberg <jonas.aberg@stericsson.com> | ||
| 9 | */ | ||
| 10 | #ifndef STE_DMA40_DB8500_H | ||
| 11 | #define STE_DMA40_DB8500_H | ||
| 12 | |||
| 13 | #define STEDMA40_NR_DEV 64 | ||
| 14 | |||
| 15 | enum dma_src_dev_type { | ||
| 16 | STEDMA40_DEV_SPI0_RX = 0, | ||
| 17 | STEDMA40_DEV_SD_MMC0_RX = 1, | ||
| 18 | STEDMA40_DEV_SD_MMC1_RX = 2, | ||
| 19 | STEDMA40_DEV_SD_MMC2_RX = 3, | ||
| 20 | STEDMA40_DEV_I2C1_RX = 4, | ||
| 21 | STEDMA40_DEV_I2C3_RX = 5, | ||
| 22 | STEDMA40_DEV_I2C2_RX = 6, | ||
| 23 | STEDMA40_DEV_I2C4_RX = 7, /* Only on V1 */ | ||
| 24 | STEDMA40_DEV_SSP0_RX = 8, | ||
| 25 | STEDMA40_DEV_SSP1_RX = 9, | ||
| 26 | STEDMA40_DEV_MCDE_RX = 10, | ||
| 27 | STEDMA40_DEV_UART2_RX = 11, | ||
| 28 | STEDMA40_DEV_UART1_RX = 12, | ||
| 29 | STEDMA40_DEV_UART0_RX = 13, | ||
| 30 | STEDMA40_DEV_MSP2_RX = 14, | ||
| 31 | STEDMA40_DEV_I2C0_RX = 15, | ||
| 32 | STEDMA40_DEV_USB_OTG_IEP_8 = 16, | ||
| 33 | STEDMA40_DEV_USB_OTG_IEP_1_9 = 17, | ||
| 34 | STEDMA40_DEV_USB_OTG_IEP_2_10 = 18, | ||
| 35 | STEDMA40_DEV_USB_OTG_IEP_3_11 = 19, | ||
| 36 | STEDMA40_DEV_SLIM0_CH0_RX_HSI_RX_CH0 = 20, | ||
| 37 | STEDMA40_DEV_SLIM0_CH1_RX_HSI_RX_CH1 = 21, | ||
| 38 | STEDMA40_DEV_SLIM0_CH2_RX_HSI_RX_CH2 = 22, | ||
| 39 | STEDMA40_DEV_SLIM0_CH3_RX_HSI_RX_CH3 = 23, | ||
| 40 | STEDMA40_DEV_SRC_SXA0_RX_TX = 24, | ||
| 41 | STEDMA40_DEV_SRC_SXA1_RX_TX = 25, | ||
| 42 | STEDMA40_DEV_SRC_SXA2_RX_TX = 26, | ||
| 43 | STEDMA40_DEV_SRC_SXA3_RX_TX = 27, | ||
| 44 | STEDMA40_DEV_SD_MM2_RX = 28, | ||
| 45 | STEDMA40_DEV_SD_MM0_RX = 29, | ||
| 46 | STEDMA40_DEV_MSP1_RX = 30, | ||
| 47 | /* | ||
| 48 | * This channel is either SlimBus or MSP, | ||
| 49 | * never both at the same time. | ||
| 50 | */ | ||
| 51 | STEDMA40_SLIM0_CH0_RX = 31, | ||
| 52 | STEDMA40_DEV_MSP0_RX = 31, | ||
| 53 | STEDMA40_DEV_SD_MM1_RX = 32, | ||
| 54 | STEDMA40_DEV_SPI2_RX = 33, | ||
| 55 | STEDMA40_DEV_I2C3_RX2 = 34, | ||
| 56 | STEDMA40_DEV_SPI1_RX = 35, | ||
| 57 | STEDMA40_DEV_USB_OTG_IEP_4_12 = 36, | ||
| 58 | STEDMA40_DEV_USB_OTG_IEP_5_13 = 37, | ||
| 59 | STEDMA40_DEV_USB_OTG_IEP_6_14 = 38, | ||
| 60 | STEDMA40_DEV_USB_OTG_IEP_7_15 = 39, | ||
| 61 | STEDMA40_DEV_SPI3_RX = 40, | ||
| 62 | STEDMA40_DEV_SD_MM3_RX = 41, | ||
| 63 | STEDMA40_DEV_SD_MM4_RX = 42, | ||
| 64 | STEDMA40_DEV_SD_MM5_RX = 43, | ||
| 65 | STEDMA40_DEV_SRC_SXA4_RX_TX = 44, | ||
| 66 | STEDMA40_DEV_SRC_SXA5_RX_TX = 45, | ||
| 67 | STEDMA40_DEV_SRC_SXA6_RX_TX = 46, | ||
| 68 | STEDMA40_DEV_SRC_SXA7_RX_TX = 47, | ||
| 69 | STEDMA40_DEV_CAC1_RX = 48, | ||
| 70 | /* RX channels 49 and 50 are unused */ | ||
| 71 | STEDMA40_DEV_MSHC_RX = 51, | ||
| 72 | STEDMA40_DEV_SLIM1_CH0_RX_HSI_RX_CH4 = 52, | ||
| 73 | STEDMA40_DEV_SLIM1_CH1_RX_HSI_RX_CH5 = 53, | ||
| 74 | STEDMA40_DEV_SLIM1_CH2_RX_HSI_RX_CH6 = 54, | ||
| 75 | STEDMA40_DEV_SLIM1_CH3_RX_HSI_RX_CH7 = 55, | ||
| 76 | /* RX channels 56 thru 60 are unused */ | ||
| 77 | STEDMA40_DEV_CAC0_RX = 61, | ||
| 78 | /* RX channels 62 and 63 are unused */ | ||
| 79 | }; | ||
| 80 | |||
| 81 | enum dma_dest_dev_type { | ||
| 82 | STEDMA40_DEV_SPI0_TX = 0, | ||
| 83 | STEDMA40_DEV_SD_MMC0_TX = 1, | ||
| 84 | STEDMA40_DEV_SD_MMC1_TX = 2, | ||
| 85 | STEDMA40_DEV_SD_MMC2_TX = 3, | ||
| 86 | STEDMA40_DEV_I2C1_TX = 4, | ||
| 87 | STEDMA40_DEV_I2C3_TX = 5, | ||
| 88 | STEDMA40_DEV_I2C2_TX = 6, | ||
| 89 | STEDMA50_DEV_I2C4_TX = 7, /* Only on V1 */ | ||
| 90 | STEDMA40_DEV_SSP0_TX = 8, | ||
| 91 | STEDMA40_DEV_SSP1_TX = 9, | ||
| 92 | /* TX channel 10 is unused */ | ||
| 93 | STEDMA40_DEV_UART2_TX = 11, | ||
| 94 | STEDMA40_DEV_UART1_TX = 12, | ||
| 95 | STEDMA40_DEV_UART0_TX= 13, | ||
| 96 | STEDMA40_DEV_MSP2_TX = 14, | ||
| 97 | STEDMA40_DEV_I2C0_TX = 15, | ||
| 98 | STEDMA40_DEV_USB_OTG_OEP_8 = 16, | ||
| 99 | STEDMA40_DEV_USB_OTG_OEP_1_9 = 17, | ||
| 100 | STEDMA40_DEV_USB_OTG_OEP_2_10= 18, | ||
| 101 | STEDMA40_DEV_USB_OTG_OEP_3_11 = 19, | ||
| 102 | STEDMA40_DEV_SLIM0_CH0_TX_HSI_TX_CH0 = 20, | ||
| 103 | STEDMA40_DEV_SLIM0_CH1_TX_HSI_TX_CH1 = 21, | ||
| 104 | STEDMA40_DEV_SLIM0_CH2_TX_HSI_TX_CH2 = 22, | ||
| 105 | STEDMA40_DEV_SLIM0_CH3_TX_HSI_TX_CH3 = 23, | ||
| 106 | STEDMA40_DEV_DST_SXA0_RX_TX = 24, | ||
| 107 | STEDMA40_DEV_DST_SXA1_RX_TX = 25, | ||
| 108 | STEDMA40_DEV_DST_SXA2_RX_TX = 26, | ||
| 109 | STEDMA40_DEV_DST_SXA3_RX_TX = 27, | ||
| 110 | STEDMA40_DEV_SD_MM2_TX = 28, | ||
| 111 | STEDMA40_DEV_SD_MM0_TX = 29, | ||
| 112 | STEDMA40_DEV_MSP1_TX = 30, | ||
| 113 | /* | ||
| 114 | * This channel is either SlimBus or MSP, | ||
| 115 | * never both at the same time. | ||
| 116 | */ | ||
| 117 | STEDMA40_SLIM0_CH0_TX = 31, | ||
| 118 | STEDMA40_DEV_MSP0_TX = 31, | ||
| 119 | STEDMA40_DEV_SD_MM1_TX = 32, | ||
| 120 | STEDMA40_DEV_SPI2_TX = 33, | ||
| 121 | /* Secondary I2C3 channel */ | ||
| 122 | STEDMA40_DEV_I2C3_TX2 = 34, | ||
| 123 | STEDMA40_DEV_SPI1_TX = 35, | ||
| 124 | STEDMA40_DEV_USB_OTG_OEP_4_12 = 36, | ||
| 125 | STEDMA40_DEV_USB_OTG_OEP_5_13 = 37, | ||
| 126 | STEDMA40_DEV_USB_OTG_OEP_6_14 = 38, | ||
| 127 | STEDMA40_DEV_USB_OTG_OEP_7_15 = 39, | ||
| 128 | STEDMA40_DEV_SPI3_TX = 40, | ||
| 129 | STEDMA40_DEV_SD_MM3_TX = 41, | ||
| 130 | STEDMA40_DEV_SD_MM4_TX = 42, | ||
| 131 | STEDMA40_DEV_SD_MM5_TX = 43, | ||
| 132 | STEDMA40_DEV_DST_SXA4_RX_TX = 44, | ||
| 133 | STEDMA40_DEV_DST_SXA5_RX_TX = 45, | ||
| 134 | STEDMA40_DEV_DST_SXA6_RX_TX = 46, | ||
| 135 | STEDMA40_DEV_DST_SXA7_RX_TX = 47, | ||
| 136 | STEDMA40_DEV_CAC1_TX = 48, | ||
| 137 | STEDMA40_DEV_CAC1_TX_HAC1_TX = 49, | ||
| 138 | STEDMA40_DEV_HAC1_TX = 50, | ||
| 139 | STEDMA40_MEMXCPY_TX_0 = 51, | ||
| 140 | STEDMA40_DEV_SLIM1_CH0_TX_HSI_TX_CH4 = 52, | ||
| 141 | STEDMA40_DEV_SLIM1_CH1_TX_HSI_TX_CH5 = 53, | ||
| 142 | STEDMA40_DEV_SLIM1_CH2_TX_HSI_TX_CH6 = 54, | ||
| 143 | STEDMA40_DEV_SLIM1_CH3_TX_HSI_TX_CH7 = 55, | ||
| 144 | STEDMA40_MEMCPY_TX_1 = 56, | ||
| 145 | STEDMA40_MEMCPY_TX_2 = 57, | ||
| 146 | STEDMA40_MEMCPY_TX_3 = 58, | ||
| 147 | STEDMA40_MEMCPY_TX_4 = 59, | ||
| 148 | STEDMA40_MEMCPY_TX_5 = 60, | ||
| 149 | STEDMA40_DEV_CAC0_TX = 61, | ||
| 150 | STEDMA40_DEV_CAC0_TX_HAC0_TX = 62, | ||
| 151 | STEDMA40_DEV_HAC0_TX = 63, | ||
| 152 | }; | ||
| 153 | |||
| 154 | #endif | ||
diff --git a/arch/arm/mach-w90x900/dev.c b/arch/arm/mach-w90x900/dev.c index e2958eb567f9..b2eda4dc1c34 100644 --- a/arch/arm/mach-w90x900/dev.c +++ b/arch/arm/mach-w90x900/dev.c | |||
| @@ -423,6 +423,33 @@ void nuc900_fb_set_platdata(struct nuc900fb_mach_info *pd) | |||
| 423 | } | 423 | } |
| 424 | #endif | 424 | #endif |
| 425 | 425 | ||
| 426 | /* AUDIO controller*/ | ||
| 427 | static u64 nuc900_device_audio_dmamask = -1; | ||
| 428 | static struct resource nuc900_ac97_resource[] = { | ||
| 429 | [0] = { | ||
| 430 | .start = W90X900_PA_ACTL, | ||
| 431 | .end = W90X900_PA_ACTL + W90X900_SZ_ACTL - 1, | ||
| 432 | .flags = IORESOURCE_MEM, | ||
| 433 | }, | ||
| 434 | [1] = { | ||
| 435 | .start = IRQ_ACTL, | ||
| 436 | .end = IRQ_ACTL, | ||
| 437 | .flags = IORESOURCE_IRQ, | ||
| 438 | } | ||
| 439 | |||
| 440 | }; | ||
| 441 | |||
| 442 | struct platform_device nuc900_device_audio = { | ||
| 443 | .name = "nuc900-audio", | ||
| 444 | .id = -1, | ||
| 445 | .num_resources = ARRAY_SIZE(nuc900_ac97_resource), | ||
| 446 | .resource = nuc900_ac97_resource, | ||
| 447 | .dev = { | ||
| 448 | .dma_mask = &nuc900_device_audio_dmamask, | ||
| 449 | .coherent_dma_mask = -1, | ||
| 450 | } | ||
| 451 | }; | ||
| 452 | |||
| 426 | /*Here should be your evb resourse,such as LCD*/ | 453 | /*Here should be your evb resourse,such as LCD*/ |
| 427 | 454 | ||
| 428 | static struct platform_device *nuc900_public_dev[] __initdata = { | 455 | static struct platform_device *nuc900_public_dev[] __initdata = { |
| @@ -434,6 +461,7 @@ static struct platform_device *nuc900_public_dev[] __initdata = { | |||
| 434 | &nuc900_device_emc, | 461 | &nuc900_device_emc, |
| 435 | &nuc900_device_spi, | 462 | &nuc900_device_spi, |
| 436 | &nuc900_device_wdt, | 463 | &nuc900_device_wdt, |
| 464 | &nuc900_device_audio, | ||
| 437 | }; | 465 | }; |
| 438 | 466 | ||
| 439 | /* Provide adding specific CPU platform devices API */ | 467 | /* Provide adding specific CPU platform devices API */ |
diff --git a/arch/arm/mach-w90x900/include/mach/mfp.h b/arch/arm/mach-w90x900/include/mach/mfp.h new file mode 100644 index 000000000000..94c0e71617c6 --- /dev/null +++ b/arch/arm/mach-w90x900/include/mach/mfp.h | |||
| @@ -0,0 +1,24 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-w90x900/include/mach/mfp.h | ||
| 3 | * | ||
| 4 | * Copyright (c) 2010 Nuvoton technology corporation. | ||
| 5 | * | ||
| 6 | * Wan ZongShun <mcuos.com@gmail.com> | ||
| 7 | * | ||
| 8 | * Based on arch/arm/mach-s3c2410/include/mach/map.h | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License as published by | ||
| 12 | * the Free Software Foundation;version 2 of the License. | ||
| 13 | * | ||
| 14 | */ | ||
| 15 | |||
| 16 | #ifndef __ASM_ARCH_MFP_H | ||
| 17 | #define __ASM_ARCH_MFP_H | ||
| 18 | |||
| 19 | extern void mfp_set_groupf(struct device *dev); | ||
| 20 | extern void mfp_set_groupc(struct device *dev); | ||
| 21 | extern void mfp_set_groupi(struct device *dev); | ||
| 22 | extern void mfp_set_groupg(struct device *dev); | ||
| 23 | |||
| 24 | #endif /* __ASM_ARCH_MFP_H */ | ||
diff --git a/arch/arm/mach-w90x900/mfp.c b/arch/arm/mach-w90x900/mfp.c index a47dc9a708ee..fb7fb627b1a5 100644 --- a/arch/arm/mach-w90x900/mfp.c +++ b/arch/arm/mach-w90x900/mfp.c | |||
| @@ -36,9 +36,12 @@ | |||
| 36 | 36 | ||
| 37 | #define GPIOG0TO1 (0x03 << 14) | 37 | #define GPIOG0TO1 (0x03 << 14) |
| 38 | #define GPIOG2TO3 (0x03 << 16) | 38 | #define GPIOG2TO3 (0x03 << 16) |
| 39 | #define GPIOG22TO23 (0x03 << 22) | ||
| 40 | |||
| 39 | #define ENSPI (0x0a << 14) | 41 | #define ENSPI (0x0a << 14) |
| 40 | #define ENI2C0 (0x01 << 14) | 42 | #define ENI2C0 (0x01 << 14) |
| 41 | #define ENI2C1 (0x01 << 16) | 43 | #define ENI2C1 (0x01 << 16) |
| 44 | #define ENAC97 (0x02 << 22) | ||
| 42 | 45 | ||
| 43 | static DEFINE_MUTEX(mfp_mutex); | 46 | static DEFINE_MUTEX(mfp_mutex); |
| 44 | 47 | ||
| @@ -146,6 +149,9 @@ void mfp_set_groupg(struct device *dev) | |||
| 146 | } else if (strcmp(dev_id, "nuc900-i2c1") == 0) { | 149 | } else if (strcmp(dev_id, "nuc900-i2c1") == 0) { |
| 147 | mfpen &= ~(GPIOG2TO3); | 150 | mfpen &= ~(GPIOG2TO3); |
| 148 | mfpen |= ENI2C1;/*enable i2c1*/ | 151 | mfpen |= ENI2C1;/*enable i2c1*/ |
| 152 | } else if (strcmp(dev_id, "nuc900-audio") == 0) { | ||
| 153 | mfpen &= ~(GPIOG22TO23); | ||
| 154 | mfpen |= ENAC97;/*enable AC97*/ | ||
| 149 | } else { | 155 | } else { |
| 150 | mfpen &= ~(GPIOG0TO1 | GPIOG2TO3);/*GPIOG[3:0]*/ | 156 | mfpen &= ~(GPIOG0TO1 | GPIOG2TO3);/*GPIOG[3:0]*/ |
| 151 | } | 157 | } |
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S index 06a90dcfc60a..37c8157e116e 100644 --- a/arch/arm/mm/cache-v7.S +++ b/arch/arm/mm/cache-v7.S | |||
| @@ -91,7 +91,11 @@ ENTRY(v7_flush_kern_cache_all) | |||
| 91 | THUMB( stmfd sp!, {r4-r7, r9-r11, lr} ) | 91 | THUMB( stmfd sp!, {r4-r7, r9-r11, lr} ) |
| 92 | bl v7_flush_dcache_all | 92 | bl v7_flush_dcache_all |
| 93 | mov r0, #0 | 93 | mov r0, #0 |
| 94 | #ifdef CONFIG_SMP | ||
| 95 | mcr p15, 0, r0, c7, c1, 0 @ invalidate I-cache inner shareable | ||
| 96 | #else | ||
| 94 | mcr p15, 0, r0, c7, c5, 0 @ I+BTB cache invalidate | 97 | mcr p15, 0, r0, c7, c5, 0 @ I+BTB cache invalidate |
| 98 | #endif | ||
| 95 | ARM( ldmfd sp!, {r4-r5, r7, r9-r11, lr} ) | 99 | ARM( ldmfd sp!, {r4-r5, r7, r9-r11, lr} ) |
| 96 | THUMB( ldmfd sp!, {r4-r7, r9-r11, lr} ) | 100 | THUMB( ldmfd sp!, {r4-r7, r9-r11, lr} ) |
| 97 | mov pc, lr | 101 | mov pc, lr |
diff --git a/arch/arm/mm/copypage-feroceon.c b/arch/arm/mm/copypage-feroceon.c index 5eb4fd93893d..ac163de7dc01 100644 --- a/arch/arm/mm/copypage-feroceon.c +++ b/arch/arm/mm/copypage-feroceon.c | |||
| @@ -18,7 +18,7 @@ feroceon_copy_user_page(void *kto, const void *kfrom) | |||
| 18 | { | 18 | { |
| 19 | asm("\ | 19 | asm("\ |
| 20 | stmfd sp!, {r4-r9, lr} \n\ | 20 | stmfd sp!, {r4-r9, lr} \n\ |
| 21 | mov ip, %0 \n\ | 21 | mov ip, %2 \n\ |
| 22 | 1: mov lr, r1 \n\ | 22 | 1: mov lr, r1 \n\ |
| 23 | ldmia r1!, {r2 - r9} \n\ | 23 | ldmia r1!, {r2 - r9} \n\ |
| 24 | pld [lr, #32] \n\ | 24 | pld [lr, #32] \n\ |
| @@ -64,7 +64,7 @@ feroceon_copy_user_page(void *kto, const void *kfrom) | |||
| 64 | mcr p15, 0, ip, c7, c10, 4 @ drain WB\n\ | 64 | mcr p15, 0, ip, c7, c10, 4 @ drain WB\n\ |
| 65 | ldmfd sp!, {r4-r9, pc}" | 65 | ldmfd sp!, {r4-r9, pc}" |
| 66 | : | 66 | : |
| 67 | : "I" (PAGE_SIZE)); | 67 | : "r" (kto), "r" (kfrom), "I" (PAGE_SIZE)); |
| 68 | } | 68 | } |
| 69 | 69 | ||
| 70 | void feroceon_copy_user_highpage(struct page *to, struct page *from, | 70 | void feroceon_copy_user_highpage(struct page *to, struct page *from, |
diff --git a/arch/arm/mm/copypage-v4wb.c b/arch/arm/mm/copypage-v4wb.c index 7c2eb55cd4a9..cb589cbb2b6c 100644 --- a/arch/arm/mm/copypage-v4wb.c +++ b/arch/arm/mm/copypage-v4wb.c | |||
| @@ -27,7 +27,7 @@ v4wb_copy_user_page(void *kto, const void *kfrom) | |||
| 27 | { | 27 | { |
| 28 | asm("\ | 28 | asm("\ |
| 29 | stmfd sp!, {r4, lr} @ 2\n\ | 29 | stmfd sp!, {r4, lr} @ 2\n\ |
| 30 | mov r2, %0 @ 1\n\ | 30 | mov r2, %2 @ 1\n\ |
| 31 | ldmia r1!, {r3, r4, ip, lr} @ 4\n\ | 31 | ldmia r1!, {r3, r4, ip, lr} @ 4\n\ |
| 32 | 1: mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line\n\ | 32 | 1: mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line\n\ |
| 33 | stmia r0!, {r3, r4, ip, lr} @ 4\n\ | 33 | stmia r0!, {r3, r4, ip, lr} @ 4\n\ |
| @@ -44,7 +44,7 @@ v4wb_copy_user_page(void *kto, const void *kfrom) | |||
| 44 | mcr p15, 0, r1, c7, c10, 4 @ 1 drain WB\n\ | 44 | mcr p15, 0, r1, c7, c10, 4 @ 1 drain WB\n\ |
| 45 | ldmfd sp!, {r4, pc} @ 3" | 45 | ldmfd sp!, {r4, pc} @ 3" |
| 46 | : | 46 | : |
| 47 | : "I" (PAGE_SIZE / 64)); | 47 | : "r" (kto), "r" (kfrom), "I" (PAGE_SIZE / 64)); |
| 48 | } | 48 | } |
| 49 | 49 | ||
| 50 | void v4wb_copy_user_highpage(struct page *to, struct page *from, | 50 | void v4wb_copy_user_highpage(struct page *to, struct page *from, |
diff --git a/arch/arm/mm/copypage-v4wt.c b/arch/arm/mm/copypage-v4wt.c index 172e6a55458e..30c7d048a324 100644 --- a/arch/arm/mm/copypage-v4wt.c +++ b/arch/arm/mm/copypage-v4wt.c | |||
| @@ -25,7 +25,7 @@ v4wt_copy_user_page(void *kto, const void *kfrom) | |||
| 25 | { | 25 | { |
| 26 | asm("\ | 26 | asm("\ |
| 27 | stmfd sp!, {r4, lr} @ 2\n\ | 27 | stmfd sp!, {r4, lr} @ 2\n\ |
| 28 | mov r2, %0 @ 1\n\ | 28 | mov r2, %2 @ 1\n\ |
| 29 | ldmia r1!, {r3, r4, ip, lr} @ 4\n\ | 29 | ldmia r1!, {r3, r4, ip, lr} @ 4\n\ |
| 30 | 1: stmia r0!, {r3, r4, ip, lr} @ 4\n\ | 30 | 1: stmia r0!, {r3, r4, ip, lr} @ 4\n\ |
| 31 | ldmia r1!, {r3, r4, ip, lr} @ 4+1\n\ | 31 | ldmia r1!, {r3, r4, ip, lr} @ 4+1\n\ |
| @@ -40,7 +40,7 @@ v4wt_copy_user_page(void *kto, const void *kfrom) | |||
| 40 | mcr p15, 0, r2, c7, c7, 0 @ flush ID cache\n\ | 40 | mcr p15, 0, r2, c7, c7, 0 @ flush ID cache\n\ |
| 41 | ldmfd sp!, {r4, pc} @ 3" | 41 | ldmfd sp!, {r4, pc} @ 3" |
| 42 | : | 42 | : |
| 43 | : "I" (PAGE_SIZE / 64)); | 43 | : "r" (kto), "r" (kfrom), "I" (PAGE_SIZE / 64)); |
| 44 | } | 44 | } |
| 45 | 45 | ||
| 46 | void v4wt_copy_user_highpage(struct page *to, struct page *from, | 46 | void v4wt_copy_user_highpage(struct page *to, struct page *from, |
diff --git a/arch/arm/mm/copypage-xsc3.c b/arch/arm/mm/copypage-xsc3.c index 747ad4140fc7..f9cde0702f1e 100644 --- a/arch/arm/mm/copypage-xsc3.c +++ b/arch/arm/mm/copypage-xsc3.c | |||
| @@ -34,7 +34,7 @@ xsc3_mc_copy_user_page(void *kto, const void *kfrom) | |||
| 34 | { | 34 | { |
| 35 | asm("\ | 35 | asm("\ |
| 36 | stmfd sp!, {r4, r5, lr} \n\ | 36 | stmfd sp!, {r4, r5, lr} \n\ |
| 37 | mov lr, %0 \n\ | 37 | mov lr, %2 \n\ |
| 38 | \n\ | 38 | \n\ |
| 39 | pld [r1, #0] \n\ | 39 | pld [r1, #0] \n\ |
| 40 | pld [r1, #32] \n\ | 40 | pld [r1, #32] \n\ |
| @@ -67,7 +67,7 @@ xsc3_mc_copy_user_page(void *kto, const void *kfrom) | |||
| 67 | \n\ | 67 | \n\ |
| 68 | ldmfd sp!, {r4, r5, pc}" | 68 | ldmfd sp!, {r4, r5, pc}" |
| 69 | : | 69 | : |
| 70 | : "I" (PAGE_SIZE / 64 - 1)); | 70 | : "r" (kto), "r" (kfrom), "I" (PAGE_SIZE / 64 - 1)); |
| 71 | } | 71 | } |
| 72 | 72 | ||
| 73 | void xsc3_mc_copy_user_highpage(struct page *to, struct page *from, | 73 | void xsc3_mc_copy_user_highpage(struct page *to, struct page *from, |
diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c index 92f5801f99c1..cbfb2edcf7d1 100644 --- a/arch/arm/mm/fault.c +++ b/arch/arm/mm/fault.c | |||
| @@ -393,6 +393,9 @@ do_translation_fault(unsigned long addr, unsigned int fsr, | |||
| 393 | if (addr < TASK_SIZE) | 393 | if (addr < TASK_SIZE) |
| 394 | return do_page_fault(addr, fsr, regs); | 394 | return do_page_fault(addr, fsr, regs); |
| 395 | 395 | ||
| 396 | if (user_mode(regs)) | ||
| 397 | goto bad_area; | ||
| 398 | |||
| 396 | index = pgd_index(addr); | 399 | index = pgd_index(addr); |
| 397 | 400 | ||
| 398 | /* | 401 | /* |
diff --git a/arch/arm/mm/highmem.c b/arch/arm/mm/highmem.c index 77b030f5ec09..086816b205b8 100644 --- a/arch/arm/mm/highmem.c +++ b/arch/arm/mm/highmem.c | |||
| @@ -48,7 +48,16 @@ void *kmap_atomic(struct page *page, enum km_type type) | |||
| 48 | 48 | ||
| 49 | debug_kmap_atomic(type); | 49 | debug_kmap_atomic(type); |
| 50 | 50 | ||
| 51 | kmap = kmap_high_get(page); | 51 | #ifdef CONFIG_DEBUG_HIGHMEM |
| 52 | /* | ||
| 53 | * There is no cache coherency issue when non VIVT, so force the | ||
| 54 | * dedicated kmap usage for better debugging purposes in that case. | ||
| 55 | */ | ||
| 56 | if (!cache_is_vivt()) | ||
| 57 | kmap = NULL; | ||
| 58 | else | ||
| 59 | #endif | ||
| 60 | kmap = kmap_high_get(page); | ||
| 52 | if (kmap) | 61 | if (kmap) |
| 53 | return kmap; | 62 | return kmap; |
| 54 | 63 | ||
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c index 1ba6cf5a2c02..f6a999465323 100644 --- a/arch/arm/mm/init.c +++ b/arch/arm/mm/init.c | |||
| @@ -678,10 +678,10 @@ void __init mem_init(void) | |||
| 678 | void free_initmem(void) | 678 | void free_initmem(void) |
| 679 | { | 679 | { |
| 680 | #ifdef CONFIG_HAVE_TCM | 680 | #ifdef CONFIG_HAVE_TCM |
| 681 | extern char *__tcm_start, *__tcm_end; | 681 | extern char __tcm_start, __tcm_end; |
| 682 | 682 | ||
| 683 | totalram_pages += free_area(__phys_to_pfn(__pa(__tcm_start)), | 683 | totalram_pages += free_area(__phys_to_pfn(__pa(&__tcm_start)), |
| 684 | __phys_to_pfn(__pa(__tcm_end)), | 684 | __phys_to_pfn(__pa(&__tcm_end)), |
| 685 | "TCM link"); | 685 | "TCM link"); |
| 686 | #endif | 686 | #endif |
| 687 | 687 | ||
diff --git a/arch/arm/nwfpe/ChangeLog b/arch/arm/nwfpe/ChangeLog index eeb5a7c5ff09..fa8028b1e1cf 100644 --- a/arch/arm/nwfpe/ChangeLog +++ b/arch/arm/nwfpe/ChangeLog | |||
| @@ -72,7 +72,7 @@ | |||
| 72 | 1998-11-23 Scott Bambrough <scottb@netwinder.org> | 72 | 1998-11-23 Scott Bambrough <scottb@netwinder.org> |
| 73 | 73 | ||
| 74 | * README.FPE - fix typo in description of lfm/sfm instructions | 74 | * README.FPE - fix typo in description of lfm/sfm instructions |
| 75 | * NOTES - Added file to describe known bugs/problems | 75 | * NOTES - Added file to describe known bugs/problems |
| 76 | * fpmodule.c - Changed version number to 0.94 | 76 | * fpmodule.c - Changed version number to 0.94 |
| 77 | 77 | ||
| 78 | 1998-11-20 Scott Bambrough <scottb@netwinder.org> | 78 | 1998-11-20 Scott Bambrough <scottb@netwinder.org> |
diff --git a/arch/arm/nwfpe/fpsr.h b/arch/arm/nwfpe/fpsr.h index 859b300d89fd..bd425dc13b61 100644 --- a/arch/arm/nwfpe/fpsr.h +++ b/arch/arm/nwfpe/fpsr.h | |||
| @@ -30,7 +30,7 @@ one byte. | |||
| 30 | EXCEPTION TRAP ENABLE BYTE | 30 | EXCEPTION TRAP ENABLE BYTE |
| 31 | SYSTEM CONTROL BYTE | 31 | SYSTEM CONTROL BYTE |
| 32 | CUMULATIVE EXCEPTION FLAGS BYTE | 32 | CUMULATIVE EXCEPTION FLAGS BYTE |
| 33 | 33 | ||
| 34 | The FPCR is a 32 bit register consisting of bit flags. | 34 | The FPCR is a 32 bit register consisting of bit flags. |
| 35 | */ | 35 | */ |
| 36 | 36 | ||
diff --git a/arch/arm/plat-mxc/ehci.c b/arch/arm/plat-mxc/ehci.c index cb0b63874482..2a8646173c2f 100644 --- a/arch/arm/plat-mxc/ehci.c +++ b/arch/arm/plat-mxc/ehci.c | |||
| @@ -1,5 +1,6 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de> | 2 | * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de> |
| 3 | * Copyright (C) 2010 Freescale Semiconductor, Inc. | ||
| 3 | * | 4 | * |
| 4 | * This program is free software; you can redistribute it and/or modify it | 5 | * This program is free software; you can redistribute it and/or modify it |
| 5 | * under the terms of the GNU General Public License as published by the | 6 | * under the terms of the GNU General Public License as published by the |
| @@ -50,7 +51,26 @@ | |||
| 50 | #define MX35_H1_TLL_BIT (1 << 5) | 51 | #define MX35_H1_TLL_BIT (1 << 5) |
| 51 | #define MX35_H1_USBTE_BIT (1 << 4) | 52 | #define MX35_H1_USBTE_BIT (1 << 4) |
| 52 | 53 | ||
| 53 | int mxc_set_usbcontrol(int port, unsigned int flags) | 54 | #define MXC_OTG_OFFSET 0 |
| 55 | #define MXC_H1_OFFSET 0x200 | ||
| 56 | |||
| 57 | /* USB_CTRL */ | ||
| 58 | #define MXC_OTG_UCTRL_OWIE_BIT (1 << 27) /* OTG wakeup intr enable */ | ||
| 59 | #define MXC_OTG_UCTRL_OPM_BIT (1 << 24) /* OTG power mask */ | ||
| 60 | #define MXC_H1_UCTRL_H1UIE_BIT (1 << 12) /* Host1 ULPI interrupt enable */ | ||
| 61 | #define MXC_H1_UCTRL_H1WIE_BIT (1 << 11) /* HOST1 wakeup intr enable */ | ||
| 62 | #define MXC_H1_UCTRL_H1PM_BIT (1 << 8) /* HOST1 power mask */ | ||
| 63 | |||
| 64 | /* USB_PHY_CTRL_FUNC */ | ||
| 65 | #define MXC_OTG_PHYCTRL_OC_DIS_BIT (1 << 8) /* OTG Disable Overcurrent Event */ | ||
| 66 | #define MXC_H1_OC_DIS_BIT (1 << 5) /* UH1 Disable Overcurrent Event */ | ||
| 67 | |||
| 68 | #define MXC_USBCMD_OFFSET 0x140 | ||
| 69 | |||
| 70 | /* USBCMD */ | ||
| 71 | #define MXC_UCMD_ITC_NO_THRESHOLD_MASK (~(0xff << 16)) /* Interrupt Threshold Control */ | ||
| 72 | |||
| 73 | int mxc_initialize_usb_hw(int port, unsigned int flags) | ||
| 54 | { | 74 | { |
| 55 | unsigned int v; | 75 | unsigned int v; |
| 56 | #ifdef CONFIG_ARCH_MX3 | 76 | #ifdef CONFIG_ARCH_MX3 |
| @@ -186,9 +206,85 @@ int mxc_set_usbcontrol(int port, unsigned int flags) | |||
| 186 | return 0; | 206 | return 0; |
| 187 | } | 207 | } |
| 188 | #endif /* CONFIG_MACH_MX27 */ | 208 | #endif /* CONFIG_MACH_MX27 */ |
| 209 | #ifdef CONFIG_ARCH_MX51 | ||
| 210 | if (cpu_is_mx51()) { | ||
| 211 | void __iomem *usb_base; | ||
| 212 | u32 usbotg_base; | ||
| 213 | u32 usbother_base; | ||
| 214 | int ret = 0; | ||
| 215 | |||
| 216 | usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); | ||
| 217 | |||
| 218 | switch (port) { | ||
| 219 | case 0: /* OTG port */ | ||
| 220 | usbotg_base = usb_base + MXC_OTG_OFFSET; | ||
| 221 | break; | ||
| 222 | case 1: /* Host 1 port */ | ||
| 223 | usbotg_base = usb_base + MXC_H1_OFFSET; | ||
| 224 | break; | ||
| 225 | default: | ||
| 226 | printk(KERN_ERR"%s no such port %d\n", __func__, port); | ||
| 227 | ret = -ENOENT; | ||
| 228 | goto error; | ||
| 229 | } | ||
| 230 | usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET; | ||
| 231 | |||
| 232 | switch (port) { | ||
| 233 | case 0: /*OTG port */ | ||
| 234 | if (flags & MXC_EHCI_INTERNAL_PHY) { | ||
| 235 | v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC_OFFSET); | ||
| 236 | |||
| 237 | if (flags & MXC_EHCI_POWER_PINS_ENABLED) | ||
| 238 | v |= (MXC_OTG_PHYCTRL_OC_DIS_BIT | MXC_OTG_UCTRL_OPM_BIT); /* OC/USBPWR is not used */ | ||
| 239 | else | ||
| 240 | v &= ~(MXC_OTG_PHYCTRL_OC_DIS_BIT | MXC_OTG_UCTRL_OPM_BIT); /* OC/USBPWR is used */ | ||
| 241 | __raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC_OFFSET); | ||
| 242 | |||
| 243 | v = __raw_readl(usbother_base + MXC_USBCTRL_OFFSET); | ||
| 244 | if (flags & MXC_EHCI_WAKEUP_ENABLED) | ||
| 245 | v |= MXC_OTG_UCTRL_OWIE_BIT;/* OTG wakeup enable */ | ||
| 246 | else | ||
| 247 | v &= ~MXC_OTG_UCTRL_OWIE_BIT;/* OTG wakeup disable */ | ||
| 248 | __raw_writel(v, usbother_base + MXC_USBCTRL_OFFSET); | ||
| 249 | } | ||
| 250 | break; | ||
| 251 | case 1: /* Host 1 */ | ||
| 252 | /*Host ULPI */ | ||
| 253 | v = __raw_readl(usbother_base + MXC_USBCTRL_OFFSET); | ||
| 254 | if (flags & MXC_EHCI_WAKEUP_ENABLED) | ||
| 255 | v &= ~(MXC_H1_UCTRL_H1WIE_BIT | MXC_H1_UCTRL_H1UIE_BIT);/* HOST1 wakeup/ULPI intr disable */ | ||
| 256 | else | ||
| 257 | v &= ~(MXC_H1_UCTRL_H1WIE_BIT | MXC_H1_UCTRL_H1UIE_BIT);/* HOST1 wakeup/ULPI intr disable */ | ||
| 258 | |||
| 259 | if (flags & MXC_EHCI_POWER_PINS_ENABLED) | ||
| 260 | v &= ~MXC_H1_UCTRL_H1PM_BIT; /* HOST1 power mask used*/ | ||
| 261 | else | ||
| 262 | v |= MXC_H1_UCTRL_H1PM_BIT; /* HOST1 power mask used*/ | ||
| 263 | __raw_writel(v, usbother_base + MXC_USBCTRL_OFFSET); | ||
| 264 | |||
| 265 | v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC_OFFSET); | ||
| 266 | if (flags & MXC_EHCI_POWER_PINS_ENABLED) | ||
| 267 | v &= ~MXC_H1_OC_DIS_BIT; /* OC is used */ | ||
| 268 | else | ||
| 269 | v |= MXC_H1_OC_DIS_BIT; /* OC is not used */ | ||
| 270 | __raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC_OFFSET); | ||
| 271 | |||
| 272 | v = __raw_readl(usbotg_base + MXC_USBCMD_OFFSET); | ||
| 273 | if (flags & MXC_EHCI_ITC_NO_THRESHOLD) | ||
| 274 | /* Interrupt Threshold Control:Immediate (no threshold) */ | ||
| 275 | v &= MXC_UCMD_ITC_NO_THRESHOLD_MASK; | ||
| 276 | __raw_writel(v, usbotg_base + MXC_USBCMD_OFFSET); | ||
| 277 | break; | ||
| 278 | } | ||
| 279 | |||
| 280 | error: | ||
| 281 | iounmap(usb_base); | ||
| 282 | return ret; | ||
| 283 | } | ||
| 284 | #endif | ||
| 189 | printk(KERN_WARNING | 285 | printk(KERN_WARNING |
| 190 | "%s() unable to setup USBCONTROL for this CPU\n", __func__); | 286 | "%s() unable to setup USBCONTROL for this CPU\n", __func__); |
| 191 | return -EINVAL; | 287 | return -EINVAL; |
| 192 | } | 288 | } |
| 193 | EXPORT_SYMBOL(mxc_set_usbcontrol); | 289 | EXPORT_SYMBOL(mxc_initialize_usb_hw); |
| 194 | 290 | ||
diff --git a/arch/arm/plat-mxc/gpio.c b/arch/arm/plat-mxc/gpio.c index 70b23893f094..71437c61cfd7 100644 --- a/arch/arm/plat-mxc/gpio.c +++ b/arch/arm/plat-mxc/gpio.c | |||
| @@ -3,7 +3,7 @@ | |||
| 3 | * Copyright 2008 Juergen Beisert, kernel@pengutronix.de | 3 | * Copyright 2008 Juergen Beisert, kernel@pengutronix.de |
| 4 | * | 4 | * |
| 5 | * Based on code from Freescale, | 5 | * Based on code from Freescale, |
| 6 | * Copyright 2004-2006 Freescale Semiconductor, Inc. All Rights Reserved. | 6 | * Copyright (C) 2004-2010 Freescale Semiconductor, Inc. All Rights Reserved. |
| 7 | * | 7 | * |
| 8 | * This program is free software; you can redistribute it and/or | 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License | 9 | * modify it under the terms of the GNU General Public License |
| @@ -38,7 +38,6 @@ static int gpio_table_size; | |||
| 38 | #define GPIO_ICR2 (cpu_is_mx1_mx2() ? 0x2C : 0x10) | 38 | #define GPIO_ICR2 (cpu_is_mx1_mx2() ? 0x2C : 0x10) |
| 39 | #define GPIO_IMR (cpu_is_mx1_mx2() ? 0x30 : 0x14) | 39 | #define GPIO_IMR (cpu_is_mx1_mx2() ? 0x30 : 0x14) |
| 40 | #define GPIO_ISR (cpu_is_mx1_mx2() ? 0x34 : 0x18) | 40 | #define GPIO_ISR (cpu_is_mx1_mx2() ? 0x34 : 0x18) |
| 41 | #define GPIO_ISR (cpu_is_mx1_mx2() ? 0x34 : 0x18) | ||
| 42 | 41 | ||
| 43 | #define GPIO_INT_LOW_LEV (cpu_is_mx1_mx2() ? 0x3 : 0x0) | 42 | #define GPIO_INT_LOW_LEV (cpu_is_mx1_mx2() ? 0x3 : 0x0) |
| 44 | #define GPIO_INT_HIGH_LEV (cpu_is_mx1_mx2() ? 0x2 : 0x1) | 43 | #define GPIO_INT_HIGH_LEV (cpu_is_mx1_mx2() ? 0x2 : 0x1) |
| @@ -289,7 +288,7 @@ int __init mxc_gpio_init(struct mxc_gpio_port *port, int cnt) | |||
| 289 | /* its a serious configuration bug when it fails */ | 288 | /* its a serious configuration bug when it fails */ |
| 290 | BUG_ON( gpiochip_add(&port[i].chip) < 0 ); | 289 | BUG_ON( gpiochip_add(&port[i].chip) < 0 ); |
| 291 | 290 | ||
| 292 | if (cpu_is_mx1() || cpu_is_mx3() || cpu_is_mx25()) { | 291 | if (cpu_is_mx1() || cpu_is_mx3() || cpu_is_mx25() || cpu_is_mx51()) { |
| 293 | /* setup one handler for each entry */ | 292 | /* setup one handler for each entry */ |
| 294 | set_irq_chained_handler(port[i].irq, mx3_gpio_irq_handler); | 293 | set_irq_chained_handler(port[i].irq, mx3_gpio_irq_handler); |
| 295 | set_irq_data(port[i].irq, &port[i]); | 294 | set_irq_data(port[i].irq, &port[i]); |
diff --git a/arch/arm/plat-mxc/include/mach/board-mx31moboard.h b/arch/arm/plat-mxc/include/mach/board-mx31moboard.h index fc5fec9b55f0..36ff3cedee1a 100644 --- a/arch/arm/plat-mxc/include/mach/board-mx31moboard.h +++ b/arch/arm/plat-mxc/include/mach/board-mx31moboard.h | |||
| @@ -26,6 +26,7 @@ enum mx31moboard_boards { | |||
| 26 | MX31DEVBOARD = 1, | 26 | MX31DEVBOARD = 1, |
| 27 | MX31MARXBOT = 2, | 27 | MX31MARXBOT = 2, |
| 28 | MX31SMARTBOT = 3, | 28 | MX31SMARTBOT = 3, |
| 29 | MX31EYEBOT = 4, | ||
| 29 | }; | 30 | }; |
| 30 | 31 | ||
| 31 | /* | 32 | /* |
| @@ -35,7 +36,7 @@ enum mx31moboard_boards { | |||
| 35 | 36 | ||
| 36 | extern void mx31moboard_devboard_init(void); | 37 | extern void mx31moboard_devboard_init(void); |
| 37 | extern void mx31moboard_marxbot_init(void); | 38 | extern void mx31moboard_marxbot_init(void); |
| 38 | extern void mx31moboard_smartbot_init(void); | 39 | extern void mx31moboard_smartbot_init(int board); |
| 39 | 40 | ||
| 40 | #endif | 41 | #endif |
| 41 | 42 | ||
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx3.h b/arch/arm/plat-mxc/include/mach/iomux-mx3.h index e51465d7b224..cbaed295a2bf 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx3.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx3.h | |||
| @@ -719,6 +719,23 @@ enum iomux_pins { | |||
| 719 | #define MX31_PIN_SRXD5__SRXD5 IOMUX_MODE(MX31_PIN_SRXD5, IOMUX_CONFIG_FUNC) | 719 | #define MX31_PIN_SRXD5__SRXD5 IOMUX_MODE(MX31_PIN_SRXD5, IOMUX_CONFIG_FUNC) |
| 720 | #define MX31_PIN_SCK5__SCK5 IOMUX_MODE(MX31_PIN_SCK5, IOMUX_CONFIG_FUNC) | 720 | #define MX31_PIN_SCK5__SCK5 IOMUX_MODE(MX31_PIN_SCK5, IOMUX_CONFIG_FUNC) |
| 721 | #define MX31_PIN_SFS5__SFS5 IOMUX_MODE(MX31_PIN_SFS5, IOMUX_CONFIG_FUNC) | 721 | #define MX31_PIN_SFS5__SFS5 IOMUX_MODE(MX31_PIN_SFS5, IOMUX_CONFIG_FUNC) |
| 722 | #define MX31_PIN_KEY_ROW0_KEY_ROW0 IOMUX_MODE(MX31_PIN_KEY_ROW0, IOMUX_CONFIG_FUNC) | ||
| 723 | #define MX31_PIN_KEY_ROW1_KEY_ROW1 IOMUX_MODE(MX31_PIN_KEY_ROW1, IOMUX_CONFIG_FUNC) | ||
| 724 | #define MX31_PIN_KEY_ROW2_KEY_ROW2 IOMUX_MODE(MX31_PIN_KEY_ROW2, IOMUX_CONFIG_FUNC) | ||
| 725 | #define MX31_PIN_KEY_ROW3_KEY_ROW3 IOMUX_MODE(MX31_PIN_KEY_ROW3, IOMUX_CONFIG_FUNC) | ||
| 726 | #define MX31_PIN_KEY_ROW4_KEY_ROW4 IOMUX_MODE(MX31_PIN_KEY_ROW4, IOMUX_CONFIG_FUNC) | ||
| 727 | #define MX31_PIN_KEY_ROW5_KEY_ROW5 IOMUX_MODE(MX31_PIN_KEY_ROW5, IOMUX_CONFIG_FUNC) | ||
| 728 | #define MX31_PIN_KEY_ROW6_KEY_ROW6 IOMUX_MODE(MX31_PIN_KEY_ROW6, IOMUX_CONFIG_FUNC) | ||
| 729 | #define MX31_PIN_KEY_ROW7_KEY_ROW7 IOMUX_MODE(MX31_PIN_KEY_ROW7, IOMUX_CONFIG_FUNC) | ||
| 730 | #define MX31_PIN_KEY_COL0_KEY_COL0 IOMUX_MODE(MX31_PIN_KEY_COL0, IOMUX_CONFIG_FUNC) | ||
| 731 | #define MX31_PIN_KEY_COL1_KEY_COL1 IOMUX_MODE(MX31_PIN_KEY_COL1, IOMUX_CONFIG_FUNC) | ||
| 732 | #define MX31_PIN_KEY_COL2_KEY_COL2 IOMUX_MODE(MX31_PIN_KEY_COL2, IOMUX_CONFIG_FUNC) | ||
| 733 | #define MX31_PIN_KEY_COL3_KEY_COL3 IOMUX_MODE(MX31_PIN_KEY_COL3, IOMUX_CONFIG_FUNC) | ||
| 734 | #define MX31_PIN_KEY_COL4_KEY_COL4 IOMUX_MODE(MX31_PIN_KEY_COL4, IOMUX_CONFIG_FUNC) | ||
| 735 | #define MX31_PIN_KEY_COL5_KEY_COL5 IOMUX_MODE(MX31_PIN_KEY_COL5, IOMUX_CONFIG_FUNC) | ||
| 736 | #define MX31_PIN_KEY_COL6_KEY_COL6 IOMUX_MODE(MX31_PIN_KEY_COL6, IOMUX_CONFIG_FUNC) | ||
| 737 | #define MX31_PIN_KEY_COL7_KEY_COL7 IOMUX_MODE(MX31_PIN_KEY_COL7, IOMUX_CONFIG_FUNC) | ||
| 738 | |||
| 722 | 739 | ||
| 723 | /* | 740 | /* |
| 724 | * XXX: The SS0, SS1, SS2, SS3 lines of spi3 are multiplexed with cspi2_ss0, | 741 | * XXX: The SS0, SS1, SS2, SS3 lines of spi3 are multiplexed with cspi2_ss0, |
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx51.h b/arch/arm/plat-mxc/include/mach/iomux-mx51.h index b4f975e6a665..ab0f95d953d0 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx51.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx51.h | |||
| @@ -1,5 +1,6 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Copyright (C) 2009-2010 Amit Kucheria <amit.kucheria@canonical.com> | 2 | * Copyright (C) 2009-2010 Amit Kucheria <amit.kucheria@canonical.com> |
| 3 | * Copyright (C) 2010 Freescale Semiconductor, Inc. | ||
| 3 | * | 4 | * |
| 4 | * The code contained herein is licensed under the GNU General Public | 5 | * The code contained herein is licensed under the GNU General Public |
| 5 | * License. You may obtain a copy of the GNU General Public License | 6 | * License. You may obtain a copy of the GNU General Public License |
| @@ -37,6 +38,11 @@ typedef enum iomux_config { | |||
| 37 | PAD_CTL_SRE_FAST) | 38 | PAD_CTL_SRE_FAST) |
| 38 | #define MX51_UART3_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_DSE_HIGH | \ | 39 | #define MX51_UART3_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_DSE_HIGH | \ |
| 39 | PAD_CTL_SRE_FAST) | 40 | PAD_CTL_SRE_FAST) |
| 41 | #define MX51_USBH1_PAD_CTRL (PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | \ | ||
| 42 | PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \ | ||
| 43 | PAD_CTL_PKE | PAD_CTL_HYS) | ||
| 44 | #define MX51_GPIO_PAD_CTRL (PAD_CTL_DSE_HIGH | PAD_CTL_PKE | \ | ||
| 45 | PAD_CTL_SRE_FAST) | ||
| 40 | 46 | ||
| 41 | /* | 47 | /* |
| 42 | * The naming convention for the pad modes is MX51_PAD_<padname>__<padmode> | 48 | * The naming convention for the pad modes is MX51_PAD_<padname>__<padmode> |
| @@ -57,6 +63,7 @@ typedef enum iomux_config { | |||
| 57 | #define MX51_PAD_GPIO_2_3__EIM_D19 IOMUX_PAD(0x3fc, 0x068, 1, 0x0, 0, NO_PAD_CTRL) | 63 | #define MX51_PAD_GPIO_2_3__EIM_D19 IOMUX_PAD(0x3fc, 0x068, 1, 0x0, 0, NO_PAD_CTRL) |
| 58 | #define MX51_PAD_GPIO_2_4__EIM_D20 IOMUX_PAD(0x400, 0x06c, 1, 0x0, 0, NO_PAD_CTRL) | 64 | #define MX51_PAD_GPIO_2_4__EIM_D20 IOMUX_PAD(0x400, 0x06c, 1, 0x0, 0, NO_PAD_CTRL) |
| 59 | #define MX51_PAD_GPIO_2_5__EIM_D21 IOMUX_PAD(0x404, 0x070, 1, 0x0, 0, NO_PAD_CTRL) | 65 | #define MX51_PAD_GPIO_2_5__EIM_D21 IOMUX_PAD(0x404, 0x070, 1, 0x0, 0, NO_PAD_CTRL) |
| 66 | #define MX51_PAD_EIM_D21__GPIO_2_5 IOMUX_PAD(0x404, 0x070, IOMUX_CONFIG_ALT1, 0x0, 0, MX51_GPIO_PAD_CTRL) | ||
| 60 | #define MX51_PAD_GPIO_2_6__EIM_D22 IOMUX_PAD(0x408, 0x074, 1, 0x0, 0, NO_PAD_CTRL) | 67 | #define MX51_PAD_GPIO_2_6__EIM_D22 IOMUX_PAD(0x408, 0x074, 1, 0x0, 0, NO_PAD_CTRL) |
| 61 | #define MX51_PAD_GPIO_2_7__EIM_D23 IOMUX_PAD(0x40c, 0x078, 1, 0x0, 0, NO_PAD_CTRL) | 68 | #define MX51_PAD_GPIO_2_7__EIM_D23 IOMUX_PAD(0x40c, 0x078, 1, 0x0, 0, NO_PAD_CTRL) |
| 62 | 69 | ||
| @@ -208,18 +215,19 @@ typedef enum iomux_config { | |||
| 208 | #define MX51_PAD_KEY_COL3__KEY_COL3 IOMUX_PAD(0x658, 0x268, 0, 0x0, 0, NO_PAD_CTRL) | 215 | #define MX51_PAD_KEY_COL3__KEY_COL3 IOMUX_PAD(0x658, 0x268, 0, 0x0, 0, NO_PAD_CTRL) |
| 209 | #define MX51_PAD_KEY_COL4__KEY_COL4 IOMUX_PAD(0x65C, 0x26C, 0, 0x0, 0, NO_PAD_CTRL) | 216 | #define MX51_PAD_KEY_COL4__KEY_COL4 IOMUX_PAD(0x65C, 0x26C, 0, 0x0, 0, NO_PAD_CTRL) |
| 210 | #define MX51_PAD_KEY_COL5__KEY_COL5 IOMUX_PAD(0x660, 0x270, 0, 0x0, 0, NO_PAD_CTRL) | 217 | #define MX51_PAD_KEY_COL5__KEY_COL5 IOMUX_PAD(0x660, 0x270, 0, 0x0, 0, NO_PAD_CTRL) |
| 211 | #define MX51_PAD_GPIO_1_25__USBH1_CLK IOMUX_PAD(0x678, 0x278, 2, 0x0, 0, NO_PAD_CTRL) | 218 | #define MX51_PAD_USBH1_CLK__USBH1_CLK IOMUX_PAD(0x678, 0x278, IOMUX_CONFIG_ALT0, 0x0, 0, MX51_USBH1_PAD_CTRL) |
| 212 | #define MX51_PAD_GPIO_1_26__USBH1_DIR IOMUX_PAD(0x67C, 0x27C, 2, 0x0, 0, NO_PAD_CTRL) | 219 | #define MX51_PAD_USBH1_DIR__USBH1_DIR IOMUX_PAD(0x67C, 0x27C, IOMUX_CONFIG_ALT0, 0x0, 0, MX51_USBH1_PAD_CTRL) |
| 213 | #define MX51_PAD_GPIO_1_27__USBH1_STP IOMUX_PAD(0x680, 0x280, 2, 0x0, 0, NO_PAD_CTRL) | 220 | #define MX51_PAD_USBH1_STP__USBH1_STP IOMUX_PAD(0x680, 0x280, IOMUX_CONFIG_ALT0, 0x0, 0, MX51_USBH1_PAD_CTRL) |
| 214 | #define MX51_PAD_GPIO_1_28__USBH1_NXT IOMUX_PAD(0x684, 0x284, 2, 0x0, 0, NO_PAD_CTRL) | 221 | #define MX51_PAD_USBH1_STP__GPIO_1_27 IOMUX_PAD(0x680, 0x280, IOMUX_CONFIG_GPIO, 0x0, 0, MX51_USBH1_PAD_CTRL) |
| 215 | #define MX51_PAD_GPIO_1_11__USBH1_DATA0 IOMUX_PAD(0x688, 0x288, 2, 0x0, 0, NO_PAD_CTRL) | 222 | #define MX51_PAD_USBH1_NXT__USBH1_NXT IOMUX_PAD(0x684, 0x284, IOMUX_CONFIG_ALT0, 0x0, 0, MX51_USBH1_PAD_CTRL) |
| 216 | #define MX51_PAD_GPIO_1_12__USBH1_DATA1 IOMUX_PAD(0x68C, 0x28C, 2, 0x0, 0, NO_PAD_CTRL) | 223 | #define MX51_PAD_USBH1_DATA0__USBH1_DATA0 IOMUX_PAD(0x688, 0x288, IOMUX_CONFIG_ALT0, 0x0, 0, MX51_USBH1_PAD_CTRL) |
| 217 | #define MX51_PAD_GPIO_1_13__USBH1_DATA2 IOMUX_PAD(0x690, 0x290, 2, 0x0, 0, NO_PAD_CTRL) | 224 | #define MX51_PAD_USBH1_DATA1__USBH1_DATA1 IOMUX_PAD(0x68C, 0x28C, IOMUX_CONFIG_ALT0, 0x0, 0, MX51_USBH1_PAD_CTRL) |
| 218 | #define MX51_PAD_GPIO_1_14__USBH1_DATA3 IOMUX_PAD(0x694, 0x294, 2, 0x0, 0, NO_PAD_CTRL) | 225 | #define MX51_PAD_USBH1_DATA2__USBH1_DATA2 IOMUX_PAD(0x690, 0x290, IOMUX_CONFIG_ALT0, 0x0, 0, MX51_USBH1_PAD_CTRL) |
| 219 | #define MX51_PAD_GPIO_1_15__USBH1_DATA4 IOMUX_PAD(0x698, 0x298, 2, 0x0, 0, NO_PAD_CTRL) | 226 | #define MX51_PAD_USBH1_DATA3__USBH1_DATA3 IOMUX_PAD(0x694, 0x294, IOMUX_CONFIG_ALT0, 0x0, 0, MX51_USBH1_PAD_CTRL) |
| 220 | #define MX51_PAD_GPIO_1_16__USBH1_DATA5 IOMUX_PAD(0x69C, 0x29C, 2, 0x0, 0, NO_PAD_CTRL) | 227 | #define MX51_PAD_USBH1_DATA4__USBH1_DATA4 IOMUX_PAD(0x698, 0x298, IOMUX_CONFIG_ALT0, 0x0, 0, MX51_USBH1_PAD_CTRL) |
| 221 | #define MX51_PAD_GPIO_1_17__USBH1_DATA6 IOMUX_PAD(0x6A0, 0x2A0, 2, 0x0, 0, NO_PAD_CTRL) | 228 | #define MX51_PAD_USBH1_DATA5__USBH1_DATA5 IOMUX_PAD(0x69C, 0x29C, IOMUX_CONFIG_ALT0, 0x0, 0, MX51_USBH1_PAD_CTRL) |
| 222 | #define MX51_PAD_GPIO_1_18__USBH1_DATA7 IOMUX_PAD(0x6A4, 0x2A4, 2, 0x0, 0, NO_PAD_CTRL) | 229 | #define MX51_PAD_USBH1_DATA6__USBH1_DATA6 IOMUX_PAD(0x6A0, 0x2A0, IOMUX_CONFIG_ALT0, 0x0, 0, MX51_USBH1_PAD_CTRL) |
| 230 | #define MX51_PAD_USBH1_DATA7__USBH1_DATA7 IOMUX_PAD(0x6A4, 0x2A4, IOMUX_CONFIG_ALT0, 0x0, 0, MX51_USBH1_PAD_CTRL) | ||
| 223 | #define MX51_PAD_GPIO_3_0__DI1_PIN11 IOMUX_PAD(0x6A8, 0x2A8, 4, 0x0, 0, NO_PAD_CTRL) | 231 | #define MX51_PAD_GPIO_3_0__DI1_PIN11 IOMUX_PAD(0x6A8, 0x2A8, 4, 0x0, 0, NO_PAD_CTRL) |
| 224 | #define MX51_PAD_GPIO_3_1__DI1_PIN12 IOMUX_PAD(0x6AC, 0x2AC, 4, 0x0, 0, NO_PAD_CTRL) | 232 | #define MX51_PAD_GPIO_3_1__DI1_PIN12 IOMUX_PAD(0x6AC, 0x2AC, 4, 0x0, 0, NO_PAD_CTRL) |
| 225 | #define MX51_PAD_GPIO_3_2__DI1_PIN13 IOMUX_PAD(0x6B0, 0x2B0, 4, 0x0, 0, NO_PAD_CTRL) | 233 | #define MX51_PAD_GPIO_3_2__DI1_PIN13 IOMUX_PAD(0x6B0, 0x2B0, 4, 0x0, 0, NO_PAD_CTRL) |
| @@ -299,7 +307,7 @@ typedef enum iomux_config { | |||
| 299 | #define MX51_PAD_GPIO_1_4__GPIO1_4 IOMUX_PAD(0x804, 0x3D8, 0, 0x0, 0, NO_PAD_CTRL) | 307 | #define MX51_PAD_GPIO_1_4__GPIO1_4 IOMUX_PAD(0x804, 0x3D8, 0, 0x0, 0, NO_PAD_CTRL) |
| 300 | #define MX51_PAD_GPIO_1_5__GPIO1_5 IOMUX_PAD(0x808, 0x3DC, 0, 0x0, 0, NO_PAD_CTRL) | 308 | #define MX51_PAD_GPIO_1_5__GPIO1_5 IOMUX_PAD(0x808, 0x3DC, 0, 0x0, 0, NO_PAD_CTRL) |
| 301 | #define MX51_PAD_GPIO_1_6__GPIO1_6 IOMUX_PAD(0x80C, 0x3E0, 0, 0x0, 0, NO_PAD_CTRL) | 309 | #define MX51_PAD_GPIO_1_6__GPIO1_6 IOMUX_PAD(0x80C, 0x3E0, 0, 0x0, 0, NO_PAD_CTRL) |
| 302 | #define MX51_PAD_GPIO_1_7__GPIO1_7 IOMUX_PAD(0x810, 0x3E4, 0, 0x0, 0, NO_PAD_CTRL) | 310 | #define MX51_PAD_GPIO_1_7__GPIO1_7 IOMUX_PAD(0x810, 0x3E4, 0, 0x0, 0, MX51_GPIO_PAD_CTRL) |
| 303 | #define MX51_PAD_GPIO_1_8__GPIO1_8 IOMUX_PAD(0x814, 0x3E8, 0, 0x0, 1, \ | 311 | #define MX51_PAD_GPIO_1_8__GPIO1_8 IOMUX_PAD(0x814, 0x3E8, 0, 0x0, 1, \ |
| 304 | (PAD_CTL_SRE_SLOW | PAD_CTL_DSE_MED | PAD_CTL_PUS_100K_UP | PAD_CTL_HYS)) | 312 | (PAD_CTL_SRE_SLOW | PAD_CTL_DSE_MED | PAD_CTL_PUS_100K_UP | PAD_CTL_HYS)) |
| 305 | #define MX51_PAD_GPIO_1_9__GPIO1_9 IOMUX_PAD(0x818, 0x3EC, 0, 0x0, 0, NO_PAD_CTRL) | 313 | #define MX51_PAD_GPIO_1_9__GPIO1_9 IOMUX_PAD(0x818, 0x3EC, 0, 0x0, 0, NO_PAD_CTRL) |
diff --git a/arch/arm/plat-mxc/include/mach/mxc_ehci.h b/arch/arm/plat-mxc/include/mach/mxc_ehci.h index 4b9b8368c0c0..7fc5f9946199 100644 --- a/arch/arm/plat-mxc/include/mach/mxc_ehci.h +++ b/arch/arm/plat-mxc/include/mach/mxc_ehci.h | |||
| @@ -25,6 +25,18 @@ | |||
| 25 | #define MXC_EHCI_INTERNAL_PHY (1 << 7) | 25 | #define MXC_EHCI_INTERNAL_PHY (1 << 7) |
| 26 | #define MXC_EHCI_IPPUE_DOWN (1 << 8) | 26 | #define MXC_EHCI_IPPUE_DOWN (1 << 8) |
| 27 | #define MXC_EHCI_IPPUE_UP (1 << 9) | 27 | #define MXC_EHCI_IPPUE_UP (1 << 9) |
| 28 | #define MXC_EHCI_WAKEUP_ENABLED (1 << 10) | ||
| 29 | #define MXC_EHCI_ITC_NO_THRESHOLD (1 << 11) | ||
| 30 | |||
| 31 | #define MXC_USBCTRL_OFFSET 0 | ||
| 32 | #define MXC_USB_PHY_CTR_FUNC_OFFSET 0x8 | ||
| 33 | #define MXC_USB_PHY_CTR_FUNC2_OFFSET 0xc | ||
| 34 | |||
| 35 | #define MX5_USBOTHER_REGS_OFFSET 0x800 | ||
| 36 | |||
| 37 | /* USB_PHY_CTRL_FUNC2*/ | ||
| 38 | #define MX5_USB_UTMI_PHYCTRL1_PLLDIV_MASK 0x3 | ||
| 39 | #define MX5_USB_UTMI_PHYCTRL1_PLLDIV_SHIFT 0 | ||
| 28 | 40 | ||
| 29 | struct mxc_usbh_platform_data { | 41 | struct mxc_usbh_platform_data { |
| 30 | int (*init)(struct platform_device *pdev); | 42 | int (*init)(struct platform_device *pdev); |
| @@ -35,7 +47,7 @@ struct mxc_usbh_platform_data { | |||
| 35 | struct otg_transceiver *otg; | 47 | struct otg_transceiver *otg; |
| 36 | }; | 48 | }; |
| 37 | 49 | ||
| 38 | int mxc_set_usbcontrol(int port, unsigned int flags); | 50 | int mxc_initialize_usb_hw(int port, unsigned int flags); |
| 39 | 51 | ||
| 40 | #endif /* __INCLUDE_ASM_ARCH_MXC_EHCI_H */ | 52 | #endif /* __INCLUDE_ASM_ARCH_MXC_EHCI_H */ |
| 41 | 53 | ||
diff --git a/arch/arm/plat-mxc/time.c b/arch/arm/plat-mxc/time.c index c1ce51abdba6..f9a1b059a76c 100644 --- a/arch/arm/plat-mxc/time.c +++ b/arch/arm/plat-mxc/time.c | |||
| @@ -54,14 +54,14 @@ | |||
| 54 | #define MX2_TSTAT_COMP (1 << 0) | 54 | #define MX2_TSTAT_COMP (1 << 0) |
| 55 | 55 | ||
| 56 | /* MX31, MX35, MX25, MXC91231, MX5 */ | 56 | /* MX31, MX35, MX25, MXC91231, MX5 */ |
| 57 | #define MX3_TCTL_WAITEN (1 << 3) /* Wait enable mode */ | 57 | #define V2_TCTL_WAITEN (1 << 3) /* Wait enable mode */ |
| 58 | #define MX3_TCTL_CLK_IPG (1 << 6) | 58 | #define V2_TCTL_CLK_IPG (1 << 6) |
| 59 | #define MX3_TCTL_FRR (1 << 9) | 59 | #define V2_TCTL_FRR (1 << 9) |
| 60 | #define MX3_IR 0x0c | 60 | #define V2_IR 0x0c |
| 61 | #define MX3_TSTAT 0x08 | 61 | #define V2_TSTAT 0x08 |
| 62 | #define MX3_TSTAT_OF1 (1 << 0) | 62 | #define V2_TSTAT_OF1 (1 << 0) |
| 63 | #define MX3_TCN 0x24 | 63 | #define V2_TCN 0x24 |
| 64 | #define MX3_TCMP 0x10 | 64 | #define V2_TCMP 0x10 |
| 65 | 65 | ||
| 66 | #define timer_is_v1() (cpu_is_mx1() || cpu_is_mx21() || cpu_is_mx27()) | 66 | #define timer_is_v1() (cpu_is_mx1() || cpu_is_mx21() || cpu_is_mx27()) |
| 67 | #define timer_is_v2() (!timer_is_v1()) | 67 | #define timer_is_v2() (!timer_is_v1()) |
| @@ -76,7 +76,7 @@ static inline void gpt_irq_disable(void) | |||
| 76 | unsigned int tmp; | 76 | unsigned int tmp; |
| 77 | 77 | ||
| 78 | if (timer_is_v2()) | 78 | if (timer_is_v2()) |
| 79 | __raw_writel(0, timer_base + MX3_IR); | 79 | __raw_writel(0, timer_base + V2_IR); |
| 80 | else { | 80 | else { |
| 81 | tmp = __raw_readl(timer_base + MXC_TCTL); | 81 | tmp = __raw_readl(timer_base + MXC_TCTL); |
| 82 | __raw_writel(tmp & ~MX1_2_TCTL_IRQEN, timer_base + MXC_TCTL); | 82 | __raw_writel(tmp & ~MX1_2_TCTL_IRQEN, timer_base + MXC_TCTL); |
| @@ -86,7 +86,7 @@ static inline void gpt_irq_disable(void) | |||
| 86 | static inline void gpt_irq_enable(void) | 86 | static inline void gpt_irq_enable(void) |
| 87 | { | 87 | { |
| 88 | if (timer_is_v2()) | 88 | if (timer_is_v2()) |
| 89 | __raw_writel(1<<0, timer_base + MX3_IR); | 89 | __raw_writel(1<<0, timer_base + V2_IR); |
| 90 | else { | 90 | else { |
| 91 | __raw_writel(__raw_readl(timer_base + MXC_TCTL) | MX1_2_TCTL_IRQEN, | 91 | __raw_writel(__raw_readl(timer_base + MXC_TCTL) | MX1_2_TCTL_IRQEN, |
| 92 | timer_base + MXC_TCTL); | 92 | timer_base + MXC_TCTL); |
| @@ -102,7 +102,7 @@ static void gpt_irq_acknowledge(void) | |||
| 102 | __raw_writel(MX2_TSTAT_CAPT | MX2_TSTAT_COMP, | 102 | __raw_writel(MX2_TSTAT_CAPT | MX2_TSTAT_COMP, |
| 103 | timer_base + MX1_2_TSTAT); | 103 | timer_base + MX1_2_TSTAT); |
| 104 | } else if (timer_is_v2()) | 104 | } else if (timer_is_v2()) |
| 105 | __raw_writel(MX3_TSTAT_OF1, timer_base + MX3_TSTAT); | 105 | __raw_writel(V2_TSTAT_OF1, timer_base + V2_TSTAT); |
| 106 | } | 106 | } |
| 107 | 107 | ||
| 108 | static cycle_t mx1_2_get_cycles(struct clocksource *cs) | 108 | static cycle_t mx1_2_get_cycles(struct clocksource *cs) |
| @@ -110,9 +110,9 @@ static cycle_t mx1_2_get_cycles(struct clocksource *cs) | |||
| 110 | return __raw_readl(timer_base + MX1_2_TCN); | 110 | return __raw_readl(timer_base + MX1_2_TCN); |
| 111 | } | 111 | } |
| 112 | 112 | ||
| 113 | static cycle_t mx3_get_cycles(struct clocksource *cs) | 113 | static cycle_t v2_get_cycles(struct clocksource *cs) |
| 114 | { | 114 | { |
| 115 | return __raw_readl(timer_base + MX3_TCN); | 115 | return __raw_readl(timer_base + V2_TCN); |
| 116 | } | 116 | } |
| 117 | 117 | ||
| 118 | static struct clocksource clocksource_mxc = { | 118 | static struct clocksource clocksource_mxc = { |
| @@ -129,7 +129,7 @@ static int __init mxc_clocksource_init(struct clk *timer_clk) | |||
| 129 | unsigned int c = clk_get_rate(timer_clk); | 129 | unsigned int c = clk_get_rate(timer_clk); |
| 130 | 130 | ||
| 131 | if (timer_is_v2()) | 131 | if (timer_is_v2()) |
| 132 | clocksource_mxc.read = mx3_get_cycles; | 132 | clocksource_mxc.read = v2_get_cycles; |
| 133 | 133 | ||
| 134 | clocksource_mxc.mult = clocksource_hz2mult(c, | 134 | clocksource_mxc.mult = clocksource_hz2mult(c, |
| 135 | clocksource_mxc.shift); | 135 | clocksource_mxc.shift); |
| @@ -153,16 +153,16 @@ static int mx1_2_set_next_event(unsigned long evt, | |||
| 153 | -ETIME : 0; | 153 | -ETIME : 0; |
| 154 | } | 154 | } |
| 155 | 155 | ||
| 156 | static int mx3_set_next_event(unsigned long evt, | 156 | static int v2_set_next_event(unsigned long evt, |
| 157 | struct clock_event_device *unused) | 157 | struct clock_event_device *unused) |
| 158 | { | 158 | { |
| 159 | unsigned long tcmp; | 159 | unsigned long tcmp; |
| 160 | 160 | ||
| 161 | tcmp = __raw_readl(timer_base + MX3_TCN) + evt; | 161 | tcmp = __raw_readl(timer_base + V2_TCN) + evt; |
| 162 | 162 | ||
| 163 | __raw_writel(tcmp, timer_base + MX3_TCMP); | 163 | __raw_writel(tcmp, timer_base + V2_TCMP); |
| 164 | 164 | ||
| 165 | return (int)(tcmp - __raw_readl(timer_base + MX3_TCN)) < 0 ? | 165 | return (int)(tcmp - __raw_readl(timer_base + V2_TCN)) < 0 ? |
| 166 | -ETIME : 0; | 166 | -ETIME : 0; |
| 167 | } | 167 | } |
| 168 | 168 | ||
| @@ -192,8 +192,8 @@ static void mxc_set_mode(enum clock_event_mode mode, | |||
| 192 | if (mode != clockevent_mode) { | 192 | if (mode != clockevent_mode) { |
| 193 | /* Set event time into far-far future */ | 193 | /* Set event time into far-far future */ |
| 194 | if (timer_is_v2()) | 194 | if (timer_is_v2()) |
| 195 | __raw_writel(__raw_readl(timer_base + MX3_TCN) - 3, | 195 | __raw_writel(__raw_readl(timer_base + V2_TCN) - 3, |
| 196 | timer_base + MX3_TCMP); | 196 | timer_base + V2_TCMP); |
| 197 | else | 197 | else |
| 198 | __raw_writel(__raw_readl(timer_base + MX1_2_TCN) - 3, | 198 | __raw_writel(__raw_readl(timer_base + MX1_2_TCN) - 3, |
| 199 | timer_base + MX1_2_TCMP); | 199 | timer_base + MX1_2_TCMP); |
| @@ -245,7 +245,7 @@ static irqreturn_t mxc_timer_interrupt(int irq, void *dev_id) | |||
| 245 | uint32_t tstat; | 245 | uint32_t tstat; |
| 246 | 246 | ||
| 247 | if (timer_is_v2()) | 247 | if (timer_is_v2()) |
| 248 | tstat = __raw_readl(timer_base + MX3_TSTAT); | 248 | tstat = __raw_readl(timer_base + V2_TSTAT); |
| 249 | else | 249 | else |
| 250 | tstat = __raw_readl(timer_base + MX1_2_TSTAT); | 250 | tstat = __raw_readl(timer_base + MX1_2_TSTAT); |
| 251 | 251 | ||
| @@ -276,7 +276,7 @@ static int __init mxc_clockevent_init(struct clk *timer_clk) | |||
| 276 | unsigned int c = clk_get_rate(timer_clk); | 276 | unsigned int c = clk_get_rate(timer_clk); |
| 277 | 277 | ||
| 278 | if (timer_is_v2()) | 278 | if (timer_is_v2()) |
| 279 | clockevent_mxc.set_next_event = mx3_set_next_event; | 279 | clockevent_mxc.set_next_event = v2_set_next_event; |
| 280 | 280 | ||
| 281 | clockevent_mxc.mult = div_sc(c, NSEC_PER_SEC, | 281 | clockevent_mxc.mult = div_sc(c, NSEC_PER_SEC, |
| 282 | clockevent_mxc.shift); | 282 | clockevent_mxc.shift); |
| @@ -308,7 +308,7 @@ void __init mxc_timer_init(struct clk *timer_clk, void __iomem *base, int irq) | |||
| 308 | __raw_writel(0, timer_base + MXC_TPRER); /* see datasheet note */ | 308 | __raw_writel(0, timer_base + MXC_TPRER); /* see datasheet note */ |
| 309 | 309 | ||
| 310 | if (timer_is_v2()) | 310 | if (timer_is_v2()) |
| 311 | tctl_val = MX3_TCTL_CLK_IPG | MX3_TCTL_FRR | MX3_TCTL_WAITEN | MXC_TCTL_TEN; | 311 | tctl_val = V2_TCTL_CLK_IPG | V2_TCTL_FRR | V2_TCTL_WAITEN | MXC_TCTL_TEN; |
| 312 | else | 312 | else |
| 313 | tctl_val = MX1_2_TCTL_FRR | MX1_2_TCTL_CLK_PCLK1 | MXC_TCTL_TEN; | 313 | tctl_val = MX1_2_TCTL_FRR | MX1_2_TCTL_CLK_PCLK1 | MXC_TCTL_TEN; |
| 314 | 314 | ||
diff --git a/arch/arm/plat-mxc/tzic.c b/arch/arm/plat-mxc/tzic.c index afa6709db0b3..9b86d2a60d43 100644 --- a/arch/arm/plat-mxc/tzic.c +++ b/arch/arm/plat-mxc/tzic.c | |||
| @@ -1,5 +1,5 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. | 2 | * Copyright (C)2004-2010 Freescale Semiconductor, Inc. All Rights Reserved. |
| 3 | * | 3 | * |
| 4 | * The code contained herein is licensed under the GNU General Public | 4 | * The code contained herein is licensed under the GNU General Public |
| 5 | * License. You may obtain a copy of the GNU General Public License | 5 | * License. You may obtain a copy of the GNU General Public License |
| @@ -19,6 +19,7 @@ | |||
| 19 | #include <asm/mach/irq.h> | 19 | #include <asm/mach/irq.h> |
| 20 | 20 | ||
| 21 | #include <mach/hardware.h> | 21 | #include <mach/hardware.h> |
| 22 | #include <mach/common.h> | ||
| 22 | 23 | ||
| 23 | /* | 24 | /* |
| 24 | ***************************************** | 25 | ***************************************** |
| @@ -144,6 +145,7 @@ void __init tzic_init_irq(void __iomem *irqbase) | |||
| 144 | set_irq_handler(i, handle_level_irq); | 145 | set_irq_handler(i, handle_level_irq); |
| 145 | set_irq_flags(i, IRQF_VALID); | 146 | set_irq_flags(i, IRQF_VALID); |
| 146 | } | 147 | } |
| 148 | mxc_register_gpios(); | ||
| 147 | 149 | ||
| 148 | pr_info("TrustZone Interrupt Controller (TZIC) initialized\n"); | 150 | pr_info("TrustZone Interrupt Controller (TZIC) initialized\n"); |
| 149 | } | 151 | } |
diff --git a/arch/arm/plat-nomadik/include/plat/ste_dma40.h b/arch/arm/plat-nomadik/include/plat/ste_dma40.h new file mode 100644 index 000000000000..4d12ea4ca361 --- /dev/null +++ b/arch/arm/plat-nomadik/include/plat/ste_dma40.h | |||
| @@ -0,0 +1,239 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/plat-nomadik/include/plat/ste_dma40.h | ||
| 3 | * | ||
| 4 | * Copyright (C) ST-Ericsson 2007-2010 | ||
| 5 | * License terms: GNU General Public License (GPL) version 2 | ||
| 6 | * Author: Per Friden <per.friden@stericsson.com> | ||
| 7 | * Author: Jonas Aaberg <jonas.aberg@stericsson.com> | ||
| 8 | */ | ||
| 9 | |||
| 10 | |||
| 11 | #ifndef STE_DMA40_H | ||
| 12 | #define STE_DMA40_H | ||
| 13 | |||
| 14 | #include <linux/dmaengine.h> | ||
| 15 | #include <linux/workqueue.h> | ||
| 16 | #include <linux/interrupt.h> | ||
| 17 | #include <linux/dmaengine.h> | ||
| 18 | |||
| 19 | /* dev types for memcpy */ | ||
| 20 | #define STEDMA40_DEV_DST_MEMORY (-1) | ||
| 21 | #define STEDMA40_DEV_SRC_MEMORY (-1) | ||
| 22 | |||
| 23 | /* | ||
| 24 | * Description of bitfields of channel_type variable is available in | ||
| 25 | * the info structure. | ||
| 26 | */ | ||
| 27 | |||
| 28 | /* Priority */ | ||
| 29 | #define STEDMA40_INFO_PRIO_TYPE_POS 2 | ||
| 30 | #define STEDMA40_HIGH_PRIORITY_CHANNEL (0x1 << STEDMA40_INFO_PRIO_TYPE_POS) | ||
| 31 | #define STEDMA40_LOW_PRIORITY_CHANNEL (0x2 << STEDMA40_INFO_PRIO_TYPE_POS) | ||
| 32 | |||
| 33 | /* Mode */ | ||
| 34 | #define STEDMA40_INFO_CH_MODE_TYPE_POS 6 | ||
| 35 | #define STEDMA40_CHANNEL_IN_PHY_MODE (0x1 << STEDMA40_INFO_CH_MODE_TYPE_POS) | ||
| 36 | #define STEDMA40_CHANNEL_IN_LOG_MODE (0x2 << STEDMA40_INFO_CH_MODE_TYPE_POS) | ||
| 37 | #define STEDMA40_CHANNEL_IN_OPER_MODE (0x3 << STEDMA40_INFO_CH_MODE_TYPE_POS) | ||
| 38 | |||
| 39 | /* Mode options */ | ||
| 40 | #define STEDMA40_INFO_CH_MODE_OPT_POS 8 | ||
| 41 | #define STEDMA40_PCHAN_BASIC_MODE (0x1 << STEDMA40_INFO_CH_MODE_OPT_POS) | ||
| 42 | #define STEDMA40_PCHAN_MODULO_MODE (0x2 << STEDMA40_INFO_CH_MODE_OPT_POS) | ||
| 43 | #define STEDMA40_PCHAN_DOUBLE_DST_MODE (0x3 << STEDMA40_INFO_CH_MODE_OPT_POS) | ||
| 44 | #define STEDMA40_LCHAN_SRC_PHY_DST_LOG (0x1 << STEDMA40_INFO_CH_MODE_OPT_POS) | ||
| 45 | #define STEDMA40_LCHAN_SRC_LOG_DST_PHS (0x2 << STEDMA40_INFO_CH_MODE_OPT_POS) | ||
| 46 | #define STEDMA40_LCHAN_SRC_LOG_DST_LOG (0x3 << STEDMA40_INFO_CH_MODE_OPT_POS) | ||
| 47 | |||
| 48 | /* Interrupt */ | ||
| 49 | #define STEDMA40_INFO_TIM_POS 10 | ||
| 50 | #define STEDMA40_NO_TIM_FOR_LINK (0x0 << STEDMA40_INFO_TIM_POS) | ||
| 51 | #define STEDMA40_TIM_FOR_LINK (0x1 << STEDMA40_INFO_TIM_POS) | ||
| 52 | |||
| 53 | /* End of channel_type configuration */ | ||
| 54 | |||
| 55 | #define STEDMA40_ESIZE_8_BIT 0x0 | ||
| 56 | #define STEDMA40_ESIZE_16_BIT 0x1 | ||
| 57 | #define STEDMA40_ESIZE_32_BIT 0x2 | ||
| 58 | #define STEDMA40_ESIZE_64_BIT 0x3 | ||
| 59 | |||
| 60 | /* The value 4 indicates that PEN-reg shall be set to 0 */ | ||
| 61 | #define STEDMA40_PSIZE_PHY_1 0x4 | ||
| 62 | #define STEDMA40_PSIZE_PHY_2 0x0 | ||
| 63 | #define STEDMA40_PSIZE_PHY_4 0x1 | ||
| 64 | #define STEDMA40_PSIZE_PHY_8 0x2 | ||
| 65 | #define STEDMA40_PSIZE_PHY_16 0x3 | ||
| 66 | |||
| 67 | /* | ||
| 68 | * The number of elements differ in logical and | ||
| 69 | * physical mode | ||
| 70 | */ | ||
| 71 | #define STEDMA40_PSIZE_LOG_1 STEDMA40_PSIZE_PHY_2 | ||
| 72 | #define STEDMA40_PSIZE_LOG_4 STEDMA40_PSIZE_PHY_4 | ||
| 73 | #define STEDMA40_PSIZE_LOG_8 STEDMA40_PSIZE_PHY_8 | ||
| 74 | #define STEDMA40_PSIZE_LOG_16 STEDMA40_PSIZE_PHY_16 | ||
| 75 | |||
| 76 | enum stedma40_flow_ctrl { | ||
| 77 | STEDMA40_NO_FLOW_CTRL, | ||
| 78 | STEDMA40_FLOW_CTRL, | ||
| 79 | }; | ||
| 80 | |||
| 81 | enum stedma40_endianess { | ||
| 82 | STEDMA40_LITTLE_ENDIAN, | ||
| 83 | STEDMA40_BIG_ENDIAN | ||
| 84 | }; | ||
| 85 | |||
| 86 | enum stedma40_periph_data_width { | ||
| 87 | STEDMA40_BYTE_WIDTH = STEDMA40_ESIZE_8_BIT, | ||
| 88 | STEDMA40_HALFWORD_WIDTH = STEDMA40_ESIZE_16_BIT, | ||
| 89 | STEDMA40_WORD_WIDTH = STEDMA40_ESIZE_32_BIT, | ||
| 90 | STEDMA40_DOUBLEWORD_WIDTH = STEDMA40_ESIZE_64_BIT | ||
| 91 | }; | ||
| 92 | |||
| 93 | struct stedma40_half_channel_info { | ||
| 94 | enum stedma40_endianess endianess; | ||
| 95 | enum stedma40_periph_data_width data_width; | ||
| 96 | int psize; | ||
| 97 | enum stedma40_flow_ctrl flow_ctrl; | ||
| 98 | }; | ||
| 99 | |||
| 100 | enum stedma40_xfer_dir { | ||
| 101 | STEDMA40_MEM_TO_MEM, | ||
| 102 | STEDMA40_MEM_TO_PERIPH, | ||
| 103 | STEDMA40_PERIPH_TO_MEM, | ||
| 104 | STEDMA40_PERIPH_TO_PERIPH | ||
| 105 | }; | ||
| 106 | |||
| 107 | |||
| 108 | /** | ||
| 109 | * struct stedma40_chan_cfg - Structure to be filled by client drivers. | ||
| 110 | * | ||
| 111 | * @dir: MEM 2 MEM, PERIPH 2 MEM , MEM 2 PERIPH, PERIPH 2 PERIPH | ||
| 112 | * @channel_type: priority, mode, mode options and interrupt configuration. | ||
| 113 | * @src_dev_type: Src device type | ||
| 114 | * @dst_dev_type: Dst device type | ||
| 115 | * @src_info: Parameters for dst half channel | ||
| 116 | * @dst_info: Parameters for dst half channel | ||
| 117 | * @pre_transfer_data: Data to be passed on to the pre_transfer() function. | ||
| 118 | * @pre_transfer: Callback used if needed before preparation of transfer. | ||
| 119 | * Only called if device is set. size of bytes to transfer | ||
| 120 | * (in case of multiple element transfer size is size of the first element). | ||
| 121 | * | ||
| 122 | * | ||
| 123 | * This structure has to be filled by the client drivers. | ||
| 124 | * It is recommended to do all dma configurations for clients in the machine. | ||
| 125 | * | ||
| 126 | */ | ||
| 127 | struct stedma40_chan_cfg { | ||
| 128 | enum stedma40_xfer_dir dir; | ||
| 129 | unsigned int channel_type; | ||
| 130 | int src_dev_type; | ||
| 131 | int dst_dev_type; | ||
| 132 | struct stedma40_half_channel_info src_info; | ||
| 133 | struct stedma40_half_channel_info dst_info; | ||
| 134 | void *pre_transfer_data; | ||
| 135 | int (*pre_transfer) (struct dma_chan *chan, | ||
| 136 | void *data, | ||
| 137 | int size); | ||
| 138 | }; | ||
| 139 | |||
| 140 | /** | ||
| 141 | * struct stedma40_platform_data - Configuration struct for the dma device. | ||
| 142 | * | ||
| 143 | * @dev_len: length of dev_tx and dev_rx | ||
| 144 | * @dev_tx: mapping between destination event line and io address | ||
| 145 | * @dev_rx: mapping between source event line and io address | ||
| 146 | * @memcpy: list of memcpy event lines | ||
| 147 | * @memcpy_len: length of memcpy | ||
| 148 | * @memcpy_conf_phy: default configuration of physical channel memcpy | ||
| 149 | * @memcpy_conf_log: default configuration of logical channel memcpy | ||
| 150 | * @llis_per_log: number of max linked list items per logical channel | ||
| 151 | * | ||
| 152 | */ | ||
| 153 | struct stedma40_platform_data { | ||
| 154 | u32 dev_len; | ||
| 155 | const dma_addr_t *dev_tx; | ||
| 156 | const dma_addr_t *dev_rx; | ||
| 157 | int *memcpy; | ||
| 158 | u32 memcpy_len; | ||
| 159 | struct stedma40_chan_cfg *memcpy_conf_phy; | ||
| 160 | struct stedma40_chan_cfg *memcpy_conf_log; | ||
| 161 | unsigned int llis_per_log; | ||
| 162 | }; | ||
| 163 | |||
| 164 | /** | ||
| 165 | * setdma40_set_psize() - Used for changing the package size of an | ||
| 166 | * already configured dma channel. | ||
| 167 | * | ||
| 168 | * @chan: dmaengine handle | ||
| 169 | * @src_psize: new package side for src. (STEDMA40_PSIZE*) | ||
| 170 | * @src_psize: new package side for dst. (STEDMA40_PSIZE*) | ||
| 171 | * | ||
| 172 | * returns 0 on ok, otherwise negative error number. | ||
| 173 | */ | ||
| 174 | int stedma40_set_psize(struct dma_chan *chan, | ||
| 175 | int src_psize, | ||
| 176 | int dst_psize); | ||
| 177 | |||
| 178 | /** | ||
| 179 | * stedma40_filter() - Provides stedma40_chan_cfg to the | ||
| 180 | * ste_dma40 dma driver via the dmaengine framework. | ||
| 181 | * does some checking of what's provided. | ||
| 182 | * | ||
| 183 | * Never directly called by client. It used by dmaengine. | ||
| 184 | * @chan: dmaengine handle. | ||
| 185 | * @data: Must be of type: struct stedma40_chan_cfg and is | ||
| 186 | * the configuration of the framework. | ||
| 187 | * | ||
| 188 | * | ||
| 189 | */ | ||
| 190 | |||
| 191 | bool stedma40_filter(struct dma_chan *chan, void *data); | ||
| 192 | |||
| 193 | /** | ||
| 194 | * stedma40_memcpy_sg() - extension of the dma framework, memcpy to/from | ||
| 195 | * scattergatter lists. | ||
| 196 | * | ||
| 197 | * @chan: dmaengine handle | ||
| 198 | * @sgl_dst: Destination scatter list | ||
| 199 | * @sgl_src: Source scatter list | ||
| 200 | * @sgl_len: The length of each scatterlist. Both lists must be of equal length | ||
| 201 | * and each element must match the corresponding element in the other scatter | ||
| 202 | * list. | ||
| 203 | * @flags: is actually enum dma_ctrl_flags. See dmaengine.h | ||
| 204 | */ | ||
| 205 | |||
| 206 | struct dma_async_tx_descriptor *stedma40_memcpy_sg(struct dma_chan *chan, | ||
| 207 | struct scatterlist *sgl_dst, | ||
| 208 | struct scatterlist *sgl_src, | ||
| 209 | unsigned int sgl_len, | ||
| 210 | unsigned long flags); | ||
| 211 | |||
| 212 | /** | ||
| 213 | * stedma40_slave_mem() - Transfers a raw data buffer to or from a slave | ||
| 214 | * (=device) | ||
| 215 | * | ||
| 216 | * @chan: dmaengine handle | ||
| 217 | * @addr: source or destination physicall address. | ||
| 218 | * @size: bytes to transfer | ||
| 219 | * @direction: direction of transfer | ||
| 220 | * @flags: is actually enum dma_ctrl_flags. See dmaengine.h | ||
| 221 | */ | ||
| 222 | |||
| 223 | static inline struct | ||
| 224 | dma_async_tx_descriptor *stedma40_slave_mem(struct dma_chan *chan, | ||
| 225 | dma_addr_t addr, | ||
| 226 | unsigned int size, | ||
| 227 | enum dma_data_direction direction, | ||
| 228 | unsigned long flags) | ||
| 229 | { | ||
| 230 | struct scatterlist sg; | ||
| 231 | sg_init_table(&sg, 1); | ||
| 232 | sg.dma_address = addr; | ||
| 233 | sg.length = size; | ||
| 234 | |||
| 235 | return chan->device->device_prep_slave_sg(chan, &sg, 1, | ||
| 236 | direction, flags); | ||
| 237 | } | ||
| 238 | |||
| 239 | #endif | ||
diff --git a/arch/arm/plat-nomadik/timer.c b/arch/arm/plat-nomadik/timer.c index 0ff3798769ab..08aaa4a7f65f 100644 --- a/arch/arm/plat-nomadik/timer.c +++ b/arch/arm/plat-nomadik/timer.c | |||
| @@ -13,7 +13,9 @@ | |||
| 13 | #include <linux/irq.h> | 13 | #include <linux/irq.h> |
| 14 | #include <linux/io.h> | 14 | #include <linux/io.h> |
| 15 | #include <linux/clockchips.h> | 15 | #include <linux/clockchips.h> |
| 16 | #include <linux/clk.h> | ||
| 16 | #include <linux/jiffies.h> | 17 | #include <linux/jiffies.h> |
| 18 | #include <linux/err.h> | ||
| 17 | #include <asm/mach/time.h> | 19 | #include <asm/mach/time.h> |
| 18 | 20 | ||
| 19 | #include <plat/mtu.h> | 21 | #include <plat/mtu.h> |
| @@ -124,13 +126,25 @@ static struct irqaction nmdk_timer_irq = { | |||
| 124 | void __init nmdk_timer_init(void) | 126 | void __init nmdk_timer_init(void) |
| 125 | { | 127 | { |
| 126 | unsigned long rate; | 128 | unsigned long rate; |
| 127 | u32 cr = MTU_CRn_32BITS;; | 129 | struct clk *clk0; |
| 130 | struct clk *clk1; | ||
| 131 | u32 cr; | ||
| 132 | |||
| 133 | clk0 = clk_get_sys("mtu0", NULL); | ||
| 134 | BUG_ON(IS_ERR(clk0)); | ||
| 135 | |||
| 136 | clk1 = clk_get_sys("mtu1", NULL); | ||
| 137 | BUG_ON(IS_ERR(clk1)); | ||
| 138 | |||
| 139 | clk_enable(clk0); | ||
| 140 | clk_enable(clk1); | ||
| 128 | 141 | ||
| 129 | /* | 142 | /* |
| 130 | * Tick rate is 2.4MHz for Nomadik and 110MHz for ux500: | 143 | * Tick rate is 2.4MHz for Nomadik and 110MHz for ux500: |
| 131 | * use a divide-by-16 counter if it's more than 16MHz | 144 | * use a divide-by-16 counter if it's more than 16MHz |
| 132 | */ | 145 | */ |
| 133 | rate = CLOCK_TICK_RATE; | 146 | cr = MTU_CRn_32BITS;; |
| 147 | rate = clk_get_rate(clk0); | ||
| 134 | if (rate > 16 << 20) { | 148 | if (rate > 16 << 20) { |
| 135 | rate /= 16; | 149 | rate /= 16; |
| 136 | cr |= MTU_CRn_PRESCALE_16; | 150 | cr |= MTU_CRn_PRESCALE_16; |
| @@ -153,6 +167,14 @@ void __init nmdk_timer_init(void) | |||
| 153 | nmdk_clksrc.name); | 167 | nmdk_clksrc.name); |
| 154 | 168 | ||
| 155 | /* Timer 1 is used for events, fix according to rate */ | 169 | /* Timer 1 is used for events, fix according to rate */ |
| 170 | cr = MTU_CRn_32BITS; | ||
| 171 | rate = clk_get_rate(clk1); | ||
| 172 | if (rate > 16 << 20) { | ||
| 173 | rate /= 16; | ||
| 174 | cr |= MTU_CRn_PRESCALE_16; | ||
| 175 | } else { | ||
| 176 | cr |= MTU_CRn_PRESCALE_1; | ||
| 177 | } | ||
| 156 | writel(cr | MTU_CRn_ONESHOT, mtu_base + MTU_CR(1)); /* off, currently */ | 178 | writel(cr | MTU_CRn_ONESHOT, mtu_base + MTU_CR(1)); /* off, currently */ |
| 157 | nmdk_clkevt.mult = div_sc(rate, NSEC_PER_SEC, nmdk_clkevt.shift); | 179 | nmdk_clkevt.mult = div_sc(rate, NSEC_PER_SEC, nmdk_clkevt.shift); |
| 158 | nmdk_clkevt.max_delta_ns = | 180 | nmdk_clkevt.max_delta_ns = |
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index dc2ac42d6319..393e9219a5b6 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c | |||
| @@ -624,79 +624,58 @@ do { \ | |||
| 624 | __raw_writel(l, base + reg); \ | 624 | __raw_writel(l, base + reg); \ |
| 625 | } while(0) | 625 | } while(0) |
| 626 | 626 | ||
| 627 | void omap_set_gpio_debounce(int gpio, int enable) | 627 | /** |
| 628 | * _set_gpio_debounce - low level gpio debounce time | ||
| 629 | * @bank: the gpio bank we're acting upon | ||
| 630 | * @gpio: the gpio number on this @gpio | ||
| 631 | * @debounce: debounce time to use | ||
| 632 | * | ||
| 633 | * OMAP's debounce time is in 31us steps so we need | ||
| 634 | * to convert and round up to the closest unit. | ||
| 635 | */ | ||
| 636 | static void _set_gpio_debounce(struct gpio_bank *bank, unsigned gpio, | ||
| 637 | unsigned debounce) | ||
| 628 | { | 638 | { |
| 629 | struct gpio_bank *bank; | 639 | void __iomem *reg = bank->base; |
| 630 | void __iomem *reg; | 640 | u32 val; |
| 631 | unsigned long flags; | 641 | u32 l; |
| 632 | u32 val, l = 1 << get_gpio_index(gpio); | 642 | |
| 643 | if (debounce < 32) | ||
| 644 | debounce = 0x01; | ||
| 645 | else if (debounce > 7936) | ||
| 646 | debounce = 0xff; | ||
| 647 | else | ||
| 648 | debounce = (debounce / 0x1f) - 1; | ||
| 633 | 649 | ||
| 634 | if (cpu_class_is_omap1()) | 650 | l = 1 << get_gpio_index(gpio); |
| 635 | return; | ||
| 636 | 651 | ||
| 637 | bank = get_gpio_bank(gpio); | 652 | if (cpu_is_omap44xx()) |
| 638 | reg = bank->base; | 653 | reg += OMAP4_GPIO_DEBOUNCINGTIME; |
| 654 | else | ||
| 655 | reg += OMAP24XX_GPIO_DEBOUNCE_VAL; | ||
| 656 | |||
| 657 | __raw_writel(debounce, reg); | ||
| 639 | 658 | ||
| 659 | reg = bank->base; | ||
| 640 | if (cpu_is_omap44xx()) | 660 | if (cpu_is_omap44xx()) |
| 641 | reg += OMAP4_GPIO_DEBOUNCENABLE; | 661 | reg += OMAP4_GPIO_DEBOUNCENABLE; |
| 642 | else | 662 | else |
| 643 | reg += OMAP24XX_GPIO_DEBOUNCE_EN; | 663 | reg += OMAP24XX_GPIO_DEBOUNCE_EN; |
| 644 | 664 | ||
| 645 | if (!(bank->mod_usage & l)) { | ||
| 646 | printk(KERN_ERR "GPIO %d not requested\n", gpio); | ||
| 647 | return; | ||
| 648 | } | ||
| 649 | |||
| 650 | spin_lock_irqsave(&bank->lock, flags); | ||
| 651 | val = __raw_readl(reg); | 665 | val = __raw_readl(reg); |
| 652 | 666 | ||
| 653 | if (enable && !(val & l)) | 667 | if (debounce) { |
| 654 | val |= l; | 668 | val |= l; |
| 655 | else if (!enable && (val & l)) | 669 | if (cpu_is_omap34xx() || cpu_is_omap44xx()) |
| 656 | val &= ~l; | ||
| 657 | else | ||
| 658 | goto done; | ||
| 659 | |||
| 660 | if (cpu_is_omap34xx() || cpu_is_omap44xx()) { | ||
| 661 | bank->dbck_enable_mask = val; | ||
| 662 | if (enable) | ||
| 663 | clk_enable(bank->dbck); | 670 | clk_enable(bank->dbck); |
| 664 | else | 671 | } else { |
| 672 | val &= ~l; | ||
| 673 | if (cpu_is_omap34xx() || cpu_is_omap44xx()) | ||
| 665 | clk_disable(bank->dbck); | 674 | clk_disable(bank->dbck); |
| 666 | } | 675 | } |
| 667 | 676 | ||
| 668 | __raw_writel(val, reg); | 677 | __raw_writel(val, reg); |
| 669 | done: | ||
| 670 | spin_unlock_irqrestore(&bank->lock, flags); | ||
| 671 | } | 678 | } |
| 672 | EXPORT_SYMBOL(omap_set_gpio_debounce); | ||
| 673 | |||
| 674 | void omap_set_gpio_debounce_time(int gpio, int enc_time) | ||
| 675 | { | ||
| 676 | struct gpio_bank *bank; | ||
| 677 | void __iomem *reg; | ||
| 678 | |||
| 679 | if (cpu_class_is_omap1()) | ||
| 680 | return; | ||
| 681 | |||
| 682 | bank = get_gpio_bank(gpio); | ||
| 683 | reg = bank->base; | ||
| 684 | |||
| 685 | if (!bank->mod_usage) { | ||
| 686 | printk(KERN_ERR "GPIO not requested\n"); | ||
| 687 | return; | ||
| 688 | } | ||
| 689 | |||
| 690 | enc_time &= 0xff; | ||
| 691 | |||
| 692 | if (cpu_is_omap44xx()) | ||
| 693 | reg += OMAP4_GPIO_DEBOUNCINGTIME; | ||
| 694 | else | ||
| 695 | reg += OMAP24XX_GPIO_DEBOUNCE_VAL; | ||
| 696 | |||
| 697 | __raw_writel(enc_time, reg); | ||
| 698 | } | ||
| 699 | EXPORT_SYMBOL(omap_set_gpio_debounce_time); | ||
| 700 | 679 | ||
| 701 | #ifdef CONFIG_ARCH_OMAP2PLUS | 680 | #ifdef CONFIG_ARCH_OMAP2PLUS |
| 702 | static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio, | 681 | static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio, |
| @@ -1656,6 +1635,20 @@ static int gpio_output(struct gpio_chip *chip, unsigned offset, int value) | |||
| 1656 | return 0; | 1635 | return 0; |
| 1657 | } | 1636 | } |
| 1658 | 1637 | ||
| 1638 | static int gpio_debounce(struct gpio_chip *chip, unsigned offset, | ||
| 1639 | unsigned debounce) | ||
| 1640 | { | ||
| 1641 | struct gpio_bank *bank; | ||
| 1642 | unsigned long flags; | ||
| 1643 | |||
| 1644 | bank = container_of(chip, struct gpio_bank, chip); | ||
| 1645 | spin_lock_irqsave(&bank->lock, flags); | ||
| 1646 | _set_gpio_debounce(bank, offset, debounce); | ||
| 1647 | spin_unlock_irqrestore(&bank->lock, flags); | ||
| 1648 | |||
| 1649 | return 0; | ||
| 1650 | } | ||
| 1651 | |||
| 1659 | static void gpio_set(struct gpio_chip *chip, unsigned offset, int value) | 1652 | static void gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
| 1660 | { | 1653 | { |
| 1661 | struct gpio_bank *bank; | 1654 | struct gpio_bank *bank; |
| @@ -1909,6 +1902,7 @@ static int __init _omap_gpio_init(void) | |||
| 1909 | bank->chip.direction_input = gpio_input; | 1902 | bank->chip.direction_input = gpio_input; |
| 1910 | bank->chip.get = gpio_get; | 1903 | bank->chip.get = gpio_get; |
| 1911 | bank->chip.direction_output = gpio_output; | 1904 | bank->chip.direction_output = gpio_output; |
| 1905 | bank->chip.set_debounce = gpio_debounce; | ||
| 1912 | bank->chip.set = gpio_set; | 1906 | bank->chip.set = gpio_set; |
| 1913 | bank->chip.to_irq = gpio_2irq; | 1907 | bank->chip.to_irq = gpio_2irq; |
| 1914 | if (bank_is_mpuio(bank)) { | 1908 | if (bank_is_mpuio(bank)) { |
diff --git a/arch/arm/plat-omap/include/plat/omap34xx.h b/arch/arm/plat-omap/include/plat/omap34xx.h index 2845fdc658b0..98fc8b4a4cc4 100644 --- a/arch/arm/plat-omap/include/plat/omap34xx.h +++ b/arch/arm/plat-omap/include/plat/omap34xx.h | |||
| @@ -82,5 +82,10 @@ | |||
| 82 | 82 | ||
| 83 | #define OMAP34XX_MAILBOX_BASE (L4_34XX_BASE + 0x94000) | 83 | #define OMAP34XX_MAILBOX_BASE (L4_34XX_BASE + 0x94000) |
| 84 | 84 | ||
| 85 | /* Security */ | ||
| 86 | #define OMAP34XX_SEC_BASE (L4_34XX_BASE + 0xA0000) | ||
| 87 | #define OMAP34XX_SEC_SHA1MD5_BASE (OMAP34XX_SEC_BASE + 0x23000) | ||
| 88 | #define OMAP34XX_SEC_AES_BASE (OMAP34XX_SEC_BASE + 0x25000) | ||
| 89 | |||
| 85 | #endif /* __ASM_ARCH_OMAP3_H */ | 90 | #endif /* __ASM_ARCH_OMAP3_H */ |
| 86 | 91 | ||
diff --git a/arch/arm/plat-s3c24xx/devs.c b/arch/arm/plat-s3c24xx/devs.c index 58583732b29a..452e18438b41 100644 --- a/arch/arm/plat-s3c24xx/devs.c +++ b/arch/arm/plat-s3c24xx/devs.c | |||
| @@ -234,32 +234,6 @@ void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd) | |||
| 234 | } | 234 | } |
| 235 | } | 235 | } |
| 236 | 236 | ||
| 237 | |||
| 238 | /* Watchdog */ | ||
| 239 | |||
| 240 | static struct resource s3c_wdt_resource[] = { | ||
| 241 | [0] = { | ||
| 242 | .start = S3C24XX_PA_WATCHDOG, | ||
| 243 | .end = S3C24XX_PA_WATCHDOG + S3C24XX_SZ_WATCHDOG - 1, | ||
| 244 | .flags = IORESOURCE_MEM, | ||
| 245 | }, | ||
| 246 | [1] = { | ||
| 247 | .start = IRQ_WDT, | ||
| 248 | .end = IRQ_WDT, | ||
| 249 | .flags = IORESOURCE_IRQ, | ||
| 250 | } | ||
| 251 | |||
| 252 | }; | ||
| 253 | |||
| 254 | struct platform_device s3c_device_wdt = { | ||
| 255 | .name = "s3c2410-wdt", | ||
| 256 | .id = -1, | ||
| 257 | .num_resources = ARRAY_SIZE(s3c_wdt_resource), | ||
| 258 | .resource = s3c_wdt_resource, | ||
| 259 | }; | ||
| 260 | |||
| 261 | EXPORT_SYMBOL(s3c_device_wdt); | ||
| 262 | |||
| 263 | /* IIS */ | 237 | /* IIS */ |
| 264 | 238 | ||
| 265 | static struct resource s3c_iis_resource[] = { | 239 | static struct resource s3c_iis_resource[] = { |
diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig index 92bd75607b43..11d6a1bbd90d 100644 --- a/arch/arm/plat-s5p/Kconfig +++ b/arch/arm/plat-s5p/Kconfig | |||
| @@ -7,7 +7,7 @@ | |||
| 7 | 7 | ||
| 8 | config PLAT_S5P | 8 | config PLAT_S5P |
| 9 | bool | 9 | bool |
| 10 | depends on (ARCH_S5P6440 || ARCH_S5P6442 || ARCH_S5PV210) | 10 | depends on (ARCH_S5P6440 || ARCH_S5P6442 || ARCH_S5PC100 || ARCH_S5PV210) |
| 11 | default y | 11 | default y |
| 12 | select ARM_VIC | 12 | select ARM_VIC |
| 13 | select NO_IOPORT | 13 | select NO_IOPORT |
| @@ -24,3 +24,9 @@ config PLAT_S5P | |||
| 24 | select SAMSUNG_IRQ_UART | 24 | select SAMSUNG_IRQ_UART |
| 25 | help | 25 | help |
| 26 | Base platform code for Samsung's S5P series SoC. | 26 | Base platform code for Samsung's S5P series SoC. |
| 27 | |||
| 28 | config S5P_EXT_INT | ||
| 29 | bool | ||
| 30 | help | ||
| 31 | Use the external interrupts (other than GPIO interrupts.) | ||
| 32 | Note: Do not choose this for S5P6440. | ||
diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile index 0ec09a9c36bd..39c242bb9d58 100644 --- a/arch/arm/plat-s5p/Makefile +++ b/arch/arm/plat-s5p/Makefile | |||
| @@ -16,3 +16,5 @@ obj-y += dev-uart.o | |||
| 16 | obj-y += cpu.o | 16 | obj-y += cpu.o |
| 17 | obj-y += clock.o | 17 | obj-y += clock.o |
| 18 | obj-y += irq.o | 18 | obj-y += irq.o |
| 19 | obj-$(CONFIG_S5P_EXT_INT) += irq-eint.o | ||
| 20 | |||
diff --git a/arch/arm/plat-s5p/clock.c b/arch/arm/plat-s5p/clock.c index 24a931fd8d3b..b5e255265f20 100644 --- a/arch/arm/plat-s5p/clock.c +++ b/arch/arm/plat-s5p/clock.c | |||
| @@ -148,6 +148,7 @@ static struct clk *s5p_clks[] __initdata = { | |||
| 148 | &clk_fout_vpll, | 148 | &clk_fout_vpll, |
| 149 | &clk_arm, | 149 | &clk_arm, |
| 150 | &clk_vpll, | 150 | &clk_vpll, |
| 151 | &clk_xusbxti, | ||
| 151 | }; | 152 | }; |
| 152 | 153 | ||
| 153 | void __init s5p_register_clocks(unsigned long xtal_freq) | 154 | void __init s5p_register_clocks(unsigned long xtal_freq) |
diff --git a/arch/arm/plat-s5p/cpu.c b/arch/arm/plat-s5p/cpu.c index f92e5de3a755..75cb8c37ca2c 100644 --- a/arch/arm/plat-s5p/cpu.c +++ b/arch/arm/plat-s5p/cpu.c | |||
| @@ -19,12 +19,14 @@ | |||
| 19 | #include <plat/cpu.h> | 19 | #include <plat/cpu.h> |
| 20 | #include <plat/s5p6440.h> | 20 | #include <plat/s5p6440.h> |
| 21 | #include <plat/s5p6442.h> | 21 | #include <plat/s5p6442.h> |
| 22 | #include <plat/s5pc100.h> | ||
| 22 | #include <plat/s5pv210.h> | 23 | #include <plat/s5pv210.h> |
| 23 | 24 | ||
| 24 | /* table of supported CPUs */ | 25 | /* table of supported CPUs */ |
| 25 | 26 | ||
| 26 | static const char name_s5p6440[] = "S5P6440"; | 27 | static const char name_s5p6440[] = "S5P6440"; |
| 27 | static const char name_s5p6442[] = "S5P6442"; | 28 | static const char name_s5p6442[] = "S5P6442"; |
| 29 | static const char name_s5pc100[] = "S5PC100"; | ||
| 28 | static const char name_s5pv210[] = "S5PV210/S5PC110"; | 30 | static const char name_s5pv210[] = "S5PV210/S5PC110"; |
| 29 | 31 | ||
| 30 | static struct cpu_table cpu_ids[] __initdata = { | 32 | static struct cpu_table cpu_ids[] __initdata = { |
| @@ -45,6 +47,14 @@ static struct cpu_table cpu_ids[] __initdata = { | |||
| 45 | .init = s5p6442_init, | 47 | .init = s5p6442_init, |
| 46 | .name = name_s5p6442, | 48 | .name = name_s5p6442, |
| 47 | }, { | 49 | }, { |
| 50 | .idcode = 0x43100000, | ||
| 51 | .idmask = 0xfffff000, | ||
| 52 | .map_io = s5pc100_map_io, | ||
| 53 | .init_clocks = s5pc100_init_clocks, | ||
| 54 | .init_uarts = s5pc100_init_uarts, | ||
| 55 | .init = s5pc100_init, | ||
| 56 | .name = name_s5pc100, | ||
| 57 | }, { | ||
| 48 | .idcode = 0x43110000, | 58 | .idcode = 0x43110000, |
| 49 | .idmask = 0xfffff000, | 59 | .idmask = 0xfffff000, |
| 50 | .map_io = s5pv210_map_io, | 60 | .map_io = s5pv210_map_io, |
diff --git a/arch/arm/plat-s5p/include/plat/irqs.h b/arch/arm/plat-s5p/include/plat/irqs.h index 9ff3d718be39..3fb3a3a17465 100644 --- a/arch/arm/plat-s5p/include/plat/irqs.h +++ b/arch/arm/plat-s5p/include/plat/irqs.h | |||
| @@ -87,4 +87,11 @@ | |||
| 87 | #define IRQ_TIMER3 S5P_TIMER_IRQ(3) | 87 | #define IRQ_TIMER3 S5P_TIMER_IRQ(3) |
| 88 | #define IRQ_TIMER4 S5P_TIMER_IRQ(4) | 88 | #define IRQ_TIMER4 S5P_TIMER_IRQ(4) |
| 89 | 89 | ||
| 90 | #define IRQ_EINT(x) ((x) < 16 ? ((x) + S5P_EINT_BASE1) \ | ||
| 91 | : ((x) - 16 + S5P_EINT_BASE2)) | ||
| 92 | |||
| 93 | #define EINT_OFFSET(irq) ((irq) < S5P_EINT_BASE2 ? \ | ||
| 94 | ((irq) - S5P_EINT_BASE1) : \ | ||
| 95 | ((irq) + 16 - S5P_EINT_BASE2)) | ||
| 96 | |||
| 90 | #endif /* __ASM_PLAT_S5P_IRQS_H */ | 97 | #endif /* __ASM_PLAT_S5P_IRQS_H */ |
diff --git a/arch/arm/plat-s5p/include/plat/s5pc100.h b/arch/arm/plat-s5p/include/plat/s5pc100.h new file mode 100644 index 000000000000..5f6099dd7cad --- /dev/null +++ b/arch/arm/plat-s5p/include/plat/s5pc100.h | |||
| @@ -0,0 +1,33 @@ | |||
| 1 | /* arch/arm/plat-s5p/include/plat/s5pc100.h | ||
| 2 | * | ||
| 3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
| 4 | * http://www.samsung.com/ | ||
| 5 | * | ||
| 6 | * Header file for s5pc100 cpu support | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License version 2 as | ||
| 10 | * published by the Free Software Foundation. | ||
| 11 | */ | ||
| 12 | |||
| 13 | /* Common init code for S5PC100 related SoCs */ | ||
| 14 | |||
| 15 | extern void s5pc100_common_init_uarts(struct s3c2410_uartcfg *cfg, int no); | ||
| 16 | extern void s5pc100_register_clocks(void); | ||
| 17 | extern void s5pc100_setup_clocks(void); | ||
| 18 | |||
| 19 | #ifdef CONFIG_CPU_S5PC100 | ||
| 20 | |||
| 21 | extern int s5pc100_init(void); | ||
| 22 | extern void s5pc100_init_irq(void); | ||
| 23 | extern void s5pc100_map_io(void); | ||
| 24 | extern void s5pc100_init_clocks(int xtal); | ||
| 25 | |||
| 26 | #define s5pc100_init_uarts s5pc100_common_init_uarts | ||
| 27 | |||
| 28 | #else | ||
| 29 | #define s5pc100_init_clocks NULL | ||
| 30 | #define s5pc100_init_uarts NULL | ||
| 31 | #define s5pc100_map_io NULL | ||
| 32 | #define s5pc100_init NULL | ||
| 33 | #endif | ||
diff --git a/arch/arm/plat-s5p/irq-eint.c b/arch/arm/plat-s5p/irq-eint.c new file mode 100644 index 000000000000..e56c8075df97 --- /dev/null +++ b/arch/arm/plat-s5p/irq-eint.c | |||
| @@ -0,0 +1,218 @@ | |||
| 1 | /* linux/arch/arm/plat-s5p/irq-eint.c | ||
| 2 | * | ||
| 3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
| 4 | * http://www.samsung.com | ||
| 5 | * | ||
| 6 | * S5P - IRQ EINT support | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License version 2 as | ||
| 10 | * published by the Free Software Foundation. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #include <linux/kernel.h> | ||
| 14 | #include <linux/interrupt.h> | ||
| 15 | #include <linux/irq.h> | ||
| 16 | #include <linux/io.h> | ||
| 17 | #include <linux/sysdev.h> | ||
| 18 | #include <linux/gpio.h> | ||
| 19 | |||
| 20 | #include <asm/hardware/vic.h> | ||
| 21 | |||
| 22 | #include <plat/regs-irqtype.h> | ||
| 23 | |||
| 24 | #include <mach/map.h> | ||
| 25 | #include <plat/cpu.h> | ||
| 26 | #include <plat/pm.h> | ||
| 27 | |||
| 28 | #include <plat/gpio-cfg.h> | ||
| 29 | #include <mach/regs-gpio.h> | ||
| 30 | |||
| 31 | static inline void s5p_irq_eint_mask(unsigned int irq) | ||
| 32 | { | ||
| 33 | u32 mask; | ||
| 34 | |||
| 35 | mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(irq))); | ||
| 36 | mask |= eint_irq_to_bit(irq); | ||
| 37 | __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(irq))); | ||
| 38 | } | ||
| 39 | |||
| 40 | static void s5p_irq_eint_unmask(unsigned int irq) | ||
| 41 | { | ||
| 42 | u32 mask; | ||
| 43 | |||
| 44 | mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(irq))); | ||
| 45 | mask &= ~(eint_irq_to_bit(irq)); | ||
| 46 | __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(irq))); | ||
| 47 | } | ||
| 48 | |||
| 49 | static inline void s5p_irq_eint_ack(unsigned int irq) | ||
| 50 | { | ||
| 51 | __raw_writel(eint_irq_to_bit(irq), S5P_EINT_PEND(EINT_REG_NR(irq))); | ||
| 52 | } | ||
| 53 | |||
| 54 | static void s5p_irq_eint_maskack(unsigned int irq) | ||
| 55 | { | ||
| 56 | /* compiler should in-line these */ | ||
| 57 | s5p_irq_eint_mask(irq); | ||
| 58 | s5p_irq_eint_ack(irq); | ||
| 59 | } | ||
| 60 | |||
| 61 | static int s5p_irq_eint_set_type(unsigned int irq, unsigned int type) | ||
| 62 | { | ||
| 63 | int offs = EINT_OFFSET(irq); | ||
| 64 | int shift; | ||
| 65 | u32 ctrl, mask; | ||
| 66 | u32 newvalue = 0; | ||
| 67 | |||
| 68 | switch (type) { | ||
| 69 | case IRQ_TYPE_EDGE_RISING: | ||
| 70 | newvalue = S5P_EXTINT_RISEEDGE; | ||
| 71 | break; | ||
| 72 | |||
| 73 | case IRQ_TYPE_EDGE_FALLING: | ||
| 74 | newvalue = S5P_EXTINT_RISEEDGE; | ||
| 75 | break; | ||
| 76 | |||
| 77 | case IRQ_TYPE_EDGE_BOTH: | ||
| 78 | newvalue = S5P_EXTINT_BOTHEDGE; | ||
| 79 | break; | ||
| 80 | |||
| 81 | case IRQ_TYPE_LEVEL_LOW: | ||
| 82 | newvalue = S5P_EXTINT_LOWLEV; | ||
| 83 | break; | ||
| 84 | |||
| 85 | case IRQ_TYPE_LEVEL_HIGH: | ||
| 86 | newvalue = S5P_EXTINT_HILEV; | ||
| 87 | break; | ||
| 88 | |||
| 89 | default: | ||
| 90 | printk(KERN_ERR "No such irq type %d", type); | ||
| 91 | return -EINVAL; | ||
| 92 | } | ||
| 93 | |||
| 94 | shift = (offs & 0x7) * 4; | ||
| 95 | mask = 0x7 << shift; | ||
| 96 | |||
| 97 | ctrl = __raw_readl(S5P_EINT_CON(EINT_REG_NR(irq))); | ||
| 98 | ctrl &= ~mask; | ||
| 99 | ctrl |= newvalue << shift; | ||
| 100 | __raw_writel(ctrl, S5P_EINT_CON(EINT_REG_NR(irq))); | ||
| 101 | |||
| 102 | if ((0 <= offs) && (offs < 8)) | ||
| 103 | s3c_gpio_cfgpin(EINT_GPIO_0(offs & 0x7), EINT_MODE); | ||
| 104 | |||
| 105 | else if ((8 <= offs) && (offs < 16)) | ||
| 106 | s3c_gpio_cfgpin(EINT_GPIO_1(offs & 0x7), EINT_MODE); | ||
| 107 | |||
| 108 | else if ((16 <= offs) && (offs < 24)) | ||
| 109 | s3c_gpio_cfgpin(EINT_GPIO_2(offs & 0x7), EINT_MODE); | ||
| 110 | |||
| 111 | else if ((24 <= offs) && (offs < 32)) | ||
| 112 | s3c_gpio_cfgpin(EINT_GPIO_3(offs & 0x7), EINT_MODE); | ||
| 113 | |||
| 114 | else | ||
| 115 | printk(KERN_ERR "No such irq number %d", offs); | ||
| 116 | |||
| 117 | return 0; | ||
| 118 | } | ||
| 119 | |||
| 120 | static struct irq_chip s5p_irq_eint = { | ||
| 121 | .name = "s5p-eint", | ||
| 122 | .mask = s5p_irq_eint_mask, | ||
| 123 | .unmask = s5p_irq_eint_unmask, | ||
| 124 | .mask_ack = s5p_irq_eint_maskack, | ||
| 125 | .ack = s5p_irq_eint_ack, | ||
| 126 | .set_type = s5p_irq_eint_set_type, | ||
| 127 | #ifdef CONFIG_PM | ||
| 128 | .set_wake = s3c_irqext_wake, | ||
| 129 | #endif | ||
| 130 | }; | ||
| 131 | |||
| 132 | /* s5p_irq_demux_eint | ||
| 133 | * | ||
| 134 | * This function demuxes the IRQ from the group0 external interrupts, | ||
| 135 | * from EINTs 16 to 31. It is designed to be inlined into the specific | ||
| 136 | * handler s5p_irq_demux_eintX_Y. | ||
| 137 | * | ||
| 138 | * Each EINT pend/mask registers handle eight of them. | ||
| 139 | */ | ||
| 140 | static inline void s5p_irq_demux_eint(unsigned int start) | ||
| 141 | { | ||
| 142 | u32 status = __raw_readl(S5P_EINT_PEND(EINT_REG_NR(start))); | ||
| 143 | u32 mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(start))); | ||
| 144 | unsigned int irq; | ||
| 145 | |||
| 146 | status &= ~mask; | ||
| 147 | status &= 0xff; | ||
| 148 | |||
| 149 | while (status) { | ||
| 150 | irq = fls(status) - 1; | ||
| 151 | generic_handle_irq(irq + start); | ||
| 152 | status &= ~(1 << irq); | ||
| 153 | } | ||
| 154 | } | ||
| 155 | |||
| 156 | static void s5p_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc) | ||
| 157 | { | ||
| 158 | s5p_irq_demux_eint(IRQ_EINT(16)); | ||
| 159 | s5p_irq_demux_eint(IRQ_EINT(24)); | ||
| 160 | } | ||
| 161 | |||
| 162 | static inline void s5p_irq_vic_eint_mask(unsigned int irq) | ||
| 163 | { | ||
| 164 | void __iomem *base = get_irq_chip_data(irq); | ||
| 165 | |||
| 166 | s5p_irq_eint_mask(irq); | ||
| 167 | writel(1 << EINT_OFFSET(irq), base + VIC_INT_ENABLE_CLEAR); | ||
| 168 | } | ||
| 169 | |||
| 170 | static void s5p_irq_vic_eint_unmask(unsigned int irq) | ||
| 171 | { | ||
| 172 | void __iomem *base = get_irq_chip_data(irq); | ||
| 173 | |||
| 174 | s5p_irq_eint_unmask(irq); | ||
| 175 | writel(1 << EINT_OFFSET(irq), base + VIC_INT_ENABLE); | ||
| 176 | } | ||
| 177 | |||
| 178 | static inline void s5p_irq_vic_eint_ack(unsigned int irq) | ||
| 179 | { | ||
| 180 | __raw_writel(eint_irq_to_bit(irq), S5P_EINT_PEND(EINT_REG_NR(irq))); | ||
| 181 | } | ||
| 182 | |||
| 183 | static void s5p_irq_vic_eint_maskack(unsigned int irq) | ||
| 184 | { | ||
| 185 | s5p_irq_vic_eint_mask(irq); | ||
| 186 | s5p_irq_vic_eint_ack(irq); | ||
| 187 | } | ||
| 188 | |||
| 189 | static struct irq_chip s5p_irq_vic_eint = { | ||
| 190 | .name = "s5p_vic_eint", | ||
| 191 | .mask = s5p_irq_vic_eint_mask, | ||
| 192 | .unmask = s5p_irq_vic_eint_unmask, | ||
| 193 | .mask_ack = s5p_irq_vic_eint_maskack, | ||
| 194 | .ack = s5p_irq_vic_eint_ack, | ||
| 195 | .set_type = s5p_irq_eint_set_type, | ||
| 196 | #ifdef CONFIG_PM | ||
| 197 | .set_wake = s3c_irqext_wake, | ||
| 198 | #endif | ||
| 199 | }; | ||
| 200 | |||
| 201 | int __init s5p_init_irq_eint(void) | ||
| 202 | { | ||
| 203 | int irq; | ||
| 204 | |||
| 205 | for (irq = IRQ_EINT(0); irq <= IRQ_EINT(15); irq++) | ||
| 206 | set_irq_chip(irq, &s5p_irq_vic_eint); | ||
| 207 | |||
| 208 | for (irq = IRQ_EINT(16); irq <= IRQ_EINT(31); irq++) { | ||
| 209 | set_irq_chip(irq, &s5p_irq_eint); | ||
| 210 | set_irq_handler(irq, handle_level_irq); | ||
| 211 | set_irq_flags(irq, IRQF_VALID); | ||
| 212 | } | ||
| 213 | |||
| 214 | set_irq_chained_handler(IRQ_EINT16_31, s5p_irq_demux_eint16_31); | ||
| 215 | return 0; | ||
| 216 | } | ||
| 217 | |||
| 218 | arch_initcall(s5p_init_irq_eint); | ||
diff --git a/arch/arm/plat-s5pc1xx/Kconfig b/arch/arm/plat-s5pc1xx/Kconfig deleted file mode 100644 index c7bd2bbda239..000000000000 --- a/arch/arm/plat-s5pc1xx/Kconfig +++ /dev/null | |||
| @@ -1,47 +0,0 @@ | |||
| 1 | # Copyright 2009 Samsung Electronics Co. | ||
| 2 | # Byungho Min <bhmin@samsung.com> | ||
| 3 | # | ||
| 4 | # Licensed under GPLv2 | ||
| 5 | |||
| 6 | config PLAT_S5PC1XX | ||
| 7 | bool | ||
| 8 | depends on ARCH_S5PC1XX | ||
| 9 | default y | ||
| 10 | select PLAT_S3C | ||
| 11 | select ARM_VIC | ||
| 12 | select NO_IOPORT | ||
| 13 | select ARCH_REQUIRE_GPIOLIB | ||
| 14 | select SAMSUNG_CLKSRC | ||
| 15 | select SAMSUNG_IRQ_UART | ||
| 16 | select SAMSUNG_IRQ_VIC_TIMER | ||
| 17 | select S3C_GPIO_TRACK | ||
| 18 | select S3C_GPIO_PULL_UPDOWN | ||
| 19 | select S5P_GPIO_DRVSTR | ||
| 20 | select S3C_GPIO_CFG_S3C24XX | ||
| 21 | select S3C_GPIO_CFG_S3C64XX | ||
| 22 | select SAMSUNG_GPIOLIB_4BIT | ||
| 23 | help | ||
| 24 | Base platform code for any Samsung S5PC1XX device | ||
| 25 | |||
| 26 | if PLAT_S5PC1XX | ||
| 27 | |||
| 28 | # Configuration options shared by all S3C64XX implementations | ||
| 29 | |||
| 30 | config CPU_S5PC100_INIT | ||
| 31 | bool | ||
| 32 | help | ||
| 33 | Common initialisation code for the S5PC1XX | ||
| 34 | |||
| 35 | config CPU_S5PC100_CLOCK | ||
| 36 | bool | ||
| 37 | help | ||
| 38 | Common clock support code for the S5PC1XX | ||
| 39 | |||
| 40 | # platform specific device setup | ||
| 41 | |||
| 42 | config S5PC1XX_SETUP_SDHCI_GPIO | ||
| 43 | bool | ||
| 44 | help | ||
| 45 | Common setup code for SDHCI gpio. | ||
| 46 | |||
| 47 | endif | ||
diff --git a/arch/arm/plat-s5pc1xx/Makefile b/arch/arm/plat-s5pc1xx/Makefile deleted file mode 100644 index 9ce6409a9e02..000000000000 --- a/arch/arm/plat-s5pc1xx/Makefile +++ /dev/null | |||
| @@ -1,26 +0,0 @@ | |||
| 1 | # arch/arm/plat-s5pc1xx/Makefile | ||
| 2 | # | ||
| 3 | # Copyright 2009 Samsung Electronics Co. | ||
| 4 | # | ||
| 5 | # Licensed under GPLv2 | ||
| 6 | |||
| 7 | obj-y := | ||
| 8 | obj-m := | ||
| 9 | obj-n := dummy.o | ||
| 10 | obj- := | ||
| 11 | |||
| 12 | # Core files | ||
| 13 | |||
| 14 | obj-y += dev-uart.o | ||
| 15 | obj-y += cpu.o | ||
| 16 | obj-y += irq.o | ||
| 17 | obj-y += clock.o | ||
| 18 | |||
| 19 | # CPU support | ||
| 20 | |||
| 21 | obj-$(CONFIG_CPU_S5PC100_INIT) += s5pc100-init.o | ||
| 22 | obj-$(CONFIG_CPU_S5PC100_CLOCK) += s5pc100-clock.o | ||
| 23 | |||
| 24 | # Device setup | ||
| 25 | |||
| 26 | obj-$(CONFIG_S5PC1XX_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o | ||
diff --git a/arch/arm/plat-s5pc1xx/clock.c b/arch/arm/plat-s5pc1xx/clock.c deleted file mode 100644 index 387f23190c3c..000000000000 --- a/arch/arm/plat-s5pc1xx/clock.c +++ /dev/null | |||
| @@ -1,709 +0,0 @@ | |||
| 1 | /* linux/arch/arm/plat-s5pc1xx/clock.c | ||
| 2 | * | ||
| 3 | * Copyright 2009 Samsung Electronics Co. | ||
| 4 | * | ||
| 5 | * S5PC1XX Base clock support | ||
| 6 | * | ||
| 7 | * Based on plat-s3c64xx/clock.c | ||
| 8 | * | ||
| 9 | * This program is free software; you can redistribute it and/or modify | ||
| 10 | * it under the terms of the GNU General Public License version 2 as | ||
| 11 | * published by the Free Software Foundation. | ||
| 12 | */ | ||
| 13 | |||
| 14 | #include <linux/init.h> | ||
| 15 | #include <linux/module.h> | ||
| 16 | #include <linux/interrupt.h> | ||
| 17 | #include <linux/ioport.h> | ||
| 18 | #include <linux/clk.h> | ||
| 19 | #include <linux/io.h> | ||
| 20 | |||
| 21 | #include <mach/hardware.h> | ||
| 22 | #include <mach/map.h> | ||
| 23 | |||
| 24 | #include <plat/regs-clock.h> | ||
| 25 | #include <plat/devs.h> | ||
| 26 | #include <plat/clock.h> | ||
| 27 | |||
| 28 | struct clk clk_27m = { | ||
| 29 | .name = "clk_27m", | ||
| 30 | .id = -1, | ||
| 31 | .rate = 27000000, | ||
| 32 | }; | ||
| 33 | |||
| 34 | static int clk_48m_ctrl(struct clk *clk, int enable) | ||
| 35 | { | ||
| 36 | unsigned long flags; | ||
| 37 | u32 val; | ||
| 38 | |||
| 39 | /* can't rely on clock lock, this register has other usages */ | ||
| 40 | local_irq_save(flags); | ||
| 41 | |||
| 42 | val = __raw_readl(S5PC100_CLKSRC1); | ||
| 43 | if (enable) | ||
| 44 | val |= S5PC100_CLKSRC1_CLK48M_MASK; | ||
| 45 | else | ||
| 46 | val &= ~S5PC100_CLKSRC1_CLK48M_MASK; | ||
| 47 | |||
| 48 | __raw_writel(val, S5PC100_CLKSRC1); | ||
| 49 | local_irq_restore(flags); | ||
| 50 | |||
| 51 | return 0; | ||
| 52 | } | ||
| 53 | |||
| 54 | struct clk clk_48m = { | ||
| 55 | .name = "clk_48m", | ||
| 56 | .id = -1, | ||
| 57 | .rate = 48000000, | ||
| 58 | .enable = clk_48m_ctrl, | ||
| 59 | }; | ||
| 60 | |||
| 61 | struct clk clk_54m = { | ||
| 62 | .name = "clk_54m", | ||
| 63 | .id = -1, | ||
| 64 | .rate = 54000000, | ||
| 65 | }; | ||
| 66 | |||
| 67 | struct clk clk_hd0 = { | ||
| 68 | .name = "hclkd0", | ||
| 69 | .id = -1, | ||
| 70 | .rate = 0, | ||
| 71 | .parent = NULL, | ||
| 72 | .ctrlbit = 0, | ||
| 73 | .ops = &clk_ops_def_setrate, | ||
| 74 | }; | ||
| 75 | |||
| 76 | struct clk clk_pd0 = { | ||
| 77 | .name = "pclkd0", | ||
| 78 | .id = -1, | ||
| 79 | .rate = 0, | ||
| 80 | .parent = NULL, | ||
| 81 | .ctrlbit = 0, | ||
| 82 | .ops = &clk_ops_def_setrate, | ||
| 83 | }; | ||
| 84 | |||
| 85 | static int s5pc1xx_clk_gate(void __iomem *reg, struct clk *clk, int enable) | ||
| 86 | { | ||
| 87 | unsigned int ctrlbit = clk->ctrlbit; | ||
| 88 | u32 con; | ||
| 89 | |||
| 90 | con = __raw_readl(reg); | ||
| 91 | if (enable) | ||
| 92 | con |= ctrlbit; | ||
| 93 | else | ||
| 94 | con &= ~ctrlbit; | ||
| 95 | __raw_writel(con, reg); | ||
| 96 | |||
| 97 | return 0; | ||
| 98 | } | ||
| 99 | |||
| 100 | static int s5pc100_clk_d00_ctrl(struct clk *clk, int enable) | ||
| 101 | { | ||
| 102 | return s5pc1xx_clk_gate(S5PC100_CLKGATE_D00, clk, enable); | ||
| 103 | } | ||
| 104 | |||
| 105 | static int s5pc100_clk_d01_ctrl(struct clk *clk, int enable) | ||
| 106 | { | ||
| 107 | return s5pc1xx_clk_gate(S5PC100_CLKGATE_D01, clk, enable); | ||
| 108 | } | ||
| 109 | |||
| 110 | static int s5pc100_clk_d02_ctrl(struct clk *clk, int enable) | ||
| 111 | { | ||
| 112 | return s5pc1xx_clk_gate(S5PC100_CLKGATE_D02, clk, enable); | ||
| 113 | } | ||
| 114 | |||
| 115 | static int s5pc100_clk_d10_ctrl(struct clk *clk, int enable) | ||
| 116 | { | ||
| 117 | return s5pc1xx_clk_gate(S5PC100_CLKGATE_D10, clk, enable); | ||
| 118 | } | ||
| 119 | |||
| 120 | static int s5pc100_clk_d11_ctrl(struct clk *clk, int enable) | ||
| 121 | { | ||
| 122 | return s5pc1xx_clk_gate(S5PC100_CLKGATE_D11, clk, enable); | ||
| 123 | } | ||
| 124 | |||
| 125 | static int s5pc100_clk_d12_ctrl(struct clk *clk, int enable) | ||
| 126 | { | ||
| 127 | return s5pc1xx_clk_gate(S5PC100_CLKGATE_D12, clk, enable); | ||
| 128 | } | ||
| 129 | |||
| 130 | static int s5pc100_clk_d13_ctrl(struct clk *clk, int enable) | ||
| 131 | { | ||
| 132 | return s5pc1xx_clk_gate(S5PC100_CLKGATE_D13, clk, enable); | ||
| 133 | } | ||
| 134 | |||
| 135 | static int s5pc100_clk_d14_ctrl(struct clk *clk, int enable) | ||
| 136 | { | ||
| 137 | return s5pc1xx_clk_gate(S5PC100_CLKGATE_D14, clk, enable); | ||
| 138 | } | ||
| 139 | |||
| 140 | static int s5pc100_clk_d15_ctrl(struct clk *clk, int enable) | ||
| 141 | { | ||
| 142 | return s5pc1xx_clk_gate(S5PC100_CLKGATE_D15, clk, enable); | ||
| 143 | } | ||
| 144 | |||
| 145 | static int s5pc100_clk_d20_ctrl(struct clk *clk, int enable) | ||
| 146 | { | ||
| 147 | return s5pc1xx_clk_gate(S5PC100_CLKGATE_D20, clk, enable); | ||
| 148 | } | ||
| 149 | |||
| 150 | int s5pc100_sclk0_ctrl(struct clk *clk, int enable) | ||
| 151 | { | ||
| 152 | return s5pc1xx_clk_gate(S5PC100_SCLKGATE0, clk, enable); | ||
| 153 | } | ||
| 154 | |||
| 155 | int s5pc100_sclk1_ctrl(struct clk *clk, int enable) | ||
| 156 | { | ||
| 157 | return s5pc1xx_clk_gate(S5PC100_SCLKGATE1, clk, enable); | ||
| 158 | } | ||
| 159 | |||
| 160 | static struct clk s5pc100_init_clocks_disable[] = { | ||
| 161 | { | ||
| 162 | .name = "dsi", | ||
| 163 | .id = -1, | ||
| 164 | .parent = &clk_p, | ||
| 165 | .enable = s5pc100_clk_d11_ctrl, | ||
| 166 | .ctrlbit = S5PC100_CLKGATE_D11_DSI, | ||
| 167 | }, { | ||
| 168 | .name = "csi", | ||
| 169 | .id = -1, | ||
| 170 | .parent = &clk_h, | ||
| 171 | .enable = s5pc100_clk_d11_ctrl, | ||
| 172 | .ctrlbit = S5PC100_CLKGATE_D11_CSI, | ||
| 173 | }, { | ||
| 174 | .name = "ccan", | ||
| 175 | .id = 0, | ||
| 176 | .parent = &clk_p, | ||
| 177 | .enable = s5pc100_clk_d14_ctrl, | ||
| 178 | .ctrlbit = S5PC100_CLKGATE_D14_CCAN0, | ||
| 179 | }, { | ||
| 180 | .name = "ccan", | ||
| 181 | .id = 1, | ||
| 182 | .parent = &clk_p, | ||
| 183 | .enable = s5pc100_clk_d14_ctrl, | ||
| 184 | .ctrlbit = S5PC100_CLKGATE_D14_CCAN1, | ||
| 185 | }, { | ||
| 186 | .name = "keypad", | ||
| 187 | .id = -1, | ||
| 188 | .parent = &clk_p, | ||
| 189 | .enable = s5pc100_clk_d15_ctrl, | ||
| 190 | .ctrlbit = S5PC100_CLKGATE_D15_KEYIF, | ||
| 191 | }, { | ||
| 192 | .name = "hclkd2", | ||
| 193 | .id = -1, | ||
| 194 | .parent = NULL, | ||
| 195 | .enable = s5pc100_clk_d20_ctrl, | ||
| 196 | .ctrlbit = S5PC100_CLKGATE_D20_HCLKD2, | ||
| 197 | }, { | ||
| 198 | .name = "iis-d2", | ||
| 199 | .id = -1, | ||
| 200 | .parent = NULL, | ||
| 201 | .enable = s5pc100_clk_d20_ctrl, | ||
| 202 | .ctrlbit = S5PC100_CLKGATE_D20_I2SD2, | ||
| 203 | }, | ||
| 204 | }; | ||
| 205 | |||
| 206 | static struct clk s5pc100_init_clocks[] = { | ||
| 207 | /* System1 (D0_0) devices */ | ||
| 208 | { | ||
| 209 | .name = "intc", | ||
| 210 | .id = -1, | ||
| 211 | .parent = &clk_hd0, | ||
| 212 | .enable = s5pc100_clk_d00_ctrl, | ||
| 213 | .ctrlbit = S5PC100_CLKGATE_D00_INTC, | ||
| 214 | }, { | ||
| 215 | .name = "tzic", | ||
| 216 | .id = -1, | ||
| 217 | .parent = &clk_hd0, | ||
| 218 | .enable = s5pc100_clk_d00_ctrl, | ||
| 219 | .ctrlbit = S5PC100_CLKGATE_D00_TZIC, | ||
| 220 | }, { | ||
| 221 | .name = "cf-ata", | ||
| 222 | .id = -1, | ||
| 223 | .parent = &clk_hd0, | ||
| 224 | .enable = s5pc100_clk_d00_ctrl, | ||
| 225 | .ctrlbit = S5PC100_CLKGATE_D00_CFCON, | ||
| 226 | }, { | ||
| 227 | .name = "mdma", | ||
| 228 | .id = -1, | ||
| 229 | .parent = &clk_hd0, | ||
| 230 | .enable = s5pc100_clk_d00_ctrl, | ||
| 231 | .ctrlbit = S5PC100_CLKGATE_D00_MDMA, | ||
| 232 | }, { | ||
| 233 | .name = "g2d", | ||
| 234 | .id = -1, | ||
| 235 | .parent = &clk_hd0, | ||
| 236 | .enable = s5pc100_clk_d00_ctrl, | ||
| 237 | .ctrlbit = S5PC100_CLKGATE_D00_G2D, | ||
| 238 | }, { | ||
| 239 | .name = "secss", | ||
| 240 | .id = -1, | ||
| 241 | .parent = &clk_hd0, | ||
| 242 | .enable = s5pc100_clk_d00_ctrl, | ||
| 243 | .ctrlbit = S5PC100_CLKGATE_D00_SECSS, | ||
| 244 | }, { | ||
| 245 | .name = "cssys", | ||
| 246 | .id = -1, | ||
| 247 | .parent = &clk_hd0, | ||
| 248 | .enable = s5pc100_clk_d00_ctrl, | ||
| 249 | .ctrlbit = S5PC100_CLKGATE_D00_CSSYS, | ||
| 250 | }, | ||
| 251 | |||
| 252 | /* Memory (D0_1) devices */ | ||
| 253 | { | ||
| 254 | .name = "dmc", | ||
| 255 | .id = -1, | ||
| 256 | .parent = &clk_hd0, | ||
| 257 | .enable = s5pc100_clk_d01_ctrl, | ||
| 258 | .ctrlbit = S5PC100_CLKGATE_D01_DMC, | ||
| 259 | }, { | ||
| 260 | .name = "sromc", | ||
| 261 | .id = -1, | ||
| 262 | .parent = &clk_hd0, | ||
| 263 | .enable = s5pc100_clk_d01_ctrl, | ||
| 264 | .ctrlbit = S5PC100_CLKGATE_D01_SROMC, | ||
| 265 | }, { | ||
| 266 | .name = "onenand", | ||
| 267 | .id = -1, | ||
| 268 | .parent = &clk_hd0, | ||
| 269 | .enable = s5pc100_clk_d01_ctrl, | ||
| 270 | .ctrlbit = S5PC100_CLKGATE_D01_ONENAND, | ||
| 271 | }, { | ||
| 272 | .name = "nand", | ||
| 273 | .id = -1, | ||
| 274 | .parent = &clk_hd0, | ||
| 275 | .enable = s5pc100_clk_d01_ctrl, | ||
| 276 | .ctrlbit = S5PC100_CLKGATE_D01_NFCON, | ||
| 277 | }, { | ||
| 278 | .name = "intmem", | ||
| 279 | .id = -1, | ||
| 280 | .parent = &clk_hd0, | ||
| 281 | .enable = s5pc100_clk_d01_ctrl, | ||
| 282 | .ctrlbit = S5PC100_CLKGATE_D01_INTMEM, | ||
| 283 | }, { | ||
| 284 | .name = "ebi", | ||
| 285 | .id = -1, | ||
| 286 | .parent = &clk_hd0, | ||
| 287 | .enable = s5pc100_clk_d01_ctrl, | ||
| 288 | .ctrlbit = S5PC100_CLKGATE_D01_EBI, | ||
| 289 | }, | ||
| 290 | |||
| 291 | /* System2 (D0_2) devices */ | ||
| 292 | { | ||
| 293 | .name = "seckey", | ||
| 294 | .id = -1, | ||
| 295 | .parent = &clk_pd0, | ||
| 296 | .enable = s5pc100_clk_d02_ctrl, | ||
| 297 | .ctrlbit = S5PC100_CLKGATE_D02_SECKEY, | ||
| 298 | }, { | ||
| 299 | .name = "sdm", | ||
| 300 | .id = -1, | ||
| 301 | .parent = &clk_hd0, | ||
| 302 | .enable = s5pc100_clk_d02_ctrl, | ||
| 303 | .ctrlbit = S5PC100_CLKGATE_D02_SDM, | ||
| 304 | }, | ||
| 305 | |||
| 306 | /* File (D1_0) devices */ | ||
| 307 | { | ||
| 308 | .name = "pdma", | ||
| 309 | .id = 0, | ||
| 310 | .parent = &clk_h, | ||
| 311 | .enable = s5pc100_clk_d10_ctrl, | ||
| 312 | .ctrlbit = S5PC100_CLKGATE_D10_PDMA0, | ||
| 313 | }, { | ||
| 314 | .name = "pdma", | ||
| 315 | .id = 1, | ||
| 316 | .parent = &clk_h, | ||
| 317 | .enable = s5pc100_clk_d10_ctrl, | ||
| 318 | .ctrlbit = S5PC100_CLKGATE_D10_PDMA1, | ||
| 319 | }, { | ||
| 320 | .name = "usb-host", | ||
| 321 | .id = -1, | ||
| 322 | .parent = &clk_h, | ||
| 323 | .enable = s5pc100_clk_d10_ctrl, | ||
| 324 | .ctrlbit = S5PC100_CLKGATE_D10_USBHOST, | ||
| 325 | }, { | ||
| 326 | .name = "otg", | ||
| 327 | .id = -1, | ||
| 328 | .parent = &clk_h, | ||
| 329 | .enable = s5pc100_clk_d10_ctrl, | ||
| 330 | .ctrlbit = S5PC100_CLKGATE_D10_USBOTG, | ||
| 331 | }, { | ||
| 332 | .name = "modem", | ||
| 333 | .id = -1, | ||
| 334 | .parent = &clk_h, | ||
| 335 | .enable = s5pc100_clk_d10_ctrl, | ||
| 336 | .ctrlbit = S5PC100_CLKGATE_D10_MODEMIF, | ||
| 337 | }, { | ||
| 338 | .name = "hsmmc", | ||
| 339 | .id = 0, | ||
| 340 | .parent = &clk_48m, | ||
| 341 | .enable = s5pc100_clk_d10_ctrl, | ||
| 342 | .ctrlbit = S5PC100_CLKGATE_D10_HSMMC0, | ||
| 343 | }, { | ||
| 344 | .name = "hsmmc", | ||
| 345 | .id = 1, | ||
| 346 | .parent = &clk_48m, | ||
| 347 | .enable = s5pc100_clk_d10_ctrl, | ||
| 348 | .ctrlbit = S5PC100_CLKGATE_D10_HSMMC1, | ||
| 349 | }, { | ||
| 350 | .name = "hsmmc", | ||
| 351 | .id = 2, | ||
| 352 | .parent = &clk_48m, | ||
| 353 | .enable = s5pc100_clk_d10_ctrl, | ||
| 354 | .ctrlbit = S5PC100_CLKGATE_D10_HSMMC2, | ||
| 355 | }, | ||
| 356 | |||
| 357 | /* Multimedia1 (D1_1) devices */ | ||
| 358 | { | ||
| 359 | .name = "lcd", | ||
| 360 | .id = -1, | ||
| 361 | .parent = &clk_p, | ||
| 362 | .enable = s5pc100_clk_d11_ctrl, | ||
| 363 | .ctrlbit = S5PC100_CLKGATE_D11_LCD, | ||
| 364 | }, { | ||
| 365 | .name = "rotator", | ||
| 366 | .id = -1, | ||
| 367 | .parent = &clk_p, | ||
| 368 | .enable = s5pc100_clk_d11_ctrl, | ||
| 369 | .ctrlbit = S5PC100_CLKGATE_D11_ROTATOR, | ||
| 370 | }, { | ||
| 371 | .name = "fimc", | ||
| 372 | .id = -1, | ||
| 373 | .parent = &clk_p, | ||
| 374 | .enable = s5pc100_clk_d11_ctrl, | ||
| 375 | .ctrlbit = S5PC100_CLKGATE_D11_FIMC0, | ||
| 376 | }, { | ||
| 377 | .name = "fimc", | ||
| 378 | .id = -1, | ||
| 379 | .parent = &clk_p, | ||
| 380 | .enable = s5pc100_clk_d11_ctrl, | ||
| 381 | .ctrlbit = S5PC100_CLKGATE_D11_FIMC1, | ||
| 382 | }, { | ||
| 383 | .name = "fimc", | ||
| 384 | .id = -1, | ||
| 385 | .parent = &clk_p, | ||
| 386 | .enable = s5pc100_clk_d11_ctrl, | ||
| 387 | .ctrlbit = S5PC100_CLKGATE_D11_FIMC2, | ||
| 388 | }, { | ||
| 389 | .name = "jpeg", | ||
| 390 | .id = -1, | ||
| 391 | .parent = &clk_p, | ||
| 392 | .enable = s5pc100_clk_d11_ctrl, | ||
| 393 | .ctrlbit = S5PC100_CLKGATE_D11_JPEG, | ||
| 394 | }, { | ||
| 395 | .name = "g3d", | ||
| 396 | .id = -1, | ||
| 397 | .parent = &clk_p, | ||
| 398 | .enable = s5pc100_clk_d11_ctrl, | ||
| 399 | .ctrlbit = S5PC100_CLKGATE_D11_G3D, | ||
| 400 | }, | ||
| 401 | |||
| 402 | /* Multimedia2 (D1_2) devices */ | ||
| 403 | { | ||
| 404 | .name = "tv", | ||
| 405 | .id = -1, | ||
| 406 | .parent = &clk_p, | ||
| 407 | .enable = s5pc100_clk_d12_ctrl, | ||
| 408 | .ctrlbit = S5PC100_CLKGATE_D12_TV, | ||
| 409 | }, { | ||
| 410 | .name = "vp", | ||
| 411 | .id = -1, | ||
| 412 | .parent = &clk_p, | ||
| 413 | .enable = s5pc100_clk_d12_ctrl, | ||
| 414 | .ctrlbit = S5PC100_CLKGATE_D12_VP, | ||
| 415 | }, { | ||
| 416 | .name = "mixer", | ||
| 417 | .id = -1, | ||
| 418 | .parent = &clk_p, | ||
| 419 | .enable = s5pc100_clk_d12_ctrl, | ||
| 420 | .ctrlbit = S5PC100_CLKGATE_D12_MIXER, | ||
| 421 | }, { | ||
| 422 | .name = "hdmi", | ||
| 423 | .id = -1, | ||
| 424 | .parent = &clk_p, | ||
| 425 | .enable = s5pc100_clk_d12_ctrl, | ||
| 426 | .ctrlbit = S5PC100_CLKGATE_D12_HDMI, | ||
| 427 | }, { | ||
| 428 | .name = "mfc", | ||
| 429 | .id = -1, | ||
| 430 | .parent = &clk_p, | ||
| 431 | .enable = s5pc100_clk_d12_ctrl, | ||
| 432 | .ctrlbit = S5PC100_CLKGATE_D12_MFC, | ||
| 433 | }, | ||
| 434 | |||
| 435 | /* System (D1_3) devices */ | ||
| 436 | { | ||
| 437 | .name = "chipid", | ||
| 438 | .id = -1, | ||
| 439 | .parent = &clk_p, | ||
| 440 | .enable = s5pc100_clk_d13_ctrl, | ||
| 441 | .ctrlbit = S5PC100_CLKGATE_D13_CHIPID, | ||
| 442 | }, { | ||
| 443 | .name = "gpio", | ||
| 444 | .id = -1, | ||
| 445 | .parent = &clk_p, | ||
| 446 | .enable = s5pc100_clk_d13_ctrl, | ||
| 447 | .ctrlbit = S5PC100_CLKGATE_D13_GPIO, | ||
| 448 | }, { | ||
| 449 | .name = "apc", | ||
| 450 | .id = -1, | ||
| 451 | .parent = &clk_p, | ||
| 452 | .enable = s5pc100_clk_d13_ctrl, | ||
| 453 | .ctrlbit = S5PC100_CLKGATE_D13_APC, | ||
| 454 | }, { | ||
| 455 | .name = "iec", | ||
| 456 | .id = -1, | ||
| 457 | .parent = &clk_p, | ||
| 458 | .enable = s5pc100_clk_d13_ctrl, | ||
| 459 | .ctrlbit = S5PC100_CLKGATE_D13_IEC, | ||
| 460 | }, { | ||
| 461 | .name = "timers", | ||
| 462 | .id = -1, | ||
| 463 | .parent = &clk_p, | ||
| 464 | .enable = s5pc100_clk_d13_ctrl, | ||
| 465 | .ctrlbit = S5PC100_CLKGATE_D13_PWM, | ||
| 466 | }, { | ||
| 467 | .name = "systimer", | ||
| 468 | .id = -1, | ||
| 469 | .parent = &clk_p, | ||
| 470 | .enable = s5pc100_clk_d13_ctrl, | ||
| 471 | .ctrlbit = S5PC100_CLKGATE_D13_SYSTIMER, | ||
| 472 | }, { | ||
| 473 | .name = "watchdog", | ||
| 474 | .id = -1, | ||
| 475 | .parent = &clk_p, | ||
| 476 | .enable = s5pc100_clk_d13_ctrl, | ||
| 477 | .ctrlbit = S5PC100_CLKGATE_D13_WDT, | ||
| 478 | }, { | ||
| 479 | .name = "rtc", | ||
| 480 | .id = -1, | ||
| 481 | .parent = &clk_p, | ||
| 482 | .enable = s5pc100_clk_d13_ctrl, | ||
| 483 | .ctrlbit = S5PC100_CLKGATE_D13_RTC, | ||
| 484 | }, | ||
| 485 | |||
| 486 | /* Connectivity (D1_4) devices */ | ||
| 487 | { | ||
| 488 | .name = "uart", | ||
| 489 | .id = 0, | ||
| 490 | .parent = &clk_p, | ||
| 491 | .enable = s5pc100_clk_d14_ctrl, | ||
| 492 | .ctrlbit = S5PC100_CLKGATE_D14_UART0, | ||
| 493 | }, { | ||
| 494 | .name = "uart", | ||
| 495 | .id = 1, | ||
| 496 | .parent = &clk_p, | ||
| 497 | .enable = s5pc100_clk_d14_ctrl, | ||
| 498 | .ctrlbit = S5PC100_CLKGATE_D14_UART1, | ||
| 499 | }, { | ||
| 500 | .name = "uart", | ||
| 501 | .id = 2, | ||
| 502 | .parent = &clk_p, | ||
| 503 | .enable = s5pc100_clk_d14_ctrl, | ||
| 504 | .ctrlbit = S5PC100_CLKGATE_D14_UART2, | ||
| 505 | }, { | ||
| 506 | .name = "uart", | ||
| 507 | .id = 3, | ||
| 508 | .parent = &clk_p, | ||
| 509 | .enable = s5pc100_clk_d14_ctrl, | ||
| 510 | .ctrlbit = S5PC100_CLKGATE_D14_UART3, | ||
| 511 | }, { | ||
| 512 | .name = "i2c", | ||
| 513 | .id = -1, | ||
| 514 | .parent = &clk_p, | ||
| 515 | .enable = s5pc100_clk_d14_ctrl, | ||
| 516 | .ctrlbit = S5PC100_CLKGATE_D14_IIC, | ||
| 517 | }, { | ||
| 518 | .name = "hdmi-i2c", | ||
| 519 | .id = -1, | ||
| 520 | .parent = &clk_p, | ||
| 521 | .enable = s5pc100_clk_d14_ctrl, | ||
| 522 | .ctrlbit = S5PC100_CLKGATE_D14_HDMI_IIC, | ||
| 523 | }, { | ||
| 524 | .name = "spi", | ||
| 525 | .id = 0, | ||
| 526 | .parent = &clk_p, | ||
| 527 | .enable = s5pc100_clk_d14_ctrl, | ||
| 528 | .ctrlbit = S5PC100_CLKGATE_D14_SPI0, | ||
| 529 | }, { | ||
| 530 | .name = "spi", | ||
| 531 | .id = 1, | ||
| 532 | .parent = &clk_p, | ||
| 533 | .enable = s5pc100_clk_d14_ctrl, | ||
| 534 | .ctrlbit = S5PC100_CLKGATE_D14_SPI1, | ||
| 535 | }, { | ||
| 536 | .name = "spi", | ||
| 537 | .id = 2, | ||
| 538 | .parent = &clk_p, | ||
| 539 | .enable = s5pc100_clk_d14_ctrl, | ||
| 540 | .ctrlbit = S5PC100_CLKGATE_D14_SPI2, | ||
| 541 | }, { | ||
| 542 | .name = "irda", | ||
| 543 | .id = -1, | ||
| 544 | .parent = &clk_p, | ||
| 545 | .enable = s5pc100_clk_d14_ctrl, | ||
| 546 | .ctrlbit = S5PC100_CLKGATE_D14_IRDA, | ||
| 547 | }, { | ||
| 548 | .name = "hsitx", | ||
| 549 | .id = -1, | ||
| 550 | .parent = &clk_p, | ||
| 551 | .enable = s5pc100_clk_d14_ctrl, | ||
| 552 | .ctrlbit = S5PC100_CLKGATE_D14_HSITX, | ||
| 553 | }, { | ||
| 554 | .name = "hsirx", | ||
| 555 | .id = -1, | ||
| 556 | .parent = &clk_p, | ||
| 557 | .enable = s5pc100_clk_d14_ctrl, | ||
| 558 | .ctrlbit = S5PC100_CLKGATE_D14_HSIRX, | ||
| 559 | }, | ||
| 560 | |||
| 561 | /* Audio (D1_5) devices */ | ||
| 562 | { | ||
| 563 | .name = "iis", | ||
| 564 | .id = 0, | ||
| 565 | .parent = &clk_p, | ||
| 566 | .enable = s5pc100_clk_d15_ctrl, | ||
| 567 | .ctrlbit = S5PC100_CLKGATE_D15_IIS0, | ||
| 568 | }, { | ||
| 569 | .name = "iis", | ||
| 570 | .id = 1, | ||
| 571 | .parent = &clk_p, | ||
| 572 | .enable = s5pc100_clk_d15_ctrl, | ||
| 573 | .ctrlbit = S5PC100_CLKGATE_D15_IIS1, | ||
| 574 | }, { | ||
| 575 | .name = "iis", | ||
| 576 | .id = 2, | ||
| 577 | .parent = &clk_p, | ||
| 578 | .enable = s5pc100_clk_d15_ctrl, | ||
| 579 | .ctrlbit = S5PC100_CLKGATE_D15_IIS2, | ||
| 580 | }, { | ||
| 581 | .name = "ac97", | ||
| 582 | .id = -1, | ||
| 583 | .parent = &clk_p, | ||
| 584 | .enable = s5pc100_clk_d15_ctrl, | ||
| 585 | .ctrlbit = S5PC100_CLKGATE_D15_AC97, | ||
| 586 | }, { | ||
| 587 | .name = "pcm", | ||
| 588 | .id = 0, | ||
| 589 | .parent = &clk_p, | ||
| 590 | .enable = s5pc100_clk_d15_ctrl, | ||
| 591 | .ctrlbit = S5PC100_CLKGATE_D15_PCM0, | ||
| 592 | }, { | ||
| 593 | .name = "pcm", | ||
| 594 | .id = 1, | ||
| 595 | .parent = &clk_p, | ||
| 596 | .enable = s5pc100_clk_d15_ctrl, | ||
| 597 | .ctrlbit = S5PC100_CLKGATE_D15_PCM1, | ||
| 598 | }, { | ||
| 599 | .name = "spdif", | ||
| 600 | .id = -1, | ||
| 601 | .parent = &clk_p, | ||
| 602 | .enable = s5pc100_clk_d15_ctrl, | ||
| 603 | .ctrlbit = S5PC100_CLKGATE_D15_SPDIF, | ||
| 604 | }, { | ||
| 605 | .name = "adc", | ||
| 606 | .id = -1, | ||
| 607 | .parent = &clk_p, | ||
| 608 | .enable = s5pc100_clk_d15_ctrl, | ||
| 609 | .ctrlbit = S5PC100_CLKGATE_D15_TSADC, | ||
| 610 | }, { | ||
| 611 | .name = "cg", | ||
| 612 | .id = -1, | ||
| 613 | .parent = &clk_p, | ||
| 614 | .enable = s5pc100_clk_d15_ctrl, | ||
| 615 | .ctrlbit = S5PC100_CLKGATE_D15_CG, | ||
| 616 | }, | ||
| 617 | |||
| 618 | /* Audio (D2_0) devices: all disabled */ | ||
| 619 | |||
| 620 | /* Special Clocks 0 */ | ||
| 621 | { | ||
| 622 | .name = "sclk_hpm", | ||
| 623 | .id = -1, | ||
| 624 | .parent = NULL, | ||
| 625 | .enable = s5pc100_sclk0_ctrl, | ||
| 626 | .ctrlbit = S5PC100_CLKGATE_SCLK0_HPM, | ||
| 627 | }, { | ||
| 628 | .name = "sclk_onenand", | ||
| 629 | .id = -1, | ||
| 630 | .parent = NULL, | ||
| 631 | .enable = s5pc100_sclk0_ctrl, | ||
| 632 | .ctrlbit = S5PC100_CLKGATE_SCLK0_ONENAND, | ||
| 633 | }, { | ||
| 634 | .name = "spi_48", | ||
| 635 | .id = 0, | ||
| 636 | .parent = &clk_48m, | ||
| 637 | .enable = s5pc100_sclk0_ctrl, | ||
| 638 | .ctrlbit = S5PC100_CLKGATE_SCLK0_SPI0_48, | ||
| 639 | }, { | ||
| 640 | .name = "spi_48", | ||
| 641 | .id = 1, | ||
| 642 | .parent = &clk_48m, | ||
| 643 | .enable = s5pc100_sclk0_ctrl, | ||
| 644 | .ctrlbit = S5PC100_CLKGATE_SCLK0_SPI1_48, | ||
| 645 | }, { | ||
| 646 | .name = "spi_48", | ||
| 647 | .id = 2, | ||
| 648 | .parent = &clk_48m, | ||
| 649 | .enable = s5pc100_sclk0_ctrl, | ||
| 650 | .ctrlbit = S5PC100_CLKGATE_SCLK0_SPI2_48, | ||
| 651 | }, { | ||
| 652 | .name = "mmc_48", | ||
| 653 | .id = 0, | ||
| 654 | .parent = &clk_48m, | ||
| 655 | .enable = s5pc100_sclk0_ctrl, | ||
| 656 | .ctrlbit = S5PC100_CLKGATE_SCLK0_MMC0_48, | ||
| 657 | }, { | ||
| 658 | .name = "mmc_48", | ||
| 659 | .id = 1, | ||
| 660 | .parent = &clk_48m, | ||
| 661 | .enable = s5pc100_sclk0_ctrl, | ||
| 662 | .ctrlbit = S5PC100_CLKGATE_SCLK0_MMC1_48, | ||
| 663 | }, { | ||
| 664 | .name = "mmc_48", | ||
| 665 | .id = 2, | ||
| 666 | .parent = &clk_48m, | ||
| 667 | .enable = s5pc100_sclk0_ctrl, | ||
| 668 | .ctrlbit = S5PC100_CLKGATE_SCLK0_MMC2_48, | ||
| 669 | }, | ||
| 670 | /* Special Clocks 1 */ | ||
| 671 | }; | ||
| 672 | |||
| 673 | static struct clk *clks[] __initdata = { | ||
| 674 | &clk_ext, | ||
| 675 | &clk_epll, | ||
| 676 | &clk_pd0, | ||
| 677 | &clk_hd0, | ||
| 678 | &clk_27m, | ||
| 679 | &clk_48m, | ||
| 680 | &clk_54m, | ||
| 681 | }; | ||
| 682 | |||
| 683 | void __init s5pc1xx_register_clocks(void) | ||
| 684 | { | ||
| 685 | struct clk *clkp; | ||
| 686 | int ret; | ||
| 687 | int ptr; | ||
| 688 | int size; | ||
| 689 | |||
| 690 | s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); | ||
| 691 | |||
| 692 | s3c_register_clocks(s5pc100_init_clocks, | ||
| 693 | ARRAY_SIZE(s5pc100_init_clocks)); | ||
| 694 | |||
| 695 | clkp = s5pc100_init_clocks_disable; | ||
| 696 | size = ARRAY_SIZE(s5pc100_init_clocks_disable); | ||
| 697 | |||
| 698 | for (ptr = 0; ptr < size; ptr++, clkp++) { | ||
| 699 | ret = s3c24xx_register_clock(clkp); | ||
| 700 | if (ret < 0) { | ||
| 701 | printk(KERN_ERR "Failed to register clock %s (%d)\n", | ||
| 702 | clkp->name, ret); | ||
| 703 | } | ||
| 704 | |||
| 705 | (clkp->enable)(clkp, 0); | ||
| 706 | } | ||
| 707 | |||
| 708 | s3c_pwmclk_init(); | ||
| 709 | } | ||
diff --git a/arch/arm/plat-s5pc1xx/cpu.c b/arch/arm/plat-s5pc1xx/cpu.c deleted file mode 100644 index 02baeaa2a121..000000000000 --- a/arch/arm/plat-s5pc1xx/cpu.c +++ /dev/null | |||
| @@ -1,122 +0,0 @@ | |||
| 1 | /* linux/arch/arm/plat-s5pc1xx/cpu.c | ||
| 2 | * | ||
| 3 | * Copyright 2009 Samsung Electronics Co. | ||
| 4 | * Byungho Min <bhmin@samsung.com> | ||
| 5 | * | ||
| 6 | * S5PC1XX CPU Support | ||
| 7 | * | ||
| 8 | * Based on plat-s3c64xx/cpu.c | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License version 2 as | ||
| 12 | * published by the Free Software Foundation. | ||
| 13 | */ | ||
| 14 | |||
| 15 | #include <linux/init.h> | ||
| 16 | #include <linux/module.h> | ||
| 17 | #include <linux/interrupt.h> | ||
| 18 | #include <linux/ioport.h> | ||
| 19 | #include <linux/serial_core.h> | ||
| 20 | #include <linux/platform_device.h> | ||
| 21 | #include <linux/io.h> | ||
| 22 | |||
| 23 | #include <mach/hardware.h> | ||
| 24 | #include <mach/map.h> | ||
| 25 | |||
| 26 | #include <asm/mach/map.h> | ||
| 27 | |||
| 28 | #include <plat/regs-serial.h> | ||
| 29 | |||
| 30 | #include <plat/cpu.h> | ||
| 31 | #include <plat/devs.h> | ||
| 32 | #include <plat/clock.h> | ||
| 33 | |||
| 34 | #include <plat/s5pc100.h> | ||
| 35 | |||
| 36 | /* table of supported CPUs */ | ||
| 37 | |||
| 38 | static const char name_s5pc100[] = "S5PC100"; | ||
| 39 | |||
| 40 | static struct cpu_table cpu_ids[] __initdata = { | ||
| 41 | { | ||
| 42 | .idcode = 0x43100000, | ||
| 43 | .idmask = 0xfffff000, | ||
| 44 | .map_io = s5pc100_map_io, | ||
| 45 | .init_clocks = s5pc100_init_clocks, | ||
| 46 | .init_uarts = s5pc100_init_uarts, | ||
| 47 | .init = s5pc100_init, | ||
| 48 | .name = name_s5pc100, | ||
| 49 | }, | ||
| 50 | }; | ||
| 51 | /* minimal IO mapping */ | ||
| 52 | |||
| 53 | /* see notes on uart map in arch/arm/mach-s5pc100/include/mach/debug-macro.S */ | ||
| 54 | #define UART_OFFS (S3C_PA_UART & 0xffff) | ||
| 55 | |||
| 56 | static struct map_desc s5pc1xx_iodesc[] __initdata = { | ||
| 57 | { | ||
| 58 | .virtual = (unsigned long)S5PC1XX_VA_CLK_OTHER, | ||
| 59 | .pfn = __phys_to_pfn(S5PC1XX_PA_CLK_OTHER), | ||
| 60 | .length = SZ_4K, | ||
| 61 | .type = MT_DEVICE, | ||
| 62 | }, { | ||
| 63 | .virtual = (unsigned long)S5PC1XX_VA_GPIO, | ||
| 64 | .pfn = __phys_to_pfn(S5PC100_PA_GPIO), | ||
| 65 | .length = SZ_4K, | ||
| 66 | .type = MT_DEVICE, | ||
| 67 | }, { | ||
| 68 | .virtual = (unsigned long)S5PC1XX_VA_CHIPID, | ||
| 69 | .pfn = __phys_to_pfn(S5PC1XX_PA_CHIPID), | ||
| 70 | .length = SZ_16, | ||
| 71 | .type = MT_DEVICE, | ||
| 72 | }, { | ||
| 73 | .virtual = (unsigned long)S5PC1XX_VA_CLK, | ||
| 74 | .pfn = __phys_to_pfn(S5PC1XX_PA_CLK), | ||
| 75 | .length = SZ_4K, | ||
| 76 | .type = MT_DEVICE, | ||
| 77 | }, { | ||
| 78 | .virtual = (unsigned long)S5PC1XX_VA_PWR, | ||
| 79 | .pfn = __phys_to_pfn(S5PC1XX_PA_PWR), | ||
| 80 | .length = SZ_4K, | ||
| 81 | .type = MT_DEVICE, | ||
| 82 | }, { | ||
| 83 | .virtual = (unsigned long)(S5PC1XX_VA_UART), | ||
| 84 | .pfn = __phys_to_pfn(S5PC1XX_PA_UART), | ||
| 85 | .length = SZ_4K, | ||
| 86 | .type = MT_DEVICE, | ||
| 87 | }, { | ||
| 88 | .virtual = (unsigned long)S5PC1XX_VA_VIC(0), | ||
| 89 | .pfn = __phys_to_pfn(S5PC1XX_PA_VIC(0)), | ||
| 90 | .length = SZ_4K, | ||
| 91 | .type = MT_DEVICE, | ||
| 92 | }, { | ||
| 93 | .virtual = (unsigned long)S5PC1XX_VA_VIC(1), | ||
| 94 | .pfn = __phys_to_pfn(S5PC1XX_PA_VIC(1)), | ||
| 95 | .length = SZ_4K, | ||
| 96 | .type = MT_DEVICE, | ||
| 97 | }, { | ||
| 98 | .virtual = (unsigned long)S5PC1XX_VA_VIC(2), | ||
| 99 | .pfn = __phys_to_pfn(S5PC1XX_PA_VIC(2)), | ||
| 100 | .length = SZ_4K, | ||
| 101 | .type = MT_DEVICE, | ||
| 102 | }, { | ||
| 103 | .virtual = (unsigned long)S5PC1XX_VA_TIMER, | ||
| 104 | .pfn = __phys_to_pfn(S5PC1XX_PA_TIMER), | ||
| 105 | .length = SZ_256, | ||
| 106 | .type = MT_DEVICE, | ||
| 107 | }, | ||
| 108 | }; | ||
| 109 | |||
| 110 | /* read cpu identification code */ | ||
| 111 | |||
| 112 | void __init s5pc1xx_init_io(struct map_desc *mach_desc, int size) | ||
| 113 | { | ||
| 114 | unsigned long idcode; | ||
| 115 | |||
| 116 | /* initialise the io descriptors we need for initialisation */ | ||
| 117 | iotable_init(s5pc1xx_iodesc, ARRAY_SIZE(s5pc1xx_iodesc)); | ||
| 118 | iotable_init(mach_desc, size); | ||
| 119 | |||
| 120 | idcode = __raw_readl(S5PC1XX_VA_CHIPID); | ||
| 121 | s3c_init_cpu(idcode, cpu_ids, ARRAY_SIZE(cpu_ids)); | ||
| 122 | } | ||
diff --git a/arch/arm/plat-s5pc1xx/dev-uart.c b/arch/arm/plat-s5pc1xx/dev-uart.c deleted file mode 100644 index 586c95c60bfe..000000000000 --- a/arch/arm/plat-s5pc1xx/dev-uart.c +++ /dev/null | |||
| @@ -1,145 +0,0 @@ | |||
| 1 | /* linux/arch/arm/plat-s5pc1xx/dev-uart.c | ||
| 2 | * | ||
| 3 | * Copyright 2009 Samsung Electronics Co. | ||
| 4 | * Byungho Min <bhmin@samsung.com> | ||
| 5 | * | ||
| 6 | * Based on plat-s3c64xx/dev-uart.c | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License version 2 as | ||
| 10 | * published by the Free Software Foundation. | ||
| 11 | * | ||
| 12 | */ | ||
| 13 | |||
| 14 | #include <linux/kernel.h> | ||
| 15 | #include <linux/types.h> | ||
| 16 | #include <linux/interrupt.h> | ||
| 17 | #include <linux/list.h> | ||
| 18 | #include <linux/platform_device.h> | ||
| 19 | |||
| 20 | #include <asm/mach/arch.h> | ||
| 21 | #include <asm/mach/irq.h> | ||
| 22 | #include <mach/hardware.h> | ||
| 23 | #include <mach/map.h> | ||
| 24 | |||
| 25 | #include <plat/devs.h> | ||
| 26 | |||
| 27 | /* Serial port registrations */ | ||
| 28 | |||
| 29 | /* 64xx uarts are closer together */ | ||
| 30 | |||
| 31 | static struct resource s5pc1xx_uart0_resource[] = { | ||
| 32 | [0] = { | ||
| 33 | .start = S3C_PA_UART0, | ||
| 34 | .end = S3C_PA_UART0 + 0x100, | ||
| 35 | .flags = IORESOURCE_MEM, | ||
| 36 | }, | ||
| 37 | [1] = { | ||
| 38 | .start = IRQ_S3CUART_RX0, | ||
| 39 | .end = IRQ_S3CUART_RX0, | ||
| 40 | .flags = IORESOURCE_IRQ, | ||
| 41 | }, | ||
| 42 | [2] = { | ||
| 43 | .start = IRQ_S3CUART_TX0, | ||
| 44 | .end = IRQ_S3CUART_TX0, | ||
| 45 | .flags = IORESOURCE_IRQ, | ||
| 46 | |||
| 47 | }, | ||
| 48 | [3] = { | ||
| 49 | .start = IRQ_S3CUART_ERR0, | ||
| 50 | .end = IRQ_S3CUART_ERR0, | ||
| 51 | .flags = IORESOURCE_IRQ, | ||
| 52 | } | ||
| 53 | }; | ||
| 54 | |||
| 55 | static struct resource s5pc1xx_uart1_resource[] = { | ||
| 56 | [0] = { | ||
| 57 | .start = S3C_PA_UART1, | ||
| 58 | .end = S3C_PA_UART1 + 0x100, | ||
| 59 | .flags = IORESOURCE_MEM, | ||
| 60 | }, | ||
| 61 | [1] = { | ||
| 62 | .start = IRQ_S3CUART_RX1, | ||
| 63 | .end = IRQ_S3CUART_RX1, | ||
| 64 | .flags = IORESOURCE_IRQ, | ||
| 65 | }, | ||
| 66 | [2] = { | ||
| 67 | .start = IRQ_S3CUART_TX1, | ||
| 68 | .end = IRQ_S3CUART_TX1, | ||
| 69 | .flags = IORESOURCE_IRQ, | ||
| 70 | |||
| 71 | }, | ||
| 72 | [3] = { | ||
| 73 | .start = IRQ_S3CUART_ERR1, | ||
| 74 | .end = IRQ_S3CUART_ERR1, | ||
| 75 | .flags = IORESOURCE_IRQ, | ||
| 76 | }, | ||
| 77 | }; | ||
| 78 | |||
| 79 | static struct resource s5pc1xx_uart2_resource[] = { | ||
| 80 | [0] = { | ||
| 81 | .start = S3C_PA_UART2, | ||
| 82 | .end = S3C_PA_UART2 + 0x100, | ||
| 83 | .flags = IORESOURCE_MEM, | ||
| 84 | }, | ||
| 85 | [1] = { | ||
| 86 | .start = IRQ_S3CUART_RX2, | ||
| 87 | .end = IRQ_S3CUART_RX2, | ||
| 88 | .flags = IORESOURCE_IRQ, | ||
| 89 | }, | ||
| 90 | [2] = { | ||
| 91 | .start = IRQ_S3CUART_TX2, | ||
| 92 | .end = IRQ_S3CUART_TX2, | ||
| 93 | .flags = IORESOURCE_IRQ, | ||
| 94 | |||
| 95 | }, | ||
| 96 | [3] = { | ||
| 97 | .start = IRQ_S3CUART_ERR2, | ||
| 98 | .end = IRQ_S3CUART_ERR2, | ||
| 99 | .flags = IORESOURCE_IRQ, | ||
| 100 | }, | ||
| 101 | }; | ||
| 102 | |||
| 103 | static struct resource s5pc1xx_uart3_resource[] = { | ||
| 104 | [0] = { | ||
| 105 | .start = S3C_PA_UART3, | ||
| 106 | .end = S3C_PA_UART3 + 0x100, | ||
| 107 | .flags = IORESOURCE_MEM, | ||
| 108 | }, | ||
| 109 | [1] = { | ||
| 110 | .start = IRQ_S3CUART_RX3, | ||
| 111 | .end = IRQ_S3CUART_RX3, | ||
| 112 | .flags = IORESOURCE_IRQ, | ||
| 113 | }, | ||
| 114 | [2] = { | ||
| 115 | .start = IRQ_S3CUART_TX3, | ||
| 116 | .end = IRQ_S3CUART_TX3, | ||
| 117 | .flags = IORESOURCE_IRQ, | ||
| 118 | |||
| 119 | }, | ||
| 120 | [3] = { | ||
| 121 | .start = IRQ_S3CUART_ERR3, | ||
| 122 | .end = IRQ_S3CUART_ERR3, | ||
| 123 | .flags = IORESOURCE_IRQ, | ||
| 124 | }, | ||
| 125 | }; | ||
| 126 | |||
| 127 | |||
| 128 | struct s3c24xx_uart_resources s5pc1xx_uart_resources[] __initdata = { | ||
| 129 | [0] = { | ||
| 130 | .resources = s5pc1xx_uart0_resource, | ||
| 131 | .nr_resources = ARRAY_SIZE(s5pc1xx_uart0_resource), | ||
| 132 | }, | ||
| 133 | [1] = { | ||
| 134 | .resources = s5pc1xx_uart1_resource, | ||
| 135 | .nr_resources = ARRAY_SIZE(s5pc1xx_uart1_resource), | ||
| 136 | }, | ||
| 137 | [2] = { | ||
| 138 | .resources = s5pc1xx_uart2_resource, | ||
| 139 | .nr_resources = ARRAY_SIZE(s5pc1xx_uart2_resource), | ||
| 140 | }, | ||
| 141 | [3] = { | ||
| 142 | .resources = s5pc1xx_uart3_resource, | ||
| 143 | .nr_resources = ARRAY_SIZE(s5pc1xx_uart3_resource), | ||
| 144 | }, | ||
| 145 | }; | ||
diff --git a/arch/arm/plat-s5pc1xx/include/plat/gpio-ext.h b/arch/arm/plat-s5pc1xx/include/plat/gpio-ext.h deleted file mode 100644 index 33ad267e8477..000000000000 --- a/arch/arm/plat-s5pc1xx/include/plat/gpio-ext.h +++ /dev/null | |||
| @@ -1,44 +0,0 @@ | |||
| 1 | /* linux/arch/arm/plat-s5pc1xx/include/plat/gpio-eint.h | ||
| 2 | * | ||
| 3 | * Copyright 2009 Samsung Electronics Co. | ||
| 4 | * | ||
| 5 | * External Interrupt (GPH0 ~ GPH3) control register definitions | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License version 2 as | ||
| 9 | * published by the Free Software Foundation. | ||
| 10 | */ | ||
| 11 | |||
| 12 | #define S5PC1XX_WKUP_INT_CON0_7 (S5PC1XX_EINT_BASE + 0x0) | ||
| 13 | #define S5PC1XX_WKUP_INT_CON8_15 (S5PC1XX_EINT_BASE + 0x4) | ||
| 14 | #define S5PC1XX_WKUP_INT_CON16_23 (S5PC1XX_EINT_BASE + 0x8) | ||
| 15 | #define S5PC1XX_WKUP_INT_CON24_31 (S5PC1XX_EINT_BASE + 0xC) | ||
| 16 | #define S5PC1XX_WKUP_INT_CON(x) (S5PC1XX_WKUP_INT_CON0_7 + (x * 0x4)) | ||
| 17 | |||
| 18 | #define S5PC1XX_WKUP_INT_FLTCON0_3 (S5PC1XX_EINT_BASE + 0x80) | ||
| 19 | #define S5PC1XX_WKUP_INT_FLTCON4_7 (S5PC1XX_EINT_BASE + 0x84) | ||
| 20 | #define S5PC1XX_WKUP_INT_FLTCON8_11 (S5PC1XX_EINT_BASE + 0x88) | ||
| 21 | #define S5PC1XX_WKUP_INT_FLTCON12_15 (S5PC1XX_EINT_BASE + 0x8C) | ||
| 22 | #define S5PC1XX_WKUP_INT_FLTCON16_19 (S5PC1XX_EINT_BASE + 0x90) | ||
| 23 | #define S5PC1XX_WKUP_INT_FLTCON20_23 (S5PC1XX_EINT_BASE + 0x94) | ||
| 24 | #define S5PC1XX_WKUP_INT_FLTCON24_27 (S5PC1XX_EINT_BASE + 0x98) | ||
| 25 | #define S5PC1XX_WKUP_INT_FLTCON28_31 (S5PC1XX_EINT_BASE + 0x9C) | ||
| 26 | #define S5PC1XX_WKUP_INT_FLTCON(x) (S5PC1XX_WKUP_INT_FLTCON0_3 + (x * 0x4)) | ||
| 27 | |||
| 28 | #define S5PC1XX_WKUP_INT_MASK0_7 (S5PC1XX_EINT_BASE + 0x100) | ||
| 29 | #define S5PC1XX_WKUP_INT_MASK8_15 (S5PC1XX_EINT_BASE + 0x104) | ||
| 30 | #define S5PC1XX_WKUP_INT_MASK16_23 (S5PC1XX_EINT_BASE + 0x108) | ||
| 31 | #define S5PC1XX_WKUP_INT_MASK24_31 (S5PC1XX_EINT_BASE + 0x10C) | ||
| 32 | #define S5PC1XX_WKUP_INT_MASK(x) (S5PC1XX_WKUP_INT_MASK0_7 + (x * 0x4)) | ||
| 33 | |||
| 34 | #define S5PC1XX_WKUP_INT_PEND0_7 (S5PC1XX_EINT_BASE + 0x140) | ||
| 35 | #define S5PC1XX_WKUP_INT_PEND8_15 (S5PC1XX_EINT_BASE + 0x144) | ||
| 36 | #define S5PC1XX_WKUP_INT_PEND16_23 (S5PC1XX_EINT_BASE + 0x148) | ||
| 37 | #define S5PC1XX_WKUP_INT_PEND24_31 (S5PC1XX_EINT_BASE + 0x14C) | ||
| 38 | #define S5PC1XX_WKUP_INT_PEND(x) (S5PC1XX_WKUP_INT_PEND0_7 + (x * 0x4)) | ||
| 39 | |||
| 40 | #define S5PC1XX_WKUP_INT_LOWLEV (0x00) | ||
| 41 | #define S5PC1XX_WKUP_INT_HILEV (0x01) | ||
| 42 | #define S5PC1XX_WKUP_INT_FALLEDGE (0x02) | ||
| 43 | #define S5PC1XX_WKUP_INT_RISEEDGE (0x03) | ||
| 44 | #define S5PC1XX_WKUP_INT_BOTHEDGE (0x04) | ||
diff --git a/arch/arm/plat-s5pc1xx/include/plat/irqs.h b/arch/arm/plat-s5pc1xx/include/plat/irqs.h deleted file mode 100644 index 409c804315e8..000000000000 --- a/arch/arm/plat-s5pc1xx/include/plat/irqs.h +++ /dev/null | |||
| @@ -1,198 +0,0 @@ | |||
| 1 | /* linux/arch/arm/plat-s5pc1xx/include/plat/irqs.h | ||
| 2 | * | ||
| 3 | * Copyright 2009 Samsung Electronics Co. | ||
| 4 | * Byungho Min <bhmin@samsung.com> | ||
| 5 | * | ||
| 6 | * S5PC1XX - Common IRQ support | ||
| 7 | * | ||
| 8 | * Based on plat-s3c64xx/include/plat/irqs.h | ||
| 9 | */ | ||
| 10 | |||
| 11 | #ifndef __ASM_PLAT_S5PC1XX_IRQS_H | ||
| 12 | #define __ASM_PLAT_S5PC1XX_IRQS_H __FILE__ | ||
| 13 | |||
| 14 | /* we keep the first set of CPU IRQs out of the range of | ||
| 15 | * the ISA space, so that the PC104 has them to itself | ||
| 16 | * and we don't end up having to do horrible things to the | ||
| 17 | * standard ISA drivers.... | ||
| 18 | * | ||
| 19 | * note, since we're using the VICs, our start must be a | ||
| 20 | * mulitple of 32 to allow the common code to work | ||
| 21 | */ | ||
| 22 | |||
| 23 | #define S3C_IRQ_OFFSET (32) | ||
| 24 | |||
| 25 | #define S3C_IRQ(x) ((x) + S3C_IRQ_OFFSET) | ||
| 26 | |||
| 27 | #define S3C_VIC0_BASE S3C_IRQ(0) | ||
| 28 | #define S3C_VIC1_BASE S3C_IRQ(32) | ||
| 29 | #define S3C_VIC2_BASE S3C_IRQ(64) | ||
| 30 | |||
| 31 | /* UART interrupts, each UART has 4 intterupts per channel so | ||
| 32 | * use the space between the ISA and S3C main interrupts. Note, these | ||
| 33 | * are not in the same order as the S3C24XX series! */ | ||
| 34 | |||
| 35 | #define IRQ_S3CUART_BASE0 (16) | ||
| 36 | #define IRQ_S3CUART_BASE1 (20) | ||
| 37 | #define IRQ_S3CUART_BASE2 (24) | ||
| 38 | #define IRQ_S3CUART_BASE3 (28) | ||
| 39 | |||
| 40 | #define UART_IRQ_RXD (0) | ||
| 41 | #define UART_IRQ_ERR (1) | ||
| 42 | #define UART_IRQ_TXD (2) | ||
| 43 | #define UART_IRQ_MODEM (3) | ||
| 44 | |||
| 45 | #define IRQ_S3CUART_RX0 (IRQ_S3CUART_BASE0 + UART_IRQ_RXD) | ||
| 46 | #define IRQ_S3CUART_TX0 (IRQ_S3CUART_BASE0 + UART_IRQ_TXD) | ||
| 47 | #define IRQ_S3CUART_ERR0 (IRQ_S3CUART_BASE0 + UART_IRQ_ERR) | ||
| 48 | |||
| 49 | #define IRQ_S3CUART_RX1 (IRQ_S3CUART_BASE1 + UART_IRQ_RXD) | ||
| 50 | #define IRQ_S3CUART_TX1 (IRQ_S3CUART_BASE1 + UART_IRQ_TXD) | ||
| 51 | #define IRQ_S3CUART_ERR1 (IRQ_S3CUART_BASE1 + UART_IRQ_ERR) | ||
| 52 | |||
| 53 | #define IRQ_S3CUART_RX2 (IRQ_S3CUART_BASE2 + UART_IRQ_RXD) | ||
| 54 | #define IRQ_S3CUART_TX2 (IRQ_S3CUART_BASE2 + UART_IRQ_TXD) | ||
| 55 | #define IRQ_S3CUART_ERR2 (IRQ_S3CUART_BASE2 + UART_IRQ_ERR) | ||
| 56 | |||
| 57 | #define IRQ_S3CUART_RX3 (IRQ_S3CUART_BASE3 + UART_IRQ_RXD) | ||
| 58 | #define IRQ_S3CUART_TX3 (IRQ_S3CUART_BASE3 + UART_IRQ_TXD) | ||
| 59 | #define IRQ_S3CUART_ERR3 (IRQ_S3CUART_BASE3 + UART_IRQ_ERR) | ||
| 60 | |||
| 61 | /* VIC based IRQs */ | ||
| 62 | |||
| 63 | #define S5PC1XX_IRQ_VIC0(x) (S3C_VIC0_BASE + (x)) | ||
| 64 | #define S5PC1XX_IRQ_VIC1(x) (S3C_VIC1_BASE + (x)) | ||
| 65 | #define S5PC1XX_IRQ_VIC2(x) (S3C_VIC2_BASE + (x)) | ||
| 66 | |||
| 67 | /* | ||
| 68 | * VIC0: system, DMA, timer | ||
| 69 | */ | ||
| 70 | #define IRQ_EINT0 S5PC1XX_IRQ_VIC0(0) | ||
| 71 | #define IRQ_EINT1 S5PC1XX_IRQ_VIC0(1) | ||
| 72 | #define IRQ_EINT2 S5PC1XX_IRQ_VIC0(2) | ||
| 73 | #define IRQ_EINT3 S5PC1XX_IRQ_VIC0(3) | ||
| 74 | #define IRQ_EINT4 S5PC1XX_IRQ_VIC0(4) | ||
| 75 | #define IRQ_EINT5 S5PC1XX_IRQ_VIC0(5) | ||
| 76 | #define IRQ_EINT6 S5PC1XX_IRQ_VIC0(6) | ||
| 77 | #define IRQ_EINT7 S5PC1XX_IRQ_VIC0(7) | ||
| 78 | #define IRQ_EINT8 S5PC1XX_IRQ_VIC0(8) | ||
| 79 | #define IRQ_EINT9 S5PC1XX_IRQ_VIC0(9) | ||
| 80 | #define IRQ_EINT10 S5PC1XX_IRQ_VIC0(10) | ||
| 81 | #define IRQ_EINT11 S5PC1XX_IRQ_VIC0(11) | ||
| 82 | #define IRQ_EINT12 S5PC1XX_IRQ_VIC0(12) | ||
| 83 | #define IRQ_EINT13 S5PC1XX_IRQ_VIC0(13) | ||
| 84 | #define IRQ_EINT14 S5PC1XX_IRQ_VIC0(14) | ||
| 85 | #define IRQ_EINT15 S5PC1XX_IRQ_VIC0(15) | ||
| 86 | #define IRQ_EINT16_31 S5PC1XX_IRQ_VIC0(16) | ||
| 87 | #define IRQ_BATF S5PC1XX_IRQ_VIC0(17) | ||
| 88 | #define IRQ_MDMA S5PC1XX_IRQ_VIC0(18) | ||
| 89 | #define IRQ_PDMA0 S5PC1XX_IRQ_VIC0(19) | ||
| 90 | #define IRQ_PDMA1 S5PC1XX_IRQ_VIC0(20) | ||
| 91 | #define IRQ_TIMER0_VIC S5PC1XX_IRQ_VIC0(21) | ||
| 92 | #define IRQ_TIMER1_VIC S5PC1XX_IRQ_VIC0(22) | ||
| 93 | #define IRQ_TIMER2_VIC S5PC1XX_IRQ_VIC0(23) | ||
| 94 | #define IRQ_TIMER3_VIC S5PC1XX_IRQ_VIC0(24) | ||
| 95 | #define IRQ_TIMER4_VIC S5PC1XX_IRQ_VIC0(25) | ||
| 96 | #define IRQ_SYSTIMER S5PC1XX_IRQ_VIC0(26) | ||
| 97 | #define IRQ_WDT S5PC1XX_IRQ_VIC0(27) | ||
| 98 | #define IRQ_RTC_ALARM S5PC1XX_IRQ_VIC0(28) | ||
| 99 | #define IRQ_RTC_TIC S5PC1XX_IRQ_VIC0(29) | ||
| 100 | #define IRQ_GPIOINT S5PC1XX_IRQ_VIC0(30) | ||
| 101 | |||
| 102 | /* | ||
| 103 | * VIC1: ARM, power, memory, connectivity | ||
| 104 | */ | ||
| 105 | #define IRQ_CORTEX0 S5PC1XX_IRQ_VIC1(0) | ||
| 106 | #define IRQ_CORTEX1 S5PC1XX_IRQ_VIC1(1) | ||
| 107 | #define IRQ_CORTEX2 S5PC1XX_IRQ_VIC1(2) | ||
| 108 | #define IRQ_CORTEX3 S5PC1XX_IRQ_VIC1(3) | ||
| 109 | #define IRQ_CORTEX4 S5PC1XX_IRQ_VIC1(4) | ||
| 110 | #define IRQ_IEMAPC S5PC1XX_IRQ_VIC1(5) | ||
| 111 | #define IRQ_IEMIEC S5PC1XX_IRQ_VIC1(6) | ||
| 112 | #define IRQ_ONENAND S5PC1XX_IRQ_VIC1(7) | ||
| 113 | #define IRQ_NFC S5PC1XX_IRQ_VIC1(8) | ||
| 114 | #define IRQ_CFC S5PC1XX_IRQ_VIC1(9) | ||
| 115 | #define IRQ_UART0 S5PC1XX_IRQ_VIC1(10) | ||
| 116 | #define IRQ_UART1 S5PC1XX_IRQ_VIC1(11) | ||
| 117 | #define IRQ_UART2 S5PC1XX_IRQ_VIC1(12) | ||
| 118 | #define IRQ_UART3 S5PC1XX_IRQ_VIC1(13) | ||
| 119 | #define IRQ_IIC S5PC1XX_IRQ_VIC1(14) | ||
| 120 | #define IRQ_SPI0 S5PC1XX_IRQ_VIC1(15) | ||
| 121 | #define IRQ_SPI1 S5PC1XX_IRQ_VIC1(16) | ||
| 122 | #define IRQ_SPI2 S5PC1XX_IRQ_VIC1(17) | ||
| 123 | #define IRQ_IRDA S5PC1XX_IRQ_VIC1(18) | ||
| 124 | #define IRQ_CAN0 S5PC1XX_IRQ_VIC1(19) | ||
| 125 | #define IRQ_CAN1 S5PC1XX_IRQ_VIC1(20) | ||
| 126 | #define IRQ_HSIRX S5PC1XX_IRQ_VIC1(21) | ||
| 127 | #define IRQ_HSITX S5PC1XX_IRQ_VIC1(22) | ||
| 128 | #define IRQ_UHOST S5PC1XX_IRQ_VIC1(23) | ||
| 129 | #define IRQ_OTG S5PC1XX_IRQ_VIC1(24) | ||
| 130 | #define IRQ_MSM S5PC1XX_IRQ_VIC1(25) | ||
| 131 | #define IRQ_HSMMC0 S5PC1XX_IRQ_VIC1(26) | ||
| 132 | #define IRQ_HSMMC1 S5PC1XX_IRQ_VIC1(27) | ||
| 133 | #define IRQ_HSMMC2 S5PC1XX_IRQ_VIC1(28) | ||
| 134 | #define IRQ_MIPICSI S5PC1XX_IRQ_VIC1(29) | ||
| 135 | #define IRQ_MIPIDSI S5PC1XX_IRQ_VIC1(30) | ||
| 136 | |||
| 137 | /* | ||
| 138 | * VIC2: multimedia, audio, security | ||
| 139 | */ | ||
| 140 | #define IRQ_LCD0 S5PC1XX_IRQ_VIC2(0) | ||
| 141 | #define IRQ_LCD1 S5PC1XX_IRQ_VIC2(1) | ||
| 142 | #define IRQ_LCD2 S5PC1XX_IRQ_VIC2(2) | ||
| 143 | #define IRQ_LCD3 S5PC1XX_IRQ_VIC2(3) | ||
| 144 | #define IRQ_ROTATOR S5PC1XX_IRQ_VIC2(4) | ||
| 145 | #define IRQ_FIMC0 S5PC1XX_IRQ_VIC2(5) | ||
| 146 | #define IRQ_FIMC1 S5PC1XX_IRQ_VIC2(6) | ||
| 147 | #define IRQ_FIMC2 S5PC1XX_IRQ_VIC2(7) | ||
| 148 | #define IRQ_JPEG S5PC1XX_IRQ_VIC2(8) | ||
| 149 | #define IRQ_2D S5PC1XX_IRQ_VIC2(9) | ||
| 150 | #define IRQ_3D S5PC1XX_IRQ_VIC2(10) | ||
| 151 | #define IRQ_MIXER S5PC1XX_IRQ_VIC2(11) | ||
| 152 | #define IRQ_HDMI S5PC1XX_IRQ_VIC2(12) | ||
| 153 | #define IRQ_IIC1 S5PC1XX_IRQ_VIC2(13) | ||
| 154 | #define IRQ_MFC S5PC1XX_IRQ_VIC2(14) | ||
| 155 | #define IRQ_TVENC S5PC1XX_IRQ_VIC2(15) | ||
| 156 | #define IRQ_I2S0 S5PC1XX_IRQ_VIC2(16) | ||
| 157 | #define IRQ_I2S1 S5PC1XX_IRQ_VIC2(17) | ||
| 158 | #define IRQ_I2S2 S5PC1XX_IRQ_VIC2(18) | ||
| 159 | #define IRQ_AC97 S5PC1XX_IRQ_VIC2(19) | ||
| 160 | #define IRQ_PCM0 S5PC1XX_IRQ_VIC2(20) | ||
| 161 | #define IRQ_PCM1 S5PC1XX_IRQ_VIC2(21) | ||
| 162 | #define IRQ_SPDIF S5PC1XX_IRQ_VIC2(22) | ||
| 163 | #define IRQ_ADC S5PC1XX_IRQ_VIC2(23) | ||
| 164 | #define IRQ_PENDN S5PC1XX_IRQ_VIC2(24) | ||
| 165 | #define IRQ_TC IRQ_PENDN | ||
| 166 | #define IRQ_KEYPAD S5PC1XX_IRQ_VIC2(25) | ||
| 167 | #define IRQ_CG S5PC1XX_IRQ_VIC2(26) | ||
| 168 | #define IRQ_SEC S5PC1XX_IRQ_VIC2(27) | ||
| 169 | #define IRQ_SECRX S5PC1XX_IRQ_VIC2(28) | ||
| 170 | #define IRQ_SECTX S5PC1XX_IRQ_VIC2(29) | ||
| 171 | #define IRQ_SDMIRQ S5PC1XX_IRQ_VIC2(30) | ||
| 172 | #define IRQ_SDMFIQ S5PC1XX_IRQ_VIC2(31) | ||
| 173 | |||
| 174 | #define IRQ_TIMER(x) (IRQ_SDMFIQ + 1 + (x)) | ||
| 175 | #define IRQ_TIMER0 IRQ_TIMER(0) | ||
| 176 | #define IRQ_TIMER1 IRQ_TIMER(1) | ||
| 177 | #define IRQ_TIMER2 IRQ_TIMER(2) | ||
| 178 | #define IRQ_TIMER3 IRQ_TIMER(3) | ||
| 179 | #define IRQ_TIMER4 IRQ_TIMER(4) | ||
| 180 | |||
| 181 | /* External interrupt */ | ||
| 182 | #define S3C_IRQ_EINT_BASE (IRQ_SDMFIQ + 6) | ||
| 183 | |||
| 184 | #define S3C_EINT(x) (S3C_IRQ_EINT_BASE + (x - 16)) | ||
| 185 | #define IRQ_EINT(x) (x < 16 ? IRQ_EINT0 + x : S3C_EINT(x)) | ||
| 186 | #define IRQ_EINT_BIT(x) (x < IRQ_EINT16_31 ? x - IRQ_EINT0 : x - S3C_EINT(0)) | ||
| 187 | |||
| 188 | /* GPIO interrupt */ | ||
| 189 | #define S3C_IRQ_GPIO_BASE (IRQ_EINT(31) + 1) | ||
| 190 | #define S3C_IRQ_GPIO(x) (S3C_IRQ_GPIO_BASE + (x)) | ||
| 191 | |||
| 192 | /* | ||
| 193 | * Until MP04 Groups -> 40 (exactly 39) Groups * 8 ~= 320 GPIOs | ||
| 194 | */ | ||
| 195 | #define NR_IRQS (S3C_IRQ_GPIO(320) + 1) | ||
| 196 | |||
| 197 | #endif /* __ASM_PLAT_S5PC1XX_IRQS_H */ | ||
| 198 | |||
diff --git a/arch/arm/plat-s5pc1xx/include/plat/pll.h b/arch/arm/plat-s5pc1xx/include/plat/pll.h deleted file mode 100644 index 21afef1573e7..000000000000 --- a/arch/arm/plat-s5pc1xx/include/plat/pll.h +++ /dev/null | |||
| @@ -1,38 +0,0 @@ | |||
| 1 | /* arch/arm/plat-s5pc1xx/include/plat/pll.h | ||
| 2 | * | ||
| 3 | * Copyright 2009 Samsung Electronics Co. | ||
| 4 | * Byungho Min <bhmin@samsung.com> | ||
| 5 | * | ||
| 6 | * S5PC1XX PLL code | ||
| 7 | * | ||
| 8 | * Based on plat-s3c64xx/include/plat/pll.h | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License version 2 as | ||
| 12 | * published by the Free Software Foundation. | ||
| 13 | */ | ||
| 14 | |||
| 15 | #define S5P_PLL_MDIV_MASK ((1 << (25-16+1)) - 1) | ||
| 16 | #define S5P_PLL_PDIV_MASK ((1 << (13-8+1)) - 1) | ||
| 17 | #define S5P_PLL_SDIV_MASK ((1 << (2-0+1)) - 1) | ||
| 18 | #define S5P_PLL_MDIV_SHIFT (16) | ||
| 19 | #define S5P_PLL_PDIV_SHIFT (8) | ||
| 20 | #define S5P_PLL_SDIV_SHIFT (0) | ||
| 21 | |||
| 22 | #include <asm/div64.h> | ||
| 23 | |||
| 24 | static inline unsigned long s5pc1xx_get_pll(unsigned long baseclk, | ||
| 25 | u32 pllcon) | ||
| 26 | { | ||
| 27 | u32 mdiv, pdiv, sdiv; | ||
| 28 | u64 fvco = baseclk; | ||
| 29 | |||
| 30 | mdiv = (pllcon >> S5P_PLL_MDIV_SHIFT) & S5P_PLL_MDIV_MASK; | ||
| 31 | pdiv = (pllcon >> S5P_PLL_PDIV_SHIFT) & S5P_PLL_PDIV_MASK; | ||
| 32 | sdiv = (pllcon >> S5P_PLL_SDIV_SHIFT) & S5P_PLL_SDIV_MASK; | ||
| 33 | |||
| 34 | fvco *= mdiv; | ||
| 35 | do_div(fvco, (pdiv << sdiv)); | ||
| 36 | |||
| 37 | return (unsigned long)fvco; | ||
| 38 | } | ||
diff --git a/arch/arm/plat-s5pc1xx/include/plat/regs-clock.h b/arch/arm/plat-s5pc1xx/include/plat/regs-clock.h deleted file mode 100644 index 24dec4e52538..000000000000 --- a/arch/arm/plat-s5pc1xx/include/plat/regs-clock.h +++ /dev/null | |||
| @@ -1,252 +0,0 @@ | |||
| 1 | /* arch/arm/plat-s5pc1xx/include/plat/regs-clock.h | ||
| 2 | * | ||
| 3 | * Copyright 2009 Samsung Electronics Co. | ||
| 4 | * Byungho Min <bhmin@samsung.com> | ||
| 5 | * | ||
| 6 | * S5PC1XX clock register definitions | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License version 2 as | ||
| 10 | * published by the Free Software Foundation. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #ifndef __PLAT_REGS_CLOCK_H | ||
| 14 | #define __PLAT_REGS_CLOCK_H __FILE__ | ||
| 15 | |||
| 16 | #define S5PC100_CLKREG(x) (S5PC1XX_VA_CLK + (x)) | ||
| 17 | #define S5PC100_CLKREG_OTHER(x) (S5PC1XX_VA_CLK_OTHER + (x)) | ||
| 18 | |||
| 19 | /* s5pc100 register for clock */ | ||
| 20 | #define S5PC100_APLL_LOCK S5PC100_CLKREG(0x00) | ||
| 21 | #define S5PC100_MPLL_LOCK S5PC100_CLKREG(0x04) | ||
| 22 | #define S5PC100_EPLL_LOCK S5PC100_CLKREG(0x08) | ||
| 23 | #define S5PC100_HPLL_LOCK S5PC100_CLKREG(0x0C) | ||
| 24 | |||
| 25 | #define S5PC100_APLL_CON S5PC100_CLKREG(0x100) | ||
| 26 | #define S5PC100_MPLL_CON S5PC100_CLKREG(0x104) | ||
| 27 | #define S5PC100_EPLL_CON S5PC100_CLKREG(0x108) | ||
| 28 | #define S5PC100_HPLL_CON S5PC100_CLKREG(0x10C) | ||
| 29 | |||
| 30 | #define S5PC100_CLKSRC0 S5PC100_CLKREG(0x200) | ||
| 31 | #define S5PC100_CLKSRC1 S5PC100_CLKREG(0x204) | ||
| 32 | #define S5PC100_CLKSRC2 S5PC100_CLKREG(0x208) | ||
| 33 | #define S5PC100_CLKSRC3 S5PC100_CLKREG(0x20C) | ||
| 34 | |||
| 35 | #define S5PC100_CLKDIV0 S5PC100_CLKREG(0x300) | ||
| 36 | #define S5PC100_CLKDIV1 S5PC100_CLKREG(0x304) | ||
| 37 | #define S5PC100_CLKDIV2 S5PC100_CLKREG(0x308) | ||
| 38 | #define S5PC100_CLKDIV3 S5PC100_CLKREG(0x30C) | ||
| 39 | #define S5PC100_CLKDIV4 S5PC100_CLKREG(0x310) | ||
| 40 | |||
| 41 | #define S5PC100_CLK_OUT S5PC100_CLKREG(0x400) | ||
| 42 | |||
| 43 | #define S5PC100_CLKGATE_D00 S5PC100_CLKREG(0x500) | ||
| 44 | #define S5PC100_CLKGATE_D01 S5PC100_CLKREG(0x504) | ||
| 45 | #define S5PC100_CLKGATE_D02 S5PC100_CLKREG(0x508) | ||
| 46 | |||
| 47 | #define S5PC100_CLKGATE_D10 S5PC100_CLKREG(0x520) | ||
| 48 | #define S5PC100_CLKGATE_D11 S5PC100_CLKREG(0x524) | ||
| 49 | #define S5PC100_CLKGATE_D12 S5PC100_CLKREG(0x528) | ||
| 50 | #define S5PC100_CLKGATE_D13 S5PC100_CLKREG(0x52C) | ||
| 51 | #define S5PC100_CLKGATE_D14 S5PC100_CLKREG(0x530) | ||
| 52 | #define S5PC100_CLKGATE_D15 S5PC100_CLKREG(0x534) | ||
| 53 | |||
| 54 | #define S5PC100_CLKGATE_D20 S5PC100_CLKREG(0x540) | ||
| 55 | |||
| 56 | #define S5PC100_SCLKGATE0 S5PC100_CLKREG(0x560) | ||
| 57 | #define S5PC100_SCLKGATE1 S5PC100_CLKREG(0x564) | ||
| 58 | |||
| 59 | /* EPLL_CON */ | ||
| 60 | #define S5PC100_EPLL_EN (1<<31) | ||
| 61 | #define S5PC100_EPLL_MASK 0xffffffff | ||
| 62 | #define S5PC100_EPLLVAL(_m, _p, _s) ((_m) << 16 | ((_p) << 8) | ((_s))) | ||
| 63 | |||
| 64 | /* CLKSRC0..CLKSRC3 -> mostly removed due to clksrc updates */ | ||
| 65 | #define S5PC100_CLKSRC1_CLK48M_MASK (0x1<<24) | ||
| 66 | #define S5PC100_CLKSRC1_CLK48M_SHIFT (24) | ||
| 67 | |||
| 68 | /* CLKDIV0 */ | ||
| 69 | #define S5PC100_CLKDIV0_APLL_MASK (0x1<<0) | ||
| 70 | #define S5PC100_CLKDIV0_APLL_SHIFT (0) | ||
| 71 | #define S5PC100_CLKDIV0_ARM_MASK (0x7<<4) | ||
| 72 | #define S5PC100_CLKDIV0_ARM_SHIFT (4) | ||
| 73 | #define S5PC100_CLKDIV0_D0_MASK (0x7<<8) | ||
| 74 | #define S5PC100_CLKDIV0_D0_SHIFT (8) | ||
| 75 | #define S5PC100_CLKDIV0_PCLKD0_MASK (0x7<<12) | ||
| 76 | #define S5PC100_CLKDIV0_PCLKD0_SHIFT (12) | ||
| 77 | #define S5PC100_CLKDIV0_SECSS_MASK (0x7<<16) | ||
| 78 | #define S5PC100_CLKDIV0_SECSS_SHIFT (16) | ||
| 79 | |||
| 80 | /* CLKDIV1 (OneNAND clock only used in one place, removed) */ | ||
| 81 | #define S5PC100_CLKDIV1_APLL2_MASK (0x7<<0) | ||
| 82 | #define S5PC100_CLKDIV1_APLL2_SHIFT (0) | ||
| 83 | #define S5PC100_CLKDIV1_MPLL_MASK (0x3<<4) | ||
| 84 | #define S5PC100_CLKDIV1_MPLL_SHIFT (4) | ||
| 85 | #define S5PC100_CLKDIV1_MPLL2_MASK (0x1<<8) | ||
| 86 | #define S5PC100_CLKDIV1_MPLL2_SHIFT (8) | ||
| 87 | #define S5PC100_CLKDIV1_D1_MASK (0x7<<12) | ||
| 88 | #define S5PC100_CLKDIV1_D1_SHIFT (12) | ||
| 89 | #define S5PC100_CLKDIV1_PCLKD1_MASK (0x7<<16) | ||
| 90 | #define S5PC100_CLKDIV1_PCLKD1_SHIFT (16) | ||
| 91 | #define S5PC100_CLKDIV1_CAM_MASK (0x1F<<24) | ||
| 92 | #define S5PC100_CLKDIV1_CAM_SHIFT (24) | ||
| 93 | |||
| 94 | /* CLKDIV2 => removed in clksrc update */ | ||
| 95 | /* CLKDIV3 => removed in clksrc update, or not needed */ | ||
| 96 | /* CLKDIV4 => removed in clksrc update, or not needed */ | ||
| 97 | |||
| 98 | /* HCLKD0/PCLKD0 Clock Gate 0 Registers */ | ||
| 99 | #define S5PC100_CLKGATE_D00_INTC (1<<0) | ||
| 100 | #define S5PC100_CLKGATE_D00_TZIC (1<<1) | ||
| 101 | #define S5PC100_CLKGATE_D00_CFCON (1<<2) | ||
| 102 | #define S5PC100_CLKGATE_D00_MDMA (1<<3) | ||
| 103 | #define S5PC100_CLKGATE_D00_G2D (1<<4) | ||
| 104 | #define S5PC100_CLKGATE_D00_SECSS (1<<5) | ||
| 105 | #define S5PC100_CLKGATE_D00_CSSYS (1<<6) | ||
| 106 | |||
| 107 | /* HCLKD0/PCLKD0 Clock Gate 1 Registers */ | ||
| 108 | #define S5PC100_CLKGATE_D01_DMC (1<<0) | ||
| 109 | #define S5PC100_CLKGATE_D01_SROMC (1<<1) | ||
| 110 | #define S5PC100_CLKGATE_D01_ONENAND (1<<2) | ||
| 111 | #define S5PC100_CLKGATE_D01_NFCON (1<<3) | ||
| 112 | #define S5PC100_CLKGATE_D01_INTMEM (1<<4) | ||
| 113 | #define S5PC100_CLKGATE_D01_EBI (1<<5) | ||
| 114 | |||
| 115 | /* PCLKD0 Clock Gate 2 Registers */ | ||
| 116 | #define S5PC100_CLKGATE_D02_SECKEY (1<<1) | ||
| 117 | #define S5PC100_CLKGATE_D02_SDM (1<<2) | ||
| 118 | |||
| 119 | /* HCLKD1/PCLKD1 Clock Gate 0 Registers */ | ||
| 120 | #define S5PC100_CLKGATE_D10_PDMA0 (1<<0) | ||
| 121 | #define S5PC100_CLKGATE_D10_PDMA1 (1<<1) | ||
| 122 | #define S5PC100_CLKGATE_D10_USBHOST (1<<2) | ||
| 123 | #define S5PC100_CLKGATE_D10_USBOTG (1<<3) | ||
| 124 | #define S5PC100_CLKGATE_D10_MODEMIF (1<<4) | ||
| 125 | #define S5PC100_CLKGATE_D10_HSMMC0 (1<<5) | ||
| 126 | #define S5PC100_CLKGATE_D10_HSMMC1 (1<<6) | ||
| 127 | #define S5PC100_CLKGATE_D10_HSMMC2 (1<<7) | ||
| 128 | |||
| 129 | /* HCLKD1/PCLKD1 Clock Gate 1 Registers */ | ||
| 130 | #define S5PC100_CLKGATE_D11_LCD (1<<0) | ||
| 131 | #define S5PC100_CLKGATE_D11_ROTATOR (1<<1) | ||
| 132 | #define S5PC100_CLKGATE_D11_FIMC0 (1<<2) | ||
| 133 | #define S5PC100_CLKGATE_D11_FIMC1 (1<<3) | ||
| 134 | #define S5PC100_CLKGATE_D11_FIMC2 (1<<4) | ||
| 135 | #define S5PC100_CLKGATE_D11_JPEG (1<<5) | ||
| 136 | #define S5PC100_CLKGATE_D11_DSI (1<<6) | ||
| 137 | #define S5PC100_CLKGATE_D11_CSI (1<<7) | ||
| 138 | #define S5PC100_CLKGATE_D11_G3D (1<<8) | ||
| 139 | |||
| 140 | /* HCLKD1/PCLKD1 Clock Gate 2 Registers */ | ||
| 141 | #define S5PC100_CLKGATE_D12_TV (1<<0) | ||
| 142 | #define S5PC100_CLKGATE_D12_VP (1<<1) | ||
| 143 | #define S5PC100_CLKGATE_D12_MIXER (1<<2) | ||
| 144 | #define S5PC100_CLKGATE_D12_HDMI (1<<3) | ||
| 145 | #define S5PC100_CLKGATE_D12_MFC (1<<4) | ||
| 146 | |||
| 147 | /* HCLKD1/PCLKD1 Clock Gate 3 Registers */ | ||
| 148 | #define S5PC100_CLKGATE_D13_CHIPID (1<<0) | ||
| 149 | #define S5PC100_CLKGATE_D13_GPIO (1<<1) | ||
| 150 | #define S5PC100_CLKGATE_D13_APC (1<<2) | ||
| 151 | #define S5PC100_CLKGATE_D13_IEC (1<<3) | ||
| 152 | #define S5PC100_CLKGATE_D13_PWM (1<<6) | ||
| 153 | #define S5PC100_CLKGATE_D13_SYSTIMER (1<<7) | ||
| 154 | #define S5PC100_CLKGATE_D13_WDT (1<<8) | ||
| 155 | #define S5PC100_CLKGATE_D13_RTC (1<<9) | ||
| 156 | |||
| 157 | /* HCLKD1/PCLKD1 Clock Gate 4 Registers */ | ||
| 158 | #define S5PC100_CLKGATE_D14_UART0 (1<<0) | ||
| 159 | #define S5PC100_CLKGATE_D14_UART1 (1<<1) | ||
| 160 | #define S5PC100_CLKGATE_D14_UART2 (1<<2) | ||
| 161 | #define S5PC100_CLKGATE_D14_UART3 (1<<3) | ||
| 162 | #define S5PC100_CLKGATE_D14_IIC (1<<4) | ||
| 163 | #define S5PC100_CLKGATE_D14_HDMI_IIC (1<<5) | ||
| 164 | #define S5PC100_CLKGATE_D14_SPI0 (1<<6) | ||
| 165 | #define S5PC100_CLKGATE_D14_SPI1 (1<<7) | ||
| 166 | #define S5PC100_CLKGATE_D14_SPI2 (1<<8) | ||
| 167 | #define S5PC100_CLKGATE_D14_IRDA (1<<9) | ||
| 168 | #define S5PC100_CLKGATE_D14_CCAN0 (1<<10) | ||
| 169 | #define S5PC100_CLKGATE_D14_CCAN1 (1<<11) | ||
| 170 | #define S5PC100_CLKGATE_D14_HSITX (1<<12) | ||
| 171 | #define S5PC100_CLKGATE_D14_HSIRX (1<<13) | ||
| 172 | |||
| 173 | /* HCLKD1/PCLKD1 Clock Gate 5 Registers */ | ||
| 174 | #define S5PC100_CLKGATE_D15_IIS0 (1<<0) | ||
| 175 | #define S5PC100_CLKGATE_D15_IIS1 (1<<1) | ||
| 176 | #define S5PC100_CLKGATE_D15_IIS2 (1<<2) | ||
| 177 | #define S5PC100_CLKGATE_D15_AC97 (1<<3) | ||
| 178 | #define S5PC100_CLKGATE_D15_PCM0 (1<<4) | ||
| 179 | #define S5PC100_CLKGATE_D15_PCM1 (1<<5) | ||
| 180 | #define S5PC100_CLKGATE_D15_SPDIF (1<<6) | ||
| 181 | #define S5PC100_CLKGATE_D15_TSADC (1<<7) | ||
| 182 | #define S5PC100_CLKGATE_D15_KEYIF (1<<8) | ||
| 183 | #define S5PC100_CLKGATE_D15_CG (1<<9) | ||
| 184 | |||
| 185 | /* HCLKD2 Clock Gate 0 Registers */ | ||
| 186 | #define S5PC100_CLKGATE_D20_HCLKD2 (1<<0) | ||
| 187 | #define S5PC100_CLKGATE_D20_I2SD2 (1<<1) | ||
| 188 | |||
| 189 | /* Special Clock Gate 0 Registers */ | ||
| 190 | #define S5PC100_CLKGATE_SCLK0_HPM (1<<0) | ||
| 191 | #define S5PC100_CLKGATE_SCLK0_PWI (1<<1) | ||
| 192 | #define S5PC100_CLKGATE_SCLK0_ONENAND (1<<2) | ||
| 193 | #define S5PC100_CLKGATE_SCLK0_UART (1<<3) | ||
| 194 | #define S5PC100_CLKGATE_SCLK0_SPI0 (1<<4) | ||
| 195 | #define S5PC100_CLKGATE_SCLK0_SPI1 (1<<5) | ||
| 196 | #define S5PC100_CLKGATE_SCLK0_SPI2 (1<<6) | ||
| 197 | #define S5PC100_CLKGATE_SCLK0_SPI0_48 (1<<7) | ||
| 198 | #define S5PC100_CLKGATE_SCLK0_SPI1_48 (1<<8) | ||
| 199 | #define S5PC100_CLKGATE_SCLK0_SPI2_48 (1<<9) | ||
| 200 | #define S5PC100_CLKGATE_SCLK0_IRDA (1<<10) | ||
| 201 | #define S5PC100_CLKGATE_SCLK0_USBHOST (1<<11) | ||
| 202 | #define S5PC100_CLKGATE_SCLK0_MMC0 (1<<12) | ||
| 203 | #define S5PC100_CLKGATE_SCLK0_MMC1 (1<<13) | ||
| 204 | #define S5PC100_CLKGATE_SCLK0_MMC2 (1<<14) | ||
| 205 | #define S5PC100_CLKGATE_SCLK0_MMC0_48 (1<<15) | ||
| 206 | #define S5PC100_CLKGATE_SCLK0_MMC1_48 (1<<16) | ||
| 207 | #define S5PC100_CLKGATE_SCLK0_MMC2_48 (1<<17) | ||
| 208 | |||
| 209 | /* Special Clock Gate 1 Registers */ | ||
| 210 | #define S5PC100_CLKGATE_SCLK1_LCD (1<<0) | ||
| 211 | #define S5PC100_CLKGATE_SCLK1_FIMC0 (1<<1) | ||
| 212 | #define S5PC100_CLKGATE_SCLK1_FIMC1 (1<<2) | ||
| 213 | #define S5PC100_CLKGATE_SCLK1_FIMC2 (1<<3) | ||
| 214 | #define S5PC100_CLKGATE_SCLK1_TV54 (1<<4) | ||
| 215 | #define S5PC100_CLKGATE_SCLK1_VDAC54 (1<<5) | ||
| 216 | #define S5PC100_CLKGATE_SCLK1_MIXER (1<<6) | ||
| 217 | #define S5PC100_CLKGATE_SCLK1_HDMI (1<<7) | ||
| 218 | #define S5PC100_CLKGATE_SCLK1_AUDIO0 (1<<8) | ||
| 219 | #define S5PC100_CLKGATE_SCLK1_AUDIO1 (1<<9) | ||
| 220 | #define S5PC100_CLKGATE_SCLK1_AUDIO2 (1<<10) | ||
| 221 | #define S5PC100_CLKGATE_SCLK1_SPDIF (1<<11) | ||
| 222 | #define S5PC100_CLKGATE_SCLK1_CAM (1<<12) | ||
| 223 | |||
| 224 | #define S5PC100_SWRESET S5PC100_CLKREG_OTHER(0x000) | ||
| 225 | #define S5PC100_OND_SWRESET S5PC100_CLKREG_OTHER(0x008) | ||
| 226 | #define S5PC100_GEN_CTRL S5PC100_CLKREG_OTHER(0x100) | ||
| 227 | #define S5PC100_GEN_STATUS S5PC100_CLKREG_OTHER(0x104) | ||
| 228 | #define S5PC100_MEM_SYS_CFG S5PC100_CLKREG_OTHER(0x200) | ||
| 229 | #define S5PC100_CAM_MUX_SEL S5PC100_CLKREG_OTHER(0x300) | ||
| 230 | #define S5PC100_MIXER_OUT_SEL S5PC100_CLKREG_OTHER(0x304) | ||
| 231 | #define S5PC100_LPMP_MODE_SEL S5PC100_CLKREG_OTHER(0x308) | ||
| 232 | #define S5PC100_MIPI_PHY_CON0 S5PC100_CLKREG_OTHER(0x400) | ||
| 233 | #define S5PC100_MIPI_PHY_CON1 S5PC100_CLKREG_OTHER(0x414) | ||
| 234 | #define S5PC100_HDMI_PHY_CON0 S5PC100_CLKREG_OTHER(0x420) | ||
| 235 | |||
| 236 | #define S5PC100_SWRESET_RESETVAL 0xc100 | ||
| 237 | #define S5PC100_OTHER_SYS_INT 24 | ||
| 238 | #define S5PC100_OTHER_STA_TYPE 23 | ||
| 239 | #define STA_TYPE_EXPON 0 | ||
| 240 | #define STA_TYPE_SFR 1 | ||
| 241 | |||
| 242 | #define S5PC100_SLEEP_CFG_OSC_EN 0 | ||
| 243 | |||
| 244 | /* OTHERS Resgister */ | ||
| 245 | #define S5PC100_OTHERS_USB_SIG_MASK (1 << 16) | ||
| 246 | #define S5PC100_OTHERS_MIPI_DPHY_EN (1 << 28) | ||
| 247 | |||
| 248 | /* MIPI D-PHY Control Register 0 */ | ||
| 249 | #define S5PC100_MIPI_PHY_CON0_M_RESETN (1 << 1) | ||
| 250 | #define S5PC100_MIPI_PHY_CON0_S_RESETN (1 << 0) | ||
| 251 | |||
| 252 | #endif /* _PLAT_REGS_CLOCK_H */ | ||
diff --git a/arch/arm/plat-s5pc1xx/include/plat/regs-power.h b/arch/arm/plat-s5pc1xx/include/plat/regs-power.h deleted file mode 100644 index 02ffa491b53a..000000000000 --- a/arch/arm/plat-s5pc1xx/include/plat/regs-power.h +++ /dev/null | |||
| @@ -1,84 +0,0 @@ | |||
| 1 | /* arch/arm/plat-s5pc1xx/include/plat/regs-clock.h | ||
| 2 | * | ||
| 3 | * Copyright 2009 Samsung Electronics Co. | ||
| 4 | * Jongse Won <jongse.won@samsung.com> | ||
| 5 | * | ||
| 6 | * S5PC1XX clock register definitions | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License version 2 as | ||
| 10 | * published by the Free Software Foundation. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #ifndef __ASM_ARM_REGS_PWR | ||
| 14 | #define __ASM_ARM_REGS_PWR __FILE__ | ||
| 15 | |||
| 16 | #define S5PC1XX_PWRREG(x) (S5PC1XX_VA_PWR + (x)) | ||
| 17 | |||
| 18 | /* s5pc100 (0xE0108000) register for power management */ | ||
| 19 | #define S5PC100_PWR_CFG S5PC1XX_PWRREG(0x0) | ||
| 20 | #define S5PC100_EINT_WAKEUP_MASK S5PC1XX_PWRREG(0x4) | ||
| 21 | #define S5PC100_NORMAL_CFG S5PC1XX_PWRREG(0x10) | ||
| 22 | #define S5PC100_STOP_CFG S5PC1XX_PWRREG(0x14) | ||
| 23 | #define S5PC100_SLEEP_CFG S5PC1XX_PWRREG(0x18) | ||
| 24 | #define S5PC100_STOP_MEM_CFG S5PC1XX_PWRREG(0x1C) | ||
| 25 | #define S5PC100_OSC_FREQ S5PC1XX_PWRREG(0x100) | ||
| 26 | #define S5PC100_OSC_STABLE S5PC1XX_PWRREG(0x104) | ||
| 27 | #define S5PC100_PWR_STABLE S5PC1XX_PWRREG(0x108) | ||
| 28 | #define S5PC100_MTC_STABLE S5PC1XX_PWRREG(0x110) | ||
| 29 | #define S5PC100_CLAMP_STABLE S5PC1XX_PWRREG(0x114) | ||
| 30 | #define S5PC100_OTHERS S5PC1XX_PWRREG(0x200) | ||
| 31 | #define S5PC100_RST_STAT S5PC1XX_PWRREG(0x300) | ||
| 32 | #define S5PC100_WAKEUP_STAT S5PC1XX_PWRREG(0x304) | ||
| 33 | #define S5PC100_BLK_PWR_STAT S5PC1XX_PWRREG(0x308) | ||
| 34 | #define S5PC100_INFORM0 S5PC1XX_PWRREG(0x400) | ||
| 35 | #define S5PC100_INFORM1 S5PC1XX_PWRREG(0x404) | ||
| 36 | #define S5PC100_INFORM2 S5PC1XX_PWRREG(0x408) | ||
| 37 | #define S5PC100_INFORM3 S5PC1XX_PWRREG(0x40C) | ||
| 38 | #define S5PC100_INFORM4 S5PC1XX_PWRREG(0x410) | ||
| 39 | #define S5PC100_INFORM5 S5PC1XX_PWRREG(0x414) | ||
| 40 | #define S5PC100_INFORM6 S5PC1XX_PWRREG(0x418) | ||
| 41 | #define S5PC100_INFORM7 S5PC1XX_PWRREG(0x41C) | ||
| 42 | #define S5PC100_DCGIDX_MAP0 S5PC1XX_PWRREG(0x500) | ||
| 43 | #define S5PC100_DCGIDX_MAP1 S5PC1XX_PWRREG(0x504) | ||
| 44 | #define S5PC100_DCGIDX_MAP2 S5PC1XX_PWRREG(0x508) | ||
| 45 | #define S5PC100_DCGPERF_MAP0 S5PC1XX_PWRREG(0x50C) | ||
| 46 | #define S5PC100_DCGPERF_MAP1 S5PC1XX_PWRREG(0x510) | ||
| 47 | #define S5PC100_DVCIDX_MAP S5PC1XX_PWRREG(0x514) | ||
| 48 | #define S5PC100_FREQ_CPU S5PC1XX_PWRREG(0x518) | ||
| 49 | #define S5PC100_FREQ_DPM S5PC1XX_PWRREG(0x51C) | ||
| 50 | #define S5PC100_DVSEMCLK_EN S5PC1XX_PWRREG(0x520) | ||
| 51 | #define S5PC100_APLL_CON_L8 S5PC1XX_PWRREG(0x600) | ||
| 52 | #define S5PC100_APLL_CON_L7 S5PC1XX_PWRREG(0x604) | ||
| 53 | #define S5PC100_APLL_CON_L6 S5PC1XX_PWRREG(0x608) | ||
| 54 | #define S5PC100_APLL_CON_L5 S5PC1XX_PWRREG(0x60C) | ||
| 55 | #define S5PC100_APLL_CON_L4 S5PC1XX_PWRREG(0x610) | ||
| 56 | #define S5PC100_APLL_CON_L3 S5PC1XX_PWRREG(0x614) | ||
| 57 | #define S5PC100_APLL_CON_L2 S5PC1XX_PWRREG(0x618) | ||
| 58 | #define S5PC100_APLL_CON_L1 S5PC1XX_PWRREG(0x61C) | ||
| 59 | #define S5PC100_IEM_CONTROL S5PC1XX_PWRREG(0x620) | ||
| 60 | #define S5PC100_CLKDIV_IEM_L8 S5PC1XX_PWRREG(0x700) | ||
| 61 | #define S5PC100_CLKDIV_IEM_L7 S5PC1XX_PWRREG(0x704) | ||
| 62 | #define S5PC100_CLKDIV_IEM_L6 S5PC1XX_PWRREG(0x708) | ||
| 63 | #define S5PC100_CLKDIV_IEM_L5 S5PC1XX_PWRREG(0x70C) | ||
| 64 | #define S5PC100_CLKDIV_IEM_L4 S5PC1XX_PWRREG(0x710) | ||
| 65 | #define S5PC100_CLKDIV_IEM_L3 S5PC1XX_PWRREG(0x714) | ||
| 66 | #define S5PC100_CLKDIV_IEM_L2 S5PC1XX_PWRREG(0x718) | ||
| 67 | #define S5PC100_CLKDIV_IEM_L1 S5PC1XX_PWRREG(0x71C) | ||
| 68 | #define S5PC100_IEM_HPMCLK_DIV S5PC1XX_PWRREG(0x724) | ||
| 69 | |||
| 70 | /* PWR_CFG */ | ||
| 71 | #define S5PC100_PWRCFG_CFG_DEEP_IDLE (1 << 31) | ||
| 72 | #define S5PC100_PWRCFG_CFG_WFI_MASK (3 << 5) | ||
| 73 | #define S5PC100_PWRCFG_CFG_WFI_IDLE (0 << 5) | ||
| 74 | #define S5PC100_PWRCFG_CFG_WFI_DEEP_IDLE (1 << 5) | ||
| 75 | #define S5PC100_PWRCFG_CFG_WFI_STOP (2 << 5) | ||
| 76 | #define S5PC100_PWRCFG_CFG_WFI_SLEEP (3 << 5) | ||
| 77 | |||
| 78 | /* SLEEP_CFG */ | ||
| 79 | #define S5PC100_SLEEP_OSC_EN_SLEEP (1 << 0) | ||
| 80 | |||
| 81 | /* OTHERS */ | ||
| 82 | #define S5PC100_PMU_INT_DISABLE (1 << 24) | ||
| 83 | |||
| 84 | #endif /* __ASM_ARM_REGS_PWR */ | ||
diff --git a/arch/arm/plat-s5pc1xx/include/plat/s5pc100.h b/arch/arm/plat-s5pc1xx/include/plat/s5pc100.h deleted file mode 100644 index 2531f34a56f3..000000000000 --- a/arch/arm/plat-s5pc1xx/include/plat/s5pc100.h +++ /dev/null | |||
| @@ -1,64 +0,0 @@ | |||
| 1 | /* arch/arm/plat-s5pc1xx/include/plat/s5pc100.h | ||
| 2 | * | ||
| 3 | * Copyright 2009 Samsung Electronics Co. | ||
| 4 | * Byungho Min <bhmin@samsung.com> | ||
| 5 | * | ||
| 6 | * Header file for s5pc100 cpu support | ||
| 7 | * | ||
| 8 | * Based on plat-s3c64xx/include/plat/s3c6400.h | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License version 2 as | ||
| 12 | * published by the Free Software Foundation. | ||
| 13 | */ | ||
| 14 | |||
| 15 | /* Common init code for S5PC100 related SoCs */ | ||
| 16 | extern int s5pc100_init(void); | ||
| 17 | extern void s5pc100_map_io(void); | ||
| 18 | extern void s5pc100_init_clocks(int xtal); | ||
| 19 | extern int s5pc100_register_baseclocks(unsigned long xtal); | ||
| 20 | extern void s5pc100_init_irq(void); | ||
| 21 | extern void s5pc100_init_io(struct map_desc *mach_desc, int size); | ||
| 22 | extern void s5pc100_common_init_uarts(struct s3c2410_uartcfg *cfg, int no); | ||
| 23 | extern void s5pc100_register_clocks(void); | ||
| 24 | extern void s5pc100_setup_clocks(void); | ||
| 25 | extern struct sysdev_class s5pc100_sysclass; | ||
| 26 | |||
| 27 | #define s5pc100_init_uarts s5pc100_common_init_uarts | ||
| 28 | |||
| 29 | /* Some day, belows will be moved to plat-s5pc/include/plat/cpu.h */ | ||
| 30 | extern void s5pc1xx_init_irq(u32 *vic_valid, int num); | ||
| 31 | extern void s5pc1xx_init_io(struct map_desc *mach_desc, int size); | ||
| 32 | |||
| 33 | /* Some day, belows will be moved to plat-s5pc/include/plat/clock.h */ | ||
| 34 | extern struct clk clk_hpll; | ||
| 35 | extern struct clk clk_hd0; | ||
| 36 | extern struct clk clk_pd0; | ||
| 37 | extern struct clk clk_54m; | ||
| 38 | extern void s5pc1xx_register_clocks(void); | ||
| 39 | extern int s5pc100_sclk0_ctrl(struct clk *clk, int enable); | ||
| 40 | extern int s5pc100_sclk1_ctrl(struct clk *clk, int enable); | ||
| 41 | |||
| 42 | /* Some day, belows will be moved to plat-s5pc/include/plat/devs.h */ | ||
| 43 | extern struct s3c24xx_uart_resources s5pc1xx_uart_resources[]; | ||
| 44 | extern struct platform_device s3c_device_g2d; | ||
| 45 | extern struct platform_device s3c_device_g3d; | ||
| 46 | extern struct platform_device s3c_device_vpp; | ||
| 47 | extern struct platform_device s3c_device_tvenc; | ||
| 48 | extern struct platform_device s3c_device_tvscaler; | ||
| 49 | extern struct platform_device s3c_device_rotator; | ||
| 50 | extern struct platform_device s3c_device_jpeg; | ||
| 51 | extern struct platform_device s3c_device_onenand; | ||
| 52 | extern struct platform_device s3c_device_usb_otghcd; | ||
| 53 | extern struct platform_device s3c_device_keypad; | ||
| 54 | extern struct platform_device s3c_device_ts; | ||
| 55 | extern struct platform_device s3c_device_g3d; | ||
| 56 | extern struct platform_device s3c_device_smc911x; | ||
| 57 | extern struct platform_device s3c_device_fimc0; | ||
| 58 | extern struct platform_device s3c_device_fimc1; | ||
| 59 | extern struct platform_device s3c_device_mfc; | ||
| 60 | extern struct platform_device s3c_device_ac97; | ||
| 61 | extern struct platform_device s3c_device_fimc0; | ||
| 62 | extern struct platform_device s3c_device_fimc1; | ||
| 63 | extern struct platform_device s3c_device_fimc2; | ||
| 64 | |||
diff --git a/arch/arm/plat-s5pc1xx/irq-eint.c b/arch/arm/plat-s5pc1xx/irq-eint.c deleted file mode 100644 index 373122f57d56..000000000000 --- a/arch/arm/plat-s5pc1xx/irq-eint.c +++ /dev/null | |||
| @@ -1,281 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/plat-s5pc1xx/irq-eint.c | ||
| 3 | * | ||
| 4 | * Copyright 2009 Samsung Electronics Co. | ||
| 5 | * Byungho Min <bhmin@samsung.com> | ||
| 6 | * Kyungin Park <kyungmin.park@samsung.com> | ||
| 7 | * | ||
| 8 | * Based on plat-s3c64xx/irq-eint.c | ||
| 9 | * | ||
| 10 | * S5PC1XX - Interrupt handling for IRQ_EINT(x) | ||
| 11 | * | ||
| 12 | * This program is free software; you can redistribute it and/or modify | ||
| 13 | * it under the terms of the GNU General Public License version 2 as | ||
| 14 | * published by the Free Software Foundation. | ||
| 15 | */ | ||
| 16 | |||
| 17 | #include <linux/kernel.h> | ||
| 18 | #include <linux/interrupt.h> | ||
| 19 | #include <linux/irq.h> | ||
| 20 | #include <linux/io.h> | ||
| 21 | #include <linux/sysdev.h> | ||
| 22 | #include <linux/pm.h> | ||
| 23 | #include <linux/gpio.h> | ||
| 24 | |||
| 25 | #include <asm/hardware/vic.h> | ||
| 26 | |||
| 27 | #include <mach/map.h> | ||
| 28 | |||
| 29 | #include <plat/gpio-cfg.h> | ||
| 30 | #include <plat/gpio-ext.h> | ||
| 31 | #include <plat/pm.h> | ||
| 32 | #include <plat/regs-gpio.h> | ||
| 33 | #include <plat/regs-irqtype.h> | ||
| 34 | |||
| 35 | /* | ||
| 36 | * bank is a group of external interrupt | ||
| 37 | * bank0 means EINT0 ... EINT7 | ||
| 38 | * bank1 means EINT8 ... EINT15 | ||
| 39 | * bank2 means EINT16 ... EINT23 | ||
| 40 | * bank3 means EINT24 ... EINT31 | ||
| 41 | */ | ||
| 42 | |||
| 43 | static inline int s3c_get_eint(unsigned int irq) | ||
| 44 | { | ||
| 45 | int real; | ||
| 46 | |||
| 47 | if (irq < IRQ_EINT16_31) | ||
| 48 | real = (irq - IRQ_EINT0); | ||
| 49 | else | ||
| 50 | real = (irq - S3C_IRQ_EINT_BASE) + IRQ_EINT16_31 - IRQ_EINT0; | ||
| 51 | |||
| 52 | return real; | ||
| 53 | } | ||
| 54 | |||
| 55 | static inline int s3c_get_bank(unsigned int irq) | ||
| 56 | { | ||
| 57 | return s3c_get_eint(irq) >> 3; | ||
| 58 | } | ||
| 59 | |||
| 60 | static inline int s3c_eint_to_bit(unsigned int irq) | ||
| 61 | { | ||
| 62 | int real, bit; | ||
| 63 | |||
| 64 | real = s3c_get_eint(irq); | ||
| 65 | bit = 1 << (real & (8 - 1)); | ||
| 66 | |||
| 67 | return bit; | ||
| 68 | } | ||
| 69 | |||
| 70 | static inline void s3c_irq_eint_mask(unsigned int irq) | ||
| 71 | { | ||
| 72 | u32 mask; | ||
| 73 | u32 bank = s3c_get_bank(irq); | ||
| 74 | |||
| 75 | mask = __raw_readl(S5PC1XX_WKUP_INT_MASK(bank)); | ||
| 76 | mask |= s3c_eint_to_bit(irq); | ||
| 77 | __raw_writel(mask, S5PC1XX_WKUP_INT_MASK(bank)); | ||
| 78 | } | ||
| 79 | |||
| 80 | static void s3c_irq_eint_unmask(unsigned int irq) | ||
| 81 | { | ||
| 82 | u32 mask; | ||
| 83 | u32 bank = s3c_get_bank(irq); | ||
| 84 | |||
| 85 | mask = __raw_readl(S5PC1XX_WKUP_INT_MASK(bank)); | ||
| 86 | mask &= ~(s3c_eint_to_bit(irq)); | ||
| 87 | __raw_writel(mask, S5PC1XX_WKUP_INT_MASK(bank)); | ||
| 88 | } | ||
| 89 | |||
| 90 | static inline void s3c_irq_eint_ack(unsigned int irq) | ||
| 91 | { | ||
| 92 | u32 bank = s3c_get_bank(irq); | ||
| 93 | |||
| 94 | __raw_writel(s3c_eint_to_bit(irq), S5PC1XX_WKUP_INT_PEND(bank)); | ||
| 95 | } | ||
| 96 | |||
| 97 | static void s3c_irq_eint_maskack(unsigned int irq) | ||
| 98 | { | ||
| 99 | /* compiler should in-line these */ | ||
| 100 | s3c_irq_eint_mask(irq); | ||
| 101 | s3c_irq_eint_ack(irq); | ||
| 102 | } | ||
| 103 | |||
| 104 | static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type) | ||
| 105 | { | ||
| 106 | u32 bank = s3c_get_bank(irq); | ||
| 107 | int real = s3c_get_eint(irq); | ||
| 108 | int gpio, shift, sfn; | ||
| 109 | u32 ctrl, con = 0; | ||
| 110 | |||
| 111 | switch (type) { | ||
| 112 | case IRQ_TYPE_NONE: | ||
| 113 | printk(KERN_WARNING "No edge setting!\n"); | ||
| 114 | break; | ||
| 115 | |||
| 116 | case IRQ_TYPE_EDGE_RISING: | ||
| 117 | con = S5PC1XX_WKUP_INT_RISEEDGE; | ||
| 118 | break; | ||
| 119 | |||
| 120 | case IRQ_TYPE_EDGE_FALLING: | ||
| 121 | con = S5PC1XX_WKUP_INT_FALLEDGE; | ||
| 122 | break; | ||
| 123 | |||
| 124 | case IRQ_TYPE_EDGE_BOTH: | ||
| 125 | con = S5PC1XX_WKUP_INT_BOTHEDGE; | ||
| 126 | break; | ||
| 127 | |||
| 128 | case IRQ_TYPE_LEVEL_LOW: | ||
| 129 | con = S5PC1XX_WKUP_INT_LOWLEV; | ||
| 130 | break; | ||
| 131 | |||
| 132 | case IRQ_TYPE_LEVEL_HIGH: | ||
| 133 | con = S5PC1XX_WKUP_INT_HILEV; | ||
| 134 | break; | ||
| 135 | |||
| 136 | default: | ||
| 137 | printk(KERN_ERR "No such irq type %d", type); | ||
| 138 | return -EINVAL; | ||
| 139 | } | ||
| 140 | |||
| 141 | gpio = real & (8 - 1); | ||
| 142 | shift = gpio << 2; | ||
| 143 | |||
| 144 | ctrl = __raw_readl(S5PC1XX_WKUP_INT_CON(bank)); | ||
| 145 | ctrl &= ~(0x7 << shift); | ||
| 146 | ctrl |= con << shift; | ||
| 147 | __raw_writel(ctrl, S5PC1XX_WKUP_INT_CON(bank)); | ||
| 148 | |||
| 149 | switch (real) { | ||
| 150 | case 0 ... 7: | ||
| 151 | gpio = S5PC100_GPH0(gpio); | ||
| 152 | break; | ||
| 153 | case 8 ... 15: | ||
| 154 | gpio = S5PC100_GPH1(gpio); | ||
| 155 | break; | ||
| 156 | case 16 ... 23: | ||
| 157 | gpio = S5PC100_GPH2(gpio); | ||
| 158 | break; | ||
| 159 | case 24 ... 31: | ||
| 160 | gpio = S5PC100_GPH3(gpio); | ||
| 161 | break; | ||
| 162 | default: | ||
| 163 | return -EINVAL; | ||
| 164 | } | ||
| 165 | |||
| 166 | sfn = S3C_GPIO_SFN(0x2); | ||
| 167 | s3c_gpio_cfgpin(gpio, sfn); | ||
| 168 | |||
| 169 | return 0; | ||
| 170 | } | ||
| 171 | |||
| 172 | static struct irq_chip s3c_irq_eint = { | ||
| 173 | .name = "EINT", | ||
| 174 | .mask = s3c_irq_eint_mask, | ||
| 175 | .unmask = s3c_irq_eint_unmask, | ||
| 176 | .mask_ack = s3c_irq_eint_maskack, | ||
| 177 | .ack = s3c_irq_eint_ack, | ||
| 178 | .set_type = s3c_irq_eint_set_type, | ||
| 179 | .set_wake = s3c_irqext_wake, | ||
| 180 | }; | ||
| 181 | |||
| 182 | /* s3c_irq_demux_eint | ||
| 183 | * | ||
| 184 | * This function demuxes the IRQ from external interrupts, | ||
| 185 | * from IRQ_EINT(16) to IRQ_EINT(31). It is designed to be inlined into | ||
| 186 | * the specific handlers s3c_irq_demux_eintX_Y. | ||
| 187 | */ | ||
| 188 | static inline void s3c_irq_demux_eint(unsigned int start, unsigned int end) | ||
| 189 | { | ||
| 190 | u32 status = __raw_readl(S5PC1XX_WKUP_INT_PEND((start >> 3))); | ||
| 191 | u32 mask = __raw_readl(S5PC1XX_WKUP_INT_MASK((start >> 3))); | ||
| 192 | unsigned int irq; | ||
| 193 | |||
| 194 | status &= ~mask; | ||
| 195 | status &= (1 << (end - start + 1)) - 1; | ||
| 196 | |||
| 197 | for (irq = IRQ_EINT(start); irq <= IRQ_EINT(end); irq++) { | ||
| 198 | if (status & 1) | ||
| 199 | generic_handle_irq(irq); | ||
| 200 | |||
| 201 | status >>= 1; | ||
| 202 | } | ||
| 203 | } | ||
| 204 | |||
| 205 | static void s3c_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc) | ||
| 206 | { | ||
| 207 | s3c_irq_demux_eint(16, 23); | ||
| 208 | s3c_irq_demux_eint(24, 31); | ||
| 209 | } | ||
| 210 | |||
| 211 | /* | ||
| 212 | * Handle EINT0 ... EINT15 at VIC directly | ||
| 213 | */ | ||
| 214 | static void s3c_irq_vic_eint_mask(unsigned int irq) | ||
| 215 | { | ||
| 216 | void __iomem *base = get_irq_chip_data(irq); | ||
| 217 | unsigned int real; | ||
| 218 | |||
| 219 | s3c_irq_eint_mask(irq); | ||
| 220 | real = s3c_get_eint(irq); | ||
| 221 | writel(1 << real, base + VIC_INT_ENABLE_CLEAR); | ||
| 222 | } | ||
| 223 | |||
| 224 | static void s3c_irq_vic_eint_unmask(unsigned int irq) | ||
| 225 | { | ||
| 226 | void __iomem *base = get_irq_chip_data(irq); | ||
| 227 | unsigned int real; | ||
| 228 | |||
| 229 | s3c_irq_eint_unmask(irq); | ||
| 230 | real = s3c_get_eint(irq); | ||
| 231 | writel(1 << real, base + VIC_INT_ENABLE); | ||
| 232 | } | ||
| 233 | |||
| 234 | static inline void s3c_irq_vic_eint_ack(unsigned int irq) | ||
| 235 | { | ||
| 236 | u32 bit; | ||
| 237 | u32 bank = s3c_get_bank(irq); | ||
| 238 | |||
| 239 | bit = s3c_eint_to_bit(irq); | ||
| 240 | __raw_writel(bit, S5PC1XX_WKUP_INT_PEND(bank)); | ||
| 241 | } | ||
| 242 | |||
| 243 | static void s3c_irq_vic_eint_maskack(unsigned int irq) | ||
| 244 | { | ||
| 245 | /* compiler should in-line these */ | ||
| 246 | s3c_irq_vic_eint_mask(irq); | ||
| 247 | s3c_irq_vic_eint_ack(irq); | ||
| 248 | } | ||
| 249 | |||
| 250 | static struct irq_chip s3c_irq_vic_eint = { | ||
| 251 | .name = "EINT", | ||
| 252 | .mask = s3c_irq_vic_eint_mask, | ||
| 253 | .unmask = s3c_irq_vic_eint_unmask, | ||
| 254 | .mask_ack = s3c_irq_vic_eint_maskack, | ||
| 255 | .ack = s3c_irq_vic_eint_ack, | ||
| 256 | .set_type = s3c_irq_eint_set_type, | ||
| 257 | .set_wake = s3c_irqext_wake, | ||
| 258 | }; | ||
| 259 | |||
| 260 | static int __init s5pc1xx_init_irq_eint(void) | ||
| 261 | { | ||
| 262 | int irq; | ||
| 263 | |||
| 264 | for (irq = IRQ_EINT0; irq <= IRQ_EINT15; irq++) { | ||
| 265 | set_irq_chip(irq, &s3c_irq_vic_eint); | ||
| 266 | set_irq_handler(irq, handle_level_irq); | ||
| 267 | set_irq_flags(irq, IRQF_VALID); | ||
| 268 | } | ||
| 269 | |||
| 270 | for (irq = IRQ_EINT(16); irq <= IRQ_EINT(31); irq++) { | ||
| 271 | set_irq_chip(irq, &s3c_irq_eint); | ||
| 272 | set_irq_handler(irq, handle_level_irq); | ||
| 273 | set_irq_flags(irq, IRQF_VALID); | ||
| 274 | } | ||
| 275 | |||
| 276 | set_irq_chained_handler(IRQ_EINT16_31, s3c_irq_demux_eint16_31); | ||
| 277 | |||
| 278 | return 0; | ||
| 279 | } | ||
| 280 | |||
| 281 | arch_initcall(s5pc1xx_init_irq_eint); | ||
diff --git a/arch/arm/plat-s5pc1xx/irq.c b/arch/arm/plat-s5pc1xx/irq.c deleted file mode 100644 index bfc524827819..000000000000 --- a/arch/arm/plat-s5pc1xx/irq.c +++ /dev/null | |||
| @@ -1,75 +0,0 @@ | |||
| 1 | /* arch/arm/plat-s5pc1xx/irq.c | ||
| 2 | * | ||
| 3 | * Copyright 2009 Samsung Electronics Co. | ||
| 4 | * Byungho Min <bhmin@samsung.com> | ||
| 5 | * | ||
| 6 | * S5PC1XX - Interrupt handling | ||
| 7 | * | ||
| 8 | * Based on plat-s3c64xx/irq.c | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License version 2 as | ||
| 12 | * published by the Free Software Foundation. | ||
| 13 | */ | ||
| 14 | |||
| 15 | #include <linux/kernel.h> | ||
| 16 | #include <linux/interrupt.h> | ||
| 17 | #include <linux/irq.h> | ||
| 18 | #include <linux/io.h> | ||
| 19 | |||
| 20 | #include <asm/hardware/vic.h> | ||
| 21 | |||
| 22 | #include <mach/map.h> | ||
| 23 | #include <plat/irq-vic-timer.h> | ||
| 24 | #include <plat/irq-uart.h> | ||
| 25 | #include <plat/cpu.h> | ||
| 26 | |||
| 27 | /* Note, we make use of the fact that the parent IRQs, IRQ_UART[0..3] | ||
| 28 | * are consecutive when looking up the interrupt in the demux routines. | ||
| 29 | */ | ||
| 30 | static struct s3c_uart_irq uart_irqs[] = { | ||
| 31 | [0] = { | ||
| 32 | .regs = (void *)S3C_VA_UART0, | ||
| 33 | .base_irq = IRQ_S3CUART_BASE0, | ||
| 34 | .parent_irq = IRQ_UART0, | ||
| 35 | }, | ||
| 36 | [1] = { | ||
| 37 | .regs = (void *)S3C_VA_UART1, | ||
| 38 | .base_irq = IRQ_S3CUART_BASE1, | ||
| 39 | .parent_irq = IRQ_UART1, | ||
| 40 | }, | ||
| 41 | [2] = { | ||
| 42 | .regs = (void *)S3C_VA_UART2, | ||
| 43 | .base_irq = IRQ_S3CUART_BASE2, | ||
| 44 | .parent_irq = IRQ_UART2, | ||
| 45 | }, | ||
| 46 | [3] = { | ||
| 47 | .regs = (void *)S3C_VA_UART3, | ||
| 48 | .base_irq = IRQ_S3CUART_BASE3, | ||
| 49 | .parent_irq = IRQ_UART3, | ||
| 50 | }, | ||
| 51 | }; | ||
| 52 | |||
| 53 | void __init s5pc1xx_init_irq(u32 *vic_valid, int num) | ||
| 54 | { | ||
| 55 | int i; | ||
| 56 | |||
| 57 | printk(KERN_DEBUG "%s: initialising interrupts\n", __func__); | ||
| 58 | |||
| 59 | /* initialise the pair of VICs */ | ||
| 60 | for (i = 0; i < num; i++) | ||
| 61 | vic_init((void *)S5PC1XX_VA_VIC(i), S3C_IRQ(i * S3C_IRQ_OFFSET), | ||
| 62 | vic_valid[i], 0); | ||
| 63 | |||
| 64 | /* add the timer sub-irqs */ | ||
| 65 | |||
| 66 | s3c_init_vic_timer_irq(IRQ_TIMER0_VIC, IRQ_TIMER0); | ||
| 67 | s3c_init_vic_timer_irq(IRQ_TIMER1_VIC, IRQ_TIMER1); | ||
| 68 | s3c_init_vic_timer_irq(IRQ_TIMER2_VIC, IRQ_TIMER2); | ||
| 69 | s3c_init_vic_timer_irq(IRQ_TIMER3_VIC, IRQ_TIMER3); | ||
| 70 | s3c_init_vic_timer_irq(IRQ_TIMER4_VIC, IRQ_TIMER4); | ||
| 71 | |||
| 72 | s3c_init_uart_irqs(uart_irqs, ARRAY_SIZE(uart_irqs)); | ||
| 73 | } | ||
| 74 | |||
| 75 | |||
diff --git a/arch/arm/plat-s5pc1xx/s5pc100-clock.c b/arch/arm/plat-s5pc1xx/s5pc100-clock.c deleted file mode 100644 index 2bf6c57a96a2..000000000000 --- a/arch/arm/plat-s5pc1xx/s5pc100-clock.c +++ /dev/null | |||
| @@ -1,876 +0,0 @@ | |||
| 1 | /* linux/arch/arm/plat-s5pc1xx/s5pc100-clock.c | ||
| 2 | * | ||
| 3 | * Copyright 2009 Samsung Electronics, Co. | ||
| 4 | * Byungho Min <bhmin@samsung.com> | ||
| 5 | * | ||
| 6 | * S5PC100 based common clock support | ||
| 7 | * | ||
| 8 | * Based on plat-s3c64xx/s3c6400-clock.c | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License version 2 as | ||
| 12 | * published by the Free Software Foundation. | ||
| 13 | */ | ||
| 14 | |||
| 15 | #include <linux/init.h> | ||
| 16 | #include <linux/module.h> | ||
| 17 | #include <linux/kernel.h> | ||
| 18 | #include <linux/list.h> | ||
| 19 | #include <linux/errno.h> | ||
| 20 | #include <linux/err.h> | ||
| 21 | #include <linux/clk.h> | ||
| 22 | #include <linux/sysdev.h> | ||
| 23 | #include <linux/io.h> | ||
| 24 | |||
| 25 | #include <mach/hardware.h> | ||
| 26 | #include <mach/map.h> | ||
| 27 | |||
| 28 | #include <plat/cpu-freq.h> | ||
| 29 | |||
| 30 | #include <plat/regs-clock.h> | ||
| 31 | #include <plat/clock.h> | ||
| 32 | #include <plat/clock-clksrc.h> | ||
| 33 | #include <plat/cpu.h> | ||
| 34 | #include <plat/pll.h> | ||
| 35 | #include <plat/devs.h> | ||
| 36 | #include <plat/s5pc100.h> | ||
| 37 | |||
| 38 | /* fin_apll, fin_mpll and fin_epll are all the same clock, which we call | ||
| 39 | * ext_xtal_mux for want of an actual name from the manual. | ||
| 40 | */ | ||
| 41 | |||
| 42 | static struct clk clk_ext_xtal_mux = { | ||
| 43 | .name = "ext_xtal", | ||
| 44 | .id = -1, | ||
| 45 | }; | ||
| 46 | |||
| 47 | #define clk_fin_apll clk_ext_xtal_mux | ||
| 48 | #define clk_fin_mpll clk_ext_xtal_mux | ||
| 49 | #define clk_fin_epll clk_ext_xtal_mux | ||
| 50 | #define clk_fin_hpll clk_ext_xtal_mux | ||
| 51 | |||
| 52 | #define clk_fout_mpll clk_mpll | ||
| 53 | #define clk_vclk_54m clk_54m | ||
| 54 | |||
| 55 | /* APLL */ | ||
| 56 | static struct clk clk_fout_apll = { | ||
| 57 | .name = "fout_apll", | ||
| 58 | .id = -1, | ||
| 59 | .rate = 27000000, | ||
| 60 | }; | ||
| 61 | |||
| 62 | static struct clk *clk_src_apll_list[] = { | ||
| 63 | [0] = &clk_fin_apll, | ||
| 64 | [1] = &clk_fout_apll, | ||
| 65 | }; | ||
| 66 | |||
| 67 | static struct clksrc_sources clk_src_apll = { | ||
| 68 | .sources = clk_src_apll_list, | ||
| 69 | .nr_sources = ARRAY_SIZE(clk_src_apll_list), | ||
| 70 | }; | ||
| 71 | |||
| 72 | static struct clksrc_clk clk_mout_apll = { | ||
| 73 | .clk = { | ||
| 74 | .name = "mout_apll", | ||
| 75 | .id = -1, | ||
| 76 | }, | ||
| 77 | .sources = &clk_src_apll, | ||
| 78 | .reg_src = { .reg = S5PC100_CLKSRC0, .shift = 0, .size = 1, }, | ||
| 79 | }; | ||
| 80 | |||
| 81 | static unsigned long s5pc100_clk_dout_apll_get_rate(struct clk *clk) | ||
| 82 | { | ||
| 83 | unsigned long rate = clk_get_rate(clk->parent); | ||
| 84 | unsigned int ratio; | ||
| 85 | |||
| 86 | ratio = __raw_readl(S5PC100_CLKDIV0) & S5PC100_CLKDIV0_APLL_MASK; | ||
| 87 | ratio >>= S5PC100_CLKDIV0_APLL_SHIFT; | ||
| 88 | |||
| 89 | return rate / (ratio + 1); | ||
| 90 | } | ||
| 91 | |||
| 92 | static struct clk clk_dout_apll = { | ||
| 93 | .name = "dout_apll", | ||
| 94 | .id = -1, | ||
| 95 | .parent = &clk_mout_apll.clk, | ||
| 96 | .ops = &(struct clk_ops) { | ||
| 97 | .get_rate = s5pc100_clk_dout_apll_get_rate, | ||
| 98 | }, | ||
| 99 | }; | ||
| 100 | |||
| 101 | static unsigned long s5pc100_clk_arm_get_rate(struct clk *clk) | ||
| 102 | { | ||
| 103 | unsigned long rate = clk_get_rate(clk->parent); | ||
| 104 | unsigned int ratio; | ||
| 105 | |||
| 106 | ratio = __raw_readl(S5PC100_CLKDIV0) & S5PC100_CLKDIV0_ARM_MASK; | ||
| 107 | ratio >>= S5PC100_CLKDIV0_ARM_SHIFT; | ||
| 108 | |||
| 109 | return rate / (ratio + 1); | ||
| 110 | } | ||
| 111 | |||
| 112 | static unsigned long s5pc100_clk_arm_round_rate(struct clk *clk, | ||
| 113 | unsigned long rate) | ||
| 114 | { | ||
| 115 | unsigned long parent = clk_get_rate(clk->parent); | ||
| 116 | u32 div; | ||
| 117 | |||
| 118 | if (parent < rate) | ||
| 119 | return rate; | ||
| 120 | |||
| 121 | div = (parent / rate) - 1; | ||
| 122 | if (div > S5PC100_CLKDIV0_ARM_MASK) | ||
| 123 | div = S5PC100_CLKDIV0_ARM_MASK; | ||
| 124 | |||
| 125 | return parent / (div + 1); | ||
| 126 | } | ||
| 127 | |||
| 128 | static int s5pc100_clk_arm_set_rate(struct clk *clk, unsigned long rate) | ||
| 129 | { | ||
| 130 | unsigned long parent = clk_get_rate(clk->parent); | ||
| 131 | u32 div; | ||
| 132 | u32 val; | ||
| 133 | |||
| 134 | if (rate < parent / (S5PC100_CLKDIV0_ARM_MASK + 1)) | ||
| 135 | return -EINVAL; | ||
| 136 | |||
| 137 | rate = clk_round_rate(clk, rate); | ||
| 138 | div = clk_get_rate(clk->parent) / rate; | ||
| 139 | |||
| 140 | val = __raw_readl(S5PC100_CLKDIV0); | ||
| 141 | val &= S5PC100_CLKDIV0_ARM_MASK; | ||
| 142 | val |= (div - 1); | ||
| 143 | __raw_writel(val, S5PC100_CLKDIV0); | ||
| 144 | |||
| 145 | return 0; | ||
| 146 | } | ||
| 147 | |||
| 148 | static struct clk clk_arm = { | ||
| 149 | .name = "armclk", | ||
| 150 | .id = -1, | ||
| 151 | .parent = &clk_dout_apll, | ||
| 152 | .ops = &(struct clk_ops) { | ||
| 153 | .get_rate = s5pc100_clk_arm_get_rate, | ||
| 154 | .set_rate = s5pc100_clk_arm_set_rate, | ||
| 155 | .round_rate = s5pc100_clk_arm_round_rate, | ||
| 156 | }, | ||
| 157 | }; | ||
| 158 | |||
| 159 | static unsigned long s5pc100_clk_dout_d0_bus_get_rate(struct clk *clk) | ||
| 160 | { | ||
| 161 | unsigned long rate = clk_get_rate(clk->parent); | ||
| 162 | unsigned int ratio; | ||
| 163 | |||
| 164 | ratio = __raw_readl(S5PC100_CLKDIV0) & S5PC100_CLKDIV0_D0_MASK; | ||
| 165 | ratio >>= S5PC100_CLKDIV0_D0_SHIFT; | ||
| 166 | |||
| 167 | return rate / (ratio + 1); | ||
| 168 | } | ||
| 169 | |||
| 170 | static struct clk clk_dout_d0_bus = { | ||
| 171 | .name = "dout_d0_bus", | ||
| 172 | .id = -1, | ||
| 173 | .parent = &clk_arm, | ||
| 174 | .ops = &(struct clk_ops) { | ||
| 175 | .get_rate = s5pc100_clk_dout_d0_bus_get_rate, | ||
| 176 | }, | ||
| 177 | }; | ||
| 178 | |||
| 179 | static unsigned long s5pc100_clk_dout_pclkd0_get_rate(struct clk *clk) | ||
| 180 | { | ||
| 181 | unsigned long rate = clk_get_rate(clk->parent); | ||
| 182 | unsigned int ratio; | ||
| 183 | |||
| 184 | ratio = __raw_readl(S5PC100_CLKDIV0) & S5PC100_CLKDIV0_PCLKD0_MASK; | ||
| 185 | ratio >>= S5PC100_CLKDIV0_PCLKD0_SHIFT; | ||
| 186 | |||
| 187 | return rate / (ratio + 1); | ||
| 188 | } | ||
| 189 | |||
| 190 | static struct clk clk_dout_pclkd0 = { | ||
| 191 | .name = "dout_pclkd0", | ||
| 192 | .id = -1, | ||
| 193 | .parent = &clk_dout_d0_bus, | ||
| 194 | .ops = &(struct clk_ops) { | ||
| 195 | .get_rate = s5pc100_clk_dout_pclkd0_get_rate, | ||
| 196 | }, | ||
| 197 | }; | ||
| 198 | |||
| 199 | static unsigned long s5pc100_clk_dout_apll2_get_rate(struct clk *clk) | ||
| 200 | { | ||
| 201 | unsigned long rate = clk_get_rate(clk->parent); | ||
| 202 | unsigned int ratio; | ||
| 203 | |||
| 204 | ratio = __raw_readl(S5PC100_CLKDIV1) & S5PC100_CLKDIV1_APLL2_MASK; | ||
| 205 | ratio >>= S5PC100_CLKDIV1_APLL2_SHIFT; | ||
| 206 | |||
| 207 | return rate / (ratio + 1); | ||
| 208 | } | ||
| 209 | |||
| 210 | static struct clk clk_dout_apll2 = { | ||
| 211 | .name = "dout_apll2", | ||
| 212 | .id = -1, | ||
| 213 | .parent = &clk_mout_apll.clk, | ||
| 214 | .ops = &(struct clk_ops) { | ||
| 215 | .get_rate = s5pc100_clk_dout_apll2_get_rate, | ||
| 216 | }, | ||
| 217 | }; | ||
| 218 | |||
| 219 | /* MPLL */ | ||
| 220 | static struct clk *clk_src_mpll_list[] = { | ||
| 221 | [0] = &clk_fin_mpll, | ||
| 222 | [1] = &clk_fout_mpll, | ||
| 223 | }; | ||
| 224 | |||
| 225 | static struct clksrc_sources clk_src_mpll = { | ||
| 226 | .sources = clk_src_mpll_list, | ||
| 227 | .nr_sources = ARRAY_SIZE(clk_src_mpll_list), | ||
| 228 | }; | ||
| 229 | |||
| 230 | static struct clksrc_clk clk_mout_mpll = { | ||
| 231 | .clk = { | ||
| 232 | .name = "mout_mpll", | ||
| 233 | .id = -1, | ||
| 234 | }, | ||
| 235 | .sources = &clk_src_mpll, | ||
| 236 | .reg_src = { .reg = S5PC100_CLKSRC0, .shift = 4, .size = 1, }, | ||
| 237 | }; | ||
| 238 | |||
| 239 | static struct clk *clkset_am_list[] = { | ||
| 240 | [0] = &clk_mout_mpll.clk, | ||
| 241 | [1] = &clk_dout_apll2, | ||
| 242 | }; | ||
| 243 | |||
| 244 | static struct clksrc_sources clk_src_am = { | ||
| 245 | .sources = clkset_am_list, | ||
| 246 | .nr_sources = ARRAY_SIZE(clkset_am_list), | ||
| 247 | }; | ||
| 248 | |||
| 249 | static struct clksrc_clk clk_mout_am = { | ||
| 250 | .clk = { | ||
| 251 | .name = "mout_am", | ||
| 252 | .id = -1, | ||
| 253 | }, | ||
| 254 | .sources = &clk_src_am, | ||
| 255 | .reg_src = { .reg = S5PC100_CLKSRC0, .shift = 16, .size = 1, }, | ||
| 256 | }; | ||
| 257 | |||
| 258 | static unsigned long s5pc100_clk_dout_d1_bus_get_rate(struct clk *clk) | ||
| 259 | { | ||
| 260 | unsigned long rate = clk_get_rate(clk->parent); | ||
| 261 | unsigned int ratio; | ||
| 262 | |||
| 263 | printk(KERN_DEBUG "%s: parent is %ld\n", __func__, rate); | ||
| 264 | |||
| 265 | ratio = __raw_readl(S5PC100_CLKDIV1) & S5PC100_CLKDIV1_D1_MASK; | ||
| 266 | ratio >>= S5PC100_CLKDIV1_D1_SHIFT; | ||
| 267 | |||
| 268 | return rate / (ratio + 1); | ||
| 269 | } | ||
| 270 | |||
| 271 | static struct clk clk_dout_d1_bus = { | ||
| 272 | .name = "dout_d1_bus", | ||
| 273 | .id = -1, | ||
| 274 | .parent = &clk_mout_am.clk, | ||
| 275 | .ops = &(struct clk_ops) { | ||
| 276 | .get_rate = s5pc100_clk_dout_d1_bus_get_rate, | ||
| 277 | }, | ||
| 278 | }; | ||
| 279 | |||
| 280 | static struct clk *clkset_onenand_list[] = { | ||
| 281 | [0] = &clk_dout_d0_bus, | ||
| 282 | [1] = &clk_dout_d1_bus, | ||
| 283 | }; | ||
| 284 | |||
| 285 | static struct clksrc_sources clk_src_onenand = { | ||
| 286 | .sources = clkset_onenand_list, | ||
| 287 | .nr_sources = ARRAY_SIZE(clkset_onenand_list), | ||
| 288 | }; | ||
| 289 | |||
| 290 | static struct clksrc_clk clk_mout_onenand = { | ||
| 291 | .clk = { | ||
| 292 | .name = "mout_onenand", | ||
| 293 | .id = -1, | ||
| 294 | }, | ||
| 295 | .sources = &clk_src_onenand, | ||
| 296 | .reg_src = { .reg = S5PC100_CLKSRC0, .shift = 24, .size = 1, }, | ||
| 297 | }; | ||
| 298 | |||
| 299 | static unsigned long s5pc100_clk_dout_pclkd1_get_rate(struct clk *clk) | ||
| 300 | { | ||
| 301 | unsigned long rate = clk_get_rate(clk->parent); | ||
| 302 | unsigned int ratio; | ||
| 303 | |||
| 304 | printk(KERN_DEBUG "%s: parent is %ld\n", __func__, rate); | ||
| 305 | |||
| 306 | ratio = __raw_readl(S5PC100_CLKDIV1) & S5PC100_CLKDIV1_PCLKD1_MASK; | ||
| 307 | ratio >>= S5PC100_CLKDIV1_PCLKD1_SHIFT; | ||
| 308 | |||
| 309 | return rate / (ratio + 1); | ||
| 310 | } | ||
| 311 | |||
| 312 | static struct clk clk_dout_pclkd1 = { | ||
| 313 | .name = "dout_pclkd1", | ||
| 314 | .id = -1, | ||
| 315 | .parent = &clk_dout_d1_bus, | ||
| 316 | .ops = &(struct clk_ops) { | ||
| 317 | .get_rate = s5pc100_clk_dout_pclkd1_get_rate, | ||
| 318 | }, | ||
| 319 | }; | ||
| 320 | |||
| 321 | static unsigned long s5pc100_clk_dout_mpll2_get_rate(struct clk *clk) | ||
| 322 | { | ||
| 323 | unsigned long rate = clk_get_rate(clk->parent); | ||
| 324 | unsigned int ratio; | ||
| 325 | |||
| 326 | printk(KERN_DEBUG "%s: parent is %ld\n", __func__, rate); | ||
| 327 | |||
| 328 | ratio = __raw_readl(S5PC100_CLKDIV1) & S5PC100_CLKDIV1_MPLL2_MASK; | ||
| 329 | ratio >>= S5PC100_CLKDIV1_MPLL2_SHIFT; | ||
| 330 | |||
| 331 | return rate / (ratio + 1); | ||
| 332 | } | ||
| 333 | |||
| 334 | static struct clk clk_dout_mpll2 = { | ||
| 335 | .name = "dout_mpll2", | ||
| 336 | .id = -1, | ||
| 337 | .parent = &clk_mout_am.clk, | ||
| 338 | .ops = &(struct clk_ops) { | ||
| 339 | .get_rate = s5pc100_clk_dout_mpll2_get_rate, | ||
| 340 | }, | ||
| 341 | }; | ||
| 342 | |||
| 343 | static unsigned long s5pc100_clk_dout_cam_get_rate(struct clk *clk) | ||
| 344 | { | ||
| 345 | unsigned long rate = clk_get_rate(clk->parent); | ||
| 346 | unsigned int ratio; | ||
| 347 | |||
| 348 | printk(KERN_DEBUG "%s: parent is %ld\n", __func__, rate); | ||
| 349 | |||
| 350 | ratio = __raw_readl(S5PC100_CLKDIV1) & S5PC100_CLKDIV1_CAM_MASK; | ||
| 351 | ratio >>= S5PC100_CLKDIV1_CAM_SHIFT; | ||
| 352 | |||
| 353 | return rate / (ratio + 1); | ||
| 354 | } | ||
| 355 | |||
| 356 | static struct clk clk_dout_cam = { | ||
| 357 | .name = "dout_cam", | ||
| 358 | .id = -1, | ||
| 359 | .parent = &clk_dout_mpll2, | ||
| 360 | .ops = &(struct clk_ops) { | ||
| 361 | .get_rate = s5pc100_clk_dout_cam_get_rate, | ||
| 362 | }, | ||
| 363 | }; | ||
| 364 | |||
| 365 | static unsigned long s5pc100_clk_dout_mpll_get_rate(struct clk *clk) | ||
| 366 | { | ||
| 367 | unsigned long rate = clk_get_rate(clk->parent); | ||
| 368 | unsigned int ratio; | ||
| 369 | |||
| 370 | printk(KERN_DEBUG "%s: parent is %ld\n", __func__, rate); | ||
| 371 | |||
| 372 | ratio = __raw_readl(S5PC100_CLKDIV1) & S5PC100_CLKDIV1_MPLL_MASK; | ||
| 373 | ratio >>= S5PC100_CLKDIV1_MPLL_SHIFT; | ||
| 374 | |||
| 375 | return rate / (ratio + 1); | ||
| 376 | } | ||
| 377 | |||
| 378 | static struct clk clk_dout_mpll = { | ||
| 379 | .name = "dout_mpll", | ||
| 380 | .id = -1, | ||
| 381 | .parent = &clk_mout_am.clk, | ||
| 382 | .ops = &(struct clk_ops) { | ||
| 383 | .get_rate = s5pc100_clk_dout_mpll_get_rate, | ||
| 384 | }, | ||
| 385 | }; | ||
| 386 | |||
| 387 | /* EPLL */ | ||
| 388 | static struct clk clk_fout_epll = { | ||
| 389 | .name = "fout_epll", | ||
| 390 | .id = -1, | ||
| 391 | }; | ||
| 392 | |||
| 393 | static struct clk *clk_src_epll_list[] = { | ||
| 394 | [0] = &clk_fin_epll, | ||
| 395 | [1] = &clk_fout_epll, | ||
| 396 | }; | ||
| 397 | |||
| 398 | static struct clksrc_sources clk_src_epll = { | ||
| 399 | .sources = clk_src_epll_list, | ||
| 400 | .nr_sources = ARRAY_SIZE(clk_src_epll_list), | ||
| 401 | }; | ||
| 402 | |||
| 403 | static struct clksrc_clk clk_mout_epll = { | ||
| 404 | .clk = { | ||
| 405 | .name = "mout_epll", | ||
| 406 | .id = -1, | ||
| 407 | }, | ||
| 408 | .sources = &clk_src_epll, | ||
| 409 | .reg_src = { .reg = S5PC100_CLKSRC0, .shift = 8, .size = 1, }, | ||
| 410 | }; | ||
| 411 | |||
| 412 | /* HPLL */ | ||
| 413 | static struct clk clk_fout_hpll = { | ||
| 414 | .name = "fout_hpll", | ||
| 415 | .id = -1, | ||
| 416 | }; | ||
| 417 | |||
| 418 | static struct clk *clk_src_hpll_list[] = { | ||
| 419 | [0] = &clk_27m, | ||
| 420 | [1] = &clk_fout_hpll, | ||
| 421 | }; | ||
| 422 | |||
| 423 | static struct clksrc_sources clk_src_hpll = { | ||
| 424 | .sources = clk_src_hpll_list, | ||
| 425 | .nr_sources = ARRAY_SIZE(clk_src_hpll_list), | ||
| 426 | }; | ||
| 427 | |||
| 428 | static struct clksrc_clk clk_mout_hpll = { | ||
| 429 | .clk = { | ||
| 430 | .name = "mout_hpll", | ||
| 431 | .id = -1, | ||
| 432 | }, | ||
| 433 | .sources = &clk_src_hpll, | ||
| 434 | .reg_src = { .reg = S5PC100_CLKSRC0, .shift = 12, .size = 1, }, | ||
| 435 | }; | ||
| 436 | |||
| 437 | /* Peripherals */ | ||
| 438 | /* | ||
| 439 | * The peripheral clocks are all controlled via clocksource followed | ||
| 440 | * by an optional divider and gate stage. We currently roll this into | ||
| 441 | * one clock which hides the intermediate clock from the mux. | ||
| 442 | * | ||
| 443 | * Note, the JPEG clock can only be an even divider... | ||
| 444 | * | ||
| 445 | * The scaler and LCD clocks depend on the S5PC100 version, and also | ||
| 446 | * have a common parent divisor so are not included here. | ||
| 447 | */ | ||
| 448 | |||
| 449 | static struct clk clk_iis_cd0 = { | ||
| 450 | .name = "iis_cdclk0", | ||
| 451 | .id = -1, | ||
| 452 | }; | ||
| 453 | |||
| 454 | static struct clk clk_iis_cd1 = { | ||
| 455 | .name = "iis_cdclk1", | ||
| 456 | .id = -1, | ||
| 457 | }; | ||
| 458 | |||
| 459 | static struct clk clk_iis_cd2 = { | ||
| 460 | .name = "iis_cdclk2", | ||
| 461 | .id = -1, | ||
| 462 | }; | ||
| 463 | |||
| 464 | static struct clk clk_pcm_cd0 = { | ||
| 465 | .name = "pcm_cdclk0", | ||
| 466 | .id = -1, | ||
| 467 | }; | ||
| 468 | |||
| 469 | static struct clk clk_pcm_cd1 = { | ||
| 470 | .name = "pcm_cdclk1", | ||
| 471 | .id = -1, | ||
| 472 | }; | ||
| 473 | |||
| 474 | static struct clk *clkset_audio0_list[] = { | ||
| 475 | &clk_mout_epll.clk, | ||
| 476 | &clk_dout_mpll, | ||
| 477 | &clk_fin_epll, | ||
| 478 | &clk_iis_cd0, | ||
| 479 | &clk_pcm_cd0, | ||
| 480 | &clk_mout_hpll.clk, | ||
| 481 | }; | ||
| 482 | |||
| 483 | static struct clksrc_sources clkset_audio0 = { | ||
| 484 | .sources = clkset_audio0_list, | ||
| 485 | .nr_sources = ARRAY_SIZE(clkset_audio0_list), | ||
| 486 | }; | ||
| 487 | |||
| 488 | static struct clk *clkset_spi_list[] = { | ||
| 489 | &clk_mout_epll.clk, | ||
| 490 | &clk_dout_mpll2, | ||
| 491 | &clk_fin_epll, | ||
| 492 | &clk_mout_hpll.clk, | ||
| 493 | }; | ||
| 494 | |||
| 495 | static struct clksrc_sources clkset_spi = { | ||
| 496 | .sources = clkset_spi_list, | ||
| 497 | .nr_sources = ARRAY_SIZE(clkset_spi_list), | ||
| 498 | }; | ||
| 499 | |||
| 500 | static struct clk *clkset_uart_list[] = { | ||
| 501 | &clk_mout_epll.clk, | ||
| 502 | &clk_dout_mpll, | ||
| 503 | }; | ||
| 504 | |||
| 505 | static struct clksrc_sources clkset_uart = { | ||
| 506 | .sources = clkset_uart_list, | ||
| 507 | .nr_sources = ARRAY_SIZE(clkset_uart_list), | ||
| 508 | }; | ||
| 509 | |||
| 510 | static struct clk *clkset_audio1_list[] = { | ||
| 511 | &clk_mout_epll.clk, | ||
| 512 | &clk_dout_mpll, | ||
| 513 | &clk_fin_epll, | ||
| 514 | &clk_iis_cd1, | ||
| 515 | &clk_pcm_cd1, | ||
| 516 | &clk_mout_hpll.clk, | ||
| 517 | }; | ||
| 518 | |||
| 519 | static struct clksrc_sources clkset_audio1 = { | ||
| 520 | .sources = clkset_audio1_list, | ||
| 521 | .nr_sources = ARRAY_SIZE(clkset_audio1_list), | ||
| 522 | }; | ||
| 523 | |||
| 524 | static struct clk *clkset_audio2_list[] = { | ||
| 525 | &clk_mout_epll.clk, | ||
| 526 | &clk_dout_mpll, | ||
| 527 | &clk_fin_epll, | ||
| 528 | &clk_iis_cd2, | ||
| 529 | &clk_mout_hpll.clk, | ||
| 530 | }; | ||
| 531 | |||
| 532 | static struct clksrc_sources clkset_audio2 = { | ||
| 533 | .sources = clkset_audio2_list, | ||
| 534 | .nr_sources = ARRAY_SIZE(clkset_audio2_list), | ||
| 535 | }; | ||
| 536 | |||
| 537 | static struct clksrc_clk clksrc_audio[] = { | ||
| 538 | { | ||
| 539 | .clk = { | ||
| 540 | .name = "audio-bus", | ||
| 541 | .id = 0, | ||
| 542 | .ctrlbit = S5PC100_CLKGATE_SCLK1_AUDIO0, | ||
| 543 | .enable = s5pc100_sclk1_ctrl, | ||
| 544 | }, | ||
| 545 | .sources = &clkset_audio0, | ||
| 546 | .reg_div = { .reg = S5PC100_CLKDIV4, .shift = 12, .size = 4, }, | ||
| 547 | .reg_src = { .reg = S5PC100_CLKSRC3, .shift = 12, .size = 3, }, | ||
| 548 | }, { | ||
| 549 | .clk = { | ||
| 550 | .name = "audio-bus", | ||
| 551 | .id = 1, | ||
| 552 | .ctrlbit = S5PC100_CLKGATE_SCLK1_AUDIO1, | ||
| 553 | .enable = s5pc100_sclk1_ctrl, | ||
| 554 | }, | ||
| 555 | .sources = &clkset_audio1, | ||
| 556 | .reg_div = { .reg = S5PC100_CLKDIV4, .shift = 16, .size = 4, }, | ||
| 557 | .reg_src = { .reg = S5PC100_CLKSRC3, .shift = 16, .size = 3, }, | ||
| 558 | }, { | ||
| 559 | .clk = { | ||
| 560 | .name = "audio-bus", | ||
| 561 | .id = 2, | ||
| 562 | .ctrlbit = S5PC100_CLKGATE_SCLK1_AUDIO2, | ||
| 563 | .enable = s5pc100_sclk1_ctrl, | ||
| 564 | }, | ||
| 565 | .sources = &clkset_audio2, | ||
| 566 | .reg_div = { .reg = S5PC100_CLKDIV4, .shift = 20, .size = 4, }, | ||
| 567 | .reg_src = { .reg = S5PC100_CLKSRC3, .shift = 20, .size = 3, }, | ||
| 568 | }, | ||
| 569 | }; | ||
| 570 | |||
| 571 | static struct clk *clkset_spdif_list[] = { | ||
| 572 | &clksrc_audio[0].clk, | ||
| 573 | &clksrc_audio[1].clk, | ||
| 574 | &clksrc_audio[2].clk, | ||
| 575 | }; | ||
| 576 | |||
| 577 | static struct clksrc_sources clkset_spdif = { | ||
| 578 | .sources = clkset_spdif_list, | ||
| 579 | .nr_sources = ARRAY_SIZE(clkset_spdif_list), | ||
| 580 | }; | ||
| 581 | |||
| 582 | static struct clk *clkset_lcd_fimc_list[] = { | ||
| 583 | &clk_mout_epll.clk, | ||
| 584 | &clk_dout_mpll, | ||
| 585 | &clk_mout_hpll.clk, | ||
| 586 | &clk_vclk_54m, | ||
| 587 | }; | ||
| 588 | |||
| 589 | static struct clksrc_sources clkset_lcd_fimc = { | ||
| 590 | .sources = clkset_lcd_fimc_list, | ||
| 591 | .nr_sources = ARRAY_SIZE(clkset_lcd_fimc_list), | ||
| 592 | }; | ||
| 593 | |||
| 594 | static struct clk *clkset_mmc_list[] = { | ||
| 595 | &clk_mout_epll.clk, | ||
| 596 | &clk_dout_mpll, | ||
| 597 | &clk_fin_epll, | ||
| 598 | &clk_mout_hpll.clk , | ||
| 599 | }; | ||
| 600 | |||
| 601 | static struct clksrc_sources clkset_mmc = { | ||
| 602 | .sources = clkset_mmc_list, | ||
| 603 | .nr_sources = ARRAY_SIZE(clkset_mmc_list), | ||
| 604 | }; | ||
| 605 | |||
| 606 | static struct clk *clkset_usbhost_list[] = { | ||
| 607 | &clk_mout_epll.clk, | ||
| 608 | &clk_dout_mpll, | ||
| 609 | &clk_mout_hpll.clk, | ||
| 610 | &clk_48m, | ||
| 611 | }; | ||
| 612 | |||
| 613 | static struct clksrc_sources clkset_usbhost = { | ||
| 614 | .sources = clkset_usbhost_list, | ||
| 615 | .nr_sources = ARRAY_SIZE(clkset_usbhost_list), | ||
| 616 | }; | ||
| 617 | |||
| 618 | static struct clksrc_clk clksrc_clks[] = { | ||
| 619 | { | ||
| 620 | .clk = { | ||
| 621 | .name = "spi_bus", | ||
| 622 | .id = 0, | ||
| 623 | .ctrlbit = S5PC100_CLKGATE_SCLK0_SPI0, | ||
| 624 | .enable = s5pc100_sclk0_ctrl, | ||
| 625 | |||
| 626 | }, | ||
| 627 | .sources = &clkset_spi, | ||
| 628 | .reg_div = { .reg = S5PC100_CLKDIV2, .shift = 4, .size = 4, }, | ||
| 629 | .reg_src = { .reg = S5PC100_CLKSRC1, .shift = 4, .size = 2, }, | ||
| 630 | }, { | ||
| 631 | .clk = { | ||
| 632 | .name = "spi_bus", | ||
| 633 | .id = 1, | ||
| 634 | .ctrlbit = S5PC100_CLKGATE_SCLK0_SPI1, | ||
| 635 | .enable = s5pc100_sclk0_ctrl, | ||
| 636 | }, | ||
| 637 | .sources = &clkset_spi, | ||
| 638 | .reg_div = { .reg = S5PC100_CLKDIV2, .shift = 8, .size = 4, }, | ||
| 639 | .reg_src = { .reg = S5PC100_CLKSRC1, .shift = 8, .size = 2, }, | ||
| 640 | }, { | ||
| 641 | .clk = { | ||
| 642 | .name = "spi_bus", | ||
| 643 | .id = 2, | ||
| 644 | .ctrlbit = S5PC100_CLKGATE_SCLK0_SPI2, | ||
| 645 | .enable = s5pc100_sclk0_ctrl, | ||
| 646 | }, | ||
| 647 | .sources = &clkset_spi, | ||
| 648 | .reg_div = { .reg = S5PC100_CLKDIV2, .shift = 12, .size = 4, }, | ||
| 649 | .reg_src = { .reg = S5PC100_CLKSRC1, .shift = 12, .size = 2, }, | ||
| 650 | }, { | ||
| 651 | .clk = { | ||
| 652 | .name = "uclk1", | ||
| 653 | .id = -1, | ||
| 654 | .ctrlbit = S5PC100_CLKGATE_SCLK0_UART, | ||
| 655 | .enable = s5pc100_sclk0_ctrl, | ||
| 656 | }, | ||
| 657 | .sources = &clkset_uart, | ||
| 658 | .reg_div = { .reg = S5PC100_CLKDIV2, .shift = 0, .size = 3, }, | ||
| 659 | .reg_src = { .reg = S5PC100_CLKSRC1, .shift = 0, .size = 1, }, | ||
| 660 | }, { | ||
| 661 | .clk = { | ||
| 662 | .name = "spdif", | ||
| 663 | .id = -1, | ||
| 664 | }, | ||
| 665 | .sources = &clkset_spdif, | ||
| 666 | .reg_src = { .reg = S5PC100_CLKSRC3, .shift = 24, .size = 2, }, | ||
| 667 | }, { | ||
| 668 | .clk = { | ||
| 669 | .name = "lcd", | ||
| 670 | .id = -1, | ||
| 671 | .ctrlbit = S5PC100_CLKGATE_SCLK1_LCD, | ||
| 672 | .enable = s5pc100_sclk1_ctrl, | ||
| 673 | }, | ||
| 674 | .sources = &clkset_lcd_fimc, | ||
| 675 | .reg_div = { .reg = S5PC100_CLKDIV3, .shift = 12, .size = 4, }, | ||
| 676 | .reg_src = { .reg = S5PC100_CLKSRC2, .shift = 12, .size = 2, }, | ||
| 677 | }, { | ||
| 678 | .clk = { | ||
| 679 | .name = "fimc", | ||
| 680 | .id = 0, | ||
| 681 | .ctrlbit = S5PC100_CLKGATE_SCLK1_FIMC0, | ||
| 682 | .enable = s5pc100_sclk1_ctrl, | ||
| 683 | }, | ||
| 684 | .sources = &clkset_lcd_fimc, | ||
| 685 | .reg_div = { .reg = S5PC100_CLKDIV3, .shift = 16, .size = 4, }, | ||
| 686 | .reg_src = { .reg = S5PC100_CLKSRC2, .shift = 16, .size = 2, }, | ||
| 687 | }, { | ||
| 688 | .clk = { | ||
| 689 | .name = "fimc", | ||
| 690 | .id = 1, | ||
| 691 | .ctrlbit = S5PC100_CLKGATE_SCLK1_FIMC1, | ||
| 692 | .enable = s5pc100_sclk1_ctrl, | ||
| 693 | }, | ||
| 694 | .sources = &clkset_lcd_fimc, | ||
| 695 | .reg_div = { .reg = S5PC100_CLKDIV3, .shift = 20, .size = 4, }, | ||
| 696 | .reg_src = { .reg = S5PC100_CLKSRC2, .shift = 20, .size = 2, }, | ||
| 697 | }, { | ||
| 698 | .clk = { | ||
| 699 | .name = "fimc", | ||
| 700 | .id = 2, | ||
| 701 | .ctrlbit = S5PC100_CLKGATE_SCLK1_FIMC2, | ||
| 702 | .enable = s5pc100_sclk1_ctrl, | ||
| 703 | }, | ||
| 704 | .sources = &clkset_lcd_fimc, | ||
| 705 | .reg_div = { .reg = S5PC100_CLKDIV3, .shift = 24, .size = 4, }, | ||
| 706 | .reg_src = { .reg = S5PC100_CLKSRC2, .shift = 24, .size = 2, }, | ||
| 707 | }, { | ||
| 708 | .clk = { | ||
| 709 | .name = "mmc_bus", | ||
| 710 | .id = 0, | ||
| 711 | .ctrlbit = S5PC100_CLKGATE_SCLK0_MMC0, | ||
| 712 | .enable = s5pc100_sclk0_ctrl, | ||
| 713 | }, | ||
| 714 | .sources = &clkset_mmc, | ||
| 715 | .reg_div = { .reg = S5PC100_CLKDIV3, .shift = 0, .size = 4, }, | ||
| 716 | .reg_src = { .reg = S5PC100_CLKSRC2, .shift = 0, .size = 2, }, | ||
| 717 | }, { | ||
| 718 | .clk = { | ||
| 719 | .name = "mmc_bus", | ||
| 720 | .id = 1, | ||
| 721 | .ctrlbit = S5PC100_CLKGATE_SCLK0_MMC1, | ||
| 722 | .enable = s5pc100_sclk0_ctrl, | ||
| 723 | }, | ||
| 724 | .sources = &clkset_mmc, | ||
| 725 | .reg_div = { .reg = S5PC100_CLKDIV3, .shift = 4, .size = 4, }, | ||
| 726 | .reg_src = { .reg = S5PC100_CLKSRC2, .shift = 4, .size = 2, }, | ||
| 727 | }, { | ||
| 728 | .clk = { | ||
| 729 | .name = "mmc_bus", | ||
| 730 | .id = 2, | ||
| 731 | .ctrlbit = S5PC100_CLKGATE_SCLK0_MMC2, | ||
| 732 | .enable = s5pc100_sclk0_ctrl, | ||
| 733 | }, | ||
| 734 | .sources = &clkset_mmc, | ||
| 735 | .reg_div = { .reg = S5PC100_CLKDIV3, .shift = 8, .size = 4, }, | ||
| 736 | .reg_src = { .reg = S5PC100_CLKSRC2, .shift = 8, .size = 2, }, | ||
| 737 | }, { | ||
| 738 | .clk = { | ||
| 739 | .name = "usbhost", | ||
| 740 | .id = -1, | ||
| 741 | .ctrlbit = S5PC100_CLKGATE_SCLK0_USBHOST, | ||
| 742 | .enable = s5pc100_sclk0_ctrl, | ||
| 743 | }, | ||
| 744 | .sources = &clkset_usbhost, | ||
| 745 | .reg_div = { .reg = S5PC100_CLKDIV2, .shift = 20, .size = 4, }, | ||
| 746 | .reg_src = { .reg = S5PC100_CLKSRC1, .shift = 20, .size = 2, }, | ||
| 747 | } | ||
| 748 | }; | ||
| 749 | |||
| 750 | /* Clock initialisation code */ | ||
| 751 | |||
| 752 | static struct clksrc_clk *init_parents[] = { | ||
| 753 | &clk_mout_apll, | ||
| 754 | &clk_mout_mpll, | ||
| 755 | &clk_mout_am, | ||
| 756 | &clk_mout_onenand, | ||
| 757 | &clk_mout_epll, | ||
| 758 | &clk_mout_hpll, | ||
| 759 | }; | ||
| 760 | |||
| 761 | #define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1) | ||
| 762 | |||
| 763 | void __init_or_cpufreq s5pc100_setup_clocks(void) | ||
| 764 | { | ||
| 765 | struct clk *xtal_clk; | ||
| 766 | unsigned long xtal; | ||
| 767 | unsigned long armclk; | ||
| 768 | unsigned long hclkd0; | ||
| 769 | unsigned long hclk; | ||
| 770 | unsigned long pclkd0; | ||
| 771 | unsigned long pclk; | ||
| 772 | unsigned long apll, mpll, epll, hpll; | ||
| 773 | unsigned int ptr; | ||
| 774 | u32 clkdiv0, clkdiv1; | ||
| 775 | |||
| 776 | printk(KERN_DEBUG "%s: registering clocks\n", __func__); | ||
| 777 | |||
| 778 | clkdiv0 = __raw_readl(S5PC100_CLKDIV0); | ||
| 779 | clkdiv1 = __raw_readl(S5PC100_CLKDIV1); | ||
| 780 | |||
| 781 | printk(KERN_DEBUG "%s: clkdiv0 = %08x, clkdiv1 = %08x\n", __func__, clkdiv0, clkdiv1); | ||
| 782 | |||
| 783 | xtal_clk = clk_get(NULL, "xtal"); | ||
| 784 | BUG_ON(IS_ERR(xtal_clk)); | ||
| 785 | |||
| 786 | xtal = clk_get_rate(xtal_clk); | ||
| 787 | clk_put(xtal_clk); | ||
| 788 | |||
| 789 | printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal); | ||
| 790 | |||
| 791 | apll = s5pc1xx_get_pll(xtal, __raw_readl(S5PC100_APLL_CON)); | ||
| 792 | mpll = s5pc1xx_get_pll(xtal, __raw_readl(S5PC100_MPLL_CON)); | ||
| 793 | epll = s5pc1xx_get_pll(xtal, __raw_readl(S5PC100_EPLL_CON)); | ||
| 794 | hpll = s5pc1xx_get_pll(xtal, __raw_readl(S5PC100_HPLL_CON)); | ||
| 795 | |||
| 796 | printk(KERN_INFO "S5PC100: Apll=%ld.%03ld Mhz, Mpll=%ld.%03ld Mhz" | ||
| 797 | ", Epll=%ld.%03ld Mhz, Hpll=%ld.%03ld Mhz\n", | ||
| 798 | print_mhz(apll), print_mhz(mpll), | ||
| 799 | print_mhz(epll), print_mhz(hpll)); | ||
| 800 | |||
| 801 | armclk = apll / GET_DIV(clkdiv0, S5PC100_CLKDIV0_APLL); | ||
| 802 | armclk = armclk / GET_DIV(clkdiv0, S5PC100_CLKDIV0_ARM); | ||
| 803 | hclkd0 = armclk / GET_DIV(clkdiv0, S5PC100_CLKDIV0_D0); | ||
| 804 | pclkd0 = hclkd0 / GET_DIV(clkdiv0, S5PC100_CLKDIV0_PCLKD0); | ||
| 805 | hclk = mpll / GET_DIV(clkdiv1, S5PC100_CLKDIV1_D1); | ||
| 806 | pclk = hclk / GET_DIV(clkdiv1, S5PC100_CLKDIV1_PCLKD1); | ||
| 807 | |||
| 808 | printk(KERN_INFO "S5PC100: ARMCLK=%ld.%03ld MHz, HCLKD0=%ld.%03ld MHz," | ||
| 809 | " PCLKD0=%ld.%03ld MHz\n, HCLK=%ld.%03ld MHz," | ||
| 810 | " PCLK=%ld.%03ld MHz\n", | ||
| 811 | print_mhz(armclk), print_mhz(hclkd0), | ||
| 812 | print_mhz(pclkd0), print_mhz(hclk), print_mhz(pclk)); | ||
| 813 | |||
| 814 | clk_fout_apll.rate = apll; | ||
| 815 | clk_fout_mpll.rate = mpll; | ||
| 816 | clk_fout_epll.rate = epll; | ||
| 817 | clk_fout_hpll.rate = hpll; | ||
| 818 | |||
| 819 | clk_h.rate = hclk; | ||
| 820 | clk_p.rate = pclk; | ||
| 821 | clk_f.rate = armclk; | ||
| 822 | |||
| 823 | for (ptr = 0; ptr < ARRAY_SIZE(init_parents); ptr++) | ||
| 824 | s3c_set_clksrc(init_parents[ptr], true); | ||
| 825 | |||
| 826 | for (ptr = 0; ptr < ARRAY_SIZE(clksrc_audio); ptr++) | ||
| 827 | s3c_set_clksrc(clksrc_audio + ptr, true); | ||
| 828 | |||
| 829 | for (ptr = 0; ptr < ARRAY_SIZE(clksrc_clks); ptr++) | ||
| 830 | s3c_set_clksrc(clksrc_clks + ptr, true); | ||
| 831 | } | ||
| 832 | |||
| 833 | static struct clk *clks[] __initdata = { | ||
| 834 | &clk_ext_xtal_mux, | ||
| 835 | &clk_dout_apll, | ||
| 836 | &clk_dout_d0_bus, | ||
| 837 | &clk_dout_pclkd0, | ||
| 838 | &clk_dout_apll2, | ||
| 839 | &clk_mout_apll.clk, | ||
| 840 | &clk_mout_mpll.clk, | ||
| 841 | &clk_mout_epll.clk, | ||
| 842 | &clk_mout_hpll.clk, | ||
| 843 | &clk_mout_am.clk, | ||
| 844 | &clk_dout_d1_bus, | ||
| 845 | &clk_mout_onenand.clk, | ||
| 846 | &clk_dout_pclkd1, | ||
| 847 | &clk_dout_mpll2, | ||
| 848 | &clk_dout_cam, | ||
| 849 | &clk_dout_mpll, | ||
| 850 | &clk_fout_epll, | ||
| 851 | &clk_iis_cd0, | ||
| 852 | &clk_iis_cd1, | ||
| 853 | &clk_iis_cd2, | ||
| 854 | &clk_pcm_cd0, | ||
| 855 | &clk_pcm_cd1, | ||
| 856 | &clk_arm, | ||
| 857 | }; | ||
| 858 | |||
| 859 | void __init s5pc100_register_clocks(void) | ||
| 860 | { | ||
| 861 | struct clk *clkp; | ||
| 862 | int ret; | ||
| 863 | int ptr; | ||
| 864 | |||
| 865 | for (ptr = 0; ptr < ARRAY_SIZE(clks); ptr++) { | ||
| 866 | clkp = clks[ptr]; | ||
| 867 | ret = s3c24xx_register_clock(clkp); | ||
| 868 | if (ret < 0) { | ||
| 869 | printk(KERN_ERR "Failed to register clock %s (%d)\n", | ||
| 870 | clkp->name, ret); | ||
| 871 | } | ||
| 872 | } | ||
| 873 | |||
| 874 | s3c_register_clksrc(clksrc_audio, ARRAY_SIZE(clksrc_audio)); | ||
| 875 | s3c_register_clksrc(clksrc_clks, ARRAY_SIZE(clksrc_clks)); | ||
| 876 | } | ||
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig index 229919e9744c..2753fb3e4f73 100644 --- a/arch/arm/plat-samsung/Kconfig +++ b/arch/arm/plat-samsung/Kconfig | |||
| @@ -6,7 +6,7 @@ | |||
| 6 | 6 | ||
| 7 | config PLAT_SAMSUNG | 7 | config PLAT_SAMSUNG |
| 8 | bool | 8 | bool |
| 9 | depends on ARCH_S3C2410 || ARCH_S3C24A0 || ARCH_S3C64XX || ARCH_S5PC1XX | 9 | depends on ARCH_S3C2410 || ARCH_S3C24A0 || ARCH_S3C64XX |
| 10 | select NO_IOPORT | 10 | select NO_IOPORT |
| 11 | default y | 11 | default y |
| 12 | help | 12 | help |
| @@ -170,6 +170,11 @@ config S3C_DEV_I2C1 | |||
| 170 | help | 170 | help |
| 171 | Compile in platform device definitions for I2C channel 1 | 171 | Compile in platform device definitions for I2C channel 1 |
| 172 | 172 | ||
| 173 | config S3C_DEV_I2C2 | ||
| 174 | bool | ||
| 175 | help | ||
| 176 | Compile in platform device definitions for I2C channel 2 | ||
| 177 | |||
| 173 | config S3C_DEV_FB | 178 | config S3C_DEV_FB |
| 174 | bool | 179 | bool |
| 175 | help | 180 | help |
| @@ -185,11 +190,22 @@ config S3C_DEV_USB_HSOTG | |||
| 185 | help | 190 | help |
| 186 | Compile in platform device definition for USB high-speed OtG | 191 | Compile in platform device definition for USB high-speed OtG |
| 187 | 192 | ||
| 193 | config S3C_DEV_WDT | ||
| 194 | bool | ||
| 195 | default y if ARCH_S3C2410 | ||
| 196 | help | ||
| 197 | Complie in platform device definition for Watchdog Timer | ||
| 198 | |||
| 188 | config S3C_DEV_NAND | 199 | config S3C_DEV_NAND |
| 189 | bool | 200 | bool |
| 190 | help | 201 | help |
| 191 | Compile in platform device definition for NAND controller | 202 | Compile in platform device definition for NAND controller |
| 192 | 203 | ||
| 204 | config S3C_DEV_ONENAND | ||
| 205 | bool | ||
| 206 | help | ||
| 207 | Compile in platform device definition for OneNAND controller | ||
| 208 | |||
| 193 | config S3C_DEV_RTC | 209 | config S3C_DEV_RTC |
| 194 | bool | 210 | bool |
| 195 | help | 211 | help |
| @@ -269,4 +285,12 @@ config SAMSUNG_PM_CHECK_CHUNKSIZE | |||
| 269 | 285 | ||
| 270 | See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt> | 286 | See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt> |
| 271 | 287 | ||
| 288 | config SAMSUNG_WAKEMASK | ||
| 289 | bool | ||
| 290 | depends on PM | ||
| 291 | help | ||
| 292 | Compile support for wakeup-mask controls found on the S3C6400 | ||
| 293 | and above. This code allows a set of interrupt to wakeup-mask | ||
| 294 | mappings. See <plat/wakeup-mask.h> | ||
| 295 | |||
| 272 | endif | 296 | endif |
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile index 48288499a3b9..b1d82cc5e716 100644 --- a/arch/arm/plat-samsung/Makefile +++ b/arch/arm/plat-samsung/Makefile | |||
| @@ -36,11 +36,14 @@ obj-$(CONFIG_S3C_DEV_HSMMC2) += dev-hsmmc2.o | |||
| 36 | obj-$(CONFIG_S3C_DEV_HWMON) += dev-hwmon.o | 36 | obj-$(CONFIG_S3C_DEV_HWMON) += dev-hwmon.o |
| 37 | obj-y += dev-i2c0.o | 37 | obj-y += dev-i2c0.o |
| 38 | obj-$(CONFIG_S3C_DEV_I2C1) += dev-i2c1.o | 38 | obj-$(CONFIG_S3C_DEV_I2C1) += dev-i2c1.o |
| 39 | obj-$(CONFIG_S3C_DEV_I2C2) += dev-i2c2.o | ||
| 39 | obj-$(CONFIG_S3C_DEV_FB) += dev-fb.o | 40 | obj-$(CONFIG_S3C_DEV_FB) += dev-fb.o |
| 40 | obj-y += dev-uart.o | 41 | obj-y += dev-uart.o |
| 41 | obj-$(CONFIG_S3C_DEV_USB_HOST) += dev-usb.o | 42 | obj-$(CONFIG_S3C_DEV_USB_HOST) += dev-usb.o |
| 42 | obj-$(CONFIG_S3C_DEV_USB_HSOTG) += dev-usb-hsotg.o | 43 | obj-$(CONFIG_S3C_DEV_USB_HSOTG) += dev-usb-hsotg.o |
| 44 | obj-$(CONFIG_S3C_DEV_WDT) += dev-wdt.o | ||
| 43 | obj-$(CONFIG_S3C_DEV_NAND) += dev-nand.o | 45 | obj-$(CONFIG_S3C_DEV_NAND) += dev-nand.o |
| 46 | obj-$(CONFIG_S3C_DEV_ONENAND) += dev-onenand.o | ||
| 44 | obj-$(CONFIG_S3C_DEV_RTC) += dev-rtc.o | 47 | obj-$(CONFIG_S3C_DEV_RTC) += dev-rtc.o |
| 45 | 48 | ||
| 46 | obj-$(CONFIG_SAMSUNG_DEV_ADC) += dev-adc.o | 49 | obj-$(CONFIG_SAMSUNG_DEV_ADC) += dev-adc.o |
| @@ -58,6 +61,8 @@ obj-$(CONFIG_PM) += pm.o | |||
| 58 | obj-$(CONFIG_PM) += pm-gpio.o | 61 | obj-$(CONFIG_PM) += pm-gpio.o |
| 59 | obj-$(CONFIG_SAMSUNG_PM_CHECK) += pm-check.o | 62 | obj-$(CONFIG_SAMSUNG_PM_CHECK) += pm-check.o |
| 60 | 63 | ||
| 64 | obj-$(CONFIG_SAMSUNG_WAKEMASK) += wakeup-mask.o | ||
| 65 | |||
| 61 | # PWM support | 66 | # PWM support |
| 62 | 67 | ||
| 63 | obj-$(CONFIG_HAVE_PWM) += pwm.o | 68 | obj-$(CONFIG_HAVE_PWM) += pwm.o |
diff --git a/arch/arm/plat-samsung/adc.c b/arch/arm/plat-samsung/adc.c index 210030d5cfe1..04d9521ddc9f 100644 --- a/arch/arm/plat-samsung/adc.c +++ b/arch/arm/plat-samsung/adc.c | |||
| @@ -66,6 +66,7 @@ struct adc_device { | |||
| 66 | struct s3c_adc_client *cur; | 66 | struct s3c_adc_client *cur; |
| 67 | struct s3c_adc_client *ts_pend; | 67 | struct s3c_adc_client *ts_pend; |
| 68 | void __iomem *regs; | 68 | void __iomem *regs; |
| 69 | spinlock_t lock; | ||
| 69 | 70 | ||
| 70 | unsigned int prescale; | 71 | unsigned int prescale; |
| 71 | 72 | ||
| @@ -74,7 +75,7 @@ struct adc_device { | |||
| 74 | 75 | ||
| 75 | static struct adc_device *adc_dev; | 76 | static struct adc_device *adc_dev; |
| 76 | 77 | ||
| 77 | static LIST_HEAD(adc_pending); | 78 | static LIST_HEAD(adc_pending); /* protected by adc_device.lock */ |
| 78 | 79 | ||
| 79 | #define adc_dbg(_adc, msg...) dev_dbg(&(_adc)->pdev->dev, msg) | 80 | #define adc_dbg(_adc, msg...) dev_dbg(&(_adc)->pdev->dev, msg) |
| 80 | 81 | ||
| @@ -145,7 +146,7 @@ int s3c_adc_start(struct s3c_adc_client *client, | |||
| 145 | if (client->is_ts && adc->ts_pend) | 146 | if (client->is_ts && adc->ts_pend) |
| 146 | return -EAGAIN; | 147 | return -EAGAIN; |
| 147 | 148 | ||
| 148 | local_irq_save(flags); | 149 | spin_lock_irqsave(&adc->lock, flags); |
| 149 | 150 | ||
| 150 | client->channel = channel; | 151 | client->channel = channel; |
| 151 | client->nr_samples = nr_samples; | 152 | client->nr_samples = nr_samples; |
| @@ -157,7 +158,8 @@ int s3c_adc_start(struct s3c_adc_client *client, | |||
| 157 | 158 | ||
| 158 | if (!adc->cur) | 159 | if (!adc->cur) |
| 159 | s3c_adc_try(adc); | 160 | s3c_adc_try(adc); |
| 160 | local_irq_restore(flags); | 161 | |
| 162 | spin_unlock_irqrestore(&adc->lock, flags); | ||
| 161 | 163 | ||
| 162 | return 0; | 164 | return 0; |
| 163 | } | 165 | } |
| @@ -237,6 +239,10 @@ EXPORT_SYMBOL_GPL(s3c_adc_register); | |||
| 237 | 239 | ||
| 238 | void s3c_adc_release(struct s3c_adc_client *client) | 240 | void s3c_adc_release(struct s3c_adc_client *client) |
| 239 | { | 241 | { |
| 242 | unsigned long flags; | ||
| 243 | |||
| 244 | spin_lock_irqsave(&adc_dev->lock, flags); | ||
| 245 | |||
| 240 | /* We should really check that nothing is in progress. */ | 246 | /* We should really check that nothing is in progress. */ |
| 241 | if (adc_dev->cur == client) | 247 | if (adc_dev->cur == client) |
| 242 | adc_dev->cur = NULL; | 248 | adc_dev->cur = NULL; |
| @@ -255,6 +261,8 @@ void s3c_adc_release(struct s3c_adc_client *client) | |||
| 255 | 261 | ||
| 256 | if (adc_dev->cur == NULL) | 262 | if (adc_dev->cur == NULL) |
| 257 | s3c_adc_try(adc_dev); | 263 | s3c_adc_try(adc_dev); |
| 264 | |||
| 265 | spin_unlock_irqrestore(&adc_dev->lock, flags); | ||
| 258 | kfree(client); | 266 | kfree(client); |
| 259 | } | 267 | } |
| 260 | EXPORT_SYMBOL_GPL(s3c_adc_release); | 268 | EXPORT_SYMBOL_GPL(s3c_adc_release); |
| @@ -264,7 +272,6 @@ static irqreturn_t s3c_adc_irq(int irq, void *pw) | |||
| 264 | struct adc_device *adc = pw; | 272 | struct adc_device *adc = pw; |
| 265 | struct s3c_adc_client *client = adc->cur; | 273 | struct s3c_adc_client *client = adc->cur; |
| 266 | enum s3c_cpu_type cpu = platform_get_device_id(adc->pdev)->driver_data; | 274 | enum s3c_cpu_type cpu = platform_get_device_id(adc->pdev)->driver_data; |
| 267 | unsigned long flags; | ||
| 268 | unsigned data0, data1; | 275 | unsigned data0, data1; |
| 269 | 276 | ||
| 270 | if (!client) { | 277 | if (!client) { |
| @@ -296,12 +303,12 @@ static irqreturn_t s3c_adc_irq(int irq, void *pw) | |||
| 296 | client->select_cb(client, 1); | 303 | client->select_cb(client, 1); |
| 297 | s3c_adc_convert(adc); | 304 | s3c_adc_convert(adc); |
| 298 | } else { | 305 | } else { |
| 299 | local_irq_save(flags); | 306 | spin_lock(&adc->lock); |
| 300 | (client->select_cb)(client, 0); | 307 | (client->select_cb)(client, 0); |
| 301 | adc->cur = NULL; | 308 | adc->cur = NULL; |
| 302 | 309 | ||
| 303 | s3c_adc_try(adc); | 310 | s3c_adc_try(adc); |
| 304 | local_irq_restore(flags); | 311 | spin_unlock(&adc->lock); |
| 305 | } | 312 | } |
| 306 | 313 | ||
| 307 | exit: | 314 | exit: |
| @@ -326,6 +333,8 @@ static int s3c_adc_probe(struct platform_device *pdev) | |||
| 326 | return -ENOMEM; | 333 | return -ENOMEM; |
| 327 | } | 334 | } |
| 328 | 335 | ||
| 336 | spin_lock_init(&adc->lock); | ||
| 337 | |||
| 329 | adc->pdev = pdev; | 338 | adc->pdev = pdev; |
| 330 | adc->prescale = S3C2410_ADCCON_PRSCVL(49); | 339 | adc->prescale = S3C2410_ADCCON_PRSCVL(49); |
| 331 | 340 | ||
| @@ -407,13 +416,17 @@ static int __devexit s3c_adc_remove(struct platform_device *pdev) | |||
| 407 | static int s3c_adc_suspend(struct platform_device *pdev, pm_message_t state) | 416 | static int s3c_adc_suspend(struct platform_device *pdev, pm_message_t state) |
| 408 | { | 417 | { |
| 409 | struct adc_device *adc = platform_get_drvdata(pdev); | 418 | struct adc_device *adc = platform_get_drvdata(pdev); |
| 419 | unsigned long flags; | ||
| 410 | u32 con; | 420 | u32 con; |
| 411 | 421 | ||
| 422 | spin_lock_irqsave(&adc->lock, flags); | ||
| 423 | |||
| 412 | con = readl(adc->regs + S3C2410_ADCCON); | 424 | con = readl(adc->regs + S3C2410_ADCCON); |
| 413 | con |= S3C2410_ADCCON_STDBM; | 425 | con |= S3C2410_ADCCON_STDBM; |
| 414 | writel(con, adc->regs + S3C2410_ADCCON); | 426 | writel(con, adc->regs + S3C2410_ADCCON); |
| 415 | 427 | ||
| 416 | disable_irq(adc->irq); | 428 | disable_irq(adc->irq); |
| 429 | spin_unlock_irqrestore(&adc->lock, flags); | ||
| 417 | clk_disable(adc->clk); | 430 | clk_disable(adc->clk); |
| 418 | 431 | ||
| 419 | return 0; | 432 | return 0; |
| @@ -422,6 +435,7 @@ static int s3c_adc_suspend(struct platform_device *pdev, pm_message_t state) | |||
| 422 | static int s3c_adc_resume(struct platform_device *pdev) | 435 | static int s3c_adc_resume(struct platform_device *pdev) |
| 423 | { | 436 | { |
| 424 | struct adc_device *adc = platform_get_drvdata(pdev); | 437 | struct adc_device *adc = platform_get_drvdata(pdev); |
| 438 | unsigned long flags; | ||
| 425 | 439 | ||
| 426 | clk_enable(adc->clk); | 440 | clk_enable(adc->clk); |
| 427 | enable_irq(adc->irq); | 441 | enable_irq(adc->irq); |
diff --git a/arch/arm/plat-samsung/dev-i2c2.c b/arch/arm/plat-samsung/dev-i2c2.c new file mode 100644 index 000000000000..07036dee09e7 --- /dev/null +++ b/arch/arm/plat-samsung/dev-i2c2.c | |||
| @@ -0,0 +1,70 @@ | |||
| 1 | /* linux/arch/arm/plat-s3c/dev-i2c2.c | ||
| 2 | * | ||
| 3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
| 4 | * http://www.samsung.com/ | ||
| 5 | * | ||
| 6 | * S3C series device definition for i2c device 2 | ||
| 7 | * | ||
| 8 | * Based on plat-samsung/dev-i2c0.c | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License version 2 as | ||
| 12 | * published by the Free Software Foundation. | ||
| 13 | */ | ||
| 14 | |||
| 15 | #include <linux/gfp.h> | ||
| 16 | #include <linux/kernel.h> | ||
| 17 | #include <linux/string.h> | ||
| 18 | #include <linux/platform_device.h> | ||
| 19 | |||
| 20 | #include <mach/irqs.h> | ||
| 21 | #include <mach/map.h> | ||
| 22 | |||
| 23 | #include <plat/regs-iic.h> | ||
| 24 | #include <plat/iic.h> | ||
| 25 | #include <plat/devs.h> | ||
| 26 | #include <plat/cpu.h> | ||
| 27 | |||
| 28 | static struct resource s3c_i2c_resource[] = { | ||
| 29 | [0] = { | ||
| 30 | .start = S3C_PA_IIC2, | ||
| 31 | .end = S3C_PA_IIC2 + SZ_4K - 1, | ||
| 32 | .flags = IORESOURCE_MEM, | ||
| 33 | }, | ||
| 34 | [1] = { | ||
| 35 | .start = IRQ_CAN0, | ||
| 36 | .end = IRQ_CAN0, | ||
| 37 | .flags = IORESOURCE_IRQ, | ||
| 38 | }, | ||
| 39 | }; | ||
| 40 | |||
| 41 | struct platform_device s3c_device_i2c2 = { | ||
| 42 | .name = "s3c2410-i2c", | ||
| 43 | .id = 2, | ||
| 44 | .num_resources = ARRAY_SIZE(s3c_i2c_resource), | ||
| 45 | .resource = s3c_i2c_resource, | ||
| 46 | }; | ||
| 47 | |||
| 48 | static struct s3c2410_platform_i2c default_i2c_data2 __initdata = { | ||
| 49 | .flags = 0, | ||
| 50 | .bus_num = 2, | ||
| 51 | .slave_addr = 0x10, | ||
| 52 | .frequency = 100*1000, | ||
| 53 | .sda_delay = 100, | ||
| 54 | }; | ||
| 55 | |||
| 56 | void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd) | ||
| 57 | { | ||
| 58 | struct s3c2410_platform_i2c *npd; | ||
| 59 | |||
| 60 | if (!pd) | ||
| 61 | pd = &default_i2c_data2; | ||
| 62 | |||
| 63 | npd = kmemdup(pd, sizeof(struct s3c2410_platform_i2c), GFP_KERNEL); | ||
| 64 | if (!npd) | ||
| 65 | printk(KERN_ERR "%s: no memory for platform data\n", __func__); | ||
| 66 | else if (!npd->cfg_gpio) | ||
| 67 | npd->cfg_gpio = s3c_i2c2_cfg_gpio; | ||
| 68 | |||
| 69 | s3c_device_i2c2.dev.platform_data = npd; | ||
| 70 | } | ||
diff --git a/arch/arm/plat-samsung/dev-onenand.c b/arch/arm/plat-samsung/dev-onenand.c new file mode 100644 index 000000000000..45ec73287d8c --- /dev/null +++ b/arch/arm/plat-samsung/dev-onenand.c | |||
| @@ -0,0 +1,55 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/plat-samsung/dev-onenand.c | ||
| 3 | * | ||
| 4 | * Copyright (c) 2008-2010 Samsung Electronics | ||
| 5 | * Kyungmin Park <kyungmin.park@samsung.com> | ||
| 6 | * | ||
| 7 | * S3C64XX/S5PC100 series device definition for OneNAND devices | ||
| 8 | * | ||
| 9 | * This program is free software; you can redistribute it and/or modify | ||
| 10 | * it under the terms of the GNU General Public License version 2 as | ||
| 11 | * published by the Free Software Foundation. | ||
| 12 | */ | ||
| 13 | |||
| 14 | #include <linux/kernel.h> | ||
| 15 | #include <linux/platform_device.h> | ||
| 16 | #include <linux/mtd/mtd.h> | ||
| 17 | #include <linux/mtd/onenand.h> | ||
| 18 | |||
| 19 | #include <mach/irqs.h> | ||
| 20 | #include <mach/map.h> | ||
| 21 | |||
| 22 | static struct resource s3c_onenand_resources[] = { | ||
| 23 | [0] = { | ||
| 24 | .start = S3C_PA_ONENAND, | ||
| 25 | .end = S3C_PA_ONENAND + 0x400 - 1, | ||
| 26 | .flags = IORESOURCE_MEM, | ||
| 27 | }, | ||
| 28 | [1] = { | ||
| 29 | .start = S3C_PA_ONENAND_BUF, | ||
| 30 | .end = S3C_PA_ONENAND_BUF + S3C_SZ_ONENAND_BUF - 1, | ||
| 31 | .flags = IORESOURCE_MEM, | ||
| 32 | }, | ||
| 33 | [2] = { | ||
| 34 | .start = IRQ_ONENAND, | ||
| 35 | .end = IRQ_ONENAND, | ||
| 36 | .flags = IORESOURCE_IRQ, | ||
| 37 | }, | ||
| 38 | }; | ||
| 39 | |||
| 40 | struct platform_device s3c_device_onenand = { | ||
| 41 | .name = "samsung-onenand", | ||
| 42 | .id = 0, | ||
| 43 | .num_resources = ARRAY_SIZE(s3c_onenand_resources), | ||
| 44 | .resource = s3c_onenand_resources, | ||
| 45 | }; | ||
| 46 | |||
| 47 | void s3c_onenand_set_platdata(struct onenand_platform_data *pdata) | ||
| 48 | { | ||
| 49 | struct onenand_platform_data *pd; | ||
| 50 | |||
| 51 | pd = kmemdup(pdata, sizeof(struct onenand_platform_data), GFP_KERNEL); | ||
| 52 | if (!pd) | ||
| 53 | printk(KERN_ERR "%s: no memory for platform data\n", __func__); | ||
| 54 | s3c_device_onenand.dev.platform_data = pd; | ||
| 55 | } | ||
diff --git a/arch/arm/plat-samsung/dev-wdt.c b/arch/arm/plat-samsung/dev-wdt.c new file mode 100644 index 000000000000..5efca87cddbd --- /dev/null +++ b/arch/arm/plat-samsung/dev-wdt.c | |||
| @@ -0,0 +1,40 @@ | |||
| 1 | /* linux/arch/arm/plat-samsung/dev-wdt.c | ||
| 2 | * | ||
| 3 | * Copyright (c) 2004 Simtec Electronics | ||
| 4 | * Ben Dooks <ben@simtec.co.uk> | ||
| 5 | * | ||
| 6 | * S3C series device definition for the watchdog timer | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License version 2 as | ||
| 10 | * published by the Free Software Foundation. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #include <linux/kernel.h> | ||
| 14 | #include <linux/platform_device.h> | ||
| 15 | |||
| 16 | #include <mach/irqs.h> | ||
| 17 | #include <mach/map.h> | ||
| 18 | |||
| 19 | #include <plat/devs.h> | ||
| 20 | |||
| 21 | static struct resource s3c_wdt_resource[] = { | ||
| 22 | [0] = { | ||
| 23 | .start = S3C_PA_WDT, | ||
| 24 | .end = S3C_PA_WDT + SZ_1M - 1, | ||
| 25 | .flags = IORESOURCE_MEM, | ||
| 26 | }, | ||
| 27 | [1] = { | ||
| 28 | .start = IRQ_WDT, | ||
| 29 | .end = IRQ_WDT, | ||
| 30 | .flags = IORESOURCE_IRQ, | ||
| 31 | } | ||
| 32 | }; | ||
| 33 | |||
| 34 | struct platform_device s3c_device_wdt = { | ||
| 35 | .name = "s3c2410-wdt", | ||
| 36 | .id = -1, | ||
| 37 | .num_resources = ARRAY_SIZE(s3c_wdt_resource), | ||
| 38 | .resource = s3c_wdt_resource, | ||
| 39 | }; | ||
| 40 | EXPORT_SYMBOL(s3c_device_wdt); | ||
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h index ef69e56b2885..e6144e4b9118 100644 --- a/arch/arm/plat-samsung/include/plat/devs.h +++ b/arch/arm/plat-samsung/include/plat/devs.h | |||
| @@ -45,6 +45,7 @@ extern struct platform_device s3c_device_lcd; | |||
| 45 | extern struct platform_device s3c_device_wdt; | 45 | extern struct platform_device s3c_device_wdt; |
| 46 | extern struct platform_device s3c_device_i2c0; | 46 | extern struct platform_device s3c_device_i2c0; |
| 47 | extern struct platform_device s3c_device_i2c1; | 47 | extern struct platform_device s3c_device_i2c1; |
| 48 | extern struct platform_device s3c_device_i2c2; | ||
| 48 | extern struct platform_device s3c_device_rtc; | 49 | extern struct platform_device s3c_device_rtc; |
| 49 | extern struct platform_device s3c_device_adc; | 50 | extern struct platform_device s3c_device_adc; |
| 50 | extern struct platform_device s3c_device_sdi; | 51 | extern struct platform_device s3c_device_sdi; |
| @@ -57,9 +58,20 @@ extern struct platform_device s3c_device_hsmmc2; | |||
| 57 | extern struct platform_device s3c_device_spi0; | 58 | extern struct platform_device s3c_device_spi0; |
| 58 | extern struct platform_device s3c_device_spi1; | 59 | extern struct platform_device s3c_device_spi1; |
| 59 | 60 | ||
| 61 | extern struct platform_device s5pc100_device_spi0; | ||
| 62 | extern struct platform_device s5pc100_device_spi1; | ||
| 63 | extern struct platform_device s5pc100_device_spi2; | ||
| 64 | extern struct platform_device s5pv210_device_spi0; | ||
| 65 | extern struct platform_device s5pv210_device_spi1; | ||
| 66 | extern struct platform_device s5p6440_device_spi0; | ||
| 67 | extern struct platform_device s5p6440_device_spi1; | ||
| 68 | |||
| 60 | extern struct platform_device s3c_device_hwmon; | 69 | extern struct platform_device s3c_device_hwmon; |
| 61 | 70 | ||
| 62 | extern struct platform_device s3c_device_nand; | 71 | extern struct platform_device s3c_device_nand; |
| 72 | extern struct platform_device s3c_device_onenand; | ||
| 73 | extern struct platform_device s3c64xx_device_onenand1; | ||
| 74 | extern struct platform_device s5pc110_device_onenand; | ||
| 63 | 75 | ||
| 64 | extern struct platform_device s3c_device_usbgadget; | 76 | extern struct platform_device s3c_device_usbgadget; |
| 65 | extern struct platform_device s3c_device_usb_hsotg; | 77 | extern struct platform_device s3c_device_usb_hsotg; |
| @@ -76,10 +88,18 @@ extern struct platform_device s5p6442_device_pcm0; | |||
| 76 | extern struct platform_device s5p6442_device_pcm1; | 88 | extern struct platform_device s5p6442_device_pcm1; |
| 77 | extern struct platform_device s5p6442_device_iis0; | 89 | extern struct platform_device s5p6442_device_iis0; |
| 78 | extern struct platform_device s5p6442_device_iis1; | 90 | extern struct platform_device s5p6442_device_iis1; |
| 91 | extern struct platform_device s5p6442_device_spi; | ||
| 79 | 92 | ||
| 80 | extern struct platform_device s5p6440_device_pcm; | 93 | extern struct platform_device s5p6440_device_pcm; |
| 81 | extern struct platform_device s5p6440_device_iis; | 94 | extern struct platform_device s5p6440_device_iis; |
| 82 | 95 | ||
| 96 | extern struct platform_device s5pc100_device_ac97; | ||
| 97 | extern struct platform_device s5pc100_device_pcm0; | ||
| 98 | extern struct platform_device s5pc100_device_pcm1; | ||
| 99 | extern struct platform_device s5pc100_device_iis0; | ||
| 100 | extern struct platform_device s5pc100_device_iis1; | ||
| 101 | extern struct platform_device s5pc100_device_iis2; | ||
| 102 | |||
| 83 | /* s3c2440 specific devices */ | 103 | /* s3c2440 specific devices */ |
| 84 | 104 | ||
| 85 | #ifdef CONFIG_CPU_S3C2440 | 105 | #ifdef CONFIG_CPU_S3C2440 |
diff --git a/arch/arm/plat-samsung/include/plat/fb.h b/arch/arm/plat-samsung/include/plat/fb.h index 1f85649d8c18..27d3b497b55b 100644 --- a/arch/arm/plat-samsung/include/plat/fb.h +++ b/arch/arm/plat-samsung/include/plat/fb.h | |||
| @@ -84,4 +84,11 @@ extern void s3c64xx_fb_gpio_setup_24bpp(void); | |||
| 84 | */ | 84 | */ |
| 85 | extern void s5pc100_fb_gpio_setup_24bpp(void); | 85 | extern void s5pc100_fb_gpio_setup_24bpp(void); |
| 86 | 86 | ||
| 87 | /** | ||
| 88 | * s5pv210_fb_gpio_setup_24bpp() - S5PV210/S5PC110 setup function for 24bpp LCD | ||
| 89 | * | ||
| 90 | * Initialise the GPIO for an 24bpp LCD display on the RGB interface. | ||
| 91 | */ | ||
| 92 | extern void s5pv210_fb_gpio_setup_24bpp(void); | ||
| 93 | |||
| 87 | #endif /* __PLAT_S3C_FB_H */ | 94 | #endif /* __PLAT_S3C_FB_H */ |
diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/arch/arm/plat-samsung/include/plat/gpio-cfg.h index 34efdd2b032c..db4112c6f2be 100644 --- a/arch/arm/plat-samsung/include/plat/gpio-cfg.h +++ b/arch/arm/plat-samsung/include/plat/gpio-cfg.h | |||
| @@ -43,6 +43,11 @@ struct s3c_gpio_chip; | |||
| 43 | * layouts. Provide an point to vector control routine and provide any | 43 | * layouts. Provide an point to vector control routine and provide any |
| 44 | * per-bank configuration information that other systems such as the | 44 | * per-bank configuration information that other systems such as the |
| 45 | * external interrupt code will need. | 45 | * external interrupt code will need. |
| 46 | * | ||
| 47 | * @sa s3c_gpio_cfgpin | ||
| 48 | * @sa s3c_gpio_getcfg | ||
| 49 | * @sa s3c_gpio_setpull | ||
| 50 | * @sa s3c_gpio_getpull | ||
| 46 | */ | 51 | */ |
| 47 | struct s3c_gpio_cfg { | 52 | struct s3c_gpio_cfg { |
| 48 | unsigned int cfg_eint; | 53 | unsigned int cfg_eint; |
| @@ -70,11 +75,25 @@ struct s3c_gpio_cfg { | |||
| 70 | /** | 75 | /** |
| 71 | * s3c_gpio_cfgpin() - Change the GPIO function of a pin. | 76 | * s3c_gpio_cfgpin() - Change the GPIO function of a pin. |
| 72 | * @pin pin The pin number to configure. | 77 | * @pin pin The pin number to configure. |
| 73 | * @pin to The configuration for the pin's function. | 78 | * @to to The configuration for the pin's function. |
| 74 | * | 79 | * |
| 75 | * Configure which function is actually connected to the external | 80 | * Configure which function is actually connected to the external |
| 76 | * pin, such as an gpio input, output or some form of special function | 81 | * pin, such as an gpio input, output or some form of special function |
| 77 | * connected to an internal peripheral block. | 82 | * connected to an internal peripheral block. |
| 83 | * | ||
| 84 | * The @to parameter can be one of the generic S3C_GPIO_INPUT, S3C_GPIO_OUTPUT | ||
| 85 | * or S3C_GPIO_SFN() to indicate one of the possible values that the helper | ||
| 86 | * will then generate the correct bit mask and shift for the configuration. | ||
| 87 | * | ||
| 88 | * If a bank of GPIOs all needs to be set to special-function 2, then | ||
| 89 | * the following code will work: | ||
| 90 | * | ||
| 91 | * for (gpio = start; gpio < end; gpio++) | ||
| 92 | * s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | ||
| 93 | * | ||
| 94 | * The @to parameter can also be a specific value already shifted to the | ||
| 95 | * correct position in the control register, although these are discouraged | ||
| 96 | * in newer kernels and are only being kept for compatibility. | ||
| 78 | */ | 97 | */ |
| 79 | extern int s3c_gpio_cfgpin(unsigned int pin, unsigned int to); | 98 | extern int s3c_gpio_cfgpin(unsigned int pin, unsigned int to); |
| 80 | 99 | ||
| @@ -108,6 +127,8 @@ extern unsigned s3c_gpio_getcfg(unsigned int pin); | |||
| 108 | * This function sets the state of the pull-{up,down} resistor for the | 127 | * This function sets the state of the pull-{up,down} resistor for the |
| 109 | * specified pin. It will return 0 if successfull, or a negative error | 128 | * specified pin. It will return 0 if successfull, or a negative error |
| 110 | * code if the pin cannot support the requested pull setting. | 129 | * code if the pin cannot support the requested pull setting. |
| 130 | * | ||
| 131 | * @pull is one of S3C_GPIO_PULL_NONE, S3C_GPIO_PULL_DOWN or S3C_GPIO_PULL_UP. | ||
| 111 | */ | 132 | */ |
| 112 | extern int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull); | 133 | extern int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull); |
| 113 | 134 | ||
diff --git a/arch/arm/plat-samsung/include/plat/iic-core.h b/arch/arm/plat-samsung/include/plat/iic-core.h index 36397ca20962..f182669b8e8e 100644 --- a/arch/arm/plat-samsung/include/plat/iic-core.h +++ b/arch/arm/plat-samsung/include/plat/iic-core.h | |||
| @@ -32,4 +32,11 @@ static inline void s3c_i2c1_setname(char *name) | |||
| 32 | #endif | 32 | #endif |
| 33 | } | 33 | } |
| 34 | 34 | ||
| 35 | static inline void s3c_i2c2_setname(char *name) | ||
| 36 | { | ||
| 37 | #ifdef CONFIG_S3C_DEV_I2C2 | ||
| 38 | s3c_device_i2c2.name = name; | ||
| 39 | #endif | ||
| 40 | } | ||
| 41 | |||
| 35 | #endif /* __ASM_ARCH_IIC_H */ | 42 | #endif /* __ASM_ARCH_IIC_H */ |
diff --git a/arch/arm/plat-samsung/include/plat/iic.h b/arch/arm/plat-samsung/include/plat/iic.h index 3083df00dee6..133308bf595d 100644 --- a/arch/arm/plat-samsung/include/plat/iic.h +++ b/arch/arm/plat-samsung/include/plat/iic.h | |||
| @@ -54,9 +54,11 @@ struct s3c2410_platform_i2c { | |||
| 54 | */ | 54 | */ |
| 55 | extern void s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *i2c); | 55 | extern void s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *i2c); |
| 56 | extern void s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *i2c); | 56 | extern void s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *i2c); |
| 57 | extern void s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *i2c); | ||
| 57 | 58 | ||
| 58 | /* defined by architecture to configure gpio */ | 59 | /* defined by architecture to configure gpio */ |
| 59 | extern void s3c_i2c0_cfg_gpio(struct platform_device *dev); | 60 | extern void s3c_i2c0_cfg_gpio(struct platform_device *dev); |
| 60 | extern void s3c_i2c1_cfg_gpio(struct platform_device *dev); | 61 | extern void s3c_i2c1_cfg_gpio(struct platform_device *dev); |
| 62 | extern void s3c_i2c2_cfg_gpio(struct platform_device *dev); | ||
| 61 | 63 | ||
| 62 | #endif /* __ASM_ARCH_IIC_H */ | 64 | #endif /* __ASM_ARCH_IIC_H */ |
diff --git a/arch/arm/plat-samsung/include/plat/onenand-core.h b/arch/arm/plat-samsung/include/plat/onenand-core.h new file mode 100644 index 000000000000..7701cb7020c8 --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/onenand-core.h | |||
| @@ -0,0 +1,37 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/plat-samsung/onenand-core.h | ||
| 3 | * | ||
| 4 | * Copyright (c) 2010 Samsung Electronics | ||
| 5 | * Kyungmin Park <kyungmin.park@samsung.com> | ||
| 6 | * Marek Szyprowski <m.szyprowski@samsung.com> | ||
| 7 | * | ||
| 8 | * Samsung OneNAD Controller core functions | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License version 2 as | ||
| 12 | * published by the Free Software Foundation. | ||
| 13 | */ | ||
| 14 | |||
| 15 | #ifndef __ASM_ARCH_ONENAND_CORE_H | ||
| 16 | #define __ASM_ARCH_ONENAND_CORE_H __FILE__ | ||
| 17 | |||
| 18 | /* These functions are only for use with the core support code, such as | ||
| 19 | * the cpu specific initialisation code | ||
| 20 | */ | ||
| 21 | |||
| 22 | /* re-define device name depending on support. */ | ||
| 23 | static inline void s3c_onenand_setname(char *name) | ||
| 24 | { | ||
| 25 | #ifdef CONFIG_S3C_DEV_ONENAND | ||
| 26 | s3c_device_onenand.name = name; | ||
| 27 | #endif | ||
| 28 | } | ||
| 29 | |||
| 30 | static inline void s3c64xx_onenand1_setname(char *name) | ||
| 31 | { | ||
| 32 | #ifdef CONFIG_S3C64XX_DEV_ONENAND1 | ||
| 33 | s3c64xx_device_onenand1.name = name; | ||
| 34 | #endif | ||
| 35 | } | ||
| 36 | |||
| 37 | #endif /* __ASM_ARCH_ONENAND_CORE_H */ | ||
diff --git a/arch/arm/plat-samsung/include/plat/regs-onenand.h b/arch/arm/plat-samsung/include/plat/regs-onenand.h new file mode 100644 index 000000000000..930ea8b88ed3 --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/regs-onenand.h | |||
| @@ -0,0 +1,63 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/plat-s3c/include/plat/regs-onenand.h | ||
| 3 | * | ||
| 4 | * Copyright (C) 2008-2010 Samsung Electronics | ||
| 5 | * Kyungmin Park <kyungmin.park@samsung.com> | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License version 2 as | ||
| 9 | * published by the Free Software Foundation. | ||
| 10 | */ | ||
| 11 | #ifndef __SAMSUNG_ONENAND_H__ | ||
| 12 | #define __SAMSUNG_ONENAND_H__ | ||
| 13 | |||
| 14 | #include <mach/hardware.h> | ||
| 15 | |||
| 16 | /* | ||
| 17 | * OneNAND Controller | ||
| 18 | */ | ||
| 19 | #define MEM_CFG_OFFSET 0x0000 | ||
| 20 | #define BURST_LEN_OFFSET 0x0010 | ||
| 21 | #define MEM_RESET_OFFSET 0x0020 | ||
| 22 | #define INT_ERR_STAT_OFFSET 0x0030 | ||
| 23 | #define INT_ERR_MASK_OFFSET 0x0040 | ||
| 24 | #define INT_ERR_ACK_OFFSET 0x0050 | ||
| 25 | #define ECC_ERR_STAT_OFFSET 0x0060 | ||
| 26 | #define MANUFACT_ID_OFFSET 0x0070 | ||
| 27 | #define DEVICE_ID_OFFSET 0x0080 | ||
| 28 | #define DATA_BUF_SIZE_OFFSET 0x0090 | ||
| 29 | #define BOOT_BUF_SIZE_OFFSET 0x00A0 | ||
| 30 | #define BUF_AMOUNT_OFFSET 0x00B0 | ||
| 31 | #define TECH_OFFSET 0x00C0 | ||
| 32 | #define FBA_WIDTH_OFFSET 0x00D0 | ||
| 33 | #define FPA_WIDTH_OFFSET 0x00E0 | ||
| 34 | #define FSA_WIDTH_OFFSET 0x00F0 | ||
| 35 | #define TRANS_SPARE_OFFSET 0x0140 | ||
| 36 | #define DBS_DFS_WIDTH_OFFSET 0x0160 | ||
| 37 | #define INT_PIN_ENABLE_OFFSET 0x01A0 | ||
| 38 | #define ACC_CLOCK_OFFSET 0x01C0 | ||
| 39 | #define FLASH_VER_ID_OFFSET 0x01F0 | ||
| 40 | #define FLASH_AUX_CNTRL_OFFSET 0x0300 /* s3c64xx only */ | ||
| 41 | |||
| 42 | #define ONENAND_MEM_RESET_HOT 0x3 | ||
| 43 | #define ONENAND_MEM_RESET_COLD 0x2 | ||
| 44 | #define ONENAND_MEM_RESET_WARM 0x1 | ||
| 45 | |||
| 46 | #define CACHE_OP_ERR (1 << 13) | ||
| 47 | #define RST_CMP (1 << 12) | ||
| 48 | #define RDY_ACT (1 << 11) | ||
| 49 | #define INT_ACT (1 << 10) | ||
| 50 | #define UNSUP_CMD (1 << 9) | ||
| 51 | #define LOCKED_BLK (1 << 8) | ||
| 52 | #define BLK_RW_CMP (1 << 7) | ||
| 53 | #define ERS_CMP (1 << 6) | ||
| 54 | #define PGM_CMP (1 << 5) | ||
| 55 | #define LOAD_CMP (1 << 4) | ||
| 56 | #define ERS_FAIL (1 << 3) | ||
| 57 | #define PGM_FAIL (1 << 2) | ||
| 58 | #define INT_TO (1 << 1) | ||
| 59 | #define LD_FAIL_ECC_ERR (1 << 0) | ||
| 60 | |||
| 61 | #define TSRF (1 << 0) | ||
| 62 | |||
| 63 | #endif | ||
diff --git a/arch/arm/plat-samsung/include/plat/regs-rtc.h b/arch/arm/plat-samsung/include/plat/regs-rtc.h index d5837cf8e402..65c190d142dd 100644 --- a/arch/arm/plat-samsung/include/plat/regs-rtc.h +++ b/arch/arm/plat-samsung/include/plat/regs-rtc.h | |||
| @@ -20,6 +20,10 @@ | |||
| 20 | #define S3C2410_RTCCON_CLKSEL (1<<1) | 20 | #define S3C2410_RTCCON_CLKSEL (1<<1) |
| 21 | #define S3C2410_RTCCON_CNTSEL (1<<2) | 21 | #define S3C2410_RTCCON_CNTSEL (1<<2) |
| 22 | #define S3C2410_RTCCON_CLKRST (1<<3) | 22 | #define S3C2410_RTCCON_CLKRST (1<<3) |
| 23 | #define S3C64XX_RTCCON_TICEN (1<<8) | ||
| 24 | |||
| 25 | #define S3C64XX_RTCCON_TICMSK (0xF<<7) | ||
| 26 | #define S3C64XX_RTCCON_TICSHT (7) | ||
| 23 | 27 | ||
| 24 | #define S3C2410_TICNT S3C2410_RTCREG(0x44) | 28 | #define S3C2410_TICNT S3C2410_RTCREG(0x44) |
| 25 | #define S3C2410_TICNT_ENABLE (1<<7) | 29 | #define S3C2410_TICNT_ENABLE (1<<7) |
diff --git a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h index d17724149315..e5aba8f95b79 100644 --- a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h +++ b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h | |||
| @@ -63,5 +63,9 @@ struct s3c64xx_spi_info { | |||
| 63 | * has some chips attached to it. | 63 | * has some chips attached to it. |
| 64 | */ | 64 | */ |
| 65 | extern void s3c64xx_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); | 65 | extern void s3c64xx_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); |
| 66 | extern void s5pc100_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); | ||
| 67 | extern void s5pv210_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); | ||
| 68 | extern void s5p6440_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); | ||
| 69 | extern void s5p6442_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); | ||
| 66 | 70 | ||
| 67 | #endif /* __S3C64XX_PLAT_SPI_H */ | 71 | #endif /* __S3C64XX_PLAT_SPI_H */ |
diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h index 7d07cd7aa4f2..13f9fb20900a 100644 --- a/arch/arm/plat-samsung/include/plat/sdhci.h +++ b/arch/arm/plat-samsung/include/plat/sdhci.h | |||
| @@ -75,6 +75,9 @@ extern void s5pc100_setup_sdhci0_cfg_gpio(struct platform_device *, int w); | |||
| 75 | extern void s5pc100_setup_sdhci1_cfg_gpio(struct platform_device *, int w); | 75 | extern void s5pc100_setup_sdhci1_cfg_gpio(struct platform_device *, int w); |
| 76 | extern void s5pc100_setup_sdhci2_cfg_gpio(struct platform_device *, int w); | 76 | extern void s5pc100_setup_sdhci2_cfg_gpio(struct platform_device *, int w); |
| 77 | extern void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *, int w); | 77 | extern void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *, int w); |
| 78 | extern void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *, int w); | ||
| 79 | extern void s5pv210_setup_sdhci1_cfg_gpio(struct platform_device *, int w); | ||
| 80 | extern void s5pv210_setup_sdhci2_cfg_gpio(struct platform_device *, int w); | ||
| 78 | 81 | ||
| 79 | /* S3C6400 SDHCI setup */ | 82 | /* S3C6400 SDHCI setup */ |
| 80 | 83 | ||
| @@ -218,4 +221,56 @@ static inline void s5pc100_default_sdhci1(void) { } | |||
| 218 | static inline void s5pc100_default_sdhci2(void) { } | 221 | static inline void s5pc100_default_sdhci2(void) { } |
| 219 | #endif /* CONFIG_S5PC100_SETUP_SDHCI */ | 222 | #endif /* CONFIG_S5PC100_SETUP_SDHCI */ |
| 220 | 223 | ||
| 224 | |||
| 225 | /* S5PC110 SDHCI setup */ | ||
| 226 | #ifdef CONFIG_S5PV210_SETUP_SDHCI | ||
| 227 | extern char *s5pv210_hsmmc_clksrcs[4]; | ||
| 228 | |||
| 229 | extern void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev, | ||
| 230 | void __iomem *r, | ||
| 231 | struct mmc_ios *ios, | ||
| 232 | struct mmc_card *card); | ||
| 233 | |||
| 234 | #ifdef CONFIG_S3C_DEV_HSMMC | ||
| 235 | static inline void s5pv210_default_sdhci0(void) | ||
| 236 | { | ||
| 237 | s3c_hsmmc0_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | ||
| 238 | s3c_hsmmc0_def_platdata.cfg_gpio = s5pv210_setup_sdhci0_cfg_gpio; | ||
| 239 | s3c_hsmmc0_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card; | ||
| 240 | } | ||
| 241 | #else | ||
| 242 | static inline void s5pc100_default_sdhci0(void) { } | ||
| 243 | #endif /* CONFIG_S3C_DEV_HSMMC */ | ||
| 244 | |||
| 245 | #ifdef CONFIG_S3C_DEV_HSMMC1 | ||
| 246 | static inline void s5pv210_default_sdhci1(void) | ||
| 247 | { | ||
| 248 | s3c_hsmmc1_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | ||
| 249 | s3c_hsmmc1_def_platdata.cfg_gpio = s5pv210_setup_sdhci1_cfg_gpio; | ||
| 250 | s3c_hsmmc1_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card; | ||
| 251 | } | ||
| 252 | #else | ||
| 253 | static inline void s5pv210_default_sdhci1(void) { } | ||
| 254 | #endif /* CONFIG_S3C_DEV_HSMMC1 */ | ||
| 255 | |||
| 256 | #ifdef CONFIG_S3C_DEV_HSMMC2 | ||
| 257 | static inline void s5pv210_default_sdhci2(void) | ||
| 258 | { | ||
| 259 | s3c_hsmmc2_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | ||
| 260 | s3c_hsmmc2_def_platdata.cfg_gpio = s5pv210_setup_sdhci2_cfg_gpio; | ||
| 261 | s3c_hsmmc2_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card; | ||
| 262 | } | ||
| 263 | #else | ||
| 264 | static inline void s5pv210_default_sdhci2(void) { } | ||
| 265 | #endif /* CONFIG_S3C_DEV_HSMMC2 */ | ||
| 266 | |||
| 267 | #else | ||
| 268 | static inline void s5pv210_default_sdhci0(void) { } | ||
| 269 | static inline void s5pv210_default_sdhci1(void) { } | ||
| 270 | static inline void s5pv210_default_sdhci2(void) { } | ||
| 271 | #endif /* CONFIG_S5PC100_SETUP_SDHCI */ | ||
| 272 | |||
| 273 | |||
| 274 | |||
| 275 | |||
| 221 | #endif /* __PLAT_S3C_SDHCI_H */ | 276 | #endif /* __PLAT_S3C_SDHCI_H */ |
diff --git a/arch/arm/plat-samsung/include/plat/wakeup-mask.h b/arch/arm/plat-samsung/include/plat/wakeup-mask.h new file mode 100644 index 000000000000..43e4acd2e1c6 --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/wakeup-mask.h | |||
| @@ -0,0 +1,44 @@ | |||
| 1 | /* arch/arm/plat-samsung/include/plat/wakeup-mask.h | ||
| 2 | * | ||
| 3 | * Copyright 2010 Ben Dooks <ben-linux@fluff.org> | ||
| 4 | * | ||
| 5 | * Support for wakeup mask interrupts on newer SoCs | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License version 2 as | ||
| 9 | * published by the Free Software Foundation. | ||
| 10 | * | ||
| 11 | */ | ||
| 12 | |||
| 13 | #ifndef __PLAT_WAKEUP_MASK_H | ||
| 14 | #define __PLAT_WAKEUP_MASK_H __file__ | ||
| 15 | |||
| 16 | /* if no irq yet defined, but still want to mask */ | ||
| 17 | #define NO_WAKEUP_IRQ (0x90000000) | ||
| 18 | |||
| 19 | /** | ||
| 20 | * struct samsung_wakeup_mask - wakeup mask information | ||
| 21 | * @irq: The interrupt associated with this wakeup. | ||
| 22 | * @bit: The bit, as a (1 << bitno) controlling this source. | ||
| 23 | */ | ||
| 24 | struct samsung_wakeup_mask { | ||
| 25 | unsigned int irq; | ||
| 26 | u32 bit; | ||
| 27 | }; | ||
| 28 | |||
| 29 | /** | ||
| 30 | * samsung_sync_wakemask - sync wakeup mask information for pm | ||
| 31 | * @reg: The register that is used. | ||
| 32 | * @masks: The list of masks to use. | ||
| 33 | * @nr_masks: The number of entries pointed to buy @masks. | ||
| 34 | * | ||
| 35 | * Synchronise the wakeup mask information at suspend time from the list | ||
| 36 | * of interrupts and control bits in @masks. We do this at suspend time | ||
| 37 | * as overriding the relevant irq chips is harder and the register is only | ||
| 38 | * required to be correct before we enter sleep. | ||
| 39 | */ | ||
| 40 | extern void samsung_sync_wakemask(void __iomem *reg, | ||
| 41 | struct samsung_wakeup_mask *masks, | ||
| 42 | int nr_masks); | ||
| 43 | |||
| 44 | #endif /* __PLAT_WAKEUP_MASK_H */ | ||
diff --git a/arch/arm/plat-samsung/pm-gpio.c b/arch/arm/plat-samsung/pm-gpio.c index d50ab9d2af53..7df03f87fbfa 100644 --- a/arch/arm/plat-samsung/pm-gpio.c +++ b/arch/arm/plat-samsung/pm-gpio.c | |||
| @@ -331,8 +331,10 @@ void s3c_pm_save_gpios(void) | |||
| 331 | 331 | ||
| 332 | for (gpio_nr = 0; gpio_nr < S3C_GPIO_END;) { | 332 | for (gpio_nr = 0; gpio_nr < S3C_GPIO_END;) { |
| 333 | ourchip = s3c_gpiolib_getchip(gpio_nr); | 333 | ourchip = s3c_gpiolib_getchip(gpio_nr); |
| 334 | if (!ourchip) | 334 | if (!ourchip) { |
| 335 | gpio_nr++; | ||
| 335 | continue; | 336 | continue; |
| 337 | } | ||
| 336 | 338 | ||
| 337 | s3c_pm_save_gpio(ourchip); | 339 | s3c_pm_save_gpio(ourchip); |
| 338 | 340 | ||
| @@ -369,8 +371,10 @@ void s3c_pm_restore_gpios(void) | |||
| 369 | 371 | ||
| 370 | for (gpio_nr = 0; gpio_nr < S3C_GPIO_END;) { | 372 | for (gpio_nr = 0; gpio_nr < S3C_GPIO_END;) { |
| 371 | ourchip = s3c_gpiolib_getchip(gpio_nr); | 373 | ourchip = s3c_gpiolib_getchip(gpio_nr); |
| 372 | if (!ourchip) | 374 | if (!ourchip) { |
| 375 | gpio_nr++; | ||
| 373 | continue; | 376 | continue; |
| 377 | } | ||
| 374 | 378 | ||
| 375 | s3c_pm_resume_gpio(ourchip); | 379 | s3c_pm_resume_gpio(ourchip); |
| 376 | 380 | ||
diff --git a/arch/arm/plat-samsung/wakeup-mask.c b/arch/arm/plat-samsung/wakeup-mask.c new file mode 100644 index 000000000000..2e09b6ad84ca --- /dev/null +++ b/arch/arm/plat-samsung/wakeup-mask.c | |||
| @@ -0,0 +1,47 @@ | |||
| 1 | /* arch/arm/plat-samsung/wakeup-mask.c | ||
| 2 | * | ||
| 3 | * Copyright 2010 Ben Dooks <ben-linux@fluff.org> | ||
| 4 | * | ||
| 5 | * Support for wakeup mask interrupts on newer SoCs | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License version 2 as | ||
| 9 | * published by the Free Software Foundation. | ||
| 10 | */ | ||
| 11 | |||
| 12 | #include <linux/kernel.h> | ||
| 13 | #include <linux/spinlock.h> | ||
| 14 | #include <linux/sysdev.h> | ||
| 15 | #include <linux/types.h> | ||
| 16 | #include <linux/irq.h> | ||
| 17 | #include <linux/io.h> | ||
| 18 | |||
| 19 | #include <plat/wakeup-mask.h> | ||
| 20 | #include <plat/pm.h> | ||
| 21 | |||
| 22 | void samsung_sync_wakemask(void __iomem *reg, | ||
| 23 | struct samsung_wakeup_mask *mask, int nr_mask) | ||
| 24 | { | ||
| 25 | struct irq_desc *desc; | ||
| 26 | u32 val; | ||
| 27 | |||
| 28 | val = __raw_readl(reg); | ||
| 29 | |||
| 30 | for (; nr_mask > 0; nr_mask--, mask++) { | ||
| 31 | if (mask->irq == NO_WAKEUP_IRQ) { | ||
| 32 | val |= mask->bit; | ||
| 33 | continue; | ||
| 34 | } | ||
| 35 | |||
| 36 | desc = irq_to_desc(mask->irq); | ||
| 37 | |||
| 38 | /* bit of a liberty to read this directly from irq_desc. */ | ||
| 39 | if (desc->wake_depth > 0) | ||
| 40 | val &= ~mask->bit; | ||
| 41 | else | ||
| 42 | val |= mask->bit; | ||
| 43 | } | ||
| 44 | |||
| 45 | printk(KERN_INFO "wakemask %08x => %08x\n", __raw_readl(reg), val); | ||
| 46 | __raw_writel(val, reg); | ||
| 47 | } | ||
diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S index 66dc2d03b7fc..d66cead97d28 100644 --- a/arch/arm/vfp/vfphw.S +++ b/arch/arm/vfp/vfphw.S | |||
| @@ -277,7 +277,7 @@ ENTRY(vfp_put_double) | |||
| 277 | #ifdef CONFIG_VFPv3 | 277 | #ifdef CONFIG_VFPv3 |
| 278 | @ d16 - d31 registers | 278 | @ d16 - d31 registers |
| 279 | .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 | 279 | .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 |
| 280 | 1: mcrr p11, 3, r1, r2, c\dr @ fmdrr r1, r2, d\dr | 280 | 1: mcrr p11, 3, r0, r1, c\dr @ fmdrr r0, r1, d\dr |
| 281 | mov pc, lr | 281 | mov pc, lr |
| 282 | .org 1b + 8 | 282 | .org 1b + 8 |
| 283 | .endr | 283 | .endr |
diff --git a/arch/avr32/include/asm/scatterlist.h b/arch/avr32/include/asm/scatterlist.h index 377320e3bd17..06394e5ead6c 100644 --- a/arch/avr32/include/asm/scatterlist.h +++ b/arch/avr32/include/asm/scatterlist.h | |||
| @@ -1,25 +1,7 @@ | |||
| 1 | #ifndef __ASM_AVR32_SCATTERLIST_H | 1 | #ifndef __ASM_AVR32_SCATTERLIST_H |
| 2 | #define __ASM_AVR32_SCATTERLIST_H | 2 | #define __ASM_AVR32_SCATTERLIST_H |
| 3 | 3 | ||
| 4 | #include <asm/types.h> | 4 | #include <asm-generic/scatterlist.h> |
| 5 | |||
| 6 | struct scatterlist { | ||
| 7 | #ifdef CONFIG_DEBUG_SG | ||
| 8 | unsigned long sg_magic; | ||
| 9 | #endif | ||
| 10 | unsigned long page_link; | ||
| 11 | unsigned int offset; | ||
| 12 | dma_addr_t dma_address; | ||
| 13 | unsigned int length; | ||
| 14 | }; | ||
| 15 | |||
| 16 | /* These macros should be used after a pci_map_sg call has been done | ||
| 17 | * to get bus addresses of each of the SG entries and their lengths. | ||
| 18 | * You should only work with the number of sg entries pci_map_sg | ||
| 19 | * returns. | ||
| 20 | */ | ||
| 21 | #define sg_dma_address(sg) ((sg)->dma_address) | ||
| 22 | #define sg_dma_len(sg) ((sg)->length) | ||
| 23 | 5 | ||
| 24 | #define ISA_DMA_THRESHOLD (0xffffffff) | 6 | #define ISA_DMA_THRESHOLD (0xffffffff) |
| 25 | 7 | ||
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig index c078849df7f9..f66294b4f9d2 100644 --- a/arch/blackfin/Kconfig +++ b/arch/blackfin/Kconfig | |||
| @@ -348,7 +348,7 @@ config MEM_MT48LC16M16A2TG_75 | |||
| 348 | 348 | ||
| 349 | config MEM_MT48LC32M8A2_75 | 349 | config MEM_MT48LC32M8A2_75 |
| 350 | bool | 350 | bool |
| 351 | depends on (BFIN537_STAMP || PNAV10 || BFIN538_EZKIT) | 351 | depends on (BFIN518F_EZBRD || BFIN537_STAMP || PNAV10 || BFIN538_EZKIT) |
| 352 | default y | 352 | default y |
| 353 | 353 | ||
| 354 | config MEM_MT48LC8M32B2B5_7 | 354 | config MEM_MT48LC8M32B2B5_7 |
| @@ -361,11 +361,6 @@ config MEM_MT48LC32M16A2TG_75 | |||
| 361 | depends on (BFIN527_EZKIT || BFIN527_EZKIT_V2 || BFIN532_IP0X || BLACKSTAMP) | 361 | depends on (BFIN527_EZKIT || BFIN527_EZKIT_V2 || BFIN532_IP0X || BLACKSTAMP) |
| 362 | default y | 362 | default y |
| 363 | 363 | ||
| 364 | config MEM_MT48LC32M8A2_75 | ||
| 365 | bool | ||
| 366 | depends on (BFIN518F_EZBRD) | ||
| 367 | default y | ||
| 368 | |||
| 369 | config MEM_MT48H32M16LFCJ_75 | 364 | config MEM_MT48H32M16LFCJ_75 |
| 370 | bool | 365 | bool |
| 371 | depends on (BFIN526_EZBRD) | 366 | depends on (BFIN526_EZBRD) |
| @@ -791,6 +786,34 @@ config MEMCPY_L1 | |||
| 791 | If enabled, the memcpy function is linked | 786 | If enabled, the memcpy function is linked |
| 792 | into L1 instruction memory. (less latency) | 787 | into L1 instruction memory. (less latency) |
| 793 | 788 | ||
| 789 | config STRCMP_L1 | ||
| 790 | bool "locate strcmp function in L1 Memory" | ||
| 791 | default y | ||
| 792 | help | ||
| 793 | If enabled, the strcmp function is linked | ||
| 794 | into L1 instruction memory (less latency). | ||
| 795 | |||
| 796 | config STRNCMP_L1 | ||
| 797 | bool "locate strncmp function in L1 Memory" | ||
| 798 | default y | ||
| 799 | help | ||
| 800 | If enabled, the strncmp function is linked | ||
| 801 | into L1 instruction memory (less latency). | ||
| 802 | |||
| 803 | config STRCPY_L1 | ||
| 804 | bool "locate strcpy function in L1 Memory" | ||
| 805 | default y | ||
| 806 | help | ||
| 807 | If enabled, the strcpy function is linked | ||
| 808 | into L1 instruction memory (less latency). | ||
| 809 | |||
| 810 | config STRNCPY_L1 | ||
| 811 | bool "locate strncpy function in L1 Memory" | ||
| 812 | default y | ||
| 813 | help | ||
| 814 | If enabled, the strncpy function is linked | ||
| 815 | into L1 instruction memory (less latency). | ||
| 816 | |||
| 794 | config SYS_BFIN_SPINLOCK_L1 | 817 | config SYS_BFIN_SPINLOCK_L1 |
| 795 | bool "Locate sys_bfin_spinlock function in L1 Memory" | 818 | bool "Locate sys_bfin_spinlock function in L1 Memory" |
| 796 | default y | 819 | default y |
| @@ -1187,32 +1210,6 @@ config PM_BFIN_SLEEP | |||
| 1187 | If unsure, select "Sleep Deeper". | 1210 | If unsure, select "Sleep Deeper". |
| 1188 | endchoice | 1211 | endchoice |
| 1189 | 1212 | ||
| 1190 | config PM_WAKEUP_BY_GPIO | ||
| 1191 | bool "Allow Wakeup from Standby by GPIO" | ||
| 1192 | depends on PM && !BF54x | ||
| 1193 | |||
| 1194 | config PM_WAKEUP_GPIO_NUMBER | ||
| 1195 | int "GPIO number" | ||
| 1196 | range 0 47 | ||
| 1197 | depends on PM_WAKEUP_BY_GPIO | ||
| 1198 | default 2 | ||
| 1199 | |||
| 1200 | choice | ||
| 1201 | prompt "GPIO Polarity" | ||
| 1202 | depends on PM_WAKEUP_BY_GPIO | ||
| 1203 | default PM_WAKEUP_GPIO_POLAR_H | ||
| 1204 | config PM_WAKEUP_GPIO_POLAR_H | ||
| 1205 | bool "Active High" | ||
| 1206 | config PM_WAKEUP_GPIO_POLAR_L | ||
| 1207 | bool "Active Low" | ||
| 1208 | config PM_WAKEUP_GPIO_POLAR_EDGE_F | ||
| 1209 | bool "Falling EDGE" | ||
| 1210 | config PM_WAKEUP_GPIO_POLAR_EDGE_R | ||
| 1211 | bool "Rising EDGE" | ||
| 1212 | config PM_WAKEUP_GPIO_POLAR_EDGE_B | ||
| 1213 | bool "Both EDGE" | ||
| 1214 | endchoice | ||
| 1215 | |||
| 1216 | comment "Possible Suspend Mem / Hibernate Wake-Up Sources" | 1213 | comment "Possible Suspend Mem / Hibernate Wake-Up Sources" |
| 1217 | depends on PM | 1214 | depends on PM |
| 1218 | 1215 | ||
diff --git a/arch/blackfin/Kconfig.debug b/arch/blackfin/Kconfig.debug index aec89a5280b2..d1825cb24768 100644 --- a/arch/blackfin/Kconfig.debug +++ b/arch/blackfin/Kconfig.debug | |||
| @@ -238,7 +238,7 @@ config EARLY_PRINTK | |||
| 238 | config NMI_WATCHDOG | 238 | config NMI_WATCHDOG |
| 239 | bool "Enable NMI watchdog to help debugging lockup on SMP" | 239 | bool "Enable NMI watchdog to help debugging lockup on SMP" |
| 240 | default n | 240 | default n |
| 241 | depends on (SMP && !BFIN_SCRATCH_REG_RETN) | 241 | depends on SMP |
| 242 | help | 242 | help |
| 243 | If any CPU in the system does not execute the period local timer | 243 | If any CPU in the system does not execute the period local timer |
| 244 | interrupt for more than 5 seconds, then the NMI handler dumps debug | 244 | interrupt for more than 5 seconds, then the NMI handler dumps debug |
| @@ -264,4 +264,13 @@ config BFIN_ISRAM_SELF_TEST | |||
| 264 | help | 264 | help |
| 265 | Run some self tests of the isram driver code at boot. | 265 | Run some self tests of the isram driver code at boot. |
| 266 | 266 | ||
| 267 | config BFIN_PSEUDODBG_INSNS | ||
| 268 | bool "Support pseudo debug instructions" | ||
| 269 | default n | ||
| 270 | help | ||
| 271 | This option allows the kernel to emulate some pseudo instructions which | ||
| 272 | allow simulator test cases to be run under Linux with no changes. | ||
| 273 | |||
| 274 | Most people should say N here. | ||
| 275 | |||
| 267 | endmenu | 276 | endmenu |
diff --git a/arch/blackfin/include/asm/bfin-global.h b/arch/blackfin/include/asm/bfin-global.h index e6485c305ea6..121cc04d877d 100644 --- a/arch/blackfin/include/asm/bfin-global.h +++ b/arch/blackfin/include/asm/bfin-global.h | |||
| @@ -39,9 +39,15 @@ extern unsigned long sclk_to_usecs(unsigned long sclk); | |||
| 39 | extern unsigned long usecs_to_sclk(unsigned long usecs); | 39 | extern unsigned long usecs_to_sclk(unsigned long usecs); |
| 40 | 40 | ||
| 41 | struct pt_regs; | 41 | struct pt_regs; |
| 42 | #if defined(CONFIG_DEBUG_VERBOSE) | ||
| 42 | extern void dump_bfin_process(struct pt_regs *regs); | 43 | extern void dump_bfin_process(struct pt_regs *regs); |
| 43 | extern void dump_bfin_mem(struct pt_regs *regs); | 44 | extern void dump_bfin_mem(struct pt_regs *regs); |
| 44 | extern void dump_bfin_trace_buffer(void); | 45 | extern void dump_bfin_trace_buffer(void); |
| 46 | #else | ||
| 47 | #define dump_bfin_process(regs) | ||
| 48 | #define dump_bfin_mem(regs) | ||
| 49 | #define dump_bfin_trace_buffer() | ||
| 50 | #endif | ||
| 45 | 51 | ||
| 46 | /* init functions only */ | 52 | /* init functions only */ |
| 47 | extern int init_arch_irq(void); | 53 | extern int init_arch_irq(void); |
diff --git a/arch/blackfin/include/asm/bug.h b/arch/blackfin/include/asm/bug.h index 75f6dc336d46..8d9b1eba89c4 100644 --- a/arch/blackfin/include/asm/bug.h +++ b/arch/blackfin/include/asm/bug.h | |||
| @@ -9,7 +9,12 @@ | |||
| 9 | 9 | ||
| 10 | #ifdef CONFIG_BUG | 10 | #ifdef CONFIG_BUG |
| 11 | 11 | ||
| 12 | #define BFIN_BUG_OPCODE 0xefcd | 12 | /* |
| 13 | * This can be any undefined 16-bit opcode, meaning | ||
| 14 | * ((opcode & 0xc000) != 0xc000) | ||
| 15 | * Anything from 0x0001 to 0x000A (inclusive) will work | ||
| 16 | */ | ||
| 17 | #define BFIN_BUG_OPCODE 0x0001 | ||
| 13 | 18 | ||
| 14 | #ifdef CONFIG_DEBUG_BUGVERBOSE | 19 | #ifdef CONFIG_DEBUG_BUGVERBOSE |
| 15 | 20 | ||
diff --git a/arch/blackfin/include/asm/cache.h b/arch/blackfin/include/asm/cache.h index 8542bc31f63c..93f6c634fdf4 100644 --- a/arch/blackfin/include/asm/cache.h +++ b/arch/blackfin/include/asm/cache.h | |||
| @@ -15,6 +15,8 @@ | |||
| 15 | #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) | 15 | #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) |
| 16 | #define SMP_CACHE_BYTES L1_CACHE_BYTES | 16 | #define SMP_CACHE_BYTES L1_CACHE_BYTES |
| 17 | 17 | ||
| 18 | #define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES | ||
| 19 | |||
| 18 | #ifdef CONFIG_SMP | 20 | #ifdef CONFIG_SMP |
| 19 | #define __cacheline_aligned | 21 | #define __cacheline_aligned |
| 20 | #else | 22 | #else |
diff --git a/arch/blackfin/include/asm/gpio.h b/arch/blackfin/include/asm/gpio.h index 91bd2d7b9d55..01b19d0cf509 100644 --- a/arch/blackfin/include/asm/gpio.h +++ b/arch/blackfin/include/asm/gpio.h | |||
| @@ -167,23 +167,23 @@ int bfin_special_gpio_request(unsigned gpio, const char *label); | |||
| 167 | #endif | 167 | #endif |
| 168 | 168 | ||
| 169 | #ifdef CONFIG_PM | 169 | #ifdef CONFIG_PM |
| 170 | int bfin_pm_standby_ctrl(unsigned ctrl); | ||
| 170 | 171 | ||
| 171 | unsigned int bfin_pm_standby_setup(void); | 172 | static inline int bfin_pm_standby_setup(void) |
| 172 | void bfin_pm_standby_restore(void); | 173 | { |
| 174 | return bfin_pm_standby_ctrl(1); | ||
| 175 | } | ||
| 176 | |||
| 177 | static inline void bfin_pm_standby_restore(void) | ||
| 178 | { | ||
| 179 | bfin_pm_standby_ctrl(0); | ||
| 180 | } | ||
| 173 | 181 | ||
| 174 | void bfin_gpio_pm_hibernate_restore(void); | 182 | void bfin_gpio_pm_hibernate_restore(void); |
| 175 | void bfin_gpio_pm_hibernate_suspend(void); | 183 | void bfin_gpio_pm_hibernate_suspend(void); |
| 176 | 184 | ||
| 177 | #ifndef CONFIG_BF54x | 185 | #ifndef CONFIG_BF54x |
| 178 | #define PM_WAKE_RISING 0x1 | 186 | int gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl); |
| 179 | #define PM_WAKE_FALLING 0x2 | ||
| 180 | #define PM_WAKE_HIGH 0x4 | ||
| 181 | #define PM_WAKE_LOW 0x8 | ||
| 182 | #define PM_WAKE_BOTH_EDGES (PM_WAKE_RISING | PM_WAKE_FALLING) | ||
| 183 | #define PM_WAKE_IGNORE 0xF0 | ||
| 184 | |||
| 185 | int gpio_pm_wakeup_request(unsigned gpio, unsigned char type); | ||
| 186 | void gpio_pm_wakeup_free(unsigned gpio); | ||
| 187 | 187 | ||
| 188 | struct gpio_port_s { | 188 | struct gpio_port_s { |
| 189 | unsigned short data; | 189 | unsigned short data; |
diff --git a/arch/blackfin/include/asm/pgtable.h b/arch/blackfin/include/asm/pgtable.h index 821c699c2238..dcca3e6d6e80 100644 --- a/arch/blackfin/include/asm/pgtable.h +++ b/arch/blackfin/include/asm/pgtable.h | |||
| @@ -80,7 +80,8 @@ PTE_BIT_FUNC(mkyoung, |= _PAGE_ACCESSED); | |||
| 80 | * ZERO_PAGE is a global shared page that is always zero: used | 80 | * ZERO_PAGE is a global shared page that is always zero: used |
| 81 | * for zero-mapped memory areas etc.. | 81 | * for zero-mapped memory areas etc.. |
| 82 | */ | 82 | */ |
| 83 | #define ZERO_PAGE(vaddr) (virt_to_page(0)) | 83 | #define ZERO_PAGE(vaddr) virt_to_page(empty_zero_page) |
| 84 | extern char empty_zero_page[]; | ||
| 84 | 85 | ||
| 85 | extern unsigned int kobjsize(const void *objp); | 86 | extern unsigned int kobjsize(const void *objp); |
| 86 | 87 | ||
diff --git a/arch/blackfin/include/asm/pseudo_instructions.h b/arch/blackfin/include/asm/pseudo_instructions.h new file mode 100644 index 000000000000..b00adfa08169 --- /dev/null +++ b/arch/blackfin/include/asm/pseudo_instructions.h | |||
| @@ -0,0 +1,18 @@ | |||
| 1 | /* | ||
| 2 | * header file for pseudo instructions | ||
| 3 | * | ||
| 4 | * Copyright 2010 Analog Devices Inc. | ||
| 5 | * | ||
| 6 | * Licensed under the GPL-2 or later. | ||
| 7 | */ | ||
| 8 | |||
| 9 | #ifndef _BLACKFIN_PSEUDO_ | ||
| 10 | #define _BLACKFIN_PSEUDO_ | ||
| 11 | |||
| 12 | #include <linux/types.h> | ||
| 13 | #include <asm/ptrace.h> | ||
| 14 | |||
| 15 | extern bool execute_pseudodbg_assert(struct pt_regs *fp, unsigned int opcode); | ||
| 16 | extern bool execute_pseudodbg(struct pt_regs *fp, unsigned int opcode); | ||
| 17 | |||
| 18 | #endif | ||
diff --git a/arch/blackfin/include/asm/scatterlist.h b/arch/blackfin/include/asm/scatterlist.h index 04f448711cd0..64d41d34ab0b 100644 --- a/arch/blackfin/include/asm/scatterlist.h +++ b/arch/blackfin/include/asm/scatterlist.h | |||
| @@ -1,27 +1,7 @@ | |||
| 1 | #ifndef _BLACKFIN_SCATTERLIST_H | 1 | #ifndef _BLACKFIN_SCATTERLIST_H |
| 2 | #define _BLACKFIN_SCATTERLIST_H | 2 | #define _BLACKFIN_SCATTERLIST_H |
| 3 | 3 | ||
| 4 | #include <linux/mm.h> | 4 | #include <asm-generic/scatterlist.h> |
| 5 | |||
| 6 | struct scatterlist { | ||
| 7 | #ifdef CONFIG_DEBUG_SG | ||
| 8 | unsigned long sg_magic; | ||
| 9 | #endif | ||
| 10 | unsigned long page_link; | ||
| 11 | unsigned int offset; | ||
| 12 | dma_addr_t dma_address; | ||
| 13 | unsigned int length; | ||
| 14 | }; | ||
| 15 | |||
| 16 | /* | ||
| 17 | * These macros should be used after a pci_map_sg call has been done | ||
| 18 | * to get bus addresses of each of the SG entries and their lengths. | ||
| 19 | * You should only work with the number of sg entries pci_map_sg | ||
| 20 | * returns, or alternatively stop on the first sg_dma_len(sg) which | ||
| 21 | * is 0. | ||
| 22 | */ | ||
| 23 | #define sg_dma_address(sg) ((sg)->dma_address) | ||
| 24 | #define sg_dma_len(sg) ((sg)->length) | ||
| 25 | 5 | ||
| 26 | #define ISA_DMA_THRESHOLD (0xffffffff) | 6 | #define ISA_DMA_THRESHOLD (0xffffffff) |
| 27 | 7 | ||
diff --git a/arch/blackfin/include/asm/string.h b/arch/blackfin/include/asm/string.h index d7f0ccb418c3..423c099aa988 100644 --- a/arch/blackfin/include/asm/string.h +++ b/arch/blackfin/include/asm/string.h | |||
| @@ -12,121 +12,16 @@ | |||
| 12 | #ifdef __KERNEL__ /* only set these up for kernel code */ | 12 | #ifdef __KERNEL__ /* only set these up for kernel code */ |
| 13 | 13 | ||
| 14 | #define __HAVE_ARCH_STRCPY | 14 | #define __HAVE_ARCH_STRCPY |
| 15 | extern inline char *strcpy(char *dest, const char *src) | 15 | extern char *strcpy(char *dest, const char *src); |
| 16 | { | ||
| 17 | char *xdest = dest; | ||
| 18 | char temp = 0; | ||
| 19 | |||
| 20 | __asm__ __volatile__ ( | ||
| 21 | "1:" | ||
| 22 | "%2 = B [%1++] (Z);" | ||
| 23 | "B [%0++] = %2;" | ||
| 24 | "CC = %2;" | ||
| 25 | "if cc jump 1b (bp);" | ||
| 26 | : "+&a" (dest), "+&a" (src), "=&d" (temp) | ||
| 27 | : | ||
| 28 | : "memory", "CC"); | ||
| 29 | |||
| 30 | return xdest; | ||
| 31 | } | ||
| 32 | 16 | ||
| 33 | #define __HAVE_ARCH_STRNCPY | 17 | #define __HAVE_ARCH_STRNCPY |
| 34 | extern inline char *strncpy(char *dest, const char *src, size_t n) | 18 | extern char *strncpy(char *dest, const char *src, size_t n); |
| 35 | { | ||
| 36 | char *xdest = dest; | ||
| 37 | char temp = 0; | ||
| 38 | |||
| 39 | if (n == 0) | ||
| 40 | return xdest; | ||
| 41 | |||
| 42 | __asm__ __volatile__ ( | ||
| 43 | "1:" | ||
| 44 | "%3 = B [%1++] (Z);" | ||
| 45 | "B [%0++] = %3;" | ||
| 46 | "CC = %3;" | ||
| 47 | "if ! cc jump 2f;" | ||
| 48 | "%2 += -1;" | ||
| 49 | "CC = %2 == 0;" | ||
| 50 | "if ! cc jump 1b (bp);" | ||
| 51 | "jump 4f;" | ||
| 52 | "2:" | ||
| 53 | /* if src is shorter than n, we need to null pad bytes now */ | ||
| 54 | "%3 = 0;" | ||
| 55 | "3:" | ||
| 56 | "%2 += -1;" | ||
| 57 | "CC = %2 == 0;" | ||
| 58 | "if cc jump 4f;" | ||
| 59 | "B [%0++] = %3;" | ||
| 60 | "jump 3b;" | ||
| 61 | "4:" | ||
| 62 | : "+&a" (dest), "+&a" (src), "+&da" (n), "=&d" (temp) | ||
| 63 | : | ||
| 64 | : "memory", "CC"); | ||
| 65 | |||
| 66 | return xdest; | ||
| 67 | } | ||
| 68 | 19 | ||
| 69 | #define __HAVE_ARCH_STRCMP | 20 | #define __HAVE_ARCH_STRCMP |
| 70 | extern inline int strcmp(const char *cs, const char *ct) | 21 | extern int strcmp(const char *cs, const char *ct); |
| 71 | { | ||
| 72 | /* need to use int's here so the char's in the assembly don't get | ||
| 73 | * sign extended incorrectly when we don't want them to be | ||
| 74 | */ | ||
| 75 | int __res1, __res2; | ||
| 76 | |||
| 77 | __asm__ __volatile__ ( | ||
| 78 | "1:" | ||
| 79 | "%2 = B[%0++] (Z);" /* get *cs */ | ||
| 80 | "%3 = B[%1++] (Z);" /* get *ct */ | ||
| 81 | "CC = %2 == %3;" /* compare a byte */ | ||
| 82 | "if ! cc jump 2f;" /* not equal, break out */ | ||
| 83 | "CC = %2;" /* at end of cs? */ | ||
| 84 | "if cc jump 1b (bp);" /* no, keep going */ | ||
| 85 | "jump.s 3f;" /* strings are equal */ | ||
| 86 | "2:" | ||
| 87 | "%2 = %2 - %3;" /* *cs - *ct */ | ||
| 88 | "3:" | ||
| 89 | : "+&a" (cs), "+&a" (ct), "=&d" (__res1), "=&d" (__res2) | ||
| 90 | : | ||
| 91 | : "memory", "CC"); | ||
| 92 | |||
| 93 | return __res1; | ||
| 94 | } | ||
| 95 | 22 | ||
| 96 | #define __HAVE_ARCH_STRNCMP | 23 | #define __HAVE_ARCH_STRNCMP |
| 97 | extern inline int strncmp(const char *cs, const char *ct, size_t count) | 24 | extern int strncmp(const char *cs, const char *ct, size_t count); |
| 98 | { | ||
| 99 | /* need to use int's here so the char's in the assembly don't get | ||
| 100 | * sign extended incorrectly when we don't want them to be | ||
| 101 | */ | ||
| 102 | int __res1, __res2; | ||
| 103 | |||
| 104 | if (!count) | ||
| 105 | return 0; | ||
| 106 | |||
| 107 | __asm__ __volatile__ ( | ||
| 108 | "1:" | ||
| 109 | "%3 = B[%0++] (Z);" /* get *cs */ | ||
| 110 | "%4 = B[%1++] (Z);" /* get *ct */ | ||
| 111 | "CC = %3 == %4;" /* compare a byte */ | ||
| 112 | "if ! cc jump 3f;" /* not equal, break out */ | ||
| 113 | "CC = %3;" /* at end of cs? */ | ||
| 114 | "if ! cc jump 4f;" /* yes, all done */ | ||
| 115 | "%2 += -1;" /* no, adjust count */ | ||
| 116 | "CC = %2 == 0;" | ||
| 117 | "if ! cc jump 1b;" /* more to do, keep going */ | ||
| 118 | "2:" | ||
| 119 | "%3 = 0;" /* strings are equal */ | ||
| 120 | "jump.s 4f;" | ||
| 121 | "3:" | ||
| 122 | "%3 = %3 - %4;" /* *cs - *ct */ | ||
| 123 | "4:" | ||
| 124 | : "+&a" (cs), "+&a" (ct), "+&da" (count), "=&d" (__res1), "=&d" (__res2) | ||
| 125 | : | ||
| 126 | : "memory", "CC"); | ||
| 127 | |||
| 128 | return __res1; | ||
| 129 | } | ||
| 130 | 25 | ||
| 131 | #define __HAVE_ARCH_MEMSET | 26 | #define __HAVE_ARCH_MEMSET |
| 132 | extern void *memset(void *s, int c, size_t count); | 27 | extern void *memset(void *s, int c, size_t count); |
diff --git a/arch/blackfin/include/asm/tlbflush.h b/arch/blackfin/include/asm/tlbflush.h index f1a06c006ed0..7c368682c0a3 100644 --- a/arch/blackfin/include/asm/tlbflush.h +++ b/arch/blackfin/include/asm/tlbflush.h | |||
| @@ -1 +1,2 @@ | |||
| 1 | #include <asm-generic/tlbflush.h> | 1 | #include <asm-generic/tlbflush.h> |
| 2 | #define flush_tlb_kernel_range(s, e) do { } while (0) | ||
diff --git a/arch/blackfin/include/asm/trace.h b/arch/blackfin/include/asm/trace.h index dc0aa55ae773..33589a29b8d8 100644 --- a/arch/blackfin/include/asm/trace.h +++ b/arch/blackfin/include/asm/trace.h | |||
| @@ -23,6 +23,13 @@ | |||
| 23 | #ifndef __ASSEMBLY__ | 23 | #ifndef __ASSEMBLY__ |
| 24 | extern unsigned long trace_buff_offset; | 24 | extern unsigned long trace_buff_offset; |
| 25 | extern unsigned long software_trace_buff[]; | 25 | extern unsigned long software_trace_buff[]; |
| 26 | #if defined(CONFIG_DEBUG_VERBOSE) | ||
| 27 | extern void decode_address(char *buf, unsigned long address); | ||
| 28 | extern bool get_instruction(unsigned int *val, unsigned short *address); | ||
| 29 | #else | ||
| 30 | static inline void decode_address(char *buf, unsigned long address) { } | ||
| 31 | static inline bool get_instruction(unsigned int *val, unsigned short *address) { return false; } | ||
| 32 | #endif | ||
| 26 | 33 | ||
| 27 | /* Trace Macros for C files */ | 34 | /* Trace Macros for C files */ |
| 28 | 35 | ||
diff --git a/arch/blackfin/kernel/Makefile b/arch/blackfin/kernel/Makefile index 346a421f1562..30d0d1f01dc7 100644 --- a/arch/blackfin/kernel/Makefile +++ b/arch/blackfin/kernel/Makefile | |||
| @@ -7,7 +7,8 @@ extra-y := init_task.o vmlinux.lds | |||
| 7 | obj-y := \ | 7 | obj-y := \ |
| 8 | entry.o process.o bfin_ksyms.o ptrace.o setup.o signal.o \ | 8 | entry.o process.o bfin_ksyms.o ptrace.o setup.o signal.o \ |
| 9 | sys_bfin.o traps.o irqchip.o dma-mapping.o flat.o \ | 9 | sys_bfin.o traps.o irqchip.o dma-mapping.o flat.o \ |
| 10 | fixed_code.o reboot.o bfin_gpio.o bfin_dma_5xx.o | 10 | fixed_code.o reboot.o bfin_gpio.o bfin_dma_5xx.o \ |
| 11 | exception.o dumpstack.o | ||
| 11 | 12 | ||
| 12 | ifeq ($(CONFIG_GENERIC_CLOCKEVENTS),y) | 13 | ifeq ($(CONFIG_GENERIC_CLOCKEVENTS),y) |
| 13 | obj-y += time-ts.o | 14 | obj-y += time-ts.o |
| @@ -29,6 +30,8 @@ obj-$(CONFIG_NMI_WATCHDOG) += nmi.o | |||
| 29 | obj-$(CONFIG_EARLY_PRINTK) += early_printk.o | 30 | obj-$(CONFIG_EARLY_PRINTK) += early_printk.o |
| 30 | obj-$(CONFIG_EARLY_PRINTK) += shadow_console.o | 31 | obj-$(CONFIG_EARLY_PRINTK) += shadow_console.o |
| 31 | obj-$(CONFIG_STACKTRACE) += stacktrace.o | 32 | obj-$(CONFIG_STACKTRACE) += stacktrace.o |
| 33 | obj-$(CONFIG_DEBUG_VERBOSE) += trace.o | ||
| 34 | obj-$(CONFIG_BFIN_PSEUDODBG_INSNS) += pseudodbg.o | ||
| 32 | 35 | ||
| 33 | # the kgdb test puts code into L2 and without linker | 36 | # the kgdb test puts code into L2 and without linker |
| 34 | # relaxation, we need to force long calls to/from it | 37 | # relaxation, we need to force long calls to/from it |
diff --git a/arch/blackfin/kernel/bfin_gpio.c b/arch/blackfin/kernel/bfin_gpio.c index e35e20f00d9b..42833ee2b308 100644 --- a/arch/blackfin/kernel/bfin_gpio.c +++ b/arch/blackfin/kernel/bfin_gpio.c | |||
| @@ -475,9 +475,7 @@ GET_GPIO_P(maskb) | |||
| 475 | 475 | ||
| 476 | 476 | ||
| 477 | #ifdef CONFIG_PM | 477 | #ifdef CONFIG_PM |
| 478 | |||
| 479 | static unsigned short wakeup_map[GPIO_BANK_NUM]; | 478 | static unsigned short wakeup_map[GPIO_BANK_NUM]; |
| 480 | static unsigned char wakeup_flags_map[MAX_BLACKFIN_GPIOS]; | ||
| 481 | 479 | ||
| 482 | static const unsigned int sic_iwr_irqs[] = { | 480 | static const unsigned int sic_iwr_irqs[] = { |
| 483 | #if defined(BF533_FAMILY) | 481 | #if defined(BF533_FAMILY) |
| @@ -514,112 +512,26 @@ static const unsigned int sic_iwr_irqs[] = { | |||
| 514 | ************************************************************* | 512 | ************************************************************* |
| 515 | * MODIFICATION HISTORY : | 513 | * MODIFICATION HISTORY : |
| 516 | **************************************************************/ | 514 | **************************************************************/ |
| 517 | int gpio_pm_wakeup_request(unsigned gpio, unsigned char type) | 515 | int gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl) |
| 518 | { | ||
| 519 | unsigned long flags; | ||
| 520 | |||
| 521 | if ((check_gpio(gpio) < 0) || !type) | ||
| 522 | return -EINVAL; | ||
| 523 | |||
| 524 | local_irq_save_hw(flags); | ||
| 525 | wakeup_map[gpio_bank(gpio)] |= gpio_bit(gpio); | ||
| 526 | wakeup_flags_map[gpio] = type; | ||
| 527 | local_irq_restore_hw(flags); | ||
| 528 | |||
| 529 | return 0; | ||
| 530 | } | ||
| 531 | EXPORT_SYMBOL(gpio_pm_wakeup_request); | ||
| 532 | |||
| 533 | void gpio_pm_wakeup_free(unsigned gpio) | ||
| 534 | { | 516 | { |
| 535 | unsigned long flags; | 517 | unsigned long flags; |
| 536 | 518 | ||
| 537 | if (check_gpio(gpio) < 0) | 519 | if (check_gpio(gpio) < 0) |
| 538 | return; | 520 | return -EINVAL; |
| 539 | 521 | ||
| 540 | local_irq_save_hw(flags); | 522 | local_irq_save_hw(flags); |
| 541 | 523 | if (ctrl) | |
| 542 | wakeup_map[gpio_bank(gpio)] &= ~gpio_bit(gpio); | 524 | wakeup_map[gpio_bank(gpio)] |= gpio_bit(gpio); |
| 543 | |||
| 544 | local_irq_restore_hw(flags); | ||
| 545 | } | ||
| 546 | EXPORT_SYMBOL(gpio_pm_wakeup_free); | ||
| 547 | |||
| 548 | static int bfin_gpio_wakeup_type(unsigned gpio, unsigned char type) | ||
| 549 | { | ||
| 550 | port_setup(gpio, GPIO_USAGE); | ||
| 551 | set_gpio_dir(gpio, 0); | ||
| 552 | set_gpio_inen(gpio, 1); | ||
| 553 | |||
| 554 | if (type & (PM_WAKE_RISING | PM_WAKE_FALLING)) | ||
| 555 | set_gpio_edge(gpio, 1); | ||
| 556 | else | ||
| 557 | set_gpio_edge(gpio, 0); | ||
| 558 | |||
| 559 | if ((type & (PM_WAKE_BOTH_EDGES)) == (PM_WAKE_BOTH_EDGES)) | ||
| 560 | set_gpio_both(gpio, 1); | ||
| 561 | else | 525 | else |
| 562 | set_gpio_both(gpio, 0); | 526 | wakeup_map[gpio_bank(gpio)] &= ~gpio_bit(gpio); |
| 563 | |||
| 564 | if ((type & (PM_WAKE_FALLING | PM_WAKE_LOW))) | ||
| 565 | set_gpio_polar(gpio, 1); | ||
| 566 | else | ||
| 567 | set_gpio_polar(gpio, 0); | ||
| 568 | 527 | ||
| 569 | SSYNC(); | 528 | set_gpio_maskb(gpio, ctrl); |
| 570 | 529 | local_irq_restore_hw(flags); | |
| 571 | return 0; | ||
| 572 | } | ||
| 573 | |||
| 574 | u32 bfin_pm_standby_setup(void) | ||
| 575 | { | ||
| 576 | u16 bank, mask, i, gpio; | ||
| 577 | |||
| 578 | for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) { | ||
| 579 | mask = wakeup_map[gpio_bank(i)]; | ||
| 580 | bank = gpio_bank(i); | ||
| 581 | |||
| 582 | gpio_bank_saved[bank].maskb = gpio_array[bank]->maskb; | ||
| 583 | gpio_array[bank]->maskb = 0; | ||
| 584 | |||
| 585 | if (mask) { | ||
| 586 | #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x) | ||
| 587 | gpio_bank_saved[bank].fer = *port_fer[bank]; | ||
| 588 | #endif | ||
| 589 | gpio_bank_saved[bank].inen = gpio_array[bank]->inen; | ||
| 590 | gpio_bank_saved[bank].polar = gpio_array[bank]->polar; | ||
| 591 | gpio_bank_saved[bank].dir = gpio_array[bank]->dir; | ||
| 592 | gpio_bank_saved[bank].edge = gpio_array[bank]->edge; | ||
| 593 | gpio_bank_saved[bank].both = gpio_array[bank]->both; | ||
| 594 | gpio_bank_saved[bank].reserved = | ||
| 595 | reserved_gpio_map[bank]; | ||
| 596 | |||
| 597 | gpio = i; | ||
| 598 | |||
| 599 | while (mask) { | ||
| 600 | if ((mask & 1) && (wakeup_flags_map[gpio] != | ||
| 601 | PM_WAKE_IGNORE)) { | ||
| 602 | reserved_gpio_map[gpio_bank(gpio)] |= | ||
| 603 | gpio_bit(gpio); | ||
| 604 | bfin_gpio_wakeup_type(gpio, | ||
| 605 | wakeup_flags_map[gpio]); | ||
| 606 | set_gpio_data(gpio, 0); /*Clear*/ | ||
| 607 | } | ||
| 608 | gpio++; | ||
| 609 | mask >>= 1; | ||
| 610 | } | ||
| 611 | |||
| 612 | bfin_internal_set_wake(sic_iwr_irqs[bank], 1); | ||
| 613 | gpio_array[bank]->maskb_set = wakeup_map[gpio_bank(i)]; | ||
| 614 | } | ||
| 615 | } | ||
| 616 | |||
| 617 | AWA_DUMMY_READ(maskb_set); | ||
| 618 | 530 | ||
| 619 | return 0; | 531 | return 0; |
| 620 | } | 532 | } |
| 621 | 533 | ||
| 622 | void bfin_pm_standby_restore(void) | 534 | int bfin_pm_standby_ctrl(unsigned ctrl) |
| 623 | { | 535 | { |
| 624 | u16 bank, mask, i; | 536 | u16 bank, mask, i; |
| 625 | 537 | ||
| @@ -627,24 +539,10 @@ void bfin_pm_standby_restore(void) | |||
| 627 | mask = wakeup_map[gpio_bank(i)]; | 539 | mask = wakeup_map[gpio_bank(i)]; |
| 628 | bank = gpio_bank(i); | 540 | bank = gpio_bank(i); |
| 629 | 541 | ||
| 630 | if (mask) { | 542 | if (mask) |
| 631 | #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x) | 543 | bfin_internal_set_wake(sic_iwr_irqs[bank], ctrl); |
| 632 | *port_fer[bank] = gpio_bank_saved[bank].fer; | ||
| 633 | #endif | ||
| 634 | gpio_array[bank]->inen = gpio_bank_saved[bank].inen; | ||
| 635 | gpio_array[bank]->dir = gpio_bank_saved[bank].dir; | ||
| 636 | gpio_array[bank]->polar = gpio_bank_saved[bank].polar; | ||
| 637 | gpio_array[bank]->edge = gpio_bank_saved[bank].edge; | ||
| 638 | gpio_array[bank]->both = gpio_bank_saved[bank].both; | ||
| 639 | |||
| 640 | reserved_gpio_map[bank] = | ||
| 641 | gpio_bank_saved[bank].reserved; | ||
| 642 | bfin_internal_set_wake(sic_iwr_irqs[bank], 0); | ||
| 643 | } | ||
| 644 | |||
| 645 | gpio_array[bank]->maskb = gpio_bank_saved[bank].maskb; | ||
| 646 | } | 544 | } |
| 647 | AWA_DUMMY_READ(maskb); | 545 | return 0; |
| 648 | } | 546 | } |
| 649 | 547 | ||
| 650 | void bfin_gpio_pm_hibernate_suspend(void) | 548 | void bfin_gpio_pm_hibernate_suspend(void) |
| @@ -708,16 +606,11 @@ void bfin_gpio_pm_hibernate_restore(void) | |||
| 708 | #else /* CONFIG_BF54x */ | 606 | #else /* CONFIG_BF54x */ |
| 709 | #ifdef CONFIG_PM | 607 | #ifdef CONFIG_PM |
| 710 | 608 | ||
| 711 | u32 bfin_pm_standby_setup(void) | 609 | int bfin_pm_standby_ctrl(unsigned ctrl) |
| 712 | { | 610 | { |
| 713 | return 0; | 611 | return 0; |
| 714 | } | 612 | } |
| 715 | 613 | ||
| 716 | void bfin_pm_standby_restore(void) | ||
| 717 | { | ||
| 718 | |||
| 719 | } | ||
| 720 | |||
| 721 | void bfin_gpio_pm_hibernate_suspend(void) | 614 | void bfin_gpio_pm_hibernate_suspend(void) |
| 722 | { | 615 | { |
| 723 | int i, bank; | 616 | int i, bank; |
diff --git a/arch/blackfin/kernel/bfin_ksyms.c b/arch/blackfin/kernel/bfin_ksyms.c index ed8392c117ea..2c264b51566a 100644 --- a/arch/blackfin/kernel/bfin_ksyms.c +++ b/arch/blackfin/kernel/bfin_ksyms.c | |||
| @@ -33,6 +33,18 @@ EXPORT_SYMBOL(memmove); | |||
| 33 | EXPORT_SYMBOL(memchr); | 33 | EXPORT_SYMBOL(memchr); |
| 34 | 34 | ||
| 35 | /* | 35 | /* |
| 36 | * Because string functions are both inline and exported functions and | ||
| 37 | * folder arch/blackfin/lib is configured as a library path in Makefile, | ||
| 38 | * symbols exported in folder lib is not linked into built-in.o but | ||
| 39 | * inlined only. In order to export string symbols to kernel module | ||
| 40 | * properly, they should be exported here. | ||
| 41 | */ | ||
| 42 | EXPORT_SYMBOL(strcpy); | ||
| 43 | EXPORT_SYMBOL(strncpy); | ||
| 44 | EXPORT_SYMBOL(strcmp); | ||
| 45 | EXPORT_SYMBOL(strncmp); | ||
| 46 | |||
| 47 | /* | ||
| 36 | * libgcc functions - functions that are used internally by the | 48 | * libgcc functions - functions that are used internally by the |
| 37 | * compiler... (prototypes are not correct though, but that | 49 | * compiler... (prototypes are not correct though, but that |
| 38 | * doesn't really matter since they're not versioned). | 50 | * doesn't really matter since they're not versioned). |
diff --git a/arch/blackfin/kernel/dumpstack.c b/arch/blackfin/kernel/dumpstack.c new file mode 100644 index 000000000000..5cfbaa298211 --- /dev/null +++ b/arch/blackfin/kernel/dumpstack.c | |||
| @@ -0,0 +1,174 @@ | |||
| 1 | /* Provide basic stack dumping functions | ||
| 2 | * | ||
| 3 | * Copyright 2004-2009 Analog Devices Inc. | ||
| 4 | * | ||
| 5 | * Licensed under the GPL-2 or later | ||
| 6 | */ | ||
| 7 | |||
| 8 | #include <linux/kernel.h> | ||
| 9 | #include <linux/thread_info.h> | ||
| 10 | #include <linux/mm.h> | ||
| 11 | #include <linux/uaccess.h> | ||
| 12 | #include <linux/module.h> | ||
| 13 | #include <asm/trace.h> | ||
| 14 | |||
| 15 | /* | ||
| 16 | * Checks to see if the address pointed to is either a | ||
| 17 | * 16-bit CALL instruction, or a 32-bit CALL instruction | ||
| 18 | */ | ||
| 19 | static bool is_bfin_call(unsigned short *addr) | ||
| 20 | { | ||
| 21 | unsigned int opcode; | ||
| 22 | |||
| 23 | if (!get_instruction(&opcode, addr)) | ||
| 24 | return false; | ||
| 25 | |||
| 26 | if ((opcode >= 0x0060 && opcode <= 0x0067) || | ||
| 27 | (opcode >= 0x0070 && opcode <= 0x0077) || | ||
| 28 | (opcode >= 0xE3000000 && opcode <= 0xE3FFFFFF)) | ||
| 29 | return true; | ||
| 30 | |||
| 31 | return false; | ||
| 32 | |||
| 33 | } | ||
| 34 | |||
| 35 | void show_stack(struct task_struct *task, unsigned long *stack) | ||
| 36 | { | ||
| 37 | #ifdef CONFIG_PRINTK | ||
| 38 | unsigned int *addr, *endstack, *fp = 0, *frame; | ||
| 39 | unsigned short *ins_addr; | ||
| 40 | char buf[150]; | ||
| 41 | unsigned int i, j, ret_addr, frame_no = 0; | ||
| 42 | |||
| 43 | /* | ||
| 44 | * If we have been passed a specific stack, use that one otherwise | ||
| 45 | * if we have been passed a task structure, use that, otherwise | ||
| 46 | * use the stack of where the variable "stack" exists | ||
| 47 | */ | ||
| 48 | |||
| 49 | if (stack == NULL) { | ||
| 50 | if (task) { | ||
| 51 | /* We know this is a kernel stack, so this is the start/end */ | ||
| 52 | stack = (unsigned long *)task->thread.ksp; | ||
| 53 | endstack = (unsigned int *)(((unsigned int)(stack) & ~(THREAD_SIZE - 1)) + THREAD_SIZE); | ||
| 54 | } else { | ||
| 55 | /* print out the existing stack info */ | ||
| 56 | stack = (unsigned long *)&stack; | ||
| 57 | endstack = (unsigned int *)PAGE_ALIGN((unsigned int)stack); | ||
| 58 | } | ||
| 59 | } else | ||
| 60 | endstack = (unsigned int *)PAGE_ALIGN((unsigned int)stack); | ||
| 61 | |||
| 62 | printk(KERN_NOTICE "Stack info:\n"); | ||
| 63 | decode_address(buf, (unsigned int)stack); | ||
| 64 | printk(KERN_NOTICE " SP: [0x%p] %s\n", stack, buf); | ||
| 65 | |||
| 66 | if (!access_ok(VERIFY_READ, stack, (unsigned int)endstack - (unsigned int)stack)) { | ||
| 67 | printk(KERN_NOTICE "Invalid stack pointer\n"); | ||
| 68 | return; | ||
| 69 | } | ||
| 70 | |||
| 71 | /* First thing is to look for a frame pointer */ | ||
| 72 | for (addr = (unsigned int *)((unsigned int)stack & ~0xF); addr < endstack; addr++) { | ||
| 73 | if (*addr & 0x1) | ||
| 74 | continue; | ||
| 75 | ins_addr = (unsigned short *)*addr; | ||
| 76 | ins_addr--; | ||
| 77 | if (is_bfin_call(ins_addr)) | ||
| 78 | fp = addr - 1; | ||
| 79 | |||
| 80 | if (fp) { | ||
| 81 | /* Let's check to see if it is a frame pointer */ | ||
| 82 | while (fp >= (addr - 1) && fp < endstack | ||
| 83 | && fp && ((unsigned int) fp & 0x3) == 0) | ||
| 84 | fp = (unsigned int *)*fp; | ||
| 85 | if (fp == 0 || fp == endstack) { | ||
| 86 | fp = addr - 1; | ||
| 87 | break; | ||
| 88 | } | ||
| 89 | fp = 0; | ||
| 90 | } | ||
| 91 | } | ||
| 92 | if (fp) { | ||
| 93 | frame = fp; | ||
| 94 | printk(KERN_NOTICE " FP: (0x%p)\n", fp); | ||
| 95 | } else | ||
| 96 | frame = 0; | ||
| 97 | |||
| 98 | /* | ||
| 99 | * Now that we think we know where things are, we | ||
| 100 | * walk the stack again, this time printing things out | ||
| 101 | * incase there is no frame pointer, we still look for | ||
| 102 | * valid return addresses | ||
| 103 | */ | ||
| 104 | |||
| 105 | /* First time print out data, next time, print out symbols */ | ||
| 106 | for (j = 0; j <= 1; j++) { | ||
| 107 | if (j) | ||
| 108 | printk(KERN_NOTICE "Return addresses in stack:\n"); | ||
| 109 | else | ||
| 110 | printk(KERN_NOTICE " Memory from 0x%08lx to %p", ((long unsigned int)stack & ~0xF), endstack); | ||
| 111 | |||
| 112 | fp = frame; | ||
| 113 | frame_no = 0; | ||
| 114 | |||
| 115 | for (addr = (unsigned int *)((unsigned int)stack & ~0xF), i = 0; | ||
| 116 | addr < endstack; addr++, i++) { | ||
| 117 | |||
| 118 | ret_addr = 0; | ||
| 119 | if (!j && i % 8 == 0) | ||
| 120 | printk(KERN_NOTICE "%p:", addr); | ||
| 121 | |||
| 122 | /* if it is an odd address, or zero, just skip it */ | ||
| 123 | if (*addr & 0x1 || !*addr) | ||
| 124 | goto print; | ||
| 125 | |||
| 126 | ins_addr = (unsigned short *)*addr; | ||
| 127 | |||
| 128 | /* Go back one instruction, and see if it is a CALL */ | ||
| 129 | ins_addr--; | ||
| 130 | ret_addr = is_bfin_call(ins_addr); | ||
| 131 | print: | ||
| 132 | if (!j && stack == (unsigned long *)addr) | ||
| 133 | printk("[%08x]", *addr); | ||
| 134 | else if (ret_addr) | ||
| 135 | if (j) { | ||
| 136 | decode_address(buf, (unsigned int)*addr); | ||
| 137 | if (frame == addr) { | ||
| 138 | printk(KERN_NOTICE " frame %2i : %s\n", frame_no, buf); | ||
| 139 | continue; | ||
| 140 | } | ||
| 141 | printk(KERN_NOTICE " address : %s\n", buf); | ||
| 142 | } else | ||
| 143 | printk("<%08x>", *addr); | ||
| 144 | else if (fp == addr) { | ||
| 145 | if (j) | ||
| 146 | frame = addr+1; | ||
| 147 | else | ||
| 148 | printk("(%08x)", *addr); | ||
| 149 | |||
| 150 | fp = (unsigned int *)*addr; | ||
| 151 | frame_no++; | ||
| 152 | |||
| 153 | } else if (!j) | ||
| 154 | printk(" %08x ", *addr); | ||
| 155 | } | ||
| 156 | if (!j) | ||
| 157 | printk("\n"); | ||
| 158 | } | ||
| 159 | #endif | ||
| 160 | } | ||
| 161 | EXPORT_SYMBOL(show_stack); | ||
| 162 | |||
| 163 | void dump_stack(void) | ||
| 164 | { | ||
| 165 | unsigned long stack; | ||
| 166 | #ifdef CONFIG_DEBUG_BFIN_HWTRACE_ON | ||
| 167 | int tflags; | ||
| 168 | #endif | ||
| 169 | trace_buffer_save(tflags); | ||
| 170 | dump_bfin_trace_buffer(); | ||
| 171 | show_stack(current, &stack); | ||
| 172 | trace_buffer_restore(tflags); | ||
| 173 | } | ||
| 174 | EXPORT_SYMBOL(dump_stack); | ||
diff --git a/arch/blackfin/kernel/exception.c b/arch/blackfin/kernel/exception.c new file mode 100644 index 000000000000..9208b5fd5186 --- /dev/null +++ b/arch/blackfin/kernel/exception.c | |||
| @@ -0,0 +1,45 @@ | |||
| 1 | /* Basic functions for adding/removing custom exception handlers | ||
| 2 | * | ||
| 3 | * Copyright 2004-2009 Analog Devices Inc. | ||
| 4 | * | ||
| 5 | * Licensed under the GPL-2 or later | ||
| 6 | */ | ||
| 7 | |||
| 8 | #include <linux/module.h> | ||
| 9 | #include <asm/irq_handler.h> | ||
| 10 | |||
| 11 | int bfin_request_exception(unsigned int exception, void (*handler)(void)) | ||
| 12 | { | ||
| 13 | void (*curr_handler)(void); | ||
| 14 | |||
| 15 | if (exception > 0x3F) | ||
| 16 | return -EINVAL; | ||
| 17 | |||
| 18 | curr_handler = ex_table[exception]; | ||
| 19 | |||
| 20 | if (curr_handler != ex_replaceable) | ||
| 21 | return -EBUSY; | ||
| 22 | |||
| 23 | ex_table[exception] = handler; | ||
| 24 | |||
| 25 | return 0; | ||
| 26 | } | ||
| 27 | EXPORT_SYMBOL(bfin_request_exception); | ||
| 28 | |||
| 29 | int bfin_free_exception(unsigned int exception, void (*handler)(void)) | ||
| 30 | { | ||
| 31 | void (*curr_handler)(void); | ||
| 32 | |||
| 33 | if (exception > 0x3F) | ||
| 34 | return -EINVAL; | ||
| 35 | |||
| 36 | curr_handler = ex_table[exception]; | ||
| 37 | |||
| 38 | if (curr_handler != handler) | ||
| 39 | return -EBUSY; | ||
| 40 | |||
| 41 | ex_table[exception] = ex_replaceable; | ||
| 42 | |||
| 43 | return 0; | ||
| 44 | } | ||
| 45 | EXPORT_SYMBOL(bfin_free_exception); | ||
diff --git a/arch/blackfin/kernel/kgdb.c b/arch/blackfin/kernel/kgdb.c index 7367aea4ae59..08bc44ea6883 100644 --- a/arch/blackfin/kernel/kgdb.c +++ b/arch/blackfin/kernel/kgdb.c | |||
| @@ -66,7 +66,7 @@ void pt_regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs) | |||
| 66 | gdb_regs[BFIN_RETN] = regs->retn; | 66 | gdb_regs[BFIN_RETN] = regs->retn; |
| 67 | gdb_regs[BFIN_RETE] = regs->rete; | 67 | gdb_regs[BFIN_RETE] = regs->rete; |
| 68 | gdb_regs[BFIN_PC] = regs->pc; | 68 | gdb_regs[BFIN_PC] = regs->pc; |
| 69 | gdb_regs[BFIN_CC] = 0; | 69 | gdb_regs[BFIN_CC] = (regs->astat >> 5) & 1; |
| 70 | gdb_regs[BFIN_EXTRA1] = 0; | 70 | gdb_regs[BFIN_EXTRA1] = 0; |
| 71 | gdb_regs[BFIN_EXTRA2] = 0; | 71 | gdb_regs[BFIN_EXTRA2] = 0; |
| 72 | gdb_regs[BFIN_EXTRA3] = 0; | 72 | gdb_regs[BFIN_EXTRA3] = 0; |
diff --git a/arch/blackfin/kernel/pseudodbg.c b/arch/blackfin/kernel/pseudodbg.c new file mode 100644 index 000000000000..db85bc94334e --- /dev/null +++ b/arch/blackfin/kernel/pseudodbg.c | |||
| @@ -0,0 +1,191 @@ | |||
| 1 | /* The fake debug assert instructions | ||
| 2 | * | ||
| 3 | * Copyright 2010 Analog Devices Inc. | ||
| 4 | * | ||
| 5 | * Licensed under the GPL-2 or later | ||
| 6 | */ | ||
| 7 | |||
| 8 | #include <linux/types.h> | ||
| 9 | #include <linux/kernel.h> | ||
| 10 | #include <linux/ptrace.h> | ||
| 11 | |||
| 12 | const char * const greg_names[] = { | ||
| 13 | "R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7", | ||
| 14 | "P0", "P1", "P2", "P3", "P4", "P5", "SP", "FP", | ||
| 15 | "I0", "I1", "I2", "I3", "M0", "M1", "M2", "M3", | ||
| 16 | "B0", "B1", "B2", "B3", "L0", "L1", "L2", "L3", | ||
| 17 | "A0.X", "A0.W", "A1.X", "A1.W", "<res>", "<res>", "ASTAT", "RETS", | ||
| 18 | "<res>", "<res>", "<res>", "<res>", "<res>", "<res>", "<res>", "<res>", | ||
| 19 | "LC0", "LT0", "LB0", "LC1", "LT1", "LB1", "CYCLES", "CYCLES2", | ||
| 20 | "USP", "SEQSTAT", "SYSCFG", "RETI", "RETX", "RETN", "RETE", "EMUDAT", | ||
| 21 | }; | ||
| 22 | |||
| 23 | static const char *get_allreg_name(int grp, int reg) | ||
| 24 | { | ||
| 25 | return greg_names[(grp << 3) | reg]; | ||
| 26 | } | ||
| 27 | |||
| 28 | /* | ||
| 29 | * Unfortunately, the pt_regs structure is not laid out the same way as the | ||
| 30 | * hardware register file, so we need to do some fix ups. | ||
| 31 | * | ||
| 32 | * CYCLES is not stored in the pt_regs structure - so, we just read it from | ||
| 33 | * the hardware. | ||
| 34 | * | ||
| 35 | * Don't support: | ||
| 36 | * - All reserved registers | ||
| 37 | * - All in group 7 are (supervisors only) | ||
| 38 | */ | ||
| 39 | |||
| 40 | static bool fix_up_reg(struct pt_regs *fp, long *value, int grp, int reg) | ||
| 41 | { | ||
| 42 | long *val = &fp->r0; | ||
| 43 | unsigned long tmp; | ||
| 44 | |||
| 45 | /* Only do Dregs and Pregs for now */ | ||
| 46 | if (grp == 5 || | ||
| 47 | (grp == 4 && (reg == 4 || reg == 5)) || | ||
| 48 | (grp == 7)) | ||
| 49 | return false; | ||
| 50 | |||
| 51 | if (grp == 0 || (grp == 1 && reg < 6)) | ||
| 52 | val -= (reg + 8 * grp); | ||
| 53 | else if (grp == 1 && reg == 6) | ||
| 54 | val = &fp->usp; | ||
| 55 | else if (grp == 1 && reg == 7) | ||
| 56 | val = &fp->fp; | ||
| 57 | else if (grp == 2) { | ||
| 58 | val = &fp->i0; | ||
| 59 | val -= reg; | ||
| 60 | } else if (grp == 3 && reg >= 4) { | ||
| 61 | val = &fp->l0; | ||
| 62 | val -= (reg - 4); | ||
| 63 | } else if (grp == 3 && reg < 4) { | ||
| 64 | val = &fp->b0; | ||
| 65 | val -= reg; | ||
| 66 | } else if (grp == 4 && reg < 4) { | ||
| 67 | val = &fp->a0x; | ||
| 68 | val -= reg; | ||
| 69 | } else if (grp == 4 && reg == 6) | ||
| 70 | val = &fp->astat; | ||
| 71 | else if (grp == 4 && reg == 7) | ||
| 72 | val = &fp->rets; | ||
| 73 | else if (grp == 6 && reg < 6) { | ||
| 74 | val = &fp->lc0; | ||
| 75 | val -= reg; | ||
| 76 | } else if (grp == 6 && reg == 6) { | ||
| 77 | __asm__ __volatile__("%0 = cycles;\n" : "=d"(tmp)); | ||
| 78 | val = &tmp; | ||
| 79 | } else if (grp == 6 && reg == 7) { | ||
| 80 | __asm__ __volatile__("%0 = cycles2;\n" : "=d"(tmp)); | ||
| 81 | val = &tmp; | ||
| 82 | } | ||
| 83 | |||
| 84 | *value = *val; | ||
| 85 | return true; | ||
| 86 | |||
| 87 | } | ||
| 88 | |||
| 89 | #define PseudoDbg_Assert_opcode 0xf0000000 | ||
| 90 | #define PseudoDbg_Assert_expected_bits 0 | ||
| 91 | #define PseudoDbg_Assert_expected_mask 0xffff | ||
| 92 | #define PseudoDbg_Assert_regtest_bits 16 | ||
| 93 | #define PseudoDbg_Assert_regtest_mask 0x7 | ||
| 94 | #define PseudoDbg_Assert_grp_bits 19 | ||
| 95 | #define PseudoDbg_Assert_grp_mask 0x7 | ||
| 96 | #define PseudoDbg_Assert_dbgop_bits 22 | ||
| 97 | #define PseudoDbg_Assert_dbgop_mask 0x3 | ||
| 98 | #define PseudoDbg_Assert_dontcare_bits 24 | ||
| 99 | #define PseudoDbg_Assert_dontcare_mask 0x7 | ||
| 100 | #define PseudoDbg_Assert_code_bits 27 | ||
| 101 | #define PseudoDbg_Assert_code_mask 0x1f | ||
| 102 | |||
| 103 | /* | ||
| 104 | * DBGA - debug assert | ||
| 105 | */ | ||
| 106 | bool execute_pseudodbg_assert(struct pt_regs *fp, unsigned int opcode) | ||
| 107 | { | ||
| 108 | int expected = ((opcode >> PseudoDbg_Assert_expected_bits) & PseudoDbg_Assert_expected_mask); | ||
| 109 | int dbgop = ((opcode >> (PseudoDbg_Assert_dbgop_bits)) & PseudoDbg_Assert_dbgop_mask); | ||
| 110 | int grp = ((opcode >> (PseudoDbg_Assert_grp_bits)) & PseudoDbg_Assert_grp_mask); | ||
| 111 | int regtest = ((opcode >> (PseudoDbg_Assert_regtest_bits)) & PseudoDbg_Assert_regtest_mask); | ||
| 112 | long value; | ||
| 113 | |||
| 114 | if ((opcode & 0xFF000000) != PseudoDbg_Assert_opcode) | ||
| 115 | return false; | ||
| 116 | |||
| 117 | if (!fix_up_reg(fp, &value, grp, regtest)) | ||
| 118 | return false; | ||
| 119 | |||
| 120 | if (dbgop == 0 || dbgop == 2) { | ||
| 121 | /* DBGA ( regs_lo , uimm16 ) */ | ||
| 122 | /* DBGAL ( regs , uimm16 ) */ | ||
| 123 | if (expected != (value & 0xFFFF)) { | ||
| 124 | pr_notice("DBGA (%s.L,0x%x) failure, got 0x%x\n", | ||
| 125 | get_allreg_name(grp, regtest), | ||
| 126 | expected, (unsigned int)(value & 0xFFFF)); | ||
| 127 | return false; | ||
| 128 | } | ||
| 129 | |||
| 130 | } else if (dbgop == 1 || dbgop == 3) { | ||
| 131 | /* DBGA ( regs_hi , uimm16 ) */ | ||
| 132 | /* DBGAH ( regs , uimm16 ) */ | ||
| 133 | if (expected != ((value >> 16) & 0xFFFF)) { | ||
| 134 | pr_notice("DBGA (%s.H,0x%x) failure, got 0x%x\n", | ||
| 135 | get_allreg_name(grp, regtest), | ||
| 136 | expected, (unsigned int)((value >> 16) & 0xFFFF)); | ||
| 137 | return false; | ||
| 138 | } | ||
| 139 | } | ||
| 140 | |||
| 141 | fp->pc += 4; | ||
| 142 | return true; | ||
| 143 | } | ||
| 144 | |||
| 145 | #define PseudoDbg_opcode 0xf8000000 | ||
| 146 | #define PseudoDbg_reg_bits 0 | ||
| 147 | #define PseudoDbg_reg_mask 0x7 | ||
| 148 | #define PseudoDbg_grp_bits 3 | ||
| 149 | #define PseudoDbg_grp_mask 0x7 | ||
| 150 | #define PseudoDbg_fn_bits 6 | ||
| 151 | #define PseudoDbg_fn_mask 0x3 | ||
| 152 | #define PseudoDbg_code_bits 8 | ||
| 153 | #define PseudoDbg_code_mask 0xff | ||
| 154 | |||
| 155 | /* | ||
| 156 | * DBG - debug (dump a register value out) | ||
| 157 | */ | ||
| 158 | bool execute_pseudodbg(struct pt_regs *fp, unsigned int opcode) | ||
| 159 | { | ||
| 160 | int grp, fn, reg; | ||
| 161 | long value, value1; | ||
| 162 | |||
| 163 | if ((opcode & 0xFF000000) != PseudoDbg_opcode) | ||
| 164 | return false; | ||
| 165 | |||
| 166 | opcode >>= 16; | ||
| 167 | grp = ((opcode >> PseudoDbg_grp_bits) & PseudoDbg_reg_mask); | ||
| 168 | fn = ((opcode >> PseudoDbg_fn_bits) & PseudoDbg_fn_mask); | ||
| 169 | reg = ((opcode >> PseudoDbg_reg_bits) & PseudoDbg_reg_mask); | ||
| 170 | |||
| 171 | if (fn == 3 && (reg == 0 || reg == 1)) { | ||
| 172 | if (!fix_up_reg(fp, &value, 4, 2 * reg)) | ||
| 173 | return false; | ||
| 174 | if (!fix_up_reg(fp, &value1, 4, 2 * reg + 1)) | ||
| 175 | return false; | ||
| 176 | |||
| 177 | pr_notice("DBG A%i = %02lx%08lx\n", reg, value & 0xFF, value1); | ||
| 178 | fp->pc += 2; | ||
| 179 | return true; | ||
| 180 | |||
| 181 | } else if (fn == 0) { | ||
| 182 | if (!fix_up_reg(fp, &value, grp, reg)) | ||
| 183 | return false; | ||
| 184 | |||
| 185 | pr_notice("DBG %s = %08lx\n", get_allreg_name(grp, reg), value); | ||
| 186 | fp->pc += 2; | ||
| 187 | return true; | ||
| 188 | } | ||
| 189 | |||
| 190 | return false; | ||
| 191 | } | ||
diff --git a/arch/blackfin/kernel/ptrace.c b/arch/blackfin/kernel/ptrace.c index 43eb969405d1..6ec77685df52 100644 --- a/arch/blackfin/kernel/ptrace.c +++ b/arch/blackfin/kernel/ptrace.c | |||
| @@ -292,28 +292,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) | |||
| 292 | break; | 292 | break; |
| 293 | } | 293 | } |
| 294 | 294 | ||
| 295 | #ifdef CONFIG_BINFMT_ELF_FDPIC | ||
| 296 | case PTRACE_GETFDPIC: { | ||
| 297 | unsigned long tmp = 0; | ||
| 298 | |||
| 299 | switch (addr) { | ||
| 300 | case_PTRACE_GETFDPIC_EXEC: | ||
| 301 | case PTRACE_GETFDPIC_EXEC: | ||
| 302 | tmp = child->mm->context.exec_fdpic_loadmap; | ||
| 303 | break; | ||
| 304 | case_PTRACE_GETFDPIC_INTERP: | ||
| 305 | case PTRACE_GETFDPIC_INTERP: | ||
| 306 | tmp = child->mm->context.interp_fdpic_loadmap; | ||
| 307 | break; | ||
| 308 | default: | ||
| 309 | break; | ||
| 310 | } | ||
| 311 | |||
| 312 | ret = put_user(tmp, datap); | ||
| 313 | break; | ||
| 314 | } | ||
| 315 | #endif | ||
| 316 | |||
| 317 | /* when I and D space are separate, this will have to be fixed. */ | 295 | /* when I and D space are separate, this will have to be fixed. */ |
| 318 | case PTRACE_POKEDATA: | 296 | case PTRACE_POKEDATA: |
| 319 | pr_debug("ptrace: PTRACE_PEEKDATA\n"); | 297 | pr_debug("ptrace: PTRACE_PEEKDATA\n"); |
| @@ -357,8 +335,14 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) | |||
| 357 | case PTRACE_PEEKUSR: | 335 | case PTRACE_PEEKUSR: |
| 358 | switch (addr) { | 336 | switch (addr) { |
| 359 | #ifdef CONFIG_BINFMT_ELF_FDPIC /* backwards compat */ | 337 | #ifdef CONFIG_BINFMT_ELF_FDPIC /* backwards compat */ |
| 360 | case PT_FDPIC_EXEC: goto case_PTRACE_GETFDPIC_EXEC; | 338 | case PT_FDPIC_EXEC: |
| 361 | case PT_FDPIC_INTERP: goto case_PTRACE_GETFDPIC_INTERP; | 339 | request = PTRACE_GETFDPIC; |
| 340 | addr = PTRACE_GETFDPIC_EXEC; | ||
| 341 | goto case_default; | ||
| 342 | case PT_FDPIC_INTERP: | ||
| 343 | request = PTRACE_GETFDPIC; | ||
| 344 | addr = PTRACE_GETFDPIC_INTERP; | ||
| 345 | goto case_default; | ||
| 362 | #endif | 346 | #endif |
| 363 | default: | 347 | default: |
| 364 | ret = get_reg(child, addr, datap); | 348 | ret = get_reg(child, addr, datap); |
| @@ -385,6 +369,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) | |||
| 385 | 0, sizeof(struct pt_regs), | 369 | 0, sizeof(struct pt_regs), |
| 386 | (const void __user *)data); | 370 | (const void __user *)data); |
| 387 | 371 | ||
| 372 | case_default: | ||
| 388 | default: | 373 | default: |
| 389 | ret = ptrace_request(child, request, addr, data); | 374 | ret = ptrace_request(child, request, addr, data); |
| 390 | break; | 375 | break; |
diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c index 8e2efceb364b..d37a397f43f5 100644 --- a/arch/blackfin/kernel/setup.c +++ b/arch/blackfin/kernel/setup.c | |||
| @@ -1,5 +1,5 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Copyright 2004-2009 Analog Devices Inc. | 2 | * Copyright 2004-2010 Analog Devices Inc. |
| 3 | * | 3 | * |
| 4 | * Licensed under the GPL-2 or later. | 4 | * Licensed under the GPL-2 or later. |
| 5 | */ | 5 | */ |
| @@ -925,7 +925,7 @@ void __init setup_arch(char **cmdline_p) | |||
| 925 | else if (_bfin_swrst & RESET_SOFTWARE) | 925 | else if (_bfin_swrst & RESET_SOFTWARE) |
| 926 | printk(KERN_NOTICE "Reset caused by Software reset\n"); | 926 | printk(KERN_NOTICE "Reset caused by Software reset\n"); |
| 927 | 927 | ||
| 928 | printk(KERN_INFO "Blackfin support (C) 2004-2009 Analog Devices, Inc.\n"); | 928 | printk(KERN_INFO "Blackfin support (C) 2004-2010 Analog Devices, Inc.\n"); |
| 929 | if (bfin_compiled_revid() == 0xffff) | 929 | if (bfin_compiled_revid() == 0xffff) |
| 930 | printk(KERN_INFO "Compiled for ADSP-%s Rev any, running on 0.%d\n", CPU, bfin_revid()); | 930 | printk(KERN_INFO "Compiled for ADSP-%s Rev any, running on 0.%d\n", CPU, bfin_revid()); |
| 931 | else if (bfin_compiled_revid() == -1) | 931 | else if (bfin_compiled_revid() == -1) |
diff --git a/arch/blackfin/kernel/sys_bfin.c b/arch/blackfin/kernel/sys_bfin.c index 2e7f8e10bf87..bdc1e2f0da32 100644 --- a/arch/blackfin/kernel/sys_bfin.c +++ b/arch/blackfin/kernel/sys_bfin.c | |||
| @@ -47,3 +47,26 @@ unsigned long get_fb_unmapped_area(struct file *filp, unsigned long orig_addr, | |||
| 47 | } | 47 | } |
| 48 | EXPORT_SYMBOL(get_fb_unmapped_area); | 48 | EXPORT_SYMBOL(get_fb_unmapped_area); |
| 49 | #endif | 49 | #endif |
| 50 | |||
| 51 | /* Needed for legacy userspace atomic emulation */ | ||
| 52 | static DEFINE_SPINLOCK(bfin_spinlock_lock); | ||
| 53 | |||
| 54 | #ifdef CONFIG_SYS_BFIN_SPINLOCK_L1 | ||
| 55 | __attribute__((l1_text)) | ||
| 56 | #endif | ||
| 57 | asmlinkage int sys_bfin_spinlock(int *p) | ||
| 58 | { | ||
| 59 | int ret, tmp = 0; | ||
| 60 | |||
| 61 | spin_lock(&bfin_spinlock_lock); /* This would also hold kernel preemption. */ | ||
| 62 | ret = get_user(tmp, p); | ||
| 63 | if (likely(ret == 0)) { | ||
| 64 | if (unlikely(tmp)) | ||
| 65 | ret = 1; | ||
| 66 | else | ||
| 67 | put_user(1, p); | ||
| 68 | } | ||
| 69 | spin_unlock(&bfin_spinlock_lock); | ||
| 70 | |||
| 71 | return ret; | ||
| 72 | } | ||
diff --git a/arch/blackfin/kernel/trace.c b/arch/blackfin/kernel/trace.c new file mode 100644 index 000000000000..59fcdf6b0138 --- /dev/null +++ b/arch/blackfin/kernel/trace.c | |||
| @@ -0,0 +1,981 @@ | |||
| 1 | /* provide some functions which dump the trace buffer, in a nice way for people | ||
| 2 | * to read it, and understand what is going on | ||
| 3 | * | ||
| 4 | * Copyright 2004-2010 Analog Devices Inc. | ||
| 5 | * | ||
| 6 | * Licensed under the GPL-2 or later | ||
| 7 | */ | ||
| 8 | |||
| 9 | #include <linux/kernel.h> | ||
| 10 | #include <linux/hardirq.h> | ||
| 11 | #include <linux/thread_info.h> | ||
| 12 | #include <linux/mm.h> | ||
| 13 | #include <linux/uaccess.h> | ||
| 14 | #include <linux/module.h> | ||
| 15 | #include <linux/kallsyms.h> | ||
| 16 | #include <linux/err.h> | ||
| 17 | #include <linux/fs.h> | ||
| 18 | #include <asm/dma.h> | ||
| 19 | #include <asm/trace.h> | ||
| 20 | #include <asm/fixed_code.h> | ||
| 21 | #include <asm/traps.h> | ||
| 22 | #include <asm/irq_handler.h> | ||
| 23 | |||
| 24 | void decode_address(char *buf, unsigned long address) | ||
| 25 | { | ||
| 26 | struct task_struct *p; | ||
| 27 | struct mm_struct *mm; | ||
| 28 | unsigned long flags, offset; | ||
| 29 | unsigned char in_atomic = (bfin_read_IPEND() & 0x10) || in_atomic(); | ||
| 30 | struct rb_node *n; | ||
| 31 | |||
| 32 | #ifdef CONFIG_KALLSYMS | ||
| 33 | unsigned long symsize; | ||
| 34 | const char *symname; | ||
| 35 | char *modname; | ||
| 36 | char *delim = ":"; | ||
| 37 | char namebuf[128]; | ||
| 38 | #endif | ||
| 39 | |||
| 40 | buf += sprintf(buf, "<0x%08lx> ", address); | ||
| 41 | |||
| 42 | #ifdef CONFIG_KALLSYMS | ||
| 43 | /* look up the address and see if we are in kernel space */ | ||
| 44 | symname = kallsyms_lookup(address, &symsize, &offset, &modname, namebuf); | ||
| 45 | |||
| 46 | if (symname) { | ||
| 47 | /* yeah! kernel space! */ | ||
| 48 | if (!modname) | ||
| 49 | modname = delim = ""; | ||
| 50 | sprintf(buf, "{ %s%s%s%s + 0x%lx }", | ||
| 51 | delim, modname, delim, symname, | ||
| 52 | (unsigned long)offset); | ||
| 53 | return; | ||
| 54 | } | ||
| 55 | #endif | ||
| 56 | |||
| 57 | if (address >= FIXED_CODE_START && address < FIXED_CODE_END) { | ||
| 58 | /* Problem in fixed code section? */ | ||
| 59 | strcat(buf, "/* Maybe fixed code section */"); | ||
| 60 | return; | ||
| 61 | |||
| 62 | } else if (address < CONFIG_BOOT_LOAD) { | ||
| 63 | /* Problem somewhere before the kernel start address */ | ||
| 64 | strcat(buf, "/* Maybe null pointer? */"); | ||
| 65 | return; | ||
| 66 | |||
| 67 | } else if (address >= COREMMR_BASE) { | ||
| 68 | strcat(buf, "/* core mmrs */"); | ||
| 69 | return; | ||
| 70 | |||
| 71 | } else if (address >= SYSMMR_BASE) { | ||
| 72 | strcat(buf, "/* system mmrs */"); | ||
| 73 | return; | ||
| 74 | |||
| 75 | } else if (address >= L1_ROM_START && address < L1_ROM_START + L1_ROM_LENGTH) { | ||
| 76 | strcat(buf, "/* on-chip L1 ROM */"); | ||
| 77 | return; | ||
| 78 | |||
| 79 | } else if (address >= L1_SCRATCH_START && address < L1_SCRATCH_START + L1_SCRATCH_LENGTH) { | ||
| 80 | strcat(buf, "/* on-chip scratchpad */"); | ||
| 81 | return; | ||
| 82 | |||
| 83 | } else if (address >= physical_mem_end && address < ASYNC_BANK0_BASE) { | ||
| 84 | strcat(buf, "/* unconnected memory */"); | ||
| 85 | return; | ||
| 86 | |||
| 87 | } else if (address >= ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE && address < BOOT_ROM_START) { | ||
| 88 | strcat(buf, "/* reserved memory */"); | ||
| 89 | return; | ||
| 90 | |||
| 91 | } else if (address >= L1_DATA_A_START && address < L1_DATA_A_START + L1_DATA_A_LENGTH) { | ||
| 92 | strcat(buf, "/* on-chip Data Bank A */"); | ||
| 93 | return; | ||
| 94 | |||
| 95 | } else if (address >= L1_DATA_B_START && address < L1_DATA_B_START + L1_DATA_B_LENGTH) { | ||
| 96 | strcat(buf, "/* on-chip Data Bank B */"); | ||
| 97 | return; | ||
| 98 | } | ||
| 99 | |||
| 100 | /* | ||
| 101 | * Don't walk any of the vmas if we are oopsing, it has been known | ||
| 102 | * to cause problems - corrupt vmas (kernel crashes) cause double faults | ||
| 103 | */ | ||
| 104 | if (oops_in_progress) { | ||
| 105 | strcat(buf, "/* kernel dynamic memory (maybe user-space) */"); | ||
| 106 | return; | ||
| 107 | } | ||
| 108 | |||
| 109 | /* looks like we're off in user-land, so let's walk all the | ||
| 110 | * mappings of all our processes and see if we can't be a whee | ||
| 111 | * bit more specific | ||
| 112 | */ | ||
| 113 | write_lock_irqsave(&tasklist_lock, flags); | ||
| 114 | for_each_process(p) { | ||
| 115 | mm = (in_atomic ? p->mm : get_task_mm(p)); | ||
| 116 | if (!mm) | ||
| 117 | continue; | ||
| 118 | |||
| 119 | if (!down_read_trylock(&mm->mmap_sem)) { | ||
| 120 | if (!in_atomic) | ||
| 121 | mmput(mm); | ||
| 122 | continue; | ||
| 123 | } | ||
| 124 | |||
| 125 | for (n = rb_first(&mm->mm_rb); n; n = rb_next(n)) { | ||
| 126 | struct vm_area_struct *vma; | ||
| 127 | |||
| 128 | vma = rb_entry(n, struct vm_area_struct, vm_rb); | ||
| 129 | |||
| 130 | if (address >= vma->vm_start && address < vma->vm_end) { | ||
| 131 | char _tmpbuf[256]; | ||
| 132 | char *name = p->comm; | ||
| 133 | struct file *file = vma->vm_file; | ||
| 134 | |||
| 135 | if (file) { | ||
| 136 | char *d_name = d_path(&file->f_path, _tmpbuf, | ||
| 137 | sizeof(_tmpbuf)); | ||
| 138 | if (!IS_ERR(d_name)) | ||
| 139 | name = d_name; | ||
| 140 | } | ||
| 141 | |||
| 142 | /* FLAT does not have its text aligned to the start of | ||
| 143 | * the map while FDPIC ELF does ... | ||
| 144 | */ | ||
| 145 | |||
| 146 | /* before we can check flat/fdpic, we need to | ||
| 147 | * make sure current is valid | ||
| 148 | */ | ||
| 149 | if ((unsigned long)current >= FIXED_CODE_START && | ||
| 150 | !((unsigned long)current & 0x3)) { | ||
| 151 | if (current->mm && | ||
| 152 | (address > current->mm->start_code) && | ||
| 153 | (address < current->mm->end_code)) | ||
| 154 | offset = address - current->mm->start_code; | ||
| 155 | else | ||
| 156 | offset = (address - vma->vm_start) + | ||
| 157 | (vma->vm_pgoff << PAGE_SHIFT); | ||
| 158 | |||
| 159 | sprintf(buf, "[ %s + 0x%lx ]", name, offset); | ||
| 160 | } else | ||
| 161 | sprintf(buf, "[ %s vma:0x%lx-0x%lx]", | ||
| 162 | name, vma->vm_start, vma->vm_end); | ||
| 163 | |||
| 164 | up_read(&mm->mmap_sem); | ||
| 165 | if (!in_atomic) | ||
| 166 | mmput(mm); | ||
| 167 | |||
| 168 | if (buf[0] == '\0') | ||
| 169 | sprintf(buf, "[ %s ] dynamic memory", name); | ||
| 170 | |||
| 171 | goto done; | ||
| 172 | } | ||
| 173 | } | ||
| 174 | |||
| 175 | up_read(&mm->mmap_sem); | ||
| 176 | if (!in_atomic) | ||
| 177 | mmput(mm); | ||
| 178 | } | ||
| 179 | |||
| 180 | /* | ||
| 181 | * we were unable to find this address anywhere, | ||
| 182 | * or some MMs were skipped because they were in use. | ||
| 183 | */ | ||
| 184 | sprintf(buf, "/* kernel dynamic memory */"); | ||
| 185 | |||
| 186 | done: | ||
| 187 | write_unlock_irqrestore(&tasklist_lock, flags); | ||
| 188 | } | ||
| 189 | |||
| 190 | #define EXPAND_LEN ((1 << CONFIG_DEBUG_BFIN_HWTRACE_EXPAND_LEN) * 256 - 1) | ||
| 191 | |||
| 192 | /* | ||
| 193 | * Similar to get_user, do some address checking, then dereference | ||
| 194 | * Return true on success, false on bad address | ||
| 195 | */ | ||
| 196 | bool get_mem16(unsigned short *val, unsigned short *address) | ||
| 197 | { | ||
| 198 | unsigned long addr = (unsigned long)address; | ||
| 199 | |||
| 200 | /* Check for odd addresses */ | ||
| 201 | if (addr & 0x1) | ||
| 202 | return false; | ||
| 203 | |||
| 204 | switch (bfin_mem_access_type(addr, 2)) { | ||
| 205 | case BFIN_MEM_ACCESS_CORE: | ||
| 206 | case BFIN_MEM_ACCESS_CORE_ONLY: | ||
| 207 | *val = *address; | ||
| 208 | return true; | ||
| 209 | case BFIN_MEM_ACCESS_DMA: | ||
| 210 | dma_memcpy(val, address, 2); | ||
| 211 | return true; | ||
| 212 | case BFIN_MEM_ACCESS_ITEST: | ||
| 213 | isram_memcpy(val, address, 2); | ||
| 214 | return true; | ||
| 215 | default: /* invalid access */ | ||
| 216 | return false; | ||
| 217 | } | ||
| 218 | } | ||
| 219 | |||
| 220 | bool get_instruction(unsigned int *val, unsigned short *address) | ||
| 221 | { | ||
| 222 | unsigned long addr = (unsigned long)address; | ||
| 223 | unsigned short opcode0, opcode1; | ||
| 224 | |||
| 225 | /* Check for odd addresses */ | ||
| 226 | if (addr & 0x1) | ||
| 227 | return false; | ||
| 228 | |||
| 229 | /* MMR region will never have instructions */ | ||
| 230 | if (addr >= SYSMMR_BASE) | ||
| 231 | return false; | ||
| 232 | |||
| 233 | /* Scratchpad will never have instructions */ | ||
| 234 | if (addr >= L1_SCRATCH_START && addr < L1_SCRATCH_START + L1_SCRATCH_LENGTH) | ||
| 235 | return false; | ||
| 236 | |||
| 237 | /* Data banks will never have instructions */ | ||
| 238 | if (addr >= BOOT_ROM_START + BOOT_ROM_LENGTH && addr < L1_CODE_START) | ||
| 239 | return false; | ||
| 240 | |||
| 241 | if (!get_mem16(&opcode0, address)) | ||
| 242 | return false; | ||
| 243 | |||
| 244 | /* was this a 32-bit instruction? If so, get the next 16 bits */ | ||
| 245 | if ((opcode0 & 0xc000) == 0xc000) { | ||
| 246 | if (!get_mem16(&opcode1, address + 1)) | ||
| 247 | return false; | ||
| 248 | *val = (opcode0 << 16) + opcode1; | ||
| 249 | } else | ||
| 250 | *val = opcode0; | ||
| 251 | |||
| 252 | return true; | ||
| 253 | } | ||
| 254 | |||
| 255 | #if defined(CONFIG_DEBUG_BFIN_HWTRACE_ON) | ||
| 256 | /* | ||
| 257 | * decode the instruction if we are printing out the trace, as it | ||
| 258 | * makes things easier to follow, without running it through objdump | ||
| 259 | * Decode the change of flow, and the common load/store instructions | ||
| 260 | * which are the main cause for faults, and discontinuities in the trace | ||
| 261 | * buffer. | ||
| 262 | */ | ||
| 263 | |||
| 264 | #define ProgCtrl_opcode 0x0000 | ||
| 265 | #define ProgCtrl_poprnd_bits 0 | ||
| 266 | #define ProgCtrl_poprnd_mask 0xf | ||
| 267 | #define ProgCtrl_prgfunc_bits 4 | ||
| 268 | #define ProgCtrl_prgfunc_mask 0xf | ||
| 269 | #define ProgCtrl_code_bits 8 | ||
| 270 | #define ProgCtrl_code_mask 0xff | ||
| 271 | |||
| 272 | static void decode_ProgCtrl_0(unsigned int opcode) | ||
| 273 | { | ||
| 274 | int poprnd = ((opcode >> ProgCtrl_poprnd_bits) & ProgCtrl_poprnd_mask); | ||
| 275 | int prgfunc = ((opcode >> ProgCtrl_prgfunc_bits) & ProgCtrl_prgfunc_mask); | ||
| 276 | |||
| 277 | if (prgfunc == 0 && poprnd == 0) | ||
| 278 | pr_cont("NOP"); | ||
| 279 | else if (prgfunc == 1 && poprnd == 0) | ||
| 280 | pr_cont("RTS"); | ||
| 281 | else if (prgfunc == 1 && poprnd == 1) | ||
| 282 | pr_cont("RTI"); | ||
| 283 | else if (prgfunc == 1 && poprnd == 2) | ||
| 284 | pr_cont("RTX"); | ||
| 285 | else if (prgfunc == 1 && poprnd == 3) | ||
| 286 | pr_cont("RTN"); | ||
| 287 | else if (prgfunc == 1 && poprnd == 4) | ||
| 288 | pr_cont("RTE"); | ||
| 289 | else if (prgfunc == 2 && poprnd == 0) | ||
| 290 | pr_cont("IDLE"); | ||
| 291 | else if (prgfunc == 2 && poprnd == 3) | ||
| 292 | pr_cont("CSYNC"); | ||
| 293 | else if (prgfunc == 2 && poprnd == 4) | ||
| 294 | pr_cont("SSYNC"); | ||
| 295 | else if (prgfunc == 2 && poprnd == 5) | ||
| 296 | pr_cont("EMUEXCPT"); | ||
| 297 | else if (prgfunc == 3) | ||
| 298 | pr_cont("CLI R%i", poprnd); | ||
| 299 | else if (prgfunc == 4) | ||
| 300 | pr_cont("STI R%i", poprnd); | ||
| 301 | else if (prgfunc == 5) | ||
| 302 | pr_cont("JUMP (P%i)", poprnd); | ||
| 303 | else if (prgfunc == 6) | ||
| 304 | pr_cont("CALL (P%i)", poprnd); | ||
| 305 | else if (prgfunc == 7) | ||
| 306 | pr_cont("CALL (PC + P%i)", poprnd); | ||
| 307 | else if (prgfunc == 8) | ||
| 308 | pr_cont("JUMP (PC + P%i", poprnd); | ||
| 309 | else if (prgfunc == 9) | ||
| 310 | pr_cont("RAISE %i", poprnd); | ||
| 311 | else if (prgfunc == 10) | ||
| 312 | pr_cont("EXCPT %i", poprnd); | ||
| 313 | else | ||
| 314 | pr_cont("0x%04x", opcode); | ||
| 315 | |||
| 316 | } | ||
| 317 | |||
| 318 | #define BRCC_opcode 0x1000 | ||
| 319 | #define BRCC_offset_bits 0 | ||
| 320 | #define BRCC_offset_mask 0x3ff | ||
| 321 | #define BRCC_B_bits 10 | ||
| 322 | #define BRCC_B_mask 0x1 | ||
| 323 | #define BRCC_T_bits 11 | ||
| 324 | #define BRCC_T_mask 0x1 | ||
| 325 | #define BRCC_code_bits 12 | ||
| 326 | #define BRCC_code_mask 0xf | ||
| 327 | |||
| 328 | static void decode_BRCC_0(unsigned int opcode) | ||
| 329 | { | ||
| 330 | int B = ((opcode >> BRCC_B_bits) & BRCC_B_mask); | ||
| 331 | int T = ((opcode >> BRCC_T_bits) & BRCC_T_mask); | ||
| 332 | |||
| 333 | pr_cont("IF %sCC JUMP pcrel %s", T ? "" : "!", B ? "(BP)" : ""); | ||
| 334 | } | ||
| 335 | |||
| 336 | #define CALLa_opcode 0xe2000000 | ||
| 337 | #define CALLa_addr_bits 0 | ||
| 338 | #define CALLa_addr_mask 0xffffff | ||
| 339 | #define CALLa_S_bits 24 | ||
| 340 | #define CALLa_S_mask 0x1 | ||
| 341 | #define CALLa_code_bits 25 | ||
| 342 | #define CALLa_code_mask 0x7f | ||
| 343 | |||
| 344 | static void decode_CALLa_0(unsigned int opcode) | ||
| 345 | { | ||
| 346 | int S = ((opcode >> (CALLa_S_bits - 16)) & CALLa_S_mask); | ||
| 347 | |||
| 348 | if (S) | ||
| 349 | pr_cont("CALL pcrel"); | ||
| 350 | else | ||
| 351 | pr_cont("JUMP.L"); | ||
| 352 | } | ||
| 353 | |||
| 354 | #define LoopSetup_opcode 0xe0800000 | ||
| 355 | #define LoopSetup_eoffset_bits 0 | ||
| 356 | #define LoopSetup_eoffset_mask 0x3ff | ||
| 357 | #define LoopSetup_dontcare_bits 10 | ||
| 358 | #define LoopSetup_dontcare_mask 0x3 | ||
| 359 | #define LoopSetup_reg_bits 12 | ||
| 360 | #define LoopSetup_reg_mask 0xf | ||
| 361 | #define LoopSetup_soffset_bits 16 | ||
| 362 | #define LoopSetup_soffset_mask 0xf | ||
| 363 | #define LoopSetup_c_bits 20 | ||
| 364 | #define LoopSetup_c_mask 0x1 | ||
| 365 | #define LoopSetup_rop_bits 21 | ||
| 366 | #define LoopSetup_rop_mask 0x3 | ||
| 367 | #define LoopSetup_code_bits 23 | ||
| 368 | #define LoopSetup_code_mask 0x1ff | ||
| 369 | |||
| 370 | static void decode_LoopSetup_0(unsigned int opcode) | ||
| 371 | { | ||
| 372 | int c = ((opcode >> LoopSetup_c_bits) & LoopSetup_c_mask); | ||
| 373 | int reg = ((opcode >> LoopSetup_reg_bits) & LoopSetup_reg_mask); | ||
| 374 | int rop = ((opcode >> LoopSetup_rop_bits) & LoopSetup_rop_mask); | ||
| 375 | |||
| 376 | pr_cont("LSETUP <> LC%i", c); | ||
| 377 | if ((rop & 1) == 1) | ||
| 378 | pr_cont("= P%i", reg); | ||
| 379 | if ((rop & 2) == 2) | ||
| 380 | pr_cont(" >> 0x1"); | ||
| 381 | } | ||
| 382 | |||
| 383 | #define DspLDST_opcode 0x9c00 | ||
| 384 | #define DspLDST_reg_bits 0 | ||
| 385 | #define DspLDST_reg_mask 0x7 | ||
| 386 | #define DspLDST_i_bits 3 | ||
| 387 | #define DspLDST_i_mask 0x3 | ||
| 388 | #define DspLDST_m_bits 5 | ||
| 389 | #define DspLDST_m_mask 0x3 | ||
| 390 | #define DspLDST_aop_bits 7 | ||
| 391 | #define DspLDST_aop_mask 0x3 | ||
| 392 | #define DspLDST_W_bits 9 | ||
| 393 | #define DspLDST_W_mask 0x1 | ||
| 394 | #define DspLDST_code_bits 10 | ||
| 395 | #define DspLDST_code_mask 0x3f | ||
| 396 | |||
| 397 | static void decode_dspLDST_0(unsigned int opcode) | ||
| 398 | { | ||
| 399 | int i = ((opcode >> DspLDST_i_bits) & DspLDST_i_mask); | ||
| 400 | int m = ((opcode >> DspLDST_m_bits) & DspLDST_m_mask); | ||
| 401 | int W = ((opcode >> DspLDST_W_bits) & DspLDST_W_mask); | ||
| 402 | int aop = ((opcode >> DspLDST_aop_bits) & DspLDST_aop_mask); | ||
| 403 | int reg = ((opcode >> DspLDST_reg_bits) & DspLDST_reg_mask); | ||
| 404 | |||
| 405 | if (W == 0) { | ||
| 406 | pr_cont("R%i", reg); | ||
| 407 | switch (m) { | ||
| 408 | case 0: | ||
| 409 | pr_cont(" = "); | ||
| 410 | break; | ||
| 411 | case 1: | ||
| 412 | pr_cont(".L = "); | ||
| 413 | break; | ||
| 414 | case 2: | ||
| 415 | pr_cont(".W = "); | ||
| 416 | break; | ||
| 417 | } | ||
| 418 | } | ||
| 419 | |||
| 420 | pr_cont("[ I%i", i); | ||
| 421 | |||
| 422 | switch (aop) { | ||
| 423 | case 0: | ||
| 424 | pr_cont("++ ]"); | ||
| 425 | break; | ||
| 426 | case 1: | ||
| 427 | pr_cont("-- ]"); | ||
| 428 | break; | ||
| 429 | } | ||
| 430 | |||
| 431 | if (W == 1) { | ||
| 432 | pr_cont(" = R%i", reg); | ||
| 433 | switch (m) { | ||
| 434 | case 1: | ||
| 435 | pr_cont(".L = "); | ||
| 436 | break; | ||
| 437 | case 2: | ||
| 438 | pr_cont(".W = "); | ||
| 439 | break; | ||
| 440 | } | ||
| 441 | } | ||
| 442 | } | ||
| 443 | |||
| 444 | #define LDST_opcode 0x9000 | ||
| 445 | #define LDST_reg_bits 0 | ||
| 446 | #define LDST_reg_mask 0x7 | ||
| 447 | #define LDST_ptr_bits 3 | ||
| 448 | #define LDST_ptr_mask 0x7 | ||
| 449 | #define LDST_Z_bits 6 | ||
| 450 | #define LDST_Z_mask 0x1 | ||
| 451 | #define LDST_aop_bits 7 | ||
| 452 | #define LDST_aop_mask 0x3 | ||
| 453 | #define LDST_W_bits 9 | ||
| 454 | #define LDST_W_mask 0x1 | ||
| 455 | #define LDST_sz_bits 10 | ||
| 456 | #define LDST_sz_mask 0x3 | ||
| 457 | #define LDST_code_bits 12 | ||
| 458 | #define LDST_code_mask 0xf | ||
| 459 | |||
| 460 | static void decode_LDST_0(unsigned int opcode) | ||
| 461 | { | ||
| 462 | int Z = ((opcode >> LDST_Z_bits) & LDST_Z_mask); | ||
| 463 | int W = ((opcode >> LDST_W_bits) & LDST_W_mask); | ||
| 464 | int sz = ((opcode >> LDST_sz_bits) & LDST_sz_mask); | ||
| 465 | int aop = ((opcode >> LDST_aop_bits) & LDST_aop_mask); | ||
| 466 | int reg = ((opcode >> LDST_reg_bits) & LDST_reg_mask); | ||
| 467 | int ptr = ((opcode >> LDST_ptr_bits) & LDST_ptr_mask); | ||
| 468 | |||
| 469 | if (W == 0) | ||
| 470 | pr_cont("%s%i = ", (sz == 0 && Z == 1) ? "P" : "R", reg); | ||
| 471 | |||
| 472 | switch (sz) { | ||
| 473 | case 1: | ||
| 474 | pr_cont("W"); | ||
| 475 | break; | ||
| 476 | case 2: | ||
| 477 | pr_cont("B"); | ||
| 478 | break; | ||
| 479 | } | ||
| 480 | |||
| 481 | pr_cont("[P%i", ptr); | ||
| 482 | |||
| 483 | switch (aop) { | ||
| 484 | case 0: | ||
| 485 | pr_cont("++"); | ||
| 486 | break; | ||
| 487 | case 1: | ||
| 488 | pr_cont("--"); | ||
| 489 | break; | ||
| 490 | } | ||
| 491 | pr_cont("]"); | ||
| 492 | |||
| 493 | if (W == 1) | ||
| 494 | pr_cont(" = %s%i ", (sz == 0 && Z == 1) ? "P" : "R", reg); | ||
| 495 | |||
| 496 | if (sz) { | ||
| 497 | if (Z) | ||
| 498 | pr_cont(" (X)"); | ||
| 499 | else | ||
| 500 | pr_cont(" (Z)"); | ||
| 501 | } | ||
| 502 | } | ||
| 503 | |||
| 504 | #define LDSTii_opcode 0xa000 | ||
| 505 | #define LDSTii_reg_bit 0 | ||
| 506 | #define LDSTii_reg_mask 0x7 | ||
| 507 | #define LDSTii_ptr_bit 3 | ||
| 508 | #define LDSTii_ptr_mask 0x7 | ||
| 509 | #define LDSTii_offset_bit 6 | ||
| 510 | #define LDSTii_offset_mask 0xf | ||
| 511 | #define LDSTii_op_bit 10 | ||
| 512 | #define LDSTii_op_mask 0x3 | ||
| 513 | #define LDSTii_W_bit 12 | ||
| 514 | #define LDSTii_W_mask 0x1 | ||
| 515 | #define LDSTii_code_bit 13 | ||
| 516 | #define LDSTii_code_mask 0x7 | ||
| 517 | |||
| 518 | static void decode_LDSTii_0(unsigned int opcode) | ||
| 519 | { | ||
| 520 | int reg = ((opcode >> LDSTii_reg_bit) & LDSTii_reg_mask); | ||
| 521 | int ptr = ((opcode >> LDSTii_ptr_bit) & LDSTii_ptr_mask); | ||
| 522 | int offset = ((opcode >> LDSTii_offset_bit) & LDSTii_offset_mask); | ||
| 523 | int op = ((opcode >> LDSTii_op_bit) & LDSTii_op_mask); | ||
| 524 | int W = ((opcode >> LDSTii_W_bit) & LDSTii_W_mask); | ||
| 525 | |||
| 526 | if (W == 0) { | ||
| 527 | pr_cont("%s%i = %s[P%i + %i]", op == 3 ? "R" : "P", reg, | ||
| 528 | op == 1 || op == 2 ? "" : "W", ptr, offset); | ||
| 529 | if (op == 2) | ||
| 530 | pr_cont("(Z)"); | ||
| 531 | if (op == 3) | ||
| 532 | pr_cont("(X)"); | ||
| 533 | } else { | ||
| 534 | pr_cont("%s[P%i + %i] = %s%i", op == 0 ? "" : "W", ptr, | ||
| 535 | offset, op == 3 ? "P" : "R", reg); | ||
| 536 | } | ||
| 537 | } | ||
| 538 | |||
| 539 | #define LDSTidxI_opcode 0xe4000000 | ||
| 540 | #define LDSTidxI_offset_bits 0 | ||
| 541 | #define LDSTidxI_offset_mask 0xffff | ||
| 542 | #define LDSTidxI_reg_bits 16 | ||
| 543 | #define LDSTidxI_reg_mask 0x7 | ||
| 544 | #define LDSTidxI_ptr_bits 19 | ||
| 545 | #define LDSTidxI_ptr_mask 0x7 | ||
| 546 | #define LDSTidxI_sz_bits 22 | ||
| 547 | #define LDSTidxI_sz_mask 0x3 | ||
| 548 | #define LDSTidxI_Z_bits 24 | ||
| 549 | #define LDSTidxI_Z_mask 0x1 | ||
| 550 | #define LDSTidxI_W_bits 25 | ||
| 551 | #define LDSTidxI_W_mask 0x1 | ||
| 552 | #define LDSTidxI_code_bits 26 | ||
| 553 | #define LDSTidxI_code_mask 0x3f | ||
| 554 | |||
| 555 | static void decode_LDSTidxI_0(unsigned int opcode) | ||
| 556 | { | ||
| 557 | int Z = ((opcode >> LDSTidxI_Z_bits) & LDSTidxI_Z_mask); | ||
| 558 | int W = ((opcode >> LDSTidxI_W_bits) & LDSTidxI_W_mask); | ||
| 559 | int sz = ((opcode >> LDSTidxI_sz_bits) & LDSTidxI_sz_mask); | ||
| 560 | int reg = ((opcode >> LDSTidxI_reg_bits) & LDSTidxI_reg_mask); | ||
| 561 | int ptr = ((opcode >> LDSTidxI_ptr_bits) & LDSTidxI_ptr_mask); | ||
| 562 | int offset = ((opcode >> LDSTidxI_offset_bits) & LDSTidxI_offset_mask); | ||
| 563 | |||
| 564 | if (W == 0) | ||
| 565 | pr_cont("%s%i = ", sz == 0 && Z == 1 ? "P" : "R", reg); | ||
| 566 | |||
| 567 | if (sz == 1) | ||
| 568 | pr_cont("W"); | ||
| 569 | if (sz == 2) | ||
| 570 | pr_cont("B"); | ||
| 571 | |||
| 572 | pr_cont("[P%i + %s0x%x]", ptr, offset & 0x20 ? "-" : "", | ||
| 573 | (offset & 0x1f) << 2); | ||
| 574 | |||
| 575 | if (W == 0 && sz != 0) { | ||
| 576 | if (Z) | ||
| 577 | pr_cont("(X)"); | ||
| 578 | else | ||
| 579 | pr_cont("(Z)"); | ||
| 580 | } | ||
| 581 | |||
| 582 | if (W == 1) | ||
| 583 | pr_cont("= %s%i", (sz == 0 && Z == 1) ? "P" : "R", reg); | ||
| 584 | |||
| 585 | } | ||
| 586 | |||
| 587 | static void decode_opcode(unsigned int opcode) | ||
| 588 | { | ||
| 589 | #ifdef CONFIG_BUG | ||
| 590 | if (opcode == BFIN_BUG_OPCODE) | ||
| 591 | pr_cont("BUG"); | ||
| 592 | else | ||
| 593 | #endif | ||
| 594 | if ((opcode & 0xffffff00) == ProgCtrl_opcode) | ||
| 595 | decode_ProgCtrl_0(opcode); | ||
| 596 | else if ((opcode & 0xfffff000) == BRCC_opcode) | ||
| 597 | decode_BRCC_0(opcode); | ||
| 598 | else if ((opcode & 0xfffff000) == 0x2000) | ||
| 599 | pr_cont("JUMP.S"); | ||
| 600 | else if ((opcode & 0xfe000000) == CALLa_opcode) | ||
| 601 | decode_CALLa_0(opcode); | ||
| 602 | else if ((opcode & 0xff8000C0) == LoopSetup_opcode) | ||
| 603 | decode_LoopSetup_0(opcode); | ||
| 604 | else if ((opcode & 0xfffffc00) == DspLDST_opcode) | ||
| 605 | decode_dspLDST_0(opcode); | ||
| 606 | else if ((opcode & 0xfffff000) == LDST_opcode) | ||
| 607 | decode_LDST_0(opcode); | ||
| 608 | else if ((opcode & 0xffffe000) == LDSTii_opcode) | ||
| 609 | decode_LDSTii_0(opcode); | ||
| 610 | else if ((opcode & 0xfc000000) == LDSTidxI_opcode) | ||
| 611 | decode_LDSTidxI_0(opcode); | ||
| 612 | else if (opcode & 0xffff0000) | ||
| 613 | pr_cont("0x%08x", opcode); | ||
| 614 | else | ||
| 615 | pr_cont("0x%04x", opcode); | ||
| 616 | } | ||
| 617 | |||
| 618 | #define BIT_MULTI_INS 0x08000000 | ||
| 619 | static void decode_instruction(unsigned short *address) | ||
| 620 | { | ||
| 621 | unsigned int opcode; | ||
| 622 | |||
| 623 | if (!get_instruction(&opcode, address)) | ||
| 624 | return; | ||
| 625 | |||
| 626 | decode_opcode(opcode); | ||
| 627 | |||
| 628 | /* If things are a 32-bit instruction, it has the possibility of being | ||
| 629 | * a multi-issue instruction (a 32-bit, and 2 16 bit instrucitions) | ||
| 630 | * This test collidates with the unlink instruction, so disallow that | ||
| 631 | */ | ||
| 632 | if ((opcode & 0xc0000000) == 0xc0000000 && | ||
| 633 | (opcode & BIT_MULTI_INS) && | ||
| 634 | (opcode & 0xe8000000) != 0xe8000000) { | ||
| 635 | pr_cont(" || "); | ||
| 636 | if (!get_instruction(&opcode, address + 2)) | ||
| 637 | return; | ||
| 638 | decode_opcode(opcode); | ||
| 639 | pr_cont(" || "); | ||
| 640 | if (!get_instruction(&opcode, address + 3)) | ||
| 641 | return; | ||
| 642 | decode_opcode(opcode); | ||
| 643 | } | ||
| 644 | } | ||
| 645 | #endif | ||
| 646 | |||
| 647 | void dump_bfin_trace_buffer(void) | ||
| 648 | { | ||
| 649 | #ifdef CONFIG_DEBUG_BFIN_HWTRACE_ON | ||
| 650 | int tflags, i = 0, fault = 0; | ||
| 651 | char buf[150]; | ||
| 652 | unsigned short *addr; | ||
| 653 | unsigned int cpu = raw_smp_processor_id(); | ||
| 654 | #ifdef CONFIG_DEBUG_BFIN_HWTRACE_EXPAND | ||
| 655 | int j, index; | ||
| 656 | #endif | ||
| 657 | |||
| 658 | trace_buffer_save(tflags); | ||
| 659 | |||
| 660 | pr_notice("Hardware Trace:\n"); | ||
| 661 | |||
| 662 | #ifdef CONFIG_DEBUG_BFIN_HWTRACE_EXPAND | ||
| 663 | pr_notice("WARNING: Expanded trace turned on - can not trace exceptions\n"); | ||
| 664 | #endif | ||
| 665 | |||
| 666 | if (likely(bfin_read_TBUFSTAT() & TBUFCNT)) { | ||
| 667 | for (; bfin_read_TBUFSTAT() & TBUFCNT; i++) { | ||
| 668 | addr = (unsigned short *)bfin_read_TBUF(); | ||
| 669 | decode_address(buf, (unsigned long)addr); | ||
| 670 | pr_notice("%4i Target : %s\n", i, buf); | ||
| 671 | /* Normally, the faulting instruction doesn't go into | ||
| 672 | * the trace buffer, (since it doesn't commit), so | ||
| 673 | * we print out the fault address here | ||
| 674 | */ | ||
| 675 | if (!fault && addr == ((unsigned short *)evt_ivhw)) { | ||
| 676 | addr = (unsigned short *)bfin_read_TBUF(); | ||
| 677 | decode_address(buf, (unsigned long)addr); | ||
| 678 | pr_notice(" FAULT : %s ", buf); | ||
| 679 | decode_instruction(addr); | ||
| 680 | pr_cont("\n"); | ||
| 681 | fault = 1; | ||
| 682 | continue; | ||
| 683 | } | ||
| 684 | if (!fault && addr == (unsigned short *)trap && | ||
| 685 | (cpu_pda[cpu].seqstat & SEQSTAT_EXCAUSE) > VEC_EXCPT15) { | ||
| 686 | decode_address(buf, cpu_pda[cpu].icplb_fault_addr); | ||
| 687 | pr_notice(" FAULT : %s ", buf); | ||
| 688 | decode_instruction((unsigned short *)cpu_pda[cpu].icplb_fault_addr); | ||
| 689 | pr_cont("\n"); | ||
| 690 | fault = 1; | ||
| 691 | } | ||
| 692 | addr = (unsigned short *)bfin_read_TBUF(); | ||
| 693 | decode_address(buf, (unsigned long)addr); | ||
| 694 | pr_notice(" Source : %s ", buf); | ||
| 695 | decode_instruction(addr); | ||
| 696 | pr_cont("\n"); | ||
| 697 | } | ||
| 698 | } | ||
| 699 | |||
| 700 | #ifdef CONFIG_DEBUG_BFIN_HWTRACE_EXPAND | ||
| 701 | if (trace_buff_offset) | ||
| 702 | index = trace_buff_offset / 4; | ||
| 703 | else | ||
| 704 | index = EXPAND_LEN; | ||
| 705 | |||
| 706 | j = (1 << CONFIG_DEBUG_BFIN_HWTRACE_EXPAND_LEN) * 128; | ||
| 707 | while (j) { | ||
| 708 | decode_address(buf, software_trace_buff[index]); | ||
| 709 | pr_notice("%4i Target : %s\n", i, buf); | ||
| 710 | index -= 1; | ||
| 711 | if (index < 0) | ||
| 712 | index = EXPAND_LEN; | ||
| 713 | decode_address(buf, software_trace_buff[index]); | ||
| 714 | pr_notice(" Source : %s ", buf); | ||
| 715 | decode_instruction((unsigned short *)software_trace_buff[index]); | ||
| 716 | pr_cont("\n"); | ||
| 717 | index -= 1; | ||
| 718 | if (index < 0) | ||
| 719 | index = EXPAND_LEN; | ||
| 720 | j--; | ||
| 721 | i++; | ||
| 722 | } | ||
| 723 | #endif | ||
| 724 | |||
| 725 | trace_buffer_restore(tflags); | ||
| 726 | #endif | ||
| 727 | } | ||
| 728 | EXPORT_SYMBOL(dump_bfin_trace_buffer); | ||
| 729 | |||
| 730 | void dump_bfin_process(struct pt_regs *fp) | ||
| 731 | { | ||
| 732 | /* We should be able to look at fp->ipend, but we don't push it on the | ||
| 733 | * stack all the time, so do this until we fix that */ | ||
| 734 | unsigned int context = bfin_read_IPEND(); | ||
| 735 | |||
| 736 | if (oops_in_progress) | ||
| 737 | pr_emerg("Kernel OOPS in progress\n"); | ||
| 738 | |||
| 739 | if (context & 0x0020 && (fp->seqstat & SEQSTAT_EXCAUSE) == VEC_HWERR) | ||
| 740 | pr_notice("HW Error context\n"); | ||
| 741 | else if (context & 0x0020) | ||
| 742 | pr_notice("Deferred Exception context\n"); | ||
| 743 | else if (context & 0x3FC0) | ||
| 744 | pr_notice("Interrupt context\n"); | ||
| 745 | else if (context & 0x4000) | ||
| 746 | pr_notice("Deferred Interrupt context\n"); | ||
| 747 | else if (context & 0x8000) | ||
| 748 | pr_notice("Kernel process context\n"); | ||
| 749 | |||
| 750 | /* Because we are crashing, and pointers could be bad, we check things | ||
| 751 | * pretty closely before we use them | ||
| 752 | */ | ||
| 753 | if ((unsigned long)current >= FIXED_CODE_START && | ||
| 754 | !((unsigned long)current & 0x3) && current->pid) { | ||
| 755 | pr_notice("CURRENT PROCESS:\n"); | ||
| 756 | if (current->comm >= (char *)FIXED_CODE_START) | ||
| 757 | pr_notice("COMM=%s PID=%d", | ||
| 758 | current->comm, current->pid); | ||
| 759 | else | ||
| 760 | pr_notice("COMM= invalid"); | ||
| 761 | |||
| 762 | pr_cont(" CPU=%d\n", current_thread_info()->cpu); | ||
| 763 | if (!((unsigned long)current->mm & 0x3) && | ||
| 764 | (unsigned long)current->mm >= FIXED_CODE_START) { | ||
| 765 | pr_notice("TEXT = 0x%p-0x%p DATA = 0x%p-0x%p\n", | ||
| 766 | (void *)current->mm->start_code, | ||
| 767 | (void *)current->mm->end_code, | ||
| 768 | (void *)current->mm->start_data, | ||
| 769 | (void *)current->mm->end_data); | ||
| 770 | pr_notice(" BSS = 0x%p-0x%p USER-STACK = 0x%p\n\n", | ||
| 771 | (void *)current->mm->end_data, | ||
| 772 | (void *)current->mm->brk, | ||
| 773 | (void *)current->mm->start_stack); | ||
| 774 | } else | ||
| 775 | pr_notice("invalid mm\n"); | ||
| 776 | } else | ||
| 777 | pr_notice("No Valid process in current context\n"); | ||
| 778 | } | ||
| 779 | |||
| 780 | void dump_bfin_mem(struct pt_regs *fp) | ||
| 781 | { | ||
| 782 | unsigned short *addr, *erraddr, val = 0, err = 0; | ||
| 783 | char sti = 0, buf[6]; | ||
| 784 | |||
| 785 | erraddr = (void *)fp->pc; | ||
| 786 | |||
| 787 | pr_notice("return address: [0x%p]; contents of:", erraddr); | ||
| 788 | |||
| 789 | for (addr = (unsigned short *)((unsigned long)erraddr & ~0xF) - 0x10; | ||
| 790 | addr < (unsigned short *)((unsigned long)erraddr & ~0xF) + 0x10; | ||
| 791 | addr++) { | ||
| 792 | if (!((unsigned long)addr & 0xF)) | ||
| 793 | pr_notice("0x%p: ", addr); | ||
| 794 | |||
| 795 | if (!get_mem16(&val, addr)) { | ||
| 796 | val = 0; | ||
| 797 | sprintf(buf, "????"); | ||
| 798 | } else | ||
| 799 | sprintf(buf, "%04x", val); | ||
| 800 | |||
| 801 | if (addr == erraddr) { | ||
| 802 | pr_cont("[%s]", buf); | ||
| 803 | err = val; | ||
| 804 | } else | ||
| 805 | pr_cont(" %s ", buf); | ||
| 806 | |||
| 807 | /* Do any previous instructions turn on interrupts? */ | ||
| 808 | if (addr <= erraddr && /* in the past */ | ||
| 809 | ((val >= 0x0040 && val <= 0x0047) || /* STI instruction */ | ||
| 810 | val == 0x017b)) /* [SP++] = RETI */ | ||
| 811 | sti = 1; | ||
| 812 | } | ||
| 813 | |||
| 814 | pr_cont("\n"); | ||
| 815 | |||
| 816 | /* Hardware error interrupts can be deferred */ | ||
| 817 | if (unlikely(sti && (fp->seqstat & SEQSTAT_EXCAUSE) == VEC_HWERR && | ||
| 818 | oops_in_progress)){ | ||
| 819 | pr_notice("Looks like this was a deferred error - sorry\n"); | ||
| 820 | #ifndef CONFIG_DEBUG_HWERR | ||
| 821 | pr_notice("The remaining message may be meaningless\n"); | ||
| 822 | pr_notice("You should enable CONFIG_DEBUG_HWERR to get a better idea where it came from\n"); | ||
| 823 | #else | ||
| 824 | /* If we are handling only one peripheral interrupt | ||
| 825 | * and current mm and pid are valid, and the last error | ||
| 826 | * was in that user space process's text area | ||
| 827 | * print it out - because that is where the problem exists | ||
| 828 | */ | ||
| 829 | if ((!(((fp)->ipend & ~0x30) & (((fp)->ipend & ~0x30) - 1))) && | ||
| 830 | (current->pid && current->mm)) { | ||
| 831 | /* And the last RETI points to the current userspace context */ | ||
| 832 | if ((fp + 1)->pc >= current->mm->start_code && | ||
| 833 | (fp + 1)->pc <= current->mm->end_code) { | ||
| 834 | pr_notice("It might be better to look around here :\n"); | ||
| 835 | pr_notice("-------------------------------------------\n"); | ||
| 836 | show_regs(fp + 1); | ||
| 837 | pr_notice("-------------------------------------------\n"); | ||
| 838 | } | ||
| 839 | } | ||
| 840 | #endif | ||
| 841 | } | ||
| 842 | } | ||
| 843 | |||
| 844 | void show_regs(struct pt_regs *fp) | ||
| 845 | { | ||
| 846 | char buf[150]; | ||
| 847 | struct irqaction *action; | ||
| 848 | unsigned int i; | ||
| 849 | unsigned long flags = 0; | ||
| 850 | unsigned int cpu = raw_smp_processor_id(); | ||
| 851 | unsigned char in_atomic = (bfin_read_IPEND() & 0x10) || in_atomic(); | ||
| 852 | |||
| 853 | pr_notice("\n"); | ||
| 854 | if (CPUID != bfin_cpuid()) | ||
| 855 | pr_notice("Compiled for cpu family 0x%04x (Rev %d), " | ||
| 856 | "but running on:0x%04x (Rev %d)\n", | ||
| 857 | CPUID, bfin_compiled_revid(), bfin_cpuid(), bfin_revid()); | ||
| 858 | |||
| 859 | pr_notice("ADSP-%s-0.%d", | ||
| 860 | CPU, bfin_compiled_revid()); | ||
| 861 | |||
| 862 | if (bfin_compiled_revid() != bfin_revid()) | ||
| 863 | pr_cont("(Detected 0.%d)", bfin_revid()); | ||
| 864 | |||
| 865 | pr_cont(" %lu(MHz CCLK) %lu(MHz SCLK) (%s)\n", | ||
| 866 | get_cclk()/1000000, get_sclk()/1000000, | ||
| 867 | #ifdef CONFIG_MPU | ||
| 868 | "mpu on" | ||
| 869 | #else | ||
| 870 | "mpu off" | ||
| 871 | #endif | ||
| 872 | ); | ||
| 873 | |||
| 874 | pr_notice("%s", linux_banner); | ||
| 875 | |||
| 876 | pr_notice("\nSEQUENCER STATUS:\t\t%s\n", print_tainted()); | ||
| 877 | pr_notice(" SEQSTAT: %08lx IPEND: %04lx IMASK: %04lx SYSCFG: %04lx\n", | ||
| 878 | (long)fp->seqstat, fp->ipend, cpu_pda[raw_smp_processor_id()].ex_imask, fp->syscfg); | ||
| 879 | if (fp->ipend & EVT_IRPTEN) | ||
| 880 | pr_notice(" Global Interrupts Disabled (IPEND[4])\n"); | ||
| 881 | if (!(cpu_pda[raw_smp_processor_id()].ex_imask & (EVT_IVG13 | EVT_IVG12 | EVT_IVG11 | | ||
| 882 | EVT_IVG10 | EVT_IVG9 | EVT_IVG8 | EVT_IVG7 | EVT_IVTMR))) | ||
| 883 | pr_notice(" Peripheral interrupts masked off\n"); | ||
| 884 | if (!(cpu_pda[raw_smp_processor_id()].ex_imask & (EVT_IVG15 | EVT_IVG14))) | ||
| 885 | pr_notice(" Kernel interrupts masked off\n"); | ||
| 886 | if ((fp->seqstat & SEQSTAT_EXCAUSE) == VEC_HWERR) { | ||
| 887 | pr_notice(" HWERRCAUSE: 0x%lx\n", | ||
| 888 | (fp->seqstat & SEQSTAT_HWERRCAUSE) >> 14); | ||
| 889 | #ifdef EBIU_ERRMST | ||
| 890 | /* If the error was from the EBIU, print it out */ | ||
| 891 | if (bfin_read_EBIU_ERRMST() & CORE_ERROR) { | ||
| 892 | pr_notice(" EBIU Error Reason : 0x%04x\n", | ||
| 893 | bfin_read_EBIU_ERRMST()); | ||
| 894 | pr_notice(" EBIU Error Address : 0x%08x\n", | ||
| 895 | bfin_read_EBIU_ERRADD()); | ||
| 896 | } | ||
| 897 | #endif | ||
| 898 | } | ||
| 899 | pr_notice(" EXCAUSE : 0x%lx\n", | ||
| 900 | fp->seqstat & SEQSTAT_EXCAUSE); | ||
| 901 | for (i = 2; i <= 15 ; i++) { | ||
| 902 | if (fp->ipend & (1 << i)) { | ||
| 903 | if (i != 4) { | ||
| 904 | decode_address(buf, bfin_read32(EVT0 + 4*i)); | ||
| 905 | pr_notice(" physical IVG%i asserted : %s\n", i, buf); | ||
| 906 | } else | ||
| 907 | pr_notice(" interrupts disabled\n"); | ||
| 908 | } | ||
| 909 | } | ||
| 910 | |||
| 911 | /* if no interrupts are going off, don't print this out */ | ||
| 912 | if (fp->ipend & ~0x3F) { | ||
| 913 | for (i = 0; i < (NR_IRQS - 1); i++) { | ||
| 914 | if (!in_atomic) | ||
| 915 | raw_spin_lock_irqsave(&irq_desc[i].lock, flags); | ||
| 916 | |||
| 917 | action = irq_desc[i].action; | ||
| 918 | if (!action) | ||
| 919 | goto unlock; | ||
| 920 | |||
| 921 | decode_address(buf, (unsigned int)action->handler); | ||
| 922 | pr_notice(" logical irq %3d mapped : %s", i, buf); | ||
| 923 | for (action = action->next; action; action = action->next) { | ||
| 924 | decode_address(buf, (unsigned int)action->handler); | ||
| 925 | pr_cont(", %s", buf); | ||
| 926 | } | ||
| 927 | pr_cont("\n"); | ||
| 928 | unlock: | ||
| 929 | if (!in_atomic) | ||
| 930 | raw_spin_unlock_irqrestore(&irq_desc[i].lock, flags); | ||
| 931 | } | ||
| 932 | } | ||
| 933 | |||
| 934 | decode_address(buf, fp->rete); | ||
| 935 | pr_notice(" RETE: %s\n", buf); | ||
| 936 | decode_address(buf, fp->retn); | ||
| 937 | pr_notice(" RETN: %s\n", buf); | ||
| 938 | decode_address(buf, fp->retx); | ||
| 939 | pr_notice(" RETX: %s\n", buf); | ||
| 940 | decode_address(buf, fp->rets); | ||
| 941 | pr_notice(" RETS: %s\n", buf); | ||
| 942 | decode_address(buf, fp->pc); | ||
| 943 | pr_notice(" PC : %s\n", buf); | ||
| 944 | |||
| 945 | if (((long)fp->seqstat & SEQSTAT_EXCAUSE) && | ||
| 946 | (((long)fp->seqstat & SEQSTAT_EXCAUSE) != VEC_HWERR)) { | ||
| 947 | decode_address(buf, cpu_pda[cpu].dcplb_fault_addr); | ||
| 948 | pr_notice("DCPLB_FAULT_ADDR: %s\n", buf); | ||
| 949 | decode_address(buf, cpu_pda[cpu].icplb_fault_addr); | ||
| 950 | pr_notice("ICPLB_FAULT_ADDR: %s\n", buf); | ||
| 951 | } | ||
| 952 | |||
| 953 | pr_notice("PROCESSOR STATE:\n"); | ||
| 954 | pr_notice(" R0 : %08lx R1 : %08lx R2 : %08lx R3 : %08lx\n", | ||
| 955 | fp->r0, fp->r1, fp->r2, fp->r3); | ||
| 956 | pr_notice(" R4 : %08lx R5 : %08lx R6 : %08lx R7 : %08lx\n", | ||
| 957 | fp->r4, fp->r5, fp->r6, fp->r7); | ||
| 958 | pr_notice(" P0 : %08lx P1 : %08lx P2 : %08lx P3 : %08lx\n", | ||
| 959 | fp->p0, fp->p1, fp->p2, fp->p3); | ||
| 960 | pr_notice(" P4 : %08lx P5 : %08lx FP : %08lx SP : %08lx\n", | ||
| 961 | fp->p4, fp->p5, fp->fp, (long)fp); | ||
| 962 | pr_notice(" LB0: %08lx LT0: %08lx LC0: %08lx\n", | ||
| 963 | fp->lb0, fp->lt0, fp->lc0); | ||
| 964 | pr_notice(" LB1: %08lx LT1: %08lx LC1: %08lx\n", | ||
| 965 | fp->lb1, fp->lt1, fp->lc1); | ||
| 966 | pr_notice(" B0 : %08lx L0 : %08lx M0 : %08lx I0 : %08lx\n", | ||
| 967 | fp->b0, fp->l0, fp->m0, fp->i0); | ||
| 968 | pr_notice(" B1 : %08lx L1 : %08lx M1 : %08lx I1 : %08lx\n", | ||
| 969 | fp->b1, fp->l1, fp->m1, fp->i1); | ||
| 970 | pr_notice(" B2 : %08lx L2 : %08lx M2 : %08lx I2 : %08lx\n", | ||
| 971 | fp->b2, fp->l2, fp->m2, fp->i2); | ||
| 972 | pr_notice(" B3 : %08lx L3 : %08lx M3 : %08lx I3 : %08lx\n", | ||
| 973 | fp->b3, fp->l3, fp->m3, fp->i3); | ||
| 974 | pr_notice("A0.w: %08lx A0.x: %08lx A1.w: %08lx A1.x: %08lx\n", | ||
| 975 | fp->a0w, fp->a0x, fp->a1w, fp->a1x); | ||
| 976 | |||
| 977 | pr_notice("USP : %08lx ASTAT: %08lx\n", | ||
| 978 | rdusp(), fp->astat); | ||
| 979 | |||
| 980 | pr_notice("\n"); | ||
| 981 | } | ||
diff --git a/arch/blackfin/kernel/traps.c b/arch/blackfin/kernel/traps.c index ba70c4bc2699..59c1df75e4de 100644 --- a/arch/blackfin/kernel/traps.c +++ b/arch/blackfin/kernel/traps.c | |||
| @@ -1,25 +1,22 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Copyright 2004-2009 Analog Devices Inc. | 2 | * Main exception handling logic. |
| 3 | * | ||
| 4 | * Copyright 2004-2010 Analog Devices Inc. | ||
| 3 | * | 5 | * |
| 4 | * Licensed under the GPL-2 or later | 6 | * Licensed under the GPL-2 or later |
| 5 | */ | 7 | */ |
| 6 | 8 | ||
| 7 | #include <linux/bug.h> | 9 | #include <linux/bug.h> |
| 8 | #include <linux/uaccess.h> | 10 | #include <linux/uaccess.h> |
| 9 | #include <linux/interrupt.h> | ||
| 10 | #include <linux/module.h> | 11 | #include <linux/module.h> |
| 11 | #include <linux/kallsyms.h> | ||
| 12 | #include <linux/fs.h> | ||
| 13 | #include <linux/rbtree.h> | ||
| 14 | #include <asm/traps.h> | 12 | #include <asm/traps.h> |
| 15 | #include <asm/cacheflush.h> | ||
| 16 | #include <asm/cplb.h> | 13 | #include <asm/cplb.h> |
| 17 | #include <asm/dma.h> | ||
| 18 | #include <asm/blackfin.h> | 14 | #include <asm/blackfin.h> |
| 19 | #include <asm/irq_handler.h> | 15 | #include <asm/irq_handler.h> |
| 20 | #include <linux/irq.h> | 16 | #include <linux/irq.h> |
| 21 | #include <asm/trace.h> | 17 | #include <asm/trace.h> |
| 22 | #include <asm/fixed_code.h> | 18 | #include <asm/fixed_code.h> |
| 19 | #include <asm/pseudo_instructions.h> | ||
| 23 | 20 | ||
| 24 | #ifdef CONFIG_KGDB | 21 | #ifdef CONFIG_KGDB |
| 25 | # include <linux/kgdb.h> | 22 | # include <linux/kgdb.h> |
| @@ -62,194 +59,6 @@ void __init trap_init(void) | |||
| 62 | CSYNC(); | 59 | CSYNC(); |
| 63 | } | 60 | } |
| 64 | 61 | ||
| 65 | static void decode_address(char *buf, unsigned long address) | ||
| 66 | { | ||
| 67 | #ifdef CONFIG_DEBUG_VERBOSE | ||
| 68 | struct task_struct *p; | ||
| 69 | struct mm_struct *mm; | ||
| 70 | unsigned long flags, offset; | ||
| 71 | unsigned char in_atomic = (bfin_read_IPEND() & 0x10) || in_atomic(); | ||
| 72 | struct rb_node *n; | ||
| 73 | |||
| 74 | #ifdef CONFIG_KALLSYMS | ||
| 75 | unsigned long symsize; | ||
| 76 | const char *symname; | ||
| 77 | char *modname; | ||
| 78 | char *delim = ":"; | ||
| 79 | char namebuf[128]; | ||
| 80 | #endif | ||
| 81 | |||
| 82 | buf += sprintf(buf, "<0x%08lx> ", address); | ||
| 83 | |||
| 84 | #ifdef CONFIG_KALLSYMS | ||
| 85 | /* look up the address and see if we are in kernel space */ | ||
| 86 | symname = kallsyms_lookup(address, &symsize, &offset, &modname, namebuf); | ||
| 87 | |||
| 88 | if (symname) { | ||
| 89 | /* yeah! kernel space! */ | ||
| 90 | if (!modname) | ||
| 91 | modname = delim = ""; | ||
| 92 | sprintf(buf, "{ %s%s%s%s + 0x%lx }", | ||
| 93 | delim, modname, delim, symname, | ||
| 94 | (unsigned long)offset); | ||
| 95 | return; | ||
| 96 | } | ||
| 97 | #endif | ||
| 98 | |||
| 99 | if (address >= FIXED_CODE_START && address < FIXED_CODE_END) { | ||
| 100 | /* Problem in fixed code section? */ | ||
| 101 | strcat(buf, "/* Maybe fixed code section */"); | ||
| 102 | return; | ||
| 103 | |||
| 104 | } else if (address < CONFIG_BOOT_LOAD) { | ||
| 105 | /* Problem somewhere before the kernel start address */ | ||
| 106 | strcat(buf, "/* Maybe null pointer? */"); | ||
| 107 | return; | ||
| 108 | |||
| 109 | } else if (address >= COREMMR_BASE) { | ||
| 110 | strcat(buf, "/* core mmrs */"); | ||
| 111 | return; | ||
| 112 | |||
| 113 | } else if (address >= SYSMMR_BASE) { | ||
| 114 | strcat(buf, "/* system mmrs */"); | ||
| 115 | return; | ||
| 116 | |||
| 117 | } else if (address >= L1_ROM_START && address < L1_ROM_START + L1_ROM_LENGTH) { | ||
| 118 | strcat(buf, "/* on-chip L1 ROM */"); | ||
| 119 | return; | ||
| 120 | } | ||
| 121 | |||
| 122 | /* | ||
| 123 | * Don't walk any of the vmas if we are oopsing, it has been known | ||
| 124 | * to cause problems - corrupt vmas (kernel crashes) cause double faults | ||
| 125 | */ | ||
| 126 | if (oops_in_progress) { | ||
| 127 | strcat(buf, "/* kernel dynamic memory (maybe user-space) */"); | ||
| 128 | return; | ||
| 129 | } | ||
| 130 | |||
| 131 | /* looks like we're off in user-land, so let's walk all the | ||
| 132 | * mappings of all our processes and see if we can't be a whee | ||
| 133 | * bit more specific | ||
| 134 | */ | ||
| 135 | write_lock_irqsave(&tasklist_lock, flags); | ||
| 136 | for_each_process(p) { | ||
| 137 | mm = (in_atomic ? p->mm : get_task_mm(p)); | ||
| 138 | if (!mm) | ||
| 139 | continue; | ||
| 140 | |||
| 141 | if (!down_read_trylock(&mm->mmap_sem)) { | ||
| 142 | if (!in_atomic) | ||
| 143 | mmput(mm); | ||
| 144 | continue; | ||
| 145 | } | ||
| 146 | |||
| 147 | for (n = rb_first(&mm->mm_rb); n; n = rb_next(n)) { | ||
| 148 | struct vm_area_struct *vma; | ||
| 149 | |||
| 150 | vma = rb_entry(n, struct vm_area_struct, vm_rb); | ||
| 151 | |||
| 152 | if (address >= vma->vm_start && address < vma->vm_end) { | ||
| 153 | char _tmpbuf[256]; | ||
| 154 | char *name = p->comm; | ||
| 155 | struct file *file = vma->vm_file; | ||
| 156 | |||
| 157 | if (file) { | ||
| 158 | char *d_name = d_path(&file->f_path, _tmpbuf, | ||
| 159 | sizeof(_tmpbuf)); | ||
| 160 | if (!IS_ERR(d_name)) | ||
| 161 | name = d_name; | ||
| 162 | } | ||
| 163 | |||
| 164 | /* FLAT does not have its text aligned to the start of | ||
| 165 | * the map while FDPIC ELF does ... | ||
| 166 | */ | ||
| 167 | |||
| 168 | /* before we can check flat/fdpic, we need to | ||
| 169 | * make sure current is valid | ||
| 170 | */ | ||
| 171 | if ((unsigned long)current >= FIXED_CODE_START && | ||
| 172 | !((unsigned long)current & 0x3)) { | ||
| 173 | if (current->mm && | ||
| 174 | (address > current->mm->start_code) && | ||
| 175 | (address < current->mm->end_code)) | ||
| 176 | offset = address - current->mm->start_code; | ||
| 177 | else | ||
| 178 | offset = (address - vma->vm_start) + | ||
| 179 | (vma->vm_pgoff << PAGE_SHIFT); | ||
| 180 | |||
| 181 | sprintf(buf, "[ %s + 0x%lx ]", name, offset); | ||
| 182 | } else | ||
| 183 | sprintf(buf, "[ %s vma:0x%lx-0x%lx]", | ||
| 184 | name, vma->vm_start, vma->vm_end); | ||
| 185 | |||
| 186 | up_read(&mm->mmap_sem); | ||
| 187 | if (!in_atomic) | ||
| 188 | mmput(mm); | ||
| 189 | |||
| 190 | if (buf[0] == '\0') | ||
| 191 | sprintf(buf, "[ %s ] dynamic memory", name); | ||
| 192 | |||
| 193 | goto done; | ||
| 194 | } | ||
| 195 | } | ||
| 196 | |||
| 197 | up_read(&mm->mmap_sem); | ||
| 198 | if (!in_atomic) | ||
| 199 | mmput(mm); | ||
| 200 | } | ||
| 201 | |||
| 202 | /* | ||
| 203 | * we were unable to find this address anywhere, | ||
| 204 | * or some MMs were skipped because they were in use. | ||
| 205 | */ | ||
| 206 | sprintf(buf, "/* kernel dynamic memory */"); | ||
| 207 | |||
| 208 | done: | ||
| 209 | write_unlock_irqrestore(&tasklist_lock, flags); | ||
| 210 | #else | ||
| 211 | sprintf(buf, " "); | ||
| 212 | #endif | ||
| 213 | } | ||
| 214 | |||
| 215 | asmlinkage void double_fault_c(struct pt_regs *fp) | ||
| 216 | { | ||
| 217 | #ifdef CONFIG_DEBUG_BFIN_HWTRACE_ON | ||
| 218 | int j; | ||
| 219 | trace_buffer_save(j); | ||
| 220 | #endif | ||
| 221 | |||
| 222 | console_verbose(); | ||
| 223 | oops_in_progress = 1; | ||
| 224 | #ifdef CONFIG_DEBUG_VERBOSE | ||
| 225 | printk(KERN_EMERG "Double Fault\n"); | ||
| 226 | #ifdef CONFIG_DEBUG_DOUBLEFAULT_PRINT | ||
| 227 | if (((long)fp->seqstat & SEQSTAT_EXCAUSE) == VEC_UNCOV) { | ||
| 228 | unsigned int cpu = raw_smp_processor_id(); | ||
| 229 | char buf[150]; | ||
| 230 | decode_address(buf, cpu_pda[cpu].retx_doublefault); | ||
| 231 | printk(KERN_EMERG "While handling exception (EXCAUSE = 0x%x) at %s:\n", | ||
| 232 | (unsigned int)cpu_pda[cpu].seqstat_doublefault & SEQSTAT_EXCAUSE, buf); | ||
| 233 | decode_address(buf, cpu_pda[cpu].dcplb_doublefault_addr); | ||
| 234 | printk(KERN_NOTICE " DCPLB_FAULT_ADDR: %s\n", buf); | ||
| 235 | decode_address(buf, cpu_pda[cpu].icplb_doublefault_addr); | ||
| 236 | printk(KERN_NOTICE " ICPLB_FAULT_ADDR: %s\n", buf); | ||
| 237 | |||
| 238 | decode_address(buf, fp->retx); | ||
| 239 | printk(KERN_NOTICE "The instruction at %s caused a double exception\n", buf); | ||
| 240 | } else | ||
| 241 | #endif | ||
| 242 | { | ||
| 243 | dump_bfin_process(fp); | ||
| 244 | dump_bfin_mem(fp); | ||
| 245 | show_regs(fp); | ||
| 246 | dump_bfin_trace_buffer(); | ||
| 247 | } | ||
| 248 | #endif | ||
| 249 | panic("Double Fault - unrecoverable event"); | ||
| 250 | |||
| 251 | } | ||
| 252 | |||
| 253 | static int kernel_mode_regs(struct pt_regs *regs) | 62 | static int kernel_mode_regs(struct pt_regs *regs) |
| 254 | { | 63 | { |
| 255 | return regs->ipend & 0xffc0; | 64 | return regs->ipend & 0xffc0; |
| @@ -260,6 +69,9 @@ asmlinkage notrace void trap_c(struct pt_regs *fp) | |||
| 260 | #ifdef CONFIG_DEBUG_BFIN_HWTRACE_ON | 69 | #ifdef CONFIG_DEBUG_BFIN_HWTRACE_ON |
| 261 | int j; | 70 | int j; |
| 262 | #endif | 71 | #endif |
| 72 | #ifdef CONFIG_BFIN_PSEUDODBG_INSNS | ||
| 73 | int opcode; | ||
| 74 | #endif | ||
| 263 | unsigned int cpu = raw_smp_processor_id(); | 75 | unsigned int cpu = raw_smp_processor_id(); |
| 264 | const char *strerror = NULL; | 76 | const char *strerror = NULL; |
| 265 | int sig = 0; | 77 | int sig = 0; |
| @@ -392,6 +204,19 @@ asmlinkage notrace void trap_c(struct pt_regs *fp) | |||
| 392 | } | 204 | } |
| 393 | } | 205 | } |
| 394 | #endif | 206 | #endif |
| 207 | #ifdef CONFIG_BFIN_PSEUDODBG_INSNS | ||
| 208 | /* | ||
| 209 | * Support for the fake instructions, if the instruction fails, | ||
| 210 | * then just execute a illegal opcode failure (like normal). | ||
| 211 | * Don't support these instructions inside the kernel | ||
| 212 | */ | ||
| 213 | if (!kernel_mode_regs(fp) && get_instruction(&opcode, (unsigned short *)fp->pc)) { | ||
| 214 | if (execute_pseudodbg_assert(fp, opcode)) | ||
| 215 | goto traps_done; | ||
| 216 | if (execute_pseudodbg(fp, opcode)) | ||
| 217 | goto traps_done; | ||
| 218 | } | ||
| 219 | #endif | ||
| 395 | info.si_code = ILL_ILLOPC; | 220 | info.si_code = ILL_ILLOPC; |
| 396 | sig = SIGILL; | 221 | sig = SIGILL; |
| 397 | strerror = KERN_NOTICE EXC_0x21(KERN_NOTICE); | 222 | strerror = KERN_NOTICE EXC_0x21(KERN_NOTICE); |
| @@ -672,659 +497,44 @@ asmlinkage notrace void trap_c(struct pt_regs *fp) | |||
| 672 | trace_buffer_restore(j); | 497 | trace_buffer_restore(j); |
| 673 | } | 498 | } |
| 674 | 499 | ||
| 675 | /* Typical exception handling routines */ | 500 | asmlinkage void double_fault_c(struct pt_regs *fp) |
| 676 | |||
| 677 | #define EXPAND_LEN ((1 << CONFIG_DEBUG_BFIN_HWTRACE_EXPAND_LEN) * 256 - 1) | ||
| 678 | |||
| 679 | /* | ||
| 680 | * Similar to get_user, do some address checking, then dereference | ||
| 681 | * Return true on success, false on bad address | ||
| 682 | */ | ||
| 683 | static bool get_instruction(unsigned short *val, unsigned short *address) | ||
| 684 | { | ||
| 685 | unsigned long addr = (unsigned long)address; | ||
| 686 | |||
| 687 | /* Check for odd addresses */ | ||
| 688 | if (addr & 0x1) | ||
| 689 | return false; | ||
| 690 | |||
| 691 | /* MMR region will never have instructions */ | ||
| 692 | if (addr >= SYSMMR_BASE) | ||
| 693 | return false; | ||
| 694 | |||
| 695 | switch (bfin_mem_access_type(addr, 2)) { | ||
| 696 | case BFIN_MEM_ACCESS_CORE: | ||
| 697 | case BFIN_MEM_ACCESS_CORE_ONLY: | ||
| 698 | *val = *address; | ||
| 699 | return true; | ||
| 700 | case BFIN_MEM_ACCESS_DMA: | ||
| 701 | dma_memcpy(val, address, 2); | ||
| 702 | return true; | ||
| 703 | case BFIN_MEM_ACCESS_ITEST: | ||
| 704 | isram_memcpy(val, address, 2); | ||
| 705 | return true; | ||
| 706 | default: /* invalid access */ | ||
| 707 | return false; | ||
| 708 | } | ||
| 709 | } | ||
| 710 | |||
| 711 | /* | ||
| 712 | * decode the instruction if we are printing out the trace, as it | ||
| 713 | * makes things easier to follow, without running it through objdump | ||
| 714 | * These are the normal instructions which cause change of flow, which | ||
| 715 | * would be at the source of the trace buffer | ||
| 716 | */ | ||
| 717 | #if defined(CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_BFIN_HWTRACE_ON) | ||
| 718 | static void decode_instruction(unsigned short *address) | ||
| 719 | { | ||
| 720 | unsigned short opcode; | ||
| 721 | |||
| 722 | if (get_instruction(&opcode, address)) { | ||
| 723 | if (opcode == 0x0010) | ||
| 724 | verbose_printk("RTS"); | ||
| 725 | else if (opcode == 0x0011) | ||
| 726 | verbose_printk("RTI"); | ||
| 727 | else if (opcode == 0x0012) | ||
| 728 | verbose_printk("RTX"); | ||
| 729 | else if (opcode == 0x0013) | ||
| 730 | verbose_printk("RTN"); | ||
| 731 | else if (opcode == 0x0014) | ||
| 732 | verbose_printk("RTE"); | ||
| 733 | else if (opcode == 0x0025) | ||
| 734 | verbose_printk("EMUEXCPT"); | ||
| 735 | else if (opcode >= 0x0040 && opcode <= 0x0047) | ||
| 736 | verbose_printk("STI R%i", opcode & 7); | ||
| 737 | else if (opcode >= 0x0050 && opcode <= 0x0057) | ||
| 738 | verbose_printk("JUMP (P%i)", opcode & 7); | ||
| 739 | else if (opcode >= 0x0060 && opcode <= 0x0067) | ||
| 740 | verbose_printk("CALL (P%i)", opcode & 7); | ||
| 741 | else if (opcode >= 0x0070 && opcode <= 0x0077) | ||
| 742 | verbose_printk("CALL (PC+P%i)", opcode & 7); | ||
| 743 | else if (opcode >= 0x0080 && opcode <= 0x0087) | ||
| 744 | verbose_printk("JUMP (PC+P%i)", opcode & 7); | ||
| 745 | else if (opcode >= 0x0090 && opcode <= 0x009F) | ||
| 746 | verbose_printk("RAISE 0x%x", opcode & 0xF); | ||
| 747 | else if (opcode >= 0x00A0 && opcode <= 0x00AF) | ||
| 748 | verbose_printk("EXCPT 0x%x", opcode & 0xF); | ||
| 749 | else if ((opcode >= 0x1000 && opcode <= 0x13FF) || (opcode >= 0x1800 && opcode <= 0x1BFF)) | ||
| 750 | verbose_printk("IF !CC JUMP"); | ||
| 751 | else if ((opcode >= 0x1400 && opcode <= 0x17ff) || (opcode >= 0x1c00 && opcode <= 0x1fff)) | ||
| 752 | verbose_printk("IF CC JUMP"); | ||
| 753 | else if (opcode >= 0x2000 && opcode <= 0x2fff) | ||
| 754 | verbose_printk("JUMP.S"); | ||
| 755 | else if (opcode >= 0xe080 && opcode <= 0xe0ff) | ||
| 756 | verbose_printk("LSETUP"); | ||
| 757 | else if (opcode >= 0xe200 && opcode <= 0xe2ff) | ||
| 758 | verbose_printk("JUMP.L"); | ||
| 759 | else if (opcode >= 0xe300 && opcode <= 0xe3ff) | ||
| 760 | verbose_printk("CALL pcrel"); | ||
| 761 | else | ||
| 762 | verbose_printk("0x%04x", opcode); | ||
| 763 | } | ||
| 764 | |||
| 765 | } | ||
| 766 | #endif | ||
| 767 | |||
| 768 | void dump_bfin_trace_buffer(void) | ||
| 769 | { | ||
| 770 | #ifdef CONFIG_DEBUG_VERBOSE | ||
| 771 | #ifdef CONFIG_DEBUG_BFIN_HWTRACE_ON | ||
| 772 | int tflags, i = 0; | ||
| 773 | char buf[150]; | ||
| 774 | unsigned short *addr; | ||
| 775 | #ifdef CONFIG_DEBUG_BFIN_HWTRACE_EXPAND | ||
| 776 | int j, index; | ||
| 777 | #endif | ||
| 778 | |||
| 779 | trace_buffer_save(tflags); | ||
| 780 | |||
| 781 | printk(KERN_NOTICE "Hardware Trace:\n"); | ||
| 782 | |||
| 783 | #ifdef CONFIG_DEBUG_BFIN_HWTRACE_EXPAND | ||
| 784 | printk(KERN_NOTICE "WARNING: Expanded trace turned on - can not trace exceptions\n"); | ||
| 785 | #endif | ||
| 786 | |||
| 787 | if (likely(bfin_read_TBUFSTAT() & TBUFCNT)) { | ||
| 788 | for (; bfin_read_TBUFSTAT() & TBUFCNT; i++) { | ||
| 789 | decode_address(buf, (unsigned long)bfin_read_TBUF()); | ||
| 790 | printk(KERN_NOTICE "%4i Target : %s\n", i, buf); | ||
| 791 | addr = (unsigned short *)bfin_read_TBUF(); | ||
| 792 | decode_address(buf, (unsigned long)addr); | ||
| 793 | printk(KERN_NOTICE " Source : %s ", buf); | ||
| 794 | decode_instruction(addr); | ||
| 795 | printk("\n"); | ||
| 796 | } | ||
| 797 | } | ||
| 798 | |||
| 799 | #ifdef CONFIG_DEBUG_BFIN_HWTRACE_EXPAND | ||
| 800 | if (trace_buff_offset) | ||
| 801 | index = trace_buff_offset / 4; | ||
| 802 | else | ||
| 803 | index = EXPAND_LEN; | ||
| 804 | |||
| 805 | j = (1 << CONFIG_DEBUG_BFIN_HWTRACE_EXPAND_LEN) * 128; | ||
| 806 | while (j) { | ||
| 807 | decode_address(buf, software_trace_buff[index]); | ||
| 808 | printk(KERN_NOTICE "%4i Target : %s\n", i, buf); | ||
| 809 | index -= 1; | ||
| 810 | if (index < 0 ) | ||
| 811 | index = EXPAND_LEN; | ||
| 812 | decode_address(buf, software_trace_buff[index]); | ||
| 813 | printk(KERN_NOTICE " Source : %s ", buf); | ||
| 814 | decode_instruction((unsigned short *)software_trace_buff[index]); | ||
| 815 | printk("\n"); | ||
| 816 | index -= 1; | ||
| 817 | if (index < 0) | ||
| 818 | index = EXPAND_LEN; | ||
| 819 | j--; | ||
| 820 | i++; | ||
| 821 | } | ||
| 822 | #endif | ||
| 823 | |||
| 824 | trace_buffer_restore(tflags); | ||
| 825 | #endif | ||
| 826 | #endif | ||
| 827 | } | ||
| 828 | EXPORT_SYMBOL(dump_bfin_trace_buffer); | ||
| 829 | |||
| 830 | #ifdef CONFIG_BUG | ||
| 831 | int is_valid_bugaddr(unsigned long addr) | ||
| 832 | { | ||
| 833 | unsigned short opcode; | ||
| 834 | |||
| 835 | if (!get_instruction(&opcode, (unsigned short *)addr)) | ||
| 836 | return 0; | ||
| 837 | |||
| 838 | return opcode == BFIN_BUG_OPCODE; | ||
| 839 | } | ||
| 840 | #endif | ||
| 841 | |||
| 842 | /* | ||
| 843 | * Checks to see if the address pointed to is either a | ||
| 844 | * 16-bit CALL instruction, or a 32-bit CALL instruction | ||
| 845 | */ | ||
| 846 | static bool is_bfin_call(unsigned short *addr) | ||
| 847 | { | ||
| 848 | unsigned short opcode = 0, *ins_addr; | ||
| 849 | ins_addr = (unsigned short *)addr; | ||
| 850 | |||
| 851 | if (!get_instruction(&opcode, ins_addr)) | ||
| 852 | return false; | ||
| 853 | |||
| 854 | if ((opcode >= 0x0060 && opcode <= 0x0067) || | ||
| 855 | (opcode >= 0x0070 && opcode <= 0x0077)) | ||
| 856 | return true; | ||
| 857 | |||
| 858 | ins_addr--; | ||
| 859 | if (!get_instruction(&opcode, ins_addr)) | ||
| 860 | return false; | ||
| 861 | |||
| 862 | if (opcode >= 0xE300 && opcode <= 0xE3FF) | ||
| 863 | return true; | ||
| 864 | |||
| 865 | return false; | ||
| 866 | |||
| 867 | } | ||
| 868 | |||
| 869 | void show_stack(struct task_struct *task, unsigned long *stack) | ||
| 870 | { | ||
| 871 | #ifdef CONFIG_PRINTK | ||
| 872 | unsigned int *addr, *endstack, *fp = 0, *frame; | ||
| 873 | unsigned short *ins_addr; | ||
| 874 | char buf[150]; | ||
| 875 | unsigned int i, j, ret_addr, frame_no = 0; | ||
| 876 | |||
| 877 | /* | ||
| 878 | * If we have been passed a specific stack, use that one otherwise | ||
| 879 | * if we have been passed a task structure, use that, otherwise | ||
| 880 | * use the stack of where the variable "stack" exists | ||
| 881 | */ | ||
| 882 | |||
| 883 | if (stack == NULL) { | ||
| 884 | if (task) { | ||
| 885 | /* We know this is a kernel stack, so this is the start/end */ | ||
| 886 | stack = (unsigned long *)task->thread.ksp; | ||
| 887 | endstack = (unsigned int *)(((unsigned int)(stack) & ~(THREAD_SIZE - 1)) + THREAD_SIZE); | ||
| 888 | } else { | ||
| 889 | /* print out the existing stack info */ | ||
| 890 | stack = (unsigned long *)&stack; | ||
| 891 | endstack = (unsigned int *)PAGE_ALIGN((unsigned int)stack); | ||
| 892 | } | ||
| 893 | } else | ||
| 894 | endstack = (unsigned int *)PAGE_ALIGN((unsigned int)stack); | ||
| 895 | |||
| 896 | printk(KERN_NOTICE "Stack info:\n"); | ||
| 897 | decode_address(buf, (unsigned int)stack); | ||
| 898 | printk(KERN_NOTICE " SP: [0x%p] %s\n", stack, buf); | ||
| 899 | |||
| 900 | if (!access_ok(VERIFY_READ, stack, (unsigned int)endstack - (unsigned int)stack)) { | ||
| 901 | printk(KERN_NOTICE "Invalid stack pointer\n"); | ||
| 902 | return; | ||
| 903 | } | ||
| 904 | |||
| 905 | /* First thing is to look for a frame pointer */ | ||
| 906 | for (addr = (unsigned int *)((unsigned int)stack & ~0xF); addr < endstack; addr++) { | ||
| 907 | if (*addr & 0x1) | ||
| 908 | continue; | ||
| 909 | ins_addr = (unsigned short *)*addr; | ||
| 910 | ins_addr--; | ||
| 911 | if (is_bfin_call(ins_addr)) | ||
| 912 | fp = addr - 1; | ||
| 913 | |||
| 914 | if (fp) { | ||
| 915 | /* Let's check to see if it is a frame pointer */ | ||
| 916 | while (fp >= (addr - 1) && fp < endstack | ||
| 917 | && fp && ((unsigned int) fp & 0x3) == 0) | ||
| 918 | fp = (unsigned int *)*fp; | ||
| 919 | if (fp == 0 || fp == endstack) { | ||
| 920 | fp = addr - 1; | ||
| 921 | break; | ||
| 922 | } | ||
| 923 | fp = 0; | ||
| 924 | } | ||
| 925 | } | ||
| 926 | if (fp) { | ||
| 927 | frame = fp; | ||
| 928 | printk(KERN_NOTICE " FP: (0x%p)\n", fp); | ||
| 929 | } else | ||
| 930 | frame = 0; | ||
| 931 | |||
| 932 | /* | ||
| 933 | * Now that we think we know where things are, we | ||
| 934 | * walk the stack again, this time printing things out | ||
| 935 | * incase there is no frame pointer, we still look for | ||
| 936 | * valid return addresses | ||
| 937 | */ | ||
| 938 | |||
| 939 | /* First time print out data, next time, print out symbols */ | ||
| 940 | for (j = 0; j <= 1; j++) { | ||
| 941 | if (j) | ||
| 942 | printk(KERN_NOTICE "Return addresses in stack:\n"); | ||
| 943 | else | ||
| 944 | printk(KERN_NOTICE " Memory from 0x%08lx to %p", ((long unsigned int)stack & ~0xF), endstack); | ||
| 945 | |||
| 946 | fp = frame; | ||
| 947 | frame_no = 0; | ||
| 948 | |||
| 949 | for (addr = (unsigned int *)((unsigned int)stack & ~0xF), i = 0; | ||
| 950 | addr < endstack; addr++, i++) { | ||
| 951 | |||
| 952 | ret_addr = 0; | ||
| 953 | if (!j && i % 8 == 0) | ||
| 954 | printk(KERN_NOTICE "%p:",addr); | ||
| 955 | |||
| 956 | /* if it is an odd address, or zero, just skip it */ | ||
| 957 | if (*addr & 0x1 || !*addr) | ||
| 958 | goto print; | ||
| 959 | |||
| 960 | ins_addr = (unsigned short *)*addr; | ||
| 961 | |||
| 962 | /* Go back one instruction, and see if it is a CALL */ | ||
| 963 | ins_addr--; | ||
| 964 | ret_addr = is_bfin_call(ins_addr); | ||
| 965 | print: | ||
| 966 | if (!j && stack == (unsigned long *)addr) | ||
| 967 | printk("[%08x]", *addr); | ||
| 968 | else if (ret_addr) | ||
| 969 | if (j) { | ||
| 970 | decode_address(buf, (unsigned int)*addr); | ||
| 971 | if (frame == addr) { | ||
| 972 | printk(KERN_NOTICE " frame %2i : %s\n", frame_no, buf); | ||
| 973 | continue; | ||
| 974 | } | ||
| 975 | printk(KERN_NOTICE " address : %s\n", buf); | ||
| 976 | } else | ||
| 977 | printk("<%08x>", *addr); | ||
| 978 | else if (fp == addr) { | ||
| 979 | if (j) | ||
| 980 | frame = addr+1; | ||
| 981 | else | ||
| 982 | printk("(%08x)", *addr); | ||
| 983 | |||
| 984 | fp = (unsigned int *)*addr; | ||
| 985 | frame_no++; | ||
| 986 | |||
| 987 | } else if (!j) | ||
| 988 | printk(" %08x ", *addr); | ||
| 989 | } | ||
| 990 | if (!j) | ||
| 991 | printk("\n"); | ||
| 992 | } | ||
| 993 | #endif | ||
| 994 | } | ||
| 995 | EXPORT_SYMBOL(show_stack); | ||
| 996 | |||
| 997 | void dump_stack(void) | ||
| 998 | { | 501 | { |
| 999 | unsigned long stack; | ||
| 1000 | #ifdef CONFIG_DEBUG_BFIN_HWTRACE_ON | 502 | #ifdef CONFIG_DEBUG_BFIN_HWTRACE_ON |
| 1001 | int tflags; | 503 | int j; |
| 504 | trace_buffer_save(j); | ||
| 1002 | #endif | 505 | #endif |
| 1003 | trace_buffer_save(tflags); | ||
| 1004 | dump_bfin_trace_buffer(); | ||
| 1005 | show_stack(current, &stack); | ||
| 1006 | trace_buffer_restore(tflags); | ||
| 1007 | } | ||
| 1008 | EXPORT_SYMBOL(dump_stack); | ||
| 1009 | 506 | ||
| 1010 | void dump_bfin_process(struct pt_regs *fp) | 507 | console_verbose(); |
| 1011 | { | 508 | oops_in_progress = 1; |
| 1012 | #ifdef CONFIG_DEBUG_VERBOSE | 509 | #ifdef CONFIG_DEBUG_VERBOSE |
| 1013 | /* We should be able to look at fp->ipend, but we don't push it on the | 510 | printk(KERN_EMERG "Double Fault\n"); |
| 1014 | * stack all the time, so do this until we fix that */ | 511 | #ifdef CONFIG_DEBUG_DOUBLEFAULT_PRINT |
| 1015 | unsigned int context = bfin_read_IPEND(); | 512 | if (((long)fp->seqstat & SEQSTAT_EXCAUSE) == VEC_UNCOV) { |
| 1016 | 513 | unsigned int cpu = raw_smp_processor_id(); | |
| 1017 | if (oops_in_progress) | 514 | char buf[150]; |
| 1018 | verbose_printk(KERN_EMERG "Kernel OOPS in progress\n"); | 515 | decode_address(buf, cpu_pda[cpu].retx_doublefault); |
| 1019 | 516 | printk(KERN_EMERG "While handling exception (EXCAUSE = 0x%x) at %s:\n", | |
| 1020 | if (context & 0x0020 && (fp->seqstat & SEQSTAT_EXCAUSE) == VEC_HWERR) | 517 | (unsigned int)cpu_pda[cpu].seqstat_doublefault & SEQSTAT_EXCAUSE, buf); |
| 1021 | verbose_printk(KERN_NOTICE "HW Error context\n"); | 518 | decode_address(buf, cpu_pda[cpu].dcplb_doublefault_addr); |
| 1022 | else if (context & 0x0020) | 519 | printk(KERN_NOTICE " DCPLB_FAULT_ADDR: %s\n", buf); |
| 1023 | verbose_printk(KERN_NOTICE "Deferred Exception context\n"); | 520 | decode_address(buf, cpu_pda[cpu].icplb_doublefault_addr); |
| 1024 | else if (context & 0x3FC0) | 521 | printk(KERN_NOTICE " ICPLB_FAULT_ADDR: %s\n", buf); |
| 1025 | verbose_printk(KERN_NOTICE "Interrupt context\n"); | ||
| 1026 | else if (context & 0x4000) | ||
| 1027 | verbose_printk(KERN_NOTICE "Deferred Interrupt context\n"); | ||
| 1028 | else if (context & 0x8000) | ||
| 1029 | verbose_printk(KERN_NOTICE "Kernel process context\n"); | ||
| 1030 | |||
| 1031 | /* Because we are crashing, and pointers could be bad, we check things | ||
| 1032 | * pretty closely before we use them | ||
| 1033 | */ | ||
| 1034 | if ((unsigned long)current >= FIXED_CODE_START && | ||
| 1035 | !((unsigned long)current & 0x3) && current->pid) { | ||
| 1036 | verbose_printk(KERN_NOTICE "CURRENT PROCESS:\n"); | ||
| 1037 | if (current->comm >= (char *)FIXED_CODE_START) | ||
| 1038 | verbose_printk(KERN_NOTICE "COMM=%s PID=%d", | ||
| 1039 | current->comm, current->pid); | ||
| 1040 | else | ||
| 1041 | verbose_printk(KERN_NOTICE "COMM= invalid"); | ||
| 1042 | 522 | ||
| 1043 | printk(KERN_CONT " CPU=%d\n", current_thread_info()->cpu); | 523 | decode_address(buf, fp->retx); |
| 1044 | if (!((unsigned long)current->mm & 0x3) && (unsigned long)current->mm >= FIXED_CODE_START) | 524 | printk(KERN_NOTICE "The instruction at %s caused a double exception\n", buf); |
| 1045 | verbose_printk(KERN_NOTICE | ||
| 1046 | "TEXT = 0x%p-0x%p DATA = 0x%p-0x%p\n" | ||
| 1047 | " BSS = 0x%p-0x%p USER-STACK = 0x%p\n\n", | ||
| 1048 | (void *)current->mm->start_code, | ||
| 1049 | (void *)current->mm->end_code, | ||
| 1050 | (void *)current->mm->start_data, | ||
| 1051 | (void *)current->mm->end_data, | ||
| 1052 | (void *)current->mm->end_data, | ||
| 1053 | (void *)current->mm->brk, | ||
| 1054 | (void *)current->mm->start_stack); | ||
| 1055 | else | ||
| 1056 | verbose_printk(KERN_NOTICE "invalid mm\n"); | ||
| 1057 | } else | 525 | } else |
| 1058 | verbose_printk(KERN_NOTICE | ||
| 1059 | "No Valid process in current context\n"); | ||
| 1060 | #endif | ||
| 1061 | } | ||
| 1062 | |||
| 1063 | void dump_bfin_mem(struct pt_regs *fp) | ||
| 1064 | { | ||
| 1065 | #ifdef CONFIG_DEBUG_VERBOSE | ||
| 1066 | unsigned short *addr, *erraddr, val = 0, err = 0; | ||
| 1067 | char sti = 0, buf[6]; | ||
| 1068 | |||
| 1069 | erraddr = (void *)fp->pc; | ||
| 1070 | |||
| 1071 | verbose_printk(KERN_NOTICE "return address: [0x%p]; contents of:", erraddr); | ||
| 1072 | |||
| 1073 | for (addr = (unsigned short *)((unsigned long)erraddr & ~0xF) - 0x10; | ||
| 1074 | addr < (unsigned short *)((unsigned long)erraddr & ~0xF) + 0x10; | ||
| 1075 | addr++) { | ||
| 1076 | if (!((unsigned long)addr & 0xF)) | ||
| 1077 | verbose_printk(KERN_NOTICE "0x%p: ", addr); | ||
| 1078 | |||
| 1079 | if (!get_instruction(&val, addr)) { | ||
| 1080 | val = 0; | ||
| 1081 | sprintf(buf, "????"); | ||
| 1082 | } else | ||
| 1083 | sprintf(buf, "%04x", val); | ||
| 1084 | |||
| 1085 | if (addr == erraddr) { | ||
| 1086 | verbose_printk("[%s]", buf); | ||
| 1087 | err = val; | ||
| 1088 | } else | ||
| 1089 | verbose_printk(" %s ", buf); | ||
| 1090 | |||
| 1091 | /* Do any previous instructions turn on interrupts? */ | ||
| 1092 | if (addr <= erraddr && /* in the past */ | ||
| 1093 | ((val >= 0x0040 && val <= 0x0047) || /* STI instruction */ | ||
| 1094 | val == 0x017b)) /* [SP++] = RETI */ | ||
| 1095 | sti = 1; | ||
| 1096 | } | ||
| 1097 | |||
| 1098 | verbose_printk("\n"); | ||
| 1099 | |||
| 1100 | /* Hardware error interrupts can be deferred */ | ||
| 1101 | if (unlikely(sti && (fp->seqstat & SEQSTAT_EXCAUSE) == VEC_HWERR && | ||
| 1102 | oops_in_progress)){ | ||
| 1103 | verbose_printk(KERN_NOTICE "Looks like this was a deferred error - sorry\n"); | ||
| 1104 | #ifndef CONFIG_DEBUG_HWERR | ||
| 1105 | verbose_printk(KERN_NOTICE | ||
| 1106 | "The remaining message may be meaningless\n" | ||
| 1107 | "You should enable CONFIG_DEBUG_HWERR to get a better idea where it came from\n"); | ||
| 1108 | #else | ||
| 1109 | /* If we are handling only one peripheral interrupt | ||
| 1110 | * and current mm and pid are valid, and the last error | ||
| 1111 | * was in that user space process's text area | ||
| 1112 | * print it out - because that is where the problem exists | ||
| 1113 | */ | ||
| 1114 | if ((!(((fp)->ipend & ~0x30) & (((fp)->ipend & ~0x30) - 1))) && | ||
| 1115 | (current->pid && current->mm)) { | ||
| 1116 | /* And the last RETI points to the current userspace context */ | ||
| 1117 | if ((fp + 1)->pc >= current->mm->start_code && | ||
| 1118 | (fp + 1)->pc <= current->mm->end_code) { | ||
| 1119 | verbose_printk(KERN_NOTICE "It might be better to look around here :\n"); | ||
| 1120 | verbose_printk(KERN_NOTICE "-------------------------------------------\n"); | ||
| 1121 | show_regs(fp + 1); | ||
| 1122 | verbose_printk(KERN_NOTICE "-------------------------------------------\n"); | ||
| 1123 | } | ||
| 1124 | } | ||
| 1125 | #endif | ||
| 1126 | } | ||
| 1127 | #endif | ||
| 1128 | } | ||
| 1129 | |||
| 1130 | void show_regs(struct pt_regs *fp) | ||
| 1131 | { | ||
| 1132 | #ifdef CONFIG_DEBUG_VERBOSE | ||
| 1133 | char buf [150]; | ||
| 1134 | struct irqaction *action; | ||
| 1135 | unsigned int i; | ||
| 1136 | unsigned long flags = 0; | ||
| 1137 | unsigned int cpu = raw_smp_processor_id(); | ||
| 1138 | unsigned char in_atomic = (bfin_read_IPEND() & 0x10) || in_atomic(); | ||
| 1139 | |||
| 1140 | verbose_printk(KERN_NOTICE "\n"); | ||
| 1141 | if (CPUID != bfin_cpuid()) | ||
| 1142 | verbose_printk(KERN_NOTICE "Compiled for cpu family 0x%04x (Rev %d), " | ||
| 1143 | "but running on:0x%04x (Rev %d)\n", | ||
| 1144 | CPUID, bfin_compiled_revid(), bfin_cpuid(), bfin_revid()); | ||
| 1145 | |||
| 1146 | verbose_printk(KERN_NOTICE "ADSP-%s-0.%d", | ||
| 1147 | CPU, bfin_compiled_revid()); | ||
| 1148 | |||
| 1149 | if (bfin_compiled_revid() != bfin_revid()) | ||
| 1150 | verbose_printk("(Detected 0.%d)", bfin_revid()); | ||
| 1151 | |||
| 1152 | verbose_printk(" %lu(MHz CCLK) %lu(MHz SCLK) (%s)\n", | ||
| 1153 | get_cclk()/1000000, get_sclk()/1000000, | ||
| 1154 | #ifdef CONFIG_MPU | ||
| 1155 | "mpu on" | ||
| 1156 | #else | ||
| 1157 | "mpu off" | ||
| 1158 | #endif | ||
| 1159 | ); | ||
| 1160 | |||
| 1161 | verbose_printk(KERN_NOTICE "%s", linux_banner); | ||
| 1162 | |||
| 1163 | verbose_printk(KERN_NOTICE "\nSEQUENCER STATUS:\t\t%s\n", print_tainted()); | ||
| 1164 | verbose_printk(KERN_NOTICE " SEQSTAT: %08lx IPEND: %04lx IMASK: %04lx SYSCFG: %04lx\n", | ||
| 1165 | (long)fp->seqstat, fp->ipend, cpu_pda[raw_smp_processor_id()].ex_imask, fp->syscfg); | ||
| 1166 | if (fp->ipend & EVT_IRPTEN) | ||
| 1167 | verbose_printk(KERN_NOTICE " Global Interrupts Disabled (IPEND[4])\n"); | ||
| 1168 | if (!(cpu_pda[raw_smp_processor_id()].ex_imask & (EVT_IVG13 | EVT_IVG12 | EVT_IVG11 | | ||
| 1169 | EVT_IVG10 | EVT_IVG9 | EVT_IVG8 | EVT_IVG7 | EVT_IVTMR))) | ||
| 1170 | verbose_printk(KERN_NOTICE " Peripheral interrupts masked off\n"); | ||
| 1171 | if (!(cpu_pda[raw_smp_processor_id()].ex_imask & (EVT_IVG15 | EVT_IVG14))) | ||
| 1172 | verbose_printk(KERN_NOTICE " Kernel interrupts masked off\n"); | ||
| 1173 | if ((fp->seqstat & SEQSTAT_EXCAUSE) == VEC_HWERR) { | ||
| 1174 | verbose_printk(KERN_NOTICE " HWERRCAUSE: 0x%lx\n", | ||
| 1175 | (fp->seqstat & SEQSTAT_HWERRCAUSE) >> 14); | ||
| 1176 | #ifdef EBIU_ERRMST | ||
| 1177 | /* If the error was from the EBIU, print it out */ | ||
| 1178 | if (bfin_read_EBIU_ERRMST() & CORE_ERROR) { | ||
| 1179 | verbose_printk(KERN_NOTICE " EBIU Error Reason : 0x%04x\n", | ||
| 1180 | bfin_read_EBIU_ERRMST()); | ||
| 1181 | verbose_printk(KERN_NOTICE " EBIU Error Address : 0x%08x\n", | ||
| 1182 | bfin_read_EBIU_ERRADD()); | ||
| 1183 | } | ||
| 1184 | #endif | 526 | #endif |
| 527 | { | ||
| 528 | dump_bfin_process(fp); | ||
| 529 | dump_bfin_mem(fp); | ||
| 530 | show_regs(fp); | ||
| 531 | dump_bfin_trace_buffer(); | ||
| 1185 | } | 532 | } |
| 1186 | verbose_printk(KERN_NOTICE " EXCAUSE : 0x%lx\n", | ||
| 1187 | fp->seqstat & SEQSTAT_EXCAUSE); | ||
| 1188 | for (i = 2; i <= 15 ; i++) { | ||
| 1189 | if (fp->ipend & (1 << i)) { | ||
| 1190 | if (i != 4) { | ||
| 1191 | decode_address(buf, bfin_read32(EVT0 + 4*i)); | ||
| 1192 | verbose_printk(KERN_NOTICE " physical IVG%i asserted : %s\n", i, buf); | ||
| 1193 | } else | ||
| 1194 | verbose_printk(KERN_NOTICE " interrupts disabled\n"); | ||
| 1195 | } | ||
| 1196 | } | ||
| 1197 | |||
| 1198 | /* if no interrupts are going off, don't print this out */ | ||
| 1199 | if (fp->ipend & ~0x3F) { | ||
| 1200 | for (i = 0; i < (NR_IRQS - 1); i++) { | ||
| 1201 | if (!in_atomic) | ||
| 1202 | raw_spin_lock_irqsave(&irq_desc[i].lock, flags); | ||
| 1203 | |||
| 1204 | action = irq_desc[i].action; | ||
| 1205 | if (!action) | ||
| 1206 | goto unlock; | ||
| 1207 | |||
| 1208 | decode_address(buf, (unsigned int)action->handler); | ||
| 1209 | verbose_printk(KERN_NOTICE " logical irq %3d mapped : %s", i, buf); | ||
| 1210 | for (action = action->next; action; action = action->next) { | ||
| 1211 | decode_address(buf, (unsigned int)action->handler); | ||
| 1212 | verbose_printk(", %s", buf); | ||
| 1213 | } | ||
| 1214 | verbose_printk("\n"); | ||
| 1215 | unlock: | ||
| 1216 | if (!in_atomic) | ||
| 1217 | raw_spin_unlock_irqrestore(&irq_desc[i].lock, flags); | ||
| 1218 | } | ||
| 1219 | } | ||
| 1220 | |||
| 1221 | decode_address(buf, fp->rete); | ||
| 1222 | verbose_printk(KERN_NOTICE " RETE: %s\n", buf); | ||
| 1223 | decode_address(buf, fp->retn); | ||
| 1224 | verbose_printk(KERN_NOTICE " RETN: %s\n", buf); | ||
| 1225 | decode_address(buf, fp->retx); | ||
| 1226 | verbose_printk(KERN_NOTICE " RETX: %s\n", buf); | ||
| 1227 | decode_address(buf, fp->rets); | ||
| 1228 | verbose_printk(KERN_NOTICE " RETS: %s\n", buf); | ||
| 1229 | decode_address(buf, fp->pc); | ||
| 1230 | verbose_printk(KERN_NOTICE " PC : %s\n", buf); | ||
| 1231 | |||
| 1232 | if (((long)fp->seqstat & SEQSTAT_EXCAUSE) && | ||
| 1233 | (((long)fp->seqstat & SEQSTAT_EXCAUSE) != VEC_HWERR)) { | ||
| 1234 | decode_address(buf, cpu_pda[cpu].dcplb_fault_addr); | ||
| 1235 | verbose_printk(KERN_NOTICE "DCPLB_FAULT_ADDR: %s\n", buf); | ||
| 1236 | decode_address(buf, cpu_pda[cpu].icplb_fault_addr); | ||
| 1237 | verbose_printk(KERN_NOTICE "ICPLB_FAULT_ADDR: %s\n", buf); | ||
| 1238 | } | ||
| 1239 | |||
| 1240 | verbose_printk(KERN_NOTICE "PROCESSOR STATE:\n"); | ||
| 1241 | verbose_printk(KERN_NOTICE " R0 : %08lx R1 : %08lx R2 : %08lx R3 : %08lx\n", | ||
| 1242 | fp->r0, fp->r1, fp->r2, fp->r3); | ||
| 1243 | verbose_printk(KERN_NOTICE " R4 : %08lx R5 : %08lx R6 : %08lx R7 : %08lx\n", | ||
| 1244 | fp->r4, fp->r5, fp->r6, fp->r7); | ||
| 1245 | verbose_printk(KERN_NOTICE " P0 : %08lx P1 : %08lx P2 : %08lx P3 : %08lx\n", | ||
| 1246 | fp->p0, fp->p1, fp->p2, fp->p3); | ||
| 1247 | verbose_printk(KERN_NOTICE " P4 : %08lx P5 : %08lx FP : %08lx SP : %08lx\n", | ||
| 1248 | fp->p4, fp->p5, fp->fp, (long)fp); | ||
| 1249 | verbose_printk(KERN_NOTICE " LB0: %08lx LT0: %08lx LC0: %08lx\n", | ||
| 1250 | fp->lb0, fp->lt0, fp->lc0); | ||
| 1251 | verbose_printk(KERN_NOTICE " LB1: %08lx LT1: %08lx LC1: %08lx\n", | ||
| 1252 | fp->lb1, fp->lt1, fp->lc1); | ||
| 1253 | verbose_printk(KERN_NOTICE " B0 : %08lx L0 : %08lx M0 : %08lx I0 : %08lx\n", | ||
| 1254 | fp->b0, fp->l0, fp->m0, fp->i0); | ||
| 1255 | verbose_printk(KERN_NOTICE " B1 : %08lx L1 : %08lx M1 : %08lx I1 : %08lx\n", | ||
| 1256 | fp->b1, fp->l1, fp->m1, fp->i1); | ||
| 1257 | verbose_printk(KERN_NOTICE " B2 : %08lx L2 : %08lx M2 : %08lx I2 : %08lx\n", | ||
| 1258 | fp->b2, fp->l2, fp->m2, fp->i2); | ||
| 1259 | verbose_printk(KERN_NOTICE " B3 : %08lx L3 : %08lx M3 : %08lx I3 : %08lx\n", | ||
| 1260 | fp->b3, fp->l3, fp->m3, fp->i3); | ||
| 1261 | verbose_printk(KERN_NOTICE "A0.w: %08lx A0.x: %08lx A1.w: %08lx A1.x: %08lx\n", | ||
| 1262 | fp->a0w, fp->a0x, fp->a1w, fp->a1x); | ||
| 1263 | |||
| 1264 | verbose_printk(KERN_NOTICE "USP : %08lx ASTAT: %08lx\n", | ||
| 1265 | rdusp(), fp->astat); | ||
| 1266 | |||
| 1267 | verbose_printk(KERN_NOTICE "\n"); | ||
| 1268 | #endif | 533 | #endif |
| 1269 | } | 534 | panic("Double Fault - unrecoverable event"); |
| 1270 | |||
| 1271 | #ifdef CONFIG_SYS_BFIN_SPINLOCK_L1 | ||
| 1272 | asmlinkage int sys_bfin_spinlock(int *spinlock)__attribute__((l1_text)); | ||
| 1273 | #endif | ||
| 1274 | |||
| 1275 | static DEFINE_SPINLOCK(bfin_spinlock_lock); | ||
| 1276 | |||
| 1277 | asmlinkage int sys_bfin_spinlock(int *p) | ||
| 1278 | { | ||
| 1279 | int ret, tmp = 0; | ||
| 1280 | |||
| 1281 | spin_lock(&bfin_spinlock_lock); /* This would also hold kernel preemption. */ | ||
| 1282 | ret = get_user(tmp, p); | ||
| 1283 | if (likely(ret == 0)) { | ||
| 1284 | if (unlikely(tmp)) | ||
| 1285 | ret = 1; | ||
| 1286 | else | ||
| 1287 | put_user(1, p); | ||
| 1288 | } | ||
| 1289 | spin_unlock(&bfin_spinlock_lock); | ||
| 1290 | return ret; | ||
| 1291 | } | ||
| 1292 | |||
| 1293 | int bfin_request_exception(unsigned int exception, void (*handler)(void)) | ||
| 1294 | { | ||
| 1295 | void (*curr_handler)(void); | ||
| 1296 | |||
| 1297 | if (exception > 0x3F) | ||
| 1298 | return -EINVAL; | ||
| 1299 | |||
| 1300 | curr_handler = ex_table[exception]; | ||
| 1301 | |||
| 1302 | if (curr_handler != ex_replaceable) | ||
| 1303 | return -EBUSY; | ||
| 1304 | |||
| 1305 | ex_table[exception] = handler; | ||
| 1306 | 535 | ||
| 1307 | return 0; | ||
| 1308 | } | 536 | } |
| 1309 | EXPORT_SYMBOL(bfin_request_exception); | ||
| 1310 | |||
| 1311 | int bfin_free_exception(unsigned int exception, void (*handler)(void)) | ||
| 1312 | { | ||
| 1313 | void (*curr_handler)(void); | ||
| 1314 | |||
| 1315 | if (exception > 0x3F) | ||
| 1316 | return -EINVAL; | ||
| 1317 | |||
| 1318 | curr_handler = ex_table[exception]; | ||
| 1319 | 537 | ||
| 1320 | if (curr_handler != handler) | ||
| 1321 | return -EBUSY; | ||
| 1322 | |||
| 1323 | ex_table[exception] = ex_replaceable; | ||
| 1324 | |||
| 1325 | return 0; | ||
| 1326 | } | ||
| 1327 | EXPORT_SYMBOL(bfin_free_exception); | ||
| 1328 | 538 | ||
| 1329 | void panic_cplb_error(int cplb_panic, struct pt_regs *fp) | 539 | void panic_cplb_error(int cplb_panic, struct pt_regs *fp) |
| 1330 | { | 540 | { |
| @@ -1349,3 +559,23 @@ void panic_cplb_error(int cplb_panic, struct pt_regs *fp) | |||
| 1349 | dump_stack(); | 559 | dump_stack(); |
| 1350 | panic("Unrecoverable event"); | 560 | panic("Unrecoverable event"); |
| 1351 | } | 561 | } |
| 562 | |||
| 563 | #ifdef CONFIG_BUG | ||
| 564 | int is_valid_bugaddr(unsigned long addr) | ||
| 565 | { | ||
| 566 | unsigned int opcode; | ||
| 567 | |||
| 568 | if (!get_instruction(&opcode, (unsigned short *)addr)) | ||
| 569 | return 0; | ||
| 570 | |||
| 571 | return opcode == BFIN_BUG_OPCODE; | ||
| 572 | } | ||
| 573 | #endif | ||
| 574 | |||
| 575 | /* stub this out */ | ||
| 576 | #ifndef CONFIG_DEBUG_VERBOSE | ||
| 577 | void show_regs(struct pt_regs *fp) | ||
| 578 | { | ||
| 579 | |||
| 580 | } | ||
| 581 | #endif | ||
diff --git a/arch/blackfin/lib/memset.S b/arch/blackfin/lib/memset.S index c30d99b10969..eab1bef3f5bf 100644 --- a/arch/blackfin/lib/memset.S +++ b/arch/blackfin/lib/memset.S | |||
| @@ -20,6 +20,7 @@ | |||
| 20 | * R1 = filler byte | 20 | * R1 = filler byte |
| 21 | * R2 = count | 21 | * R2 = count |
| 22 | * Favours word aligned data. | 22 | * Favours word aligned data. |
| 23 | * The strncpy assumes that I0 and I1 are not used in this function | ||
| 23 | */ | 24 | */ |
| 24 | 25 | ||
| 25 | ENTRY(_memset) | 26 | ENTRY(_memset) |
diff --git a/arch/blackfin/lib/strcmp.S b/arch/blackfin/lib/strcmp.S new file mode 100644 index 000000000000..d7c1d158973b --- /dev/null +++ b/arch/blackfin/lib/strcmp.S | |||
| @@ -0,0 +1,43 @@ | |||
| 1 | /* | ||
| 2 | * Copyright 2005-2010 Analog Devices Inc. | ||
| 3 | * | ||
| 4 | * Licensed under the ADI BSD license or the GPL-2 (or later) | ||
| 5 | */ | ||
| 6 | |||
| 7 | #include <linux/linkage.h> | ||
| 8 | |||
| 9 | /* void *strcmp(char *s1, const char *s2); | ||
| 10 | * R0 = address (s1) | ||
| 11 | * R1 = address (s2) | ||
| 12 | * | ||
| 13 | * Returns an integer less than, equal to, or greater than zero if s1 | ||
| 14 | * (or the first n bytes thereof) is found, respectively, to be less | ||
| 15 | * than, to match, or be greater than s2. | ||
| 16 | */ | ||
| 17 | |||
| 18 | #ifdef CONFIG_STRCMP_L1 | ||
| 19 | .section .l1.text | ||
| 20 | #else | ||
| 21 | .text | ||
| 22 | #endif | ||
| 23 | |||
| 24 | .align 2 | ||
| 25 | |||
| 26 | ENTRY(_strcmp) | ||
| 27 | P0 = R0 ; /* s1 */ | ||
| 28 | P1 = R1 ; /* s2 */ | ||
| 29 | |||
| 30 | 1: | ||
| 31 | R0 = B[P0++] (Z); /* get *s1 */ | ||
| 32 | R1 = B[P1++] (Z); /* get *s2 */ | ||
| 33 | CC = R0 == R1; /* compare a byte */ | ||
| 34 | if ! cc jump 2f; /* not equal, break out */ | ||
| 35 | CC = R0; /* at end of s1? */ | ||
| 36 | if cc jump 1b (bp); /* no, keep going */ | ||
| 37 | jump.s 3f; /* strings are equal */ | ||
| 38 | 2: | ||
| 39 | R0 = R0 - R1; /* *s1 - *s2 */ | ||
| 40 | 3: | ||
| 41 | RTS; | ||
| 42 | |||
| 43 | ENDPROC(_strcmp) | ||
diff --git a/arch/blackfin/lib/strcmp.c b/arch/blackfin/lib/strcmp.c deleted file mode 100644 index fde39a1950ce..000000000000 --- a/arch/blackfin/lib/strcmp.c +++ /dev/null | |||
| @@ -1,19 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * Provide symbol in case str func is not inlined. | ||
| 3 | * | ||
| 4 | * Copyright (c) 2006-2007 Analog Devices Inc. | ||
| 5 | * | ||
| 6 | * Licensed under the GPL-2 or later. | ||
| 7 | */ | ||
| 8 | |||
| 9 | #define strcmp __inline_strcmp | ||
| 10 | #include <asm/string.h> | ||
| 11 | #undef strcmp | ||
| 12 | |||
| 13 | #include <linux/module.h> | ||
| 14 | |||
| 15 | int strcmp(const char *dest, const char *src) | ||
| 16 | { | ||
| 17 | return __inline_strcmp(dest, src); | ||
| 18 | } | ||
| 19 | EXPORT_SYMBOL(strcmp); | ||
diff --git a/arch/blackfin/lib/strcpy.S b/arch/blackfin/lib/strcpy.S new file mode 100644 index 000000000000..a6a0c6363806 --- /dev/null +++ b/arch/blackfin/lib/strcpy.S | |||
| @@ -0,0 +1,35 @@ | |||
| 1 | /* | ||
| 2 | * Copyright 2005-2010 Analog Devices Inc. | ||
| 3 | * | ||
| 4 | * Licensed under the ADI BSD license or the GPL-2 (or later) | ||
| 5 | */ | ||
| 6 | |||
| 7 | #include <linux/linkage.h> | ||
| 8 | |||
| 9 | /* void *strcpy(char *dest, const char *src); | ||
| 10 | * R0 = address (dest) | ||
| 11 | * R1 = address (src) | ||
| 12 | * | ||
| 13 | * Returns a pointer to the destination string dest | ||
| 14 | */ | ||
| 15 | |||
| 16 | #ifdef CONFIG_STRCPY_L1 | ||
| 17 | .section .l1.text | ||
| 18 | #else | ||
| 19 | .text | ||
| 20 | #endif | ||
| 21 | |||
| 22 | .align 2 | ||
| 23 | |||
| 24 | ENTRY(_strcpy) | ||
| 25 | P0 = R0 ; /* dst*/ | ||
| 26 | P1 = R1 ; /* src*/ | ||
| 27 | |||
| 28 | 1: | ||
| 29 | R1 = B [P1++] (Z); | ||
| 30 | B [P0++] = R1; | ||
| 31 | CC = R1; | ||
| 32 | if cc jump 1b (bp); | ||
| 33 | RTS; | ||
| 34 | |||
| 35 | ENDPROC(_strcpy) | ||
diff --git a/arch/blackfin/lib/strcpy.c b/arch/blackfin/lib/strcpy.c deleted file mode 100644 index 2a8836b1f4d3..000000000000 --- a/arch/blackfin/lib/strcpy.c +++ /dev/null | |||
| @@ -1,19 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * Provide symbol in case str func is not inlined. | ||
| 3 | * | ||
| 4 | * Copyright (c) 2006-2007 Analog Devices Inc. | ||
| 5 | * | ||
| 6 | * Licensed under the GPL-2 or later. | ||
| 7 | */ | ||
| 8 | |||
| 9 | #define strcpy __inline_strcpy | ||
| 10 | #include <asm/string.h> | ||
| 11 | #undef strcpy | ||
| 12 | |||
| 13 | #include <linux/module.h> | ||
| 14 | |||
| 15 | char *strcpy(char *dest, const char *src) | ||
| 16 | { | ||
| 17 | return __inline_strcpy(dest, src); | ||
| 18 | } | ||
| 19 | EXPORT_SYMBOL(strcpy); | ||
diff --git a/arch/blackfin/lib/strncmp.S b/arch/blackfin/lib/strncmp.S new file mode 100644 index 000000000000..6da37c34a847 --- /dev/null +++ b/arch/blackfin/lib/strncmp.S | |||
| @@ -0,0 +1,52 @@ | |||
| 1 | /* | ||
| 2 | * Copyright 2005-2010 Analog Devices Inc. | ||
| 3 | * | ||
| 4 | * Licensed under the ADI BSD license or the GPL-2 (or later) | ||
| 5 | */ | ||
| 6 | |||
| 7 | #include <linux/linkage.h> | ||
| 8 | |||
| 9 | /* void *strncpy(char *s1, const char *s2, size_t n); | ||
| 10 | * R0 = address (dest) | ||
| 11 | * R1 = address (src) | ||
| 12 | * R2 = size (n) | ||
| 13 | * Returns a pointer to the destination string dest | ||
| 14 | */ | ||
| 15 | |||
| 16 | #ifdef CONFIG_STRNCMP_L1 | ||
| 17 | .section .l1.text | ||
| 18 | #else | ||
| 19 | .text | ||
| 20 | #endif | ||
| 21 | |||
| 22 | .align 2 | ||
| 23 | |||
| 24 | ENTRY(_strncmp) | ||
| 25 | CC = R2 == 0; | ||
| 26 | if CC JUMP 5f; | ||
| 27 | |||
| 28 | P0 = R0 ; /* s1 */ | ||
| 29 | P1 = R1 ; /* s2 */ | ||
| 30 | 1: | ||
| 31 | R0 = B[P0++] (Z); /* get *s1 */ | ||
| 32 | R1 = B[P1++] (Z); /* get *s2 */ | ||
| 33 | CC = R0 == R1; /* compare a byte */ | ||
| 34 | if ! cc jump 3f; /* not equal, break out */ | ||
| 35 | CC = R0; /* at end of s1? */ | ||
| 36 | if ! cc jump 4f; /* yes, all done */ | ||
| 37 | R2 += -1; /* no, adjust count */ | ||
| 38 | CC = R2 == 0; | ||
| 39 | if ! cc jump 1b (bp); /* more to do, keep going */ | ||
| 40 | 2: | ||
| 41 | R0 = 0; /* strings are equal */ | ||
| 42 | jump.s 4f; | ||
| 43 | 3: | ||
| 44 | R0 = R0 - R1; /* *s1 - *s2 */ | ||
| 45 | 4: | ||
| 46 | RTS; | ||
| 47 | |||
| 48 | 5: | ||
| 49 | R0 = 0; | ||
| 50 | RTS; | ||
| 51 | |||
| 52 | ENDPROC(_strncmp) | ||
diff --git a/arch/blackfin/lib/strncmp.c b/arch/blackfin/lib/strncmp.c deleted file mode 100644 index 46518b1d2983..000000000000 --- a/arch/blackfin/lib/strncmp.c +++ /dev/null | |||
| @@ -1,18 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * Provide symbol in case str func is not inlined. | ||
| 3 | * | ||
| 4 | * Copyright (c) 2006-2007 Analog Devices Inc. | ||
| 5 | * | ||
| 6 | * Licensed under the GPL-2 or later. | ||
| 7 | */ | ||
| 8 | |||
| 9 | #define strncmp __inline_strncmp | ||
| 10 | #include <asm/string.h> | ||
| 11 | #include <linux/module.h> | ||
| 12 | #undef strncmp | ||
| 13 | |||
| 14 | int strncmp(const char *cs, const char *ct, size_t count) | ||
| 15 | { | ||
| 16 | return __inline_strncmp(cs, ct, count); | ||
| 17 | } | ||
| 18 | EXPORT_SYMBOL(strncmp); | ||
diff --git a/arch/blackfin/lib/strncpy.S b/arch/blackfin/lib/strncpy.S new file mode 100644 index 000000000000..f3931d50b4a7 --- /dev/null +++ b/arch/blackfin/lib/strncpy.S | |||
| @@ -0,0 +1,85 @@ | |||
| 1 | /* | ||
| 2 | * Copyright 2005-2010 Analog Devices Inc. | ||
| 3 | * | ||
| 4 | * Licensed under the ADI BSD license or the GPL-2 (or later) | ||
| 5 | */ | ||
| 6 | |||
| 7 | #include <linux/linkage.h> | ||
| 8 | #include <asm/context.S> | ||
| 9 | |||
| 10 | /* void *strncpy(char *dest, const char *src, size_t n); | ||
| 11 | * R0 = address (dest) | ||
| 12 | * R1 = address (src) | ||
| 13 | * R2 = size | ||
| 14 | * Returns a pointer (R0) to the destination string dest | ||
| 15 | * we do this by not changing R0 | ||
| 16 | */ | ||
| 17 | |||
| 18 | #ifdef CONFIG_STRNCPY_L1 | ||
| 19 | .section .l1.text | ||
| 20 | #else | ||
| 21 | .text | ||
| 22 | #endif | ||
| 23 | |||
| 24 | .align 2 | ||
| 25 | |||
| 26 | ENTRY(_strncpy) | ||
| 27 | CC = R2 == 0; | ||
| 28 | if CC JUMP 4f; | ||
| 29 | |||
| 30 | P2 = R2 ; /* size */ | ||
| 31 | P0 = R0 ; /* dst*/ | ||
| 32 | P1 = R1 ; /* src*/ | ||
| 33 | |||
| 34 | LSETUP (1f, 2f) LC0 = P2; | ||
| 35 | 1: | ||
| 36 | R1 = B [P1++] (Z); | ||
| 37 | B [P0++] = R1; | ||
| 38 | CC = R1 == 0; | ||
| 39 | 2: | ||
| 40 | if CC jump 3f; | ||
| 41 | |||
| 42 | RTS; | ||
| 43 | |||
| 44 | /* if src is shorter than n, we need to null pad bytes in dest | ||
| 45 | * but, we can get here when the last byte is zero, and we don't | ||
| 46 | * want to copy an extra byte at the end, so we need to check | ||
| 47 | */ | ||
| 48 | 3: | ||
| 49 | R2 = LC0; | ||
| 50 | CC = R2 | ||
| 51 | if ! CC jump 6f; | ||
| 52 | |||
| 53 | /* if the required null padded portion is small, do it here, rather than | ||
| 54 | * handling the overhead of memset (which is OK when things are big). | ||
| 55 | */ | ||
| 56 | R3 = 0x20; | ||
| 57 | CC = R2 < R3; | ||
| 58 | IF CC jump 4f; | ||
| 59 | |||
| 60 | R2 += -1; | ||
| 61 | |||
| 62 | /* Set things up for memset | ||
| 63 | * R0 = address | ||
| 64 | * R1 = filler byte (this case it's zero, set above) | ||
| 65 | * R2 = count (set above) | ||
| 66 | */ | ||
| 67 | |||
| 68 | I1 = R0; | ||
| 69 | R0 = RETS; | ||
| 70 | I0 = R0; | ||
| 71 | R0 = P0; | ||
| 72 | pseudo_long_call _memset, p0; | ||
| 73 | R0 = I0; | ||
| 74 | RETS = R0; | ||
| 75 | R0 = I1; | ||
| 76 | RTS; | ||
| 77 | |||
| 78 | 4: | ||
| 79 | LSETUP(5f, 5f) LC0; | ||
| 80 | 5: | ||
| 81 | B [P0++] = R1; | ||
| 82 | 6: | ||
| 83 | RTS; | ||
| 84 | |||
| 85 | ENDPROC(_strncpy) | ||
diff --git a/arch/blackfin/lib/strncpy.c b/arch/blackfin/lib/strncpy.c deleted file mode 100644 index ea1dc6bf2373..000000000000 --- a/arch/blackfin/lib/strncpy.c +++ /dev/null | |||
| @@ -1,19 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * Provide symbol in case str func is not inlined. | ||
| 3 | * | ||
| 4 | * Copyright (c) 2006-2007 Analog Devices Inc. | ||
| 5 | * | ||
| 6 | * Licensed under the GPL-2 or later. | ||
| 7 | */ | ||
| 8 | |||
| 9 | #define strncpy __inline_strncpy | ||
| 10 | #include <asm/string.h> | ||
| 11 | #undef strncpy | ||
| 12 | |||
| 13 | #include <linux/module.h> | ||
| 14 | |||
| 15 | char *strncpy(char *dest, const char *src, size_t n) | ||
| 16 | { | ||
| 17 | return __inline_strncpy(dest, src, n); | ||
| 18 | } | ||
| 19 | EXPORT_SYMBOL(strncpy); | ||
diff --git a/arch/blackfin/mach-bf527/boards/cm_bf527.c b/arch/blackfin/mach-bf527/boards/cm_bf527.c index ebe76d1e874a..f392af641657 100644 --- a/arch/blackfin/mach-bf527/boards/cm_bf527.c +++ b/arch/blackfin/mach-bf527/boards/cm_bf527.c | |||
| @@ -98,6 +98,10 @@ static struct musb_hdrc_config musb_config = { | |||
| 98 | .num_eps = 8, | 98 | .num_eps = 8, |
| 99 | .dma_channels = 8, | 99 | .dma_channels = 8, |
| 100 | .gpio_vrsel = GPIO_PF11, | 100 | .gpio_vrsel = GPIO_PF11, |
| 101 | /* Some custom boards need to be active low, just set it to "0" | ||
| 102 | * if it is the case. | ||
| 103 | */ | ||
| 104 | .gpio_vrsel_active = 1, | ||
| 101 | }; | 105 | }; |
| 102 | 106 | ||
| 103 | static struct musb_hdrc_platform_data musb_plat = { | 107 | static struct musb_hdrc_platform_data musb_plat = { |
diff --git a/arch/blackfin/mach-bf527/boards/ezbrd.c b/arch/blackfin/mach-bf527/boards/ezbrd.c index 55069af4f67d..606eb36b9d6e 100644 --- a/arch/blackfin/mach-bf527/boards/ezbrd.c +++ b/arch/blackfin/mach-bf527/boards/ezbrd.c | |||
| @@ -62,6 +62,10 @@ static struct musb_hdrc_config musb_config = { | |||
| 62 | .num_eps = 8, | 62 | .num_eps = 8, |
| 63 | .dma_channels = 8, | 63 | .dma_channels = 8, |
| 64 | .gpio_vrsel = GPIO_PG13, | 64 | .gpio_vrsel = GPIO_PG13, |
| 65 | /* Some custom boards need to be active low, just set it to "0" | ||
| 66 | * if it is the case. | ||
| 67 | */ | ||
| 68 | .gpio_vrsel_active = 1, | ||
| 65 | }; | 69 | }; |
| 66 | 70 | ||
| 67 | static struct musb_hdrc_platform_data musb_plat = { | 71 | static struct musb_hdrc_platform_data musb_plat = { |
diff --git a/arch/blackfin/mach-bf527/boards/ezkit.c b/arch/blackfin/mach-bf527/boards/ezkit.c index 923383386aa1..a05c967a24cf 100644 --- a/arch/blackfin/mach-bf527/boards/ezkit.c +++ b/arch/blackfin/mach-bf527/boards/ezkit.c | |||
| @@ -102,6 +102,10 @@ static struct musb_hdrc_config musb_config = { | |||
| 102 | .num_eps = 8, | 102 | .num_eps = 8, |
| 103 | .dma_channels = 8, | 103 | .dma_channels = 8, |
| 104 | .gpio_vrsel = GPIO_PG13, | 104 | .gpio_vrsel = GPIO_PG13, |
| 105 | /* Some custom boards need to be active low, just set it to "0" | ||
| 106 | * if it is the case. | ||
| 107 | */ | ||
| 108 | .gpio_vrsel_active = 1, | ||
| 105 | }; | 109 | }; |
| 106 | 110 | ||
| 107 | static struct musb_hdrc_platform_data musb_plat = { | 111 | static struct musb_hdrc_platform_data musb_plat = { |
diff --git a/arch/blackfin/mach-bf537/boards/minotaur.c b/arch/blackfin/mach-bf537/boards/minotaur.c index c489d602c590..05d45994480e 100644 --- a/arch/blackfin/mach-bf537/boards/minotaur.c +++ b/arch/blackfin/mach-bf537/boards/minotaur.c | |||
| @@ -23,12 +23,13 @@ | |||
| 23 | #include <asm/dma.h> | 23 | #include <asm/dma.h> |
| 24 | #include <asm/bfin5xx_spi.h> | 24 | #include <asm/bfin5xx_spi.h> |
| 25 | #include <asm/reboot.h> | 25 | #include <asm/reboot.h> |
| 26 | #include <asm/portmux.h> | ||
| 26 | #include <linux/spi/ad7877.h> | 27 | #include <linux/spi/ad7877.h> |
| 27 | 28 | ||
| 28 | /* | 29 | /* |
| 29 | * Name the Board for the /proc/cpuinfo | 30 | * Name the Board for the /proc/cpuinfo |
| 30 | */ | 31 | */ |
| 31 | char *bfin_board_name = "CamSig Minotaur BF537"; | 32 | const char bfin_board_name[] = "CamSig Minotaur BF537"; |
| 32 | 33 | ||
| 33 | #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) | 34 | #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) |
| 34 | static struct resource bfin_pcmcia_cf_resources[] = { | 35 | static struct resource bfin_pcmcia_cf_resources[] = { |
diff --git a/arch/blackfin/mach-bf537/include/mach/defBF534.h b/arch/blackfin/mach-bf537/include/mach/defBF534.h index 066d5c261f47..cf396ea40092 100644 --- a/arch/blackfin/mach-bf537/include/mach/defBF534.h +++ b/arch/blackfin/mach-bf537/include/mach/defBF534.h | |||
| @@ -1702,628 +1702,6 @@ | |||
| 1702 | #define RCV_HALF 0x0004 /* Receive FIFO Has 1 Byte To Read */ | 1702 | #define RCV_HALF 0x0004 /* Receive FIFO Has 1 Byte To Read */ |
| 1703 | #define RCV_FULL 0x000C /* Receive FIFO Full (2 Bytes To Read) */ | 1703 | #define RCV_FULL 0x000C /* Receive FIFO Full (2 Bytes To Read) */ |
| 1704 | 1704 | ||
| 1705 | /* ************ CONTROLLER AREA NETWORK (CAN) MASKS ***************/ | ||
| 1706 | /* CAN_CONTROL Masks */ | ||
| 1707 | #define SRS 0x0001 /* Software Reset */ | ||
| 1708 | #define DNM 0x0002 /* Device Net Mode */ | ||
| 1709 | #define ABO 0x0004 /* Auto-Bus On Enable */ | ||
| 1710 | #define TXPRIO 0x0008 /* TX Priority (Priority/Mailbox*) */ | ||
| 1711 | #define WBA 0x0010 /* Wake-Up On CAN Bus Activity Enable */ | ||
| 1712 | #define SMR 0x0020 /* Sleep Mode Request */ | ||
| 1713 | #define CSR 0x0040 /* CAN Suspend Mode Request */ | ||
| 1714 | #define CCR 0x0080 /* CAN Configuration Mode Request */ | ||
| 1715 | |||
| 1716 | /* CAN_STATUS Masks */ | ||
| 1717 | #define WT 0x0001 /* TX Warning Flag */ | ||
| 1718 | #define WR 0x0002 /* RX Warning Flag */ | ||
| 1719 | #define EP 0x0004 /* Error Passive Mode */ | ||
| 1720 | #define EBO 0x0008 /* Error Bus Off Mode */ | ||
| 1721 | #define SMA 0x0020 /* Sleep Mode Acknowledge */ | ||
| 1722 | #define CSA 0x0040 /* Suspend Mode Acknowledge */ | ||
| 1723 | #define CCA 0x0080 /* Configuration Mode Acknowledge */ | ||
| 1724 | #define MBPTR 0x1F00 /* Mailbox Pointer */ | ||
| 1725 | #define TRM 0x4000 /* Transmit Mode */ | ||
| 1726 | #define REC 0x8000 /* Receive Mode */ | ||
| 1727 | |||
| 1728 | /* CAN_CLOCK Masks */ | ||
| 1729 | #define BRP 0x03FF /* Bit-Rate Pre-Scaler */ | ||
| 1730 | |||
| 1731 | /* CAN_TIMING Masks */ | ||
| 1732 | #define TSEG1 0x000F /* Time Segment 1 */ | ||
| 1733 | #define TSEG2 0x0070 /* Time Segment 2 */ | ||
| 1734 | #define SAM 0x0080 /* Sampling */ | ||
| 1735 | #define SJW 0x0300 /* Synchronization Jump Width */ | ||
| 1736 | |||
| 1737 | /* CAN_DEBUG Masks */ | ||
| 1738 | #define DEC 0x0001 /* Disable CAN Error Counters */ | ||
| 1739 | #define DRI 0x0002 /* Disable CAN RX Input */ | ||
| 1740 | #define DTO 0x0004 /* Disable CAN TX Output */ | ||
| 1741 | #define DIL 0x0008 /* Disable CAN Internal Loop */ | ||
| 1742 | #define MAA 0x0010 /* Mode Auto-Acknowledge Enable */ | ||
| 1743 | #define MRB 0x0020 /* Mode Read Back Enable */ | ||
| 1744 | #define CDE 0x8000 /* CAN Debug Enable */ | ||
| 1745 | |||
| 1746 | /* CAN_CEC Masks */ | ||
| 1747 | #define RXECNT 0x00FF /* Receive Error Counter */ | ||
| 1748 | #define TXECNT 0xFF00 /* Transmit Error Counter */ | ||
| 1749 | |||
| 1750 | /* CAN_INTR Masks */ | ||
| 1751 | #define MBRIRQ 0x0001 /* Mailbox Receive Interrupt */ | ||
| 1752 | #define MBRIF MBRIRQ /* legacy */ | ||
| 1753 | #define MBTIRQ 0x0002 /* Mailbox Transmit Interrupt */ | ||
| 1754 | #define MBTIF MBTIRQ /* legacy */ | ||
| 1755 | #define GIRQ 0x0004 /* Global Interrupt */ | ||
| 1756 | #define SMACK 0x0008 /* Sleep Mode Acknowledge */ | ||
| 1757 | #define CANTX 0x0040 /* CAN TX Bus Value */ | ||
| 1758 | #define CANRX 0x0080 /* CAN RX Bus Value */ | ||
| 1759 | |||
| 1760 | /* CAN_MBxx_ID1 and CAN_MBxx_ID0 Masks */ | ||
| 1761 | #define DFC 0xFFFF /* Data Filtering Code (If Enabled) (ID0) */ | ||
| 1762 | #define EXTID_LO 0xFFFF /* Lower 16 Bits of Extended Identifier (ID0) */ | ||
| 1763 | #define EXTID_HI 0x0003 /* Upper 2 Bits of Extended Identifier (ID1) */ | ||
| 1764 | #define BASEID 0x1FFC /* Base Identifier */ | ||
| 1765 | #define IDE 0x2000 /* Identifier Extension */ | ||
| 1766 | #define RTR 0x4000 /* Remote Frame Transmission Request */ | ||
| 1767 | #define AME 0x8000 /* Acceptance Mask Enable */ | ||
| 1768 | |||
| 1769 | /* CAN_MBxx_TIMESTAMP Masks */ | ||
| 1770 | #define TSV 0xFFFF /* Timestamp */ | ||
| 1771 | |||
| 1772 | /* CAN_MBxx_LENGTH Masks */ | ||
| 1773 | #define DLC 0x000F /* Data Length Code */ | ||
| 1774 | |||
| 1775 | /* CAN_AMxxH and CAN_AMxxL Masks */ | ||
| 1776 | #define DFM 0xFFFF /* Data Field Mask (If Enabled) (CAN_AMxxL) */ | ||
| 1777 | #define EXTID_LO 0xFFFF /* Lower 16 Bits of Extended Identifier (CAN_AMxxL) */ | ||
| 1778 | #define EXTID_HI 0x0003 /* Upper 2 Bits of Extended Identifier (CAN_AMxxH) */ | ||
| 1779 | #define BASEID 0x1FFC /* Base Identifier */ | ||
| 1780 | #define AMIDE 0x2000 /* Acceptance Mask ID Extension Enable */ | ||
| 1781 | #define FMD 0x4000 /* Full Mask Data Field Enable */ | ||
| 1782 | #define FDF 0x8000 /* Filter On Data Field Enable */ | ||
| 1783 | |||
| 1784 | /* CAN_MC1 Masks */ | ||
| 1785 | #define MC0 0x0001 /* Enable Mailbox 0 */ | ||
| 1786 | #define MC1 0x0002 /* Enable Mailbox 1 */ | ||
| 1787 | #define MC2 0x0004 /* Enable Mailbox 2 */ | ||
| 1788 | #define MC3 0x0008 /* Enable Mailbox 3 */ | ||
| 1789 | #define MC4 0x0010 /* Enable Mailbox 4 */ | ||
| 1790 | #define MC5 0x0020 /* Enable Mailbox 5 */ | ||
| 1791 | #define MC6 0x0040 /* Enable Mailbox 6 */ | ||
| 1792 | #define MC7 0x0080 /* Enable Mailbox 7 */ | ||
| 1793 | #define MC8 0x0100 /* Enable Mailbox 8 */ | ||
| 1794 | #define MC9 0x0200 /* Enable Mailbox 9 */ | ||
| 1795 | #define MC10 0x0400 /* Enable Mailbox 10 */ | ||
| 1796 | #define MC11 0x0800 /* Enable Mailbox 11 */ | ||
| 1797 | #define MC12 0x1000 /* Enable Mailbox 12 */ | ||
| 1798 | #define MC13 0x2000 /* Enable Mailbox 13 */ | ||
| 1799 | #define MC14 0x4000 /* Enable Mailbox 14 */ | ||
| 1800 | #define MC15 0x8000 /* Enable Mailbox 15 */ | ||
| 1801 | |||
| 1802 | /* CAN_MC2 Masks */ | ||
| 1803 | #define MC16 0x0001 /* Enable Mailbox 16 */ | ||
| 1804 | #define MC17 0x0002 /* Enable Mailbox 17 */ | ||
| 1805 | #define MC18 0x0004 /* Enable Mailbox 18 */ | ||
| 1806 | #define MC19 0x0008 /* Enable Mailbox 19 */ | ||
| 1807 | #define MC20 0x0010 /* Enable Mailbox 20 */ | ||
| 1808 | #define MC21 0x0020 /* Enable Mailbox 21 */ | ||
| 1809 | #define MC22 0x0040 /* Enable Mailbox 22 */ | ||
| 1810 | #define MC23 0x0080 /* Enable Mailbox 23 */ | ||
| 1811 | #define MC24 0x0100 /* Enable Mailbox 24 */ | ||
| 1812 | #define MC25 0x0200 /* Enable Mailbox 25 */ | ||
| 1813 | #define MC26 0x0400 /* Enable Mailbox 26 */ | ||
| 1814 | #define MC27 0x0800 /* Enable Mailbox 27 */ | ||
| 1815 | #define MC28 0x1000 /* Enable Mailbox 28 */ | ||
| 1816 | #define MC29 0x2000 /* Enable Mailbox 29 */ | ||
| 1817 | #define MC30 0x4000 /* Enable Mailbox 30 */ | ||
| 1818 | #define MC31 0x8000 /* Enable Mailbox 31 */ | ||
| 1819 | |||
| 1820 | /* CAN_MD1 Masks */ | ||
| 1821 | #define MD0 0x0001 /* Enable Mailbox 0 For Receive */ | ||
| 1822 | #define MD1 0x0002 /* Enable Mailbox 1 For Receive */ | ||
| 1823 | #define MD2 0x0004 /* Enable Mailbox 2 For Receive */ | ||
| 1824 | #define MD3 0x0008 /* Enable Mailbox 3 For Receive */ | ||
| 1825 | #define MD4 0x0010 /* Enable Mailbox 4 For Receive */ | ||
| 1826 | #define MD5 0x0020 /* Enable Mailbox 5 For Receive */ | ||
| 1827 | #define MD6 0x0040 /* Enable Mailbox 6 For Receive */ | ||
| 1828 | #define MD7 0x0080 /* Enable Mailbox 7 For Receive */ | ||
| 1829 | #define MD8 0x0100 /* Enable Mailbox 8 For Receive */ | ||
| 1830 | #define MD9 0x0200 /* Enable Mailbox 9 For Receive */ | ||
| 1831 | #define MD10 0x0400 /* Enable Mailbox 10 For Receive */ | ||
| 1832 | #define MD11 0x0800 /* Enable Mailbox 11 For Receive */ | ||
| 1833 | #define MD12 0x1000 /* Enable Mailbox 12 For Receive */ | ||
| 1834 | #define MD13 0x2000 /* Enable Mailbox 13 For Receive */ | ||
| 1835 | #define MD14 0x4000 /* Enable Mailbox 14 For Receive */ | ||
| 1836 | #define MD15 0x8000 /* Enable Mailbox 15 For Receive */ | ||
| 1837 | |||
| 1838 | /* CAN_MD2 Masks */ | ||
| 1839 | #define MD16 0x0001 /* Enable Mailbox 16 For Receive */ | ||
| 1840 | #define MD17 0x0002 /* Enable Mailbox 17 For Receive */ | ||
| 1841 | #define MD18 0x0004 /* Enable Mailbox 18 For Receive */ | ||
| 1842 | #define MD19 0x0008 /* Enable Mailbox 19 For Receive */ | ||
| 1843 | #define MD20 0x0010 /* Enable Mailbox 20 For Receive */ | ||
| 1844 | #define MD21 0x0020 /* Enable Mailbox 21 For Receive */ | ||
| 1845 | #define MD22 0x0040 /* Enable Mailbox 22 For Receive */ | ||
| 1846 | #define MD23 0x0080 /* Enable Mailbox 23 For Receive */ | ||
| 1847 | #define MD24 0x0100 /* Enable Mailbox 24 For Receive */ | ||
| 1848 | #define MD25 0x0200 /* Enable Mailbox 25 For Receive */ | ||
| 1849 | #define MD26 0x0400 /* Enable Mailbox 26 For Receive */ | ||
| 1850 | #define MD27 0x0800 /* Enable Mailbox 27 For Receive */ | ||
| 1851 | #define MD28 0x1000 /* Enable Mailbox 28 For Receive */ | ||
| 1852 | #define MD29 0x2000 /* Enable Mailbox 29 For Receive */ | ||
| 1853 | #define MD30 0x4000 /* Enable Mailbox 30 For Receive */ | ||
| 1854 | #define MD31 0x8000 /* Enable Mailbox 31 For Receive */ | ||
| 1855 | |||
| 1856 | /* CAN_RMP1 Masks */ | ||
| 1857 | #define RMP0 0x0001 /* RX Message Pending In Mailbox 0 */ | ||
| 1858 | #define RMP1 0x0002 /* RX Message Pending In Mailbox 1 */ | ||
| 1859 | #define RMP2 0x0004 /* RX Message Pending In Mailbox 2 */ | ||
| 1860 | #define RMP3 0x0008 /* RX Message Pending In Mailbox 3 */ | ||
| 1861 | #define RMP4 0x0010 /* RX Message Pending In Mailbox 4 */ | ||
| 1862 | #define RMP5 0x0020 /* RX Message Pending In Mailbox 5 */ | ||
| 1863 | #define RMP6 0x0040 /* RX Message Pending In Mailbox 6 */ | ||
| 1864 | #define RMP7 0x0080 /* RX Message Pending In Mailbox 7 */ | ||
| 1865 | #define RMP8 0x0100 /* RX Message Pending In Mailbox 8 */ | ||
| 1866 | #define RMP9 0x0200 /* RX Message Pending In Mailbox 9 */ | ||
| 1867 | #define RMP10 0x0400 /* RX Message Pending In Mailbox 10 */ | ||
| 1868 | #define RMP11 0x0800 /* RX Message Pending In Mailbox 11 */ | ||
| 1869 | #define RMP12 0x1000 /* RX Message Pending In Mailbox 12 */ | ||
| 1870 | #define RMP13 0x2000 /* RX Message Pending In Mailbox 13 */ | ||
| 1871 | #define RMP14 0x4000 /* RX Message Pending In Mailbox 14 */ | ||
| 1872 | #define RMP15 0x8000 /* RX Message Pending In Mailbox 15 */ | ||
| 1873 | |||
| 1874 | /* CAN_RMP2 Masks */ | ||
| 1875 | #define RMP16 0x0001 /* RX Message Pending In Mailbox 16 */ | ||
| 1876 | #define RMP17 0x0002 /* RX Message Pending In Mailbox 17 */ | ||
| 1877 | #define RMP18 0x0004 /* RX Message Pending In Mailbox 18 */ | ||
| 1878 | #define RMP19 0x0008 /* RX Message Pending In Mailbox 19 */ | ||
| 1879 | #define RMP20 0x0010 /* RX Message Pending In Mailbox 20 */ | ||
| 1880 | #define RMP21 0x0020 /* RX Message Pending In Mailbox 21 */ | ||
| 1881 | #define RMP22 0x0040 /* RX Message Pending In Mailbox 22 */ | ||
| 1882 | #define RMP23 0x0080 /* RX Message Pending In Mailbox 23 */ | ||
| 1883 | #define RMP24 0x0100 /* RX Message Pending In Mailbox 24 */ | ||
| 1884 | #define RMP25 0x0200 /* RX Message Pending In Mailbox 25 */ | ||
| 1885 | #define RMP26 0x0400 /* RX Message Pending In Mailbox 26 */ | ||
| 1886 | #define RMP27 0x0800 /* RX Message Pending In Mailbox 27 */ | ||
| 1887 | #define RMP28 0x1000 /* RX Message Pending In Mailbox 28 */ | ||
| 1888 | #define RMP29 0x2000 /* RX Message Pending In Mailbox 29 */ | ||
| 1889 | #define RMP30 0x4000 /* RX Message Pending In Mailbox 30 */ | ||
| 1890 | #define RMP31 0x8000 /* RX Message Pending In Mailbox 31 */ | ||
| 1891 | |||
| 1892 | /* CAN_RML1 Masks */ | ||
| 1893 | #define RML0 0x0001 /* RX Message Lost In Mailbox 0 */ | ||
| 1894 | #define RML1 0x0002 /* RX Message Lost In Mailbox 1 */ | ||
| 1895 | #define RML2 0x0004 /* RX Message Lost In Mailbox 2 */ | ||
| 1896 | #define RML3 0x0008 /* RX Message Lost In Mailbox 3 */ | ||
| 1897 | #define RML4 0x0010 /* RX Message Lost In Mailbox 4 */ | ||
| 1898 | #define RML5 0x0020 /* RX Message Lost In Mailbox 5 */ | ||
| 1899 | #define RML6 0x0040 /* RX Message Lost In Mailbox 6 */ | ||
| 1900 | #define RML7 0x0080 /* RX Message Lost In Mailbox 7 */ | ||
| 1901 | #define RML8 0x0100 /* RX Message Lost In Mailbox 8 */ | ||
| 1902 | #define RML9 0x0200 /* RX Message Lost In Mailbox 9 */ | ||
| 1903 | #define RML10 0x0400 /* RX Message Lost In Mailbox 10 */ | ||
| 1904 | #define RML11 0x0800 /* RX Message Lost In Mailbox 11 */ | ||
| 1905 | #define RML12 0x1000 /* RX Message Lost In Mailbox 12 */ | ||
| 1906 | #define RML13 0x2000 /* RX Message Lost In Mailbox 13 */ | ||
| 1907 | #define RML14 0x4000 /* RX Message Lost In Mailbox 14 */ | ||
| 1908 | #define RML15 0x8000 /* RX Message Lost In Mailbox 15 */ | ||
| 1909 | |||
| 1910 | /* CAN_RML2 Masks */ | ||
| 1911 | #define RML16 0x0001 /* RX Message Lost In Mailbox 16 */ | ||
| 1912 | #define RML17 0x0002 /* RX Message Lost In Mailbox 17 */ | ||
| 1913 | #define RML18 0x0004 /* RX Message Lost In Mailbox 18 */ | ||
| 1914 | #define RML19 0x0008 /* RX Message Lost In Mailbox 19 */ | ||
| 1915 | #define RML20 0x0010 /* RX Message Lost In Mailbox 20 */ | ||
| 1916 | #define RML21 0x0020 /* RX Message Lost In Mailbox 21 */ | ||
| 1917 | #define RML22 0x0040 /* RX Message Lost In Mailbox 22 */ | ||
| 1918 | #define RML23 0x0080 /* RX Message Lost In Mailbox 23 */ | ||
| 1919 | #define RML24 0x0100 /* RX Message Lost In Mailbox 24 */ | ||
| 1920 | #define RML25 0x0200 /* RX Message Lost In Mailbox 25 */ | ||
| 1921 | #define RML26 0x0400 /* RX Message Lost In Mailbox 26 */ | ||
| 1922 | #define RML27 0x0800 /* RX Message Lost In Mailbox 27 */ | ||
| 1923 | #define RML28 0x1000 /* RX Message Lost In Mailbox 28 */ | ||
| 1924 | #define RML29 0x2000 /* RX Message Lost In Mailbox 29 */ | ||
| 1925 | #define RML30 0x4000 /* RX Message Lost In Mailbox 30 */ | ||
| 1926 | #define RML31 0x8000 /* RX Message Lost In Mailbox 31 */ | ||
| 1927 | |||
| 1928 | /* CAN_OPSS1 Masks */ | ||
| 1929 | #define OPSS0 0x0001 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 0 */ | ||
| 1930 | #define OPSS1 0x0002 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 1 */ | ||
| 1931 | #define OPSS2 0x0004 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 2 */ | ||
| 1932 | #define OPSS3 0x0008 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 3 */ | ||
| 1933 | #define OPSS4 0x0010 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 4 */ | ||
| 1934 | #define OPSS5 0x0020 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 5 */ | ||
| 1935 | #define OPSS6 0x0040 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 6 */ | ||
| 1936 | #define OPSS7 0x0080 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 7 */ | ||
| 1937 | #define OPSS8 0x0100 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 8 */ | ||
| 1938 | #define OPSS9 0x0200 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 9 */ | ||
| 1939 | #define OPSS10 0x0400 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 10 */ | ||
| 1940 | #define OPSS11 0x0800 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 11 */ | ||
| 1941 | #define OPSS12 0x1000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 12 */ | ||
| 1942 | #define OPSS13 0x2000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 13 */ | ||
| 1943 | #define OPSS14 0x4000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 14 */ | ||
| 1944 | #define OPSS15 0x8000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 15 */ | ||
| 1945 | |||
| 1946 | /* CAN_OPSS2 Masks */ | ||
| 1947 | #define OPSS16 0x0001 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 16 */ | ||
| 1948 | #define OPSS17 0x0002 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 17 */ | ||
| 1949 | #define OPSS18 0x0004 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 18 */ | ||
| 1950 | #define OPSS19 0x0008 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 19 */ | ||
| 1951 | #define OPSS20 0x0010 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 20 */ | ||
| 1952 | #define OPSS21 0x0020 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 21 */ | ||
| 1953 | #define OPSS22 0x0040 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 22 */ | ||
| 1954 | #define OPSS23 0x0080 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 23 */ | ||
| 1955 | #define OPSS24 0x0100 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 24 */ | ||
| 1956 | #define OPSS25 0x0200 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 25 */ | ||
| 1957 | #define OPSS26 0x0400 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 26 */ | ||
| 1958 | #define OPSS27 0x0800 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 27 */ | ||
| 1959 | #define OPSS28 0x1000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 28 */ | ||
| 1960 | #define OPSS29 0x2000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 29 */ | ||
| 1961 | #define OPSS30 0x4000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 30 */ | ||
| 1962 | #define OPSS31 0x8000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 31 */ | ||
| 1963 | |||
| 1964 | /* CAN_TRR1 Masks */ | ||
| 1965 | #define TRR0 0x0001 /* Deny But Don't Lock Access To Mailbox 0 */ | ||
| 1966 | #define TRR1 0x0002 /* Deny But Don't Lock Access To Mailbox 1 */ | ||
| 1967 | #define TRR2 0x0004 /* Deny But Don't Lock Access To Mailbox 2 */ | ||
| 1968 | #define TRR3 0x0008 /* Deny But Don't Lock Access To Mailbox 3 */ | ||
| 1969 | #define TRR4 0x0010 /* Deny But Don't Lock Access To Mailbox 4 */ | ||
| 1970 | #define TRR5 0x0020 /* Deny But Don't Lock Access To Mailbox 5 */ | ||
| 1971 | #define TRR6 0x0040 /* Deny But Don't Lock Access To Mailbox 6 */ | ||
| 1972 | #define TRR7 0x0080 /* Deny But Don't Lock Access To Mailbox 7 */ | ||
| 1973 | #define TRR8 0x0100 /* Deny But Don't Lock Access To Mailbox 8 */ | ||
| 1974 | #define TRR9 0x0200 /* Deny But Don't Lock Access To Mailbox 9 */ | ||
| 1975 | #define TRR10 0x0400 /* Deny But Don't Lock Access To Mailbox 10 */ | ||
| 1976 | #define TRR11 0x0800 /* Deny But Don't Lock Access To Mailbox 11 */ | ||
| 1977 | #define TRR12 0x1000 /* Deny But Don't Lock Access To Mailbox 12 */ | ||
| 1978 | #define TRR13 0x2000 /* Deny But Don't Lock Access To Mailbox 13 */ | ||
| 1979 | #define TRR14 0x4000 /* Deny But Don't Lock Access To Mailbox 14 */ | ||
| 1980 | #define TRR15 0x8000 /* Deny But Don't Lock Access To Mailbox 15 */ | ||
| 1981 | |||
| 1982 | /* CAN_TRR2 Masks */ | ||
| 1983 | #define TRR16 0x0001 /* Deny But Don't Lock Access To Mailbox 16 */ | ||
| 1984 | #define TRR17 0x0002 /* Deny But Don't Lock Access To Mailbox 17 */ | ||
| 1985 | #define TRR18 0x0004 /* Deny But Don't Lock Access To Mailbox 18 */ | ||
| 1986 | #define TRR19 0x0008 /* Deny But Don't Lock Access To Mailbox 19 */ | ||
| 1987 | #define TRR20 0x0010 /* Deny But Don't Lock Access To Mailbox 20 */ | ||
| 1988 | #define TRR21 0x0020 /* Deny But Don't Lock Access To Mailbox 21 */ | ||
| 1989 | #define TRR22 0x0040 /* Deny But Don't Lock Access To Mailbox 22 */ | ||
| 1990 | #define TRR23 0x0080 /* Deny But Don't Lock Access To Mailbox 23 */ | ||
| 1991 | #define TRR24 0x0100 /* Deny But Don't Lock Access To Mailbox 24 */ | ||
| 1992 | #define TRR25 0x0200 /* Deny But Don't Lock Access To Mailbox 25 */ | ||
| 1993 | #define TRR26 0x0400 /* Deny But Don't Lock Access To Mailbox 26 */ | ||
| 1994 | #define TRR27 0x0800 /* Deny But Don't Lock Access To Mailbox 27 */ | ||
| 1995 | #define TRR28 0x1000 /* Deny But Don't Lock Access To Mailbox 28 */ | ||
| 1996 | #define TRR29 0x2000 /* Deny But Don't Lock Access To Mailbox 29 */ | ||
| 1997 | #define TRR30 0x4000 /* Deny But Don't Lock Access To Mailbox 30 */ | ||
| 1998 | #define TRR31 0x8000 /* Deny But Don't Lock Access To Mailbox 31 */ | ||
| 1999 | |||
| 2000 | /* CAN_TRS1 Masks */ | ||
| 2001 | #define TRS0 0x0001 /* Remote Frame Request For Mailbox 0 */ | ||
| 2002 | #define TRS1 0x0002 /* Remote Frame Request For Mailbox 1 */ | ||
| 2003 | #define TRS2 0x0004 /* Remote Frame Request For Mailbox 2 */ | ||
| 2004 | #define TRS3 0x0008 /* Remote Frame Request For Mailbox 3 */ | ||
| 2005 | #define TRS4 0x0010 /* Remote Frame Request For Mailbox 4 */ | ||
| 2006 | #define TRS5 0x0020 /* Remote Frame Request For Mailbox 5 */ | ||
| 2007 | #define TRS6 0x0040 /* Remote Frame Request For Mailbox 6 */ | ||
| 2008 | #define TRS7 0x0080 /* Remote Frame Request For Mailbox 7 */ | ||
| 2009 | #define TRS8 0x0100 /* Remote Frame Request For Mailbox 8 */ | ||
| 2010 | #define TRS9 0x0200 /* Remote Frame Request For Mailbox 9 */ | ||
| 2011 | #define TRS10 0x0400 /* Remote Frame Request For Mailbox 10 */ | ||
| 2012 | #define TRS11 0x0800 /* Remote Frame Request For Mailbox 11 */ | ||
| 2013 | #define TRS12 0x1000 /* Remote Frame Request For Mailbox 12 */ | ||
| 2014 | #define TRS13 0x2000 /* Remote Frame Request For Mailbox 13 */ | ||
| 2015 | #define TRS14 0x4000 /* Remote Frame Request For Mailbox 14 */ | ||
| 2016 | #define TRS15 0x8000 /* Remote Frame Request For Mailbox 15 */ | ||
| 2017 | |||
| 2018 | /* CAN_TRS2 Masks */ | ||
| 2019 | #define TRS16 0x0001 /* Remote Frame Request For Mailbox 16 */ | ||
| 2020 | #define TRS17 0x0002 /* Remote Frame Request For Mailbox 17 */ | ||
| 2021 | #define TRS18 0x0004 /* Remote Frame Request For Mailbox 18 */ | ||
| 2022 | #define TRS19 0x0008 /* Remote Frame Request For Mailbox 19 */ | ||
| 2023 | #define TRS20 0x0010 /* Remote Frame Request For Mailbox 20 */ | ||
| 2024 | #define TRS21 0x0020 /* Remote Frame Request For Mailbox 21 */ | ||
| 2025 | #define TRS22 0x0040 /* Remote Frame Request For Mailbox 22 */ | ||
| 2026 | #define TRS23 0x0080 /* Remote Frame Request For Mailbox 23 */ | ||
| 2027 | #define TRS24 0x0100 /* Remote Frame Request For Mailbox 24 */ | ||
| 2028 | #define TRS25 0x0200 /* Remote Frame Request For Mailbox 25 */ | ||
| 2029 | #define TRS26 0x0400 /* Remote Frame Request For Mailbox 26 */ | ||
| 2030 | #define TRS27 0x0800 /* Remote Frame Request For Mailbox 27 */ | ||
| 2031 | #define TRS28 0x1000 /* Remote Frame Request For Mailbox 28 */ | ||
| 2032 | #define TRS29 0x2000 /* Remote Frame Request For Mailbox 29 */ | ||
| 2033 | #define TRS30 0x4000 /* Remote Frame Request For Mailbox 30 */ | ||
| 2034 | #define TRS31 0x8000 /* Remote Frame Request For Mailbox 31 */ | ||
| 2035 | |||
| 2036 | /* CAN_AA1 Masks */ | ||
| 2037 | #define AA0 0x0001 /* Aborted Message In Mailbox 0 */ | ||
| 2038 | #define AA1 0x0002 /* Aborted Message In Mailbox 1 */ | ||
| 2039 | #define AA2 0x0004 /* Aborted Message In Mailbox 2 */ | ||
| 2040 | #define AA3 0x0008 /* Aborted Message In Mailbox 3 */ | ||
| 2041 | #define AA4 0x0010 /* Aborted Message In Mailbox 4 */ | ||
| 2042 | #define AA5 0x0020 /* Aborted Message In Mailbox 5 */ | ||
| 2043 | #define AA6 0x0040 /* Aborted Message In Mailbox 6 */ | ||
| 2044 | #define AA7 0x0080 /* Aborted Message In Mailbox 7 */ | ||
| 2045 | #define AA8 0x0100 /* Aborted Message In Mailbox 8 */ | ||
| 2046 | #define AA9 0x0200 /* Aborted Message In Mailbox 9 */ | ||
| 2047 | #define AA10 0x0400 /* Aborted Message In Mailbox 10 */ | ||
| 2048 | #define AA11 0x0800 /* Aborted Message In Mailbox 11 */ | ||
| 2049 | #define AA12 0x1000 /* Aborted Message In Mailbox 12 */ | ||
| 2050 | #define AA13 0x2000 /* Aborted Message In Mailbox 13 */ | ||
| 2051 | #define AA14 0x4000 /* Aborted Message In Mailbox 14 */ | ||
| 2052 | #define AA15 0x8000 /* Aborted Message In Mailbox 15 */ | ||
| 2053 | |||
| 2054 | /* CAN_AA2 Masks */ | ||
| 2055 | #define AA16 0x0001 /* Aborted Message In Mailbox 16 */ | ||
| 2056 | #define AA17 0x0002 /* Aborted Message In Mailbox 17 */ | ||
| 2057 | #define AA18 0x0004 /* Aborted Message In Mailbox 18 */ | ||
| 2058 | #define AA19 0x0008 /* Aborted Message In Mailbox 19 */ | ||
| 2059 | #define AA20 0x0010 /* Aborted Message In Mailbox 20 */ | ||
| 2060 | #define AA21 0x0020 /* Aborted Message In Mailbox 21 */ | ||
| 2061 | #define AA22 0x0040 /* Aborted Message In Mailbox 22 */ | ||
| 2062 | #define AA23 0x0080 /* Aborted Message In Mailbox 23 */ | ||
| 2063 | #define AA24 0x0100 /* Aborted Message In Mailbox 24 */ | ||
| 2064 | #define AA25 0x0200 /* Aborted Message In Mailbox 25 */ | ||
| 2065 | #define AA26 0x0400 /* Aborted Message In Mailbox 26 */ | ||
| 2066 | #define AA27 0x0800 /* Aborted Message In Mailbox 27 */ | ||
| 2067 | #define AA28 0x1000 /* Aborted Message In Mailbox 28 */ | ||
| 2068 | #define AA29 0x2000 /* Aborted Message In Mailbox 29 */ | ||
| 2069 | #define AA30 0x4000 /* Aborted Message In Mailbox 30 */ | ||
| 2070 | #define AA31 0x8000 /* Aborted Message In Mailbox 31 */ | ||
| 2071 | |||
| 2072 | /* CAN_TA1 Masks */ | ||
| 2073 | #define TA0 0x0001 /* Transmit Successful From Mailbox 0 */ | ||
| 2074 | #define TA1 0x0002 /* Transmit Successful From Mailbox 1 */ | ||
| 2075 | #define TA2 0x0004 /* Transmit Successful From Mailbox 2 */ | ||
| 2076 | #define TA3 0x0008 /* Transmit Successful From Mailbox 3 */ | ||
| 2077 | #define TA4 0x0010 /* Transmit Successful From Mailbox 4 */ | ||
| 2078 | #define TA5 0x0020 /* Transmit Successful From Mailbox 5 */ | ||
| 2079 | #define TA6 0x0040 /* Transmit Successful From Mailbox 6 */ | ||
| 2080 | #define TA7 0x0080 /* Transmit Successful From Mailbox 7 */ | ||
| 2081 | #define TA8 0x0100 /* Transmit Successful From Mailbox 8 */ | ||
| 2082 | #define TA9 0x0200 /* Transmit Successful From Mailbox 9 */ | ||
| 2083 | #define TA10 0x0400 /* Transmit Successful From Mailbox 10 */ | ||
| 2084 | #define TA11 0x0800 /* Transmit Successful From Mailbox 11 */ | ||
| 2085 | #define TA12 0x1000 /* Transmit Successful From Mailbox 12 */ | ||
| 2086 | #define TA13 0x2000 /* Transmit Successful From Mailbox 13 */ | ||
| 2087 | #define TA14 0x4000 /* Transmit Successful From Mailbox 14 */ | ||
| 2088 | #define TA15 0x8000 /* Transmit Successful From Mailbox 15 */ | ||
| 2089 | |||
| 2090 | /* CAN_TA2 Masks */ | ||
| 2091 | #define TA16 0x0001 /* Transmit Successful From Mailbox 16 */ | ||
| 2092 | #define TA17 0x0002 /* Transmit Successful From Mailbox 17 */ | ||
| 2093 | #define TA18 0x0004 /* Transmit Successful From Mailbox 18 */ | ||
| 2094 | #define TA19 0x0008 /* Transmit Successful From Mailbox 19 */ | ||
| 2095 | #define TA20 0x0010 /* Transmit Successful From Mailbox 20 */ | ||
| 2096 | #define TA21 0x0020 /* Transmit Successful From Mailbox 21 */ | ||
| 2097 | #define TA22 0x0040 /* Transmit Successful From Mailbox 22 */ | ||
| 2098 | #define TA23 0x0080 /* Transmit Successful From Mailbox 23 */ | ||
| 2099 | #define TA24 0x0100 /* Transmit Successful From Mailbox 24 */ | ||
| 2100 | #define TA25 0x0200 /* Transmit Successful From Mailbox 25 */ | ||
| 2101 | #define TA26 0x0400 /* Transmit Successful From Mailbox 26 */ | ||
| 2102 | #define TA27 0x0800 /* Transmit Successful From Mailbox 27 */ | ||
| 2103 | #define TA28 0x1000 /* Transmit Successful From Mailbox 28 */ | ||
| 2104 | #define TA29 0x2000 /* Transmit Successful From Mailbox 29 */ | ||
| 2105 | #define TA30 0x4000 /* Transmit Successful From Mailbox 30 */ | ||
| 2106 | #define TA31 0x8000 /* Transmit Successful From Mailbox 31 */ | ||
| 2107 | |||
| 2108 | /* CAN_MBTD Masks */ | ||
| 2109 | #define TDPTR 0x001F /* Mailbox To Temporarily Disable */ | ||
| 2110 | #define TDA 0x0040 /* Temporary Disable Acknowledge */ | ||
| 2111 | #define TDR 0x0080 /* Temporary Disable Request */ | ||
| 2112 | |||
| 2113 | /* CAN_RFH1 Masks */ | ||
| 2114 | #define RFH0 0x0001 /* Enable Automatic Remote Frame Handling For Mailbox 0 */ | ||
| 2115 | #define RFH1 0x0002 /* Enable Automatic Remote Frame Handling For Mailbox 1 */ | ||
| 2116 | #define RFH2 0x0004 /* Enable Automatic Remote Frame Handling For Mailbox 2 */ | ||
| 2117 | #define RFH3 0x0008 /* Enable Automatic Remote Frame Handling For Mailbox 3 */ | ||
| 2118 | #define RFH4 0x0010 /* Enable Automatic Remote Frame Handling For Mailbox 4 */ | ||
| 2119 | #define RFH5 0x0020 /* Enable Automatic Remote Frame Handling For Mailbox 5 */ | ||
| 2120 | #define RFH6 0x0040 /* Enable Automatic Remote Frame Handling For Mailbox 6 */ | ||
| 2121 | #define RFH7 0x0080 /* Enable Automatic Remote Frame Handling For Mailbox 7 */ | ||
| 2122 | #define RFH8 0x0100 /* Enable Automatic Remote Frame Handling For Mailbox 8 */ | ||
| 2123 | #define RFH9 0x0200 /* Enable Automatic Remote Frame Handling For Mailbox 9 */ | ||
| 2124 | #define RFH10 0x0400 /* Enable Automatic Remote Frame Handling For Mailbox 10 */ | ||
| 2125 | #define RFH11 0x0800 /* Enable Automatic Remote Frame Handling For Mailbox 11 */ | ||
| 2126 | #define RFH12 0x1000 /* Enable Automatic Remote Frame Handling For Mailbox 12 */ | ||
| 2127 | #define RFH13 0x2000 /* Enable Automatic Remote Frame Handling For Mailbox 13 */ | ||
| 2128 | #define RFH14 0x4000 /* Enable Automatic Remote Frame Handling For Mailbox 14 */ | ||
| 2129 | #define RFH15 0x8000 /* Enable Automatic Remote Frame Handling For Mailbox 15 */ | ||
| 2130 | |||
| 2131 | /* CAN_RFH2 Masks */ | ||
| 2132 | #define RFH16 0x0001 /* Enable Automatic Remote Frame Handling For Mailbox 16 */ | ||
| 2133 | #define RFH17 0x0002 /* Enable Automatic Remote Frame Handling For Mailbox 17 */ | ||
| 2134 | #define RFH18 0x0004 /* Enable Automatic Remote Frame Handling For Mailbox 18 */ | ||
| 2135 | #define RFH19 0x0008 /* Enable Automatic Remote Frame Handling For Mailbox 19 */ | ||
| 2136 | #define RFH20 0x0010 /* Enable Automatic Remote Frame Handling For Mailbox 20 */ | ||
| 2137 | #define RFH21 0x0020 /* Enable Automatic Remote Frame Handling For Mailbox 21 */ | ||
| 2138 | #define RFH22 0x0040 /* Enable Automatic Remote Frame Handling For Mailbox 22 */ | ||
| 2139 | #define RFH23 0x0080 /* Enable Automatic Remote Frame Handling For Mailbox 23 */ | ||
| 2140 | #define RFH24 0x0100 /* Enable Automatic Remote Frame Handling For Mailbox 24 */ | ||
| 2141 | #define RFH25 0x0200 /* Enable Automatic Remote Frame Handling For Mailbox 25 */ | ||
| 2142 | #define RFH26 0x0400 /* Enable Automatic Remote Frame Handling For Mailbox 26 */ | ||
| 2143 | #define RFH27 0x0800 /* Enable Automatic Remote Frame Handling For Mailbox 27 */ | ||
| 2144 | #define RFH28 0x1000 /* Enable Automatic Remote Frame Handling For Mailbox 28 */ | ||
| 2145 | #define RFH29 0x2000 /* Enable Automatic Remote Frame Handling For Mailbox 29 */ | ||
| 2146 | #define RFH30 0x4000 /* Enable Automatic Remote Frame Handling For Mailbox 30 */ | ||
| 2147 | #define RFH31 0x8000 /* Enable Automatic Remote Frame Handling For Mailbox 31 */ | ||
| 2148 | |||
| 2149 | /* CAN_MBTIF1 Masks */ | ||
| 2150 | #define MBTIF0 0x0001 /* TX Interrupt Active In Mailbox 0 */ | ||
| 2151 | #define MBTIF1 0x0002 /* TX Interrupt Active In Mailbox 1 */ | ||
| 2152 | #define MBTIF2 0x0004 /* TX Interrupt Active In Mailbox 2 */ | ||
| 2153 | #define MBTIF3 0x0008 /* TX Interrupt Active In Mailbox 3 */ | ||
| 2154 | #define MBTIF4 0x0010 /* TX Interrupt Active In Mailbox 4 */ | ||
| 2155 | #define MBTIF5 0x0020 /* TX Interrupt Active In Mailbox 5 */ | ||
| 2156 | #define MBTIF6 0x0040 /* TX Interrupt Active In Mailbox 6 */ | ||
| 2157 | #define MBTIF7 0x0080 /* TX Interrupt Active In Mailbox 7 */ | ||
| 2158 | #define MBTIF8 0x0100 /* TX Interrupt Active In Mailbox 8 */ | ||
| 2159 | #define MBTIF9 0x0200 /* TX Interrupt Active In Mailbox 9 */ | ||
| 2160 | #define MBTIF10 0x0400 /* TX Interrupt Active In Mailbox 10 */ | ||
| 2161 | #define MBTIF11 0x0800 /* TX Interrupt Active In Mailbox 11 */ | ||
| 2162 | #define MBTIF12 0x1000 /* TX Interrupt Active In Mailbox 12 */ | ||
| 2163 | #define MBTIF13 0x2000 /* TX Interrupt Active In Mailbox 13 */ | ||
| 2164 | #define MBTIF14 0x4000 /* TX Interrupt Active In Mailbox 14 */ | ||
| 2165 | #define MBTIF15 0x8000 /* TX Interrupt Active In Mailbox 15 */ | ||
| 2166 | |||
| 2167 | /* CAN_MBTIF2 Masks */ | ||
| 2168 | #define MBTIF16 0x0001 /* TX Interrupt Active In Mailbox 16 */ | ||
| 2169 | #define MBTIF17 0x0002 /* TX Interrupt Active In Mailbox 17 */ | ||
| 2170 | #define MBTIF18 0x0004 /* TX Interrupt Active In Mailbox 18 */ | ||
| 2171 | #define MBTIF19 0x0008 /* TX Interrupt Active In Mailbox 19 */ | ||
| 2172 | #define MBTIF20 0x0010 /* TX Interrupt Active In Mailbox 20 */ | ||
| 2173 | #define MBTIF21 0x0020 /* TX Interrupt Active In Mailbox 21 */ | ||
| 2174 | #define MBTIF22 0x0040 /* TX Interrupt Active In Mailbox 22 */ | ||
| 2175 | #define MBTIF23 0x0080 /* TX Interrupt Active In Mailbox 23 */ | ||
| 2176 | #define MBTIF24 0x0100 /* TX Interrupt Active In Mailbox 24 */ | ||
| 2177 | #define MBTIF25 0x0200 /* TX Interrupt Active In Mailbox 25 */ | ||
| 2178 | #define MBTIF26 0x0400 /* TX Interrupt Active In Mailbox 26 */ | ||
| 2179 | #define MBTIF27 0x0800 /* TX Interrupt Active In Mailbox 27 */ | ||
| 2180 | #define MBTIF28 0x1000 /* TX Interrupt Active In Mailbox 28 */ | ||
| 2181 | #define MBTIF29 0x2000 /* TX Interrupt Active In Mailbox 29 */ | ||
| 2182 | #define MBTIF30 0x4000 /* TX Interrupt Active In Mailbox 30 */ | ||
| 2183 | #define MBTIF31 0x8000 /* TX Interrupt Active In Mailbox 31 */ | ||
| 2184 | |||
| 2185 | /* CAN_MBRIF1 Masks */ | ||
| 2186 | #define MBRIF0 0x0001 /* RX Interrupt Active In Mailbox 0 */ | ||
| 2187 | #define MBRIF1 0x0002 /* RX Interrupt Active In Mailbox 1 */ | ||
| 2188 | #define MBRIF2 0x0004 /* RX Interrupt Active In Mailbox 2 */ | ||
| 2189 | #define MBRIF3 0x0008 /* RX Interrupt Active In Mailbox 3 */ | ||
| 2190 | #define MBRIF4 0x0010 /* RX Interrupt Active In Mailbox 4 */ | ||
| 2191 | #define MBRIF5 0x0020 /* RX Interrupt Active In Mailbox 5 */ | ||
| 2192 | #define MBRIF6 0x0040 /* RX Interrupt Active In Mailbox 6 */ | ||
| 2193 | #define MBRIF7 0x0080 /* RX Interrupt Active In Mailbox 7 */ | ||
| 2194 | #define MBRIF8 0x0100 /* RX Interrupt Active In Mailbox 8 */ | ||
| 2195 | #define MBRIF9 0x0200 /* RX Interrupt Active In Mailbox 9 */ | ||
| 2196 | #define MBRIF10 0x0400 /* RX Interrupt Active In Mailbox 10 */ | ||
| 2197 | #define MBRIF11 0x0800 /* RX Interrupt Active In Mailbox 11 */ | ||
| 2198 | #define MBRIF12 0x1000 /* RX Interrupt Active In Mailbox 12 */ | ||
| 2199 | #define MBRIF13 0x2000 /* RX Interrupt Active In Mailbox 13 */ | ||
| 2200 | #define MBRIF14 0x4000 /* RX Interrupt Active In Mailbox 14 */ | ||
| 2201 | #define MBRIF15 0x8000 /* RX Interrupt Active In Mailbox 15 */ | ||
| 2202 | |||
| 2203 | /* CAN_MBRIF2 Masks */ | ||
| 2204 | #define MBRIF16 0x0001 /* RX Interrupt Active In Mailbox 16 */ | ||
| 2205 | #define MBRIF17 0x0002 /* RX Interrupt Active In Mailbox 17 */ | ||
| 2206 | #define MBRIF18 0x0004 /* RX Interrupt Active In Mailbox 18 */ | ||
| 2207 | #define MBRIF19 0x0008 /* RX Interrupt Active In Mailbox 19 */ | ||
| 2208 | #define MBRIF20 0x0010 /* RX Interrupt Active In Mailbox 20 */ | ||
| 2209 | #define MBRIF21 0x0020 /* RX Interrupt Active In Mailbox 21 */ | ||
| 2210 | #define MBRIF22 0x0040 /* RX Interrupt Active In Mailbox 22 */ | ||
| 2211 | #define MBRIF23 0x0080 /* RX Interrupt Active In Mailbox 23 */ | ||
| 2212 | #define MBRIF24 0x0100 /* RX Interrupt Active In Mailbox 24 */ | ||
| 2213 | #define MBRIF25 0x0200 /* RX Interrupt Active In Mailbox 25 */ | ||
| 2214 | #define MBRIF26 0x0400 /* RX Interrupt Active In Mailbox 26 */ | ||
| 2215 | #define MBRIF27 0x0800 /* RX Interrupt Active In Mailbox 27 */ | ||
| 2216 | #define MBRIF28 0x1000 /* RX Interrupt Active In Mailbox 28 */ | ||
| 2217 | #define MBRIF29 0x2000 /* RX Interrupt Active In Mailbox 29 */ | ||
| 2218 | #define MBRIF30 0x4000 /* RX Interrupt Active In Mailbox 30 */ | ||
| 2219 | #define MBRIF31 0x8000 /* RX Interrupt Active In Mailbox 31 */ | ||
| 2220 | |||
| 2221 | /* CAN_MBIM1 Masks */ | ||
| 2222 | #define MBIM0 0x0001 /* Enable Interrupt For Mailbox 0 */ | ||
| 2223 | #define MBIM1 0x0002 /* Enable Interrupt For Mailbox 1 */ | ||
| 2224 | #define MBIM2 0x0004 /* Enable Interrupt For Mailbox 2 */ | ||
| 2225 | #define MBIM3 0x0008 /* Enable Interrupt For Mailbox 3 */ | ||
| 2226 | #define MBIM4 0x0010 /* Enable Interrupt For Mailbox 4 */ | ||
| 2227 | #define MBIM5 0x0020 /* Enable Interrupt For Mailbox 5 */ | ||
| 2228 | #define MBIM6 0x0040 /* Enable Interrupt For Mailbox 6 */ | ||
| 2229 | #define MBIM7 0x0080 /* Enable Interrupt For Mailbox 7 */ | ||
| 2230 | #define MBIM8 0x0100 /* Enable Interrupt For Mailbox 8 */ | ||
| 2231 | #define MBIM9 0x0200 /* Enable Interrupt For Mailbox 9 */ | ||
| 2232 | #define MBIM10 0x0400 /* Enable Interrupt For Mailbox 10 */ | ||
| 2233 | #define MBIM11 0x0800 /* Enable Interrupt For Mailbox 11 */ | ||
| 2234 | #define MBIM12 0x1000 /* Enable Interrupt For Mailbox 12 */ | ||
| 2235 | #define MBIM13 0x2000 /* Enable Interrupt For Mailbox 13 */ | ||
| 2236 | #define MBIM14 0x4000 /* Enable Interrupt For Mailbox 14 */ | ||
| 2237 | #define MBIM15 0x8000 /* Enable Interrupt For Mailbox 15 */ | ||
| 2238 | |||
| 2239 | /* CAN_MBIM2 Masks */ | ||
| 2240 | #define MBIM16 0x0001 /* Enable Interrupt For Mailbox 16 */ | ||
| 2241 | #define MBIM17 0x0002 /* Enable Interrupt For Mailbox 17 */ | ||
| 2242 | #define MBIM18 0x0004 /* Enable Interrupt For Mailbox 18 */ | ||
| 2243 | #define MBIM19 0x0008 /* Enable Interrupt For Mailbox 19 */ | ||
| 2244 | #define MBIM20 0x0010 /* Enable Interrupt For Mailbox 20 */ | ||
| 2245 | #define MBIM21 0x0020 /* Enable Interrupt For Mailbox 21 */ | ||
| 2246 | #define MBIM22 0x0040 /* Enable Interrupt For Mailbox 22 */ | ||
| 2247 | #define MBIM23 0x0080 /* Enable Interrupt For Mailbox 23 */ | ||
| 2248 | #define MBIM24 0x0100 /* Enable Interrupt For Mailbox 24 */ | ||
| 2249 | #define MBIM25 0x0200 /* Enable Interrupt For Mailbox 25 */ | ||
| 2250 | #define MBIM26 0x0400 /* Enable Interrupt For Mailbox 26 */ | ||
| 2251 | #define MBIM27 0x0800 /* Enable Interrupt For Mailbox 27 */ | ||
| 2252 | #define MBIM28 0x1000 /* Enable Interrupt For Mailbox 28 */ | ||
| 2253 | #define MBIM29 0x2000 /* Enable Interrupt For Mailbox 29 */ | ||
| 2254 | #define MBIM30 0x4000 /* Enable Interrupt For Mailbox 30 */ | ||
| 2255 | #define MBIM31 0x8000 /* Enable Interrupt For Mailbox 31 */ | ||
| 2256 | |||
| 2257 | /* CAN_GIM Masks */ | ||
| 2258 | #define EWTIM 0x0001 /* Enable TX Error Count Interrupt */ | ||
| 2259 | #define EWRIM 0x0002 /* Enable RX Error Count Interrupt */ | ||
| 2260 | #define EPIM 0x0004 /* Enable Error-Passive Mode Interrupt */ | ||
| 2261 | #define BOIM 0x0008 /* Enable Bus Off Interrupt */ | ||
| 2262 | #define WUIM 0x0010 /* Enable Wake-Up Interrupt */ | ||
| 2263 | #define UIAIM 0x0020 /* Enable Access To Unimplemented Address Interrupt */ | ||
| 2264 | #define AAIM 0x0040 /* Enable Abort Acknowledge Interrupt */ | ||
| 2265 | #define RMLIM 0x0080 /* Enable RX Message Lost Interrupt */ | ||
| 2266 | #define UCEIM 0x0100 /* Enable Universal Counter Overflow Interrupt */ | ||
| 2267 | #define EXTIM 0x0200 /* Enable External Trigger Output Interrupt */ | ||
| 2268 | #define ADIM 0x0400 /* Enable Access Denied Interrupt */ | ||
| 2269 | |||
| 2270 | /* CAN_GIS Masks */ | ||
| 2271 | #define EWTIS 0x0001 /* TX Error Count IRQ Status */ | ||
| 2272 | #define EWRIS 0x0002 /* RX Error Count IRQ Status */ | ||
| 2273 | #define EPIS 0x0004 /* Error-Passive Mode IRQ Status */ | ||
| 2274 | #define BOIS 0x0008 /* Bus Off IRQ Status */ | ||
| 2275 | #define WUIS 0x0010 /* Wake-Up IRQ Status */ | ||
| 2276 | #define UIAIS 0x0020 /* Access To Unimplemented Address IRQ Status */ | ||
| 2277 | #define AAIS 0x0040 /* Abort Acknowledge IRQ Status */ | ||
| 2278 | #define RMLIS 0x0080 /* RX Message Lost IRQ Status */ | ||
| 2279 | #define UCEIS 0x0100 /* Universal Counter Overflow IRQ Status */ | ||
| 2280 | #define EXTIS 0x0200 /* External Trigger Output IRQ Status */ | ||
| 2281 | #define ADIS 0x0400 /* Access Denied IRQ Status */ | ||
| 2282 | |||
| 2283 | /* CAN_GIF Masks */ | ||
| 2284 | #define EWTIF 0x0001 /* TX Error Count IRQ Flag */ | ||
| 2285 | #define EWRIF 0x0002 /* RX Error Count IRQ Flag */ | ||
| 2286 | #define EPIF 0x0004 /* Error-Passive Mode IRQ Flag */ | ||
| 2287 | #define BOIF 0x0008 /* Bus Off IRQ Flag */ | ||
| 2288 | #define WUIF 0x0010 /* Wake-Up IRQ Flag */ | ||
| 2289 | #define UIAIF 0x0020 /* Access To Unimplemented Address IRQ Flag */ | ||
| 2290 | #define AAIF 0x0040 /* Abort Acknowledge IRQ Flag */ | ||
| 2291 | #define RMLIF 0x0080 /* RX Message Lost IRQ Flag */ | ||
| 2292 | #define UCEIF 0x0100 /* Universal Counter Overflow IRQ Flag */ | ||
| 2293 | #define EXTIF 0x0200 /* External Trigger Output IRQ Flag */ | ||
| 2294 | #define ADIF 0x0400 /* Access Denied IRQ Flag */ | ||
| 2295 | |||
| 2296 | /* CAN_UCCNF Masks */ | ||
| 2297 | #define UCCNF 0x000F /* Universal Counter Mode */ | ||
| 2298 | #define UC_STAMP 0x0001 /* Timestamp Mode */ | ||
| 2299 | #define UC_WDOG 0x0002 /* Watchdog Mode */ | ||
| 2300 | #define UC_AUTOTX 0x0003 /* Auto-Transmit Mode */ | ||
| 2301 | #define UC_ERROR 0x0006 /* CAN Error Frame Count */ | ||
| 2302 | #define UC_OVER 0x0007 /* CAN Overload Frame Count */ | ||
| 2303 | #define UC_LOST 0x0008 /* Arbitration Lost During TX Count */ | ||
| 2304 | #define UC_AA 0x0009 /* TX Abort Count */ | ||
| 2305 | #define UC_TA 0x000A /* TX Successful Count */ | ||
| 2306 | #define UC_REJECT 0x000B /* RX Message Rejected Count */ | ||
| 2307 | #define UC_RML 0x000C /* RX Message Lost Count */ | ||
| 2308 | #define UC_RX 0x000D /* Total Successful RX Messages Count */ | ||
| 2309 | #define UC_RMP 0x000E /* Successful RX W/Matching ID Count */ | ||
| 2310 | #define UC_ALL 0x000F /* Correct Message On CAN Bus Line Count */ | ||
| 2311 | #define UCRC 0x0020 /* Universal Counter Reload/Clear */ | ||
| 2312 | #define UCCT 0x0040 /* Universal Counter CAN Trigger */ | ||
| 2313 | #define UCE 0x0080 /* Universal Counter Enable */ | ||
| 2314 | |||
| 2315 | /* CAN_ESR Masks */ | ||
| 2316 | #define ACKE 0x0004 /* Acknowledge Error */ | ||
| 2317 | #define SER 0x0008 /* Stuff Error */ | ||
| 2318 | #define CRCE 0x0010 /* CRC Error */ | ||
| 2319 | #define SA0 0x0020 /* Stuck At Dominant Error */ | ||
| 2320 | #define BEF 0x0040 /* Bit Error Flag */ | ||
| 2321 | #define FER 0x0080 /* Form Error Flag */ | ||
| 2322 | |||
| 2323 | /* CAN_EWR Masks */ | ||
| 2324 | #define EWLREC 0x00FF /* RX Error Count Limit (For EWRIS) */ | ||
| 2325 | #define EWLTEC 0xFF00 /* TX Error Count Limit (For EWTIS) */ | ||
| 2326 | |||
| 2327 | /* ******************* PIN CONTROL REGISTER MASKS ************************/ | 1705 | /* ******************* PIN CONTROL REGISTER MASKS ************************/ |
| 2328 | /* PORT_MUX Masks */ | 1706 | /* PORT_MUX Masks */ |
| 2329 | #define PJSE 0x0001 /* Port J SPI/SPORT Enable */ | 1707 | #define PJSE 0x0001 /* Port J SPI/SPORT Enable */ |
diff --git a/arch/blackfin/mach-bf537/include/mach/irq.h b/arch/blackfin/mach-bf537/include/mach/irq.h index 789a4f226f7b..1a6d617c5fcf 100644 --- a/arch/blackfin/mach-bf537/include/mach/irq.h +++ b/arch/blackfin/mach-bf537/include/mach/irq.h | |||
| @@ -74,7 +74,7 @@ | |||
| 74 | 74 | ||
| 75 | #define IRQ_PPI_ERROR 42 /*PPI Error Interrupt */ | 75 | #define IRQ_PPI_ERROR 42 /*PPI Error Interrupt */ |
| 76 | #define IRQ_CAN_ERROR 43 /*CAN Error Interrupt */ | 76 | #define IRQ_CAN_ERROR 43 /*CAN Error Interrupt */ |
| 77 | #define IRQ_MAC_ERROR 44 /*PPI Error Interrupt */ | 77 | #define IRQ_MAC_ERROR 44 /*MAC Status/Error Interrupt */ |
| 78 | #define IRQ_SPORT0_ERROR 45 /*SPORT0 Error Interrupt */ | 78 | #define IRQ_SPORT0_ERROR 45 /*SPORT0 Error Interrupt */ |
| 79 | #define IRQ_SPORT1_ERROR 46 /*SPORT1 Error Interrupt */ | 79 | #define IRQ_SPORT1_ERROR 46 /*SPORT1 Error Interrupt */ |
| 80 | #define IRQ_SPI_ERROR 47 /*SPI Error Interrupt */ | 80 | #define IRQ_SPI_ERROR 47 /*SPI Error Interrupt */ |
diff --git a/arch/blackfin/mach-bf538/include/mach/defBF539.h b/arch/blackfin/mach-bf538/include/mach/defBF539.h index fac563e6f62f..d7061d9f2a83 100644 --- a/arch/blackfin/mach-bf538/include/mach/defBF539.h +++ b/arch/blackfin/mach-bf538/include/mach/defBF539.h | |||
| @@ -2418,625 +2418,4 @@ | |||
| 2418 | #define RCV_HALF 0x0004 /* Receive FIFO Has 1 Byte To Read */ | 2418 | #define RCV_HALF 0x0004 /* Receive FIFO Has 1 Byte To Read */ |
| 2419 | #define RCV_FULL 0x000C /* Receive FIFO Full (2 Bytes To Read) */ | 2419 | #define RCV_FULL 0x000C /* Receive FIFO Full (2 Bytes To Read) */ |
| 2420 | 2420 | ||
| 2421 | |||
| 2422 | /* ************ CONTROLLER AREA NETWORK (CAN) MASKS ***************/ | ||
| 2423 | /* CAN_CONTROL Masks */ | ||
| 2424 | #define SRS 0x0001 /* Software Reset */ | ||
| 2425 | #define DNM 0x0002 /* Device Net Mode */ | ||
| 2426 | #define ABO 0x0004 /* Auto-Bus On Enable */ | ||
| 2427 | #define WBA 0x0010 /* Wake-Up On CAN Bus Activity Enable */ | ||
| 2428 | #define SMR 0x0020 /* Sleep Mode Request */ | ||
| 2429 | #define CSR 0x0040 /* CAN Suspend Mode Request */ | ||
| 2430 | #define CCR 0x0080 /* CAN Configuration Mode Request */ | ||
| 2431 | |||
| 2432 | /* CAN_STATUS Masks */ | ||
| 2433 | #define WT 0x0001 /* TX Warning Flag */ | ||
| 2434 | #define WR 0x0002 /* RX Warning Flag */ | ||
| 2435 | #define EP 0x0004 /* Error Passive Mode */ | ||
| 2436 | #define EBO 0x0008 /* Error Bus Off Mode */ | ||
| 2437 | #define CSA 0x0040 /* Suspend Mode Acknowledge */ | ||
| 2438 | #define CCA 0x0080 /* Configuration Mode Acknowledge */ | ||
| 2439 | #define MBPTR 0x1F00 /* Mailbox Pointer */ | ||
| 2440 | #define TRM 0x4000 /* Transmit Mode */ | ||
| 2441 | #define REC 0x8000 /* Receive Mode */ | ||
| 2442 | |||
| 2443 | /* CAN_CLOCK Masks */ | ||
| 2444 | #define BRP 0x03FF /* Bit-Rate Pre-Scaler */ | ||
| 2445 | |||
| 2446 | /* CAN_TIMING Masks */ | ||
| 2447 | #define TSEG1 0x000F /* Time Segment 1 */ | ||
| 2448 | #define TSEG2 0x0070 /* Time Segment 2 */ | ||
| 2449 | #define SAM 0x0080 /* Sampling */ | ||
| 2450 | #define SJW 0x0300 /* Synchronization Jump Width */ | ||
| 2451 | |||
| 2452 | /* CAN_DEBUG Masks */ | ||
| 2453 | #define DEC 0x0001 /* Disable CAN Error Counters */ | ||
| 2454 | #define DRI 0x0002 /* Disable CAN RX Input */ | ||
| 2455 | #define DTO 0x0004 /* Disable CAN TX Output */ | ||
| 2456 | #define DIL 0x0008 /* Disable CAN Internal Loop */ | ||
| 2457 | #define MAA 0x0010 /* Mode Auto-Acknowledge Enable */ | ||
| 2458 | #define MRB 0x0020 /* Mode Read Back Enable */ | ||
| 2459 | #define CDE 0x8000 /* CAN Debug Enable */ | ||
| 2460 | |||
| 2461 | /* CAN_CEC Masks */ | ||
| 2462 | #define RXECNT 0x00FF /* Receive Error Counter */ | ||
| 2463 | #define TXECNT 0xFF00 /* Transmit Error Counter */ | ||
| 2464 | |||
| 2465 | /* CAN_INTR Masks */ | ||
| 2466 | #define MBRIRQ 0x0001 /* Mailbox Receive Interrupt */ | ||
| 2467 | #define MBRIF MBRIRQ /* legacy */ | ||
| 2468 | #define MBTIRQ 0x0002 /* Mailbox Transmit Interrupt */ | ||
| 2469 | #define MBTIF MBTIRQ /* legacy */ | ||
| 2470 | #define GIRQ 0x0004 /* Global Interrupt */ | ||
| 2471 | #define SMACK 0x0008 /* Sleep Mode Acknowledge */ | ||
| 2472 | #define CANTX 0x0040 /* CAN TX Bus Value */ | ||
| 2473 | #define CANRX 0x0080 /* CAN RX Bus Value */ | ||
| 2474 | |||
| 2475 | /* CAN_MBxx_ID1 and CAN_MBxx_ID0 Masks */ | ||
| 2476 | #define DFC 0xFFFF /* Data Filtering Code (If Enabled) (ID0) */ | ||
| 2477 | #define EXTID_LO 0xFFFF /* Lower 16 Bits of Extended Identifier (ID0) */ | ||
| 2478 | #define EXTID_HI 0x0003 /* Upper 2 Bits of Extended Identifier (ID1) */ | ||
| 2479 | #define BASEID 0x1FFC /* Base Identifier */ | ||
| 2480 | #define IDE 0x2000 /* Identifier Extension */ | ||
| 2481 | #define RTR 0x4000 /* Remote Frame Transmission Request */ | ||
| 2482 | #define AME 0x8000 /* Acceptance Mask Enable */ | ||
| 2483 | |||
| 2484 | /* CAN_MBxx_TIMESTAMP Masks */ | ||
| 2485 | #define TSV 0xFFFF /* Timestamp */ | ||
| 2486 | |||
| 2487 | /* CAN_MBxx_LENGTH Masks */ | ||
| 2488 | #define DLC 0x000F /* Data Length Code */ | ||
| 2489 | |||
| 2490 | /* CAN_AMxxH and CAN_AMxxL Masks */ | ||
| 2491 | #define DFM 0xFFFF /* Data Field Mask (If Enabled) (CAN_AMxxL) */ | ||
| 2492 | #define EXTID_LO 0xFFFF /* Lower 16 Bits of Extended Identifier (CAN_AMxxL) */ | ||
| 2493 | #define EXTID_HI 0x0003 /* Upper 2 Bits of Extended Identifier (CAN_AMxxH) */ | ||
| 2494 | #define BASEID 0x1FFC /* Base Identifier */ | ||
| 2495 | #define AMIDE 0x2000 /* Acceptance Mask ID Extension Enable */ | ||
| 2496 | #define FMD 0x4000 /* Full Mask Data Field Enable */ | ||
| 2497 | #define FDF 0x8000 /* Filter On Data Field Enable */ | ||
| 2498 | |||
| 2499 | /* CAN_MC1 Masks */ | ||
| 2500 | #define MC0 0x0001 /* Enable Mailbox 0 */ | ||
| 2501 | #define MC1 0x0002 /* Enable Mailbox 1 */ | ||
| 2502 | #define MC2 0x0004 /* Enable Mailbox 2 */ | ||
| 2503 | #define MC3 0x0008 /* Enable Mailbox 3 */ | ||
| 2504 | #define MC4 0x0010 /* Enable Mailbox 4 */ | ||
| 2505 | #define MC5 0x0020 /* Enable Mailbox 5 */ | ||
| 2506 | #define MC6 0x0040 /* Enable Mailbox 6 */ | ||
| 2507 | #define MC7 0x0080 /* Enable Mailbox 7 */ | ||
| 2508 | #define MC8 0x0100 /* Enable Mailbox 8 */ | ||
| 2509 | #define MC9 0x0200 /* Enable Mailbox 9 */ | ||
| 2510 | #define MC10 0x0400 /* Enable Mailbox 10 */ | ||
| 2511 | #define MC11 0x0800 /* Enable Mailbox 11 */ | ||
| 2512 | #define MC12 0x1000 /* Enable Mailbox 12 */ | ||
| 2513 | #define MC13 0x2000 /* Enable Mailbox 13 */ | ||
| 2514 | #define MC14 0x4000 /* Enable Mailbox 14 */ | ||
| 2515 | #define MC15 0x8000 /* Enable Mailbox 15 */ | ||
| 2516 | |||
| 2517 | /* CAN_MC2 Masks */ | ||
| 2518 | #define MC16 0x0001 /* Enable Mailbox 16 */ | ||
| 2519 | #define MC17 0x0002 /* Enable Mailbox 17 */ | ||
| 2520 | #define MC18 0x0004 /* Enable Mailbox 18 */ | ||
| 2521 | #define MC19 0x0008 /* Enable Mailbox 19 */ | ||
| 2522 | #define MC20 0x0010 /* Enable Mailbox 20 */ | ||
| 2523 | #define MC21 0x0020 /* Enable Mailbox 21 */ | ||
| 2524 | #define MC22 0x0040 /* Enable Mailbox 22 */ | ||
| 2525 | #define MC23 0x0080 /* Enable Mailbox 23 */ | ||
| 2526 | #define MC24 0x0100 /* Enable Mailbox 24 */ | ||
| 2527 | #define MC25 0x0200 /* Enable Mailbox 25 */ | ||
| 2528 | #define MC26 0x0400 /* Enable Mailbox 26 */ | ||
| 2529 | #define MC27 0x0800 /* Enable Mailbox 27 */ | ||
| 2530 | #define MC28 0x1000 /* Enable Mailbox 28 */ | ||
| 2531 | #define MC29 0x2000 /* Enable Mailbox 29 */ | ||
| 2532 | #define MC30 0x4000 /* Enable Mailbox 30 */ | ||
| 2533 | #define MC31 0x8000 /* Enable Mailbox 31 */ | ||
| 2534 | |||
| 2535 | /* CAN_MD1 Masks */ | ||
| 2536 | #define MD0 0x0001 /* Enable Mailbox 0 For Receive */ | ||
| 2537 | #define MD1 0x0002 /* Enable Mailbox 1 For Receive */ | ||
| 2538 | #define MD2 0x0004 /* Enable Mailbox 2 For Receive */ | ||
| 2539 | #define MD3 0x0008 /* Enable Mailbox 3 For Receive */ | ||
| 2540 | #define MD4 0x0010 /* Enable Mailbox 4 For Receive */ | ||
| 2541 | #define MD5 0x0020 /* Enable Mailbox 5 For Receive */ | ||
| 2542 | #define MD6 0x0040 /* Enable Mailbox 6 For Receive */ | ||
| 2543 | #define MD7 0x0080 /* Enable Mailbox 7 For Receive */ | ||
| 2544 | #define MD8 0x0100 /* Enable Mailbox 8 For Receive */ | ||
| 2545 | #define MD9 0x0200 /* Enable Mailbox 9 For Receive */ | ||
| 2546 | #define MD10 0x0400 /* Enable Mailbox 10 For Receive */ | ||
| 2547 | #define MD11 0x0800 /* Enable Mailbox 11 For Receive */ | ||
| 2548 | #define MD12 0x1000 /* Enable Mailbox 12 For Receive */ | ||
| 2549 | #define MD13 0x2000 /* Enable Mailbox 13 For Receive */ | ||
| 2550 | #define MD14 0x4000 /* Enable Mailbox 14 For Receive */ | ||
| 2551 | #define MD15 0x8000 /* Enable Mailbox 15 For Receive */ | ||
| 2552 | |||
| 2553 | /* CAN_MD2 Masks */ | ||
| 2554 | #define MD16 0x0001 /* Enable Mailbox 16 For Receive */ | ||
| 2555 | #define MD17 0x0002 /* Enable Mailbox 17 For Receive */ | ||
| 2556 | #define MD18 0x0004 /* Enable Mailbox 18 For Receive */ | ||
| 2557 | #define MD19 0x0008 /* Enable Mailbox 19 For Receive */ | ||
| 2558 | #define MD20 0x0010 /* Enable Mailbox 20 For Receive */ | ||
| 2559 | #define MD21 0x0020 /* Enable Mailbox 21 For Receive */ | ||
| 2560 | #define MD22 0x0040 /* Enable Mailbox 22 For Receive */ | ||
| 2561 | #define MD23 0x0080 /* Enable Mailbox 23 For Receive */ | ||
| 2562 | #define MD24 0x0100 /* Enable Mailbox 24 For Receive */ | ||
| 2563 | #define MD25 0x0200 /* Enable Mailbox 25 For Receive */ | ||
| 2564 | #define MD26 0x0400 /* Enable Mailbox 26 For Receive */ | ||
| 2565 | #define MD27 0x0800 /* Enable Mailbox 27 For Receive */ | ||
| 2566 | #define MD28 0x1000 /* Enable Mailbox 28 For Receive */ | ||
| 2567 | #define MD29 0x2000 /* Enable Mailbox 29 For Receive */ | ||
| 2568 | #define MD30 0x4000 /* Enable Mailbox 30 For Receive */ | ||
| 2569 | #define MD31 0x8000 /* Enable Mailbox 31 For Receive */ | ||
| 2570 | |||
| 2571 | /* CAN_RMP1 Masks */ | ||
| 2572 | #define RMP0 0x0001 /* RX Message Pending In Mailbox 0 */ | ||
| 2573 | #define RMP1 0x0002 /* RX Message Pending In Mailbox 1 */ | ||
| 2574 | #define RMP2 0x0004 /* RX Message Pending In Mailbox 2 */ | ||
| 2575 | #define RMP3 0x0008 /* RX Message Pending In Mailbox 3 */ | ||
| 2576 | #define RMP4 0x0010 /* RX Message Pending In Mailbox 4 */ | ||
| 2577 | #define RMP5 0x0020 /* RX Message Pending In Mailbox 5 */ | ||
| 2578 | #define RMP6 0x0040 /* RX Message Pending In Mailbox 6 */ | ||
| 2579 | #define RMP7 0x0080 /* RX Message Pending In Mailbox 7 */ | ||
| 2580 | #define RMP8 0x0100 /* RX Message Pending In Mailbox 8 */ | ||
| 2581 | #define RMP9 0x0200 /* RX Message Pending In Mailbox 9 */ | ||
| 2582 | #define RMP10 0x0400 /* RX Message Pending In Mailbox 10 */ | ||
| 2583 | #define RMP11 0x0800 /* RX Message Pending In Mailbox 11 */ | ||
| 2584 | #define RMP12 0x1000 /* RX Message Pending In Mailbox 12 */ | ||
| 2585 | #define RMP13 0x2000 /* RX Message Pending In Mailbox 13 */ | ||
| 2586 | #define RMP14 0x4000 /* RX Message Pending In Mailbox 14 */ | ||
| 2587 | #define RMP15 0x8000 /* RX Message Pending In Mailbox 15 */ | ||
| 2588 | |||
| 2589 | /* CAN_RMP2 Masks */ | ||
| 2590 | #define RMP16 0x0001 /* RX Message Pending In Mailbox 16 */ | ||
| 2591 | #define RMP17 0x0002 /* RX Message Pending In Mailbox 17 */ | ||
| 2592 | #define RMP18 0x0004 /* RX Message Pending In Mailbox 18 */ | ||
| 2593 | #define RMP19 0x0008 /* RX Message Pending In Mailbox 19 */ | ||
| 2594 | #define RMP20 0x0010 /* RX Message Pending In Mailbox 20 */ | ||
| 2595 | #define RMP21 0x0020 /* RX Message Pending In Mailbox 21 */ | ||
| 2596 | #define RMP22 0x0040 /* RX Message Pending In Mailbox 22 */ | ||
| 2597 | #define RMP23 0x0080 /* RX Message Pending In Mailbox 23 */ | ||
| 2598 | #define RMP24 0x0100 /* RX Message Pending In Mailbox 24 */ | ||
| 2599 | #define RMP25 0x0200 /* RX Message Pending In Mailbox 25 */ | ||
| 2600 | #define RMP26 0x0400 /* RX Message Pending In Mailbox 26 */ | ||
| 2601 | #define RMP27 0x0800 /* RX Message Pending In Mailbox 27 */ | ||
| 2602 | #define RMP28 0x1000 /* RX Message Pending In Mailbox 28 */ | ||
| 2603 | #define RMP29 0x2000 /* RX Message Pending In Mailbox 29 */ | ||
| 2604 | #define RMP30 0x4000 /* RX Message Pending In Mailbox 30 */ | ||
| 2605 | #define RMP31 0x8000 /* RX Message Pending In Mailbox 31 */ | ||
| 2606 | |||
| 2607 | /* CAN_RML1 Masks */ | ||
| 2608 | #define RML0 0x0001 /* RX Message Lost In Mailbox 0 */ | ||
| 2609 | #define RML1 0x0002 /* RX Message Lost In Mailbox 1 */ | ||
| 2610 | #define RML2 0x0004 /* RX Message Lost In Mailbox 2 */ | ||
| 2611 | #define RML3 0x0008 /* RX Message Lost In Mailbox 3 */ | ||
| 2612 | #define RML4 0x0010 /* RX Message Lost In Mailbox 4 */ | ||
| 2613 | #define RML5 0x0020 /* RX Message Lost In Mailbox 5 */ | ||
| 2614 | #define RML6 0x0040 /* RX Message Lost In Mailbox 6 */ | ||
| 2615 | #define RML7 0x0080 /* RX Message Lost In Mailbox 7 */ | ||
| 2616 | #define RML8 0x0100 /* RX Message Lost In Mailbox 8 */ | ||
| 2617 | #define RML9 0x0200 /* RX Message Lost In Mailbox 9 */ | ||
| 2618 | #define RML10 0x0400 /* RX Message Lost In Mailbox 10 */ | ||
| 2619 | #define RML11 0x0800 /* RX Message Lost In Mailbox 11 */ | ||
| 2620 | #define RML12 0x1000 /* RX Message Lost In Mailbox 12 */ | ||
| 2621 | #define RML13 0x2000 /* RX Message Lost In Mailbox 13 */ | ||
| 2622 | #define RML14 0x4000 /* RX Message Lost In Mailbox 14 */ | ||
| 2623 | #define RML15 0x8000 /* RX Message Lost In Mailbox 15 */ | ||
| 2624 | |||
| 2625 | /* CAN_RML2 Masks */ | ||
| 2626 | #define RML16 0x0001 /* RX Message Lost In Mailbox 16 */ | ||
| 2627 | #define RML17 0x0002 /* RX Message Lost In Mailbox 17 */ | ||
| 2628 | #define RML18 0x0004 /* RX Message Lost In Mailbox 18 */ | ||
| 2629 | #define RML19 0x0008 /* RX Message Lost In Mailbox 19 */ | ||
| 2630 | #define RML20 0x0010 /* RX Message Lost In Mailbox 20 */ | ||
| 2631 | #define RML21 0x0020 /* RX Message Lost In Mailbox 21 */ | ||
| 2632 | #define RML22 0x0040 /* RX Message Lost In Mailbox 22 */ | ||
| 2633 | #define RML23 0x0080 /* RX Message Lost In Mailbox 23 */ | ||
| 2634 | #define RML24 0x0100 /* RX Message Lost In Mailbox 24 */ | ||
| 2635 | #define RML25 0x0200 /* RX Message Lost In Mailbox 25 */ | ||
| 2636 | #define RML26 0x0400 /* RX Message Lost In Mailbox 26 */ | ||
| 2637 | #define RML27 0x0800 /* RX Message Lost In Mailbox 27 */ | ||
| 2638 | #define RML28 0x1000 /* RX Message Lost In Mailbox 28 */ | ||
| 2639 | #define RML29 0x2000 /* RX Message Lost In Mailbox 29 */ | ||
| 2640 | #define RML30 0x4000 /* RX Message Lost In Mailbox 30 */ | ||
| 2641 | #define RML31 0x8000 /* RX Message Lost In Mailbox 31 */ | ||
| 2642 | |||
| 2643 | /* CAN_OPSS1 Masks */ | ||
| 2644 | #define OPSS0 0x0001 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 0 */ | ||
| 2645 | #define OPSS1 0x0002 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 1 */ | ||
| 2646 | #define OPSS2 0x0004 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 2 */ | ||
| 2647 | #define OPSS3 0x0008 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 3 */ | ||
| 2648 | #define OPSS4 0x0010 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 4 */ | ||
| 2649 | #define OPSS5 0x0020 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 5 */ | ||
| 2650 | #define OPSS6 0x0040 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 6 */ | ||
| 2651 | #define OPSS7 0x0080 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 7 */ | ||
| 2652 | #define OPSS8 0x0100 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 8 */ | ||
| 2653 | #define OPSS9 0x0200 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 9 */ | ||
| 2654 | #define OPSS10 0x0400 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 10 */ | ||
| 2655 | #define OPSS11 0x0800 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 11 */ | ||
| 2656 | #define OPSS12 0x1000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 12 */ | ||
| 2657 | #define OPSS13 0x2000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 13 */ | ||
| 2658 | #define OPSS14 0x4000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 14 */ | ||
| 2659 | #define OPSS15 0x8000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 15 */ | ||
| 2660 | |||
| 2661 | /* CAN_OPSS2 Masks */ | ||
| 2662 | #define OPSS16 0x0001 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 16 */ | ||
| 2663 | #define OPSS17 0x0002 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 17 */ | ||
| 2664 | #define OPSS18 0x0004 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 18 */ | ||
| 2665 | #define OPSS19 0x0008 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 19 */ | ||
| 2666 | #define OPSS20 0x0010 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 20 */ | ||
| 2667 | #define OPSS21 0x0020 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 21 */ | ||
| 2668 | #define OPSS22 0x0040 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 22 */ | ||
| 2669 | #define OPSS23 0x0080 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 23 */ | ||
| 2670 | #define OPSS24 0x0100 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 24 */ | ||
| 2671 | #define OPSS25 0x0200 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 25 */ | ||
| 2672 | #define OPSS26 0x0400 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 26 */ | ||
| 2673 | #define OPSS27 0x0800 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 27 */ | ||
| 2674 | #define OPSS28 0x1000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 28 */ | ||
| 2675 | #define OPSS29 0x2000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 29 */ | ||
| 2676 | #define OPSS30 0x4000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 30 */ | ||
| 2677 | #define OPSS31 0x8000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 31 */ | ||
| 2678 | |||
| 2679 | /* CAN_TRR1 Masks */ | ||
| 2680 | #define TRR0 0x0001 /* Deny But Don't Lock Access To Mailbox 0 */ | ||
| 2681 | #define TRR1 0x0002 /* Deny But Don't Lock Access To Mailbox 1 */ | ||
| 2682 | #define TRR2 0x0004 /* Deny But Don't Lock Access To Mailbox 2 */ | ||
| 2683 | #define TRR3 0x0008 /* Deny But Don't Lock Access To Mailbox 3 */ | ||
| 2684 | #define TRR4 0x0010 /* Deny But Don't Lock Access To Mailbox 4 */ | ||
| 2685 | #define TRR5 0x0020 /* Deny But Don't Lock Access To Mailbox 5 */ | ||
| 2686 | #define TRR6 0x0040 /* Deny But Don't Lock Access To Mailbox 6 */ | ||
| 2687 | #define TRR7 0x0080 /* Deny But Don't Lock Access To Mailbox 7 */ | ||
| 2688 | #define TRR8 0x0100 /* Deny But Don't Lock Access To Mailbox 8 */ | ||
| 2689 | #define TRR9 0x0200 /* Deny But Don't Lock Access To Mailbox 9 */ | ||
| 2690 | #define TRR10 0x0400 /* Deny But Don't Lock Access To Mailbox 10 */ | ||
| 2691 | #define TRR11 0x0800 /* Deny But Don't Lock Access To Mailbox 11 */ | ||
| 2692 | #define TRR12 0x1000 /* Deny But Don't Lock Access To Mailbox 12 */ | ||
| 2693 | #define TRR13 0x2000 /* Deny But Don't Lock Access To Mailbox 13 */ | ||
| 2694 | #define TRR14 0x4000 /* Deny But Don't Lock Access To Mailbox 14 */ | ||
| 2695 | #define TRR15 0x8000 /* Deny But Don't Lock Access To Mailbox 15 */ | ||
| 2696 | |||
| 2697 | /* CAN_TRR2 Masks */ | ||
| 2698 | #define TRR16 0x0001 /* Deny But Don't Lock Access To Mailbox 16 */ | ||
| 2699 | #define TRR17 0x0002 /* Deny But Don't Lock Access To Mailbox 17 */ | ||
| 2700 | #define TRR18 0x0004 /* Deny But Don't Lock Access To Mailbox 18 */ | ||
| 2701 | #define TRR19 0x0008 /* Deny But Don't Lock Access To Mailbox 19 */ | ||
| 2702 | #define TRR20 0x0010 /* Deny But Don't Lock Access To Mailbox 20 */ | ||
| 2703 | #define TRR21 0x0020 /* Deny But Don't Lock Access To Mailbox 21 */ | ||
| 2704 | #define TRR22 0x0040 /* Deny But Don't Lock Access To Mailbox 22 */ | ||
| 2705 | #define TRR23 0x0080 /* Deny But Don't Lock Access To Mailbox 23 */ | ||
| 2706 | #define TRR24 0x0100 /* Deny But Don't Lock Access To Mailbox 24 */ | ||
| 2707 | #define TRR25 0x0200 /* Deny But Don't Lock Access To Mailbox 25 */ | ||
| 2708 | #define TRR26 0x0400 /* Deny But Don't Lock Access To Mailbox 26 */ | ||
| 2709 | #define TRR27 0x0800 /* Deny But Don't Lock Access To Mailbox 27 */ | ||
| 2710 | #define TRR28 0x1000 /* Deny But Don't Lock Access To Mailbox 28 */ | ||
| 2711 | #define TRR29 0x2000 /* Deny But Don't Lock Access To Mailbox 29 */ | ||
| 2712 | #define TRR30 0x4000 /* Deny But Don't Lock Access To Mailbox 30 */ | ||
| 2713 | #define TRR31 0x8000 /* Deny But Don't Lock Access To Mailbox 31 */ | ||
| 2714 | |||
| 2715 | /* CAN_TRS1 Masks */ | ||
| 2716 | #define TRS0 0x0001 /* Remote Frame Request For Mailbox 0 */ | ||
| 2717 | #define TRS1 0x0002 /* Remote Frame Request For Mailbox 1 */ | ||
| 2718 | #define TRS2 0x0004 /* Remote Frame Request For Mailbox 2 */ | ||
| 2719 | #define TRS3 0x0008 /* Remote Frame Request For Mailbox 3 */ | ||
| 2720 | #define TRS4 0x0010 /* Remote Frame Request For Mailbox 4 */ | ||
| 2721 | #define TRS5 0x0020 /* Remote Frame Request For Mailbox 5 */ | ||
| 2722 | #define TRS6 0x0040 /* Remote Frame Request For Mailbox 6 */ | ||
| 2723 | #define TRS7 0x0080 /* Remote Frame Request For Mailbox 7 */ | ||
| 2724 | #define TRS8 0x0100 /* Remote Frame Request For Mailbox 8 */ | ||
| 2725 | #define TRS9 0x0200 /* Remote Frame Request For Mailbox 9 */ | ||
| 2726 | #define TRS10 0x0400 /* Remote Frame Request For Mailbox 10 */ | ||
| 2727 | #define TRS11 0x0800 /* Remote Frame Request For Mailbox 11 */ | ||
| 2728 | #define TRS12 0x1000 /* Remote Frame Request For Mailbox 12 */ | ||
| 2729 | #define TRS13 0x2000 /* Remote Frame Request For Mailbox 13 */ | ||
| 2730 | #define TRS14 0x4000 /* Remote Frame Request For Mailbox 14 */ | ||
| 2731 | #define TRS15 0x8000 /* Remote Frame Request For Mailbox 15 */ | ||
| 2732 | |||
| 2733 | /* CAN_TRS2 Masks */ | ||
| 2734 | #define TRS16 0x0001 /* Remote Frame Request For Mailbox 16 */ | ||
| 2735 | #define TRS17 0x0002 /* Remote Frame Request For Mailbox 17 */ | ||
| 2736 | #define TRS18 0x0004 /* Remote Frame Request For Mailbox 18 */ | ||
| 2737 | #define TRS19 0x0008 /* Remote Frame Request For Mailbox 19 */ | ||
| 2738 | #define TRS20 0x0010 /* Remote Frame Request For Mailbox 20 */ | ||
| 2739 | #define TRS21 0x0020 /* Remote Frame Request For Mailbox 21 */ | ||
| 2740 | #define TRS22 0x0040 /* Remote Frame Request For Mailbox 22 */ | ||
| 2741 | #define TRS23 0x0080 /* Remote Frame Request For Mailbox 23 */ | ||
| 2742 | #define TRS24 0x0100 /* Remote Frame Request For Mailbox 24 */ | ||
| 2743 | #define TRS25 0x0200 /* Remote Frame Request For Mailbox 25 */ | ||
| 2744 | #define TRS26 0x0400 /* Remote Frame Request For Mailbox 26 */ | ||
| 2745 | #define TRS27 0x0800 /* Remote Frame Request For Mailbox 27 */ | ||
| 2746 | #define TRS28 0x1000 /* Remote Frame Request For Mailbox 28 */ | ||
| 2747 | #define TRS29 0x2000 /* Remote Frame Request For Mailbox 29 */ | ||
| 2748 | #define TRS30 0x4000 /* Remote Frame Request For Mailbox 30 */ | ||
| 2749 | #define TRS31 0x8000 /* Remote Frame Request For Mailbox 31 */ | ||
| 2750 | |||
| 2751 | /* CAN_AA1 Masks */ | ||
| 2752 | #define AA0 0x0001 /* Aborted Message In Mailbox 0 */ | ||
| 2753 | #define AA1 0x0002 /* Aborted Message In Mailbox 1 */ | ||
| 2754 | #define AA2 0x0004 /* Aborted Message In Mailbox 2 */ | ||
| 2755 | #define AA3 0x0008 /* Aborted Message In Mailbox 3 */ | ||
| 2756 | #define AA4 0x0010 /* Aborted Message In Mailbox 4 */ | ||
| 2757 | #define AA5 0x0020 /* Aborted Message In Mailbox 5 */ | ||
| 2758 | #define AA6 0x0040 /* Aborted Message In Mailbox 6 */ | ||
| 2759 | #define AA7 0x0080 /* Aborted Message In Mailbox 7 */ | ||
| 2760 | #define AA8 0x0100 /* Aborted Message In Mailbox 8 */ | ||
| 2761 | #define AA9 0x0200 /* Aborted Message In Mailbox 9 */ | ||
| 2762 | #define AA10 0x0400 /* Aborted Message In Mailbox 10 */ | ||
| 2763 | #define AA11 0x0800 /* Aborted Message In Mailbox 11 */ | ||
| 2764 | #define AA12 0x1000 /* Aborted Message In Mailbox 12 */ | ||
| 2765 | #define AA13 0x2000 /* Aborted Message In Mailbox 13 */ | ||
| 2766 | #define AA14 0x4000 /* Aborted Message In Mailbox 14 */ | ||
| 2767 | #define AA15 0x8000 /* Aborted Message In Mailbox 15 */ | ||
| 2768 | |||
| 2769 | /* CAN_AA2 Masks */ | ||
| 2770 | #define AA16 0x0001 /* Aborted Message In Mailbox 16 */ | ||
| 2771 | #define AA17 0x0002 /* Aborted Message In Mailbox 17 */ | ||
| 2772 | #define AA18 0x0004 /* Aborted Message In Mailbox 18 */ | ||
| 2773 | #define AA19 0x0008 /* Aborted Message In Mailbox 19 */ | ||
| 2774 | #define AA20 0x0010 /* Aborted Message In Mailbox 20 */ | ||
| 2775 | #define AA21 0x0020 /* Aborted Message In Mailbox 21 */ | ||
| 2776 | #define AA22 0x0040 /* Aborted Message In Mailbox 22 */ | ||
| 2777 | #define AA23 0x0080 /* Aborted Message In Mailbox 23 */ | ||
| 2778 | #define AA24 0x0100 /* Aborted Message In Mailbox 24 */ | ||
| 2779 | #define AA25 0x0200 /* Aborted Message In Mailbox 25 */ | ||
| 2780 | #define AA26 0x0400 /* Aborted Message In Mailbox 26 */ | ||
| 2781 | #define AA27 0x0800 /* Aborted Message In Mailbox 27 */ | ||
| 2782 | #define AA28 0x1000 /* Aborted Message In Mailbox 28 */ | ||
| 2783 | #define AA29 0x2000 /* Aborted Message In Mailbox 29 */ | ||
| 2784 | #define AA30 0x4000 /* Aborted Message In Mailbox 30 */ | ||
| 2785 | #define AA31 0x8000 /* Aborted Message In Mailbox 31 */ | ||
| 2786 | |||
| 2787 | /* CAN_TA1 Masks */ | ||
| 2788 | #define TA0 0x0001 /* Transmit Successful From Mailbox 0 */ | ||
| 2789 | #define TA1 0x0002 /* Transmit Successful From Mailbox 1 */ | ||
| 2790 | #define TA2 0x0004 /* Transmit Successful From Mailbox 2 */ | ||
| 2791 | #define TA3 0x0008 /* Transmit Successful From Mailbox 3 */ | ||
| 2792 | #define TA4 0x0010 /* Transmit Successful From Mailbox 4 */ | ||
| 2793 | #define TA5 0x0020 /* Transmit Successful From Mailbox 5 */ | ||
| 2794 | #define TA6 0x0040 /* Transmit Successful From Mailbox 6 */ | ||
| 2795 | #define TA7 0x0080 /* Transmit Successful From Mailbox 7 */ | ||
| 2796 | #define TA8 0x0100 /* Transmit Successful From Mailbox 8 */ | ||
| 2797 | #define TA9 0x0200 /* Transmit Successful From Mailbox 9 */ | ||
| 2798 | #define TA10 0x0400 /* Transmit Successful From Mailbox 10 */ | ||
| 2799 | #define TA11 0x0800 /* Transmit Successful From Mailbox 11 */ | ||
| 2800 | #define TA12 0x1000 /* Transmit Successful From Mailbox 12 */ | ||
| 2801 | #define TA13 0x2000 /* Transmit Successful From Mailbox 13 */ | ||
| 2802 | #define TA14 0x4000 /* Transmit Successful From Mailbox 14 */ | ||
| 2803 | #define TA15 0x8000 /* Transmit Successful From Mailbox 15 */ | ||
| 2804 | |||
| 2805 | /* CAN_TA2 Masks */ | ||
| 2806 | #define TA16 0x0001 /* Transmit Successful From Mailbox 16 */ | ||
| 2807 | #define TA17 0x0002 /* Transmit Successful From Mailbox 17 */ | ||
| 2808 | #define TA18 0x0004 /* Transmit Successful From Mailbox 18 */ | ||
| 2809 | #define TA19 0x0008 /* Transmit Successful From Mailbox 19 */ | ||
| 2810 | #define TA20 0x0010 /* Transmit Successful From Mailbox 20 */ | ||
| 2811 | #define TA21 0x0020 /* Transmit Successful From Mailbox 21 */ | ||
| 2812 | #define TA22 0x0040 /* Transmit Successful From Mailbox 22 */ | ||
| 2813 | #define TA23 0x0080 /* Transmit Successful From Mailbox 23 */ | ||
| 2814 | #define TA24 0x0100 /* Transmit Successful From Mailbox 24 */ | ||
| 2815 | #define TA25 0x0200 /* Transmit Successful From Mailbox 25 */ | ||
| 2816 | #define TA26 0x0400 /* Transmit Successful From Mailbox 26 */ | ||
| 2817 | #define TA27 0x0800 /* Transmit Successful From Mailbox 27 */ | ||
| 2818 | #define TA28 0x1000 /* Transmit Successful From Mailbox 28 */ | ||
| 2819 | #define TA29 0x2000 /* Transmit Successful From Mailbox 29 */ | ||
| 2820 | #define TA30 0x4000 /* Transmit Successful From Mailbox 30 */ | ||
| 2821 | #define TA31 0x8000 /* Transmit Successful From Mailbox 31 */ | ||
| 2822 | |||
| 2823 | /* CAN_MBTD Masks */ | ||
| 2824 | #define TDPTR 0x001F /* Mailbox To Temporarily Disable */ | ||
| 2825 | #define TDA 0x0040 /* Temporary Disable Acknowledge */ | ||
| 2826 | #define TDR 0x0080 /* Temporary Disable Request */ | ||
| 2827 | |||
| 2828 | /* CAN_RFH1 Masks */ | ||
| 2829 | #define RFH0 0x0001 /* Enable Automatic Remote Frame Handling For Mailbox 0 */ | ||
| 2830 | #define RFH1 0x0002 /* Enable Automatic Remote Frame Handling For Mailbox 1 */ | ||
| 2831 | #define RFH2 0x0004 /* Enable Automatic Remote Frame Handling For Mailbox 2 */ | ||
| 2832 | #define RFH3 0x0008 /* Enable Automatic Remote Frame Handling For Mailbox 3 */ | ||
| 2833 | #define RFH4 0x0010 /* Enable Automatic Remote Frame Handling For Mailbox 4 */ | ||
| 2834 | #define RFH5 0x0020 /* Enable Automatic Remote Frame Handling For Mailbox 5 */ | ||
| 2835 | #define RFH6 0x0040 /* Enable Automatic Remote Frame Handling For Mailbox 6 */ | ||
| 2836 | #define RFH7 0x0080 /* Enable Automatic Remote Frame Handling For Mailbox 7 */ | ||
| 2837 | #define RFH8 0x0100 /* Enable Automatic Remote Frame Handling For Mailbox 8 */ | ||
| 2838 | #define RFH9 0x0200 /* Enable Automatic Remote Frame Handling For Mailbox 9 */ | ||
| 2839 | #define RFH10 0x0400 /* Enable Automatic Remote Frame Handling For Mailbox 10 */ | ||
| 2840 | #define RFH11 0x0800 /* Enable Automatic Remote Frame Handling For Mailbox 11 */ | ||
| 2841 | #define RFH12 0x1000 /* Enable Automatic Remote Frame Handling For Mailbox 12 */ | ||
| 2842 | #define RFH13 0x2000 /* Enable Automatic Remote Frame Handling For Mailbox 13 */ | ||
| 2843 | #define RFH14 0x4000 /* Enable Automatic Remote Frame Handling For Mailbox 14 */ | ||
| 2844 | #define RFH15 0x8000 /* Enable Automatic Remote Frame Handling For Mailbox 15 */ | ||
| 2845 | |||
| 2846 | /* CAN_RFH2 Masks */ | ||
| 2847 | #define RFH16 0x0001 /* Enable Automatic Remote Frame Handling For Mailbox 16 */ | ||
| 2848 | #define RFH17 0x0002 /* Enable Automatic Remote Frame Handling For Mailbox 17 */ | ||
| 2849 | #define RFH18 0x0004 /* Enable Automatic Remote Frame Handling For Mailbox 18 */ | ||
| 2850 | #define RFH19 0x0008 /* Enable Automatic Remote Frame Handling For Mailbox 19 */ | ||
| 2851 | #define RFH20 0x0010 /* Enable Automatic Remote Frame Handling For Mailbox 20 */ | ||
| 2852 | #define RFH21 0x0020 /* Enable Automatic Remote Frame Handling For Mailbox 21 */ | ||
| 2853 | #define RFH22 0x0040 /* Enable Automatic Remote Frame Handling For Mailbox 22 */ | ||
| 2854 | #define RFH23 0x0080 /* Enable Automatic Remote Frame Handling For Mailbox 23 */ | ||
| 2855 | #define RFH24 0x0100 /* Enable Automatic Remote Frame Handling For Mailbox 24 */ | ||
| 2856 | #define RFH25 0x0200 /* Enable Automatic Remote Frame Handling For Mailbox 25 */ | ||
| 2857 | #define RFH26 0x0400 /* Enable Automatic Remote Frame Handling For Mailbox 26 */ | ||
| 2858 | #define RFH27 0x0800 /* Enable Automatic Remote Frame Handling For Mailbox 27 */ | ||
| 2859 | #define RFH28 0x1000 /* Enable Automatic Remote Frame Handling For Mailbox 28 */ | ||
| 2860 | #define RFH29 0x2000 /* Enable Automatic Remote Frame Handling For Mailbox 29 */ | ||
| 2861 | #define RFH30 0x4000 /* Enable Automatic Remote Frame Handling For Mailbox 30 */ | ||
| 2862 | #define RFH31 0x8000 /* Enable Automatic Remote Frame Handling For Mailbox 31 */ | ||
| 2863 | |||
| 2864 | /* CAN_MBTIF1 Masks */ | ||
| 2865 | #define MBTIF0 0x0001 /* TX Interrupt Active In Mailbox 0 */ | ||
| 2866 | #define MBTIF1 0x0002 /* TX Interrupt Active In Mailbox 1 */ | ||
| 2867 | #define MBTIF2 0x0004 /* TX Interrupt Active In Mailbox 2 */ | ||
| 2868 | #define MBTIF3 0x0008 /* TX Interrupt Active In Mailbox 3 */ | ||
| 2869 | #define MBTIF4 0x0010 /* TX Interrupt Active In Mailbox 4 */ | ||
| 2870 | #define MBTIF5 0x0020 /* TX Interrupt Active In Mailbox 5 */ | ||
| 2871 | #define MBTIF6 0x0040 /* TX Interrupt Active In Mailbox 6 */ | ||
| 2872 | #define MBTIF7 0x0080 /* TX Interrupt Active In Mailbox 7 */ | ||
| 2873 | #define MBTIF8 0x0100 /* TX Interrupt Active In Mailbox 8 */ | ||
| 2874 | #define MBTIF9 0x0200 /* TX Interrupt Active In Mailbox 9 */ | ||
| 2875 | #define MBTIF10 0x0400 /* TX Interrupt Active In Mailbox 10 */ | ||
| 2876 | #define MBTIF11 0x0800 /* TX Interrupt Active In Mailbox 11 */ | ||
| 2877 | #define MBTIF12 0x1000 /* TX Interrupt Active In Mailbox 12 */ | ||
| 2878 | #define MBTIF13 0x2000 /* TX Interrupt Active In Mailbox 13 */ | ||
| 2879 | #define MBTIF14 0x4000 /* TX Interrupt Active In Mailbox 14 */ | ||
| 2880 | #define MBTIF15 0x8000 /* TX Interrupt Active In Mailbox 15 */ | ||
| 2881 | |||
| 2882 | /* CAN_MBTIF2 Masks */ | ||
| 2883 | #define MBTIF16 0x0001 /* TX Interrupt Active In Mailbox 16 */ | ||
| 2884 | #define MBTIF17 0x0002 /* TX Interrupt Active In Mailbox 17 */ | ||
| 2885 | #define MBTIF18 0x0004 /* TX Interrupt Active In Mailbox 18 */ | ||
| 2886 | #define MBTIF19 0x0008 /* TX Interrupt Active In Mailbox 19 */ | ||
| 2887 | #define MBTIF20 0x0010 /* TX Interrupt Active In Mailbox 20 */ | ||
| 2888 | #define MBTIF21 0x0020 /* TX Interrupt Active In Mailbox 21 */ | ||
| 2889 | #define MBTIF22 0x0040 /* TX Interrupt Active In Mailbox 22 */ | ||
| 2890 | #define MBTIF23 0x0080 /* TX Interrupt Active In Mailbox 23 */ | ||
| 2891 | #define MBTIF24 0x0100 /* TX Interrupt Active In Mailbox 24 */ | ||
| 2892 | #define MBTIF25 0x0200 /* TX Interrupt Active In Mailbox 25 */ | ||
| 2893 | #define MBTIF26 0x0400 /* TX Interrupt Active In Mailbox 26 */ | ||
| 2894 | #define MBTIF27 0x0800 /* TX Interrupt Active In Mailbox 27 */ | ||
| 2895 | #define MBTIF28 0x1000 /* TX Interrupt Active In Mailbox 28 */ | ||
| 2896 | #define MBTIF29 0x2000 /* TX Interrupt Active In Mailbox 29 */ | ||
| 2897 | #define MBTIF30 0x4000 /* TX Interrupt Active In Mailbox 30 */ | ||
| 2898 | #define MBTIF31 0x8000 /* TX Interrupt Active In Mailbox 31 */ | ||
| 2899 | |||
| 2900 | /* CAN_MBRIF1 Masks */ | ||
| 2901 | #define MBRIF0 0x0001 /* RX Interrupt Active In Mailbox 0 */ | ||
| 2902 | #define MBRIF1 0x0002 /* RX Interrupt Active In Mailbox 1 */ | ||
| 2903 | #define MBRIF2 0x0004 /* RX Interrupt Active In Mailbox 2 */ | ||
| 2904 | #define MBRIF3 0x0008 /* RX Interrupt Active In Mailbox 3 */ | ||
| 2905 | #define MBRIF4 0x0010 /* RX Interrupt Active In Mailbox 4 */ | ||
| 2906 | #define MBRIF5 0x0020 /* RX Interrupt Active In Mailbox 5 */ | ||
| 2907 | #define MBRIF6 0x0040 /* RX Interrupt Active In Mailbox 6 */ | ||
| 2908 | #define MBRIF7 0x0080 /* RX Interrupt Active In Mailbox 7 */ | ||
| 2909 | #define MBRIF8 0x0100 /* RX Interrupt Active In Mailbox 8 */ | ||
| 2910 | #define MBRIF9 0x0200 /* RX Interrupt Active In Mailbox 9 */ | ||
| 2911 | #define MBRIF10 0x0400 /* RX Interrupt Active In Mailbox 10 */ | ||
| 2912 | #define MBRIF11 0x0800 /* RX Interrupt Active In Mailbox 11 */ | ||
| 2913 | #define MBRIF12 0x1000 /* RX Interrupt Active In Mailbox 12 */ | ||
| 2914 | #define MBRIF13 0x2000 /* RX Interrupt Active In Mailbox 13 */ | ||
| 2915 | #define MBRIF14 0x4000 /* RX Interrupt Active In Mailbox 14 */ | ||
| 2916 | #define MBRIF15 0x8000 /* RX Interrupt Active In Mailbox 15 */ | ||
| 2917 | |||
| 2918 | /* CAN_MBRIF2 Masks */ | ||
| 2919 | #define MBRIF16 0x0001 /* RX Interrupt Active In Mailbox 16 */ | ||
| 2920 | #define MBRIF17 0x0002 /* RX Interrupt Active In Mailbox 17 */ | ||
| 2921 | #define MBRIF18 0x0004 /* RX Interrupt Active In Mailbox 18 */ | ||
| 2922 | #define MBRIF19 0x0008 /* RX Interrupt Active In Mailbox 19 */ | ||
| 2923 | #define MBRIF20 0x0010 /* RX Interrupt Active In Mailbox 20 */ | ||
| 2924 | #define MBRIF21 0x0020 /* RX Interrupt Active In Mailbox 21 */ | ||
| 2925 | #define MBRIF22 0x0040 /* RX Interrupt Active In Mailbox 22 */ | ||
| 2926 | #define MBRIF23 0x0080 /* RX Interrupt Active In Mailbox 23 */ | ||
| 2927 | #define MBRIF24 0x0100 /* RX Interrupt Active In Mailbox 24 */ | ||
| 2928 | #define MBRIF25 0x0200 /* RX Interrupt Active In Mailbox 25 */ | ||
| 2929 | #define MBRIF26 0x0400 /* RX Interrupt Active In Mailbox 26 */ | ||
| 2930 | #define MBRIF27 0x0800 /* RX Interrupt Active In Mailbox 27 */ | ||
| 2931 | #define MBRIF28 0x1000 /* RX Interrupt Active In Mailbox 28 */ | ||
| 2932 | #define MBRIF29 0x2000 /* RX Interrupt Active In Mailbox 29 */ | ||
| 2933 | #define MBRIF30 0x4000 /* RX Interrupt Active In Mailbox 30 */ | ||
| 2934 | #define MBRIF31 0x8000 /* RX Interrupt Active In Mailbox 31 */ | ||
| 2935 | |||
| 2936 | /* CAN_MBIM1 Masks */ | ||
| 2937 | #define MBIM0 0x0001 /* Enable Interrupt For Mailbox 0 */ | ||
| 2938 | #define MBIM1 0x0002 /* Enable Interrupt For Mailbox 1 */ | ||
| 2939 | #define MBIM2 0x0004 /* Enable Interrupt For Mailbox 2 */ | ||
| 2940 | #define MBIM3 0x0008 /* Enable Interrupt For Mailbox 3 */ | ||
| 2941 | #define MBIM4 0x0010 /* Enable Interrupt For Mailbox 4 */ | ||
| 2942 | #define MBIM5 0x0020 /* Enable Interrupt For Mailbox 5 */ | ||
| 2943 | #define MBIM6 0x0040 /* Enable Interrupt For Mailbox 6 */ | ||
| 2944 | #define MBIM7 0x0080 /* Enable Interrupt For Mailbox 7 */ | ||
| 2945 | #define MBIM8 0x0100 /* Enable Interrupt For Mailbox 8 */ | ||
| 2946 | #define MBIM9 0x0200 /* Enable Interrupt For Mailbox 9 */ | ||
| 2947 | #define MBIM10 0x0400 /* Enable Interrupt For Mailbox 10 */ | ||
| 2948 | #define MBIM11 0x0800 /* Enable Interrupt For Mailbox 11 */ | ||
| 2949 | #define MBIM12 0x1000 /* Enable Interrupt For Mailbox 12 */ | ||
| 2950 | #define MBIM13 0x2000 /* Enable Interrupt For Mailbox 13 */ | ||
| 2951 | #define MBIM14 0x4000 /* Enable Interrupt For Mailbox 14 */ | ||
| 2952 | #define MBIM15 0x8000 /* Enable Interrupt For Mailbox 15 */ | ||
| 2953 | |||
| 2954 | /* CAN_MBIM2 Masks */ | ||
| 2955 | #define MBIM16 0x0001 /* Enable Interrupt For Mailbox 16 */ | ||
| 2956 | #define MBIM17 0x0002 /* Enable Interrupt For Mailbox 17 */ | ||
| 2957 | #define MBIM18 0x0004 /* Enable Interrupt For Mailbox 18 */ | ||
| 2958 | #define MBIM19 0x0008 /* Enable Interrupt For Mailbox 19 */ | ||
| 2959 | #define MBIM20 0x0010 /* Enable Interrupt For Mailbox 20 */ | ||
| 2960 | #define MBIM21 0x0020 /* Enable Interrupt For Mailbox 21 */ | ||
| 2961 | #define MBIM22 0x0040 /* Enable Interrupt For Mailbox 22 */ | ||
| 2962 | #define MBIM23 0x0080 /* Enable Interrupt For Mailbox 23 */ | ||
| 2963 | #define MBIM24 0x0100 /* Enable Interrupt For Mailbox 24 */ | ||
| 2964 | #define MBIM25 0x0200 /* Enable Interrupt For Mailbox 25 */ | ||
| 2965 | #define MBIM26 0x0400 /* Enable Interrupt For Mailbox 26 */ | ||
| 2966 | #define MBIM27 0x0800 /* Enable Interrupt For Mailbox 27 */ | ||
| 2967 | #define MBIM28 0x1000 /* Enable Interrupt For Mailbox 28 */ | ||
| 2968 | #define MBIM29 0x2000 /* Enable Interrupt For Mailbox 29 */ | ||
| 2969 | #define MBIM30 0x4000 /* Enable Interrupt For Mailbox 30 */ | ||
| 2970 | #define MBIM31 0x8000 /* Enable Interrupt For Mailbox 31 */ | ||
| 2971 | |||
| 2972 | /* CAN_GIM Masks */ | ||
| 2973 | #define EWTIM 0x0001 /* Enable TX Error Count Interrupt */ | ||
| 2974 | #define EWRIM 0x0002 /* Enable RX Error Count Interrupt */ | ||
| 2975 | #define EPIM 0x0004 /* Enable Error-Passive Mode Interrupt */ | ||
| 2976 | #define BOIM 0x0008 /* Enable Bus Off Interrupt */ | ||
| 2977 | #define WUIM 0x0010 /* Enable Wake-Up Interrupt */ | ||
| 2978 | #define UIAIM 0x0020 /* Enable Access To Unimplemented Address Interrupt */ | ||
| 2979 | #define AAIM 0x0040 /* Enable Abort Acknowledge Interrupt */ | ||
| 2980 | #define RMLIM 0x0080 /* Enable RX Message Lost Interrupt */ | ||
| 2981 | #define UCEIM 0x0100 /* Enable Universal Counter Overflow Interrupt */ | ||
| 2982 | #define EXTIM 0x0200 /* Enable External Trigger Output Interrupt */ | ||
| 2983 | #define ADIM 0x0400 /* Enable Access Denied Interrupt */ | ||
| 2984 | |||
| 2985 | /* CAN_GIS Masks */ | ||
| 2986 | #define EWTIS 0x0001 /* TX Error Count IRQ Status */ | ||
| 2987 | #define EWRIS 0x0002 /* RX Error Count IRQ Status */ | ||
| 2988 | #define EPIS 0x0004 /* Error-Passive Mode IRQ Status */ | ||
| 2989 | #define BOIS 0x0008 /* Bus Off IRQ Status */ | ||
| 2990 | #define WUIS 0x0010 /* Wake-Up IRQ Status */ | ||
| 2991 | #define UIAIS 0x0020 /* Access To Unimplemented Address IRQ Status */ | ||
| 2992 | #define AAIS 0x0040 /* Abort Acknowledge IRQ Status */ | ||
| 2993 | #define RMLIS 0x0080 /* RX Message Lost IRQ Status */ | ||
| 2994 | #define UCEIS 0x0100 /* Universal Counter Overflow IRQ Status */ | ||
| 2995 | #define EXTIS 0x0200 /* External Trigger Output IRQ Status */ | ||
| 2996 | #define ADIS 0x0400 /* Access Denied IRQ Status */ | ||
| 2997 | |||
| 2998 | /* CAN_GIF Masks */ | ||
| 2999 | #define EWTIF 0x0001 /* TX Error Count IRQ Flag */ | ||
| 3000 | #define EWRIF 0x0002 /* RX Error Count IRQ Flag */ | ||
| 3001 | #define EPIF 0x0004 /* Error-Passive Mode IRQ Flag */ | ||
| 3002 | #define BOIF 0x0008 /* Bus Off IRQ Flag */ | ||
| 3003 | #define WUIF 0x0010 /* Wake-Up IRQ Flag */ | ||
| 3004 | #define UIAIF 0x0020 /* Access To Unimplemented Address IRQ Flag */ | ||
| 3005 | #define AAIF 0x0040 /* Abort Acknowledge IRQ Flag */ | ||
| 3006 | #define RMLIF 0x0080 /* RX Message Lost IRQ Flag */ | ||
| 3007 | #define UCEIF 0x0100 /* Universal Counter Overflow IRQ Flag */ | ||
| 3008 | #define EXTIF 0x0200 /* External Trigger Output IRQ Flag */ | ||
| 3009 | #define ADIF 0x0400 /* Access Denied IRQ Flag */ | ||
| 3010 | |||
| 3011 | /* CAN_UCCNF Masks */ | ||
| 3012 | #define UCCNF 0x000F /* Universal Counter Mode */ | ||
| 3013 | #define UC_STAMP 0x0001 /* Timestamp Mode */ | ||
| 3014 | #define UC_WDOG 0x0002 /* Watchdog Mode */ | ||
| 3015 | #define UC_AUTOTX 0x0003 /* Auto-Transmit Mode */ | ||
| 3016 | #define UC_ERROR 0x0006 /* CAN Error Frame Count */ | ||
| 3017 | #define UC_OVER 0x0007 /* CAN Overload Frame Count */ | ||
| 3018 | #define UC_LOST 0x0008 /* Arbitration Lost During TX Count */ | ||
| 3019 | #define UC_AA 0x0009 /* TX Abort Count */ | ||
| 3020 | #define UC_TA 0x000A /* TX Successful Count */ | ||
| 3021 | #define UC_REJECT 0x000B /* RX Message Rejected Count */ | ||
| 3022 | #define UC_RML 0x000C /* RX Message Lost Count */ | ||
| 3023 | #define UC_RX 0x000D /* Total Successful RX Messages Count */ | ||
| 3024 | #define UC_RMP 0x000E /* Successful RX W/Matching ID Count */ | ||
| 3025 | #define UC_ALL 0x000F /* Correct Message On CAN Bus Line Count */ | ||
| 3026 | #define UCRC 0x0020 /* Universal Counter Reload/Clear */ | ||
| 3027 | #define UCCT 0x0040 /* Universal Counter CAN Trigger */ | ||
| 3028 | #define UCE 0x0080 /* Universal Counter Enable */ | ||
| 3029 | |||
| 3030 | /* CAN_ESR Masks */ | ||
| 3031 | #define ACKE 0x0004 /* Acknowledge Error */ | ||
| 3032 | #define SER 0x0008 /* Stuff Error */ | ||
| 3033 | #define CRCE 0x0010 /* CRC Error */ | ||
| 3034 | #define SA0 0x0020 /* Stuck At Dominant Error */ | ||
| 3035 | #define BEF 0x0040 /* Bit Error Flag */ | ||
| 3036 | #define FER 0x0080 /* Form Error Flag */ | ||
| 3037 | |||
| 3038 | /* CAN_EWR Masks */ | ||
| 3039 | #define EWLREC 0x00FF /* RX Error Count Limit (For EWRIS) */ | ||
| 3040 | #define EWLTEC 0xFF00 /* TX Error Count Limit (For EWTIS) */ | ||
| 3041 | |||
| 3042 | #endif /* _DEF_BF539_H */ | 2421 | #endif /* _DEF_BF539_H */ |
diff --git a/arch/blackfin/mach-bf548/boards/cm_bf548.c b/arch/blackfin/mach-bf548/boards/cm_bf548.c index f60c333fec66..dbb6b1d83f6d 100644 --- a/arch/blackfin/mach-bf548/boards/cm_bf548.c +++ b/arch/blackfin/mach-bf548/boards/cm_bf548.c | |||
| @@ -498,6 +498,10 @@ static struct musb_hdrc_config musb_config = { | |||
| 498 | .num_eps = 8, | 498 | .num_eps = 8, |
| 499 | .dma_channels = 8, | 499 | .dma_channels = 8, |
| 500 | .gpio_vrsel = GPIO_PH6, | 500 | .gpio_vrsel = GPIO_PH6, |
| 501 | /* Some custom boards need to be active low, just set it to "0" | ||
| 502 | * if it is the case. | ||
| 503 | */ | ||
| 504 | .gpio_vrsel_active = 1, | ||
| 501 | }; | 505 | }; |
| 502 | 506 | ||
| 503 | static struct musb_hdrc_platform_data musb_plat = { | 507 | static struct musb_hdrc_platform_data musb_plat = { |
diff --git a/arch/blackfin/mach-bf548/boards/ezkit.c b/arch/blackfin/mach-bf548/boards/ezkit.c index 06919db00a74..6fcfb9187c35 100644 --- a/arch/blackfin/mach-bf548/boards/ezkit.c +++ b/arch/blackfin/mach-bf548/boards/ezkit.c | |||
| @@ -603,6 +603,10 @@ static struct musb_hdrc_config musb_config = { | |||
| 603 | .num_eps = 8, | 603 | .num_eps = 8, |
| 604 | .dma_channels = 8, | 604 | .dma_channels = 8, |
| 605 | .gpio_vrsel = GPIO_PE7, | 605 | .gpio_vrsel = GPIO_PE7, |
| 606 | /* Some custom boards need to be active low, just set it to "0" | ||
| 607 | * if it is the case. | ||
| 608 | */ | ||
| 609 | .gpio_vrsel_active = 1, | ||
| 606 | }; | 610 | }; |
| 607 | 611 | ||
| 608 | static struct musb_hdrc_platform_data musb_plat = { | 612 | static struct musb_hdrc_platform_data musb_plat = { |
diff --git a/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h b/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h index ab04d137fd8b..0ed06c2366fe 100644 --- a/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h +++ b/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h | |||
| @@ -2104,677 +2104,6 @@ | |||
| 2104 | 2104 | ||
| 2105 | #define ECCCNT 0x3ff /* Transfer Count */ | 2105 | #define ECCCNT 0x3ff /* Transfer Count */ |
| 2106 | 2106 | ||
| 2107 | /* Bit masks for CAN0_CONTROL */ | ||
| 2108 | |||
| 2109 | #define SRS 0x1 /* Software Reset */ | ||
| 2110 | #define DNM 0x2 /* DeviceNet Mode */ | ||
| 2111 | #define ABO 0x4 /* Auto Bus On */ | ||
| 2112 | #define WBA 0x10 /* Wakeup On CAN Bus Activity */ | ||
| 2113 | #define SMR 0x20 /* Sleep Mode Request */ | ||
| 2114 | #define CSR 0x40 /* CAN Suspend Mode Request */ | ||
| 2115 | #define CCR 0x80 /* CAN Configuration Mode Request */ | ||
| 2116 | |||
| 2117 | /* Bit masks for CAN0_STATUS */ | ||
| 2118 | |||
| 2119 | #define WT 0x1 /* CAN Transmit Warning Flag */ | ||
| 2120 | #define WR 0x2 /* CAN Receive Warning Flag */ | ||
| 2121 | #define EP 0x4 /* CAN Error Passive Mode */ | ||
| 2122 | #define EBO 0x8 /* CAN Error Bus Off Mode */ | ||
| 2123 | #define CSA 0x40 /* CAN Suspend Mode Acknowledge */ | ||
| 2124 | #define CCA 0x80 /* CAN Configuration Mode Acknowledge */ | ||
| 2125 | #define MBPTR 0x1f00 /* Mailbox Pointer */ | ||
| 2126 | #define TRM 0x4000 /* Transmit Mode Status */ | ||
| 2127 | #define REC 0x8000 /* Receive Mode Status */ | ||
| 2128 | |||
| 2129 | /* Bit masks for CAN0_DEBUG */ | ||
| 2130 | |||
| 2131 | #define DEC 0x1 /* Disable Transmit/Receive Error Counters */ | ||
| 2132 | #define DRI 0x2 /* Disable CANRX Input Pin */ | ||
| 2133 | #define DTO 0x4 /* Disable CANTX Output Pin */ | ||
| 2134 | #define DIL 0x8 /* Disable Internal Loop */ | ||
| 2135 | #define MAA 0x10 /* Mode Auto-Acknowledge */ | ||
| 2136 | #define MRB 0x20 /* Mode Read Back */ | ||
| 2137 | #define CDE 0x8000 /* CAN Debug Mode Enable */ | ||
| 2138 | |||
| 2139 | /* Bit masks for CAN0_CLOCK */ | ||
| 2140 | |||
| 2141 | #define BRP 0x3ff /* CAN Bit Rate Prescaler */ | ||
| 2142 | |||
| 2143 | /* Bit masks for CAN0_TIMING */ | ||
| 2144 | |||
| 2145 | #define SJW 0x300 /* Synchronization Jump Width */ | ||
| 2146 | #define SAM 0x80 /* Sampling */ | ||
| 2147 | #define TSEG2 0x70 /* Time Segment 2 */ | ||
| 2148 | #define TSEG1 0xf /* Time Segment 1 */ | ||
| 2149 | |||
| 2150 | /* Bit masks for CAN0_INTR */ | ||
| 2151 | |||
| 2152 | #define CANRX 0x80 /* Serial Input From Transceiver */ | ||
| 2153 | #define CANTX 0x40 /* Serial Output To Transceiver */ | ||
| 2154 | #define SMACK 0x8 /* Sleep Mode Acknowledge */ | ||
| 2155 | #define GIRQ 0x4 /* Global Interrupt Request Status */ | ||
| 2156 | #define MBTIRQ 0x2 /* Mailbox Transmit Interrupt Request */ | ||
| 2157 | #define MBRIRQ 0x1 /* Mailbox Receive Interrupt Request */ | ||
| 2158 | |||
| 2159 | /* Bit masks for CAN0_GIM */ | ||
| 2160 | |||
| 2161 | #define EWTIM 0x1 /* Error Warning Transmit Interrupt Mask */ | ||
| 2162 | #define EWRIM 0x2 /* Error Warning Receive Interrupt Mask */ | ||
| 2163 | #define EPIM 0x4 /* Error Passive Interrupt Mask */ | ||
| 2164 | #define BOIM 0x8 /* Bus Off Interrupt Mask */ | ||
| 2165 | #define WUIM 0x10 /* Wakeup Interrupt Mask */ | ||
| 2166 | #define UIAIM 0x20 /* Unimplemented Address Interrupt Mask */ | ||
| 2167 | #define AAIM 0x40 /* Abort Acknowledge Interrupt Mask */ | ||
| 2168 | #define RMLIM 0x80 /* Receive Message Lost Interrupt Mask */ | ||
| 2169 | #define UCEIM 0x100 /* Universal Counter Exceeded Interrupt Mask */ | ||
| 2170 | #define ADIM 0x400 /* Access Denied Interrupt Mask */ | ||
| 2171 | |||
| 2172 | /* Bit masks for CAN0_GIS */ | ||
| 2173 | |||
| 2174 | #define EWTIS 0x1 /* Error Warning Transmit Interrupt Status */ | ||
| 2175 | #define EWRIS 0x2 /* Error Warning Receive Interrupt Status */ | ||
| 2176 | #define EPIS 0x4 /* Error Passive Interrupt Status */ | ||
| 2177 | #define BOIS 0x8 /* Bus Off Interrupt Status */ | ||
| 2178 | #define WUIS 0x10 /* Wakeup Interrupt Status */ | ||
| 2179 | #define UIAIS 0x20 /* Unimplemented Address Interrupt Status */ | ||
| 2180 | #define AAIS 0x40 /* Abort Acknowledge Interrupt Status */ | ||
| 2181 | #define RMLIS 0x80 /* Receive Message Lost Interrupt Status */ | ||
| 2182 | #define UCEIS 0x100 /* Universal Counter Exceeded Interrupt Status */ | ||
| 2183 | #define ADIS 0x400 /* Access Denied Interrupt Status */ | ||
| 2184 | |||
| 2185 | /* Bit masks for CAN0_GIF */ | ||
| 2186 | |||
| 2187 | #define EWTIF 0x1 /* Error Warning Transmit Interrupt Flag */ | ||
| 2188 | #define EWRIF 0x2 /* Error Warning Receive Interrupt Flag */ | ||
| 2189 | #define EPIF 0x4 /* Error Passive Interrupt Flag */ | ||
| 2190 | #define BOIF 0x8 /* Bus Off Interrupt Flag */ | ||
| 2191 | #define WUIF 0x10 /* Wakeup Interrupt Flag */ | ||
| 2192 | #define UIAIF 0x20 /* Unimplemented Address Interrupt Flag */ | ||
| 2193 | #define AAIF 0x40 /* Abort Acknowledge Interrupt Flag */ | ||
| 2194 | #define RMLIF 0x80 /* Receive Message Lost Interrupt Flag */ | ||
| 2195 | #define UCEIF 0x100 /* Universal Counter Exceeded Interrupt Flag */ | ||
| 2196 | #define ADIF 0x400 /* Access Denied Interrupt Flag */ | ||
| 2197 | |||
| 2198 | /* Bit masks for CAN0_MBTD */ | ||
| 2199 | |||
| 2200 | #define TDR 0x80 /* Temporary Disable Request */ | ||
| 2201 | #define TDA 0x40 /* Temporary Disable Acknowledge */ | ||
| 2202 | #define TDPTR 0x1f /* Temporary Disable Pointer */ | ||
| 2203 | |||
| 2204 | /* Bit masks for CAN0_UCCNF */ | ||
| 2205 | |||
| 2206 | #define UCCNF 0xf /* Universal Counter Configuration */ | ||
| 2207 | #define UCRC 0x20 /* Universal Counter Reload/Clear */ | ||
| 2208 | #define UCCT 0x40 /* Universal Counter CAN Trigger */ | ||
| 2209 | #define UCE 0x80 /* Universal Counter Enable */ | ||
| 2210 | |||
| 2211 | /* Bit masks for CAN0_CEC */ | ||
| 2212 | |||
| 2213 | #define RXECNT 0xff /* Receive Error Counter */ | ||
| 2214 | #define TXECNT 0xff00 /* Transmit Error Counter */ | ||
| 2215 | |||
| 2216 | /* Bit masks for CAN0_ESR */ | ||
| 2217 | |||
| 2218 | #define FER 0x80 /* Form Error */ | ||
| 2219 | #define BEF 0x40 /* Bit Error Flag */ | ||
| 2220 | #define SA0 0x20 /* Stuck At Dominant */ | ||
| 2221 | #define CRCE 0x10 /* CRC Error */ | ||
| 2222 | #define SER 0x8 /* Stuff Bit Error */ | ||
| 2223 | #define ACKE 0x4 /* Acknowledge Error */ | ||
| 2224 | |||
| 2225 | /* Bit masks for CAN0_EWR */ | ||
| 2226 | |||
| 2227 | #define EWLTEC 0xff00 /* Transmit Error Warning Limit */ | ||
| 2228 | #define EWLREC 0xff /* Receive Error Warning Limit */ | ||
| 2229 | |||
| 2230 | /* Bit masks for CAN0_AMxx_H */ | ||
| 2231 | |||
| 2232 | #define FDF 0x8000 /* Filter On Data Field */ | ||
| 2233 | #define FMD 0x4000 /* Full Mask Data */ | ||
| 2234 | #define AMIDE 0x2000 /* Acceptance Mask Identifier Extension */ | ||
| 2235 | #define BASEID 0x1ffc /* Base Identifier */ | ||
| 2236 | #define EXTID_HI 0x3 /* Extended Identifier High Bits */ | ||
| 2237 | |||
| 2238 | /* Bit masks for CAN0_AMxx_L */ | ||
| 2239 | |||
| 2240 | #define EXTID_LO 0xffff /* Extended Identifier Low Bits */ | ||
| 2241 | #define DFM 0xffff /* Data Field Mask */ | ||
| 2242 | |||
| 2243 | /* Bit masks for CAN0_MBxx_ID1 */ | ||
| 2244 | |||
| 2245 | #define AME 0x8000 /* Acceptance Mask Enable */ | ||
| 2246 | #define RTR 0x4000 /* Remote Transmission Request */ | ||
| 2247 | #define IDE 0x2000 /* Identifier Extension */ | ||
| 2248 | #define BASEID 0x1ffc /* Base Identifier */ | ||
| 2249 | #define EXTID_HI 0x3 /* Extended Identifier High Bits */ | ||
| 2250 | |||
| 2251 | /* Bit masks for CAN0_MBxx_ID0 */ | ||
| 2252 | |||
| 2253 | #define EXTID_LO 0xffff /* Extended Identifier Low Bits */ | ||
| 2254 | #define DFM 0xffff /* Data Field Mask */ | ||
| 2255 | |||
| 2256 | /* Bit masks for CAN0_MBxx_TIMESTAMP */ | ||
| 2257 | |||
| 2258 | #define TSV 0xffff /* Time Stamp Value */ | ||
| 2259 | |||
| 2260 | /* Bit masks for CAN0_MBxx_LENGTH */ | ||
| 2261 | |||
| 2262 | #define DLC 0xf /* Data Length Code */ | ||
| 2263 | |||
| 2264 | /* Bit masks for CAN0_MBxx_DATA3 */ | ||
| 2265 | |||
| 2266 | #define CAN_BYTE0 0xff00 /* Data Field Byte 0 */ | ||
| 2267 | #define CAN_BYTE1 0xff /* Data Field Byte 1 */ | ||
| 2268 | |||
| 2269 | /* Bit masks for CAN0_MBxx_DATA2 */ | ||
| 2270 | |||
| 2271 | #define CAN_BYTE2 0xff00 /* Data Field Byte 2 */ | ||
| 2272 | #define CAN_BYTE3 0xff /* Data Field Byte 3 */ | ||
| 2273 | |||
| 2274 | /* Bit masks for CAN0_MBxx_DATA1 */ | ||
| 2275 | |||
| 2276 | #define CAN_BYTE4 0xff00 /* Data Field Byte 4 */ | ||
| 2277 | #define CAN_BYTE5 0xff /* Data Field Byte 5 */ | ||
| 2278 | |||
| 2279 | /* Bit masks for CAN0_MBxx_DATA0 */ | ||
| 2280 | |||
| 2281 | #define CAN_BYTE6 0xff00 /* Data Field Byte 6 */ | ||
| 2282 | #define CAN_BYTE7 0xff /* Data Field Byte 7 */ | ||
| 2283 | |||
| 2284 | /* Bit masks for CAN0_MC1 */ | ||
| 2285 | |||
| 2286 | #define MC0 0x1 /* Mailbox 0 Enable */ | ||
| 2287 | #define MC1 0x2 /* Mailbox 1 Enable */ | ||
| 2288 | #define MC2 0x4 /* Mailbox 2 Enable */ | ||
| 2289 | #define MC3 0x8 /* Mailbox 3 Enable */ | ||
| 2290 | #define MC4 0x10 /* Mailbox 4 Enable */ | ||
| 2291 | #define MC5 0x20 /* Mailbox 5 Enable */ | ||
| 2292 | #define MC6 0x40 /* Mailbox 6 Enable */ | ||
| 2293 | #define MC7 0x80 /* Mailbox 7 Enable */ | ||
| 2294 | #define MC8 0x100 /* Mailbox 8 Enable */ | ||
| 2295 | #define MC9 0x200 /* Mailbox 9 Enable */ | ||
| 2296 | #define MC10 0x400 /* Mailbox 10 Enable */ | ||
| 2297 | #define MC11 0x800 /* Mailbox 11 Enable */ | ||
| 2298 | #define MC12 0x1000 /* Mailbox 12 Enable */ | ||
| 2299 | #define MC13 0x2000 /* Mailbox 13 Enable */ | ||
| 2300 | #define MC14 0x4000 /* Mailbox 14 Enable */ | ||
| 2301 | #define MC15 0x8000 /* Mailbox 15 Enable */ | ||
| 2302 | |||
| 2303 | /* Bit masks for CAN0_MC2 */ | ||
| 2304 | |||
| 2305 | #define MC16 0x1 /* Mailbox 16 Enable */ | ||
| 2306 | #define MC17 0x2 /* Mailbox 17 Enable */ | ||
| 2307 | #define MC18 0x4 /* Mailbox 18 Enable */ | ||
| 2308 | #define MC19 0x8 /* Mailbox 19 Enable */ | ||
| 2309 | #define MC20 0x10 /* Mailbox 20 Enable */ | ||
| 2310 | #define MC21 0x20 /* Mailbox 21 Enable */ | ||
| 2311 | #define MC22 0x40 /* Mailbox 22 Enable */ | ||
| 2312 | #define MC23 0x80 /* Mailbox 23 Enable */ | ||
| 2313 | #define MC24 0x100 /* Mailbox 24 Enable */ | ||
| 2314 | #define MC25 0x200 /* Mailbox 25 Enable */ | ||
| 2315 | #define MC26 0x400 /* Mailbox 26 Enable */ | ||
| 2316 | #define MC27 0x800 /* Mailbox 27 Enable */ | ||
| 2317 | #define MC28 0x1000 /* Mailbox 28 Enable */ | ||
| 2318 | #define MC29 0x2000 /* Mailbox 29 Enable */ | ||
| 2319 | #define MC30 0x4000 /* Mailbox 30 Enable */ | ||
| 2320 | #define MC31 0x8000 /* Mailbox 31 Enable */ | ||
| 2321 | |||
| 2322 | /* Bit masks for CAN0_MD1 */ | ||
| 2323 | |||
| 2324 | #define MD0 0x1 /* Mailbox 0 Receive Enable */ | ||
| 2325 | #define MD1 0x2 /* Mailbox 1 Receive Enable */ | ||
| 2326 | #define MD2 0x4 /* Mailbox 2 Receive Enable */ | ||
| 2327 | #define MD3 0x8 /* Mailbox 3 Receive Enable */ | ||
| 2328 | #define MD4 0x10 /* Mailbox 4 Receive Enable */ | ||
| 2329 | #define MD5 0x20 /* Mailbox 5 Receive Enable */ | ||
| 2330 | #define MD6 0x40 /* Mailbox 6 Receive Enable */ | ||
| 2331 | #define MD7 0x80 /* Mailbox 7 Receive Enable */ | ||
| 2332 | #define MD8 0x100 /* Mailbox 8 Receive Enable */ | ||
| 2333 | #define MD9 0x200 /* Mailbox 9 Receive Enable */ | ||
| 2334 | #define MD10 0x400 /* Mailbox 10 Receive Enable */ | ||
| 2335 | #define MD11 0x800 /* Mailbox 11 Receive Enable */ | ||
| 2336 | #define MD12 0x1000 /* Mailbox 12 Receive Enable */ | ||
| 2337 | #define MD13 0x2000 /* Mailbox 13 Receive Enable */ | ||
| 2338 | #define MD14 0x4000 /* Mailbox 14 Receive Enable */ | ||
| 2339 | #define MD15 0x8000 /* Mailbox 15 Receive Enable */ | ||
| 2340 | |||
| 2341 | /* Bit masks for CAN0_MD2 */ | ||
| 2342 | |||
| 2343 | #define MD16 0x1 /* Mailbox 16 Receive Enable */ | ||
| 2344 | #define MD17 0x2 /* Mailbox 17 Receive Enable */ | ||
| 2345 | #define MD18 0x4 /* Mailbox 18 Receive Enable */ | ||
| 2346 | #define MD19 0x8 /* Mailbox 19 Receive Enable */ | ||
| 2347 | #define MD20 0x10 /* Mailbox 20 Receive Enable */ | ||
| 2348 | #define MD21 0x20 /* Mailbox 21 Receive Enable */ | ||
| 2349 | #define MD22 0x40 /* Mailbox 22 Receive Enable */ | ||
| 2350 | #define MD23 0x80 /* Mailbox 23 Receive Enable */ | ||
| 2351 | #define MD24 0x100 /* Mailbox 24 Receive Enable */ | ||
| 2352 | #define MD25 0x200 /* Mailbox 25 Receive Enable */ | ||
| 2353 | #define MD26 0x400 /* Mailbox 26 Receive Enable */ | ||
| 2354 | #define MD27 0x800 /* Mailbox 27 Receive Enable */ | ||
| 2355 | #define MD28 0x1000 /* Mailbox 28 Receive Enable */ | ||
| 2356 | #define MD29 0x2000 /* Mailbox 29 Receive Enable */ | ||
| 2357 | #define MD30 0x4000 /* Mailbox 30 Receive Enable */ | ||
| 2358 | #define MD31 0x8000 /* Mailbox 31 Receive Enable */ | ||
| 2359 | |||
| 2360 | /* Bit masks for CAN0_RMP1 */ | ||
| 2361 | |||
| 2362 | #define RMP0 0x1 /* Mailbox 0 Receive Message Pending */ | ||
| 2363 | #define RMP1 0x2 /* Mailbox 1 Receive Message Pending */ | ||
| 2364 | #define RMP2 0x4 /* Mailbox 2 Receive Message Pending */ | ||
| 2365 | #define RMP3 0x8 /* Mailbox 3 Receive Message Pending */ | ||
| 2366 | #define RMP4 0x10 /* Mailbox 4 Receive Message Pending */ | ||
| 2367 | #define RMP5 0x20 /* Mailbox 5 Receive Message Pending */ | ||
| 2368 | #define RMP6 0x40 /* Mailbox 6 Receive Message Pending */ | ||
| 2369 | #define RMP7 0x80 /* Mailbox 7 Receive Message Pending */ | ||
| 2370 | #define RMP8 0x100 /* Mailbox 8 Receive Message Pending */ | ||
| 2371 | #define RMP9 0x200 /* Mailbox 9 Receive Message Pending */ | ||
| 2372 | #define RMP10 0x400 /* Mailbox 10 Receive Message Pending */ | ||
| 2373 | #define RMP11 0x800 /* Mailbox 11 Receive Message Pending */ | ||
| 2374 | #define RMP12 0x1000 /* Mailbox 12 Receive Message Pending */ | ||
| 2375 | #define RMP13 0x2000 /* Mailbox 13 Receive Message Pending */ | ||
| 2376 | #define RMP14 0x4000 /* Mailbox 14 Receive Message Pending */ | ||
| 2377 | #define RMP15 0x8000 /* Mailbox 15 Receive Message Pending */ | ||
| 2378 | |||
| 2379 | /* Bit masks for CAN0_RMP2 */ | ||
| 2380 | |||
| 2381 | #define RMP16 0x1 /* Mailbox 16 Receive Message Pending */ | ||
| 2382 | #define RMP17 0x2 /* Mailbox 17 Receive Message Pending */ | ||
| 2383 | #define RMP18 0x4 /* Mailbox 18 Receive Message Pending */ | ||
| 2384 | #define RMP19 0x8 /* Mailbox 19 Receive Message Pending */ | ||
| 2385 | #define RMP20 0x10 /* Mailbox 20 Receive Message Pending */ | ||
| 2386 | #define RMP21 0x20 /* Mailbox 21 Receive Message Pending */ | ||
| 2387 | #define RMP22 0x40 /* Mailbox 22 Receive Message Pending */ | ||
| 2388 | #define RMP23 0x80 /* Mailbox 23 Receive Message Pending */ | ||
| 2389 | #define RMP24 0x100 /* Mailbox 24 Receive Message Pending */ | ||
| 2390 | #define RMP25 0x200 /* Mailbox 25 Receive Message Pending */ | ||
| 2391 | #define RMP26 0x400 /* Mailbox 26 Receive Message Pending */ | ||
| 2392 | #define RMP27 0x800 /* Mailbox 27 Receive Message Pending */ | ||
| 2393 | #define RMP28 0x1000 /* Mailbox 28 Receive Message Pending */ | ||
| 2394 | #define RMP29 0x2000 /* Mailbox 29 Receive Message Pending */ | ||
| 2395 | #define RMP30 0x4000 /* Mailbox 30 Receive Message Pending */ | ||
| 2396 | #define RMP31 0x8000 /* Mailbox 31 Receive Message Pending */ | ||
| 2397 | |||
| 2398 | /* Bit masks for CAN0_RML1 */ | ||
| 2399 | |||
| 2400 | #define RML0 0x1 /* Mailbox 0 Receive Message Lost */ | ||
| 2401 | #define RML1 0x2 /* Mailbox 1 Receive Message Lost */ | ||
| 2402 | #define RML2 0x4 /* Mailbox 2 Receive Message Lost */ | ||
| 2403 | #define RML3 0x8 /* Mailbox 3 Receive Message Lost */ | ||
| 2404 | #define RML4 0x10 /* Mailbox 4 Receive Message Lost */ | ||
| 2405 | #define RML5 0x20 /* Mailbox 5 Receive Message Lost */ | ||
| 2406 | #define RML6 0x40 /* Mailbox 6 Receive Message Lost */ | ||
| 2407 | #define RML7 0x80 /* Mailbox 7 Receive Message Lost */ | ||
| 2408 | #define RML8 0x100 /* Mailbox 8 Receive Message Lost */ | ||
| 2409 | #define RML9 0x200 /* Mailbox 9 Receive Message Lost */ | ||
| 2410 | #define RML10 0x400 /* Mailbox 10 Receive Message Lost */ | ||
| 2411 | #define RML11 0x800 /* Mailbox 11 Receive Message Lost */ | ||
| 2412 | #define RML12 0x1000 /* Mailbox 12 Receive Message Lost */ | ||
| 2413 | #define RML13 0x2000 /* Mailbox 13 Receive Message Lost */ | ||
| 2414 | #define RML14 0x4000 /* Mailbox 14 Receive Message Lost */ | ||
| 2415 | #define RML15 0x8000 /* Mailbox 15 Receive Message Lost */ | ||
| 2416 | |||
| 2417 | /* Bit masks for CAN0_RML2 */ | ||
| 2418 | |||
| 2419 | #define RML16 0x1 /* Mailbox 16 Receive Message Lost */ | ||
| 2420 | #define RML17 0x2 /* Mailbox 17 Receive Message Lost */ | ||
| 2421 | #define RML18 0x4 /* Mailbox 18 Receive Message Lost */ | ||
| 2422 | #define RML19 0x8 /* Mailbox 19 Receive Message Lost */ | ||
| 2423 | #define RML20 0x10 /* Mailbox 20 Receive Message Lost */ | ||
| 2424 | #define RML21 0x20 /* Mailbox 21 Receive Message Lost */ | ||
| 2425 | #define RML22 0x40 /* Mailbox 22 Receive Message Lost */ | ||
| 2426 | #define RML23 0x80 /* Mailbox 23 Receive Message Lost */ | ||
| 2427 | #define RML24 0x100 /* Mailbox 24 Receive Message Lost */ | ||
| 2428 | #define RML25 0x200 /* Mailbox 25 Receive Message Lost */ | ||
| 2429 | #define RML26 0x400 /* Mailbox 26 Receive Message Lost */ | ||
| 2430 | #define RML27 0x800 /* Mailbox 27 Receive Message Lost */ | ||
| 2431 | #define RML28 0x1000 /* Mailbox 28 Receive Message Lost */ | ||
| 2432 | #define RML29 0x2000 /* Mailbox 29 Receive Message Lost */ | ||
| 2433 | #define RML30 0x4000 /* Mailbox 30 Receive Message Lost */ | ||
| 2434 | #define RML31 0x8000 /* Mailbox 31 Receive Message Lost */ | ||
| 2435 | |||
| 2436 | /* Bit masks for CAN0_OPSS1 */ | ||
| 2437 | |||
| 2438 | #define OPSS0 0x1 /* Mailbox 0 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2439 | #define OPSS1 0x2 /* Mailbox 1 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2440 | #define OPSS2 0x4 /* Mailbox 2 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2441 | #define OPSS3 0x8 /* Mailbox 3 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2442 | #define OPSS4 0x10 /* Mailbox 4 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2443 | #define OPSS5 0x20 /* Mailbox 5 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2444 | #define OPSS6 0x40 /* Mailbox 6 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2445 | #define OPSS7 0x80 /* Mailbox 7 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2446 | #define OPSS8 0x100 /* Mailbox 8 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2447 | #define OPSS9 0x200 /* Mailbox 9 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2448 | #define OPSS10 0x400 /* Mailbox 10 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2449 | #define OPSS11 0x800 /* Mailbox 11 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2450 | #define OPSS12 0x1000 /* Mailbox 12 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2451 | #define OPSS13 0x2000 /* Mailbox 13 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2452 | #define OPSS14 0x4000 /* Mailbox 14 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2453 | #define OPSS15 0x8000 /* Mailbox 15 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2454 | |||
| 2455 | /* Bit masks for CAN0_OPSS2 */ | ||
| 2456 | |||
| 2457 | #define OPSS16 0x1 /* Mailbox 16 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2458 | #define OPSS17 0x2 /* Mailbox 17 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2459 | #define OPSS18 0x4 /* Mailbox 18 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2460 | #define OPSS19 0x8 /* Mailbox 19 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2461 | #define OPSS20 0x10 /* Mailbox 20 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2462 | #define OPSS21 0x20 /* Mailbox 21 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2463 | #define OPSS22 0x40 /* Mailbox 22 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2464 | #define OPSS23 0x80 /* Mailbox 23 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2465 | #define OPSS24 0x100 /* Mailbox 24 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2466 | #define OPSS25 0x200 /* Mailbox 25 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2467 | #define OPSS26 0x400 /* Mailbox 26 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2468 | #define OPSS27 0x800 /* Mailbox 27 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2469 | #define OPSS28 0x1000 /* Mailbox 28 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2470 | #define OPSS29 0x2000 /* Mailbox 29 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2471 | #define OPSS30 0x4000 /* Mailbox 30 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2472 | #define OPSS31 0x8000 /* Mailbox 31 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2473 | |||
| 2474 | /* Bit masks for CAN0_TRS1 */ | ||
| 2475 | |||
| 2476 | #define TRS0 0x1 /* Mailbox 0 Transmit Request Set */ | ||
| 2477 | #define TRS1 0x2 /* Mailbox 1 Transmit Request Set */ | ||
| 2478 | #define TRS2 0x4 /* Mailbox 2 Transmit Request Set */ | ||
| 2479 | #define TRS3 0x8 /* Mailbox 3 Transmit Request Set */ | ||
| 2480 | #define TRS4 0x10 /* Mailbox 4 Transmit Request Set */ | ||
| 2481 | #define TRS5 0x20 /* Mailbox 5 Transmit Request Set */ | ||
| 2482 | #define TRS6 0x40 /* Mailbox 6 Transmit Request Set */ | ||
| 2483 | #define TRS7 0x80 /* Mailbox 7 Transmit Request Set */ | ||
| 2484 | #define TRS8 0x100 /* Mailbox 8 Transmit Request Set */ | ||
| 2485 | #define TRS9 0x200 /* Mailbox 9 Transmit Request Set */ | ||
| 2486 | #define TRS10 0x400 /* Mailbox 10 Transmit Request Set */ | ||
| 2487 | #define TRS11 0x800 /* Mailbox 11 Transmit Request Set */ | ||
| 2488 | #define TRS12 0x1000 /* Mailbox 12 Transmit Request Set */ | ||
| 2489 | #define TRS13 0x2000 /* Mailbox 13 Transmit Request Set */ | ||
| 2490 | #define TRS14 0x4000 /* Mailbox 14 Transmit Request Set */ | ||
| 2491 | #define TRS15 0x8000 /* Mailbox 15 Transmit Request Set */ | ||
| 2492 | |||
| 2493 | /* Bit masks for CAN0_TRS2 */ | ||
| 2494 | |||
| 2495 | #define TRS16 0x1 /* Mailbox 16 Transmit Request Set */ | ||
| 2496 | #define TRS17 0x2 /* Mailbox 17 Transmit Request Set */ | ||
| 2497 | #define TRS18 0x4 /* Mailbox 18 Transmit Request Set */ | ||
| 2498 | #define TRS19 0x8 /* Mailbox 19 Transmit Request Set */ | ||
| 2499 | #define TRS20 0x10 /* Mailbox 20 Transmit Request Set */ | ||
| 2500 | #define TRS21 0x20 /* Mailbox 21 Transmit Request Set */ | ||
| 2501 | #define TRS22 0x40 /* Mailbox 22 Transmit Request Set */ | ||
| 2502 | #define TRS23 0x80 /* Mailbox 23 Transmit Request Set */ | ||
| 2503 | #define TRS24 0x100 /* Mailbox 24 Transmit Request Set */ | ||
| 2504 | #define TRS25 0x200 /* Mailbox 25 Transmit Request Set */ | ||
| 2505 | #define TRS26 0x400 /* Mailbox 26 Transmit Request Set */ | ||
| 2506 | #define TRS27 0x800 /* Mailbox 27 Transmit Request Set */ | ||
| 2507 | #define TRS28 0x1000 /* Mailbox 28 Transmit Request Set */ | ||
| 2508 | #define TRS29 0x2000 /* Mailbox 29 Transmit Request Set */ | ||
| 2509 | #define TRS30 0x4000 /* Mailbox 30 Transmit Request Set */ | ||
| 2510 | #define TRS31 0x8000 /* Mailbox 31 Transmit Request Set */ | ||
| 2511 | |||
| 2512 | /* Bit masks for CAN0_TRR1 */ | ||
| 2513 | |||
| 2514 | #define TRR0 0x1 /* Mailbox 0 Transmit Request Reset */ | ||
| 2515 | #define TRR1 0x2 /* Mailbox 1 Transmit Request Reset */ | ||
| 2516 | #define TRR2 0x4 /* Mailbox 2 Transmit Request Reset */ | ||
| 2517 | #define TRR3 0x8 /* Mailbox 3 Transmit Request Reset */ | ||
| 2518 | #define TRR4 0x10 /* Mailbox 4 Transmit Request Reset */ | ||
| 2519 | #define TRR5 0x20 /* Mailbox 5 Transmit Request Reset */ | ||
| 2520 | #define TRR6 0x40 /* Mailbox 6 Transmit Request Reset */ | ||
| 2521 | #define TRR7 0x80 /* Mailbox 7 Transmit Request Reset */ | ||
| 2522 | #define TRR8 0x100 /* Mailbox 8 Transmit Request Reset */ | ||
| 2523 | #define TRR9 0x200 /* Mailbox 9 Transmit Request Reset */ | ||
| 2524 | #define TRR10 0x400 /* Mailbox 10 Transmit Request Reset */ | ||
| 2525 | #define TRR11 0x800 /* Mailbox 11 Transmit Request Reset */ | ||
| 2526 | #define TRR12 0x1000 /* Mailbox 12 Transmit Request Reset */ | ||
| 2527 | #define TRR13 0x2000 /* Mailbox 13 Transmit Request Reset */ | ||
| 2528 | #define TRR14 0x4000 /* Mailbox 14 Transmit Request Reset */ | ||
| 2529 | #define TRR15 0x8000 /* Mailbox 15 Transmit Request Reset */ | ||
| 2530 | |||
| 2531 | /* Bit masks for CAN0_TRR2 */ | ||
| 2532 | |||
| 2533 | #define TRR16 0x1 /* Mailbox 16 Transmit Request Reset */ | ||
| 2534 | #define TRR17 0x2 /* Mailbox 17 Transmit Request Reset */ | ||
| 2535 | #define TRR18 0x4 /* Mailbox 18 Transmit Request Reset */ | ||
| 2536 | #define TRR19 0x8 /* Mailbox 19 Transmit Request Reset */ | ||
| 2537 | #define TRR20 0x10 /* Mailbox 20 Transmit Request Reset */ | ||
| 2538 | #define TRR21 0x20 /* Mailbox 21 Transmit Request Reset */ | ||
| 2539 | #define TRR22 0x40 /* Mailbox 22 Transmit Request Reset */ | ||
| 2540 | #define TRR23 0x80 /* Mailbox 23 Transmit Request Reset */ | ||
| 2541 | #define TRR24 0x100 /* Mailbox 24 Transmit Request Reset */ | ||
| 2542 | #define TRR25 0x200 /* Mailbox 25 Transmit Request Reset */ | ||
| 2543 | #define TRR26 0x400 /* Mailbox 26 Transmit Request Reset */ | ||
| 2544 | #define TRR27 0x800 /* Mailbox 27 Transmit Request Reset */ | ||
| 2545 | #define TRR28 0x1000 /* Mailbox 28 Transmit Request Reset */ | ||
| 2546 | #define TRR29 0x2000 /* Mailbox 29 Transmit Request Reset */ | ||
| 2547 | #define TRR30 0x4000 /* Mailbox 30 Transmit Request Reset */ | ||
| 2548 | #define TRR31 0x8000 /* Mailbox 31 Transmit Request Reset */ | ||
| 2549 | |||
| 2550 | /* Bit masks for CAN0_AA1 */ | ||
| 2551 | |||
| 2552 | #define AA0 0x1 /* Mailbox 0 Abort Acknowledge */ | ||
| 2553 | #define AA1 0x2 /* Mailbox 1 Abort Acknowledge */ | ||
| 2554 | #define AA2 0x4 /* Mailbox 2 Abort Acknowledge */ | ||
| 2555 | #define AA3 0x8 /* Mailbox 3 Abort Acknowledge */ | ||
| 2556 | #define AA4 0x10 /* Mailbox 4 Abort Acknowledge */ | ||
| 2557 | #define AA5 0x20 /* Mailbox 5 Abort Acknowledge */ | ||
| 2558 | #define AA6 0x40 /* Mailbox 6 Abort Acknowledge */ | ||
| 2559 | #define AA7 0x80 /* Mailbox 7 Abort Acknowledge */ | ||
| 2560 | #define AA8 0x100 /* Mailbox 8 Abort Acknowledge */ | ||
| 2561 | #define AA9 0x200 /* Mailbox 9 Abort Acknowledge */ | ||
| 2562 | #define AA10 0x400 /* Mailbox 10 Abort Acknowledge */ | ||
| 2563 | #define AA11 0x800 /* Mailbox 11 Abort Acknowledge */ | ||
| 2564 | #define AA12 0x1000 /* Mailbox 12 Abort Acknowledge */ | ||
| 2565 | #define AA13 0x2000 /* Mailbox 13 Abort Acknowledge */ | ||
| 2566 | #define AA14 0x4000 /* Mailbox 14 Abort Acknowledge */ | ||
| 2567 | #define AA15 0x8000 /* Mailbox 15 Abort Acknowledge */ | ||
| 2568 | |||
| 2569 | /* Bit masks for CAN0_AA2 */ | ||
| 2570 | |||
| 2571 | #define AA16 0x1 /* Mailbox 16 Abort Acknowledge */ | ||
| 2572 | #define AA17 0x2 /* Mailbox 17 Abort Acknowledge */ | ||
| 2573 | #define AA18 0x4 /* Mailbox 18 Abort Acknowledge */ | ||
| 2574 | #define AA19 0x8 /* Mailbox 19 Abort Acknowledge */ | ||
| 2575 | #define AA20 0x10 /* Mailbox 20 Abort Acknowledge */ | ||
| 2576 | #define AA21 0x20 /* Mailbox 21 Abort Acknowledge */ | ||
| 2577 | #define AA22 0x40 /* Mailbox 22 Abort Acknowledge */ | ||
| 2578 | #define AA23 0x80 /* Mailbox 23 Abort Acknowledge */ | ||
| 2579 | #define AA24 0x100 /* Mailbox 24 Abort Acknowledge */ | ||
| 2580 | #define AA25 0x200 /* Mailbox 25 Abort Acknowledge */ | ||
| 2581 | #define AA26 0x400 /* Mailbox 26 Abort Acknowledge */ | ||
| 2582 | #define AA27 0x800 /* Mailbox 27 Abort Acknowledge */ | ||
| 2583 | #define AA28 0x1000 /* Mailbox 28 Abort Acknowledge */ | ||
| 2584 | #define AA29 0x2000 /* Mailbox 29 Abort Acknowledge */ | ||
| 2585 | #define AA30 0x4000 /* Mailbox 30 Abort Acknowledge */ | ||
| 2586 | #define AA31 0x8000 /* Mailbox 31 Abort Acknowledge */ | ||
| 2587 | |||
| 2588 | /* Bit masks for CAN0_TA1 */ | ||
| 2589 | |||
| 2590 | #define TA0 0x1 /* Mailbox 0 Transmit Acknowledge */ | ||
| 2591 | #define TA1 0x2 /* Mailbox 1 Transmit Acknowledge */ | ||
| 2592 | #define TA2 0x4 /* Mailbox 2 Transmit Acknowledge */ | ||
| 2593 | #define TA3 0x8 /* Mailbox 3 Transmit Acknowledge */ | ||
| 2594 | #define TA4 0x10 /* Mailbox 4 Transmit Acknowledge */ | ||
| 2595 | #define TA5 0x20 /* Mailbox 5 Transmit Acknowledge */ | ||
| 2596 | #define TA6 0x40 /* Mailbox 6 Transmit Acknowledge */ | ||
| 2597 | #define TA7 0x80 /* Mailbox 7 Transmit Acknowledge */ | ||
| 2598 | #define TA8 0x100 /* Mailbox 8 Transmit Acknowledge */ | ||
| 2599 | #define TA9 0x200 /* Mailbox 9 Transmit Acknowledge */ | ||
| 2600 | #define TA10 0x400 /* Mailbox 10 Transmit Acknowledge */ | ||
| 2601 | #define TA11 0x800 /* Mailbox 11 Transmit Acknowledge */ | ||
| 2602 | #define TA12 0x1000 /* Mailbox 12 Transmit Acknowledge */ | ||
| 2603 | #define TA13 0x2000 /* Mailbox 13 Transmit Acknowledge */ | ||
| 2604 | #define TA14 0x4000 /* Mailbox 14 Transmit Acknowledge */ | ||
| 2605 | #define TA15 0x8000 /* Mailbox 15 Transmit Acknowledge */ | ||
| 2606 | |||
| 2607 | /* Bit masks for CAN0_TA2 */ | ||
| 2608 | |||
| 2609 | #define TA16 0x1 /* Mailbox 16 Transmit Acknowledge */ | ||
| 2610 | #define TA17 0x2 /* Mailbox 17 Transmit Acknowledge */ | ||
| 2611 | #define TA18 0x4 /* Mailbox 18 Transmit Acknowledge */ | ||
| 2612 | #define TA19 0x8 /* Mailbox 19 Transmit Acknowledge */ | ||
| 2613 | #define TA20 0x10 /* Mailbox 20 Transmit Acknowledge */ | ||
| 2614 | #define TA21 0x20 /* Mailbox 21 Transmit Acknowledge */ | ||
| 2615 | #define TA22 0x40 /* Mailbox 22 Transmit Acknowledge */ | ||
| 2616 | #define TA23 0x80 /* Mailbox 23 Transmit Acknowledge */ | ||
| 2617 | #define TA24 0x100 /* Mailbox 24 Transmit Acknowledge */ | ||
| 2618 | #define TA25 0x200 /* Mailbox 25 Transmit Acknowledge */ | ||
| 2619 | #define TA26 0x400 /* Mailbox 26 Transmit Acknowledge */ | ||
| 2620 | #define TA27 0x800 /* Mailbox 27 Transmit Acknowledge */ | ||
| 2621 | #define TA28 0x1000 /* Mailbox 28 Transmit Acknowledge */ | ||
| 2622 | #define TA29 0x2000 /* Mailbox 29 Transmit Acknowledge */ | ||
| 2623 | #define TA30 0x4000 /* Mailbox 30 Transmit Acknowledge */ | ||
| 2624 | #define TA31 0x8000 /* Mailbox 31 Transmit Acknowledge */ | ||
| 2625 | |||
| 2626 | /* Bit masks for CAN0_RFH1 */ | ||
| 2627 | |||
| 2628 | #define RFH0 0x1 /* Mailbox 0 Remote Frame Handling Enable */ | ||
| 2629 | #define RFH1 0x2 /* Mailbox 1 Remote Frame Handling Enable */ | ||
| 2630 | #define RFH2 0x4 /* Mailbox 2 Remote Frame Handling Enable */ | ||
| 2631 | #define RFH3 0x8 /* Mailbox 3 Remote Frame Handling Enable */ | ||
| 2632 | #define RFH4 0x10 /* Mailbox 4 Remote Frame Handling Enable */ | ||
| 2633 | #define RFH5 0x20 /* Mailbox 5 Remote Frame Handling Enable */ | ||
| 2634 | #define RFH6 0x40 /* Mailbox 6 Remote Frame Handling Enable */ | ||
| 2635 | #define RFH7 0x80 /* Mailbox 7 Remote Frame Handling Enable */ | ||
| 2636 | #define RFH8 0x100 /* Mailbox 8 Remote Frame Handling Enable */ | ||
| 2637 | #define RFH9 0x200 /* Mailbox 9 Remote Frame Handling Enable */ | ||
| 2638 | #define RFH10 0x400 /* Mailbox 10 Remote Frame Handling Enable */ | ||
| 2639 | #define RFH11 0x800 /* Mailbox 11 Remote Frame Handling Enable */ | ||
| 2640 | #define RFH12 0x1000 /* Mailbox 12 Remote Frame Handling Enable */ | ||
| 2641 | #define RFH13 0x2000 /* Mailbox 13 Remote Frame Handling Enable */ | ||
| 2642 | #define RFH14 0x4000 /* Mailbox 14 Remote Frame Handling Enable */ | ||
| 2643 | #define RFH15 0x8000 /* Mailbox 15 Remote Frame Handling Enable */ | ||
| 2644 | |||
| 2645 | /* Bit masks for CAN0_RFH2 */ | ||
| 2646 | |||
| 2647 | #define RFH16 0x1 /* Mailbox 16 Remote Frame Handling Enable */ | ||
| 2648 | #define RFH17 0x2 /* Mailbox 17 Remote Frame Handling Enable */ | ||
| 2649 | #define RFH18 0x4 /* Mailbox 18 Remote Frame Handling Enable */ | ||
| 2650 | #define RFH19 0x8 /* Mailbox 19 Remote Frame Handling Enable */ | ||
| 2651 | #define RFH20 0x10 /* Mailbox 20 Remote Frame Handling Enable */ | ||
| 2652 | #define RFH21 0x20 /* Mailbox 21 Remote Frame Handling Enable */ | ||
| 2653 | #define RFH22 0x40 /* Mailbox 22 Remote Frame Handling Enable */ | ||
| 2654 | #define RFH23 0x80 /* Mailbox 23 Remote Frame Handling Enable */ | ||
| 2655 | #define RFH24 0x100 /* Mailbox 24 Remote Frame Handling Enable */ | ||
| 2656 | #define RFH25 0x200 /* Mailbox 25 Remote Frame Handling Enable */ | ||
| 2657 | #define RFH26 0x400 /* Mailbox 26 Remote Frame Handling Enable */ | ||
| 2658 | #define RFH27 0x800 /* Mailbox 27 Remote Frame Handling Enable */ | ||
| 2659 | #define RFH28 0x1000 /* Mailbox 28 Remote Frame Handling Enable */ | ||
| 2660 | #define RFH29 0x2000 /* Mailbox 29 Remote Frame Handling Enable */ | ||
| 2661 | #define RFH30 0x4000 /* Mailbox 30 Remote Frame Handling Enable */ | ||
| 2662 | #define RFH31 0x8000 /* Mailbox 31 Remote Frame Handling Enable */ | ||
| 2663 | |||
| 2664 | /* Bit masks for CAN0_MBIM1 */ | ||
| 2665 | |||
| 2666 | #define MBIM0 0x1 /* Mailbox 0 Mailbox Interrupt Mask */ | ||
| 2667 | #define MBIM1 0x2 /* Mailbox 1 Mailbox Interrupt Mask */ | ||
| 2668 | #define MBIM2 0x4 /* Mailbox 2 Mailbox Interrupt Mask */ | ||
| 2669 | #define MBIM3 0x8 /* Mailbox 3 Mailbox Interrupt Mask */ | ||
| 2670 | #define MBIM4 0x10 /* Mailbox 4 Mailbox Interrupt Mask */ | ||
| 2671 | #define MBIM5 0x20 /* Mailbox 5 Mailbox Interrupt Mask */ | ||
| 2672 | #define MBIM6 0x40 /* Mailbox 6 Mailbox Interrupt Mask */ | ||
| 2673 | #define MBIM7 0x80 /* Mailbox 7 Mailbox Interrupt Mask */ | ||
| 2674 | #define MBIM8 0x100 /* Mailbox 8 Mailbox Interrupt Mask */ | ||
| 2675 | #define MBIM9 0x200 /* Mailbox 9 Mailbox Interrupt Mask */ | ||
| 2676 | #define MBIM10 0x400 /* Mailbox 10 Mailbox Interrupt Mask */ | ||
| 2677 | #define MBIM11 0x800 /* Mailbox 11 Mailbox Interrupt Mask */ | ||
| 2678 | #define MBIM12 0x1000 /* Mailbox 12 Mailbox Interrupt Mask */ | ||
| 2679 | #define MBIM13 0x2000 /* Mailbox 13 Mailbox Interrupt Mask */ | ||
| 2680 | #define MBIM14 0x4000 /* Mailbox 14 Mailbox Interrupt Mask */ | ||
| 2681 | #define MBIM15 0x8000 /* Mailbox 15 Mailbox Interrupt Mask */ | ||
| 2682 | |||
| 2683 | /* Bit masks for CAN0_MBIM2 */ | ||
| 2684 | |||
| 2685 | #define MBIM16 0x1 /* Mailbox 16 Mailbox Interrupt Mask */ | ||
| 2686 | #define MBIM17 0x2 /* Mailbox 17 Mailbox Interrupt Mask */ | ||
| 2687 | #define MBIM18 0x4 /* Mailbox 18 Mailbox Interrupt Mask */ | ||
| 2688 | #define MBIM19 0x8 /* Mailbox 19 Mailbox Interrupt Mask */ | ||
| 2689 | #define MBIM20 0x10 /* Mailbox 20 Mailbox Interrupt Mask */ | ||
| 2690 | #define MBIM21 0x20 /* Mailbox 21 Mailbox Interrupt Mask */ | ||
| 2691 | #define MBIM22 0x40 /* Mailbox 22 Mailbox Interrupt Mask */ | ||
| 2692 | #define MBIM23 0x80 /* Mailbox 23 Mailbox Interrupt Mask */ | ||
| 2693 | #define MBIM24 0x100 /* Mailbox 24 Mailbox Interrupt Mask */ | ||
| 2694 | #define MBIM25 0x200 /* Mailbox 25 Mailbox Interrupt Mask */ | ||
| 2695 | #define MBIM26 0x400 /* Mailbox 26 Mailbox Interrupt Mask */ | ||
| 2696 | #define MBIM27 0x800 /* Mailbox 27 Mailbox Interrupt Mask */ | ||
| 2697 | #define MBIM28 0x1000 /* Mailbox 28 Mailbox Interrupt Mask */ | ||
| 2698 | #define MBIM29 0x2000 /* Mailbox 29 Mailbox Interrupt Mask */ | ||
| 2699 | #define MBIM30 0x4000 /* Mailbox 30 Mailbox Interrupt Mask */ | ||
| 2700 | #define MBIM31 0x8000 /* Mailbox 31 Mailbox Interrupt Mask */ | ||
| 2701 | |||
| 2702 | /* Bit masks for CAN0_MBTIF1 */ | ||
| 2703 | |||
| 2704 | #define MBTIF0 0x1 /* Mailbox 0 Mailbox Transmit Interrupt Flag */ | ||
| 2705 | #define MBTIF1 0x2 /* Mailbox 1 Mailbox Transmit Interrupt Flag */ | ||
| 2706 | #define MBTIF2 0x4 /* Mailbox 2 Mailbox Transmit Interrupt Flag */ | ||
| 2707 | #define MBTIF3 0x8 /* Mailbox 3 Mailbox Transmit Interrupt Flag */ | ||
| 2708 | #define MBTIF4 0x10 /* Mailbox 4 Mailbox Transmit Interrupt Flag */ | ||
| 2709 | #define MBTIF5 0x20 /* Mailbox 5 Mailbox Transmit Interrupt Flag */ | ||
| 2710 | #define MBTIF6 0x40 /* Mailbox 6 Mailbox Transmit Interrupt Flag */ | ||
| 2711 | #define MBTIF7 0x80 /* Mailbox 7 Mailbox Transmit Interrupt Flag */ | ||
| 2712 | #define MBTIF8 0x100 /* Mailbox 8 Mailbox Transmit Interrupt Flag */ | ||
| 2713 | #define MBTIF9 0x200 /* Mailbox 9 Mailbox Transmit Interrupt Flag */ | ||
| 2714 | #define MBTIF10 0x400 /* Mailbox 10 Mailbox Transmit Interrupt Flag */ | ||
| 2715 | #define MBTIF11 0x800 /* Mailbox 11 Mailbox Transmit Interrupt Flag */ | ||
| 2716 | #define MBTIF12 0x1000 /* Mailbox 12 Mailbox Transmit Interrupt Flag */ | ||
| 2717 | #define MBTIF13 0x2000 /* Mailbox 13 Mailbox Transmit Interrupt Flag */ | ||
| 2718 | #define MBTIF14 0x4000 /* Mailbox 14 Mailbox Transmit Interrupt Flag */ | ||
| 2719 | #define MBTIF15 0x8000 /* Mailbox 15 Mailbox Transmit Interrupt Flag */ | ||
| 2720 | |||
| 2721 | /* Bit masks for CAN0_MBTIF2 */ | ||
| 2722 | |||
| 2723 | #define MBTIF16 0x1 /* Mailbox 16 Mailbox Transmit Interrupt Flag */ | ||
| 2724 | #define MBTIF17 0x2 /* Mailbox 17 Mailbox Transmit Interrupt Flag */ | ||
| 2725 | #define MBTIF18 0x4 /* Mailbox 18 Mailbox Transmit Interrupt Flag */ | ||
| 2726 | #define MBTIF19 0x8 /* Mailbox 19 Mailbox Transmit Interrupt Flag */ | ||
| 2727 | #define MBTIF20 0x10 /* Mailbox 20 Mailbox Transmit Interrupt Flag */ | ||
| 2728 | #define MBTIF21 0x20 /* Mailbox 21 Mailbox Transmit Interrupt Flag */ | ||
| 2729 | #define MBTIF22 0x40 /* Mailbox 22 Mailbox Transmit Interrupt Flag */ | ||
| 2730 | #define MBTIF23 0x80 /* Mailbox 23 Mailbox Transmit Interrupt Flag */ | ||
| 2731 | #define MBTIF24 0x100 /* Mailbox 24 Mailbox Transmit Interrupt Flag */ | ||
| 2732 | #define MBTIF25 0x200 /* Mailbox 25 Mailbox Transmit Interrupt Flag */ | ||
| 2733 | #define MBTIF26 0x400 /* Mailbox 26 Mailbox Transmit Interrupt Flag */ | ||
| 2734 | #define MBTIF27 0x800 /* Mailbox 27 Mailbox Transmit Interrupt Flag */ | ||
| 2735 | #define MBTIF28 0x1000 /* Mailbox 28 Mailbox Transmit Interrupt Flag */ | ||
| 2736 | #define MBTIF29 0x2000 /* Mailbox 29 Mailbox Transmit Interrupt Flag */ | ||
| 2737 | #define MBTIF30 0x4000 /* Mailbox 30 Mailbox Transmit Interrupt Flag */ | ||
| 2738 | #define MBTIF31 0x8000 /* Mailbox 31 Mailbox Transmit Interrupt Flag */ | ||
| 2739 | |||
| 2740 | /* Bit masks for CAN0_MBRIF1 */ | ||
| 2741 | |||
| 2742 | #define MBRIF0 0x1 /* Mailbox 0 Mailbox Receive Interrupt Flag */ | ||
| 2743 | #define MBRIF1 0x2 /* Mailbox 1 Mailbox Receive Interrupt Flag */ | ||
| 2744 | #define MBRIF2 0x4 /* Mailbox 2 Mailbox Receive Interrupt Flag */ | ||
| 2745 | #define MBRIF3 0x8 /* Mailbox 3 Mailbox Receive Interrupt Flag */ | ||
| 2746 | #define MBRIF4 0x10 /* Mailbox 4 Mailbox Receive Interrupt Flag */ | ||
| 2747 | #define MBRIF5 0x20 /* Mailbox 5 Mailbox Receive Interrupt Flag */ | ||
| 2748 | #define MBRIF6 0x40 /* Mailbox 6 Mailbox Receive Interrupt Flag */ | ||
| 2749 | #define MBRIF7 0x80 /* Mailbox 7 Mailbox Receive Interrupt Flag */ | ||
| 2750 | #define MBRIF8 0x100 /* Mailbox 8 Mailbox Receive Interrupt Flag */ | ||
| 2751 | #define MBRIF9 0x200 /* Mailbox 9 Mailbox Receive Interrupt Flag */ | ||
| 2752 | #define MBRIF10 0x400 /* Mailbox 10 Mailbox Receive Interrupt Flag */ | ||
| 2753 | #define MBRIF11 0x800 /* Mailbox 11 Mailbox Receive Interrupt Flag */ | ||
| 2754 | #define MBRIF12 0x1000 /* Mailbox 12 Mailbox Receive Interrupt Flag */ | ||
| 2755 | #define MBRIF13 0x2000 /* Mailbox 13 Mailbox Receive Interrupt Flag */ | ||
| 2756 | #define MBRIF14 0x4000 /* Mailbox 14 Mailbox Receive Interrupt Flag */ | ||
| 2757 | #define MBRIF15 0x8000 /* Mailbox 15 Mailbox Receive Interrupt Flag */ | ||
| 2758 | |||
| 2759 | /* Bit masks for CAN0_MBRIF2 */ | ||
| 2760 | |||
| 2761 | #define MBRIF16 0x1 /* Mailbox 16 Mailbox Receive Interrupt Flag */ | ||
| 2762 | #define MBRIF17 0x2 /* Mailbox 17 Mailbox Receive Interrupt Flag */ | ||
| 2763 | #define MBRIF18 0x4 /* Mailbox 18 Mailbox Receive Interrupt Flag */ | ||
| 2764 | #define MBRIF19 0x8 /* Mailbox 19 Mailbox Receive Interrupt Flag */ | ||
| 2765 | #define MBRIF20 0x10 /* Mailbox 20 Mailbox Receive Interrupt Flag */ | ||
| 2766 | #define MBRIF21 0x20 /* Mailbox 21 Mailbox Receive Interrupt Flag */ | ||
| 2767 | #define MBRIF22 0x40 /* Mailbox 22 Mailbox Receive Interrupt Flag */ | ||
| 2768 | #define MBRIF23 0x80 /* Mailbox 23 Mailbox Receive Interrupt Flag */ | ||
| 2769 | #define MBRIF24 0x100 /* Mailbox 24 Mailbox Receive Interrupt Flag */ | ||
| 2770 | #define MBRIF25 0x200 /* Mailbox 25 Mailbox Receive Interrupt Flag */ | ||
| 2771 | #define MBRIF26 0x400 /* Mailbox 26 Mailbox Receive Interrupt Flag */ | ||
| 2772 | #define MBRIF27 0x800 /* Mailbox 27 Mailbox Receive Interrupt Flag */ | ||
| 2773 | #define MBRIF28 0x1000 /* Mailbox 28 Mailbox Receive Interrupt Flag */ | ||
| 2774 | #define MBRIF29 0x2000 /* Mailbox 29 Mailbox Receive Interrupt Flag */ | ||
| 2775 | #define MBRIF30 0x4000 /* Mailbox 30 Mailbox Receive Interrupt Flag */ | ||
| 2776 | #define MBRIF31 0x8000 /* Mailbox 31 Mailbox Receive Interrupt Flag */ | ||
| 2777 | |||
| 2778 | /* Bit masks for EPPIx_STATUS */ | 2107 | /* Bit masks for EPPIx_STATUS */ |
| 2779 | 2108 | ||
| 2780 | #define CFIFO_ERR 0x1 /* Chroma FIFO Error */ | 2109 | #define CFIFO_ERR 0x1 /* Chroma FIFO Error */ |
diff --git a/arch/blackfin/mach-bf561/boards/acvilon.c b/arch/blackfin/mach-bf561/boards/acvilon.c index 5163e2c383c5..bfcfa86db2b5 100644 --- a/arch/blackfin/mach-bf561/boards/acvilon.c +++ b/arch/blackfin/mach-bf561/boards/acvilon.c | |||
| @@ -44,6 +44,7 @@ | |||
| 44 | #include <linux/spi/flash.h> | 44 | #include <linux/spi/flash.h> |
| 45 | #include <linux/irq.h> | 45 | #include <linux/irq.h> |
| 46 | #include <linux/interrupt.h> | 46 | #include <linux/interrupt.h> |
| 47 | #include <linux/jiffies.h> | ||
| 47 | #include <linux/i2c-pca-platform.h> | 48 | #include <linux/i2c-pca-platform.h> |
| 48 | #include <linux/delay.h> | 49 | #include <linux/delay.h> |
| 49 | #include <linux/io.h> | 50 | #include <linux/io.h> |
| @@ -112,7 +113,7 @@ static struct resource bfin_i2c_pca_resources[] = { | |||
| 112 | struct i2c_pca9564_pf_platform_data pca9564_platform_data = { | 113 | struct i2c_pca9564_pf_platform_data pca9564_platform_data = { |
| 113 | .gpio = -1, | 114 | .gpio = -1, |
| 114 | .i2c_clock_speed = 330000, | 115 | .i2c_clock_speed = 330000, |
| 115 | .timeout = 10000 | 116 | .timeout = HZ, |
| 116 | }; | 117 | }; |
| 117 | 118 | ||
| 118 | /* PCA9564 I2C Bus driver */ | 119 | /* PCA9564 I2C Bus driver */ |
diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c index 7ad8878bfa18..1c8c4c7245c3 100644 --- a/arch/blackfin/mach-common/ints-priority.c +++ b/arch/blackfin/mach-common/ints-priority.c | |||
| @@ -92,26 +92,29 @@ static void __init search_IAR(void) | |||
| 92 | { | 92 | { |
| 93 | unsigned ivg, irq_pos = 0; | 93 | unsigned ivg, irq_pos = 0; |
| 94 | for (ivg = 0; ivg <= IVG13 - IVG7; ivg++) { | 94 | for (ivg = 0; ivg <= IVG13 - IVG7; ivg++) { |
| 95 | int irqn; | 95 | int irqN; |
| 96 | 96 | ||
| 97 | ivg7_13[ivg].istop = ivg7_13[ivg].ifirst = &ivg_table[irq_pos]; | 97 | ivg7_13[ivg].istop = ivg7_13[ivg].ifirst = &ivg_table[irq_pos]; |
| 98 | 98 | ||
| 99 | for (irqn = 0; irqn < NR_PERI_INTS; irqn++) { | 99 | for (irqN = 0; irqN < NR_PERI_INTS; irqN += 4) { |
| 100 | int iar_shift = (irqn & 7) * 4; | 100 | int irqn; |
| 101 | if (ivg == (0xf & | 101 | u32 iar = bfin_read32((unsigned long *)SIC_IAR0 + |
| 102 | #if defined(CONFIG_BF52x) || defined(CONFIG_BF538) \ | 102 | #if defined(CONFIG_BF51x) || defined(CONFIG_BF52x) || \ |
| 103 | || defined(CONFIG_BF539) || defined(CONFIG_BF51x) | 103 | defined(CONFIG_BF538) || defined(CONFIG_BF539) |
| 104 | bfin_read32((unsigned long *)SIC_IAR0 + | 104 | ((irqN % 32) >> 3) + ((irqN / 32) * ((SIC_IAR4 - SIC_IAR0) / 4)) |
| 105 | ((irqn % 32) >> 3) + ((irqn / 32) * | ||
| 106 | ((SIC_IAR4 - SIC_IAR0) / 4))) >> iar_shift)) { | ||
| 107 | #else | 105 | #else |
| 108 | bfin_read32((unsigned long *)SIC_IAR0 + | 106 | (irqN >> 3) |
| 109 | (irqn >> 3)) >> iar_shift)) { | ||
| 110 | #endif | 107 | #endif |
| 111 | ivg_table[irq_pos].irqno = IVG7 + irqn; | 108 | ); |
| 112 | ivg_table[irq_pos].isrflag = 1 << (irqn % 32); | 109 | |
| 113 | ivg7_13[ivg].istop++; | 110 | for (irqn = irqN; irqn < irqN + 4; ++irqn) { |
| 114 | irq_pos++; | 111 | int iar_shift = (irqn & 7) * 4; |
| 112 | if (ivg == (0xf & (iar >> iar_shift))) { | ||
| 113 | ivg_table[irq_pos].irqno = IVG7 + irqn; | ||
| 114 | ivg_table[irq_pos].isrflag = 1 << (irqn % 32); | ||
| 115 | ivg7_13[ivg].istop++; | ||
| 116 | irq_pos++; | ||
| 117 | } | ||
| 115 | } | 118 | } |
| 116 | } | 119 | } |
| 117 | } | 120 | } |
| @@ -662,14 +665,7 @@ static int bfin_gpio_irq_type(unsigned int irq, unsigned int type) | |||
| 662 | #ifdef CONFIG_PM | 665 | #ifdef CONFIG_PM |
| 663 | int bfin_gpio_set_wake(unsigned int irq, unsigned int state) | 666 | int bfin_gpio_set_wake(unsigned int irq, unsigned int state) |
| 664 | { | 667 | { |
| 665 | unsigned gpio = irq_to_gpio(irq); | 668 | return gpio_pm_wakeup_ctrl(irq_to_gpio(irq), state); |
| 666 | |||
| 667 | if (state) | ||
| 668 | gpio_pm_wakeup_request(gpio, PM_WAKE_IGNORE); | ||
| 669 | else | ||
| 670 | gpio_pm_wakeup_free(gpio); | ||
| 671 | |||
| 672 | return 0; | ||
| 673 | } | 669 | } |
| 674 | #endif | 670 | #endif |
| 675 | 671 | ||
diff --git a/arch/blackfin/mach-common/pm.c b/arch/blackfin/mach-common/pm.c index c1f1ccc846f0..ea7f95f6bb4c 100644 --- a/arch/blackfin/mach-common/pm.c +++ b/arch/blackfin/mach-common/pm.c | |||
| @@ -20,35 +20,11 @@ | |||
| 20 | #include <asm/dma.h> | 20 | #include <asm/dma.h> |
| 21 | #include <asm/dpmc.h> | 21 | #include <asm/dpmc.h> |
| 22 | 22 | ||
| 23 | #ifdef CONFIG_PM_WAKEUP_GPIO_POLAR_H | ||
| 24 | #define WAKEUP_TYPE PM_WAKE_HIGH | ||
| 25 | #endif | ||
| 26 | |||
| 27 | #ifdef CONFIG_PM_WAKEUP_GPIO_POLAR_L | ||
| 28 | #define WAKEUP_TYPE PM_WAKE_LOW | ||
| 29 | #endif | ||
| 30 | |||
| 31 | #ifdef CONFIG_PM_WAKEUP_GPIO_POLAR_EDGE_F | ||
| 32 | #define WAKEUP_TYPE PM_WAKE_FALLING | ||
| 33 | #endif | ||
| 34 | |||
| 35 | #ifdef CONFIG_PM_WAKEUP_GPIO_POLAR_EDGE_R | ||
| 36 | #define WAKEUP_TYPE PM_WAKE_RISING | ||
| 37 | #endif | ||
| 38 | |||
| 39 | #ifdef CONFIG_PM_WAKEUP_GPIO_POLAR_EDGE_B | ||
| 40 | #define WAKEUP_TYPE PM_WAKE_BOTH_EDGES | ||
| 41 | #endif | ||
| 42 | |||
| 43 | 23 | ||
| 44 | void bfin_pm_suspend_standby_enter(void) | 24 | void bfin_pm_suspend_standby_enter(void) |
| 45 | { | 25 | { |
| 46 | unsigned long flags; | 26 | unsigned long flags; |
| 47 | 27 | ||
| 48 | #ifdef CONFIG_PM_WAKEUP_BY_GPIO | ||
| 49 | gpio_pm_wakeup_request(CONFIG_PM_WAKEUP_GPIO_NUMBER, WAKEUP_TYPE); | ||
| 50 | #endif | ||
| 51 | |||
| 52 | local_irq_save_hw(flags); | 28 | local_irq_save_hw(flags); |
| 53 | bfin_pm_standby_setup(); | 29 | bfin_pm_standby_setup(); |
| 54 | 30 | ||
diff --git a/arch/blackfin/mach-common/smp.c b/arch/blackfin/mach-common/smp.c index 7cecbaf0358a..a17107a700d5 100644 --- a/arch/blackfin/mach-common/smp.c +++ b/arch/blackfin/mach-common/smp.c | |||
| @@ -170,8 +170,8 @@ static irqreturn_t ipi_handler(int irq, void *dev_instance) | |||
| 170 | kfree(msg); | 170 | kfree(msg); |
| 171 | break; | 171 | break; |
| 172 | default: | 172 | default: |
| 173 | printk(KERN_CRIT "CPU%u: Unknown IPI message \ | 173 | printk(KERN_CRIT "CPU%u: Unknown IPI message 0x%lx\n", |
| 174 | 0x%lx\n", cpu, msg->type); | 174 | cpu, msg->type); |
| 175 | kfree(msg); | 175 | kfree(msg); |
| 176 | break; | 176 | break; |
| 177 | } | 177 | } |
diff --git a/arch/blackfin/mm/init.c b/arch/blackfin/mm/init.c index 355b87aa6b93..bb4e8fff4b55 100644 --- a/arch/blackfin/mm/init.c +++ b/arch/blackfin/mm/init.c | |||
| @@ -15,23 +15,11 @@ | |||
| 15 | #include "blackfin_sram.h" | 15 | #include "blackfin_sram.h" |
| 16 | 16 | ||
| 17 | /* | 17 | /* |
| 18 | * BAD_PAGE is the page that is used for page faults when linux | 18 | * ZERO_PAGE is a special page that is used for zero-initialized data and COW. |
| 19 | * is out-of-memory. Older versions of linux just did a | 19 | * Let the bss do its zero-init magic so we don't have to do it ourselves. |
| 20 | * do_exit(), but using this instead means there is less risk | ||
| 21 | * for a process dying in kernel mode, possibly leaving a inode | ||
| 22 | * unused etc.. | ||
| 23 | * | ||
| 24 | * BAD_PAGETABLE is the accompanying page-table: it is initialized | ||
| 25 | * to point to BAD_PAGE entries. | ||
| 26 | * | ||
| 27 | * ZERO_PAGE is a special page that is used for zero-initialized | ||
| 28 | * data and COW. | ||
| 29 | */ | 20 | */ |
| 30 | static unsigned long empty_bad_page_table; | 21 | char empty_zero_page[PAGE_SIZE] __attribute__((aligned(PAGE_SIZE))); |
| 31 | 22 | EXPORT_SYMBOL(empty_zero_page); | |
| 32 | static unsigned long empty_bad_page; | ||
| 33 | |||
| 34 | static unsigned long empty_zero_page; | ||
| 35 | 23 | ||
| 36 | #ifndef CONFIG_EXCEPTION_L1_SCRATCH | 24 | #ifndef CONFIG_EXCEPTION_L1_SCRATCH |
| 37 | #if defined CONFIG_SYSCALL_TAB_L1 | 25 | #if defined CONFIG_SYSCALL_TAB_L1 |
| @@ -52,40 +40,26 @@ EXPORT_SYMBOL(cpu_pda); | |||
| 52 | void __init paging_init(void) | 40 | void __init paging_init(void) |
| 53 | { | 41 | { |
| 54 | /* | 42 | /* |
| 55 | * make sure start_mem is page aligned, otherwise bootmem and | 43 | * make sure start_mem is page aligned, otherwise bootmem and |
| 56 | * page_alloc get different views og the world | 44 | * page_alloc get different views of the world |
| 57 | */ | 45 | */ |
| 58 | unsigned long end_mem = memory_end & PAGE_MASK; | 46 | unsigned long end_mem = memory_end & PAGE_MASK; |
| 59 | 47 | ||
| 60 | pr_debug("start_mem is %#lx virtual_end is %#lx\n", PAGE_ALIGN(memory_start), end_mem); | 48 | unsigned long zones_size[MAX_NR_ZONES] = { |
| 61 | 49 | [0] = 0, | |
| 62 | /* | 50 | [ZONE_DMA] = (end_mem - PAGE_OFFSET) >> PAGE_SHIFT, |
| 63 | * initialize the bad page table and bad page to point | 51 | [ZONE_NORMAL] = 0, |
| 64 | * to a couple of allocated pages | 52 | #ifdef CONFIG_HIGHMEM |
| 65 | */ | 53 | [ZONE_HIGHMEM] = 0, |
| 66 | empty_bad_page_table = (unsigned long)alloc_bootmem_pages(PAGE_SIZE); | 54 | #endif |
| 67 | empty_bad_page = (unsigned long)alloc_bootmem_pages(PAGE_SIZE); | 55 | }; |
| 68 | empty_zero_page = (unsigned long)alloc_bootmem_pages(PAGE_SIZE); | ||
| 69 | memset((void *)empty_zero_page, 0, PAGE_SIZE); | ||
| 70 | 56 | ||
| 71 | /* | 57 | /* Set up SFC/DFC registers (user data space) */ |
| 72 | * Set up SFC/DFC registers (user data space) | ||
| 73 | */ | ||
| 74 | set_fs(KERNEL_DS); | 58 | set_fs(KERNEL_DS); |
| 75 | 59 | ||
| 76 | pr_debug("free_area_init -> start_mem is %#lx virtual_end is %#lx\n", | 60 | pr_debug("free_area_init -> start_mem is %#lx virtual_end is %#lx\n", |
| 77 | PAGE_ALIGN(memory_start), end_mem); | 61 | PAGE_ALIGN(memory_start), end_mem); |
| 78 | 62 | free_area_init(zones_size); | |
| 79 | { | ||
| 80 | unsigned long zones_size[MAX_NR_ZONES] = { 0, }; | ||
| 81 | |||
| 82 | zones_size[ZONE_DMA] = (end_mem - PAGE_OFFSET) >> PAGE_SHIFT; | ||
| 83 | zones_size[ZONE_NORMAL] = 0; | ||
| 84 | #ifdef CONFIG_HIGHMEM | ||
| 85 | zones_size[ZONE_HIGHMEM] = 0; | ||
| 86 | #endif | ||
| 87 | free_area_init(zones_size); | ||
| 88 | } | ||
| 89 | } | 63 | } |
| 90 | 64 | ||
| 91 | asmlinkage void __init init_pda(void) | 65 | asmlinkage void __init init_pda(void) |
diff --git a/arch/blackfin/mm/isram-driver.c b/arch/blackfin/mm/isram-driver.c index 39b058564f62..7e2e674ed444 100644 --- a/arch/blackfin/mm/isram-driver.c +++ b/arch/blackfin/mm/isram-driver.c | |||
| @@ -43,13 +43,12 @@ static DEFINE_SPINLOCK(dtest_lock); | |||
| 43 | /* Takes a void pointer */ | 43 | /* Takes a void pointer */ |
| 44 | #define IADDR2DTEST(x) \ | 44 | #define IADDR2DTEST(x) \ |
| 45 | ({ unsigned long __addr = (unsigned long)(x); \ | 45 | ({ unsigned long __addr = (unsigned long)(x); \ |
| 46 | (__addr & 0x47F8) | /* address bits 14 & 10:3 */ \ | 46 | ((__addr & (1 << 11)) << (26 - 11)) | /* addr bit 11 (Way0/Way1) */ \ |
| 47 | (__addr & 0x8000) << 23 | /* Bank A/B */ \ | 47 | (1 << 24) | /* instruction access = 1 */ \ |
| 48 | (__addr & 0x0800) << 15 | /* address bit 11 */ \ | 48 | ((__addr & (1 << 15)) << (23 - 15)) | /* addr bit 15 (Data Bank) */ \ |
| 49 | (__addr & 0x3000) << 4 | /* address bits 13:12 */ \ | 49 | ((__addr & (3 << 12)) << (16 - 12)) | /* addr bits 13:12 (Subbank) */ \ |
| 50 | (__addr & 0x8000) << 8 | /* address bit 15 */ \ | 50 | (__addr & 0x47F8) | /* addr bits 14 & 10:3 */ \ |
| 51 | (0x1000000) | /* instruction access = 1 */ \ | 51 | (1 << 2); /* data array = 1 */ \ |
| 52 | (0x4); /* data array = 1 */ \ | ||
| 53 | }) | 52 | }) |
| 54 | 53 | ||
| 55 | /* Takes a pointer, and returns the offset (in bits) which things should be shifted */ | 54 | /* Takes a pointer, and returns the offset (in bits) which things should be shifted */ |
| @@ -196,7 +195,7 @@ EXPORT_SYMBOL(isram_memcpy); | |||
| 196 | 195 | ||
| 197 | #ifdef CONFIG_BFIN_ISRAM_SELF_TEST | 196 | #ifdef CONFIG_BFIN_ISRAM_SELF_TEST |
| 198 | 197 | ||
| 199 | #define TEST_LEN 0x100 | 198 | static int test_len = 0x20000; |
| 200 | 199 | ||
| 201 | static __init void hex_dump(unsigned char *buf, int len) | 200 | static __init void hex_dump(unsigned char *buf, int len) |
| 202 | { | 201 | { |
| @@ -212,15 +211,15 @@ static __init int isram_read_test(char *sdram, void *l1inst) | |||
| 212 | pr_info("INFO: running isram_read tests\n"); | 211 | pr_info("INFO: running isram_read tests\n"); |
| 213 | 212 | ||
| 214 | /* setup some different data to play with */ | 213 | /* setup some different data to play with */ |
| 215 | for (i = 0; i < TEST_LEN; ++i) | 214 | for (i = 0; i < test_len; ++i) |
| 216 | sdram[i] = i; | 215 | sdram[i] = i % 255; |
| 217 | dma_memcpy(l1inst, sdram, TEST_LEN); | 216 | dma_memcpy(l1inst, sdram, test_len); |
| 218 | 217 | ||
| 219 | /* make sure we can read the L1 inst */ | 218 | /* make sure we can read the L1 inst */ |
| 220 | for (i = 0; i < TEST_LEN; i += sizeof(uint64_t)) { | 219 | for (i = 0; i < test_len; i += sizeof(uint64_t)) { |
| 221 | data1 = isram_read(l1inst + i); | 220 | data1 = isram_read(l1inst + i); |
| 222 | memcpy(&data2, sdram + i, sizeof(data2)); | 221 | memcpy(&data2, sdram + i, sizeof(data2)); |
| 223 | if (memcmp(&data1, &data2, sizeof(uint64_t))) { | 222 | if (data1 != data2) { |
| 224 | pr_err("FAIL: isram_read(%p) returned %#llx but wanted %#llx\n", | 223 | pr_err("FAIL: isram_read(%p) returned %#llx but wanted %#llx\n", |
| 225 | l1inst + i, data1, data2); | 224 | l1inst + i, data1, data2); |
| 226 | ++ret; | 225 | ++ret; |
| @@ -238,25 +237,25 @@ static __init int isram_write_test(char *sdram, void *l1inst) | |||
| 238 | pr_info("INFO: running isram_write tests\n"); | 237 | pr_info("INFO: running isram_write tests\n"); |
| 239 | 238 | ||
| 240 | /* setup some different data to play with */ | 239 | /* setup some different data to play with */ |
| 241 | memset(sdram, 0, TEST_LEN * 2); | 240 | memset(sdram, 0, test_len * 2); |
| 242 | dma_memcpy(l1inst, sdram, TEST_LEN); | 241 | dma_memcpy(l1inst, sdram, test_len); |
| 243 | for (i = 0; i < TEST_LEN; ++i) | 242 | for (i = 0; i < test_len; ++i) |
| 244 | sdram[i] = i; | 243 | sdram[i] = i % 255; |
| 245 | 244 | ||
| 246 | /* make sure we can write the L1 inst */ | 245 | /* make sure we can write the L1 inst */ |
| 247 | for (i = 0; i < TEST_LEN; i += sizeof(uint64_t)) { | 246 | for (i = 0; i < test_len; i += sizeof(uint64_t)) { |
| 248 | memcpy(&data1, sdram + i, sizeof(data1)); | 247 | memcpy(&data1, sdram + i, sizeof(data1)); |
| 249 | isram_write(l1inst + i, data1); | 248 | isram_write(l1inst + i, data1); |
| 250 | data2 = isram_read(l1inst + i); | 249 | data2 = isram_read(l1inst + i); |
| 251 | if (memcmp(&data1, &data2, sizeof(uint64_t))) { | 250 | if (data1 != data2) { |
| 252 | pr_err("FAIL: isram_write(%p, %#llx) != %#llx\n", | 251 | pr_err("FAIL: isram_write(%p, %#llx) != %#llx\n", |
| 253 | l1inst + i, data1, data2); | 252 | l1inst + i, data1, data2); |
| 254 | ++ret; | 253 | ++ret; |
| 255 | } | 254 | } |
| 256 | } | 255 | } |
| 257 | 256 | ||
| 258 | dma_memcpy(sdram + TEST_LEN, l1inst, TEST_LEN); | 257 | dma_memcpy(sdram + test_len, l1inst, test_len); |
| 259 | if (memcmp(sdram, sdram + TEST_LEN, TEST_LEN)) { | 258 | if (memcmp(sdram, sdram + test_len, test_len)) { |
| 260 | pr_err("FAIL: isram_write() did not work properly\n"); | 259 | pr_err("FAIL: isram_write() did not work properly\n"); |
| 261 | ++ret; | 260 | ++ret; |
| 262 | } | 261 | } |
| @@ -268,12 +267,12 @@ static __init int | |||
| 268 | _isram_memcpy_test(char pattern, void *sdram, void *l1inst, const char *smemcpy, | 267 | _isram_memcpy_test(char pattern, void *sdram, void *l1inst, const char *smemcpy, |
| 269 | void *(*fmemcpy)(void *, const void *, size_t)) | 268 | void *(*fmemcpy)(void *, const void *, size_t)) |
| 270 | { | 269 | { |
| 271 | memset(sdram, pattern, TEST_LEN); | 270 | memset(sdram, pattern, test_len); |
| 272 | fmemcpy(l1inst, sdram, TEST_LEN); | 271 | fmemcpy(l1inst, sdram, test_len); |
| 273 | fmemcpy(sdram + TEST_LEN, l1inst, TEST_LEN); | 272 | fmemcpy(sdram + test_len, l1inst, test_len); |
| 274 | if (memcmp(sdram, sdram + TEST_LEN, TEST_LEN)) { | 273 | if (memcmp(sdram, sdram + test_len, test_len)) { |
| 275 | pr_err("FAIL: %s(%p <=> %p, %#x) failed (data is %#x)\n", | 274 | pr_err("FAIL: %s(%p <=> %p, %#x) failed (data is %#x)\n", |
| 276 | smemcpy, l1inst, sdram, TEST_LEN, pattern); | 275 | smemcpy, l1inst, sdram, test_len, pattern); |
| 277 | return 1; | 276 | return 1; |
| 278 | } | 277 | } |
| 279 | return 0; | 278 | return 0; |
| @@ -292,12 +291,13 @@ static __init int isram_memcpy_test(char *sdram, void *l1inst) | |||
| 292 | /* check read of small, unaligned, and hardware 64bit limits */ | 291 | /* check read of small, unaligned, and hardware 64bit limits */ |
| 293 | pr_info("INFO: running isram_memcpy (read) tests\n"); | 292 | pr_info("INFO: running isram_memcpy (read) tests\n"); |
| 294 | 293 | ||
| 295 | for (i = 0; i < TEST_LEN; ++i) | 294 | /* setup some different data to play with */ |
| 296 | sdram[i] = i; | 295 | for (i = 0; i < test_len; ++i) |
| 297 | dma_memcpy(l1inst, sdram, TEST_LEN); | 296 | sdram[i] = i % 255; |
| 297 | dma_memcpy(l1inst, sdram, test_len); | ||
| 298 | 298 | ||
| 299 | thisret = 0; | 299 | thisret = 0; |
| 300 | for (i = 0; i < TEST_LEN - 32; ++i) { | 300 | for (i = 0; i < test_len - 32; ++i) { |
| 301 | unsigned char cmp[32]; | 301 | unsigned char cmp[32]; |
| 302 | for (j = 1; j <= 32; ++j) { | 302 | for (j = 1; j <= 32; ++j) { |
| 303 | memset(cmp, 0, sizeof(cmp)); | 303 | memset(cmp, 0, sizeof(cmp)); |
| @@ -310,7 +310,7 @@ static __init int isram_memcpy_test(char *sdram, void *l1inst) | |||
| 310 | pr_cont("\n"); | 310 | pr_cont("\n"); |
| 311 | if (++thisret > 20) { | 311 | if (++thisret > 20) { |
| 312 | pr_err("FAIL: skipping remaining series\n"); | 312 | pr_err("FAIL: skipping remaining series\n"); |
| 313 | i = TEST_LEN; | 313 | i = test_len; |
| 314 | break; | 314 | break; |
| 315 | } | 315 | } |
| 316 | } | 316 | } |
| @@ -321,11 +321,11 @@ static __init int isram_memcpy_test(char *sdram, void *l1inst) | |||
| 321 | /* check write of small, unaligned, and hardware 64bit limits */ | 321 | /* check write of small, unaligned, and hardware 64bit limits */ |
| 322 | pr_info("INFO: running isram_memcpy (write) tests\n"); | 322 | pr_info("INFO: running isram_memcpy (write) tests\n"); |
| 323 | 323 | ||
| 324 | memset(sdram + TEST_LEN, 0, TEST_LEN); | 324 | memset(sdram + test_len, 0, test_len); |
| 325 | dma_memcpy(l1inst, sdram + TEST_LEN, TEST_LEN); | 325 | dma_memcpy(l1inst, sdram + test_len, test_len); |
| 326 | 326 | ||
| 327 | thisret = 0; | 327 | thisret = 0; |
| 328 | for (i = 0; i < TEST_LEN - 32; ++i) { | 328 | for (i = 0; i < test_len - 32; ++i) { |
| 329 | unsigned char cmp[32]; | 329 | unsigned char cmp[32]; |
| 330 | for (j = 1; j <= 32; ++j) { | 330 | for (j = 1; j <= 32; ++j) { |
| 331 | isram_memcpy(l1inst + i, sdram + i, j); | 331 | isram_memcpy(l1inst + i, sdram + i, j); |
| @@ -338,7 +338,7 @@ static __init int isram_memcpy_test(char *sdram, void *l1inst) | |||
| 338 | pr_cont("\n"); | 338 | pr_cont("\n"); |
| 339 | if (++thisret > 20) { | 339 | if (++thisret > 20) { |
| 340 | pr_err("FAIL: skipping remaining series\n"); | 340 | pr_err("FAIL: skipping remaining series\n"); |
| 341 | i = TEST_LEN; | 341 | i = test_len; |
| 342 | break; | 342 | break; |
| 343 | } | 343 | } |
| 344 | } | 344 | } |
| @@ -355,22 +355,30 @@ static __init int isram_test_init(void) | |||
| 355 | char *sdram; | 355 | char *sdram; |
| 356 | void *l1inst; | 356 | void *l1inst; |
| 357 | 357 | ||
| 358 | sdram = kmalloc(TEST_LEN * 2, GFP_KERNEL); | 358 | /* Try to test as much of L1SRAM as possible */ |
| 359 | if (!sdram) { | 359 | while (test_len) { |
| 360 | pr_warning("SKIP: could not allocate sdram\n"); | 360 | test_len >>= 1; |
| 361 | return 0; | 361 | l1inst = l1_inst_sram_alloc(test_len); |
| 362 | if (l1inst) | ||
| 363 | break; | ||
| 362 | } | 364 | } |
| 363 | |||
| 364 | l1inst = l1_inst_sram_alloc(TEST_LEN); | ||
| 365 | if (!l1inst) { | 365 | if (!l1inst) { |
| 366 | kfree(sdram); | ||
| 367 | pr_warning("SKIP: could not allocate L1 inst\n"); | 366 | pr_warning("SKIP: could not allocate L1 inst\n"); |
| 368 | return 0; | 367 | return 0; |
| 369 | } | 368 | } |
| 369 | pr_info("INFO: testing %#x bytes (%p - %p)\n", | ||
| 370 | test_len, l1inst, l1inst + test_len); | ||
| 371 | |||
| 372 | sdram = kmalloc(test_len * 2, GFP_KERNEL); | ||
| 373 | if (!sdram) { | ||
| 374 | sram_free(l1inst); | ||
| 375 | pr_warning("SKIP: could not allocate sdram\n"); | ||
| 376 | return 0; | ||
| 377 | } | ||
| 370 | 378 | ||
| 371 | /* sanity check initial L1 inst state */ | 379 | /* sanity check initial L1 inst state */ |
| 372 | ret = 1; | 380 | ret = 1; |
| 373 | pr_info("INFO: running initial dma_memcpy checks\n"); | 381 | pr_info("INFO: running initial dma_memcpy checks %p\n", sdram); |
| 374 | if (_isram_memcpy_test(0xa, sdram, l1inst, dma_memcpy)) | 382 | if (_isram_memcpy_test(0xa, sdram, l1inst, dma_memcpy)) |
| 375 | goto abort; | 383 | goto abort; |
| 376 | if (_isram_memcpy_test(0x5, sdram, l1inst, dma_memcpy)) | 384 | if (_isram_memcpy_test(0x5, sdram, l1inst, dma_memcpy)) |
diff --git a/arch/blackfin/mm/sram-alloc.c b/arch/blackfin/mm/sram-alloc.c index 49b2ff2c8b74..627e04b5ba9a 100644 --- a/arch/blackfin/mm/sram-alloc.c +++ b/arch/blackfin/mm/sram-alloc.c | |||
| @@ -256,7 +256,8 @@ static void *_sram_alloc(size_t size, struct sram_piece *pfree_head, | |||
| 256 | plast->next = pslot->next; | 256 | plast->next = pslot->next; |
| 257 | pavail = pslot; | 257 | pavail = pslot; |
| 258 | } else { | 258 | } else { |
| 259 | pavail = kmem_cache_alloc(sram_piece_cache, GFP_KERNEL); | 259 | /* use atomic so our L1 allocator can be used atomically */ |
| 260 | pavail = kmem_cache_alloc(sram_piece_cache, GFP_ATOMIC); | ||
| 260 | 261 | ||
| 261 | if (!pavail) | 262 | if (!pavail) |
| 262 | return NULL; | 263 | return NULL; |
diff --git a/arch/cris/arch-v10/drivers/ds1302.c b/arch/cris/arch-v10/drivers/ds1302.c index 77630df94343..884275629ef7 100644 --- a/arch/cris/arch-v10/drivers/ds1302.c +++ b/arch/cris/arch-v10/drivers/ds1302.c | |||
| @@ -19,6 +19,7 @@ | |||
| 19 | #include <linux/module.h> | 19 | #include <linux/module.h> |
| 20 | #include <linux/miscdevice.h> | 20 | #include <linux/miscdevice.h> |
| 21 | #include <linux/delay.h> | 21 | #include <linux/delay.h> |
| 22 | #include <linux/smp_lock.h> | ||
| 22 | #include <linux/bcd.h> | 23 | #include <linux/bcd.h> |
| 23 | #include <linux/capability.h> | 24 | #include <linux/capability.h> |
| 24 | 25 | ||
| @@ -238,9 +239,7 @@ static unsigned char days_in_mo[] = | |||
| 238 | 239 | ||
| 239 | /* ioctl that supports RTC_RD_TIME and RTC_SET_TIME (read and set time/date). */ | 240 | /* ioctl that supports RTC_RD_TIME and RTC_SET_TIME (read and set time/date). */ |
| 240 | 241 | ||
| 241 | static int | 242 | static int rtc_ioctl(struct file *file, unsigned int cmd, unsigned long arg) |
| 242 | rtc_ioctl(struct inode *inode, struct file *file, unsigned int cmd, | ||
| 243 | unsigned long arg) | ||
| 244 | { | 243 | { |
| 245 | unsigned long flags; | 244 | unsigned long flags; |
| 246 | 245 | ||
| @@ -354,6 +353,17 @@ rtc_ioctl(struct inode *inode, struct file *file, unsigned int cmd, | |||
| 354 | } | 353 | } |
| 355 | } | 354 | } |
| 356 | 355 | ||
| 356 | static long rtc_unlocked_ioctl(struct file *file, unsigned int cmd, unsigned long arg) | ||
| 357 | { | ||
| 358 | int ret; | ||
| 359 | |||
| 360 | lock_kernel(); | ||
| 361 | ret = rtc_ioctl(file, cmd, arg); | ||
| 362 | unlock_kernel(); | ||
| 363 | |||
| 364 | return ret; | ||
| 365 | } | ||
| 366 | |||
| 357 | static void | 367 | static void |
| 358 | print_rtc_status(void) | 368 | print_rtc_status(void) |
| 359 | { | 369 | { |
| @@ -375,8 +385,8 @@ print_rtc_status(void) | |||
| 375 | /* The various file operations we support. */ | 385 | /* The various file operations we support. */ |
| 376 | 386 | ||
| 377 | static const struct file_operations rtc_fops = { | 387 | static const struct file_operations rtc_fops = { |
| 378 | .owner = THIS_MODULE, | 388 | .owner = THIS_MODULE, |
| 379 | .ioctl = rtc_ioctl, | 389 | .unlocked_ioctl = rtc_unlocked_ioctl, |
| 380 | }; | 390 | }; |
| 381 | 391 | ||
| 382 | /* Probe for the chip by writing something to its RAM and try reading it back. */ | 392 | /* Probe for the chip by writing something to its RAM and try reading it back. */ |
diff --git a/arch/cris/arch-v10/drivers/eeprom.c b/arch/cris/arch-v10/drivers/eeprom.c index 1f2ae909d3e6..c3405507a3d1 100644 --- a/arch/cris/arch-v10/drivers/eeprom.c +++ b/arch/cris/arch-v10/drivers/eeprom.c | |||
| @@ -73,8 +73,7 @@ struct eeprom_type | |||
| 73 | int adapt_state; /* 1 = To high , 0 = Even, -1 = To low */ | 73 | int adapt_state; /* 1 = To high , 0 = Even, -1 = To low */ |
| 74 | 74 | ||
| 75 | /* this one is to keep the read/write operations atomic */ | 75 | /* this one is to keep the read/write operations atomic */ |
| 76 | wait_queue_head_t wait_q; | 76 | struct mutex lock; |
| 77 | volatile int busy; | ||
| 78 | int retry_cnt_addr; /* Used to keep track of number of retries for | 77 | int retry_cnt_addr; /* Used to keep track of number of retries for |
| 79 | adaptive timing adjustments */ | 78 | adaptive timing adjustments */ |
| 80 | int retry_cnt_read; | 79 | int retry_cnt_read; |
| @@ -115,8 +114,7 @@ const struct file_operations eeprom_fops = | |||
| 115 | 114 | ||
| 116 | int __init eeprom_init(void) | 115 | int __init eeprom_init(void) |
| 117 | { | 116 | { |
| 118 | init_waitqueue_head(&eeprom.wait_q); | 117 | mutex_init(&eeprom.lock); |
| 119 | eeprom.busy = 0; | ||
| 120 | 118 | ||
| 121 | #ifdef CONFIG_ETRAX_I2C_EEPROM_PROBE | 119 | #ifdef CONFIG_ETRAX_I2C_EEPROM_PROBE |
| 122 | #define EETEXT "Found" | 120 | #define EETEXT "Found" |
| @@ -439,10 +437,7 @@ static loff_t eeprom_lseek(struct file * file, loff_t offset, int orig) | |||
| 439 | 437 | ||
| 440 | static int eeprom_read_buf(loff_t addr, char * buf, int count) | 438 | static int eeprom_read_buf(loff_t addr, char * buf, int count) |
| 441 | { | 439 | { |
| 442 | struct file f; | 440 | return eeprom_read(NULL, buf, count, &addr); |
| 443 | |||
| 444 | f.f_pos = addr; | ||
| 445 | return eeprom_read(&f, buf, count, &addr); | ||
| 446 | } | 441 | } |
| 447 | 442 | ||
| 448 | 443 | ||
| @@ -452,7 +447,7 @@ static int eeprom_read_buf(loff_t addr, char * buf, int count) | |||
| 452 | static ssize_t eeprom_read(struct file * file, char * buf, size_t count, loff_t *off) | 447 | static ssize_t eeprom_read(struct file * file, char * buf, size_t count, loff_t *off) |
| 453 | { | 448 | { |
| 454 | int read=0; | 449 | int read=0; |
| 455 | unsigned long p = file->f_pos; | 450 | unsigned long p = *off; |
| 456 | 451 | ||
| 457 | unsigned char page; | 452 | unsigned char page; |
| 458 | 453 | ||
| @@ -461,12 +456,9 @@ static ssize_t eeprom_read(struct file * file, char * buf, size_t count, loff_t | |||
| 461 | return -EFAULT; | 456 | return -EFAULT; |
| 462 | } | 457 | } |
| 463 | 458 | ||
| 464 | wait_event_interruptible(eeprom.wait_q, !eeprom.busy); | 459 | if (mutex_lock_interruptible(&eeprom.lock)) |
| 465 | if (signal_pending(current)) | ||
| 466 | return -EINTR; | 460 | return -EINTR; |
| 467 | 461 | ||
| 468 | eeprom.busy++; | ||
| 469 | |||
| 470 | page = (unsigned char) (p >> 8); | 462 | page = (unsigned char) (p >> 8); |
| 471 | 463 | ||
| 472 | if(!eeprom_address(p)) | 464 | if(!eeprom_address(p)) |
| @@ -476,8 +468,7 @@ static ssize_t eeprom_read(struct file * file, char * buf, size_t count, loff_t | |||
| 476 | i2c_stop(); | 468 | i2c_stop(); |
| 477 | 469 | ||
| 478 | /* don't forget to wake them up */ | 470 | /* don't forget to wake them up */ |
| 479 | eeprom.busy--; | 471 | mutex_unlock(&eeprom.lock); |
| 480 | wake_up_interruptible(&eeprom.wait_q); | ||
| 481 | return -EFAULT; | 472 | return -EFAULT; |
| 482 | } | 473 | } |
| 483 | 474 | ||
| @@ -501,11 +492,10 @@ static ssize_t eeprom_read(struct file * file, char * buf, size_t count, loff_t | |||
| 501 | 492 | ||
| 502 | if(read > 0) | 493 | if(read > 0) |
| 503 | { | 494 | { |
| 504 | file->f_pos += read; | 495 | *off += read; |
| 505 | } | 496 | } |
| 506 | 497 | ||
| 507 | eeprom.busy--; | 498 | mutex_unlock(&eeprom.lock); |
| 508 | wake_up_interruptible(&eeprom.wait_q); | ||
| 509 | return read; | 499 | return read; |
| 510 | } | 500 | } |
| 511 | 501 | ||
| @@ -513,11 +503,7 @@ static ssize_t eeprom_read(struct file * file, char * buf, size_t count, loff_t | |||
| 513 | 503 | ||
| 514 | static int eeprom_write_buf(loff_t addr, const char * buf, int count) | 504 | static int eeprom_write_buf(loff_t addr, const char * buf, int count) |
| 515 | { | 505 | { |
| 516 | struct file f; | 506 | return eeprom_write(NULL, buf, count, &addr); |
| 517 | |||
| 518 | f.f_pos = addr; | ||
| 519 | |||
| 520 | return eeprom_write(&f, buf, count, &addr); | ||
| 521 | } | 507 | } |
| 522 | 508 | ||
| 523 | 509 | ||
| @@ -534,16 +520,14 @@ static ssize_t eeprom_write(struct file * file, const char * buf, size_t count, | |||
| 534 | return -EFAULT; | 520 | return -EFAULT; |
| 535 | } | 521 | } |
| 536 | 522 | ||
| 537 | wait_event_interruptible(eeprom.wait_q, !eeprom.busy); | ||
| 538 | /* bail out if we get interrupted */ | 523 | /* bail out if we get interrupted */ |
| 539 | if (signal_pending(current)) | 524 | if (mutex_lock_interruptible(&eeprom.lock)) |
| 540 | return -EINTR; | 525 | return -EINTR; |
| 541 | eeprom.busy++; | ||
| 542 | for(i = 0; (i < EEPROM_RETRIES) && (restart > 0); i++) | 526 | for(i = 0; (i < EEPROM_RETRIES) && (restart > 0); i++) |
| 543 | { | 527 | { |
| 544 | restart = 0; | 528 | restart = 0; |
| 545 | written = 0; | 529 | written = 0; |
| 546 | p = file->f_pos; | 530 | p = *off; |
| 547 | 531 | ||
| 548 | 532 | ||
| 549 | while( (written < count) && (p < eeprom.size)) | 533 | while( (written < count) && (p < eeprom.size)) |
| @@ -556,8 +540,7 @@ static ssize_t eeprom_write(struct file * file, const char * buf, size_t count, | |||
| 556 | i2c_stop(); | 540 | i2c_stop(); |
| 557 | 541 | ||
| 558 | /* don't forget to wake them up */ | 542 | /* don't forget to wake them up */ |
| 559 | eeprom.busy--; | 543 | mutex_unlock(&eeprom.lock); |
| 560 | wake_up_interruptible(&eeprom.wait_q); | ||
| 561 | return -EFAULT; | 544 | return -EFAULT; |
| 562 | } | 545 | } |
| 563 | #ifdef EEPROM_ADAPTIVE_TIMING | 546 | #ifdef EEPROM_ADAPTIVE_TIMING |
| @@ -669,12 +652,11 @@ static ssize_t eeprom_write(struct file * file, const char * buf, size_t count, | |||
| 669 | } /* while */ | 652 | } /* while */ |
| 670 | } /* for */ | 653 | } /* for */ |
| 671 | 654 | ||
| 672 | eeprom.busy--; | 655 | mutex_unlock(&eeprom.lock); |
| 673 | wake_up_interruptible(&eeprom.wait_q); | 656 | if (written == 0 && p >= eeprom.size){ |
| 674 | if (written == 0 && file->f_pos >= eeprom.size){ | ||
| 675 | return -ENOSPC; | 657 | return -ENOSPC; |
| 676 | } | 658 | } |
| 677 | file->f_pos += written; | 659 | *off = p; |
| 678 | return written; | 660 | return written; |
| 679 | } | 661 | } |
| 680 | 662 | ||
diff --git a/arch/cris/arch-v10/drivers/pcf8563.c b/arch/cris/arch-v10/drivers/pcf8563.c index 1e90c1a9c849..7dcb1f85f42b 100644 --- a/arch/cris/arch-v10/drivers/pcf8563.c +++ b/arch/cris/arch-v10/drivers/pcf8563.c | |||
| @@ -27,6 +27,7 @@ | |||
| 27 | #include <linux/delay.h> | 27 | #include <linux/delay.h> |
| 28 | #include <linux/bcd.h> | 28 | #include <linux/bcd.h> |
| 29 | #include <linux/mutex.h> | 29 | #include <linux/mutex.h> |
| 30 | #include <linux/smp_lock.h> | ||
| 30 | 31 | ||
| 31 | #include <asm/uaccess.h> | 32 | #include <asm/uaccess.h> |
| 32 | #include <asm/system.h> | 33 | #include <asm/system.h> |
| @@ -53,7 +54,7 @@ static DEFINE_MUTEX(rtc_lock); /* Protect state etc */ | |||
| 53 | static const unsigned char days_in_month[] = | 54 | static const unsigned char days_in_month[] = |
| 54 | { 0, 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 }; | 55 | { 0, 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 }; |
| 55 | 56 | ||
| 56 | int pcf8563_ioctl(struct inode *, struct file *, unsigned int, unsigned long); | 57 | static long pcf8563_unlocked_ioctl(struct file *, unsigned int, unsigned long); |
| 57 | 58 | ||
| 58 | /* Cache VL bit value read at driver init since writing the RTC_SECOND | 59 | /* Cache VL bit value read at driver init since writing the RTC_SECOND |
| 59 | * register clears the VL status. | 60 | * register clears the VL status. |
| @@ -62,7 +63,7 @@ static int voltage_low; | |||
| 62 | 63 | ||
| 63 | static const struct file_operations pcf8563_fops = { | 64 | static const struct file_operations pcf8563_fops = { |
| 64 | .owner = THIS_MODULE, | 65 | .owner = THIS_MODULE, |
| 65 | .ioctl = pcf8563_ioctl, | 66 | .unlocked_ioctl = pcf8563_unlocked_ioctl, |
| 66 | }; | 67 | }; |
| 67 | 68 | ||
| 68 | unsigned char | 69 | unsigned char |
| @@ -212,8 +213,7 @@ pcf8563_exit(void) | |||
| 212 | * ioctl calls for this driver. Why return -ENOTTY upon error? Because | 213 | * ioctl calls for this driver. Why return -ENOTTY upon error? Because |
| 213 | * POSIX says so! | 214 | * POSIX says so! |
| 214 | */ | 215 | */ |
| 215 | int pcf8563_ioctl(struct inode *inode, struct file *filp, unsigned int cmd, | 216 | static int pcf8563_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) |
| 216 | unsigned long arg) | ||
| 217 | { | 217 | { |
| 218 | /* Some sanity checks. */ | 218 | /* Some sanity checks. */ |
| 219 | if (_IOC_TYPE(cmd) != RTC_MAGIC) | 219 | if (_IOC_TYPE(cmd) != RTC_MAGIC) |
| @@ -339,6 +339,17 @@ int pcf8563_ioctl(struct inode *inode, struct file *filp, unsigned int cmd, | |||
| 339 | return 0; | 339 | return 0; |
| 340 | } | 340 | } |
| 341 | 341 | ||
| 342 | static long pcf8563_unlocked_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) | ||
| 343 | { | ||
| 344 | int ret; | ||
| 345 | |||
| 346 | lock_kernel(); | ||
| 347 | return pcf8563_ioctl(filp, cmd, arg); | ||
| 348 | unlock_kernel(); | ||
| 349 | |||
| 350 | return ret; | ||
| 351 | } | ||
| 352 | |||
| 342 | static int __init pcf8563_register(void) | 353 | static int __init pcf8563_register(void) |
| 343 | { | 354 | { |
| 344 | if (pcf8563_init() < 0) { | 355 | if (pcf8563_init() < 0) { |
diff --git a/arch/cris/arch-v10/kernel/irq.c b/arch/cris/arch-v10/kernel/irq.c index 1a61efc13982..a0c0df8be9c8 100644 --- a/arch/cris/arch-v10/kernel/irq.c +++ b/arch/cris/arch-v10/kernel/irq.c | |||
| @@ -17,8 +17,8 @@ | |||
| 17 | #include <linux/kernel.h> | 17 | #include <linux/kernel.h> |
| 18 | #include <linux/init.h> | 18 | #include <linux/init.h> |
| 19 | 19 | ||
| 20 | #define mask_irq(irq_nr) (*R_VECT_MASK_CLR = 1 << (irq_nr)); | 20 | #define crisv10_mask_irq(irq_nr) (*R_VECT_MASK_CLR = 1 << (irq_nr)); |
| 21 | #define unmask_irq(irq_nr) (*R_VECT_MASK_SET = 1 << (irq_nr)); | 21 | #define crisv10_unmask_irq(irq_nr) (*R_VECT_MASK_SET = 1 << (irq_nr)); |
| 22 | 22 | ||
| 23 | /* don't use set_int_vector, it bypasses the linux interrupt handlers. it is | 23 | /* don't use set_int_vector, it bypasses the linux interrupt handlers. it is |
| 24 | * global just so that the kernel gdb can use it. | 24 | * global just so that the kernel gdb can use it. |
| @@ -116,12 +116,12 @@ static unsigned int startup_crisv10_irq(unsigned int irq) | |||
| 116 | 116 | ||
| 117 | static void enable_crisv10_irq(unsigned int irq) | 117 | static void enable_crisv10_irq(unsigned int irq) |
| 118 | { | 118 | { |
| 119 | unmask_irq(irq); | 119 | crisv10_unmask_irq(irq); |
| 120 | } | 120 | } |
| 121 | 121 | ||
| 122 | static void disable_crisv10_irq(unsigned int irq) | 122 | static void disable_crisv10_irq(unsigned int irq) |
| 123 | { | 123 | { |
| 124 | mask_irq(irq); | 124 | crisv10_mask_irq(irq); |
| 125 | } | 125 | } |
| 126 | 126 | ||
| 127 | static void ack_crisv10_irq(unsigned int irq) | 127 | static void ack_crisv10_irq(unsigned int irq) |
diff --git a/arch/cris/arch-v10/lib/dmacopy.c b/arch/cris/arch-v10/lib/dmacopy.c index e5fb44f505c5..49f5b8ca5b47 100644 --- a/arch/cris/arch-v10/lib/dmacopy.c +++ b/arch/cris/arch-v10/lib/dmacopy.c | |||
| @@ -1,5 +1,4 @@ | |||
| 1 | /* $Id: dmacopy.c,v 1.1 2001/12/17 13:59:27 bjornw Exp $ | 1 | /* |
| 2 | * | ||
| 3 | * memcpy for large blocks, using memory-memory DMA channels 6 and 7 in Etrax | 2 | * memcpy for large blocks, using memory-memory DMA channels 6 and 7 in Etrax |
| 4 | */ | 3 | */ |
| 5 | 4 | ||
| @@ -13,11 +12,11 @@ void *dma_memcpy(void *pdst, | |||
| 13 | unsigned int pn) | 12 | unsigned int pn) |
| 14 | { | 13 | { |
| 15 | static etrax_dma_descr indma, outdma; | 14 | static etrax_dma_descr indma, outdma; |
| 16 | 15 | ||
| 17 | D(printk("dma_memcpy %d bytes... ", pn)); | 16 | D(printk(KERN_DEBUG "dma_memcpy %d bytes... ", pn)); |
| 18 | 17 | ||
| 19 | #if 0 | 18 | #if 0 |
| 20 | *R_GEN_CONFIG = genconfig_shadow = | 19 | *R_GEN_CONFIG = genconfig_shadow = |
| 21 | (genconfig_shadow & ~0x3c0000) | | 20 | (genconfig_shadow & ~0x3c0000) | |
| 22 | IO_STATE(R_GEN_CONFIG, dma6, intdma7) | | 21 | IO_STATE(R_GEN_CONFIG, dma6, intdma7) | |
| 23 | IO_STATE(R_GEN_CONFIG, dma7, intdma6); | 22 | IO_STATE(R_GEN_CONFIG, dma7, intdma6); |
| @@ -32,11 +31,11 @@ void *dma_memcpy(void *pdst, | |||
| 32 | *R_DMA_CH7_FIRST = &outdma; | 31 | *R_DMA_CH7_FIRST = &outdma; |
| 33 | *R_DMA_CH6_CMD = IO_STATE(R_DMA_CH6_CMD, cmd, start); | 32 | *R_DMA_CH6_CMD = IO_STATE(R_DMA_CH6_CMD, cmd, start); |
| 34 | *R_DMA_CH7_CMD = IO_STATE(R_DMA_CH7_CMD, cmd, start); | 33 | *R_DMA_CH7_CMD = IO_STATE(R_DMA_CH7_CMD, cmd, start); |
| 35 | |||
| 36 | while(*R_DMA_CH7_CMD == 1) /* wait for completion */ ; | ||
| 37 | 34 | ||
| 38 | D(printk("done\n")); | 35 | while (*R_DMA_CH7_CMD == 1) |
| 36 | /* wait for completion */; | ||
| 39 | 37 | ||
| 38 | D(printk(KERN_DEBUG "done\n")); | ||
| 40 | } | 39 | } |
| 41 | 40 | ||
| 42 | 41 | ||
diff --git a/arch/cris/arch-v10/lib/hw_settings.S b/arch/cris/arch-v10/lib/hw_settings.S index 56905aaa7b6e..c09f19f478a5 100644 --- a/arch/cris/arch-v10/lib/hw_settings.S +++ b/arch/cris/arch-v10/lib/hw_settings.S | |||
| @@ -1,13 +1,11 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * $Id: hw_settings.S,v 1.1 2001/12/17 13:59:27 bjornw Exp $ | ||
| 3 | * | ||
| 4 | * This table is used by some tools to extract hardware parameters. | 2 | * This table is used by some tools to extract hardware parameters. |
| 5 | * The table should be included in the kernel and the decompressor. | 3 | * The table should be included in the kernel and the decompressor. |
| 6 | * Don't forget to update the tools if you change this table. | 4 | * Don't forget to update the tools if you change this table. |
| 7 | * | 5 | * |
| 8 | * Copyright (C) 2001 Axis Communications AB | 6 | * Copyright (C) 2001 Axis Communications AB |
| 9 | * | 7 | * |
| 10 | * Authors: Mikael Starvik (starvik@axis.com) | 8 | * Authors: Mikael Starvik (starvik@axis.com) |
| 11 | */ | 9 | */ |
| 12 | 10 | ||
| 13 | #define PA_SET_VALUE ((CONFIG_ETRAX_DEF_R_PORT_PA_DIR << 8) | \ | 11 | #define PA_SET_VALUE ((CONFIG_ETRAX_DEF_R_PORT_PA_DIR << 8) | \ |
| @@ -15,13 +13,13 @@ | |||
| 15 | #define PB_SET_VALUE ((CONFIG_ETRAX_DEF_R_PORT_PB_CONFIG << 16) | \ | 13 | #define PB_SET_VALUE ((CONFIG_ETRAX_DEF_R_PORT_PB_CONFIG << 16) | \ |
| 16 | (CONFIG_ETRAX_DEF_R_PORT_PB_DIR << 8) | \ | 14 | (CONFIG_ETRAX_DEF_R_PORT_PB_DIR << 8) | \ |
| 17 | (CONFIG_ETRAX_DEF_R_PORT_PB_DATA)) | 15 | (CONFIG_ETRAX_DEF_R_PORT_PB_DATA)) |
| 18 | 16 | ||
| 19 | .ascii "HW_PARAM_MAGIC" ; Magic number | 17 | .ascii "HW_PARAM_MAGIC" ; Magic number |
| 20 | .dword 0xc0004000 ; Kernel start address | 18 | .dword 0xc0004000 ; Kernel start address |
| 21 | 19 | ||
| 22 | ; Debug port | 20 | ; Debug port |
| 23 | #ifdef CONFIG_ETRAX_DEBUG_PORT0 | 21 | #ifdef CONFIG_ETRAX_DEBUG_PORT0 |
| 24 | .dword 0 | 22 | .dword 0 |
| 25 | #elif defined(CONFIG_ETRAX_DEBUG_PORT1) | 23 | #elif defined(CONFIG_ETRAX_DEBUG_PORT1) |
| 26 | .dword 1 | 24 | .dword 1 |
| 27 | #elif defined(CONFIG_ETRAX_DEBUG_PORT2) | 25 | #elif defined(CONFIG_ETRAX_DEBUG_PORT2) |
| @@ -30,7 +28,7 @@ | |||
| 30 | .dword 3 | 28 | .dword 3 |
| 31 | #else | 29 | #else |
| 32 | .dword 4 ; No debug | 30 | .dword 4 ; No debug |
| 33 | #endif | 31 | #endif |
| 34 | 32 | ||
| 35 | ; SDRAM or EDO DRAM? | 33 | ; SDRAM or EDO DRAM? |
| 36 | #ifdef CONFIG_ETRAX_SDRAM | 34 | #ifdef CONFIG_ETRAX_SDRAM |
| @@ -39,7 +37,7 @@ | |||
| 39 | .dword 0 | 37 | .dword 0 |
| 40 | #endif | 38 | #endif |
| 41 | 39 | ||
| 42 | ; Register values | 40 | ; Register values |
| 43 | .dword R_WAITSTATES | 41 | .dword R_WAITSTATES |
| 44 | .dword CONFIG_ETRAX_DEF_R_WAITSTATES | 42 | .dword CONFIG_ETRAX_DEF_R_WAITSTATES |
| 45 | .dword R_BUS_CONFIG | 43 | .dword R_BUS_CONFIG |
| @@ -56,7 +54,7 @@ | |||
| 56 | .dword CONFIG_ETRAX_DEF_R_DRAM_TIMING | 54 | .dword CONFIG_ETRAX_DEF_R_DRAM_TIMING |
| 57 | #endif | 55 | #endif |
| 58 | .dword R_PORT_PA_SET | 56 | .dword R_PORT_PA_SET |
| 59 | .dword PA_SET_VALUE | 57 | .dword PA_SET_VALUE |
| 60 | .dword R_PORT_PB_SET | 58 | .dword R_PORT_PB_SET |
| 61 | .dword PB_SET_VALUE | 59 | .dword PB_SET_VALUE |
| 62 | .dword 0 ; No more register values | 60 | .dword 0 ; No more register values |
diff --git a/arch/cris/arch-v32/drivers/Kconfig b/arch/cris/arch-v32/drivers/Kconfig index b9e328e688be..a2dd740c5907 100644 --- a/arch/cris/arch-v32/drivers/Kconfig +++ b/arch/cris/arch-v32/drivers/Kconfig | |||
| @@ -360,24 +360,10 @@ config ETRAX_SER4_DSR_BIT | |||
| 360 | string "Ser 4 DSR bit (empty = not used)" | 360 | string "Ser 4 DSR bit (empty = not used)" |
| 361 | depends on ETRAX_SERIAL_PORT4 | 361 | depends on ETRAX_SERIAL_PORT4 |
| 362 | 362 | ||
| 363 | config ETRAX_SER3_CD_BIT | 363 | config ETRAX_SER4_CD_BIT |
| 364 | string "Ser 4 CD bit (empty = not used)" | 364 | string "Ser 4 CD bit (empty = not used)" |
| 365 | depends on ETRAX_SERIAL_PORT4 | 365 | depends on ETRAX_SERIAL_PORT4 |
| 366 | 366 | ||
| 367 | config ETRAX_RS485 | ||
| 368 | bool "RS-485 support" | ||
| 369 | depends on ETRAXFS_SERIAL | ||
| 370 | help | ||
| 371 | Enables support for RS-485 serial communication. For a primer on | ||
| 372 | RS-485, see <http://www.hw.cz/english/docs/rs485/rs485.html>. | ||
| 373 | |||
| 374 | config ETRAX_RS485_DISABLE_RECEIVER | ||
| 375 | bool "Disable serial receiver" | ||
| 376 | depends on ETRAX_RS485 | ||
| 377 | help | ||
| 378 | It is necessary to disable the serial receiver to avoid serial | ||
| 379 | loopback. Not all products are able to do this in software only. | ||
| 380 | |||
| 381 | config ETRAX_SYNCHRONOUS_SERIAL | 367 | config ETRAX_SYNCHRONOUS_SERIAL |
| 382 | bool "Synchronous serial-port support" | 368 | bool "Synchronous serial-port support" |
| 383 | depends on ETRAX_ARCH_V32 | 369 | depends on ETRAX_ARCH_V32 |
diff --git a/arch/cris/arch-v32/drivers/i2c.c b/arch/cris/arch-v32/drivers/i2c.c index 506826399ae7..2fd6a740d895 100644 --- a/arch/cris/arch-v32/drivers/i2c.c +++ b/arch/cris/arch-v32/drivers/i2c.c | |||
| @@ -649,10 +649,10 @@ i2c_release(struct inode *inode, struct file *filp) | |||
| 649 | /* Main device API. ioctl's to write or read to/from i2c registers. | 649 | /* Main device API. ioctl's to write or read to/from i2c registers. |
| 650 | */ | 650 | */ |
| 651 | 651 | ||
| 652 | static int | 652 | static long |
| 653 | i2c_ioctl(struct inode *inode, struct file *file, | 653 | i2c_ioctl(struct file *file, unsigned int cmd, unsigned long arg) |
| 654 | unsigned int cmd, unsigned long arg) | ||
| 655 | { | 654 | { |
| 655 | int ret; | ||
| 656 | if(_IOC_TYPE(cmd) != ETRAXI2C_IOCTYPE) { | 656 | if(_IOC_TYPE(cmd) != ETRAXI2C_IOCTYPE) { |
| 657 | return -ENOTTY; | 657 | return -ENOTTY; |
| 658 | } | 658 | } |
| @@ -665,9 +665,13 @@ i2c_ioctl(struct inode *inode, struct file *file, | |||
| 665 | I2C_ARGREG(arg), | 665 | I2C_ARGREG(arg), |
| 666 | I2C_ARGVALUE(arg))); | 666 | I2C_ARGVALUE(arg))); |
| 667 | 667 | ||
| 668 | return i2c_writereg(I2C_ARGSLAVE(arg), | 668 | lock_kernel(); |
| 669 | ret = i2c_writereg(I2C_ARGSLAVE(arg), | ||
| 669 | I2C_ARGREG(arg), | 670 | I2C_ARGREG(arg), |
| 670 | I2C_ARGVALUE(arg)); | 671 | I2C_ARGVALUE(arg)); |
| 672 | unlock_kernel(); | ||
| 673 | return ret; | ||
| 674 | |||
| 671 | case I2C_READREG: | 675 | case I2C_READREG: |
| 672 | { | 676 | { |
| 673 | unsigned char val; | 677 | unsigned char val; |
| @@ -675,7 +679,9 @@ i2c_ioctl(struct inode *inode, struct file *file, | |||
| 675 | D(printk("i2cr %d %d ", | 679 | D(printk("i2cr %d %d ", |
| 676 | I2C_ARGSLAVE(arg), | 680 | I2C_ARGSLAVE(arg), |
| 677 | I2C_ARGREG(arg))); | 681 | I2C_ARGREG(arg))); |
| 682 | lock_kernel(); | ||
| 678 | val = i2c_readreg(I2C_ARGSLAVE(arg), I2C_ARGREG(arg)); | 683 | val = i2c_readreg(I2C_ARGSLAVE(arg), I2C_ARGREG(arg)); |
| 684 | unlock_kernel(); | ||
| 679 | D(printk("= %d\n", val)); | 685 | D(printk("= %d\n", val)); |
| 680 | return val; | 686 | return val; |
| 681 | } | 687 | } |
| @@ -688,10 +694,10 @@ i2c_ioctl(struct inode *inode, struct file *file, | |||
| 688 | } | 694 | } |
| 689 | 695 | ||
| 690 | static const struct file_operations i2c_fops = { | 696 | static const struct file_operations i2c_fops = { |
| 691 | .owner = THIS_MODULE, | 697 | .owner = THIS_MODULE, |
| 692 | .ioctl = i2c_ioctl, | 698 | .unlocked_ioctl = i2c_ioctl, |
| 693 | .open = i2c_open, | 699 | .open = i2c_open, |
| 694 | .release = i2c_release, | 700 | .release = i2c_release, |
| 695 | }; | 701 | }; |
| 696 | 702 | ||
| 697 | static int __init i2c_init(void) | 703 | static int __init i2c_init(void) |
diff --git a/arch/cris/arch-v32/drivers/pcf8563.c b/arch/cris/arch-v32/drivers/pcf8563.c index f4478506e52c..bef6eb53b153 100644 --- a/arch/cris/arch-v32/drivers/pcf8563.c +++ b/arch/cris/arch-v32/drivers/pcf8563.c | |||
| @@ -24,6 +24,7 @@ | |||
| 24 | #include <linux/init.h> | 24 | #include <linux/init.h> |
| 25 | #include <linux/fs.h> | 25 | #include <linux/fs.h> |
| 26 | #include <linux/ioctl.h> | 26 | #include <linux/ioctl.h> |
| 27 | #include <linux/smp_lock.h> | ||
| 27 | #include <linux/delay.h> | 28 | #include <linux/delay.h> |
| 28 | #include <linux/bcd.h> | 29 | #include <linux/bcd.h> |
| 29 | #include <linux/mutex.h> | 30 | #include <linux/mutex.h> |
| @@ -49,7 +50,7 @@ static DEFINE_MUTEX(rtc_lock); /* Protect state etc */ | |||
| 49 | static const unsigned char days_in_month[] = | 50 | static const unsigned char days_in_month[] = |
| 50 | { 0, 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 }; | 51 | { 0, 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 }; |
| 51 | 52 | ||
| 52 | int pcf8563_ioctl(struct inode *, struct file *, unsigned int, unsigned long); | 53 | static long pcf8563_unlocked_ioctl(struct file *filp, unsigned int cmd, unsigned long arg); |
| 53 | 54 | ||
| 54 | /* Cache VL bit value read at driver init since writing the RTC_SECOND | 55 | /* Cache VL bit value read at driver init since writing the RTC_SECOND |
| 55 | * register clears the VL status. | 56 | * register clears the VL status. |
| @@ -57,8 +58,8 @@ int pcf8563_ioctl(struct inode *, struct file *, unsigned int, unsigned long); | |||
| 57 | static int voltage_low; | 58 | static int voltage_low; |
| 58 | 59 | ||
| 59 | static const struct file_operations pcf8563_fops = { | 60 | static const struct file_operations pcf8563_fops = { |
| 60 | .owner = THIS_MODULE, | 61 | .owner = THIS_MODULE, |
| 61 | .ioctl = pcf8563_ioctl | 62 | .unlocked_ioctl = pcf8563_unlocked_ioctl, |
| 62 | }; | 63 | }; |
| 63 | 64 | ||
| 64 | unsigned char | 65 | unsigned char |
| @@ -208,8 +209,7 @@ pcf8563_exit(void) | |||
| 208 | * ioctl calls for this driver. Why return -ENOTTY upon error? Because | 209 | * ioctl calls for this driver. Why return -ENOTTY upon error? Because |
| 209 | * POSIX says so! | 210 | * POSIX says so! |
| 210 | */ | 211 | */ |
| 211 | int pcf8563_ioctl(struct inode *inode, struct file *filp, unsigned int cmd, | 212 | static int pcf8563_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) |
| 212 | unsigned long arg) | ||
| 213 | { | 213 | { |
| 214 | /* Some sanity checks. */ | 214 | /* Some sanity checks. */ |
| 215 | if (_IOC_TYPE(cmd) != RTC_MAGIC) | 215 | if (_IOC_TYPE(cmd) != RTC_MAGIC) |
| @@ -335,6 +335,17 @@ int pcf8563_ioctl(struct inode *inode, struct file *filp, unsigned int cmd, | |||
| 335 | return 0; | 335 | return 0; |
| 336 | } | 336 | } |
| 337 | 337 | ||
| 338 | static long pcf8563_unlocked_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) | ||
| 339 | { | ||
| 340 | int ret; | ||
| 341 | |||
| 342 | lock_kernel(); | ||
| 343 | return pcf8563_ioctl(filp, cmd, arg); | ||
| 344 | unlock_kernel(); | ||
| 345 | |||
| 346 | return ret; | ||
| 347 | } | ||
| 348 | |||
| 338 | static int __init pcf8563_register(void) | 349 | static int __init pcf8563_register(void) |
| 339 | { | 350 | { |
| 340 | if (pcf8563_init() < 0) { | 351 | if (pcf8563_init() < 0) { |
diff --git a/arch/cris/arch-v32/kernel/crisksyms.c b/arch/cris/arch-v32/kernel/crisksyms.c index 64933e2c0f5b..bde8d1a10cad 100644 --- a/arch/cris/arch-v32/kernel/crisksyms.c +++ b/arch/cris/arch-v32/kernel/crisksyms.c | |||
| @@ -24,5 +24,5 @@ EXPORT_SYMBOL(crisv32_io_get_name); | |||
| 24 | EXPORT_SYMBOL(crisv32_io_get); | 24 | EXPORT_SYMBOL(crisv32_io_get); |
| 25 | 25 | ||
| 26 | /* Functions masking/unmasking interrupts */ | 26 | /* Functions masking/unmasking interrupts */ |
| 27 | EXPORT_SYMBOL(mask_irq); | 27 | EXPORT_SYMBOL(crisv32_mask_irq); |
| 28 | EXPORT_SYMBOL(unmask_irq); | 28 | EXPORT_SYMBOL(crisv32_unmask_irq); |
diff --git a/arch/cris/arch-v32/kernel/irq.c b/arch/cris/arch-v32/kernel/irq.c index b6241198fb98..0b1febe44aa3 100644 --- a/arch/cris/arch-v32/kernel/irq.c +++ b/arch/cris/arch-v32/kernel/irq.c | |||
| @@ -280,8 +280,7 @@ out: | |||
| 280 | return cpu; | 280 | return cpu; |
| 281 | } | 281 | } |
| 282 | 282 | ||
| 283 | void | 283 | void crisv32_mask_irq(int irq) |
| 284 | mask_irq(int irq) | ||
| 285 | { | 284 | { |
| 286 | int cpu; | 285 | int cpu; |
| 287 | 286 | ||
| @@ -289,8 +288,7 @@ mask_irq(int irq) | |||
| 289 | block_irq(irq, cpu); | 288 | block_irq(irq, cpu); |
| 290 | } | 289 | } |
| 291 | 290 | ||
| 292 | void | 291 | void crisv32_unmask_irq(int irq) |
| 293 | unmask_irq(int irq) | ||
| 294 | { | 292 | { |
| 295 | unblock_irq(irq, irq_cpu(irq)); | 293 | unblock_irq(irq, irq_cpu(irq)); |
| 296 | } | 294 | } |
| @@ -298,23 +296,23 @@ unmask_irq(int irq) | |||
| 298 | 296 | ||
| 299 | static unsigned int startup_crisv32_irq(unsigned int irq) | 297 | static unsigned int startup_crisv32_irq(unsigned int irq) |
| 300 | { | 298 | { |
| 301 | unmask_irq(irq); | 299 | crisv32_unmask_irq(irq); |
| 302 | return 0; | 300 | return 0; |
| 303 | } | 301 | } |
| 304 | 302 | ||
| 305 | static void shutdown_crisv32_irq(unsigned int irq) | 303 | static void shutdown_crisv32_irq(unsigned int irq) |
| 306 | { | 304 | { |
| 307 | mask_irq(irq); | 305 | crisv32_mask_irq(irq); |
| 308 | } | 306 | } |
| 309 | 307 | ||
| 310 | static void enable_crisv32_irq(unsigned int irq) | 308 | static void enable_crisv32_irq(unsigned int irq) |
| 311 | { | 309 | { |
| 312 | unmask_irq(irq); | 310 | crisv32_unmask_irq(irq); |
| 313 | } | 311 | } |
| 314 | 312 | ||
| 315 | static void disable_crisv32_irq(unsigned int irq) | 313 | static void disable_crisv32_irq(unsigned int irq) |
| 316 | { | 314 | { |
| 317 | mask_irq(irq); | 315 | crisv32_mask_irq(irq); |
| 318 | } | 316 | } |
| 319 | 317 | ||
| 320 | static void ack_crisv32_irq(unsigned int irq) | 318 | static void ack_crisv32_irq(unsigned int irq) |
diff --git a/arch/cris/arch-v32/kernel/smp.c b/arch/cris/arch-v32/kernel/smp.c index 058adddf4e4b..84fed3b4b079 100644 --- a/arch/cris/arch-v32/kernel/smp.c +++ b/arch/cris/arch-v32/kernel/smp.c | |||
| @@ -168,8 +168,8 @@ void __init smp_callin(void) | |||
| 168 | 168 | ||
| 169 | /* Enable IRQ and idle */ | 169 | /* Enable IRQ and idle */ |
| 170 | REG_WR(intr_vect, irq_regs[cpu], rw_mask, vect_mask); | 170 | REG_WR(intr_vect, irq_regs[cpu], rw_mask, vect_mask); |
| 171 | unmask_irq(IPI_INTR_VECT); | 171 | crisv32_unmask_irq(IPI_INTR_VECT); |
| 172 | unmask_irq(TIMER0_INTR_VECT); | 172 | crisv32_unmask_irq(TIMER0_INTR_VECT); |
| 173 | preempt_disable(); | 173 | preempt_disable(); |
| 174 | notify_cpu_starting(cpu); | 174 | notify_cpu_starting(cpu); |
| 175 | local_irq_enable(); | 175 | local_irq_enable(); |
diff --git a/arch/cris/include/arch-v10/arch/irq.h b/arch/cris/include/arch-v10/arch/irq.h index 6248004eca1c..7d345947b3ee 100644 --- a/arch/cris/include/arch-v10/arch/irq.h +++ b/arch/cris/include/arch-v10/arch/irq.h | |||
| @@ -93,15 +93,16 @@ void set_break_vector(int n, irqvectptr addr); | |||
| 93 | "push $r10\n\t" /* push orig_r10 */ \ | 93 | "push $r10\n\t" /* push orig_r10 */ \ |
| 94 | "clear.d [$sp=$sp-4]\n\t" /* frametype - this is a normal stackframe */ | 94 | "clear.d [$sp=$sp-4]\n\t" /* frametype - this is a normal stackframe */ |
| 95 | 95 | ||
| 96 | /* BLOCK_IRQ and UNBLOCK_IRQ do the same as mask_irq and unmask_irq */ | 96 | /* BLOCK_IRQ and UNBLOCK_IRQ do the same as |
| 97 | * crisv10_mask_irq and crisv10_unmask_irq */ | ||
| 97 | 98 | ||
| 98 | #define BLOCK_IRQ(mask,nr) \ | 99 | #define BLOCK_IRQ(mask,nr) \ |
| 99 | "move.d " #mask ",$r0\n\t" \ | 100 | "move.d " #mask ",$r0\n\t" \ |
| 100 | "move.d $r0,[0xb00000d8]\n\t" | 101 | "move.d $r0,[0xb00000d8]\n\t" |
| 101 | 102 | ||
| 102 | #define UNBLOCK_IRQ(mask) \ | 103 | #define UNBLOCK_IRQ(mask) \ |
| 103 | "move.d " #mask ",$r0\n\t" \ | 104 | "move.d " #mask ",$r0\n\t" \ |
| 104 | "move.d $r0,[0xb00000dc]\n\t" | 105 | "move.d $r0,[0xb00000dc]\n\t" |
| 105 | 106 | ||
| 106 | #define IRQ_NAME2(nr) nr##_interrupt(void) | 107 | #define IRQ_NAME2(nr) nr##_interrupt(void) |
| 107 | #define IRQ_NAME(nr) IRQ_NAME2(IRQ##nr) | 108 | #define IRQ_NAME(nr) IRQ_NAME2(IRQ##nr) |
diff --git a/arch/cris/include/arch-v32/arch/irq.h b/arch/cris/include/arch-v32/arch/irq.h index 9e4c9fbdfddf..b31e9984f849 100644 --- a/arch/cris/include/arch-v32/arch/irq.h +++ b/arch/cris/include/arch-v32/arch/irq.h | |||
| @@ -23,8 +23,8 @@ struct etrax_interrupt_vector { | |||
| 23 | 23 | ||
| 24 | extern struct etrax_interrupt_vector *etrax_irv; /* head.S */ | 24 | extern struct etrax_interrupt_vector *etrax_irv; /* head.S */ |
| 25 | 25 | ||
| 26 | void mask_irq(int irq); | 26 | void crisv32_mask_irq(int irq); |
| 27 | void unmask_irq(int irq); | 27 | void crisv32_unmask_irq(int irq); |
| 28 | 28 | ||
| 29 | void set_exception_vector(int n, irqvectptr addr); | 29 | void set_exception_vector(int n, irqvectptr addr); |
| 30 | 30 | ||
diff --git a/arch/cris/include/asm/param.h b/arch/cris/include/asm/param.h index 0e47994e40be..484fcf8667c0 100644 --- a/arch/cris/include/asm/param.h +++ b/arch/cris/include/asm/param.h | |||
| @@ -2,22 +2,9 @@ | |||
| 2 | #define _ASMCRIS_PARAM_H | 2 | #define _ASMCRIS_PARAM_H |
| 3 | 3 | ||
| 4 | /* Currently we assume that HZ=100 is good for CRIS. */ | 4 | /* Currently we assume that HZ=100 is good for CRIS. */ |
| 5 | #ifdef __KERNEL__ | ||
| 6 | # define HZ CONFIG_HZ /* Internal kernel timer frequency */ | ||
| 7 | # define USER_HZ 100 /* .. some user interfaces are in "ticks" */ | ||
| 8 | # define CLOCKS_PER_SEC (USER_HZ) /* like times() */ | ||
| 9 | #endif | ||
| 10 | |||
| 11 | #ifndef HZ | ||
| 12 | #define HZ 100 | ||
| 13 | #endif | ||
| 14 | 5 | ||
| 15 | #define EXEC_PAGESIZE 8192 | 6 | #define EXEC_PAGESIZE 8192 |
| 16 | 7 | ||
| 17 | #ifndef NOGROUP | 8 | #include <asm-generic/param.h> |
| 18 | #define NOGROUP (-1) | ||
| 19 | #endif | ||
| 20 | |||
| 21 | #define MAXHOSTNAMELEN 64 /* max length of hostname */ | ||
| 22 | 9 | ||
| 23 | #endif | 10 | #endif /* _ASMCRIS_PARAM_H */ |
diff --git a/arch/cris/include/asm/scatterlist.h b/arch/cris/include/asm/scatterlist.h index faff53ad1f96..249a7842ff5f 100644 --- a/arch/cris/include/asm/scatterlist.h +++ b/arch/cris/include/asm/scatterlist.h | |||
| @@ -1,22 +1,7 @@ | |||
| 1 | #ifndef __ASM_CRIS_SCATTERLIST_H | 1 | #ifndef __ASM_CRIS_SCATTERLIST_H |
| 2 | #define __ASM_CRIS_SCATTERLIST_H | 2 | #define __ASM_CRIS_SCATTERLIST_H |
| 3 | 3 | ||
| 4 | struct scatterlist { | 4 | #include <asm-generic/scatterlist.h> |
| 5 | #ifdef CONFIG_DEBUG_SG | ||
| 6 | unsigned long sg_magic; | ||
| 7 | #endif | ||
| 8 | char * address; /* Location data is to be transferred to */ | ||
| 9 | unsigned int length; | ||
| 10 | |||
| 11 | /* The following is i386 highmem junk - not used by us */ | ||
| 12 | unsigned long page_link; | ||
| 13 | unsigned int offset;/* for highmem, page offset */ | ||
| 14 | |||
| 15 | }; | ||
| 16 | |||
| 17 | #define sg_dma_address(sg) ((sg)->address) | ||
| 18 | #define sg_dma_len(sg) ((sg)->length) | ||
| 19 | /* i386 junk */ | ||
| 20 | 5 | ||
| 21 | #define ISA_DMA_THRESHOLD (0x1fffffff) | 6 | #define ISA_DMA_THRESHOLD (0x1fffffff) |
| 22 | 7 | ||
diff --git a/arch/frv/include/asm/gdb-stub.h b/arch/frv/include/asm/gdb-stub.h index 2da716407ff2..e6bedd0cd9a5 100644 --- a/arch/frv/include/asm/gdb-stub.h +++ b/arch/frv/include/asm/gdb-stub.h | |||
| @@ -12,6 +12,7 @@ | |||
| 12 | #ifndef __ASM_GDB_STUB_H | 12 | #ifndef __ASM_GDB_STUB_H |
| 13 | #define __ASM_GDB_STUB_H | 13 | #define __ASM_GDB_STUB_H |
| 14 | 14 | ||
| 15 | #undef GDBSTUB_DEBUG_IO | ||
| 15 | #undef GDBSTUB_DEBUG_PROTOCOL | 16 | #undef GDBSTUB_DEBUG_PROTOCOL |
| 16 | 17 | ||
| 17 | #include <asm/ptrace.h> | 18 | #include <asm/ptrace.h> |
| @@ -108,6 +109,12 @@ extern void gdbstub_printk(const char *fmt, ...); | |||
| 108 | extern void debug_to_serial(const char *p, int n); | 109 | extern void debug_to_serial(const char *p, int n); |
| 109 | extern void console_set_baud(unsigned baud); | 110 | extern void console_set_baud(unsigned baud); |
| 110 | 111 | ||
| 112 | #ifdef GDBSTUB_DEBUG_IO | ||
| 113 | #define gdbstub_io(FMT,...) gdbstub_printk(FMT, ##__VA_ARGS__) | ||
| 114 | #else | ||
| 115 | #define gdbstub_io(FMT,...) ({ 0; }) | ||
| 116 | #endif | ||
| 117 | |||
| 111 | #ifdef GDBSTUB_DEBUG_PROTOCOL | 118 | #ifdef GDBSTUB_DEBUG_PROTOCOL |
| 112 | #define gdbstub_proto(FMT,...) gdbstub_printk(FMT,##__VA_ARGS__) | 119 | #define gdbstub_proto(FMT,...) gdbstub_printk(FMT,##__VA_ARGS__) |
| 113 | #else | 120 | #else |
diff --git a/arch/frv/include/asm/mem-layout.h b/arch/frv/include/asm/mem-layout.h index 2947764fc0e0..ccae981876fa 100644 --- a/arch/frv/include/asm/mem-layout.h +++ b/arch/frv/include/asm/mem-layout.h | |||
| @@ -35,8 +35,8 @@ | |||
| 35 | * the slab must be aligned such that load- and store-double instructions don't | 35 | * the slab must be aligned such that load- and store-double instructions don't |
| 36 | * fault if used | 36 | * fault if used |
| 37 | */ | 37 | */ |
| 38 | #define ARCH_KMALLOC_MINALIGN 8 | 38 | #define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES |
| 39 | #define ARCH_SLAB_MINALIGN 8 | 39 | #define ARCH_SLAB_MINALIGN L1_CACHE_BYTES |
| 40 | 40 | ||
| 41 | /*****************************************************************************/ | 41 | /*****************************************************************************/ |
| 42 | /* | 42 | /* |
diff --git a/arch/frv/include/asm/scatterlist.h b/arch/frv/include/asm/scatterlist.h index 4bca8a28546c..1614bfd7e3a4 100644 --- a/arch/frv/include/asm/scatterlist.h +++ b/arch/frv/include/asm/scatterlist.h | |||
| @@ -1,45 +1,7 @@ | |||
| 1 | #ifndef _ASM_SCATTERLIST_H | 1 | #ifndef _ASM_SCATTERLIST_H |
| 2 | #define _ASM_SCATTERLIST_H | 2 | #define _ASM_SCATTERLIST_H |
| 3 | 3 | ||
| 4 | #include <asm/types.h> | 4 | #include <asm-generic/scatterlist.h> |
| 5 | |||
| 6 | /* | ||
| 7 | * Drivers must set either ->address or (preferred) page and ->offset | ||
| 8 | * to indicate where data must be transferred to/from. | ||
| 9 | * | ||
| 10 | * Using page is recommended since it handles highmem data as well as | ||
| 11 | * low mem. ->address is restricted to data which has a virtual mapping, and | ||
| 12 | * it will go away in the future. Updating to page can be automated very | ||
| 13 | * easily -- something like | ||
| 14 | * | ||
| 15 | * sg->address = some_ptr; | ||
| 16 | * | ||
| 17 | * can be rewritten as | ||
| 18 | * | ||
| 19 | * sg_set_buf(sg, some_ptr, length); | ||
| 20 | * | ||
| 21 | * and that's it. There's no excuse for not highmem enabling YOUR driver. /jens | ||
| 22 | */ | ||
| 23 | struct scatterlist { | ||
| 24 | #ifdef CONFIG_DEBUG_SG | ||
| 25 | unsigned long sg_magic; | ||
| 26 | #endif | ||
| 27 | unsigned long page_link; | ||
| 28 | unsigned int offset; /* for highmem, page offset */ | ||
| 29 | |||
| 30 | dma_addr_t dma_address; | ||
| 31 | unsigned int length; | ||
| 32 | }; | ||
| 33 | |||
| 34 | /* | ||
| 35 | * These macros should be used after a pci_map_sg call has been done | ||
| 36 | * to get bus addresses of each of the SG entries and their lengths. | ||
| 37 | * You should only work with the number of sg entries pci_map_sg | ||
| 38 | * returns, or alternatively stop on the first sg_dma_len(sg) which | ||
| 39 | * is 0. | ||
| 40 | */ | ||
| 41 | #define sg_dma_address(sg) ((sg)->dma_address) | ||
| 42 | #define sg_dma_len(sg) ((sg)->length) | ||
| 43 | 5 | ||
| 44 | #define ISA_DMA_THRESHOLD (0xffffffffUL) | 6 | #define ISA_DMA_THRESHOLD (0xffffffffUL) |
| 45 | 7 | ||
diff --git a/arch/frv/kernel/break.S b/arch/frv/kernel/break.S index bd0bdf908d93..cbb6958a3147 100644 --- a/arch/frv/kernel/break.S +++ b/arch/frv/kernel/break.S | |||
| @@ -21,7 +21,7 @@ | |||
| 21 | # | 21 | # |
| 22 | # the break handler has its own stack | 22 | # the break handler has its own stack |
| 23 | # | 23 | # |
| 24 | .section .bss.stack | 24 | .section .bss..stack |
| 25 | .globl __break_user_context | 25 | .globl __break_user_context |
| 26 | .balign THREAD_SIZE | 26 | .balign THREAD_SIZE |
| 27 | __break_stack: | 27 | __break_stack: |
| @@ -63,7 +63,7 @@ __break_trace_through_exceptions: | |||
| 63 | # entry point for Break Exceptions/Interrupts | 63 | # entry point for Break Exceptions/Interrupts |
| 64 | # | 64 | # |
| 65 | ############################################################################### | 65 | ############################################################################### |
| 66 | .section .text.break | 66 | .section .text..break |
| 67 | .balign 4 | 67 | .balign 4 |
| 68 | .globl __entry_break | 68 | .globl __entry_break |
| 69 | __entry_break: | 69 | __entry_break: |
diff --git a/arch/frv/kernel/entry.S b/arch/frv/kernel/entry.S index 189397ec012a..63d579bf1c29 100644 --- a/arch/frv/kernel/entry.S +++ b/arch/frv/kernel/entry.S | |||
| @@ -38,7 +38,7 @@ | |||
| 38 | 38 | ||
| 39 | #define nr_syscalls ((syscall_table_size)/4) | 39 | #define nr_syscalls ((syscall_table_size)/4) |
| 40 | 40 | ||
| 41 | .section .text.entry | 41 | .section .text..entry |
| 42 | .balign 4 | 42 | .balign 4 |
| 43 | 43 | ||
| 44 | .macro LEDS val | 44 | .macro LEDS val |
diff --git a/arch/frv/kernel/gdb-io.c b/arch/frv/kernel/gdb-io.c index c997bccb9221..2ca641d199f8 100644 --- a/arch/frv/kernel/gdb-io.c +++ b/arch/frv/kernel/gdb-io.c | |||
| @@ -171,11 +171,11 @@ int gdbstub_rx_char(unsigned char *_ch, int nonblock) | |||
| 171 | return -EINTR; | 171 | return -EINTR; |
| 172 | } | 172 | } |
| 173 | else if (st & (UART_LSR_FE|UART_LSR_OE|UART_LSR_PE)) { | 173 | else if (st & (UART_LSR_FE|UART_LSR_OE|UART_LSR_PE)) { |
| 174 | gdbstub_proto("### GDB Rx Error (st=%02x) ###\n",st); | 174 | gdbstub_io("### GDB Rx Error (st=%02x) ###\n",st); |
| 175 | return -EIO; | 175 | return -EIO; |
| 176 | } | 176 | } |
| 177 | else { | 177 | else { |
| 178 | gdbstub_proto("### GDB Rx %02x (st=%02x) ###\n",ch,st); | 178 | gdbstub_io("### GDB Rx %02x (st=%02x) ###\n",ch,st); |
| 179 | *_ch = ch & 0x7f; | 179 | *_ch = ch & 0x7f; |
| 180 | return 0; | 180 | return 0; |
| 181 | } | 181 | } |
diff --git a/arch/frv/kernel/gdb-stub.c b/arch/frv/kernel/gdb-stub.c index 7ca8a6b19ac9..a4dba6b20bd0 100644 --- a/arch/frv/kernel/gdb-stub.c +++ b/arch/frv/kernel/gdb-stub.c | |||
| @@ -1344,6 +1344,44 @@ void gdbstub_get_mmu_state(void) | |||
| 1344 | 1344 | ||
| 1345 | } /* end gdbstub_get_mmu_state() */ | 1345 | } /* end gdbstub_get_mmu_state() */ |
| 1346 | 1346 | ||
| 1347 | /* | ||
| 1348 | * handle general query commands of the form 'qXXXXX' | ||
| 1349 | */ | ||
| 1350 | static void gdbstub_handle_query(void) | ||
| 1351 | { | ||
| 1352 | if (strcmp(input_buffer, "qAttached") == 0) { | ||
| 1353 | /* return current thread ID */ | ||
| 1354 | sprintf(output_buffer, "1"); | ||
| 1355 | return; | ||
| 1356 | } | ||
| 1357 | |||
| 1358 | if (strcmp(input_buffer, "qC") == 0) { | ||
| 1359 | /* return current thread ID */ | ||
| 1360 | sprintf(output_buffer, "QC 0"); | ||
| 1361 | return; | ||
| 1362 | } | ||
| 1363 | |||
| 1364 | if (strcmp(input_buffer, "qOffsets") == 0) { | ||
| 1365 | /* return relocation offset of text and data segments */ | ||
| 1366 | sprintf(output_buffer, "Text=0;Data=0;Bss=0"); | ||
| 1367 | return; | ||
| 1368 | } | ||
| 1369 | |||
| 1370 | if (strcmp(input_buffer, "qSymbol::") == 0) { | ||
| 1371 | sprintf(output_buffer, "OK"); | ||
| 1372 | return; | ||
| 1373 | } | ||
| 1374 | |||
| 1375 | if (strcmp(input_buffer, "qSupported") == 0) { | ||
| 1376 | /* query of supported features */ | ||
| 1377 | sprintf(output_buffer, "PacketSize=%u;ReverseContinue-;ReverseStep-", | ||
| 1378 | sizeof(input_buffer)); | ||
| 1379 | return; | ||
| 1380 | } | ||
| 1381 | |||
| 1382 | gdbstub_strcpy(output_buffer,"E01"); | ||
| 1383 | } | ||
| 1384 | |||
| 1347 | /*****************************************************************************/ | 1385 | /*****************************************************************************/ |
| 1348 | /* | 1386 | /* |
| 1349 | * handle event interception and GDB remote protocol processing | 1387 | * handle event interception and GDB remote protocol processing |
| @@ -1751,6 +1789,12 @@ void gdbstub(int sigval) | |||
| 1751 | flush_cache = 1; | 1789 | flush_cache = 1; |
| 1752 | break; | 1790 | break; |
| 1753 | 1791 | ||
| 1792 | /* pNN: Read value of reg N and return it */ | ||
| 1793 | case 'p': | ||
| 1794 | /* return no value, indicating that we don't support | ||
| 1795 | * this command and that gdb should use 'g' instead */ | ||
| 1796 | break; | ||
| 1797 | |||
| 1754 | /* PNN,=RRRRRRRR: Write value R to reg N return OK */ | 1798 | /* PNN,=RRRRRRRR: Write value R to reg N return OK */ |
| 1755 | case 'P': | 1799 | case 'P': |
| 1756 | ptr = &input_buffer[1]; | 1800 | ptr = &input_buffer[1]; |
| @@ -1840,6 +1884,10 @@ void gdbstub(int sigval) | |||
| 1840 | case 'k' : | 1884 | case 'k' : |
| 1841 | goto done; /* just continue */ | 1885 | goto done; /* just continue */ |
| 1842 | 1886 | ||
| 1887 | /* detach */ | ||
| 1888 | case 'D': | ||
| 1889 | gdbstub_strcpy(output_buffer, "OK"); | ||
| 1890 | break; | ||
| 1843 | 1891 | ||
| 1844 | /* reset the whole machine (FIXME: system dependent) */ | 1892 | /* reset the whole machine (FIXME: system dependent) */ |
| 1845 | case 'r': | 1893 | case 'r': |
| @@ -1852,6 +1900,14 @@ void gdbstub(int sigval) | |||
| 1852 | __debug_status.dcr |= DCR_SE; | 1900 | __debug_status.dcr |= DCR_SE; |
| 1853 | goto done; | 1901 | goto done; |
| 1854 | 1902 | ||
| 1903 | /* extended command */ | ||
| 1904 | case 'v': | ||
| 1905 | if (strcmp(input_buffer, "vCont?") == 0) { | ||
| 1906 | output_buffer[0] = 0; | ||
| 1907 | break; | ||
| 1908 | } | ||
| 1909 | goto unsupported_cmd; | ||
| 1910 | |||
| 1855 | /* set baud rate (bBB) */ | 1911 | /* set baud rate (bBB) */ |
| 1856 | case 'b': | 1912 | case 'b': |
| 1857 | ptr = &input_buffer[1]; | 1913 | ptr = &input_buffer[1]; |
| @@ -1923,8 +1979,19 @@ void gdbstub(int sigval) | |||
| 1923 | gdbstub_strcpy(output_buffer,"OK"); | 1979 | gdbstub_strcpy(output_buffer,"OK"); |
| 1924 | break; | 1980 | break; |
| 1925 | 1981 | ||
| 1982 | /* Thread-setting packet */ | ||
| 1983 | case 'H': | ||
| 1984 | gdbstub_strcpy(output_buffer, "OK"); | ||
| 1985 | break; | ||
| 1986 | |||
| 1987 | case 'q': | ||
| 1988 | gdbstub_handle_query(); | ||
| 1989 | break; | ||
| 1990 | |||
| 1926 | default: | 1991 | default: |
| 1992 | unsupported_cmd: | ||
| 1927 | gdbstub_proto("### GDB Unsupported Cmd '%s'\n",input_buffer); | 1993 | gdbstub_proto("### GDB Unsupported Cmd '%s'\n",input_buffer); |
| 1994 | gdbstub_strcpy(output_buffer,"E01"); | ||
| 1928 | break; | 1995 | break; |
| 1929 | } | 1996 | } |
| 1930 | 1997 | ||
diff --git a/arch/frv/kernel/head.S b/arch/frv/kernel/head.S index b825ef3f2d54..e9a8cc63ac94 100644 --- a/arch/frv/kernel/head.S +++ b/arch/frv/kernel/head.S | |||
| @@ -542,7 +542,7 @@ __head_end: | |||
| 542 | .size _boot, .-_boot | 542 | .size _boot, .-_boot |
| 543 | 543 | ||
| 544 | # provide a point for GDB to place a break | 544 | # provide a point for GDB to place a break |
| 545 | .section .text.start,"ax" | 545 | .section .text..start,"ax" |
| 546 | .globl _start | 546 | .globl _start |
| 547 | .balign 4 | 547 | .balign 4 |
| 548 | _start: | 548 | _start: |
diff --git a/arch/frv/kernel/ptrace.c b/arch/frv/kernel/ptrace.c index 60eeed3694c0..fac028936a04 100644 --- a/arch/frv/kernel/ptrace.c +++ b/arch/frv/kernel/ptrace.c | |||
| @@ -344,26 +344,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) | |||
| 344 | 0, sizeof(child->thread.user->f), | 344 | 0, sizeof(child->thread.user->f), |
| 345 | (const void __user *)data); | 345 | (const void __user *)data); |
| 346 | 346 | ||
| 347 | case PTRACE_GETFDPIC: | ||
| 348 | tmp = 0; | ||
| 349 | switch (addr) { | ||
| 350 | case PTRACE_GETFDPIC_EXEC: | ||
| 351 | tmp = child->mm->context.exec_fdpic_loadmap; | ||
| 352 | break; | ||
| 353 | case PTRACE_GETFDPIC_INTERP: | ||
| 354 | tmp = child->mm->context.interp_fdpic_loadmap; | ||
| 355 | break; | ||
| 356 | default: | ||
| 357 | break; | ||
| 358 | } | ||
| 359 | |||
| 360 | ret = 0; | ||
| 361 | if (put_user(tmp, (unsigned long *) data)) { | ||
| 362 | ret = -EFAULT; | ||
| 363 | break; | ||
| 364 | } | ||
| 365 | break; | ||
| 366 | |||
| 367 | default: | 347 | default: |
| 368 | ret = ptrace_request(child, request, addr, data); | 348 | ret = ptrace_request(child, request, addr, data); |
| 369 | break; | 349 | break; |
diff --git a/arch/frv/kernel/sysctl.c b/arch/frv/kernel/sysctl.c index 71abd1510a59..6c155d69da29 100644 --- a/arch/frv/kernel/sysctl.c +++ b/arch/frv/kernel/sysctl.c | |||
| @@ -46,8 +46,9 @@ static void frv_change_dcache_mode(unsigned long newmode) | |||
| 46 | /* | 46 | /* |
| 47 | * handle requests to dynamically switch the write caching mode delivered by /proc | 47 | * handle requests to dynamically switch the write caching mode delivered by /proc |
| 48 | */ | 48 | */ |
| 49 | static int procctl_frv_cachemode(ctl_table *table, int write, struct file *filp, | 49 | static int procctl_frv_cachemode(ctl_table *table, int write, |
| 50 | void __user *buffer, size_t *lenp, loff_t *ppos) | 50 | void __user *buffer, size_t *lenp, |
| 51 | loff_t *ppos) | ||
| 51 | { | 52 | { |
| 52 | unsigned long hsr0; | 53 | unsigned long hsr0; |
| 53 | char buff[8]; | 54 | char buff[8]; |
| @@ -84,7 +85,7 @@ static int procctl_frv_cachemode(ctl_table *table, int write, struct file *filp, | |||
| 84 | } | 85 | } |
| 85 | 86 | ||
| 86 | /* read the state */ | 87 | /* read the state */ |
| 87 | if (filp->f_pos > 0) { | 88 | if (*ppos > 0) { |
| 88 | *lenp = 0; | 89 | *lenp = 0; |
| 89 | return 0; | 90 | return 0; |
| 90 | } | 91 | } |
| @@ -110,7 +111,7 @@ static int procctl_frv_cachemode(ctl_table *table, int write, struct file *filp, | |||
| 110 | return -EFAULT; | 111 | return -EFAULT; |
| 111 | 112 | ||
| 112 | *lenp = len; | 113 | *lenp = len; |
| 113 | filp->f_pos = len; | 114 | *ppos = len; |
| 114 | return 0; | 115 | return 0; |
| 115 | 116 | ||
| 116 | } /* end procctl_frv_cachemode() */ | 117 | } /* end procctl_frv_cachemode() */ |
| @@ -120,8 +121,9 @@ static int procctl_frv_cachemode(ctl_table *table, int write, struct file *filp, | |||
| 120 | * permit the mm_struct the nominated process is using have its MMU context ID pinned | 121 | * permit the mm_struct the nominated process is using have its MMU context ID pinned |
| 121 | */ | 122 | */ |
| 122 | #ifdef CONFIG_MMU | 123 | #ifdef CONFIG_MMU |
| 123 | static int procctl_frv_pin_cxnr(ctl_table *table, int write, struct file *filp, | 124 | static int procctl_frv_pin_cxnr(ctl_table *table, int write, |
| 124 | void __user *buffer, size_t *lenp, loff_t *ppos) | 125 | void __user *buffer, size_t *lenp, |
| 126 | loff_t *ppos) | ||
| 125 | { | 127 | { |
| 126 | pid_t pid; | 128 | pid_t pid; |
| 127 | char buff[16], *p; | 129 | char buff[16], *p; |
| @@ -150,7 +152,7 @@ static int procctl_frv_pin_cxnr(ctl_table *table, int write, struct file *filp, | |||
| 150 | } | 152 | } |
| 151 | 153 | ||
| 152 | /* read the currently pinned CXN */ | 154 | /* read the currently pinned CXN */ |
| 153 | if (filp->f_pos > 0) { | 155 | if (*ppos > 0) { |
| 154 | *lenp = 0; | 156 | *lenp = 0; |
| 155 | return 0; | 157 | return 0; |
| 156 | } | 158 | } |
| @@ -163,7 +165,7 @@ static int procctl_frv_pin_cxnr(ctl_table *table, int write, struct file *filp, | |||
| 163 | return -EFAULT; | 165 | return -EFAULT; |
| 164 | 166 | ||
| 165 | *lenp = len; | 167 | *lenp = len; |
| 166 | filp->f_pos = len; | 168 | *ppos = len; |
| 167 | return 0; | 169 | return 0; |
| 168 | 170 | ||
| 169 | } /* end procctl_frv_pin_cxnr() */ | 171 | } /* end procctl_frv_pin_cxnr() */ |
diff --git a/arch/frv/kernel/vmlinux.lds.S b/arch/frv/kernel/vmlinux.lds.S index cbe811fccfcc..8b973f3cc90e 100644 --- a/arch/frv/kernel/vmlinux.lds.S +++ b/arch/frv/kernel/vmlinux.lds.S | |||
| @@ -57,10 +57,10 @@ SECTIONS | |||
| 57 | _text = .; | 57 | _text = .; |
| 58 | _stext = .; | 58 | _stext = .; |
| 59 | .text : { | 59 | .text : { |
| 60 | *(.text.start) | 60 | *(.text..start) |
| 61 | *(.text.entry) | 61 | *(.text..entry) |
| 62 | *(.text.break) | 62 | *(.text..break) |
| 63 | *(.text.tlbmiss) | 63 | *(.text..tlbmiss) |
| 64 | TEXT_TEXT | 64 | TEXT_TEXT |
| 65 | SCHED_TEXT | 65 | SCHED_TEXT |
| 66 | LOCK_TEXT | 66 | LOCK_TEXT |
| @@ -114,7 +114,7 @@ SECTIONS | |||
| 114 | 114 | ||
| 115 | .sbss : { *(.sbss .sbss.*) } | 115 | .sbss : { *(.sbss .sbss.*) } |
| 116 | .bss : { *(.bss .bss.*) } | 116 | .bss : { *(.bss .bss.*) } |
| 117 | .bss.stack : { *(.bss) } | 117 | .bss..stack : { *(.bss) } |
| 118 | 118 | ||
| 119 | __bss_stop = .; | 119 | __bss_stop = .; |
| 120 | _end = . ; | 120 | _end = . ; |
diff --git a/arch/frv/mm/fault.c b/arch/frv/mm/fault.c index 30f5d100a81c..a325d57a83d5 100644 --- a/arch/frv/mm/fault.c +++ b/arch/frv/mm/fault.c | |||
| @@ -257,10 +257,10 @@ asmlinkage void do_page_fault(int datammu, unsigned long esr0, unsigned long ear | |||
| 257 | */ | 257 | */ |
| 258 | out_of_memory: | 258 | out_of_memory: |
| 259 | up_read(&mm->mmap_sem); | 259 | up_read(&mm->mmap_sem); |
| 260 | printk("VM: killing process %s\n", current->comm); | 260 | if (!user_mode(__frame)) |
| 261 | if (user_mode(__frame)) | 261 | goto no_context; |
| 262 | do_group_exit(SIGKILL); | 262 | pagefault_out_of_memory(); |
| 263 | goto no_context; | 263 | return; |
| 264 | 264 | ||
| 265 | do_sigbus: | 265 | do_sigbus: |
| 266 | up_read(&mm->mmap_sem); | 266 | up_read(&mm->mmap_sem); |
diff --git a/arch/frv/mm/tlb-miss.S b/arch/frv/mm/tlb-miss.S index 7f392bc651a3..f3ac019bb18b 100644 --- a/arch/frv/mm/tlb-miss.S +++ b/arch/frv/mm/tlb-miss.S | |||
| @@ -15,7 +15,7 @@ | |||
| 15 | #include <asm/pgtable.h> | 15 | #include <asm/pgtable.h> |
| 16 | #include <asm/spr-regs.h> | 16 | #include <asm/spr-regs.h> |
| 17 | 17 | ||
| 18 | .section .text.tlbmiss | 18 | .section .text..tlbmiss |
| 19 | .balign 4 | 19 | .balign 4 |
| 20 | 20 | ||
| 21 | .globl __entry_insn_mmu_miss | 21 | .globl __entry_insn_mmu_miss |
diff --git a/arch/h8300/boot/compressed/head.S b/arch/h8300/boot/compressed/head.S index 985a81a2435a..10e9a2d1cc6c 100644 --- a/arch/h8300/boot/compressed/head.S +++ b/arch/h8300/boot/compressed/head.S | |||
| @@ -9,7 +9,7 @@ | |||
| 9 | 9 | ||
| 10 | #define SRAM_START 0xff4000 | 10 | #define SRAM_START 0xff4000 |
| 11 | 11 | ||
| 12 | .section .text.startup | 12 | .section .text..startup |
| 13 | .global startup | 13 | .global startup |
| 14 | startup: | 14 | startup: |
| 15 | mov.l #SRAM_START+0x8000, sp | 15 | mov.l #SRAM_START+0x8000, sp |
diff --git a/arch/h8300/boot/compressed/vmlinux.lds b/arch/h8300/boot/compressed/vmlinux.lds index 65e2a0d1ae39..a0a3a0ed54ef 100644 --- a/arch/h8300/boot/compressed/vmlinux.lds +++ b/arch/h8300/boot/compressed/vmlinux.lds | |||
| @@ -4,7 +4,7 @@ SECTIONS | |||
| 4 | { | 4 | { |
| 5 | __stext = . ; | 5 | __stext = . ; |
| 6 | __text = .; | 6 | __text = .; |
| 7 | *(.text.startup) | 7 | *(.text..startup) |
| 8 | *(.text) | 8 | *(.text) |
| 9 | __etext = . ; | 9 | __etext = . ; |
| 10 | } | 10 | } |
diff --git a/arch/h8300/include/asm/scatterlist.h b/arch/h8300/include/asm/scatterlist.h index d3ecdd87ac90..de08a4a2cc1c 100644 --- a/arch/h8300/include/asm/scatterlist.h +++ b/arch/h8300/include/asm/scatterlist.h | |||
| @@ -1,17 +1,7 @@ | |||
| 1 | #ifndef _H8300_SCATTERLIST_H | 1 | #ifndef _H8300_SCATTERLIST_H |
| 2 | #define _H8300_SCATTERLIST_H | 2 | #define _H8300_SCATTERLIST_H |
| 3 | 3 | ||
| 4 | #include <asm/types.h> | 4 | #include <asm-generic/scatterlist.h> |
| 5 | |||
| 6 | struct scatterlist { | ||
| 7 | #ifdef CONFIG_DEBUG_SG | ||
| 8 | unsigned long sg_magic; | ||
| 9 | #endif | ||
| 10 | unsigned long page_link; | ||
| 11 | unsigned int offset; | ||
| 12 | dma_addr_t dma_address; | ||
| 13 | unsigned int length; | ||
| 14 | }; | ||
| 15 | 5 | ||
| 16 | #define ISA_DMA_THRESHOLD (0xffffffff) | 6 | #define ISA_DMA_THRESHOLD (0xffffffff) |
| 17 | 7 | ||
diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig index 9676100b83ee..95610820041e 100644 --- a/arch/ia64/Kconfig +++ b/arch/ia64/Kconfig | |||
| @@ -56,6 +56,9 @@ config MMU | |||
| 56 | config NEED_DMA_MAP_STATE | 56 | config NEED_DMA_MAP_STATE |
| 57 | def_bool y | 57 | def_bool y |
| 58 | 58 | ||
| 59 | config NEED_SG_DMA_LENGTH | ||
| 60 | def_bool y | ||
| 61 | |||
| 59 | config SWIOTLB | 62 | config SWIOTLB |
| 60 | bool | 63 | bool |
| 61 | 64 | ||
| @@ -495,6 +498,14 @@ config HAVE_ARCH_NODEDATA_EXTENSION | |||
| 495 | def_bool y | 498 | def_bool y |
| 496 | depends on NUMA | 499 | depends on NUMA |
| 497 | 500 | ||
| 501 | config USE_PERCPU_NUMA_NODE_ID | ||
| 502 | def_bool y | ||
| 503 | depends on NUMA | ||
| 504 | |||
| 505 | config HAVE_MEMORYLESS_NODES | ||
| 506 | def_bool y | ||
| 507 | depends on NUMA | ||
| 508 | |||
| 498 | config ARCH_PROC_KCORE_TEXT | 509 | config ARCH_PROC_KCORE_TEXT |
| 499 | def_bool y | 510 | def_bool y |
| 500 | depends on PROC_KCORE | 511 | depends on PROC_KCORE |
diff --git a/arch/ia64/include/asm/acpi.h b/arch/ia64/include/asm/acpi.h index 21adbd7f90f8..837dc82a013e 100644 --- a/arch/ia64/include/asm/acpi.h +++ b/arch/ia64/include/asm/acpi.h | |||
| @@ -94,7 +94,6 @@ ia64_acpi_release_global_lock (unsigned int *lock) | |||
| 94 | #define acpi_noirq 0 /* ACPI always enabled on IA64 */ | 94 | #define acpi_noirq 0 /* ACPI always enabled on IA64 */ |
| 95 | #define acpi_pci_disabled 0 /* ACPI PCI always enabled on IA64 */ | 95 | #define acpi_pci_disabled 0 /* ACPI PCI always enabled on IA64 */ |
| 96 | #define acpi_strict 1 /* no ACPI spec workarounds on IA64 */ | 96 | #define acpi_strict 1 /* no ACPI spec workarounds on IA64 */ |
| 97 | #define acpi_ht 0 /* no HT-only mode on IA64 */ | ||
| 98 | #endif | 97 | #endif |
| 99 | #define acpi_processor_cstate_check(x) (x) /* no idle limits on IA64 :) */ | 98 | #define acpi_processor_cstate_check(x) (x) /* no idle limits on IA64 :) */ |
| 100 | static inline void disable_acpi(void) { } | 99 | static inline void disable_acpi(void) { } |
diff --git a/arch/ia64/include/asm/asmmacro.h b/arch/ia64/include/asm/asmmacro.h index c1642fd64029..3ab6d75aa3db 100644 --- a/arch/ia64/include/asm/asmmacro.h +++ b/arch/ia64/include/asm/asmmacro.h | |||
| @@ -70,12 +70,12 @@ name: | |||
| 70 | * path (ivt.S - TLB miss processing) or in places where it might not be | 70 | * path (ivt.S - TLB miss processing) or in places where it might not be |
| 71 | * safe to use a "tpa" instruction (mca_asm.S - error recovery). | 71 | * safe to use a "tpa" instruction (mca_asm.S - error recovery). |
| 72 | */ | 72 | */ |
| 73 | .section ".data.patch.vtop", "a" // declare section & section attributes | 73 | .section ".data..patch.vtop", "a" // declare section & section attributes |
| 74 | .previous | 74 | .previous |
| 75 | 75 | ||
| 76 | #define LOAD_PHYSICAL(pr, reg, obj) \ | 76 | #define LOAD_PHYSICAL(pr, reg, obj) \ |
| 77 | [1:](pr)movl reg = obj; \ | 77 | [1:](pr)movl reg = obj; \ |
| 78 | .xdata4 ".data.patch.vtop", 1b-. | 78 | .xdata4 ".data..patch.vtop", 1b-. |
| 79 | 79 | ||
| 80 | /* | 80 | /* |
| 81 | * For now, we always put in the McKinley E9 workaround. On CPUs that don't need it, | 81 | * For now, we always put in the McKinley E9 workaround. On CPUs that don't need it, |
| @@ -84,11 +84,11 @@ name: | |||
| 84 | #define DO_MCKINLEY_E9_WORKAROUND | 84 | #define DO_MCKINLEY_E9_WORKAROUND |
| 85 | 85 | ||
| 86 | #ifdef DO_MCKINLEY_E9_WORKAROUND | 86 | #ifdef DO_MCKINLEY_E9_WORKAROUND |
| 87 | .section ".data.patch.mckinley_e9", "a" | 87 | .section ".data..patch.mckinley_e9", "a" |
| 88 | .previous | 88 | .previous |
| 89 | /* workaround for Itanium 2 Errata 9: */ | 89 | /* workaround for Itanium 2 Errata 9: */ |
| 90 | # define FSYS_RETURN \ | 90 | # define FSYS_RETURN \ |
| 91 | .xdata4 ".data.patch.mckinley_e9", 1f-.; \ | 91 | .xdata4 ".data..patch.mckinley_e9", 1f-.; \ |
| 92 | 1:{ .mib; \ | 92 | 1:{ .mib; \ |
| 93 | nop.m 0; \ | 93 | nop.m 0; \ |
| 94 | mov r16=ar.pfs; \ | 94 | mov r16=ar.pfs; \ |
| @@ -107,11 +107,11 @@ name: | |||
| 107 | * If physical stack register size is different from DEF_NUM_STACK_REG, | 107 | * If physical stack register size is different from DEF_NUM_STACK_REG, |
| 108 | * dynamically patch the kernel for correct size. | 108 | * dynamically patch the kernel for correct size. |
| 109 | */ | 109 | */ |
| 110 | .section ".data.patch.phys_stack_reg", "a" | 110 | .section ".data..patch.phys_stack_reg", "a" |
| 111 | .previous | 111 | .previous |
| 112 | #define LOAD_PHYS_STACK_REG_SIZE(reg) \ | 112 | #define LOAD_PHYS_STACK_REG_SIZE(reg) \ |
| 113 | [1:] adds reg=IA64_NUM_PHYS_STACK_REG*8+8,r0; \ | 113 | [1:] adds reg=IA64_NUM_PHYS_STACK_REG*8+8,r0; \ |
| 114 | .xdata4 ".data.patch.phys_stack_reg", 1b-. | 114 | .xdata4 ".data..patch.phys_stack_reg", 1b-. |
| 115 | 115 | ||
| 116 | /* | 116 | /* |
| 117 | * Up until early 2004, use of .align within a function caused bad unwind info. | 117 | * Up until early 2004, use of .align within a function caused bad unwind info. |
diff --git a/arch/ia64/include/asm/cache.h b/arch/ia64/include/asm/cache.h index e7482bd628ff..988254a7d349 100644 --- a/arch/ia64/include/asm/cache.h +++ b/arch/ia64/include/asm/cache.h | |||
| @@ -24,6 +24,6 @@ | |||
| 24 | # define SMP_CACHE_BYTES (1 << 3) | 24 | # define SMP_CACHE_BYTES (1 << 3) |
| 25 | #endif | 25 | #endif |
| 26 | 26 | ||
| 27 | #define __read_mostly __attribute__((__section__(".data.read_mostly"))) | 27 | #define __read_mostly __attribute__((__section__(".data..read_mostly"))) |
| 28 | 28 | ||
| 29 | #endif /* _ASM_IA64_CACHE_H */ | 29 | #endif /* _ASM_IA64_CACHE_H */ |
diff --git a/arch/ia64/include/asm/percpu.h b/arch/ia64/include/asm/percpu.h index 1bd408265694..14aa1c58912b 100644 --- a/arch/ia64/include/asm/percpu.h +++ b/arch/ia64/include/asm/percpu.h | |||
| @@ -31,7 +31,7 @@ extern void *per_cpu_init(void); | |||
| 31 | 31 | ||
| 32 | #endif /* SMP */ | 32 | #endif /* SMP */ |
| 33 | 33 | ||
| 34 | #define PER_CPU_BASE_SECTION ".data.percpu" | 34 | #define PER_CPU_BASE_SECTION ".data..percpu" |
| 35 | 35 | ||
| 36 | /* | 36 | /* |
| 37 | * Be extremely careful when taking the address of this variable! Due to virtual | 37 | * Be extremely careful when taking the address of this variable! Due to virtual |
diff --git a/arch/ia64/include/asm/scatterlist.h b/arch/ia64/include/asm/scatterlist.h index d8e98961dec7..f299a4fb25c8 100644 --- a/arch/ia64/include/asm/scatterlist.h +++ b/arch/ia64/include/asm/scatterlist.h | |||
| @@ -1,6 +1,7 @@ | |||
| 1 | #ifndef _ASM_IA64_SCATTERLIST_H | 1 | #ifndef _ASM_IA64_SCATTERLIST_H |
| 2 | #define _ASM_IA64_SCATTERLIST_H | 2 | #define _ASM_IA64_SCATTERLIST_H |
| 3 | 3 | ||
| 4 | #include <asm-generic/scatterlist.h> | ||
| 4 | /* | 5 | /* |
| 5 | * It used to be that ISA_DMA_THRESHOLD had something to do with the | 6 | * It used to be that ISA_DMA_THRESHOLD had something to do with the |
| 6 | * DMA-limits of ISA-devices. Nowadays, its only remaining use (apart | 7 | * DMA-limits of ISA-devices. Nowadays, its only remaining use (apart |
| @@ -10,7 +11,6 @@ | |||
| 10 | * that's 4GB - 1. | 11 | * that's 4GB - 1. |
| 11 | */ | 12 | */ |
| 12 | #define ISA_DMA_THRESHOLD 0xffffffff | 13 | #define ISA_DMA_THRESHOLD 0xffffffff |
| 13 | 14 | #define ARCH_HAS_SG_CHAIN | |
| 14 | #include <asm-generic/scatterlist.h> | ||
| 15 | 15 | ||
| 16 | #endif /* _ASM_IA64_SCATTERLIST_H */ | 16 | #endif /* _ASM_IA64_SCATTERLIST_H */ |
diff --git a/arch/ia64/include/asm/topology.h b/arch/ia64/include/asm/topology.h index d323071d0f91..09f646753d1a 100644 --- a/arch/ia64/include/asm/topology.h +++ b/arch/ia64/include/asm/topology.h | |||
| @@ -26,11 +26,6 @@ | |||
| 26 | #define RECLAIM_DISTANCE 15 | 26 | #define RECLAIM_DISTANCE 15 |
| 27 | 27 | ||
| 28 | /* | 28 | /* |
| 29 | * Returns the number of the node containing CPU 'cpu' | ||
| 30 | */ | ||
| 31 | #define cpu_to_node(cpu) (int)(cpu_to_node_map[cpu]) | ||
| 32 | |||
| 33 | /* | ||
| 34 | * Returns a bitmask of CPUs on Node 'node'. | 29 | * Returns a bitmask of CPUs on Node 'node'. |
| 35 | */ | 30 | */ |
| 36 | #define cpumask_of_node(node) ((node) == -1 ? \ | 31 | #define cpumask_of_node(node) ((node) == -1 ? \ |
diff --git a/arch/ia64/kernel/Makefile.gate b/arch/ia64/kernel/Makefile.gate index ab9b03a9adcc..ceeffc509764 100644 --- a/arch/ia64/kernel/Makefile.gate +++ b/arch/ia64/kernel/Makefile.gate | |||
| @@ -21,7 +21,7 @@ GATECFLAGS_gate-syms.o = -r | |||
| 21 | $(obj)/gate-syms.o: $(obj)/gate.lds $(obj)/gate.o FORCE | 21 | $(obj)/gate-syms.o: $(obj)/gate.lds $(obj)/gate.o FORCE |
| 22 | $(call if_changed,gate) | 22 | $(call if_changed,gate) |
| 23 | 23 | ||
| 24 | # gate-data.o contains the gate DSO image as data in section .data.gate. | 24 | # gate-data.o contains the gate DSO image as data in section .data..gate. |
| 25 | # We must build gate.so before we can assemble it. | 25 | # We must build gate.so before we can assemble it. |
| 26 | # Note: kbuild does not track this dependency due to usage of .incbin | 26 | # Note: kbuild does not track this dependency due to usage of .incbin |
| 27 | $(obj)/gate-data.o: $(obj)/gate.so | 27 | $(obj)/gate-data.o: $(obj)/gate.so |
diff --git a/arch/ia64/kernel/gate-data.S b/arch/ia64/kernel/gate-data.S index 258c0a3238fb..b3ef1c72e132 100644 --- a/arch/ia64/kernel/gate-data.S +++ b/arch/ia64/kernel/gate-data.S | |||
| @@ -1,3 +1,3 @@ | |||
| 1 | .section .data.gate, "aw" | 1 | .section .data..gate, "aw" |
| 2 | 2 | ||
| 3 | .incbin "arch/ia64/kernel/gate.so" | 3 | .incbin "arch/ia64/kernel/gate.so" |
diff --git a/arch/ia64/kernel/gate.S b/arch/ia64/kernel/gate.S index cf5e0a105e16..245d3e1ec7e1 100644 --- a/arch/ia64/kernel/gate.S +++ b/arch/ia64/kernel/gate.S | |||
| @@ -21,18 +21,18 @@ | |||
| 21 | * to targets outside the shared object) and to avoid multi-phase kernel builds, we | 21 | * to targets outside the shared object) and to avoid multi-phase kernel builds, we |
| 22 | * simply create minimalistic "patch lists" in special ELF sections. | 22 | * simply create minimalistic "patch lists" in special ELF sections. |
| 23 | */ | 23 | */ |
| 24 | .section ".data.patch.fsyscall_table", "a" | 24 | .section ".data..patch.fsyscall_table", "a" |
| 25 | .previous | 25 | .previous |
| 26 | #define LOAD_FSYSCALL_TABLE(reg) \ | 26 | #define LOAD_FSYSCALL_TABLE(reg) \ |
| 27 | [1:] movl reg=0; \ | 27 | [1:] movl reg=0; \ |
| 28 | .xdata4 ".data.patch.fsyscall_table", 1b-. | 28 | .xdata4 ".data..patch.fsyscall_table", 1b-. |
| 29 | 29 | ||
| 30 | .section ".data.patch.brl_fsys_bubble_down", "a" | 30 | .section ".data..patch.brl_fsys_bubble_down", "a" |
| 31 | .previous | 31 | .previous |
| 32 | #define BRL_COND_FSYS_BUBBLE_DOWN(pr) \ | 32 | #define BRL_COND_FSYS_BUBBLE_DOWN(pr) \ |
| 33 | [1:](pr)brl.cond.sptk 0; \ | 33 | [1:](pr)brl.cond.sptk 0; \ |
| 34 | ;; \ | 34 | ;; \ |
| 35 | .xdata4 ".data.patch.brl_fsys_bubble_down", 1b-. | 35 | .xdata4 ".data..patch.brl_fsys_bubble_down", 1b-. |
| 36 | 36 | ||
| 37 | GLOBAL_ENTRY(__kernel_syscall_via_break) | 37 | GLOBAL_ENTRY(__kernel_syscall_via_break) |
| 38 | .prologue | 38 | .prologue |
diff --git a/arch/ia64/kernel/gate.lds.S b/arch/ia64/kernel/gate.lds.S index 88c64ed47c36..d32b0855110a 100644 --- a/arch/ia64/kernel/gate.lds.S +++ b/arch/ia64/kernel/gate.lds.S | |||
| @@ -33,21 +33,21 @@ SECTIONS | |||
| 33 | */ | 33 | */ |
| 34 | . = GATE_ADDR + 0x600; | 34 | . = GATE_ADDR + 0x600; |
| 35 | 35 | ||
| 36 | .data.patch : { | 36 | .data..patch : { |
| 37 | __paravirt_start_gate_mckinley_e9_patchlist = .; | 37 | __paravirt_start_gate_mckinley_e9_patchlist = .; |
| 38 | *(.data.patch.mckinley_e9) | 38 | *(.data..patch.mckinley_e9) |
| 39 | __paravirt_end_gate_mckinley_e9_patchlist = .; | 39 | __paravirt_end_gate_mckinley_e9_patchlist = .; |
| 40 | 40 | ||
| 41 | __paravirt_start_gate_vtop_patchlist = .; | 41 | __paravirt_start_gate_vtop_patchlist = .; |
| 42 | *(.data.patch.vtop) | 42 | *(.data..patch.vtop) |
| 43 | __paravirt_end_gate_vtop_patchlist = .; | 43 | __paravirt_end_gate_vtop_patchlist = .; |
| 44 | 44 | ||
| 45 | __paravirt_start_gate_fsyscall_patchlist = .; | 45 | __paravirt_start_gate_fsyscall_patchlist = .; |
| 46 | *(.data.patch.fsyscall_table) | 46 | *(.data..patch.fsyscall_table) |
| 47 | __paravirt_end_gate_fsyscall_patchlist = .; | 47 | __paravirt_end_gate_fsyscall_patchlist = .; |
| 48 | 48 | ||
| 49 | __paravirt_start_gate_brl_fsys_bubble_down_patchlist = .; | 49 | __paravirt_start_gate_brl_fsys_bubble_down_patchlist = .; |
| 50 | *(.data.patch.brl_fsys_bubble_down) | 50 | *(.data..patch.brl_fsys_bubble_down) |
| 51 | __paravirt_end_gate_brl_fsys_bubble_down_patchlist = .; | 51 | __paravirt_end_gate_brl_fsys_bubble_down_patchlist = .; |
| 52 | } :readable | 52 | } :readable |
| 53 | 53 | ||
diff --git a/arch/ia64/kernel/init_task.c b/arch/ia64/kernel/init_task.c index e253ab8fcbc8..f9efe9739d3f 100644 --- a/arch/ia64/kernel/init_task.c +++ b/arch/ia64/kernel/init_task.c | |||
| @@ -23,7 +23,7 @@ static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand); | |||
| 23 | * Initial task structure. | 23 | * Initial task structure. |
| 24 | * | 24 | * |
| 25 | * We need to make sure that this is properly aligned due to the way process stacks are | 25 | * We need to make sure that this is properly aligned due to the way process stacks are |
| 26 | * handled. This is done by having a special ".data.init_task" section... | 26 | * handled. This is done by having a special ".data..init_task" section... |
| 27 | */ | 27 | */ |
| 28 | #define init_thread_info init_task_mem.s.thread_info | 28 | #define init_thread_info init_task_mem.s.thread_info |
| 29 | 29 | ||
diff --git a/arch/ia64/kernel/ivt.S b/arch/ia64/kernel/ivt.S index 179fd122e837..d93e396bf599 100644 --- a/arch/ia64/kernel/ivt.S +++ b/arch/ia64/kernel/ivt.S | |||
| @@ -82,7 +82,7 @@ | |||
| 82 | mov r19=n;; /* prepare to save predicates */ \ | 82 | mov r19=n;; /* prepare to save predicates */ \ |
| 83 | br.sptk.many dispatch_to_fault_handler | 83 | br.sptk.many dispatch_to_fault_handler |
| 84 | 84 | ||
| 85 | .section .text.ivt,"ax" | 85 | .section .text..ivt,"ax" |
| 86 | 86 | ||
| 87 | .align 32768 // align on 32KB boundary | 87 | .align 32768 // align on 32KB boundary |
| 88 | .global ia64_ivt | 88 | .global ia64_ivt |
diff --git a/arch/ia64/kernel/minstate.h b/arch/ia64/kernel/minstate.h index 292e214a3b84..d56753a11636 100644 --- a/arch/ia64/kernel/minstate.h +++ b/arch/ia64/kernel/minstate.h | |||
| @@ -16,7 +16,7 @@ | |||
| 16 | #define ACCOUNT_SYS_ENTER | 16 | #define ACCOUNT_SYS_ENTER |
| 17 | #endif | 17 | #endif |
| 18 | 18 | ||
| 19 | .section ".data.patch.rse", "a" | 19 | .section ".data..patch.rse", "a" |
| 20 | .previous | 20 | .previous |
| 21 | 21 | ||
| 22 | /* | 22 | /* |
| @@ -215,7 +215,7 @@ | |||
| 215 | (pUStk) extr.u r17=r18,3,6; \ | 215 | (pUStk) extr.u r17=r18,3,6; \ |
| 216 | (pUStk) sub r16=r18,r22; \ | 216 | (pUStk) sub r16=r18,r22; \ |
| 217 | [1:](pKStk) br.cond.sptk.many 1f; \ | 217 | [1:](pKStk) br.cond.sptk.many 1f; \ |
| 218 | .xdata4 ".data.patch.rse",1b-. \ | 218 | .xdata4 ".data..patch.rse",1b-. \ |
| 219 | ;; \ | 219 | ;; \ |
| 220 | cmp.ge p6,p7 = 33,r17; \ | 220 | cmp.ge p6,p7 = 33,r17; \ |
| 221 | ;; \ | 221 | ;; \ |
diff --git a/arch/ia64/kernel/paravirtentry.S b/arch/ia64/kernel/paravirtentry.S index 6158560d7f17..92d880c4d3d1 100644 --- a/arch/ia64/kernel/paravirtentry.S +++ b/arch/ia64/kernel/paravirtentry.S | |||
| @@ -28,7 +28,7 @@ | |||
| 28 | #include "entry.h" | 28 | #include "entry.h" |
| 29 | 29 | ||
| 30 | #define DATA8(sym, init_value) \ | 30 | #define DATA8(sym, init_value) \ |
| 31 | .pushsection .data.read_mostly ; \ | 31 | .pushsection .data..read_mostly ; \ |
| 32 | .align 8 ; \ | 32 | .align 8 ; \ |
| 33 | .global sym ; \ | 33 | .global sym ; \ |
| 34 | sym: ; \ | 34 | sym: ; \ |
diff --git a/arch/ia64/kernel/pci-swiotlb.c b/arch/ia64/kernel/pci-swiotlb.c index 3095654f9ab3..d9485d952ed0 100644 --- a/arch/ia64/kernel/pci-swiotlb.c +++ b/arch/ia64/kernel/pci-swiotlb.c | |||
| @@ -31,8 +31,6 @@ struct dma_map_ops swiotlb_dma_ops = { | |||
| 31 | .unmap_sg = swiotlb_unmap_sg_attrs, | 31 | .unmap_sg = swiotlb_unmap_sg_attrs, |
| 32 | .sync_single_for_cpu = swiotlb_sync_single_for_cpu, | 32 | .sync_single_for_cpu = swiotlb_sync_single_for_cpu, |
| 33 | .sync_single_for_device = swiotlb_sync_single_for_device, | 33 | .sync_single_for_device = swiotlb_sync_single_for_device, |
| 34 | .sync_single_range_for_cpu = swiotlb_sync_single_range_for_cpu, | ||
| 35 | .sync_single_range_for_device = swiotlb_sync_single_range_for_device, | ||
| 36 | .sync_sg_for_cpu = swiotlb_sync_sg_for_cpu, | 34 | .sync_sg_for_cpu = swiotlb_sync_sg_for_cpu, |
| 37 | .sync_sg_for_device = swiotlb_sync_sg_for_device, | 35 | .sync_sg_for_device = swiotlb_sync_sg_for_device, |
| 38 | .dma_supported = swiotlb_dma_supported, | 36 | .dma_supported = swiotlb_dma_supported, |
diff --git a/arch/ia64/kernel/ptrace.c b/arch/ia64/kernel/ptrace.c index 0dec7f702448..7c7909f9bc93 100644 --- a/arch/ia64/kernel/ptrace.c +++ b/arch/ia64/kernel/ptrace.c | |||
| @@ -638,7 +638,7 @@ ptrace_attach_sync_user_rbs (struct task_struct *child) | |||
| 638 | */ | 638 | */ |
| 639 | 639 | ||
| 640 | read_lock(&tasklist_lock); | 640 | read_lock(&tasklist_lock); |
| 641 | if (child->signal) { | 641 | if (child->sighand) { |
| 642 | spin_lock_irq(&child->sighand->siglock); | 642 | spin_lock_irq(&child->sighand->siglock); |
| 643 | if (child->state == TASK_STOPPED && | 643 | if (child->state == TASK_STOPPED && |
| 644 | !test_and_set_tsk_thread_flag(child, TIF_RESTORE_RSE)) { | 644 | !test_and_set_tsk_thread_flag(child, TIF_RESTORE_RSE)) { |
| @@ -662,7 +662,7 @@ ptrace_attach_sync_user_rbs (struct task_struct *child) | |||
| 662 | * job control stop, so that SIGCONT can be used to wake it up. | 662 | * job control stop, so that SIGCONT can be used to wake it up. |
| 663 | */ | 663 | */ |
| 664 | read_lock(&tasklist_lock); | 664 | read_lock(&tasklist_lock); |
| 665 | if (child->signal) { | 665 | if (child->sighand) { |
| 666 | spin_lock_irq(&child->sighand->siglock); | 666 | spin_lock_irq(&child->sighand->siglock); |
| 667 | if (child->state == TASK_TRACED && | 667 | if (child->state == TASK_TRACED && |
| 668 | (child->signal->flags & SIGNAL_STOP_STOPPED)) { | 668 | (child->signal->flags & SIGNAL_STOP_STOPPED)) { |
diff --git a/arch/ia64/kernel/smpboot.c b/arch/ia64/kernel/smpboot.c index e5230b2ff2c5..6a1380e90f87 100644 --- a/arch/ia64/kernel/smpboot.c +++ b/arch/ia64/kernel/smpboot.c | |||
| @@ -390,6 +390,14 @@ smp_callin (void) | |||
| 390 | 390 | ||
| 391 | fix_b0_for_bsp(); | 391 | fix_b0_for_bsp(); |
| 392 | 392 | ||
| 393 | #ifdef CONFIG_NUMA | ||
| 394 | /* | ||
| 395 | * numa_node_id() works after this. | ||
| 396 | */ | ||
| 397 | set_numa_node(cpu_to_node_map[cpuid]); | ||
| 398 | set_numa_mem(local_memory_node(cpu_to_node_map[cpuid])); | ||
| 399 | #endif | ||
| 400 | |||
| 393 | ipi_call_lock_irq(); | 401 | ipi_call_lock_irq(); |
| 394 | spin_lock(&vector_lock); | 402 | spin_lock(&vector_lock); |
| 395 | /* Setup the per cpu irq handling data structures */ | 403 | /* Setup the per cpu irq handling data structures */ |
| @@ -632,6 +640,9 @@ void __devinit smp_prepare_boot_cpu(void) | |||
| 632 | { | 640 | { |
| 633 | cpu_set(smp_processor_id(), cpu_online_map); | 641 | cpu_set(smp_processor_id(), cpu_online_map); |
| 634 | cpu_set(smp_processor_id(), cpu_callin_map); | 642 | cpu_set(smp_processor_id(), cpu_callin_map); |
| 643 | #ifdef CONFIG_NUMA | ||
| 644 | set_numa_node(cpu_to_node_map[smp_processor_id()]); | ||
| 645 | #endif | ||
| 635 | per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE; | 646 | per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE; |
| 636 | paravirt_post_smp_prepare_boot_cpu(); | 647 | paravirt_post_smp_prepare_boot_cpu(); |
| 637 | } | 648 | } |
diff --git a/arch/ia64/kernel/vmlinux.lds.S b/arch/ia64/kernel/vmlinux.lds.S index 1295ba327f6f..e07218a2577f 100644 --- a/arch/ia64/kernel/vmlinux.lds.S +++ b/arch/ia64/kernel/vmlinux.lds.S | |||
| @@ -8,7 +8,7 @@ | |||
| 8 | 8 | ||
| 9 | #define IVT_TEXT \ | 9 | #define IVT_TEXT \ |
| 10 | VMLINUX_SYMBOL(__start_ivt_text) = .; \ | 10 | VMLINUX_SYMBOL(__start_ivt_text) = .; \ |
| 11 | *(.text.ivt) \ | 11 | *(.text..ivt) \ |
| 12 | VMLINUX_SYMBOL(__end_ivt_text) = .; | 12 | VMLINUX_SYMBOL(__end_ivt_text) = .; |
| 13 | 13 | ||
| 14 | OUTPUT_FORMAT("elf64-ia64-little") | 14 | OUTPUT_FORMAT("elf64-ia64-little") |
| @@ -54,8 +54,8 @@ SECTIONS | |||
| 54 | .text2 : AT(ADDR(.text2) - LOAD_OFFSET) | 54 | .text2 : AT(ADDR(.text2) - LOAD_OFFSET) |
| 55 | { *(.text2) } | 55 | { *(.text2) } |
| 56 | #ifdef CONFIG_SMP | 56 | #ifdef CONFIG_SMP |
| 57 | .text.lock : AT(ADDR(.text.lock) - LOAD_OFFSET) | 57 | .text..lock : AT(ADDR(.text..lock) - LOAD_OFFSET) |
| 58 | { *(.text.lock) } | 58 | { *(.text..lock) } |
| 59 | #endif | 59 | #endif |
| 60 | _etext = .; | 60 | _etext = .; |
| 61 | 61 | ||
| @@ -75,10 +75,10 @@ SECTIONS | |||
| 75 | __stop___mca_table = .; | 75 | __stop___mca_table = .; |
| 76 | } | 76 | } |
| 77 | 77 | ||
| 78 | .data.patch.phys_stack_reg : AT(ADDR(.data.patch.phys_stack_reg) - LOAD_OFFSET) | 78 | .data..patch.phys_stack_reg : AT(ADDR(.data..patch.phys_stack_reg) - LOAD_OFFSET) |
| 79 | { | 79 | { |
| 80 | __start___phys_stack_reg_patchlist = .; | 80 | __start___phys_stack_reg_patchlist = .; |
| 81 | *(.data.patch.phys_stack_reg) | 81 | *(.data..patch.phys_stack_reg) |
| 82 | __end___phys_stack_reg_patchlist = .; | 82 | __end___phys_stack_reg_patchlist = .; |
| 83 | } | 83 | } |
| 84 | 84 | ||
| @@ -110,24 +110,24 @@ SECTIONS | |||
| 110 | INIT_TEXT_SECTION(PAGE_SIZE) | 110 | INIT_TEXT_SECTION(PAGE_SIZE) |
| 111 | INIT_DATA_SECTION(16) | 111 | INIT_DATA_SECTION(16) |
| 112 | 112 | ||
| 113 | .data.patch.vtop : AT(ADDR(.data.patch.vtop) - LOAD_OFFSET) | 113 | .data..patch.vtop : AT(ADDR(.data..patch.vtop) - LOAD_OFFSET) |
| 114 | { | 114 | { |
| 115 | __start___vtop_patchlist = .; | 115 | __start___vtop_patchlist = .; |
| 116 | *(.data.patch.vtop) | 116 | *(.data..patch.vtop) |
| 117 | __end___vtop_patchlist = .; | 117 | __end___vtop_patchlist = .; |
| 118 | } | 118 | } |
| 119 | 119 | ||
| 120 | .data.patch.rse : AT(ADDR(.data.patch.rse) - LOAD_OFFSET) | 120 | .data..patch.rse : AT(ADDR(.data..patch.rse) - LOAD_OFFSET) |
| 121 | { | 121 | { |
| 122 | __start___rse_patchlist = .; | 122 | __start___rse_patchlist = .; |
| 123 | *(.data.patch.rse) | 123 | *(.data..patch.rse) |
| 124 | __end___rse_patchlist = .; | 124 | __end___rse_patchlist = .; |
| 125 | } | 125 | } |
| 126 | 126 | ||
| 127 | .data.patch.mckinley_e9 : AT(ADDR(.data.patch.mckinley_e9) - LOAD_OFFSET) | 127 | .data..patch.mckinley_e9 : AT(ADDR(.data..patch.mckinley_e9) - LOAD_OFFSET) |
| 128 | { | 128 | { |
| 129 | __start___mckinley_e9_bundles = .; | 129 | __start___mckinley_e9_bundles = .; |
| 130 | *(.data.patch.mckinley_e9) | 130 | *(.data..patch.mckinley_e9) |
| 131 | __end___mckinley_e9_bundles = .; | 131 | __end___mckinley_e9_bundles = .; |
| 132 | } | 132 | } |
| 133 | 133 | ||
| @@ -175,17 +175,17 @@ SECTIONS | |||
| 175 | . = ALIGN(PAGE_SIZE); | 175 | . = ALIGN(PAGE_SIZE); |
| 176 | __init_end = .; | 176 | __init_end = .; |
| 177 | 177 | ||
| 178 | .data.page_aligned : AT(ADDR(.data.page_aligned) - LOAD_OFFSET) | 178 | .data..page_aligned : AT(ADDR(.data..page_aligned) - LOAD_OFFSET) |
| 179 | { | 179 | { |
| 180 | PAGE_ALIGNED_DATA(PAGE_SIZE) | 180 | PAGE_ALIGNED_DATA(PAGE_SIZE) |
| 181 | . = ALIGN(PAGE_SIZE); | 181 | . = ALIGN(PAGE_SIZE); |
| 182 | __start_gate_section = .; | 182 | __start_gate_section = .; |
| 183 | *(.data.gate) | 183 | *(.data..gate) |
| 184 | __stop_gate_section = .; | 184 | __stop_gate_section = .; |
| 185 | #ifdef CONFIG_XEN | 185 | #ifdef CONFIG_XEN |
| 186 | . = ALIGN(PAGE_SIZE); | 186 | . = ALIGN(PAGE_SIZE); |
| 187 | __xen_start_gate_section = .; | 187 | __xen_start_gate_section = .; |
| 188 | *(.data.gate.xen) | 188 | *(.data..gate.xen) |
| 189 | __xen_stop_gate_section = .; | 189 | __xen_stop_gate_section = .; |
| 190 | #endif | 190 | #endif |
| 191 | } | 191 | } |
diff --git a/arch/ia64/kvm/kvm-ia64.c b/arch/ia64/kvm/kvm-ia64.c index 29afd9a252ff..9b109f25e49c 100644 --- a/arch/ia64/kvm/kvm-ia64.c +++ b/arch/ia64/kvm/kvm-ia64.c | |||
| @@ -144,6 +144,7 @@ int kvm_arch_hardware_enable(void *garbage) | |||
| 144 | VP_INIT_ENV : VP_INIT_ENV_INITALIZE, | 144 | VP_INIT_ENV : VP_INIT_ENV_INITALIZE, |
| 145 | __pa(kvm_vm_buffer), KVM_VM_BUFFER_BASE, &tmp_base); | 145 | __pa(kvm_vm_buffer), KVM_VM_BUFFER_BASE, &tmp_base); |
| 146 | if (status != 0) { | 146 | if (status != 0) { |
| 147 | spin_unlock(&vp_lock); | ||
| 147 | printk(KERN_WARNING"kvm: Failed to Enable VT Support!!!!\n"); | 148 | printk(KERN_WARNING"kvm: Failed to Enable VT Support!!!!\n"); |
| 148 | return -EINVAL; | 149 | return -EINVAL; |
| 149 | } | 150 | } |
| @@ -979,11 +980,13 @@ long kvm_arch_vm_ioctl(struct file *filp, | |||
| 979 | r = -EFAULT; | 980 | r = -EFAULT; |
| 980 | if (copy_from_user(&irq_event, argp, sizeof irq_event)) | 981 | if (copy_from_user(&irq_event, argp, sizeof irq_event)) |
| 981 | goto out; | 982 | goto out; |
| 983 | r = -ENXIO; | ||
| 982 | if (irqchip_in_kernel(kvm)) { | 984 | if (irqchip_in_kernel(kvm)) { |
| 983 | __s32 status; | 985 | __s32 status; |
| 984 | status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID, | 986 | status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID, |
| 985 | irq_event.irq, irq_event.level); | 987 | irq_event.irq, irq_event.level); |
| 986 | if (ioctl == KVM_IRQ_LINE_STATUS) { | 988 | if (ioctl == KVM_IRQ_LINE_STATUS) { |
| 989 | r = -EFAULT; | ||
| 987 | irq_event.status = status; | 990 | irq_event.status = status; |
| 988 | if (copy_to_user(argp, &irq_event, | 991 | if (copy_to_user(argp, &irq_event, |
| 989 | sizeof irq_event)) | 992 | sizeof irq_event)) |
| @@ -1379,7 +1382,7 @@ static void kvm_release_vm_pages(struct kvm *kvm) | |||
| 1379 | int i, j; | 1382 | int i, j; |
| 1380 | unsigned long base_gfn; | 1383 | unsigned long base_gfn; |
| 1381 | 1384 | ||
| 1382 | slots = rcu_dereference(kvm->memslots); | 1385 | slots = kvm_memslots(kvm); |
| 1383 | for (i = 0; i < slots->nmemslots; i++) { | 1386 | for (i = 0; i < slots->nmemslots; i++) { |
| 1384 | memslot = &slots->memslots[i]; | 1387 | memslot = &slots->memslots[i]; |
| 1385 | base_gfn = memslot->base_gfn; | 1388 | base_gfn = memslot->base_gfn; |
| @@ -1535,8 +1538,10 @@ long kvm_arch_vcpu_ioctl(struct file *filp, | |||
| 1535 | goto out; | 1538 | goto out; |
| 1536 | 1539 | ||
| 1537 | if (copy_to_user(user_stack, stack, | 1540 | if (copy_to_user(user_stack, stack, |
| 1538 | sizeof(struct kvm_ia64_vcpu_stack))) | 1541 | sizeof(struct kvm_ia64_vcpu_stack))) { |
| 1542 | r = -EFAULT; | ||
| 1539 | goto out; | 1543 | goto out; |
| 1544 | } | ||
| 1540 | 1545 | ||
| 1541 | break; | 1546 | break; |
| 1542 | } | 1547 | } |
diff --git a/arch/ia64/kvm/vmm.c b/arch/ia64/kvm/vmm.c index 7a62f75778c5..f0b9cac82414 100644 --- a/arch/ia64/kvm/vmm.c +++ b/arch/ia64/kvm/vmm.c | |||
| @@ -51,7 +51,7 @@ static int __init kvm_vmm_init(void) | |||
| 51 | vmm_fpswa_interface = fpswa_interface; | 51 | vmm_fpswa_interface = fpswa_interface; |
| 52 | 52 | ||
| 53 | /*Register vmm data to kvm side*/ | 53 | /*Register vmm data to kvm side*/ |
| 54 | return kvm_init(&vmm_info, 1024, THIS_MODULE); | 54 | return kvm_init(&vmm_info, 1024, 0, THIS_MODULE); |
| 55 | } | 55 | } |
| 56 | 56 | ||
| 57 | static void __exit kvm_vmm_exit(void) | 57 | static void __exit kvm_vmm_exit(void) |
diff --git a/arch/ia64/kvm/vmm_ivt.S b/arch/ia64/kvm/vmm_ivt.S index 40920c630649..24018484c6e9 100644 --- a/arch/ia64/kvm/vmm_ivt.S +++ b/arch/ia64/kvm/vmm_ivt.S | |||
| @@ -104,7 +104,7 @@ GLOBAL_ENTRY(kvm_vmm_panic) | |||
| 104 | br.call.sptk.many b6=vmm_panic_handler; | 104 | br.call.sptk.many b6=vmm_panic_handler; |
| 105 | END(kvm_vmm_panic) | 105 | END(kvm_vmm_panic) |
| 106 | 106 | ||
| 107 | .section .text.ivt,"ax" | 107 | .section .text..ivt,"ax" |
| 108 | 108 | ||
| 109 | .align 32768 // align on 32KB boundary | 109 | .align 32768 // align on 32KB boundary |
| 110 | .global kvm_ia64_ivt | 110 | .global kvm_ia64_ivt |
diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c index 64aff520b899..aa2533ae7e9e 100644 --- a/arch/ia64/pci/pci.c +++ b/arch/ia64/pci/pci.c | |||
| @@ -335,8 +335,11 @@ pcibios_setup_root_windows(struct pci_bus *bus, struct pci_controller *ctrl) | |||
| 335 | } | 335 | } |
| 336 | 336 | ||
| 337 | struct pci_bus * __devinit | 337 | struct pci_bus * __devinit |
| 338 | pci_acpi_scan_root(struct acpi_device *device, int domain, int bus) | 338 | pci_acpi_scan_root(struct acpi_pci_root *root) |
| 339 | { | 339 | { |
| 340 | struct acpi_device *device = root->device; | ||
| 341 | int domain = root->segment; | ||
| 342 | int bus = root->secondary.start; | ||
| 340 | struct pci_controller *controller; | 343 | struct pci_controller *controller; |
| 341 | unsigned int windows = 0; | 344 | unsigned int windows = 0; |
| 342 | struct pci_bus *pbus; | 345 | struct pci_bus *pbus; |
diff --git a/arch/ia64/scripts/unwcheck.py b/arch/ia64/scripts/unwcheck.py index c27849889e19..2bfd941ff7c7 100644 --- a/arch/ia64/scripts/unwcheck.py +++ b/arch/ia64/scripts/unwcheck.py | |||
| @@ -1,4 +1,4 @@ | |||
| 1 | #!/usr/bin/env python | 1 | #!/usr/bin/python |
| 2 | # | 2 | # |
| 3 | # Usage: unwcheck.py FILE | 3 | # Usage: unwcheck.py FILE |
| 4 | # | 4 | # |
diff --git a/arch/ia64/sn/kernel/sn2/sn_hwperf.c b/arch/ia64/sn/kernel/sn2/sn_hwperf.c index f6c1c5fd075d..fa1eceed0d23 100644 --- a/arch/ia64/sn/kernel/sn2/sn_hwperf.c +++ b/arch/ia64/sn/kernel/sn2/sn_hwperf.c | |||
| @@ -30,7 +30,6 @@ | |||
| 30 | #include <linux/miscdevice.h> | 30 | #include <linux/miscdevice.h> |
| 31 | #include <linux/utsname.h> | 31 | #include <linux/utsname.h> |
| 32 | #include <linux/cpumask.h> | 32 | #include <linux/cpumask.h> |
| 33 | #include <linux/smp_lock.h> | ||
| 34 | #include <linux/nodemask.h> | 33 | #include <linux/nodemask.h> |
| 35 | #include <linux/smp.h> | 34 | #include <linux/smp.h> |
| 36 | #include <linux/mutex.h> | 35 | #include <linux/mutex.h> |
| @@ -682,8 +681,7 @@ static int sn_hwperf_map_err(int hwperf_err) | |||
| 682 | /* | 681 | /* |
| 683 | * ioctl for "sn_hwperf" misc device | 682 | * ioctl for "sn_hwperf" misc device |
| 684 | */ | 683 | */ |
| 685 | static int | 684 | static long sn_hwperf_ioctl(struct file *fp, u32 op, unsigned long arg) |
| 686 | sn_hwperf_ioctl(struct inode *in, struct file *fp, u32 op, unsigned long arg) | ||
| 687 | { | 685 | { |
| 688 | struct sn_hwperf_ioctl_args a; | 686 | struct sn_hwperf_ioctl_args a; |
| 689 | struct cpuinfo_ia64 *cdata; | 687 | struct cpuinfo_ia64 *cdata; |
| @@ -699,8 +697,6 @@ sn_hwperf_ioctl(struct inode *in, struct file *fp, u32 op, unsigned long arg) | |||
| 699 | int i; | 697 | int i; |
| 700 | int j; | 698 | int j; |
| 701 | 699 | ||
| 702 | unlock_kernel(); | ||
| 703 | |||
| 704 | /* only user requests are allowed here */ | 700 | /* only user requests are allowed here */ |
| 705 | if ((op & SN_HWPERF_OP_MASK) < 10) { | 701 | if ((op & SN_HWPERF_OP_MASK) < 10) { |
| 706 | r = -EINVAL; | 702 | r = -EINVAL; |
| @@ -859,12 +855,11 @@ sn_hwperf_ioctl(struct inode *in, struct file *fp, u32 op, unsigned long arg) | |||
| 859 | error: | 855 | error: |
| 860 | vfree(p); | 856 | vfree(p); |
| 861 | 857 | ||
| 862 | lock_kernel(); | ||
| 863 | return r; | 858 | return r; |
| 864 | } | 859 | } |
| 865 | 860 | ||
| 866 | static const struct file_operations sn_hwperf_fops = { | 861 | static const struct file_operations sn_hwperf_fops = { |
| 867 | .ioctl = sn_hwperf_ioctl, | 862 | .unlocked_ioctl = sn_hwperf_ioctl, |
| 868 | }; | 863 | }; |
| 869 | 864 | ||
| 870 | static struct miscdevice sn_hwperf_dev = { | 865 | static struct miscdevice sn_hwperf_dev = { |
diff --git a/arch/ia64/xen/gate-data.S b/arch/ia64/xen/gate-data.S index 7d4830afc91d..6f95b6b32a4e 100644 --- a/arch/ia64/xen/gate-data.S +++ b/arch/ia64/xen/gate-data.S | |||
| @@ -1,3 +1,3 @@ | |||
| 1 | .section .data.gate.xen, "aw" | 1 | .section .data..gate.xen, "aw" |
| 2 | 2 | ||
| 3 | .incbin "arch/ia64/xen/gate.so" | 3 | .incbin "arch/ia64/xen/gate.so" |
diff --git a/arch/ia64/xen/xensetup.S b/arch/ia64/xen/xensetup.S index aff8346ea193..b820ed02ab9f 100644 --- a/arch/ia64/xen/xensetup.S +++ b/arch/ia64/xen/xensetup.S | |||
| @@ -14,7 +14,7 @@ | |||
| 14 | #include <linux/init.h> | 14 | #include <linux/init.h> |
| 15 | #include <xen/interface/elfnote.h> | 15 | #include <xen/interface/elfnote.h> |
| 16 | 16 | ||
| 17 | .section .data.read_mostly | 17 | .section .data..read_mostly |
| 18 | .align 8 | 18 | .align 8 |
| 19 | .global xen_domain_type | 19 | .global xen_domain_type |
| 20 | xen_domain_type: | 20 | xen_domain_type: |
diff --git a/arch/m32r/include/asm/scatterlist.h b/arch/m32r/include/asm/scatterlist.h index 1ed372c73d0b..aeeddd8dac17 100644 --- a/arch/m32r/include/asm/scatterlist.h +++ b/arch/m32r/include/asm/scatterlist.h | |||
| @@ -1,20 +1,7 @@ | |||
| 1 | #ifndef _ASM_M32R_SCATTERLIST_H | 1 | #ifndef _ASM_M32R_SCATTERLIST_H |
| 2 | #define _ASM_M32R_SCATTERLIST_H | 2 | #define _ASM_M32R_SCATTERLIST_H |
| 3 | 3 | ||
| 4 | #include <asm/types.h> | 4 | #include <asm-generic/scatterlist.h> |
| 5 | |||
| 6 | struct scatterlist { | ||
| 7 | #ifdef CONFIG_DEBUG_SG | ||
| 8 | unsigned long sg_magic; | ||
| 9 | #endif | ||
| 10 | char * address; /* Location data is to be transferred to, NULL for | ||
| 11 | * highmem page */ | ||
| 12 | unsigned long page_link; | ||
| 13 | unsigned int offset;/* for highmem, page offset */ | ||
| 14 | |||
| 15 | dma_addr_t dma_address; | ||
| 16 | unsigned int length; | ||
| 17 | }; | ||
| 18 | 5 | ||
| 19 | #define ISA_DMA_THRESHOLD (0x1fffffff) | 6 | #define ISA_DMA_THRESHOLD (0x1fffffff) |
| 20 | 7 | ||
diff --git a/arch/m32r/mm/fault.c b/arch/m32r/mm/fault.c index 28ee389e5f5a..b8ec002aef8e 100644 --- a/arch/m32r/mm/fault.c +++ b/arch/m32r/mm/fault.c | |||
| @@ -188,7 +188,6 @@ good_area: | |||
| 188 | if ((error_code & ACE_INSTRUCTION) && !(vma->vm_flags & VM_EXEC)) | 188 | if ((error_code & ACE_INSTRUCTION) && !(vma->vm_flags & VM_EXEC)) |
| 189 | goto bad_area; | 189 | goto bad_area; |
| 190 | 190 | ||
| 191 | survive: | ||
| 192 | /* | 191 | /* |
| 193 | * If for any reason at all we couldn't handle the fault, | 192 | * If for any reason at all we couldn't handle the fault, |
| 194 | * make sure we exit gracefully rather than endlessly redo | 193 | * make sure we exit gracefully rather than endlessly redo |
| @@ -271,15 +270,10 @@ no_context: | |||
| 271 | */ | 270 | */ |
| 272 | out_of_memory: | 271 | out_of_memory: |
| 273 | up_read(&mm->mmap_sem); | 272 | up_read(&mm->mmap_sem); |
| 274 | if (is_global_init(tsk)) { | 273 | if (!(error_code & ACE_USERMODE)) |
| 275 | yield(); | 274 | goto no_context; |
| 276 | down_read(&mm->mmap_sem); | 275 | pagefault_out_of_memory(); |
| 277 | goto survive; | 276 | return; |
| 278 | } | ||
| 279 | printk("VM: killing process %s\n", tsk->comm); | ||
| 280 | if (error_code & ACE_USERMODE) | ||
| 281 | do_group_exit(SIGKILL); | ||
| 282 | goto no_context; | ||
| 283 | 277 | ||
| 284 | do_sigbus: | 278 | do_sigbus: |
| 285 | up_read(&mm->mmap_sem); | 279 | up_read(&mm->mmap_sem); |
diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig index b5da298ba61d..2e3737b92ffc 100644 --- a/arch/m68k/Kconfig +++ b/arch/m68k/Kconfig | |||
| @@ -7,6 +7,7 @@ config M68K | |||
| 7 | default y | 7 | default y |
| 8 | select HAVE_AOUT | 8 | select HAVE_AOUT |
| 9 | select HAVE_IDE | 9 | select HAVE_IDE |
| 10 | select GENERIC_ATOMIC64 | ||
| 10 | 11 | ||
| 11 | config MMU | 12 | config MMU |
| 12 | bool | 13 | bool |
diff --git a/arch/m68k/amiga/config.c b/arch/m68k/amiga/config.c index d2cc35d98532..b1577f741fa8 100644 --- a/arch/m68k/amiga/config.c +++ b/arch/m68k/amiga/config.c | |||
| @@ -97,10 +97,6 @@ static void amiga_get_model(char *model); | |||
| 97 | static void amiga_get_hardware_list(struct seq_file *m); | 97 | static void amiga_get_hardware_list(struct seq_file *m); |
| 98 | /* amiga specific timer functions */ | 98 | /* amiga specific timer functions */ |
| 99 | static unsigned long amiga_gettimeoffset(void); | 99 | static unsigned long amiga_gettimeoffset(void); |
| 100 | static int a3000_hwclk(int, struct rtc_time *); | ||
| 101 | static int a2000_hwclk(int, struct rtc_time *); | ||
| 102 | static int amiga_set_clock_mmss(unsigned long); | ||
| 103 | static unsigned int amiga_get_ss(void); | ||
| 104 | extern void amiga_mksound(unsigned int count, unsigned int ticks); | 100 | extern void amiga_mksound(unsigned int count, unsigned int ticks); |
| 105 | static void amiga_reset(void); | 101 | static void amiga_reset(void); |
| 106 | extern void amiga_init_sound(void); | 102 | extern void amiga_init_sound(void); |
| @@ -138,10 +134,6 @@ static struct { | |||
| 138 | } | 134 | } |
| 139 | }; | 135 | }; |
| 140 | 136 | ||
| 141 | static struct resource rtc_resource = { | ||
| 142 | .start = 0x00dc0000, .end = 0x00dcffff | ||
| 143 | }; | ||
| 144 | |||
| 145 | static struct resource ram_resource[NUM_MEMINFO]; | 137 | static struct resource ram_resource[NUM_MEMINFO]; |
| 146 | 138 | ||
| 147 | 139 | ||
| @@ -387,15 +379,6 @@ void __init config_amiga(void) | |||
| 387 | mach_get_model = amiga_get_model; | 379 | mach_get_model = amiga_get_model; |
| 388 | mach_get_hardware_list = amiga_get_hardware_list; | 380 | mach_get_hardware_list = amiga_get_hardware_list; |
| 389 | mach_gettimeoffset = amiga_gettimeoffset; | 381 | mach_gettimeoffset = amiga_gettimeoffset; |
| 390 | if (AMIGAHW_PRESENT(A3000_CLK)) { | ||
| 391 | mach_hwclk = a3000_hwclk; | ||
| 392 | rtc_resource.name = "A3000 RTC"; | ||
| 393 | request_resource(&iomem_resource, &rtc_resource); | ||
| 394 | } else /* if (AMIGAHW_PRESENT(A2000_CLK)) */ { | ||
| 395 | mach_hwclk = a2000_hwclk; | ||
| 396 | rtc_resource.name = "A2000 RTC"; | ||
| 397 | request_resource(&iomem_resource, &rtc_resource); | ||
| 398 | } | ||
| 399 | 382 | ||
| 400 | /* | 383 | /* |
| 401 | * default MAX_DMA=0xffffffff on all machines. If we don't do so, the SCSI | 384 | * default MAX_DMA=0xffffffff on all machines. If we don't do so, the SCSI |
| @@ -404,8 +387,6 @@ void __init config_amiga(void) | |||
| 404 | */ | 387 | */ |
| 405 | mach_max_dma_address = 0xffffffff; | 388 | mach_max_dma_address = 0xffffffff; |
| 406 | 389 | ||
| 407 | mach_set_clock_mmss = amiga_set_clock_mmss; | ||
| 408 | mach_get_ss = amiga_get_ss; | ||
| 409 | mach_reset = amiga_reset; | 390 | mach_reset = amiga_reset; |
| 410 | #if defined(CONFIG_INPUT_M68K_BEEP) || defined(CONFIG_INPUT_M68K_BEEP_MODULE) | 391 | #if defined(CONFIG_INPUT_M68K_BEEP) || defined(CONFIG_INPUT_M68K_BEEP_MODULE) |
| 411 | mach_beep = amiga_mksound; | 392 | mach_beep = amiga_mksound; |
| @@ -530,161 +511,6 @@ static unsigned long amiga_gettimeoffset(void) | |||
| 530 | return ticks + offset; | 511 | return ticks + offset; |
| 531 | } | 512 | } |
| 532 | 513 | ||
| 533 | static int a3000_hwclk(int op, struct rtc_time *t) | ||
| 534 | { | ||
| 535 | tod_3000.cntrl1 = TOD3000_CNTRL1_HOLD; | ||
| 536 | |||
| 537 | if (!op) { /* read */ | ||
| 538 | t->tm_sec = tod_3000.second1 * 10 + tod_3000.second2; | ||
| 539 | t->tm_min = tod_3000.minute1 * 10 + tod_3000.minute2; | ||
| 540 | t->tm_hour = tod_3000.hour1 * 10 + tod_3000.hour2; | ||
| 541 | t->tm_mday = tod_3000.day1 * 10 + tod_3000.day2; | ||
| 542 | t->tm_wday = tod_3000.weekday; | ||
| 543 | t->tm_mon = tod_3000.month1 * 10 + tod_3000.month2 - 1; | ||
| 544 | t->tm_year = tod_3000.year1 * 10 + tod_3000.year2; | ||
| 545 | if (t->tm_year <= 69) | ||
| 546 | t->tm_year += 100; | ||
| 547 | } else { | ||
| 548 | tod_3000.second1 = t->tm_sec / 10; | ||
| 549 | tod_3000.second2 = t->tm_sec % 10; | ||
| 550 | tod_3000.minute1 = t->tm_min / 10; | ||
| 551 | tod_3000.minute2 = t->tm_min % 10; | ||
| 552 | tod_3000.hour1 = t->tm_hour / 10; | ||
| 553 | tod_3000.hour2 = t->tm_hour % 10; | ||
| 554 | tod_3000.day1 = t->tm_mday / 10; | ||
| 555 | tod_3000.day2 = t->tm_mday % 10; | ||
| 556 | if (t->tm_wday != -1) | ||
| 557 | tod_3000.weekday = t->tm_wday; | ||
| 558 | tod_3000.month1 = (t->tm_mon + 1) / 10; | ||
| 559 | tod_3000.month2 = (t->tm_mon + 1) % 10; | ||
| 560 | if (t->tm_year >= 100) | ||
| 561 | t->tm_year -= 100; | ||
| 562 | tod_3000.year1 = t->tm_year / 10; | ||
| 563 | tod_3000.year2 = t->tm_year % 10; | ||
| 564 | } | ||
| 565 | |||
| 566 | tod_3000.cntrl1 = TOD3000_CNTRL1_FREE; | ||
| 567 | |||
| 568 | return 0; | ||
| 569 | } | ||
| 570 | |||
| 571 | static int a2000_hwclk(int op, struct rtc_time *t) | ||
| 572 | { | ||
| 573 | int cnt = 5; | ||
| 574 | |||
| 575 | tod_2000.cntrl1 = TOD2000_CNTRL1_HOLD; | ||
| 576 | |||
| 577 | while ((tod_2000.cntrl1 & TOD2000_CNTRL1_BUSY) && cnt) { | ||
| 578 | tod_2000.cntrl1 &= ~TOD2000_CNTRL1_HOLD; | ||
| 579 | udelay(70); | ||
| 580 | tod_2000.cntrl1 |= TOD2000_CNTRL1_HOLD; | ||
| 581 | --cnt; | ||
| 582 | } | ||
| 583 | |||
| 584 | if (!cnt) | ||
| 585 | printk(KERN_INFO "hwclk: timed out waiting for RTC (0x%x)\n", | ||
| 586 | tod_2000.cntrl1); | ||
| 587 | |||
| 588 | if (!op) { /* read */ | ||
| 589 | t->tm_sec = tod_2000.second1 * 10 + tod_2000.second2; | ||
| 590 | t->tm_min = tod_2000.minute1 * 10 + tod_2000.minute2; | ||
| 591 | t->tm_hour = (tod_2000.hour1 & 3) * 10 + tod_2000.hour2; | ||
| 592 | t->tm_mday = tod_2000.day1 * 10 + tod_2000.day2; | ||
| 593 | t->tm_wday = tod_2000.weekday; | ||
| 594 | t->tm_mon = tod_2000.month1 * 10 + tod_2000.month2 - 1; | ||
| 595 | t->tm_year = tod_2000.year1 * 10 + tod_2000.year2; | ||
| 596 | if (t->tm_year <= 69) | ||
| 597 | t->tm_year += 100; | ||
| 598 | |||
| 599 | if (!(tod_2000.cntrl3 & TOD2000_CNTRL3_24HMODE)) { | ||
| 600 | if (!(tod_2000.hour1 & TOD2000_HOUR1_PM) && t->tm_hour == 12) | ||
| 601 | t->tm_hour = 0; | ||
| 602 | else if ((tod_2000.hour1 & TOD2000_HOUR1_PM) && t->tm_hour != 12) | ||
| 603 | t->tm_hour += 12; | ||
| 604 | } | ||
| 605 | } else { | ||
| 606 | tod_2000.second1 = t->tm_sec / 10; | ||
| 607 | tod_2000.second2 = t->tm_sec % 10; | ||
| 608 | tod_2000.minute1 = t->tm_min / 10; | ||
| 609 | tod_2000.minute2 = t->tm_min % 10; | ||
| 610 | if (tod_2000.cntrl3 & TOD2000_CNTRL3_24HMODE) | ||
| 611 | tod_2000.hour1 = t->tm_hour / 10; | ||
| 612 | else if (t->tm_hour >= 12) | ||
| 613 | tod_2000.hour1 = TOD2000_HOUR1_PM + | ||
| 614 | (t->tm_hour - 12) / 10; | ||
| 615 | else | ||
| 616 | tod_2000.hour1 = t->tm_hour / 10; | ||
| 617 | tod_2000.hour2 = t->tm_hour % 10; | ||
| 618 | tod_2000.day1 = t->tm_mday / 10; | ||
| 619 | tod_2000.day2 = t->tm_mday % 10; | ||
| 620 | if (t->tm_wday != -1) | ||
| 621 | tod_2000.weekday = t->tm_wday; | ||
| 622 | tod_2000.month1 = (t->tm_mon + 1) / 10; | ||
| 623 | tod_2000.month2 = (t->tm_mon + 1) % 10; | ||
| 624 | if (t->tm_year >= 100) | ||
| 625 | t->tm_year -= 100; | ||
| 626 | tod_2000.year1 = t->tm_year / 10; | ||
| 627 | tod_2000.year2 = t->tm_year % 10; | ||
| 628 | } | ||
| 629 | |||
| 630 | tod_2000.cntrl1 &= ~TOD2000_CNTRL1_HOLD; | ||
| 631 | |||
| 632 | return 0; | ||
| 633 | } | ||
| 634 | |||
| 635 | static int amiga_set_clock_mmss(unsigned long nowtime) | ||
| 636 | { | ||
| 637 | short real_seconds = nowtime % 60, real_minutes = (nowtime / 60) % 60; | ||
| 638 | |||
| 639 | if (AMIGAHW_PRESENT(A3000_CLK)) { | ||
| 640 | tod_3000.cntrl1 = TOD3000_CNTRL1_HOLD; | ||
| 641 | |||
| 642 | tod_3000.second1 = real_seconds / 10; | ||
| 643 | tod_3000.second2 = real_seconds % 10; | ||
| 644 | tod_3000.minute1 = real_minutes / 10; | ||
| 645 | tod_3000.minute2 = real_minutes % 10; | ||
| 646 | |||
| 647 | tod_3000.cntrl1 = TOD3000_CNTRL1_FREE; | ||
| 648 | } else /* if (AMIGAHW_PRESENT(A2000_CLK)) */ { | ||
| 649 | int cnt = 5; | ||
| 650 | |||
| 651 | tod_2000.cntrl1 |= TOD2000_CNTRL1_HOLD; | ||
| 652 | |||
| 653 | while ((tod_2000.cntrl1 & TOD2000_CNTRL1_BUSY) && cnt) { | ||
| 654 | tod_2000.cntrl1 &= ~TOD2000_CNTRL1_HOLD; | ||
| 655 | udelay(70); | ||
| 656 | tod_2000.cntrl1 |= TOD2000_CNTRL1_HOLD; | ||
| 657 | --cnt; | ||
| 658 | } | ||
| 659 | |||
| 660 | if (!cnt) | ||
| 661 | printk(KERN_INFO "set_clock_mmss: timed out waiting for RTC (0x%x)\n", tod_2000.cntrl1); | ||
| 662 | |||
| 663 | tod_2000.second1 = real_seconds / 10; | ||
| 664 | tod_2000.second2 = real_seconds % 10; | ||
| 665 | tod_2000.minute1 = real_minutes / 10; | ||
| 666 | tod_2000.minute2 = real_minutes % 10; | ||
| 667 | |||
| 668 | tod_2000.cntrl1 &= ~TOD2000_CNTRL1_HOLD; | ||
| 669 | } | ||
| 670 | |||
| 671 | return 0; | ||
| 672 | } | ||
| 673 | |||
| 674 | static unsigned int amiga_get_ss(void) | ||
| 675 | { | ||
| 676 | unsigned int s; | ||
| 677 | |||
| 678 | if (AMIGAHW_PRESENT(A3000_CLK)) { | ||
| 679 | tod_3000.cntrl1 = TOD3000_CNTRL1_HOLD; | ||
| 680 | s = tod_3000.second1 * 10 + tod_3000.second2; | ||
| 681 | tod_3000.cntrl1 = TOD3000_CNTRL1_FREE; | ||
| 682 | } else /* if (AMIGAHW_PRESENT(A2000_CLK)) */ { | ||
| 683 | s = tod_2000.second1 * 10 + tod_2000.second2; | ||
| 684 | } | ||
| 685 | return s; | ||
| 686 | } | ||
| 687 | |||
| 688 | static NORET_TYPE void amiga_reset(void) | 514 | static NORET_TYPE void amiga_reset(void) |
| 689 | ATTRIB_NORET; | 515 | ATTRIB_NORET; |
| 690 | 516 | ||
diff --git a/arch/m68k/amiga/platform.c b/arch/m68k/amiga/platform.c index 38f18bf14737..7fd8b41723ea 100644 --- a/arch/m68k/amiga/platform.c +++ b/arch/m68k/amiga/platform.c | |||
| @@ -11,6 +11,7 @@ | |||
| 11 | #include <linux/zorro.h> | 11 | #include <linux/zorro.h> |
| 12 | 12 | ||
| 13 | #include <asm/amigahw.h> | 13 | #include <asm/amigahw.h> |
| 14 | #include <asm/amigayle.h> | ||
| 14 | 15 | ||
| 15 | 16 | ||
| 16 | #ifdef CONFIG_ZORRO | 17 | #ifdef CONFIG_ZORRO |
| @@ -55,11 +56,77 @@ static int __init amiga_init_bus(void) | |||
| 55 | 56 | ||
| 56 | subsys_initcall(amiga_init_bus); | 57 | subsys_initcall(amiga_init_bus); |
| 57 | 58 | ||
| 58 | #endif /* CONFIG_ZORRO */ | 59 | |
| 60 | static int z_dev_present(zorro_id id) | ||
| 61 | { | ||
| 62 | unsigned int i; | ||
| 63 | |||
| 64 | for (i = 0; i < zorro_num_autocon; i++) | ||
| 65 | if (zorro_autocon[i].rom.er_Manufacturer == ZORRO_MANUF(id) && | ||
| 66 | zorro_autocon[i].rom.er_Product == ZORRO_PROD(id)) | ||
| 67 | return 1; | ||
| 68 | |||
| 69 | return 0; | ||
| 70 | } | ||
| 71 | |||
| 72 | #else /* !CONFIG_ZORRO */ | ||
| 73 | |||
| 74 | static inline int z_dev_present(zorro_id id) { return 0; } | ||
| 75 | |||
| 76 | #endif /* !CONFIG_ZORRO */ | ||
| 77 | |||
| 78 | |||
| 79 | static const struct resource a3000_scsi_resource __initconst = { | ||
| 80 | .start = 0xdd0000, | ||
| 81 | .end = 0xdd00ff, | ||
| 82 | .flags = IORESOURCE_MEM, | ||
| 83 | }; | ||
| 84 | |||
| 85 | |||
| 86 | static const struct resource a4000t_scsi_resource __initconst = { | ||
| 87 | .start = 0xdd0000, | ||
| 88 | .end = 0xdd0fff, | ||
| 89 | .flags = IORESOURCE_MEM, | ||
| 90 | }; | ||
| 91 | |||
| 92 | |||
| 93 | static const struct resource a1200_ide_resource __initconst = { | ||
| 94 | .start = 0xda0000, | ||
| 95 | .end = 0xda1fff, | ||
| 96 | .flags = IORESOURCE_MEM, | ||
| 97 | }; | ||
| 98 | |||
| 99 | static const struct gayle_ide_platform_data a1200_ide_pdata __initconst = { | ||
| 100 | .base = 0xda0000, | ||
| 101 | .irqport = 0xda9000, | ||
| 102 | .explicit_ack = 1, | ||
| 103 | }; | ||
| 104 | |||
| 105 | |||
| 106 | static const struct resource a4000_ide_resource __initconst = { | ||
| 107 | .start = 0xdd2000, | ||
| 108 | .end = 0xdd3fff, | ||
| 109 | .flags = IORESOURCE_MEM, | ||
| 110 | }; | ||
| 111 | |||
| 112 | static const struct gayle_ide_platform_data a4000_ide_pdata __initconst = { | ||
| 113 | .base = 0xdd2020, | ||
| 114 | .irqport = 0xdd3020, | ||
| 115 | .explicit_ack = 0, | ||
| 116 | }; | ||
| 117 | |||
| 118 | |||
| 119 | static const struct resource amiga_rtc_resource __initconst = { | ||
| 120 | .start = 0x00dc0000, | ||
| 121 | .end = 0x00dcffff, | ||
| 122 | .flags = IORESOURCE_MEM, | ||
| 123 | }; | ||
| 59 | 124 | ||
| 60 | 125 | ||
| 61 | static int __init amiga_init_devices(void) | 126 | static int __init amiga_init_devices(void) |
| 62 | { | 127 | { |
| 128 | struct platform_device *pdev; | ||
| 129 | |||
| 63 | if (!MACH_IS_AMIGA) | 130 | if (!MACH_IS_AMIGA) |
| 64 | return -ENODEV; | 131 | return -ENODEV; |
| 65 | 132 | ||
| @@ -77,6 +144,53 @@ static int __init amiga_init_devices(void) | |||
| 77 | if (AMIGAHW_PRESENT(AMI_FLOPPY)) | 144 | if (AMIGAHW_PRESENT(AMI_FLOPPY)) |
| 78 | platform_device_register_simple("amiga-floppy", -1, NULL, 0); | 145 | platform_device_register_simple("amiga-floppy", -1, NULL, 0); |
| 79 | 146 | ||
| 147 | if (AMIGAHW_PRESENT(A3000_SCSI)) | ||
| 148 | platform_device_register_simple("amiga-a3000-scsi", -1, | ||
| 149 | &a3000_scsi_resource, 1); | ||
| 150 | |||
| 151 | if (AMIGAHW_PRESENT(A4000_SCSI)) | ||
| 152 | platform_device_register_simple("amiga-a4000t-scsi", -1, | ||
| 153 | &a4000t_scsi_resource, 1); | ||
| 154 | |||
| 155 | if (AMIGAHW_PRESENT(A1200_IDE) || | ||
| 156 | z_dev_present(ZORRO_PROD_MTEC_VIPER_MK_V_E_MATRIX_530_SCSI_IDE)) { | ||
| 157 | pdev = platform_device_register_simple("amiga-gayle-ide", -1, | ||
| 158 | &a1200_ide_resource, 1); | ||
| 159 | platform_device_add_data(pdev, &a1200_ide_pdata, | ||
| 160 | sizeof(a1200_ide_pdata)); | ||
| 161 | } | ||
| 162 | |||
| 163 | if (AMIGAHW_PRESENT(A4000_IDE)) { | ||
| 164 | pdev = platform_device_register_simple("amiga-gayle-ide", -1, | ||
| 165 | &a4000_ide_resource, 1); | ||
| 166 | platform_device_add_data(pdev, &a4000_ide_pdata, | ||
| 167 | sizeof(a4000_ide_pdata)); | ||
| 168 | } | ||
| 169 | |||
| 170 | |||
| 171 | /* other I/O hardware */ | ||
| 172 | if (AMIGAHW_PRESENT(AMI_KEYBOARD)) | ||
| 173 | platform_device_register_simple("amiga-keyboard", -1, NULL, 0); | ||
| 174 | |||
| 175 | if (AMIGAHW_PRESENT(AMI_MOUSE)) | ||
| 176 | platform_device_register_simple("amiga-mouse", -1, NULL, 0); | ||
| 177 | |||
| 178 | if (AMIGAHW_PRESENT(AMI_SERIAL)) | ||
| 179 | platform_device_register_simple("amiga-serial", -1, NULL, 0); | ||
| 180 | |||
| 181 | if (AMIGAHW_PRESENT(AMI_PARALLEL)) | ||
| 182 | platform_device_register_simple("amiga-parallel", -1, NULL, 0); | ||
| 183 | |||
| 184 | |||
| 185 | /* real time clocks */ | ||
| 186 | if (AMIGAHW_PRESENT(A2000_CLK)) | ||
| 187 | platform_device_register_simple("rtc-msm6242", -1, | ||
| 188 | &amiga_rtc_resource, 1); | ||
| 189 | |||
| 190 | if (AMIGAHW_PRESENT(A3000_CLK)) | ||
| 191 | platform_device_register_simple("rtc-rp5c01", -1, | ||
| 192 | &amiga_rtc_resource, 1); | ||
| 193 | |||
| 80 | return 0; | 194 | return 0; |
| 81 | } | 195 | } |
| 82 | 196 | ||
diff --git a/arch/m68k/include/asm/amigayle.h b/arch/m68k/include/asm/amigayle.h index bb5a6aa329f3..a01453d9c231 100644 --- a/arch/m68k/include/asm/amigayle.h +++ b/arch/m68k/include/asm/amigayle.h | |||
| @@ -104,4 +104,10 @@ struct GAYLE { | |||
| 104 | #define GAYLE_CFG_250NS 0x00 | 104 | #define GAYLE_CFG_250NS 0x00 |
| 105 | #define GAYLE_CFG_720NS 0x0c | 105 | #define GAYLE_CFG_720NS 0x0c |
| 106 | 106 | ||
| 107 | struct gayle_ide_platform_data { | ||
| 108 | unsigned long base; | ||
| 109 | unsigned long irqport; | ||
| 110 | int explicit_ack; /* A1200 IDE needs explicit ack */ | ||
| 111 | }; | ||
| 112 | |||
| 107 | #endif /* asm-m68k/amigayle.h */ | 113 | #endif /* asm-m68k/amigayle.h */ |
diff --git a/arch/m68k/include/asm/atomic.h b/arch/m68k/include/asm/atomic.h index 8d29145ebb27..eab36dcacf6c 100644 --- a/arch/m68k/include/asm/atomic.h +++ b/arch/m68k/include/asm/atomic.h | |||
| @@ -3,3 +3,5 @@ | |||
| 3 | #else | 3 | #else |
| 4 | #include "atomic_mm.h" | 4 | #include "atomic_mm.h" |
| 5 | #endif | 5 | #endif |
| 6 | |||
| 7 | #include <asm-generic/atomic64.h> | ||
diff --git a/arch/m68k/include/asm/cache.h b/arch/m68k/include/asm/cache.h index fed3fd30de7e..ecafbe1718c3 100644 --- a/arch/m68k/include/asm/cache.h +++ b/arch/m68k/include/asm/cache.h | |||
| @@ -8,4 +8,6 @@ | |||
| 8 | #define L1_CACHE_SHIFT 4 | 8 | #define L1_CACHE_SHIFT 4 |
| 9 | #define L1_CACHE_BYTES (1<< L1_CACHE_SHIFT) | 9 | #define L1_CACHE_BYTES (1<< L1_CACHE_SHIFT) |
| 10 | 10 | ||
| 11 | #define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES | ||
| 12 | |||
| 11 | #endif | 13 | #endif |
diff --git a/arch/m68k/include/asm/m520xsim.h b/arch/m68k/include/asm/m520xsim.h index ed2b69b96805..db824a4b136e 100644 --- a/arch/m68k/include/asm/m520xsim.h +++ b/arch/m68k/include/asm/m520xsim.h | |||
| @@ -113,6 +113,7 @@ | |||
| 113 | 113 | ||
| 114 | #define MCF_GPIO_PAR_UART (0xA4036) | 114 | #define MCF_GPIO_PAR_UART (0xA4036) |
| 115 | #define MCF_GPIO_PAR_FECI2C (0xA4033) | 115 | #define MCF_GPIO_PAR_FECI2C (0xA4033) |
| 116 | #define MCF_GPIO_PAR_QSPI (0xA4034) | ||
| 116 | #define MCF_GPIO_PAR_FEC (0xA4038) | 117 | #define MCF_GPIO_PAR_FEC (0xA4038) |
| 117 | 118 | ||
| 118 | #define MCF_GPIO_PAR_UART_PAR_URXD0 (0x0001) | 119 | #define MCF_GPIO_PAR_UART_PAR_URXD0 (0x0001) |
diff --git a/arch/m68k/include/asm/m523xsim.h b/arch/m68k/include/asm/m523xsim.h index a34894cf8e6f..e8d06b24a48e 100644 --- a/arch/m68k/include/asm/m523xsim.h +++ b/arch/m68k/include/asm/m523xsim.h | |||
| @@ -127,5 +127,10 @@ | |||
| 127 | #define MCFGPIO_IRQ_MAX 8 | 127 | #define MCFGPIO_IRQ_MAX 8 |
| 128 | #define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE | 128 | #define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE |
| 129 | 129 | ||
| 130 | /* | ||
| 131 | * Pin Assignment | ||
| 132 | */ | ||
| 133 | #define MCFGPIO_PAR_QSPI (MCF_IPSBAR + 0x10004A) | ||
| 134 | #define MCFGPIO_PAR_TIMER (MCF_IPSBAR + 0x10004C) | ||
| 130 | /****************************************************************************/ | 135 | /****************************************************************************/ |
| 131 | #endif /* m523xsim_h */ | 136 | #endif /* m523xsim_h */ |
diff --git a/arch/m68k/include/asm/m5249sim.h b/arch/m68k/include/asm/m5249sim.h index 14bce877ed88..79b7b402f3c9 100644 --- a/arch/m68k/include/asm/m5249sim.h +++ b/arch/m68k/include/asm/m5249sim.h | |||
| @@ -69,10 +69,12 @@ | |||
| 69 | #define MCFSIM_DMA1ICR MCFSIM_ICR7 /* DMA 1 ICR */ | 69 | #define MCFSIM_DMA1ICR MCFSIM_ICR7 /* DMA 1 ICR */ |
| 70 | #define MCFSIM_DMA2ICR MCFSIM_ICR8 /* DMA 2 ICR */ | 70 | #define MCFSIM_DMA2ICR MCFSIM_ICR8 /* DMA 2 ICR */ |
| 71 | #define MCFSIM_DMA3ICR MCFSIM_ICR9 /* DMA 3 ICR */ | 71 | #define MCFSIM_DMA3ICR MCFSIM_ICR9 /* DMA 3 ICR */ |
| 72 | #define MCFSIM_QSPIICR MCFSIM_ICR10 /* QSPI ICR */ | ||
| 72 | 73 | ||
| 73 | /* | 74 | /* |
| 74 | * Define system peripheral IRQ usage. | 75 | * Define system peripheral IRQ usage. |
| 75 | */ | 76 | */ |
| 77 | #define MCF_IRQ_QSPI 28 /* QSPI, Level 4 */ | ||
| 76 | #define MCF_IRQ_TIMER 30 /* Timer0, Level 6 */ | 78 | #define MCF_IRQ_TIMER 30 /* Timer0, Level 6 */ |
| 77 | #define MCF_IRQ_PROFILER 31 /* Timer1, Level 7 */ | 79 | #define MCF_IRQ_PROFILER 31 /* Timer1, Level 7 */ |
| 78 | 80 | ||
diff --git a/arch/m68k/include/asm/m527xsim.h b/arch/m68k/include/asm/m527xsim.h index 453356d72d80..1feb46f108ce 100644 --- a/arch/m68k/include/asm/m527xsim.h +++ b/arch/m68k/include/asm/m527xsim.h | |||
| @@ -31,6 +31,7 @@ | |||
| 31 | #define MCFINT_UART0 13 /* Interrupt number for UART0 */ | 31 | #define MCFINT_UART0 13 /* Interrupt number for UART0 */ |
| 32 | #define MCFINT_UART1 14 /* Interrupt number for UART1 */ | 32 | #define MCFINT_UART1 14 /* Interrupt number for UART1 */ |
| 33 | #define MCFINT_UART2 15 /* Interrupt number for UART2 */ | 33 | #define MCFINT_UART2 15 /* Interrupt number for UART2 */ |
| 34 | #define MCFINT_QSPI 18 /* Interrupt number for QSPI */ | ||
| 34 | #define MCFINT_PIT1 36 /* Interrupt number for PIT1 */ | 35 | #define MCFINT_PIT1 36 /* Interrupt number for PIT1 */ |
| 35 | 36 | ||
| 36 | /* | 37 | /* |
| @@ -120,6 +121,9 @@ | |||
| 120 | #define MCFGPIO_PIN_MAX 100 | 121 | #define MCFGPIO_PIN_MAX 100 |
| 121 | #define MCFGPIO_IRQ_MAX 8 | 122 | #define MCFGPIO_IRQ_MAX 8 |
| 122 | #define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE | 123 | #define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE |
| 124 | |||
| 125 | #define MCFGPIO_PAR_QSPI (MCF_IPSBAR + 0x10004A) | ||
| 126 | #define MCFGPIO_PAR_TIMER (MCF_IPSBAR + 0x10004C) | ||
| 123 | #endif | 127 | #endif |
| 124 | 128 | ||
| 125 | #ifdef CONFIG_M5275 | 129 | #ifdef CONFIG_M5275 |
| @@ -212,6 +216,8 @@ | |||
| 212 | #define MCFGPIO_PIN_MAX 148 | 216 | #define MCFGPIO_PIN_MAX 148 |
| 213 | #define MCFGPIO_IRQ_MAX 8 | 217 | #define MCFGPIO_IRQ_MAX 8 |
| 214 | #define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE | 218 | #define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE |
| 219 | |||
| 220 | #define MCFGPIO_PAR_QSPI (MCF_IPSBAR + 0x10007E) | ||
| 215 | #endif | 221 | #endif |
| 216 | 222 | ||
| 217 | /* | 223 | /* |
| @@ -223,6 +229,7 @@ | |||
| 223 | #define MCFEPORT_EPPDR (MCF_IPSBAR + 0x130005) | 229 | #define MCFEPORT_EPPDR (MCF_IPSBAR + 0x130005) |
| 224 | 230 | ||
| 225 | 231 | ||
| 232 | |||
| 226 | /* | 233 | /* |
| 227 | * GPIO pins setups to enable the UARTs. | 234 | * GPIO pins setups to enable the UARTs. |
| 228 | */ | 235 | */ |
diff --git a/arch/m68k/include/asm/m528xsim.h b/arch/m68k/include/asm/m528xsim.h index e2ad1f42b657..891cbedad972 100644 --- a/arch/m68k/include/asm/m528xsim.h +++ b/arch/m68k/include/asm/m528xsim.h | |||
| @@ -29,6 +29,7 @@ | |||
| 29 | 29 | ||
| 30 | #define MCFINT_VECBASE 64 /* Vector base number */ | 30 | #define MCFINT_VECBASE 64 /* Vector base number */ |
| 31 | #define MCFINT_UART0 13 /* Interrupt number for UART0 */ | 31 | #define MCFINT_UART0 13 /* Interrupt number for UART0 */ |
| 32 | #define MCFINT_QSPI 18 /* Interrupt number for QSPI */ | ||
| 32 | #define MCFINT_PIT1 55 /* Interrupt number for PIT1 */ | 33 | #define MCFINT_PIT1 55 /* Interrupt number for PIT1 */ |
| 33 | 34 | ||
| 34 | /* | 35 | /* |
| @@ -249,70 +250,4 @@ | |||
| 249 | #define MCF5282_I2C_I2SR_RXAK (0x01) // received acknowledge | 250 | #define MCF5282_I2C_I2SR_RXAK (0x01) // received acknowledge |
| 250 | 251 | ||
| 251 | 252 | ||
| 252 | |||
| 253 | /********************************************************************* | ||
| 254 | * | ||
| 255 | * Queued Serial Peripheral Interface (QSPI) Module | ||
| 256 | * | ||
| 257 | *********************************************************************/ | ||
| 258 | /* Derek - 21 Feb 2005 */ | ||
| 259 | /* change to the format used in I2C */ | ||
| 260 | /* Read/Write access macros for general use */ | ||
| 261 | #define MCF5282_QSPI_QMR MCF_IPSBAR + 0x0340 | ||
| 262 | #define MCF5282_QSPI_QDLYR MCF_IPSBAR + 0x0344 | ||
| 263 | #define MCF5282_QSPI_QWR MCF_IPSBAR + 0x0348 | ||
| 264 | #define MCF5282_QSPI_QIR MCF_IPSBAR + 0x034C | ||
| 265 | #define MCF5282_QSPI_QAR MCF_IPSBAR + 0x0350 | ||
| 266 | #define MCF5282_QSPI_QDR MCF_IPSBAR + 0x0354 | ||
| 267 | #define MCF5282_QSPI_QCR MCF_IPSBAR + 0x0354 | ||
| 268 | |||
| 269 | /* Bit level definitions and macros */ | ||
| 270 | #define MCF5282_QSPI_QMR_MSTR (0x8000) | ||
| 271 | #define MCF5282_QSPI_QMR_DOHIE (0x4000) | ||
| 272 | #define MCF5282_QSPI_QMR_BITS_16 (0x0000) | ||
| 273 | #define MCF5282_QSPI_QMR_BITS_8 (0x2000) | ||
| 274 | #define MCF5282_QSPI_QMR_BITS_9 (0x2400) | ||
| 275 | #define MCF5282_QSPI_QMR_BITS_10 (0x2800) | ||
| 276 | #define MCF5282_QSPI_QMR_BITS_11 (0x2C00) | ||
| 277 | #define MCF5282_QSPI_QMR_BITS_12 (0x3000) | ||
| 278 | #define MCF5282_QSPI_QMR_BITS_13 (0x3400) | ||
| 279 | #define MCF5282_QSPI_QMR_BITS_14 (0x3800) | ||
| 280 | #define MCF5282_QSPI_QMR_BITS_15 (0x3C00) | ||
| 281 | #define MCF5282_QSPI_QMR_CPOL (0x0200) | ||
| 282 | #define MCF5282_QSPI_QMR_CPHA (0x0100) | ||
| 283 | #define MCF5282_QSPI_QMR_BAUD(x) (((x)&0x00FF)) | ||
| 284 | |||
| 285 | #define MCF5282_QSPI_QDLYR_SPE (0x80) | ||
| 286 | #define MCF5282_QSPI_QDLYR_QCD(x) (((x)&0x007F)<<8) | ||
| 287 | #define MCF5282_QSPI_QDLYR_DTL(x) (((x)&0x00FF)) | ||
| 288 | |||
| 289 | #define MCF5282_QSPI_QWR_HALT (0x8000) | ||
| 290 | #define MCF5282_QSPI_QWR_WREN (0x4000) | ||
| 291 | #define MCF5282_QSPI_QWR_WRTO (0x2000) | ||
| 292 | #define MCF5282_QSPI_QWR_CSIV (0x1000) | ||
| 293 | #define MCF5282_QSPI_QWR_ENDQP(x) (((x)&0x000F)<<8) | ||
| 294 | #define MCF5282_QSPI_QWR_CPTQP(x) (((x)&0x000F)<<4) | ||
| 295 | #define MCF5282_QSPI_QWR_NEWQP(x) (((x)&0x000F)) | ||
| 296 | |||
| 297 | #define MCF5282_QSPI_QIR_WCEFB (0x8000) | ||
| 298 | #define MCF5282_QSPI_QIR_ABRTB (0x4000) | ||
| 299 | #define MCF5282_QSPI_QIR_ABRTL (0x1000) | ||
| 300 | #define MCF5282_QSPI_QIR_WCEFE (0x0800) | ||
| 301 | #define MCF5282_QSPI_QIR_ABRTE (0x0400) | ||
| 302 | #define MCF5282_QSPI_QIR_SPIFE (0x0100) | ||
| 303 | #define MCF5282_QSPI_QIR_WCEF (0x0008) | ||
| 304 | #define MCF5282_QSPI_QIR_ABRT (0x0004) | ||
| 305 | #define MCF5282_QSPI_QIR_SPIF (0x0001) | ||
| 306 | |||
| 307 | #define MCF5282_QSPI_QAR_ADDR(x) (((x)&0x003F)) | ||
| 308 | |||
| 309 | #define MCF5282_QSPI_QDR_COMMAND(x) (((x)&0xFF00)) | ||
| 310 | #define MCF5282_QSPI_QCR_DATA(x) (((x)&0x00FF)<<8) | ||
| 311 | #define MCF5282_QSPI_QCR_CONT (0x8000) | ||
| 312 | #define MCF5282_QSPI_QCR_BITSE (0x4000) | ||
| 313 | #define MCF5282_QSPI_QCR_DT (0x2000) | ||
| 314 | #define MCF5282_QSPI_QCR_DSCK (0x1000) | ||
| 315 | #define MCF5282_QSPI_QCR_CS (((x)&0x000F)<<8) | ||
| 316 | |||
| 317 | /****************************************************************************/ | ||
| 318 | #endif /* m528xsim_h */ | 253 | #endif /* m528xsim_h */ |
diff --git a/arch/m68k/include/asm/m532xsim.h b/arch/m68k/include/asm/m532xsim.h index 36bf15aec9ae..c4bf1c81e3cf 100644 --- a/arch/m68k/include/asm/m532xsim.h +++ b/arch/m68k/include/asm/m532xsim.h | |||
| @@ -17,6 +17,7 @@ | |||
| 17 | #define MCFINT_UART0 26 /* Interrupt number for UART0 */ | 17 | #define MCFINT_UART0 26 /* Interrupt number for UART0 */ |
| 18 | #define MCFINT_UART1 27 /* Interrupt number for UART1 */ | 18 | #define MCFINT_UART1 27 /* Interrupt number for UART1 */ |
| 19 | #define MCFINT_UART2 28 /* Interrupt number for UART2 */ | 19 | #define MCFINT_UART2 28 /* Interrupt number for UART2 */ |
| 20 | #define MCFINT_QSPI 31 /* Interrupt number for QSPI */ | ||
| 20 | 21 | ||
| 21 | #define MCF_WTM_WCR MCF_REG16(0xFC098000) | 22 | #define MCF_WTM_WCR MCF_REG16(0xFC098000) |
| 22 | 23 | ||
diff --git a/arch/m68k/include/asm/mcfqspi.h b/arch/m68k/include/asm/mcfqspi.h new file mode 100644 index 000000000000..39d90d51111d --- /dev/null +++ b/arch/m68k/include/asm/mcfqspi.h | |||
| @@ -0,0 +1,64 @@ | |||
| 1 | /* | ||
| 2 | * Definitions for Freescale Coldfire QSPI module | ||
| 3 | * | ||
| 4 | * Copyright 2010 Steven King <sfking@fdwdc.com> | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 | ||
| 8 | * as published by the Free Software Foundation. | ||
| 9 | * | ||
| 10 | * This program is distributed in the hope that it will be useful, | ||
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 13 | * GNU General Public License for more details. | ||
| 14 | * | ||
| 15 | * You should have received a copy of the GNU General Public License along | ||
| 16 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
| 17 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. | ||
| 18 | * | ||
| 19 | */ | ||
| 20 | |||
| 21 | #ifndef mcfqspi_h | ||
| 22 | #define mcfqspi_h | ||
| 23 | |||
| 24 | #if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) | ||
| 25 | #define MCFQSPI_IOBASE (MCF_IPSBAR + 0x340) | ||
| 26 | #elif defined(CONFIG_M5249) | ||
| 27 | #define MCFQSPI_IOBASE (MCF_MBAR + 0x300) | ||
| 28 | #elif defined(CONFIG_M520x) || defined(CONFIG_M532x) | ||
| 29 | #define MCFQSPI_IOBASE 0xFC058000 | ||
| 30 | #endif | ||
| 31 | #define MCFQSPI_IOSIZE 0x40 | ||
| 32 | |||
| 33 | /** | ||
| 34 | * struct mcfqspi_cs_control - chip select control for the coldfire qspi driver | ||
| 35 | * @setup: setup the control; allocate gpio's, etc. May be NULL. | ||
| 36 | * @teardown: finish with the control; free gpio's, etc. May be NULL. | ||
| 37 | * @select: output the signals to select the device. Can not be NULL. | ||
| 38 | * @deselect: output the signals to deselect the device. Can not be NULL. | ||
| 39 | * | ||
| 40 | * The QSPI module has 4 hardware chip selects. We don't use them. Instead | ||
| 41 | * platforms are required to supply a mcfqspi_cs_control as a part of the | ||
| 42 | * platform data for each QSPI master controller. Only the select and | ||
| 43 | * deselect functions are required. | ||
| 44 | */ | ||
| 45 | struct mcfqspi_cs_control { | ||
| 46 | int (*setup)(struct mcfqspi_cs_control *); | ||
| 47 | void (*teardown)(struct mcfqspi_cs_control *); | ||
| 48 | void (*select)(struct mcfqspi_cs_control *, u8, bool); | ||
| 49 | void (*deselect)(struct mcfqspi_cs_control *, u8, bool); | ||
| 50 | }; | ||
| 51 | |||
| 52 | /** | ||
| 53 | * struct mcfqspi_platform_data - platform data for the coldfire qspi driver | ||
| 54 | * @bus_num: board specific identifier for this qspi driver. | ||
| 55 | * @num_chipselects: number of chip selects supported by this qspi driver. | ||
| 56 | * @cs_control: platform dependent chip select control. | ||
| 57 | */ | ||
| 58 | struct mcfqspi_platform_data { | ||
| 59 | s16 bus_num; | ||
| 60 | u16 num_chipselect; | ||
| 61 | struct mcfqspi_cs_control *cs_control; | ||
| 62 | }; | ||
| 63 | |||
| 64 | #endif /* mcfqspi_h */ | ||
diff --git a/arch/m68k/include/asm/mcfsmc.h b/arch/m68k/include/asm/mcfsmc.h deleted file mode 100644 index 527bea5d6788..000000000000 --- a/arch/m68k/include/asm/mcfsmc.h +++ /dev/null | |||
| @@ -1,187 +0,0 @@ | |||
| 1 | /****************************************************************************/ | ||
| 2 | |||
| 3 | /* | ||
| 4 | * mcfsmc.h -- SMC ethernet support for ColdFire environments. | ||
| 5 | * | ||
| 6 | * (C) Copyright 1999-2002, Greg Ungerer (gerg@snapgear.com) | ||
| 7 | * (C) Copyright 2000, Lineo Inc. (www.lineo.com) | ||
| 8 | */ | ||
| 9 | |||
| 10 | /****************************************************************************/ | ||
| 11 | #ifndef mcfsmc_h | ||
| 12 | #define mcfsmc_h | ||
| 13 | /****************************************************************************/ | ||
| 14 | |||
| 15 | /* | ||
| 16 | * None of the current ColdFire targets that use the SMC91x111 | ||
| 17 | * allow 8 bit accesses. So this code is 16bit access only. | ||
| 18 | */ | ||
| 19 | |||
| 20 | |||
| 21 | #undef outb | ||
| 22 | #undef inb | ||
| 23 | #undef outw | ||
| 24 | #undef outwd | ||
| 25 | #undef inw | ||
| 26 | #undef outl | ||
| 27 | #undef inl | ||
| 28 | |||
| 29 | #undef outsb | ||
| 30 | #undef outsw | ||
| 31 | #undef outsl | ||
| 32 | #undef insb | ||
| 33 | #undef insw | ||
| 34 | #undef insl | ||
| 35 | |||
| 36 | /* | ||
| 37 | * Re-defines for ColdFire environment... The SMC part is | ||
| 38 | * mapped into memory space, so remap the PC-style in/out | ||
| 39 | * routines to handle that. | ||
| 40 | */ | ||
| 41 | #define outb smc_outb | ||
| 42 | #define inb smc_inb | ||
| 43 | #define outw smc_outw | ||
| 44 | #define outwd smc_outwd | ||
| 45 | #define inw smc_inw | ||
| 46 | #define outl smc_outl | ||
| 47 | #define inl smc_inl | ||
| 48 | |||
| 49 | #define outsb smc_outsb | ||
| 50 | #define outsw smc_outsw | ||
| 51 | #define outsl smc_outsl | ||
| 52 | #define insb smc_insb | ||
| 53 | #define insw smc_insw | ||
| 54 | #define insl smc_insl | ||
| 55 | |||
| 56 | |||
| 57 | static inline int smc_inb(unsigned int addr) | ||
| 58 | { | ||
| 59 | register unsigned short w; | ||
| 60 | w = *((volatile unsigned short *) (addr & ~0x1)); | ||
| 61 | return(((addr & 0x1) ? w : (w >> 8)) & 0xff); | ||
| 62 | } | ||
| 63 | |||
| 64 | static inline void smc_outw(unsigned int val, unsigned int addr) | ||
| 65 | { | ||
| 66 | *((volatile unsigned short *) addr) = (val << 8) | (val >> 8); | ||
| 67 | } | ||
| 68 | |||
| 69 | static inline int smc_inw(unsigned int addr) | ||
| 70 | { | ||
| 71 | register unsigned short w; | ||
| 72 | w = *((volatile unsigned short *) addr); | ||
| 73 | return(((w << 8) | (w >> 8)) & 0xffff); | ||
| 74 | } | ||
| 75 | |||
| 76 | static inline void smc_outl(unsigned long val, unsigned int addr) | ||
| 77 | { | ||
| 78 | *((volatile unsigned long *) addr) = | ||
| 79 | ((val << 8) & 0xff000000) | ((val >> 8) & 0x00ff0000) | | ||
| 80 | ((val << 8) & 0x0000ff00) | ((val >> 8) & 0x000000ff); | ||
| 81 | } | ||
| 82 | |||
| 83 | static inline void smc_outwd(unsigned int val, unsigned int addr) | ||
| 84 | { | ||
| 85 | *((volatile unsigned short *) addr) = val; | ||
| 86 | } | ||
| 87 | |||
| 88 | |||
| 89 | /* | ||
| 90 | * The rep* functions are used to feed the data port with | ||
| 91 | * raw data. So we do not byte swap them when copying. | ||
| 92 | */ | ||
| 93 | |||
| 94 | static inline void smc_insb(unsigned int addr, void *vbuf, int unsigned long len) | ||
| 95 | { | ||
| 96 | volatile unsigned short *rp; | ||
| 97 | unsigned short *buf, *ebuf; | ||
| 98 | |||
| 99 | buf = (unsigned short *) vbuf; | ||
| 100 | rp = (volatile unsigned short *) addr; | ||
| 101 | |||
| 102 | /* Copy as words for as long as possible */ | ||
| 103 | for (ebuf = buf + (len >> 1); (buf < ebuf); ) | ||
| 104 | *buf++ = *rp; | ||
| 105 | |||
| 106 | /* Lastly, handle left over byte */ | ||
| 107 | if (len & 0x1) | ||
| 108 | *((unsigned char *) buf) = (*rp >> 8) & 0xff; | ||
| 109 | } | ||
| 110 | |||
| 111 | static inline void smc_insw(unsigned int addr, void *vbuf, unsigned long len) | ||
| 112 | { | ||
| 113 | volatile unsigned short *rp; | ||
| 114 | unsigned short *buf, *ebuf; | ||
| 115 | |||
| 116 | buf = (unsigned short *) vbuf; | ||
| 117 | rp = (volatile unsigned short *) addr; | ||
| 118 | for (ebuf = buf + len; (buf < ebuf); ) | ||
| 119 | *buf++ = *rp; | ||
| 120 | } | ||
| 121 | |||
| 122 | static inline void smc_insl(unsigned int addr, void *vbuf, unsigned long len) | ||
| 123 | { | ||
| 124 | volatile unsigned long *rp; | ||
| 125 | unsigned long *buf, *ebuf; | ||
| 126 | |||
| 127 | buf = (unsigned long *) vbuf; | ||
| 128 | rp = (volatile unsigned long *) addr; | ||
| 129 | for (ebuf = buf + len; (buf < ebuf); ) | ||
| 130 | *buf++ = *rp; | ||
| 131 | } | ||
| 132 | |||
| 133 | static inline void smc_outsw(unsigned int addr, const void *vbuf, unsigned long len) | ||
| 134 | { | ||
| 135 | volatile unsigned short *rp; | ||
| 136 | unsigned short *buf, *ebuf; | ||
| 137 | |||
| 138 | buf = (unsigned short *) vbuf; | ||
| 139 | rp = (volatile unsigned short *) addr; | ||
| 140 | for (ebuf = buf + len; (buf < ebuf); ) | ||
| 141 | *rp = *buf++; | ||
| 142 | } | ||
| 143 | |||
| 144 | static inline void smc_outsl(unsigned int addr, void *vbuf, unsigned long len) | ||
| 145 | { | ||
| 146 | volatile unsigned long *rp; | ||
| 147 | unsigned long *buf, *ebuf; | ||
| 148 | |||
| 149 | buf = (unsigned long *) vbuf; | ||
| 150 | rp = (volatile unsigned long *) addr; | ||
| 151 | for (ebuf = buf + len; (buf < ebuf); ) | ||
| 152 | *rp = *buf++; | ||
| 153 | } | ||
| 154 | |||
| 155 | |||
| 156 | #ifdef CONFIG_NETtel | ||
| 157 | /* | ||
| 158 | * Re-map the address space of at least one of the SMC ethernet | ||
| 159 | * parts. Both parts power up decoding the same address, so we | ||
| 160 | * need to move one of them first, before doing enything else. | ||
| 161 | * | ||
| 162 | * We also increase the number of wait states for this part by one. | ||
| 163 | */ | ||
| 164 | |||
| 165 | void smc_remap(unsigned int ioaddr) | ||
| 166 | { | ||
| 167 | static int once = 0; | ||
| 168 | extern unsigned short ppdata; | ||
| 169 | if (once++ == 0) { | ||
| 170 | *((volatile unsigned short *)MCFSIM_PADDR) = 0x00ec; | ||
| 171 | ppdata |= 0x0080; | ||
| 172 | *((volatile unsigned short *)MCFSIM_PADAT) = ppdata; | ||
| 173 | outw(0x0001, ioaddr + BANK_SELECT); | ||
| 174 | outw(0x0001, ioaddr + BANK_SELECT); | ||
| 175 | outw(0x0067, ioaddr + BASE); | ||
| 176 | |||
| 177 | ppdata &= ~0x0080; | ||
| 178 | *((volatile unsigned short *)MCFSIM_PADAT) = ppdata; | ||
| 179 | } | ||
| 180 | |||
| 181 | *((volatile unsigned short *)(MCF_MBAR+MCFSIM_CSCR3)) = 0x1180; | ||
| 182 | } | ||
| 183 | |||
| 184 | #endif | ||
| 185 | |||
| 186 | /****************************************************************************/ | ||
| 187 | #endif /* mcfsmc_h */ | ||
diff --git a/arch/m68k/include/asm/processor.h b/arch/m68k/include/asm/processor.h index cbd3d4751dd2..7a6a7590cc02 100644 --- a/arch/m68k/include/asm/processor.h +++ b/arch/m68k/include/asm/processor.h | |||
| @@ -44,11 +44,15 @@ static inline void wrusp(unsigned long usp) | |||
| 44 | * User space process size: 3.75GB. This is hardcoded into a few places, | 44 | * User space process size: 3.75GB. This is hardcoded into a few places, |
| 45 | * so don't change it unless you know what you are doing. | 45 | * so don't change it unless you know what you are doing. |
| 46 | */ | 46 | */ |
| 47 | #ifdef CONFIG_MMU | ||
| 47 | #ifndef CONFIG_SUN3 | 48 | #ifndef CONFIG_SUN3 |
| 48 | #define TASK_SIZE (0xF0000000UL) | 49 | #define TASK_SIZE (0xF0000000UL) |
| 49 | #else | 50 | #else |
| 50 | #define TASK_SIZE (0x0E000000UL) | 51 | #define TASK_SIZE (0x0E000000UL) |
| 51 | #endif | 52 | #endif |
| 53 | #else | ||
| 54 | #define TASK_SIZE (0xFFFFFFFFUL) | ||
| 55 | #endif | ||
| 52 | 56 | ||
| 53 | #ifdef __KERNEL__ | 57 | #ifdef __KERNEL__ |
| 54 | #define STACK_TOP TASK_SIZE | 58 | #define STACK_TOP TASK_SIZE |
diff --git a/arch/m68k/include/asm/scatterlist.h b/arch/m68k/include/asm/scatterlist.h index e27ad902b1cf..175da06c6b95 100644 --- a/arch/m68k/include/asm/scatterlist.h +++ b/arch/m68k/include/asm/scatterlist.h | |||
| @@ -1,23 +1,9 @@ | |||
| 1 | #ifndef _M68K_SCATTERLIST_H | 1 | #ifndef _M68K_SCATTERLIST_H |
| 2 | #define _M68K_SCATTERLIST_H | 2 | #define _M68K_SCATTERLIST_H |
| 3 | 3 | ||
| 4 | #include <linux/types.h> | 4 | #include <asm-generic/scatterlist.h> |
| 5 | |||
| 6 | struct scatterlist { | ||
| 7 | #ifdef CONFIG_DEBUG_SG | ||
| 8 | unsigned long sg_magic; | ||
| 9 | #endif | ||
| 10 | unsigned long page_link; | ||
| 11 | unsigned int offset; | ||
| 12 | unsigned int length; | ||
| 13 | |||
| 14 | dma_addr_t dma_address; /* A place to hang host-specific addresses at. */ | ||
| 15 | }; | ||
| 16 | 5 | ||
| 17 | /* This is bogus and should go away. */ | 6 | /* This is bogus and should go away. */ |
| 18 | #define ISA_DMA_THRESHOLD (0x00ffffff) | 7 | #define ISA_DMA_THRESHOLD (0x00ffffff) |
| 19 | 8 | ||
| 20 | #define sg_dma_address(sg) ((sg)->dma_address) | ||
| 21 | #define sg_dma_len(sg) ((sg)->length) | ||
| 22 | |||
| 23 | #endif /* !(_M68K_SCATTERLIST_H) */ | 9 | #endif /* !(_M68K_SCATTERLIST_H) */ |
diff --git a/arch/m68knommu/Kconfig b/arch/m68knommu/Kconfig index 064f5913db1a..efeb6033fc17 100644 --- a/arch/m68knommu/Kconfig +++ b/arch/m68knommu/Kconfig | |||
| @@ -566,7 +566,7 @@ config RAMBASE | |||
| 566 | processor address space. | 566 | processor address space. |
| 567 | 567 | ||
| 568 | config RAMSIZE | 568 | config RAMSIZE |
| 569 | hex "Size of RAM (in bytes)" | 569 | hex "Size of RAM (in bytes), or 0 for automatic" |
| 570 | default "0x400000" | 570 | default "0x400000" |
| 571 | help | 571 | help |
| 572 | Define the size of the system RAM. If you select 0 then the | 572 | Define the size of the system RAM. If you select 0 then the |
diff --git a/arch/m68knommu/kernel/vmlinux.lds.S b/arch/m68knommu/kernel/vmlinux.lds.S index 9f1784f586b9..a91b2713451d 100644 --- a/arch/m68knommu/kernel/vmlinux.lds.S +++ b/arch/m68knommu/kernel/vmlinux.lds.S | |||
| @@ -57,7 +57,7 @@ SECTIONS { | |||
| 57 | .romvec : { | 57 | .romvec : { |
| 58 | __rom_start = . ; | 58 | __rom_start = . ; |
| 59 | _romvec = .; | 59 | _romvec = .; |
| 60 | *(.data.initvect) | 60 | *(.data..initvect) |
| 61 | } > romvec | 61 | } > romvec |
| 62 | #endif | 62 | #endif |
| 63 | 63 | ||
| @@ -68,7 +68,7 @@ SECTIONS { | |||
| 68 | TEXT_TEXT | 68 | TEXT_TEXT |
| 69 | SCHED_TEXT | 69 | SCHED_TEXT |
| 70 | LOCK_TEXT | 70 | LOCK_TEXT |
| 71 | *(.text.lock) | 71 | *(.text..lock) |
| 72 | 72 | ||
| 73 | . = ALIGN(16); /* Exception table */ | 73 | . = ALIGN(16); /* Exception table */ |
| 74 | __start___ex_table = .; | 74 | __start___ex_table = .; |
diff --git a/arch/m68knommu/mm/fault.c b/arch/m68knommu/mm/fault.c index 6f6673cb5829..bc05cf74d9c0 100644 --- a/arch/m68knommu/mm/fault.c +++ b/arch/m68knommu/mm/fault.c | |||
| @@ -2,7 +2,7 @@ | |||
| 2 | * linux/arch/m68knommu/mm/fault.c | 2 | * linux/arch/m68knommu/mm/fault.c |
| 3 | * | 3 | * |
| 4 | * Copyright (C) 1998 D. Jeff Dionne <jeff@lineo.ca>, | 4 | * Copyright (C) 1998 D. Jeff Dionne <jeff@lineo.ca>, |
| 5 | * Copyright (C) 2000 Lineo, Inc. (www.lineo.com) | 5 | * Copyright (C) 2000 Lineo, Inc. (www.lineo.com) |
| 6 | * | 6 | * |
| 7 | * Based on: | 7 | * Based on: |
| 8 | * | 8 | * |
| @@ -36,7 +36,7 @@ asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address, | |||
| 36 | unsigned long error_code) | 36 | unsigned long error_code) |
| 37 | { | 37 | { |
| 38 | #ifdef DEBUG | 38 | #ifdef DEBUG |
| 39 | printk (KERN_DEBUG "regs->sr=%#x, regs->pc=%#lx, address=%#lx, %ld\n", | 39 | printk(KERN_DEBUG "regs->sr=%#x, regs->pc=%#lx, address=%#lx, %ld\n", |
| 40 | regs->sr, regs->pc, address, error_code); | 40 | regs->sr, regs->pc, address, error_code); |
| 41 | #endif | 41 | #endif |
| 42 | 42 | ||
| @@ -44,11 +44,11 @@ asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address, | |||
| 44 | * Oops. The kernel tried to access some bad page. We'll have to | 44 | * Oops. The kernel tried to access some bad page. We'll have to |
| 45 | * terminate things with extreme prejudice. | 45 | * terminate things with extreme prejudice. |
| 46 | */ | 46 | */ |
| 47 | if ((unsigned long) address < PAGE_SIZE) { | 47 | if ((unsigned long) address < PAGE_SIZE) |
| 48 | printk(KERN_ALERT "Unable to handle kernel NULL pointer dereference"); | 48 | printk(KERN_ALERT "Unable to handle kernel NULL pointer dereference"); |
| 49 | } else | 49 | else |
| 50 | printk(KERN_ALERT "Unable to handle kernel access"); | 50 | printk(KERN_ALERT "Unable to handle kernel access"); |
| 51 | printk(KERN_ALERT " at virtual address %08lx\n",address); | 51 | printk(KERN_ALERT " at virtual address %08lx\n", address); |
| 52 | die_if_kernel("Oops", regs, error_code); | 52 | die_if_kernel("Oops", regs, error_code); |
| 53 | do_exit(SIGKILL); | 53 | do_exit(SIGKILL); |
| 54 | 54 | ||
diff --git a/arch/m68knommu/platform/520x/config.c b/arch/m68knommu/platform/520x/config.c index 92614de42cd3..71d2ba474c63 100644 --- a/arch/m68knommu/platform/520x/config.c +++ b/arch/m68knommu/platform/520x/config.c | |||
| @@ -15,10 +15,13 @@ | |||
| 15 | #include <linux/param.h> | 15 | #include <linux/param.h> |
| 16 | #include <linux/init.h> | 16 | #include <linux/init.h> |
| 17 | #include <linux/io.h> | 17 | #include <linux/io.h> |
| 18 | #include <linux/spi/spi.h> | ||
| 19 | #include <linux/gpio.h> | ||
| 18 | #include <asm/machdep.h> | 20 | #include <asm/machdep.h> |
| 19 | #include <asm/coldfire.h> | 21 | #include <asm/coldfire.h> |
| 20 | #include <asm/mcfsim.h> | 22 | #include <asm/mcfsim.h> |
| 21 | #include <asm/mcfuart.h> | 23 | #include <asm/mcfuart.h> |
| 24 | #include <asm/mcfqspi.h> | ||
| 22 | 25 | ||
| 23 | /***************************************************************************/ | 26 | /***************************************************************************/ |
| 24 | 27 | ||
| @@ -74,9 +77,152 @@ static struct platform_device m520x_fec = { | |||
| 74 | .resource = m520x_fec_resources, | 77 | .resource = m520x_fec_resources, |
| 75 | }; | 78 | }; |
| 76 | 79 | ||
| 80 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) | ||
| 81 | static struct resource m520x_qspi_resources[] = { | ||
| 82 | { | ||
| 83 | .start = MCFQSPI_IOBASE, | ||
| 84 | .end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1, | ||
| 85 | .flags = IORESOURCE_MEM, | ||
| 86 | }, | ||
| 87 | { | ||
| 88 | .start = MCFINT_VECBASE + MCFINT_QSPI, | ||
| 89 | .end = MCFINT_VECBASE + MCFINT_QSPI, | ||
| 90 | .flags = IORESOURCE_IRQ, | ||
| 91 | }, | ||
| 92 | }; | ||
| 93 | |||
| 94 | #define MCFQSPI_CS0 62 | ||
| 95 | #define MCFQSPI_CS1 63 | ||
| 96 | #define MCFQSPI_CS2 44 | ||
| 97 | |||
| 98 | static int m520x_cs_setup(struct mcfqspi_cs_control *cs_control) | ||
| 99 | { | ||
| 100 | int status; | ||
| 101 | |||
| 102 | status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0"); | ||
| 103 | if (status) { | ||
| 104 | pr_debug("gpio_request for MCFQSPI_CS0 failed\n"); | ||
| 105 | goto fail0; | ||
| 106 | } | ||
| 107 | status = gpio_direction_output(MCFQSPI_CS0, 1); | ||
| 108 | if (status) { | ||
| 109 | pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n"); | ||
| 110 | goto fail1; | ||
| 111 | } | ||
| 112 | |||
| 113 | status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1"); | ||
| 114 | if (status) { | ||
| 115 | pr_debug("gpio_request for MCFQSPI_CS1 failed\n"); | ||
| 116 | goto fail1; | ||
| 117 | } | ||
| 118 | status = gpio_direction_output(MCFQSPI_CS1, 1); | ||
| 119 | if (status) { | ||
| 120 | pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n"); | ||
| 121 | goto fail2; | ||
| 122 | } | ||
| 123 | |||
| 124 | status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2"); | ||
| 125 | if (status) { | ||
| 126 | pr_debug("gpio_request for MCFQSPI_CS2 failed\n"); | ||
| 127 | goto fail2; | ||
| 128 | } | ||
| 129 | status = gpio_direction_output(MCFQSPI_CS2, 1); | ||
| 130 | if (status) { | ||
| 131 | pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n"); | ||
| 132 | goto fail3; | ||
| 133 | } | ||
| 134 | |||
| 135 | return 0; | ||
| 136 | |||
| 137 | fail3: | ||
| 138 | gpio_free(MCFQSPI_CS2); | ||
| 139 | fail2: | ||
| 140 | gpio_free(MCFQSPI_CS1); | ||
| 141 | fail1: | ||
| 142 | gpio_free(MCFQSPI_CS0); | ||
| 143 | fail0: | ||
| 144 | return status; | ||
| 145 | } | ||
| 146 | |||
| 147 | static void m520x_cs_teardown(struct mcfqspi_cs_control *cs_control) | ||
| 148 | { | ||
| 149 | gpio_free(MCFQSPI_CS2); | ||
| 150 | gpio_free(MCFQSPI_CS1); | ||
| 151 | gpio_free(MCFQSPI_CS0); | ||
| 152 | } | ||
| 153 | |||
| 154 | static void m520x_cs_select(struct mcfqspi_cs_control *cs_control, | ||
| 155 | u8 chip_select, bool cs_high) | ||
| 156 | { | ||
| 157 | switch (chip_select) { | ||
| 158 | case 0: | ||
| 159 | gpio_set_value(MCFQSPI_CS0, cs_high); | ||
| 160 | break; | ||
| 161 | case 1: | ||
| 162 | gpio_set_value(MCFQSPI_CS1, cs_high); | ||
| 163 | break; | ||
| 164 | case 2: | ||
| 165 | gpio_set_value(MCFQSPI_CS2, cs_high); | ||
| 166 | break; | ||
| 167 | } | ||
| 168 | } | ||
| 169 | |||
| 170 | static void m520x_cs_deselect(struct mcfqspi_cs_control *cs_control, | ||
| 171 | u8 chip_select, bool cs_high) | ||
| 172 | { | ||
| 173 | switch (chip_select) { | ||
| 174 | case 0: | ||
| 175 | gpio_set_value(MCFQSPI_CS0, !cs_high); | ||
| 176 | break; | ||
| 177 | case 1: | ||
| 178 | gpio_set_value(MCFQSPI_CS1, !cs_high); | ||
| 179 | break; | ||
| 180 | case 2: | ||
| 181 | gpio_set_value(MCFQSPI_CS2, !cs_high); | ||
| 182 | break; | ||
| 183 | } | ||
| 184 | } | ||
| 185 | |||
| 186 | static struct mcfqspi_cs_control m520x_cs_control = { | ||
| 187 | .setup = m520x_cs_setup, | ||
| 188 | .teardown = m520x_cs_teardown, | ||
| 189 | .select = m520x_cs_select, | ||
| 190 | .deselect = m520x_cs_deselect, | ||
| 191 | }; | ||
| 192 | |||
| 193 | static struct mcfqspi_platform_data m520x_qspi_data = { | ||
| 194 | .bus_num = 0, | ||
| 195 | .num_chipselect = 3, | ||
| 196 | .cs_control = &m520x_cs_control, | ||
| 197 | }; | ||
| 198 | |||
| 199 | static struct platform_device m520x_qspi = { | ||
| 200 | .name = "mcfqspi", | ||
| 201 | .id = 0, | ||
| 202 | .num_resources = ARRAY_SIZE(m520x_qspi_resources), | ||
| 203 | .resource = m520x_qspi_resources, | ||
| 204 | .dev.platform_data = &m520x_qspi_data, | ||
| 205 | }; | ||
| 206 | |||
| 207 | static void __init m520x_qspi_init(void) | ||
| 208 | { | ||
| 209 | u16 par; | ||
| 210 | /* setup Port QS for QSPI with gpio CS control */ | ||
| 211 | writeb(0x3f, MCF_IPSBAR + MCF_GPIO_PAR_QSPI); | ||
| 212 | /* make U1CTS and U2RTS gpio for cs_control */ | ||
| 213 | par = readw(MCF_IPSBAR + MCF_GPIO_PAR_UART); | ||
| 214 | par &= 0x00ff; | ||
| 215 | writew(par, MCF_IPSBAR + MCF_GPIO_PAR_UART); | ||
| 216 | } | ||
| 217 | #endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */ | ||
| 218 | |||
| 219 | |||
| 77 | static struct platform_device *m520x_devices[] __initdata = { | 220 | static struct platform_device *m520x_devices[] __initdata = { |
| 78 | &m520x_uart, | 221 | &m520x_uart, |
| 79 | &m520x_fec, | 222 | &m520x_fec, |
| 223 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) | ||
| 224 | &m520x_qspi, | ||
| 225 | #endif | ||
| 80 | }; | 226 | }; |
| 81 | 227 | ||
| 82 | /***************************************************************************/ | 228 | /***************************************************************************/ |
| @@ -147,6 +293,9 @@ void __init config_BSP(char *commandp, int size) | |||
| 147 | mach_reset = m520x_cpu_reset; | 293 | mach_reset = m520x_cpu_reset; |
| 148 | m520x_uarts_init(); | 294 | m520x_uarts_init(); |
| 149 | m520x_fec_init(); | 295 | m520x_fec_init(); |
| 296 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) | ||
| 297 | m520x_qspi_init(); | ||
| 298 | #endif | ||
| 150 | } | 299 | } |
| 151 | 300 | ||
| 152 | /***************************************************************************/ | 301 | /***************************************************************************/ |
diff --git a/arch/m68knommu/platform/523x/config.c b/arch/m68knommu/platform/523x/config.c index 6ba84f2aa397..8980f6d7715a 100644 --- a/arch/m68knommu/platform/523x/config.c +++ b/arch/m68knommu/platform/523x/config.c | |||
| @@ -16,10 +16,13 @@ | |||
| 16 | #include <linux/param.h> | 16 | #include <linux/param.h> |
| 17 | #include <linux/init.h> | 17 | #include <linux/init.h> |
| 18 | #include <linux/io.h> | 18 | #include <linux/io.h> |
| 19 | #include <linux/spi/spi.h> | ||
| 20 | #include <linux/gpio.h> | ||
| 19 | #include <asm/machdep.h> | 21 | #include <asm/machdep.h> |
| 20 | #include <asm/coldfire.h> | 22 | #include <asm/coldfire.h> |
| 21 | #include <asm/mcfsim.h> | 23 | #include <asm/mcfsim.h> |
| 22 | #include <asm/mcfuart.h> | 24 | #include <asm/mcfuart.h> |
| 25 | #include <asm/mcfqspi.h> | ||
| 23 | 26 | ||
| 24 | /***************************************************************************/ | 27 | /***************************************************************************/ |
| 25 | 28 | ||
| @@ -75,9 +78,173 @@ static struct platform_device m523x_fec = { | |||
| 75 | .resource = m523x_fec_resources, | 78 | .resource = m523x_fec_resources, |
| 76 | }; | 79 | }; |
| 77 | 80 | ||
| 81 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) | ||
| 82 | static struct resource m523x_qspi_resources[] = { | ||
| 83 | { | ||
| 84 | .start = MCFQSPI_IOBASE, | ||
| 85 | .end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1, | ||
| 86 | .flags = IORESOURCE_MEM, | ||
| 87 | }, | ||
| 88 | { | ||
| 89 | .start = MCFINT_VECBASE + MCFINT_QSPI, | ||
| 90 | .end = MCFINT_VECBASE + MCFINT_QSPI, | ||
| 91 | .flags = IORESOURCE_IRQ, | ||
| 92 | }, | ||
| 93 | }; | ||
| 94 | |||
| 95 | #define MCFQSPI_CS0 91 | ||
| 96 | #define MCFQSPI_CS1 92 | ||
| 97 | #define MCFQSPI_CS2 103 | ||
| 98 | #define MCFQSPI_CS3 99 | ||
| 99 | |||
| 100 | static int m523x_cs_setup(struct mcfqspi_cs_control *cs_control) | ||
| 101 | { | ||
| 102 | int status; | ||
| 103 | |||
| 104 | status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0"); | ||
| 105 | if (status) { | ||
| 106 | pr_debug("gpio_request for MCFQSPI_CS0 failed\n"); | ||
| 107 | goto fail0; | ||
| 108 | } | ||
| 109 | status = gpio_direction_output(MCFQSPI_CS0, 1); | ||
| 110 | if (status) { | ||
| 111 | pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n"); | ||
| 112 | goto fail1; | ||
| 113 | } | ||
| 114 | |||
| 115 | status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1"); | ||
| 116 | if (status) { | ||
| 117 | pr_debug("gpio_request for MCFQSPI_CS1 failed\n"); | ||
| 118 | goto fail1; | ||
| 119 | } | ||
| 120 | status = gpio_direction_output(MCFQSPI_CS1, 1); | ||
| 121 | if (status) { | ||
| 122 | pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n"); | ||
| 123 | goto fail2; | ||
| 124 | } | ||
| 125 | |||
| 126 | status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2"); | ||
| 127 | if (status) { | ||
| 128 | pr_debug("gpio_request for MCFQSPI_CS2 failed\n"); | ||
| 129 | goto fail2; | ||
| 130 | } | ||
| 131 | status = gpio_direction_output(MCFQSPI_CS2, 1); | ||
| 132 | if (status) { | ||
| 133 | pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n"); | ||
| 134 | goto fail3; | ||
| 135 | } | ||
| 136 | |||
| 137 | status = gpio_request(MCFQSPI_CS3, "MCFQSPI_CS3"); | ||
| 138 | if (status) { | ||
| 139 | pr_debug("gpio_request for MCFQSPI_CS3 failed\n"); | ||
| 140 | goto fail3; | ||
| 141 | } | ||
| 142 | status = gpio_direction_output(MCFQSPI_CS3, 1); | ||
| 143 | if (status) { | ||
| 144 | pr_debug("gpio_direction_output for MCFQSPI_CS3 failed\n"); | ||
| 145 | goto fail4; | ||
| 146 | } | ||
| 147 | |||
| 148 | return 0; | ||
| 149 | |||
| 150 | fail4: | ||
| 151 | gpio_free(MCFQSPI_CS3); | ||
| 152 | fail3: | ||
| 153 | gpio_free(MCFQSPI_CS2); | ||
| 154 | fail2: | ||
| 155 | gpio_free(MCFQSPI_CS1); | ||
| 156 | fail1: | ||
| 157 | gpio_free(MCFQSPI_CS0); | ||
| 158 | fail0: | ||
| 159 | return status; | ||
| 160 | } | ||
| 161 | |||
| 162 | static void m523x_cs_teardown(struct mcfqspi_cs_control *cs_control) | ||
| 163 | { | ||
| 164 | gpio_free(MCFQSPI_CS3); | ||
| 165 | gpio_free(MCFQSPI_CS2); | ||
| 166 | gpio_free(MCFQSPI_CS1); | ||
| 167 | gpio_free(MCFQSPI_CS0); | ||
| 168 | } | ||
| 169 | |||
| 170 | static void m523x_cs_select(struct mcfqspi_cs_control *cs_control, | ||
| 171 | u8 chip_select, bool cs_high) | ||
| 172 | { | ||
| 173 | switch (chip_select) { | ||
| 174 | case 0: | ||
| 175 | gpio_set_value(MCFQSPI_CS0, cs_high); | ||
| 176 | break; | ||
| 177 | case 1: | ||
| 178 | gpio_set_value(MCFQSPI_CS1, cs_high); | ||
| 179 | break; | ||
| 180 | case 2: | ||
| 181 | gpio_set_value(MCFQSPI_CS2, cs_high); | ||
| 182 | break; | ||
| 183 | case 3: | ||
| 184 | gpio_set_value(MCFQSPI_CS3, cs_high); | ||
| 185 | break; | ||
| 186 | } | ||
| 187 | } | ||
| 188 | |||
| 189 | static void m523x_cs_deselect(struct mcfqspi_cs_control *cs_control, | ||
| 190 | u8 chip_select, bool cs_high) | ||
| 191 | { | ||
| 192 | switch (chip_select) { | ||
| 193 | case 0: | ||
| 194 | gpio_set_value(MCFQSPI_CS0, !cs_high); | ||
| 195 | break; | ||
| 196 | case 1: | ||
| 197 | gpio_set_value(MCFQSPI_CS1, !cs_high); | ||
| 198 | break; | ||
| 199 | case 2: | ||
| 200 | gpio_set_value(MCFQSPI_CS2, !cs_high); | ||
| 201 | break; | ||
| 202 | case 3: | ||
| 203 | gpio_set_value(MCFQSPI_CS3, !cs_high); | ||
| 204 | break; | ||
| 205 | } | ||
| 206 | } | ||
| 207 | |||
| 208 | static struct mcfqspi_cs_control m523x_cs_control = { | ||
| 209 | .setup = m523x_cs_setup, | ||
| 210 | .teardown = m523x_cs_teardown, | ||
| 211 | .select = m523x_cs_select, | ||
| 212 | .deselect = m523x_cs_deselect, | ||
| 213 | }; | ||
| 214 | |||
| 215 | static struct mcfqspi_platform_data m523x_qspi_data = { | ||
| 216 | .bus_num = 0, | ||
| 217 | .num_chipselect = 4, | ||
| 218 | .cs_control = &m523x_cs_control, | ||
| 219 | }; | ||
| 220 | |||
| 221 | static struct platform_device m523x_qspi = { | ||
| 222 | .name = "mcfqspi", | ||
| 223 | .id = 0, | ||
| 224 | .num_resources = ARRAY_SIZE(m523x_qspi_resources), | ||
| 225 | .resource = m523x_qspi_resources, | ||
| 226 | .dev.platform_data = &m523x_qspi_data, | ||
| 227 | }; | ||
| 228 | |||
| 229 | static void __init m523x_qspi_init(void) | ||
| 230 | { | ||
| 231 | u16 par; | ||
| 232 | |||
| 233 | /* setup QSPS pins for QSPI with gpio CS control */ | ||
| 234 | writeb(0x1f, MCFGPIO_PAR_QSPI); | ||
| 235 | /* and CS2 & CS3 as gpio */ | ||
| 236 | par = readw(MCFGPIO_PAR_TIMER); | ||
| 237 | par &= 0x3f3f; | ||
| 238 | writew(par, MCFGPIO_PAR_TIMER); | ||
| 239 | } | ||
| 240 | #endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */ | ||
| 241 | |||
| 78 | static struct platform_device *m523x_devices[] __initdata = { | 242 | static struct platform_device *m523x_devices[] __initdata = { |
| 79 | &m523x_uart, | 243 | &m523x_uart, |
| 80 | &m523x_fec, | 244 | &m523x_fec, |
| 245 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) | ||
| 246 | &m523x_qspi, | ||
| 247 | #endif | ||
| 81 | }; | 248 | }; |
| 82 | 249 | ||
| 83 | /***************************************************************************/ | 250 | /***************************************************************************/ |
| @@ -114,6 +281,9 @@ void __init config_BSP(char *commandp, int size) | |||
| 114 | static int __init init_BSP(void) | 281 | static int __init init_BSP(void) |
| 115 | { | 282 | { |
| 116 | m523x_fec_init(); | 283 | m523x_fec_init(); |
| 284 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) | ||
| 285 | m523x_qspi_init(); | ||
| 286 | #endif | ||
| 117 | platform_add_devices(m523x_devices, ARRAY_SIZE(m523x_devices)); | 287 | platform_add_devices(m523x_devices, ARRAY_SIZE(m523x_devices)); |
| 118 | return 0; | 288 | return 0; |
| 119 | } | 289 | } |
diff --git a/arch/m68knommu/platform/5249/config.c b/arch/m68knommu/platform/5249/config.c index 646f5ba462fc..ceb31e5744a6 100644 --- a/arch/m68knommu/platform/5249/config.c +++ b/arch/m68knommu/platform/5249/config.c | |||
| @@ -12,10 +12,13 @@ | |||
| 12 | #include <linux/param.h> | 12 | #include <linux/param.h> |
| 13 | #include <linux/init.h> | 13 | #include <linux/init.h> |
| 14 | #include <linux/io.h> | 14 | #include <linux/io.h> |
| 15 | #include <linux/spi/spi.h> | ||
| 16 | #include <linux/gpio.h> | ||
| 15 | #include <asm/machdep.h> | 17 | #include <asm/machdep.h> |
| 16 | #include <asm/coldfire.h> | 18 | #include <asm/coldfire.h> |
| 17 | #include <asm/mcfsim.h> | 19 | #include <asm/mcfsim.h> |
| 18 | #include <asm/mcfuart.h> | 20 | #include <asm/mcfuart.h> |
| 21 | #include <asm/mcfqspi.h> | ||
| 19 | 22 | ||
| 20 | /***************************************************************************/ | 23 | /***************************************************************************/ |
| 21 | 24 | ||
| @@ -37,8 +40,196 @@ static struct platform_device m5249_uart = { | |||
| 37 | .dev.platform_data = m5249_uart_platform, | 40 | .dev.platform_data = m5249_uart_platform, |
| 38 | }; | 41 | }; |
| 39 | 42 | ||
| 43 | #ifdef CONFIG_M5249C3 | ||
| 44 | |||
| 45 | static struct resource m5249_smc91x_resources[] = { | ||
| 46 | { | ||
| 47 | .start = 0xe0000300, | ||
| 48 | .end = 0xe0000300 + 0x100, | ||
| 49 | .flags = IORESOURCE_MEM, | ||
| 50 | }, | ||
| 51 | { | ||
| 52 | .start = MCFINTC2_GPIOIRQ6, | ||
| 53 | .end = MCFINTC2_GPIOIRQ6, | ||
| 54 | .flags = IORESOURCE_IRQ, | ||
| 55 | }, | ||
| 56 | }; | ||
| 57 | |||
| 58 | static struct platform_device m5249_smc91x = { | ||
| 59 | .name = "smc91x", | ||
| 60 | .id = 0, | ||
| 61 | .num_resources = ARRAY_SIZE(m5249_smc91x_resources), | ||
| 62 | .resource = m5249_smc91x_resources, | ||
| 63 | }; | ||
| 64 | |||
| 65 | #endif /* CONFIG_M5249C3 */ | ||
| 66 | |||
| 67 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) | ||
| 68 | static struct resource m5249_qspi_resources[] = { | ||
| 69 | { | ||
| 70 | .start = MCFQSPI_IOBASE, | ||
| 71 | .end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1, | ||
| 72 | .flags = IORESOURCE_MEM, | ||
| 73 | }, | ||
| 74 | { | ||
| 75 | .start = MCF_IRQ_QSPI, | ||
| 76 | .end = MCF_IRQ_QSPI, | ||
| 77 | .flags = IORESOURCE_IRQ, | ||
| 78 | }, | ||
| 79 | }; | ||
| 80 | |||
| 81 | #define MCFQSPI_CS0 29 | ||
| 82 | #define MCFQSPI_CS1 24 | ||
| 83 | #define MCFQSPI_CS2 21 | ||
| 84 | #define MCFQSPI_CS3 22 | ||
| 85 | |||
| 86 | static int m5249_cs_setup(struct mcfqspi_cs_control *cs_control) | ||
| 87 | { | ||
| 88 | int status; | ||
| 89 | |||
| 90 | status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0"); | ||
| 91 | if (status) { | ||
| 92 | pr_debug("gpio_request for MCFQSPI_CS0 failed\n"); | ||
| 93 | goto fail0; | ||
| 94 | } | ||
| 95 | status = gpio_direction_output(MCFQSPI_CS0, 1); | ||
| 96 | if (status) { | ||
| 97 | pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n"); | ||
| 98 | goto fail1; | ||
| 99 | } | ||
| 100 | |||
| 101 | status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1"); | ||
| 102 | if (status) { | ||
| 103 | pr_debug("gpio_request for MCFQSPI_CS1 failed\n"); | ||
| 104 | goto fail1; | ||
| 105 | } | ||
| 106 | status = gpio_direction_output(MCFQSPI_CS1, 1); | ||
| 107 | if (status) { | ||
| 108 | pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n"); | ||
| 109 | goto fail2; | ||
| 110 | } | ||
| 111 | |||
| 112 | status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2"); | ||
| 113 | if (status) { | ||
| 114 | pr_debug("gpio_request for MCFQSPI_CS2 failed\n"); | ||
| 115 | goto fail2; | ||
| 116 | } | ||
| 117 | status = gpio_direction_output(MCFQSPI_CS2, 1); | ||
| 118 | if (status) { | ||
| 119 | pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n"); | ||
| 120 | goto fail3; | ||
| 121 | } | ||
| 122 | |||
| 123 | status = gpio_request(MCFQSPI_CS3, "MCFQSPI_CS3"); | ||
| 124 | if (status) { | ||
| 125 | pr_debug("gpio_request for MCFQSPI_CS3 failed\n"); | ||
| 126 | goto fail3; | ||
| 127 | } | ||
| 128 | status = gpio_direction_output(MCFQSPI_CS3, 1); | ||
| 129 | if (status) { | ||
| 130 | pr_debug("gpio_direction_output for MCFQSPI_CS3 failed\n"); | ||
| 131 | goto fail4; | ||
| 132 | } | ||
| 133 | |||
| 134 | return 0; | ||
| 135 | |||
| 136 | fail4: | ||
| 137 | gpio_free(MCFQSPI_CS3); | ||
| 138 | fail3: | ||
| 139 | gpio_free(MCFQSPI_CS2); | ||
| 140 | fail2: | ||
| 141 | gpio_free(MCFQSPI_CS1); | ||
| 142 | fail1: | ||
| 143 | gpio_free(MCFQSPI_CS0); | ||
| 144 | fail0: | ||
| 145 | return status; | ||
| 146 | } | ||
| 147 | |||
| 148 | static void m5249_cs_teardown(struct mcfqspi_cs_control *cs_control) | ||
| 149 | { | ||
| 150 | gpio_free(MCFQSPI_CS3); | ||
| 151 | gpio_free(MCFQSPI_CS2); | ||
| 152 | gpio_free(MCFQSPI_CS1); | ||
| 153 | gpio_free(MCFQSPI_CS0); | ||
| 154 | } | ||
| 155 | |||
| 156 | static void m5249_cs_select(struct mcfqspi_cs_control *cs_control, | ||
| 157 | u8 chip_select, bool cs_high) | ||
| 158 | { | ||
| 159 | switch (chip_select) { | ||
| 160 | case 0: | ||
| 161 | gpio_set_value(MCFQSPI_CS0, cs_high); | ||
| 162 | break; | ||
| 163 | case 1: | ||
| 164 | gpio_set_value(MCFQSPI_CS1, cs_high); | ||
| 165 | break; | ||
| 166 | case 2: | ||
| 167 | gpio_set_value(MCFQSPI_CS2, cs_high); | ||
| 168 | break; | ||
| 169 | case 3: | ||
| 170 | gpio_set_value(MCFQSPI_CS3, cs_high); | ||
| 171 | break; | ||
| 172 | } | ||
| 173 | } | ||
| 174 | |||
| 175 | static void m5249_cs_deselect(struct mcfqspi_cs_control *cs_control, | ||
| 176 | u8 chip_select, bool cs_high) | ||
| 177 | { | ||
| 178 | switch (chip_select) { | ||
| 179 | case 0: | ||
| 180 | gpio_set_value(MCFQSPI_CS0, !cs_high); | ||
| 181 | break; | ||
| 182 | case 1: | ||
| 183 | gpio_set_value(MCFQSPI_CS1, !cs_high); | ||
| 184 | break; | ||
| 185 | case 2: | ||
| 186 | gpio_set_value(MCFQSPI_CS2, !cs_high); | ||
| 187 | break; | ||
| 188 | case 3: | ||
| 189 | gpio_set_value(MCFQSPI_CS3, !cs_high); | ||
| 190 | break; | ||
| 191 | } | ||
| 192 | } | ||
| 193 | |||
| 194 | static struct mcfqspi_cs_control m5249_cs_control = { | ||
| 195 | .setup = m5249_cs_setup, | ||
| 196 | .teardown = m5249_cs_teardown, | ||
| 197 | .select = m5249_cs_select, | ||
| 198 | .deselect = m5249_cs_deselect, | ||
| 199 | }; | ||
| 200 | |||
| 201 | static struct mcfqspi_platform_data m5249_qspi_data = { | ||
| 202 | .bus_num = 0, | ||
| 203 | .num_chipselect = 4, | ||
| 204 | .cs_control = &m5249_cs_control, | ||
| 205 | }; | ||
| 206 | |||
| 207 | static struct platform_device m5249_qspi = { | ||
| 208 | .name = "mcfqspi", | ||
| 209 | .id = 0, | ||
| 210 | .num_resources = ARRAY_SIZE(m5249_qspi_resources), | ||
| 211 | .resource = m5249_qspi_resources, | ||
| 212 | .dev.platform_data = &m5249_qspi_data, | ||
| 213 | }; | ||
| 214 | |||
| 215 | static void __init m5249_qspi_init(void) | ||
| 216 | { | ||
| 217 | /* QSPI irq setup */ | ||
| 218 | writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL4 | MCFSIM_ICR_PRI0, | ||
| 219 | MCF_MBAR + MCFSIM_QSPIICR); | ||
| 220 | mcf_mapirq2imr(MCF_IRQ_QSPI, MCFINTC_QSPI); | ||
| 221 | } | ||
| 222 | #endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */ | ||
| 223 | |||
| 224 | |||
| 40 | static struct platform_device *m5249_devices[] __initdata = { | 225 | static struct platform_device *m5249_devices[] __initdata = { |
| 41 | &m5249_uart, | 226 | &m5249_uart, |
| 227 | #ifdef CONFIG_M5249C3 | ||
| 228 | &m5249_smc91x, | ||
| 229 | #endif | ||
| 230 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) | ||
| 231 | &m5249_qspi, | ||
| 232 | #endif | ||
| 42 | }; | 233 | }; |
| 43 | 234 | ||
| 44 | /***************************************************************************/ | 235 | /***************************************************************************/ |
| @@ -67,6 +258,24 @@ static void __init m5249_uarts_init(void) | |||
| 67 | 258 | ||
| 68 | /***************************************************************************/ | 259 | /***************************************************************************/ |
| 69 | 260 | ||
| 261 | #ifdef CONFIG_M5249C3 | ||
| 262 | |||
| 263 | static void __init m5249_smc91x_init(void) | ||
| 264 | { | ||
| 265 | u32 gpio; | ||
| 266 | |||
| 267 | /* Set the GPIO line as interrupt source for smc91x device */ | ||
| 268 | gpio = readl(MCF_MBAR2 + MCFSIM2_GPIOINTENABLE); | ||
| 269 | writel(gpio | 0x40, MCF_MBAR2 + MCFSIM2_GPIOINTENABLE); | ||
| 270 | |||
| 271 | gpio = readl(MCF_MBAR2 + MCFSIM2_INTLEVEL5); | ||
| 272 | writel(gpio | 0x04000000, MCF_MBAR2 + MCFSIM2_INTLEVEL5); | ||
| 273 | } | ||
| 274 | |||
| 275 | #endif /* CONFIG_M5249C3 */ | ||
| 276 | |||
| 277 | /***************************************************************************/ | ||
| 278 | |||
| 70 | static void __init m5249_timers_init(void) | 279 | static void __init m5249_timers_init(void) |
| 71 | { | 280 | { |
| 72 | /* Timer1 is always used as system timer */ | 281 | /* Timer1 is always used as system timer */ |
| @@ -100,6 +309,12 @@ void __init config_BSP(char *commandp, int size) | |||
| 100 | mach_reset = m5249_cpu_reset; | 309 | mach_reset = m5249_cpu_reset; |
| 101 | m5249_timers_init(); | 310 | m5249_timers_init(); |
| 102 | m5249_uarts_init(); | 311 | m5249_uarts_init(); |
| 312 | #ifdef CONFIG_M5249C3 | ||
| 313 | m5249_smc91x_init(); | ||
| 314 | #endif | ||
| 315 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) | ||
| 316 | m5249_qspi_init(); | ||
| 317 | #endif | ||
| 103 | } | 318 | } |
| 104 | 319 | ||
| 105 | /***************************************************************************/ | 320 | /***************************************************************************/ |
diff --git a/arch/m68knommu/platform/527x/config.c b/arch/m68knommu/platform/527x/config.c index fa51be172830..3d9c35c98b98 100644 --- a/arch/m68knommu/platform/527x/config.c +++ b/arch/m68knommu/platform/527x/config.c | |||
| @@ -16,10 +16,13 @@ | |||
| 16 | #include <linux/param.h> | 16 | #include <linux/param.h> |
| 17 | #include <linux/init.h> | 17 | #include <linux/init.h> |
| 18 | #include <linux/io.h> | 18 | #include <linux/io.h> |
| 19 | #include <linux/spi/spi.h> | ||
| 20 | #include <linux/gpio.h> | ||
| 19 | #include <asm/machdep.h> | 21 | #include <asm/machdep.h> |
| 20 | #include <asm/coldfire.h> | 22 | #include <asm/coldfire.h> |
| 21 | #include <asm/mcfsim.h> | 23 | #include <asm/mcfsim.h> |
| 22 | #include <asm/mcfuart.h> | 24 | #include <asm/mcfuart.h> |
| 25 | #include <asm/mcfqspi.h> | ||
| 23 | 26 | ||
| 24 | /***************************************************************************/ | 27 | /***************************************************************************/ |
| 25 | 28 | ||
| @@ -106,12 +109,188 @@ static struct platform_device m527x_fec[] = { | |||
| 106 | }, | 109 | }, |
| 107 | }; | 110 | }; |
| 108 | 111 | ||
| 112 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) | ||
| 113 | static struct resource m527x_qspi_resources[] = { | ||
| 114 | { | ||
| 115 | .start = MCFQSPI_IOBASE, | ||
| 116 | .end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1, | ||
| 117 | .flags = IORESOURCE_MEM, | ||
| 118 | }, | ||
| 119 | { | ||
| 120 | .start = MCFINT_VECBASE + MCFINT_QSPI, | ||
| 121 | .end = MCFINT_VECBASE + MCFINT_QSPI, | ||
| 122 | .flags = IORESOURCE_IRQ, | ||
| 123 | }, | ||
| 124 | }; | ||
| 125 | |||
| 126 | #if defined(CONFIG_M5271) | ||
| 127 | #define MCFQSPI_CS0 91 | ||
| 128 | #define MCFQSPI_CS1 92 | ||
| 129 | #define MCFQSPI_CS2 99 | ||
| 130 | #define MCFQSPI_CS3 103 | ||
| 131 | #elif defined(CONFIG_M5275) | ||
| 132 | #define MCFQSPI_CS0 59 | ||
| 133 | #define MCFQSPI_CS1 60 | ||
| 134 | #define MCFQSPI_CS2 61 | ||
| 135 | #define MCFQSPI_CS3 62 | ||
| 136 | #endif | ||
| 137 | |||
| 138 | static int m527x_cs_setup(struct mcfqspi_cs_control *cs_control) | ||
| 139 | { | ||
| 140 | int status; | ||
| 141 | |||
| 142 | status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0"); | ||
| 143 | if (status) { | ||
| 144 | pr_debug("gpio_request for MCFQSPI_CS0 failed\n"); | ||
| 145 | goto fail0; | ||
| 146 | } | ||
| 147 | status = gpio_direction_output(MCFQSPI_CS0, 1); | ||
| 148 | if (status) { | ||
| 149 | pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n"); | ||
| 150 | goto fail1; | ||
| 151 | } | ||
| 152 | |||
| 153 | status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1"); | ||
| 154 | if (status) { | ||
| 155 | pr_debug("gpio_request for MCFQSPI_CS1 failed\n"); | ||
| 156 | goto fail1; | ||
| 157 | } | ||
| 158 | status = gpio_direction_output(MCFQSPI_CS1, 1); | ||
| 159 | if (status) { | ||
| 160 | pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n"); | ||
| 161 | goto fail2; | ||
| 162 | } | ||
| 163 | |||
| 164 | status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2"); | ||
| 165 | if (status) { | ||
| 166 | pr_debug("gpio_request for MCFQSPI_CS2 failed\n"); | ||
| 167 | goto fail2; | ||
| 168 | } | ||
| 169 | status = gpio_direction_output(MCFQSPI_CS2, 1); | ||
| 170 | if (status) { | ||
| 171 | pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n"); | ||
| 172 | goto fail3; | ||
| 173 | } | ||
| 174 | |||
| 175 | status = gpio_request(MCFQSPI_CS3, "MCFQSPI_CS3"); | ||
| 176 | if (status) { | ||
| 177 | pr_debug("gpio_request for MCFQSPI_CS3 failed\n"); | ||
| 178 | goto fail3; | ||
| 179 | } | ||
| 180 | status = gpio_direction_output(MCFQSPI_CS3, 1); | ||
| 181 | if (status) { | ||
| 182 | pr_debug("gpio_direction_output for MCFQSPI_CS3 failed\n"); | ||
| 183 | goto fail4; | ||
| 184 | } | ||
| 185 | |||
| 186 | return 0; | ||
| 187 | |||
| 188 | fail4: | ||
| 189 | gpio_free(MCFQSPI_CS3); | ||
| 190 | fail3: | ||
| 191 | gpio_free(MCFQSPI_CS2); | ||
| 192 | fail2: | ||
| 193 | gpio_free(MCFQSPI_CS1); | ||
| 194 | fail1: | ||
| 195 | gpio_free(MCFQSPI_CS0); | ||
| 196 | fail0: | ||
| 197 | return status; | ||
| 198 | } | ||
| 199 | |||
| 200 | static void m527x_cs_teardown(struct mcfqspi_cs_control *cs_control) | ||
| 201 | { | ||
| 202 | gpio_free(MCFQSPI_CS3); | ||
| 203 | gpio_free(MCFQSPI_CS2); | ||
| 204 | gpio_free(MCFQSPI_CS1); | ||
| 205 | gpio_free(MCFQSPI_CS0); | ||
| 206 | } | ||
| 207 | |||
| 208 | static void m527x_cs_select(struct mcfqspi_cs_control *cs_control, | ||
| 209 | u8 chip_select, bool cs_high) | ||
| 210 | { | ||
| 211 | switch (chip_select) { | ||
| 212 | case 0: | ||
| 213 | gpio_set_value(MCFQSPI_CS0, cs_high); | ||
| 214 | break; | ||
| 215 | case 1: | ||
| 216 | gpio_set_value(MCFQSPI_CS1, cs_high); | ||
| 217 | break; | ||
| 218 | case 2: | ||
| 219 | gpio_set_value(MCFQSPI_CS2, cs_high); | ||
| 220 | break; | ||
| 221 | case 3: | ||
| 222 | gpio_set_value(MCFQSPI_CS3, cs_high); | ||
| 223 | break; | ||
| 224 | } | ||
| 225 | } | ||
| 226 | |||
| 227 | static void m527x_cs_deselect(struct mcfqspi_cs_control *cs_control, | ||
| 228 | u8 chip_select, bool cs_high) | ||
| 229 | { | ||
| 230 | switch (chip_select) { | ||
| 231 | case 0: | ||
| 232 | gpio_set_value(MCFQSPI_CS0, !cs_high); | ||
| 233 | break; | ||
| 234 | case 1: | ||
| 235 | gpio_set_value(MCFQSPI_CS1, !cs_high); | ||
| 236 | break; | ||
| 237 | case 2: | ||
| 238 | gpio_set_value(MCFQSPI_CS2, !cs_high); | ||
| 239 | break; | ||
| 240 | case 3: | ||
| 241 | gpio_set_value(MCFQSPI_CS3, !cs_high); | ||
| 242 | break; | ||
| 243 | } | ||
| 244 | } | ||
| 245 | |||
| 246 | static struct mcfqspi_cs_control m527x_cs_control = { | ||
| 247 | .setup = m527x_cs_setup, | ||
| 248 | .teardown = m527x_cs_teardown, | ||
| 249 | .select = m527x_cs_select, | ||
| 250 | .deselect = m527x_cs_deselect, | ||
| 251 | }; | ||
| 252 | |||
| 253 | static struct mcfqspi_platform_data m527x_qspi_data = { | ||
| 254 | .bus_num = 0, | ||
| 255 | .num_chipselect = 4, | ||
| 256 | .cs_control = &m527x_cs_control, | ||
| 257 | }; | ||
| 258 | |||
| 259 | static struct platform_device m527x_qspi = { | ||
| 260 | .name = "mcfqspi", | ||
| 261 | .id = 0, | ||
| 262 | .num_resources = ARRAY_SIZE(m527x_qspi_resources), | ||
| 263 | .resource = m527x_qspi_resources, | ||
| 264 | .dev.platform_data = &m527x_qspi_data, | ||
| 265 | }; | ||
| 266 | |||
| 267 | static void __init m527x_qspi_init(void) | ||
| 268 | { | ||
| 269 | #if defined(CONFIG_M5271) | ||
| 270 | u16 par; | ||
| 271 | |||
| 272 | /* setup QSPS pins for QSPI with gpio CS control */ | ||
| 273 | writeb(0x1f, MCFGPIO_PAR_QSPI); | ||
| 274 | /* and CS2 & CS3 as gpio */ | ||
| 275 | par = readw(MCFGPIO_PAR_TIMER); | ||
| 276 | par &= 0x3f3f; | ||
| 277 | writew(par, MCFGPIO_PAR_TIMER); | ||
| 278 | #elif defined(CONFIG_M5275) | ||
| 279 | /* setup QSPS pins for QSPI with gpio CS control */ | ||
| 280 | writew(0x003e, MCFGPIO_PAR_QSPI); | ||
| 281 | #endif | ||
| 282 | } | ||
| 283 | #endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */ | ||
| 284 | |||
| 109 | static struct platform_device *m527x_devices[] __initdata = { | 285 | static struct platform_device *m527x_devices[] __initdata = { |
| 110 | &m527x_uart, | 286 | &m527x_uart, |
| 111 | &m527x_fec[0], | 287 | &m527x_fec[0], |
| 112 | #ifdef CONFIG_FEC2 | 288 | #ifdef CONFIG_FEC2 |
| 113 | &m527x_fec[1], | 289 | &m527x_fec[1], |
| 114 | #endif | 290 | #endif |
| 291 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) | ||
| 292 | &m527x_qspi, | ||
| 293 | #endif | ||
| 115 | }; | 294 | }; |
| 116 | 295 | ||
| 117 | /***************************************************************************/ | 296 | /***************************************************************************/ |
| @@ -187,6 +366,9 @@ void __init config_BSP(char *commandp, int size) | |||
| 187 | mach_reset = m527x_cpu_reset; | 366 | mach_reset = m527x_cpu_reset; |
| 188 | m527x_uarts_init(); | 367 | m527x_uarts_init(); |
| 189 | m527x_fec_init(); | 368 | m527x_fec_init(); |
| 369 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) | ||
| 370 | m527x_qspi_init(); | ||
| 371 | #endif | ||
| 190 | } | 372 | } |
| 191 | 373 | ||
| 192 | /***************************************************************************/ | 374 | /***************************************************************************/ |
diff --git a/arch/m68knommu/platform/528x/config.c b/arch/m68knommu/platform/528x/config.c index 6e608d1836f1..76b743343bfa 100644 --- a/arch/m68knommu/platform/528x/config.c +++ b/arch/m68knommu/platform/528x/config.c | |||
| @@ -17,10 +17,13 @@ | |||
| 17 | #include <linux/init.h> | 17 | #include <linux/init.h> |
| 18 | #include <linux/platform_device.h> | 18 | #include <linux/platform_device.h> |
| 19 | #include <linux/io.h> | 19 | #include <linux/io.h> |
| 20 | #include <linux/spi/spi.h> | ||
| 21 | #include <linux/gpio.h> | ||
| 20 | #include <asm/machdep.h> | 22 | #include <asm/machdep.h> |
| 21 | #include <asm/coldfire.h> | 23 | #include <asm/coldfire.h> |
| 22 | #include <asm/mcfsim.h> | 24 | #include <asm/mcfsim.h> |
| 23 | #include <asm/mcfuart.h> | 25 | #include <asm/mcfuart.h> |
| 26 | #include <asm/mcfqspi.h> | ||
| 24 | 27 | ||
| 25 | /***************************************************************************/ | 28 | /***************************************************************************/ |
| 26 | 29 | ||
| @@ -76,10 +79,141 @@ static struct platform_device m528x_fec = { | |||
| 76 | .resource = m528x_fec_resources, | 79 | .resource = m528x_fec_resources, |
| 77 | }; | 80 | }; |
| 78 | 81 | ||
| 82 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) | ||
| 83 | static struct resource m528x_qspi_resources[] = { | ||
| 84 | { | ||
| 85 | .start = MCFQSPI_IOBASE, | ||
| 86 | .end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1, | ||
| 87 | .flags = IORESOURCE_MEM, | ||
| 88 | }, | ||
| 89 | { | ||
| 90 | .start = MCFINT_VECBASE + MCFINT_QSPI, | ||
| 91 | .end = MCFINT_VECBASE + MCFINT_QSPI, | ||
| 92 | .flags = IORESOURCE_IRQ, | ||
| 93 | }, | ||
| 94 | }; | ||
| 95 | |||
| 96 | #define MCFQSPI_CS0 147 | ||
| 97 | #define MCFQSPI_CS1 148 | ||
| 98 | #define MCFQSPI_CS2 149 | ||
| 99 | #define MCFQSPI_CS3 150 | ||
| 100 | |||
| 101 | static int m528x_cs_setup(struct mcfqspi_cs_control *cs_control) | ||
| 102 | { | ||
| 103 | int status; | ||
| 104 | |||
| 105 | status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0"); | ||
| 106 | if (status) { | ||
| 107 | pr_debug("gpio_request for MCFQSPI_CS0 failed\n"); | ||
| 108 | goto fail0; | ||
| 109 | } | ||
| 110 | status = gpio_direction_output(MCFQSPI_CS0, 1); | ||
| 111 | if (status) { | ||
| 112 | pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n"); | ||
| 113 | goto fail1; | ||
| 114 | } | ||
| 115 | |||
| 116 | status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1"); | ||
| 117 | if (status) { | ||
| 118 | pr_debug("gpio_request for MCFQSPI_CS1 failed\n"); | ||
| 119 | goto fail1; | ||
| 120 | } | ||
| 121 | status = gpio_direction_output(MCFQSPI_CS1, 1); | ||
| 122 | if (status) { | ||
| 123 | pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n"); | ||
| 124 | goto fail2; | ||
| 125 | } | ||
| 126 | |||
| 127 | status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2"); | ||
| 128 | if (status) { | ||
| 129 | pr_debug("gpio_request for MCFQSPI_CS2 failed\n"); | ||
| 130 | goto fail2; | ||
| 131 | } | ||
| 132 | status = gpio_direction_output(MCFQSPI_CS2, 1); | ||
| 133 | if (status) { | ||
| 134 | pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n"); | ||
| 135 | goto fail3; | ||
| 136 | } | ||
| 137 | |||
| 138 | status = gpio_request(MCFQSPI_CS3, "MCFQSPI_CS3"); | ||
| 139 | if (status) { | ||
| 140 | pr_debug("gpio_request for MCFQSPI_CS3 failed\n"); | ||
| 141 | goto fail3; | ||
| 142 | } | ||
| 143 | status = gpio_direction_output(MCFQSPI_CS3, 1); | ||
| 144 | if (status) { | ||
| 145 | pr_debug("gpio_direction_output for MCFQSPI_CS3 failed\n"); | ||
| 146 | goto fail4; | ||
| 147 | } | ||
| 148 | |||
| 149 | return 0; | ||
| 150 | |||
| 151 | fail4: | ||
| 152 | gpio_free(MCFQSPI_CS3); | ||
| 153 | fail3: | ||
| 154 | gpio_free(MCFQSPI_CS2); | ||
| 155 | fail2: | ||
| 156 | gpio_free(MCFQSPI_CS1); | ||
| 157 | fail1: | ||
| 158 | gpio_free(MCFQSPI_CS0); | ||
| 159 | fail0: | ||
| 160 | return status; | ||
| 161 | } | ||
| 162 | |||
| 163 | static void m528x_cs_teardown(struct mcfqspi_cs_control *cs_control) | ||
| 164 | { | ||
| 165 | gpio_free(MCFQSPI_CS3); | ||
| 166 | gpio_free(MCFQSPI_CS2); | ||
| 167 | gpio_free(MCFQSPI_CS1); | ||
| 168 | gpio_free(MCFQSPI_CS0); | ||
| 169 | } | ||
| 170 | |||
| 171 | static void m528x_cs_select(struct mcfqspi_cs_control *cs_control, | ||
| 172 | u8 chip_select, bool cs_high) | ||
| 173 | { | ||
| 174 | gpio_set_value(MCFQSPI_CS0 + chip_select, cs_high); | ||
| 175 | } | ||
| 176 | |||
| 177 | static void m528x_cs_deselect(struct mcfqspi_cs_control *cs_control, | ||
| 178 | u8 chip_select, bool cs_high) | ||
| 179 | { | ||
| 180 | gpio_set_value(MCFQSPI_CS0 + chip_select, !cs_high); | ||
| 181 | } | ||
| 182 | |||
| 183 | static struct mcfqspi_cs_control m528x_cs_control = { | ||
| 184 | .setup = m528x_cs_setup, | ||
| 185 | .teardown = m528x_cs_teardown, | ||
| 186 | .select = m528x_cs_select, | ||
| 187 | .deselect = m528x_cs_deselect, | ||
| 188 | }; | ||
| 189 | |||
| 190 | static struct mcfqspi_platform_data m528x_qspi_data = { | ||
| 191 | .bus_num = 0, | ||
| 192 | .num_chipselect = 4, | ||
| 193 | .cs_control = &m528x_cs_control, | ||
| 194 | }; | ||
| 195 | |||
| 196 | static struct platform_device m528x_qspi = { | ||
| 197 | .name = "mcfqspi", | ||
| 198 | .id = 0, | ||
| 199 | .num_resources = ARRAY_SIZE(m528x_qspi_resources), | ||
| 200 | .resource = m528x_qspi_resources, | ||
| 201 | .dev.platform_data = &m528x_qspi_data, | ||
| 202 | }; | ||
| 203 | |||
| 204 | static void __init m528x_qspi_init(void) | ||
| 205 | { | ||
| 206 | /* setup Port QS for QSPI with gpio CS control */ | ||
| 207 | __raw_writeb(0x07, MCFGPIO_PQSPAR); | ||
| 208 | } | ||
| 209 | #endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */ | ||
| 79 | 210 | ||
| 80 | static struct platform_device *m528x_devices[] __initdata = { | 211 | static struct platform_device *m528x_devices[] __initdata = { |
| 81 | &m528x_uart, | 212 | &m528x_uart, |
| 82 | &m528x_fec, | 213 | &m528x_fec, |
| 214 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) | ||
| 215 | &m528x_qspi, | ||
| 216 | #endif | ||
| 83 | }; | 217 | }; |
| 84 | 218 | ||
| 85 | /***************************************************************************/ | 219 | /***************************************************************************/ |
| @@ -174,6 +308,9 @@ static int __init init_BSP(void) | |||
| 174 | mach_reset = m528x_cpu_reset; | 308 | mach_reset = m528x_cpu_reset; |
| 175 | m528x_uarts_init(); | 309 | m528x_uarts_init(); |
| 176 | m528x_fec_init(); | 310 | m528x_fec_init(); |
| 311 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) | ||
| 312 | m528x_qspi_init(); | ||
| 313 | #endif | ||
| 177 | platform_add_devices(m528x_devices, ARRAY_SIZE(m528x_devices)); | 314 | platform_add_devices(m528x_devices, ARRAY_SIZE(m528x_devices)); |
| 178 | return 0; | 315 | return 0; |
| 179 | } | 316 | } |
diff --git a/arch/m68knommu/platform/5307/Makefile b/arch/m68knommu/platform/5307/Makefile index 667db6598451..6de526976828 100644 --- a/arch/m68knommu/platform/5307/Makefile +++ b/arch/m68knommu/platform/5307/Makefile | |||
| @@ -14,5 +14,7 @@ | |||
| 14 | 14 | ||
| 15 | asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1 | 15 | asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1 |
| 16 | 16 | ||
| 17 | obj-y += config.o gpio.o | 17 | obj-y += config.o gpio.o |
| 18 | obj-$(CONFIG_NETtel) += nettel.o | ||
| 19 | obj-$(CONFIG_CLEOPATRA) += nettel.o | ||
| 18 | 20 | ||
diff --git a/arch/m68knommu/platform/5307/nettel.c b/arch/m68knommu/platform/5307/nettel.c new file mode 100644 index 000000000000..e925ea4602f8 --- /dev/null +++ b/arch/m68knommu/platform/5307/nettel.c | |||
| @@ -0,0 +1,153 @@ | |||
| 1 | /***************************************************************************/ | ||
| 2 | |||
| 3 | /* | ||
| 4 | * nettel.c -- startup code support for the NETtel boards | ||
| 5 | * | ||
| 6 | * Copyright (C) 2009, Greg Ungerer (gerg@snapgear.com) | ||
| 7 | */ | ||
| 8 | |||
| 9 | /***************************************************************************/ | ||
| 10 | |||
| 11 | #include <linux/kernel.h> | ||
| 12 | #include <linux/param.h> | ||
| 13 | #include <linux/init.h> | ||
| 14 | #include <linux/io.h> | ||
| 15 | #include <linux/platform_device.h> | ||
| 16 | #include <asm/coldfire.h> | ||
| 17 | #include <asm/mcfsim.h> | ||
| 18 | #include <asm/nettel.h> | ||
| 19 | |||
| 20 | /***************************************************************************/ | ||
| 21 | |||
| 22 | /* | ||
| 23 | * Define the IO and interrupt resources of the 2 SMC9196 interfaces. | ||
| 24 | */ | ||
| 25 | #define NETTEL_SMC0_ADDR 0x30600300 | ||
| 26 | #define NETTEL_SMC0_IRQ 29 | ||
| 27 | |||
| 28 | #define NETTEL_SMC1_ADDR 0x30600000 | ||
| 29 | #define NETTEL_SMC1_IRQ 27 | ||
| 30 | |||
| 31 | /* | ||
| 32 | * We need some access into the SMC9196 registers. Define those registers | ||
| 33 | * we will need here (including the smc91x.h doesn't seem to give us these | ||
| 34 | * in a simple form). | ||
| 35 | */ | ||
| 36 | #define SMC91xx_BANKSELECT 14 | ||
| 37 | #define SMC91xx_BASEADDR 2 | ||
| 38 | #define SMC91xx_BASEMAC 4 | ||
| 39 | |||
| 40 | /***************************************************************************/ | ||
| 41 | |||
| 42 | static struct resource nettel_smc91x_0_resources[] = { | ||
| 43 | { | ||
| 44 | .start = NETTEL_SMC0_ADDR, | ||
| 45 | .end = NETTEL_SMC0_ADDR + 0x20, | ||
| 46 | .flags = IORESOURCE_MEM, | ||
| 47 | }, | ||
| 48 | { | ||
| 49 | .start = NETTEL_SMC0_IRQ, | ||
| 50 | .end = NETTEL_SMC0_IRQ, | ||
| 51 | .flags = IORESOURCE_IRQ, | ||
| 52 | }, | ||
| 53 | }; | ||
| 54 | |||
| 55 | static struct resource nettel_smc91x_1_resources[] = { | ||
| 56 | { | ||
| 57 | .start = NETTEL_SMC1_ADDR, | ||
| 58 | .end = NETTEL_SMC1_ADDR + 0x20, | ||
| 59 | .flags = IORESOURCE_MEM, | ||
| 60 | }, | ||
| 61 | { | ||
| 62 | .start = NETTEL_SMC1_IRQ, | ||
| 63 | .end = NETTEL_SMC1_IRQ, | ||
| 64 | .flags = IORESOURCE_IRQ, | ||
| 65 | }, | ||
| 66 | }; | ||
| 67 | |||
| 68 | static struct platform_device nettel_smc91x[] = { | ||
| 69 | { | ||
| 70 | .name = "smc91x", | ||
| 71 | .id = 0, | ||
| 72 | .num_resources = ARRAY_SIZE(nettel_smc91x_0_resources), | ||
| 73 | .resource = nettel_smc91x_0_resources, | ||
| 74 | }, | ||
| 75 | { | ||
| 76 | .name = "smc91x", | ||
| 77 | .id = 1, | ||
| 78 | .num_resources = ARRAY_SIZE(nettel_smc91x_1_resources), | ||
| 79 | .resource = nettel_smc91x_1_resources, | ||
| 80 | }, | ||
| 81 | }; | ||
| 82 | |||
| 83 | static struct platform_device *nettel_devices[] __initdata = { | ||
| 84 | &nettel_smc91x[0], | ||
| 85 | &nettel_smc91x[1], | ||
| 86 | }; | ||
| 87 | |||
| 88 | /***************************************************************************/ | ||
| 89 | |||
| 90 | static u8 nettel_macdefault[] __initdata = { | ||
| 91 | 0x00, 0xd0, 0xcf, 0x00, 0x00, 0x01, | ||
| 92 | }; | ||
| 93 | |||
| 94 | /* | ||
| 95 | * Set flash contained MAC address into SMC9196 core. Make sure the flash | ||
| 96 | * MAC address is sane, and not an empty flash. If no good use the Moreton | ||
| 97 | * Bay default MAC address instead. | ||
| 98 | */ | ||
| 99 | |||
| 100 | static void __init nettel_smc91x_setmac(unsigned int ioaddr, unsigned int flashaddr) | ||
| 101 | { | ||
| 102 | u16 *macp; | ||
| 103 | |||
| 104 | macp = (u16 *) flashaddr; | ||
| 105 | if ((macp[0] == 0xffff) && (macp[1] == 0xffff) && (macp[2] == 0xffff)) | ||
| 106 | macp = (u16 *) &nettel_macdefault[0]; | ||
| 107 | |||
| 108 | writew(1, NETTEL_SMC0_ADDR + SMC91xx_BANKSELECT); | ||
| 109 | writew(macp[0], ioaddr + SMC91xx_BASEMAC); | ||
| 110 | writew(macp[1], ioaddr + SMC91xx_BASEMAC + 2); | ||
| 111 | writew(macp[2], ioaddr + SMC91xx_BASEMAC + 4); | ||
| 112 | } | ||
| 113 | |||
| 114 | /***************************************************************************/ | ||
| 115 | |||
| 116 | /* | ||
| 117 | * Re-map the address space of at least one of the SMC ethernet | ||
| 118 | * parts. Both parts power up decoding the same address, so we | ||
| 119 | * need to move one of them first, before doing anything else. | ||
| 120 | */ | ||
| 121 | |||
| 122 | static void __init nettel_smc91x_init(void) | ||
| 123 | { | ||
| 124 | writew(0x00ec, MCF_MBAR + MCFSIM_PADDR); | ||
| 125 | mcf_setppdata(0, 0x0080); | ||
| 126 | writew(1, NETTEL_SMC0_ADDR + SMC91xx_BANKSELECT); | ||
| 127 | writew(0x0067, NETTEL_SMC0_ADDR + SMC91xx_BASEADDR); | ||
| 128 | mcf_setppdata(0x0080, 0); | ||
| 129 | |||
| 130 | /* Set correct chip select timing for SMC9196 accesses */ | ||
| 131 | writew(0x1180, MCF_MBAR + MCFSIM_CSCR3); | ||
| 132 | |||
| 133 | /* Set the SMC interrupts to be auto-vectored */ | ||
| 134 | mcf_autovector(NETTEL_SMC0_IRQ); | ||
| 135 | mcf_autovector(NETTEL_SMC1_IRQ); | ||
| 136 | |||
| 137 | /* Set MAC addresses from flash for both interfaces */ | ||
| 138 | nettel_smc91x_setmac(NETTEL_SMC0_ADDR, 0xf0006000); | ||
| 139 | nettel_smc91x_setmac(NETTEL_SMC1_ADDR, 0xf0006006); | ||
| 140 | } | ||
| 141 | |||
| 142 | /***************************************************************************/ | ||
| 143 | |||
| 144 | static int __init init_nettel(void) | ||
| 145 | { | ||
| 146 | nettel_smc91x_init(); | ||
| 147 | platform_add_devices(nettel_devices, ARRAY_SIZE(nettel_devices)); | ||
| 148 | return 0; | ||
| 149 | } | ||
| 150 | |||
| 151 | arch_initcall(init_nettel); | ||
| 152 | |||
| 153 | /***************************************************************************/ | ||
diff --git a/arch/m68knommu/platform/532x/config.c b/arch/m68knommu/platform/532x/config.c index d632948e64e5..ca51323f957b 100644 --- a/arch/m68knommu/platform/532x/config.c +++ b/arch/m68knommu/platform/532x/config.c | |||
| @@ -21,12 +21,15 @@ | |||
| 21 | #include <linux/param.h> | 21 | #include <linux/param.h> |
| 22 | #include <linux/init.h> | 22 | #include <linux/init.h> |
| 23 | #include <linux/io.h> | 23 | #include <linux/io.h> |
| 24 | #include <linux/spi/spi.h> | ||
| 25 | #include <linux/gpio.h> | ||
| 24 | #include <asm/machdep.h> | 26 | #include <asm/machdep.h> |
| 25 | #include <asm/coldfire.h> | 27 | #include <asm/coldfire.h> |
| 26 | #include <asm/mcfsim.h> | 28 | #include <asm/mcfsim.h> |
| 27 | #include <asm/mcfuart.h> | 29 | #include <asm/mcfuart.h> |
| 28 | #include <asm/mcfdma.h> | 30 | #include <asm/mcfdma.h> |
| 29 | #include <asm/mcfwdebug.h> | 31 | #include <asm/mcfwdebug.h> |
| 32 | #include <asm/mcfqspi.h> | ||
| 30 | 33 | ||
| 31 | /***************************************************************************/ | 34 | /***************************************************************************/ |
| 32 | 35 | ||
| @@ -82,9 +85,127 @@ static struct platform_device m532x_fec = { | |||
| 82 | .resource = m532x_fec_resources, | 85 | .resource = m532x_fec_resources, |
| 83 | }; | 86 | }; |
| 84 | 87 | ||
| 88 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) | ||
| 89 | static struct resource m532x_qspi_resources[] = { | ||
| 90 | { | ||
| 91 | .start = MCFQSPI_IOBASE, | ||
| 92 | .end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1, | ||
| 93 | .flags = IORESOURCE_MEM, | ||
| 94 | }, | ||
| 95 | { | ||
| 96 | .start = MCFINT_VECBASE + MCFINT_QSPI, | ||
| 97 | .end = MCFINT_VECBASE + MCFINT_QSPI, | ||
| 98 | .flags = IORESOURCE_IRQ, | ||
| 99 | }, | ||
| 100 | }; | ||
| 101 | |||
| 102 | #define MCFQSPI_CS0 84 | ||
| 103 | #define MCFQSPI_CS1 85 | ||
| 104 | #define MCFQSPI_CS2 86 | ||
| 105 | |||
| 106 | static int m532x_cs_setup(struct mcfqspi_cs_control *cs_control) | ||
| 107 | { | ||
| 108 | int status; | ||
| 109 | |||
| 110 | status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0"); | ||
| 111 | if (status) { | ||
| 112 | pr_debug("gpio_request for MCFQSPI_CS0 failed\n"); | ||
| 113 | goto fail0; | ||
| 114 | } | ||
| 115 | status = gpio_direction_output(MCFQSPI_CS0, 1); | ||
| 116 | if (status) { | ||
| 117 | pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n"); | ||
| 118 | goto fail1; | ||
| 119 | } | ||
| 120 | |||
| 121 | status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1"); | ||
| 122 | if (status) { | ||
| 123 | pr_debug("gpio_request for MCFQSPI_CS1 failed\n"); | ||
| 124 | goto fail1; | ||
| 125 | } | ||
| 126 | status = gpio_direction_output(MCFQSPI_CS1, 1); | ||
| 127 | if (status) { | ||
| 128 | pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n"); | ||
| 129 | goto fail2; | ||
| 130 | } | ||
| 131 | |||
| 132 | status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2"); | ||
| 133 | if (status) { | ||
| 134 | pr_debug("gpio_request for MCFQSPI_CS2 failed\n"); | ||
| 135 | goto fail2; | ||
| 136 | } | ||
| 137 | status = gpio_direction_output(MCFQSPI_CS2, 1); | ||
| 138 | if (status) { | ||
| 139 | pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n"); | ||
| 140 | goto fail3; | ||
| 141 | } | ||
| 142 | |||
| 143 | return 0; | ||
| 144 | |||
| 145 | fail3: | ||
| 146 | gpio_free(MCFQSPI_CS2); | ||
| 147 | fail2: | ||
| 148 | gpio_free(MCFQSPI_CS1); | ||
| 149 | fail1: | ||
| 150 | gpio_free(MCFQSPI_CS0); | ||
| 151 | fail0: | ||
| 152 | return status; | ||
| 153 | } | ||
| 154 | |||
| 155 | static void m532x_cs_teardown(struct mcfqspi_cs_control *cs_control) | ||
| 156 | { | ||
| 157 | gpio_free(MCFQSPI_CS2); | ||
| 158 | gpio_free(MCFQSPI_CS1); | ||
| 159 | gpio_free(MCFQSPI_CS0); | ||
| 160 | } | ||
| 161 | |||
| 162 | static void m532x_cs_select(struct mcfqspi_cs_control *cs_control, | ||
| 163 | u8 chip_select, bool cs_high) | ||
| 164 | { | ||
| 165 | gpio_set_value(MCFQSPI_CS0 + chip_select, cs_high); | ||
| 166 | } | ||
| 167 | |||
| 168 | static void m532x_cs_deselect(struct mcfqspi_cs_control *cs_control, | ||
| 169 | u8 chip_select, bool cs_high) | ||
| 170 | { | ||
| 171 | gpio_set_value(MCFQSPI_CS0 + chip_select, !cs_high); | ||
| 172 | } | ||
| 173 | |||
| 174 | static struct mcfqspi_cs_control m532x_cs_control = { | ||
| 175 | .setup = m532x_cs_setup, | ||
| 176 | .teardown = m532x_cs_teardown, | ||
| 177 | .select = m532x_cs_select, | ||
| 178 | .deselect = m532x_cs_deselect, | ||
| 179 | }; | ||
| 180 | |||
| 181 | static struct mcfqspi_platform_data m532x_qspi_data = { | ||
| 182 | .bus_num = 0, | ||
| 183 | .num_chipselect = 3, | ||
| 184 | .cs_control = &m532x_cs_control, | ||
| 185 | }; | ||
| 186 | |||
| 187 | static struct platform_device m532x_qspi = { | ||
| 188 | .name = "mcfqspi", | ||
| 189 | .id = 0, | ||
| 190 | .num_resources = ARRAY_SIZE(m532x_qspi_resources), | ||
| 191 | .resource = m532x_qspi_resources, | ||
| 192 | .dev.platform_data = &m532x_qspi_data, | ||
| 193 | }; | ||
| 194 | |||
| 195 | static void __init m532x_qspi_init(void) | ||
| 196 | { | ||
| 197 | /* setup QSPS pins for QSPI with gpio CS control */ | ||
| 198 | writew(0x01f0, MCF_GPIO_PAR_QSPI); | ||
| 199 | } | ||
| 200 | #endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */ | ||
| 201 | |||
| 202 | |||
| 85 | static struct platform_device *m532x_devices[] __initdata = { | 203 | static struct platform_device *m532x_devices[] __initdata = { |
| 86 | &m532x_uart, | 204 | &m532x_uart, |
| 87 | &m532x_fec, | 205 | &m532x_fec, |
| 206 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) | ||
| 207 | &m532x_qspi, | ||
| 208 | #endif | ||
| 88 | }; | 209 | }; |
| 89 | 210 | ||
| 90 | /***************************************************************************/ | 211 | /***************************************************************************/ |
| @@ -158,6 +279,9 @@ static int __init init_BSP(void) | |||
| 158 | { | 279 | { |
| 159 | m532x_uarts_init(); | 280 | m532x_uarts_init(); |
| 160 | m532x_fec_init(); | 281 | m532x_fec_init(); |
| 282 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) | ||
| 283 | m532x_qspi_init(); | ||
| 284 | #endif | ||
| 161 | platform_add_devices(m532x_devices, ARRAY_SIZE(m532x_devices)); | 285 | platform_add_devices(m532x_devices, ARRAY_SIZE(m532x_devices)); |
| 162 | return 0; | 286 | return 0; |
| 163 | } | 287 | } |
diff --git a/arch/m68knommu/platform/68360/commproc.c b/arch/m68knommu/platform/68360/commproc.c index 6acb8d294cb6..f27e688c404e 100644 --- a/arch/m68knommu/platform/68360/commproc.c +++ b/arch/m68knommu/platform/68360/commproc.c | |||
| @@ -110,7 +110,7 @@ void m360_cpm_reset() | |||
| 110 | /* pte = find_pte(&init_mm, host_page_addr); */ | 110 | /* pte = find_pte(&init_mm, host_page_addr); */ |
| 111 | /* pte_val(*pte) |= _PAGE_NO_CACHE; */ | 111 | /* pte_val(*pte) |= _PAGE_NO_CACHE; */ |
| 112 | /* flush_tlb_page(current->mm->mmap, host_buffer); */ | 112 | /* flush_tlb_page(current->mm->mmap, host_buffer); */ |
| 113 | 113 | ||
| 114 | /* Tell everyone where the comm processor resides. | 114 | /* Tell everyone where the comm processor resides. |
| 115 | */ | 115 | */ |
| 116 | /* cpmp = (cpm360_t *)commproc; */ | 116 | /* cpmp = (cpm360_t *)commproc; */ |
| @@ -191,7 +191,7 @@ cpm_interrupt(int irq, void * dev, struct pt_regs * regs) | |||
| 191 | */ | 191 | */ |
| 192 | ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cisr |= (1 << vec); | 192 | ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cisr |= (1 << vec); |
| 193 | #endif | 193 | #endif |
| 194 | 194 | ||
| 195 | } | 195 | } |
| 196 | 196 | ||
| 197 | /* The CPM can generate the error interrupt when there is a race condition | 197 | /* The CPM can generate the error interrupt when there is a race condition |
diff --git a/arch/m68knommu/platform/68360/head-ram.S b/arch/m68knommu/platform/68360/head-ram.S index 2ef06242398b..8eb94fb6b971 100644 --- a/arch/m68knommu/platform/68360/head-ram.S +++ b/arch/m68knommu/platform/68360/head-ram.S | |||
| @@ -280,7 +280,7 @@ _dprbase: | |||
| 280 | * and then overwritten as needed. | 280 | * and then overwritten as needed. |
| 281 | */ | 281 | */ |
| 282 | 282 | ||
| 283 | .section ".data.initvect","awx" | 283 | .section ".data..initvect","awx" |
| 284 | .long RAMEND /* Reset: Initial Stack Pointer - 0. */ | 284 | .long RAMEND /* Reset: Initial Stack Pointer - 0. */ |
| 285 | .long _start /* Reset: Initial Program Counter - 1. */ | 285 | .long _start /* Reset: Initial Program Counter - 1. */ |
| 286 | .long buserr /* Bus Error - 2. */ | 286 | .long buserr /* Bus Error - 2. */ |
diff --git a/arch/m68knommu/platform/68360/head-rom.S b/arch/m68knommu/platform/68360/head-rom.S index 62ecf4144b3b..97510e55b802 100644 --- a/arch/m68knommu/platform/68360/head-rom.S +++ b/arch/m68knommu/platform/68360/head-rom.S | |||
| @@ -291,7 +291,7 @@ _dprbase: | |||
| 291 | * and then overwritten as needed. | 291 | * and then overwritten as needed. |
| 292 | */ | 292 | */ |
| 293 | 293 | ||
| 294 | .section ".data.initvect","awx" | 294 | .section ".data..initvect","awx" |
| 295 | .long RAMEND /* Reset: Initial Stack Pointer - 0. */ | 295 | .long RAMEND /* Reset: Initial Stack Pointer - 0. */ |
| 296 | .long _start /* Reset: Initial Program Counter - 1. */ | 296 | .long _start /* Reset: Initial Program Counter - 1. */ |
| 297 | .long buserr /* Bus Error - 2. */ | 297 | .long buserr /* Bus Error - 2. */ |
diff --git a/arch/microblaze/include/asm/device.h b/arch/microblaze/include/asm/device.h index 402b46e630f6..123b2fe72d01 100644 --- a/arch/microblaze/include/asm/device.h +++ b/arch/microblaze/include/asm/device.h | |||
| @@ -12,29 +12,15 @@ | |||
| 12 | struct device_node; | 12 | struct device_node; |
| 13 | 13 | ||
| 14 | struct dev_archdata { | 14 | struct dev_archdata { |
| 15 | /* Optional pointer to an OF device node */ | ||
| 16 | struct device_node *of_node; | ||
| 17 | |||
| 18 | /* DMA operations on that device */ | 15 | /* DMA operations on that device */ |
| 19 | struct dma_map_ops *dma_ops; | 16 | struct dma_map_ops *dma_ops; |
| 20 | void *dma_data; | 17 | void *dma_data; |
| 21 | }; | 18 | }; |
| 22 | 19 | ||
| 23 | struct pdev_archdata { | 20 | struct pdev_archdata { |
| 21 | u64 dma_mask; | ||
| 24 | }; | 22 | }; |
| 25 | 23 | ||
| 26 | static inline void dev_archdata_set_node(struct dev_archdata *ad, | ||
| 27 | struct device_node *np) | ||
| 28 | { | ||
| 29 | ad->of_node = np; | ||
| 30 | } | ||
| 31 | |||
| 32 | static inline struct device_node * | ||
| 33 | dev_archdata_get_node(const struct dev_archdata *ad) | ||
| 34 | { | ||
| 35 | return ad->of_node; | ||
| 36 | } | ||
| 37 | |||
| 38 | #endif /* _ASM_MICROBLAZE_DEVICE_H */ | 24 | #endif /* _ASM_MICROBLAZE_DEVICE_H */ |
| 39 | 25 | ||
| 40 | 26 | ||
diff --git a/arch/microblaze/include/asm/of_device.h b/arch/microblaze/include/asm/of_device.h index ba917cfaefe6..73cb98040982 100644 --- a/arch/microblaze/include/asm/of_device.h +++ b/arch/microblaze/include/asm/of_device.h | |||
| @@ -21,9 +21,8 @@ | |||
| 21 | * probed using OF properties. | 21 | * probed using OF properties. |
| 22 | */ | 22 | */ |
| 23 | struct of_device { | 23 | struct of_device { |
| 24 | struct device_node *node; /* to be obsoleted */ | ||
| 25 | u64 dma_mask; /* DMA mask */ | ||
| 26 | struct device dev; /* Generic device interface */ | 24 | struct device dev; /* Generic device interface */ |
| 25 | struct pdev_archdata archdata; | ||
| 27 | }; | 26 | }; |
| 28 | 27 | ||
| 29 | extern ssize_t of_device_get_modalias(struct of_device *ofdev, | 28 | extern ssize_t of_device_get_modalias(struct of_device *ofdev, |
diff --git a/arch/microblaze/include/asm/page.h b/arch/microblaze/include/asm/page.h index de493f86d28f..464ff32bee3d 100644 --- a/arch/microblaze/include/asm/page.h +++ b/arch/microblaze/include/asm/page.h | |||
| @@ -34,6 +34,8 @@ | |||
| 34 | /* MS be sure that SLAB allocates aligned objects */ | 34 | /* MS be sure that SLAB allocates aligned objects */ |
| 35 | #define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES | 35 | #define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES |
| 36 | 36 | ||
| 37 | #define ARCH_SLAB_MINALIGN L1_CACHE_BYTES | ||
| 38 | |||
| 37 | #define PAGE_UP(addr) (((addr)+((PAGE_SIZE)-1))&(~((PAGE_SIZE)-1))) | 39 | #define PAGE_UP(addr) (((addr)+((PAGE_SIZE)-1))&(~((PAGE_SIZE)-1))) |
| 38 | #define PAGE_DOWN(addr) ((addr)&(~((PAGE_SIZE)-1))) | 40 | #define PAGE_DOWN(addr) ((addr)&(~((PAGE_SIZE)-1))) |
| 39 | 41 | ||
diff --git a/arch/microblaze/include/asm/scatterlist.h b/arch/microblaze/include/asm/scatterlist.h index 35d786fe93ae..dc4a8900cc80 100644 --- a/arch/microblaze/include/asm/scatterlist.h +++ b/arch/microblaze/include/asm/scatterlist.h | |||
| @@ -1 +1,3 @@ | |||
| 1 | #include <asm-generic/scatterlist.h> | 1 | #include <asm-generic/scatterlist.h> |
| 2 | |||
| 3 | #define ISA_DMA_THRESHOLD (~0UL) | ||
diff --git a/arch/microblaze/kernel/dma.c b/arch/microblaze/kernel/dma.c index 9dcd90b5df55..79c74659f204 100644 --- a/arch/microblaze/kernel/dma.c +++ b/arch/microblaze/kernel/dma.c | |||
| @@ -90,7 +90,6 @@ static int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl, | |||
| 90 | /* FIXME this part of code is untested */ | 90 | /* FIXME this part of code is untested */ |
| 91 | for_each_sg(sgl, sg, nents, i) { | 91 | for_each_sg(sgl, sg, nents, i) { |
| 92 | sg->dma_address = sg_phys(sg) + get_dma_direct_offset(dev); | 92 | sg->dma_address = sg_phys(sg) + get_dma_direct_offset(dev); |
| 93 | sg->dma_length = sg->length; | ||
| 94 | __dma_sync_page(page_to_phys(sg_page(sg)), sg->offset, | 93 | __dma_sync_page(page_to_phys(sg_page(sg)), sg->offset, |
| 95 | sg->length, direction); | 94 | sg->length, direction); |
| 96 | } | 95 | } |
diff --git a/arch/microblaze/kernel/of_device.c b/arch/microblaze/kernel/of_device.c index 9a0f7632c47c..b372787886ed 100644 --- a/arch/microblaze/kernel/of_device.c +++ b/arch/microblaze/kernel/of_device.c | |||
| @@ -12,7 +12,7 @@ | |||
| 12 | void of_device_make_bus_id(struct of_device *dev) | 12 | void of_device_make_bus_id(struct of_device *dev) |
| 13 | { | 13 | { |
| 14 | static atomic_t bus_no_reg_magic; | 14 | static atomic_t bus_no_reg_magic; |
| 15 | struct device_node *node = dev->node; | 15 | struct device_node *node = dev->dev.of_node; |
| 16 | const u32 *reg; | 16 | const u32 *reg; |
| 17 | u64 addr; | 17 | u64 addr; |
| 18 | int magic; | 18 | int magic; |
| @@ -49,11 +49,10 @@ struct of_device *of_device_alloc(struct device_node *np, | |||
| 49 | if (!dev) | 49 | if (!dev) |
| 50 | return NULL; | 50 | return NULL; |
| 51 | 51 | ||
| 52 | dev->node = of_node_get(np); | 52 | dev->dev.of_node = of_node_get(np); |
| 53 | dev->dev.dma_mask = &dev->dma_mask; | 53 | dev->dev.dma_mask = &dev->archdata.dma_mask; |
| 54 | dev->dev.parent = parent; | 54 | dev->dev.parent = parent; |
| 55 | dev->dev.release = of_release_dev; | 55 | dev->dev.release = of_release_dev; |
| 56 | dev->dev.archdata.of_node = np; | ||
| 57 | 56 | ||
| 58 | if (bus_id) | 57 | if (bus_id) |
| 59 | dev_set_name(&dev->dev, bus_id); | 58 | dev_set_name(&dev->dev, bus_id); |
| @@ -75,17 +74,17 @@ int of_device_uevent(struct device *dev, struct kobj_uevent_env *env) | |||
| 75 | 74 | ||
| 76 | ofdev = to_of_device(dev); | 75 | ofdev = to_of_device(dev); |
| 77 | 76 | ||
| 78 | if (add_uevent_var(env, "OF_NAME=%s", ofdev->node->name)) | 77 | if (add_uevent_var(env, "OF_NAME=%s", ofdev->dev.of_node->name)) |
| 79 | return -ENOMEM; | 78 | return -ENOMEM; |
| 80 | 79 | ||
| 81 | if (add_uevent_var(env, "OF_TYPE=%s", ofdev->node->type)) | 80 | if (add_uevent_var(env, "OF_TYPE=%s", ofdev->dev.of_node->type)) |
| 82 | return -ENOMEM; | 81 | return -ENOMEM; |
| 83 | 82 | ||
| 84 | /* Since the compatible field can contain pretty much anything | 83 | /* Since the compatible field can contain pretty much anything |
| 85 | * it's not really legal to split it out with commas. We split it | 84 | * it's not really legal to split it out with commas. We split it |
| 86 | * up using a number of environment variables instead. */ | 85 | * up using a number of environment variables instead. */ |
| 87 | 86 | ||
| 88 | compat = of_get_property(ofdev->node, "compatible", &cplen); | 87 | compat = of_get_property(ofdev->dev.of_node, "compatible", &cplen); |
| 89 | while (compat && *compat && cplen > 0) { | 88 | while (compat && *compat && cplen > 0) { |
| 90 | if (add_uevent_var(env, "OF_COMPATIBLE_%d=%s", seen, compat)) | 89 | if (add_uevent_var(env, "OF_COMPATIBLE_%d=%s", seen, compat)) |
| 91 | return -ENOMEM; | 90 | return -ENOMEM; |
diff --git a/arch/microblaze/kernel/of_platform.c b/arch/microblaze/kernel/of_platform.c index 0dc755286d38..ccf6f4257f4b 100644 --- a/arch/microblaze/kernel/of_platform.c +++ b/arch/microblaze/kernel/of_platform.c | |||
| @@ -47,7 +47,7 @@ struct of_device *of_platform_device_create(struct device_node *np, | |||
| 47 | if (!dev) | 47 | if (!dev) |
| 48 | return NULL; | 48 | return NULL; |
| 49 | 49 | ||
| 50 | dev->dma_mask = 0xffffffffUL; | 50 | dev->archdata.dma_mask = 0xffffffffUL; |
| 51 | dev->dev.bus = &of_platform_bus_type; | 51 | dev->dev.bus = &of_platform_bus_type; |
| 52 | 52 | ||
| 53 | /* We do not fill the DMA ops for platform devices by default. | 53 | /* We do not fill the DMA ops for platform devices by default. |
| @@ -166,7 +166,7 @@ EXPORT_SYMBOL(of_platform_bus_probe); | |||
| 166 | 166 | ||
| 167 | static int of_dev_node_match(struct device *dev, void *data) | 167 | static int of_dev_node_match(struct device *dev, void *data) |
| 168 | { | 168 | { |
| 169 | return to_of_device(dev)->node == data; | 169 | return to_of_device(dev)->dev.of_node == data; |
| 170 | } | 170 | } |
| 171 | 171 | ||
| 172 | struct of_device *of_find_device_by_node(struct device_node *np) | 172 | struct of_device *of_find_device_by_node(struct device_node *np) |
| @@ -184,7 +184,7 @@ EXPORT_SYMBOL(of_find_device_by_node); | |||
| 184 | static int of_dev_phandle_match(struct device *dev, void *data) | 184 | static int of_dev_phandle_match(struct device *dev, void *data) |
| 185 | { | 185 | { |
| 186 | phandle *ph = data; | 186 | phandle *ph = data; |
| 187 | return to_of_device(dev)->node->phandle == *ph; | 187 | return to_of_device(dev)->dev.of_node->phandle == *ph; |
| 188 | } | 188 | } |
| 189 | 189 | ||
| 190 | struct of_device *of_find_device_by_phandle(phandle ph) | 190 | struct of_device *of_find_device_by_phandle(phandle ph) |
diff --git a/arch/microblaze/pci/pci-common.c b/arch/microblaze/pci/pci-common.c index 9cb782b8e036..23be25fec4d6 100644 --- a/arch/microblaze/pci/pci-common.c +++ b/arch/microblaze/pci/pci-common.c | |||
| @@ -1277,6 +1277,7 @@ void pcibios_allocate_bus_resources(struct pci_bus *bus) | |||
| 1277 | printk(KERN_WARNING "PCI: Cannot allocate resource region " | 1277 | printk(KERN_WARNING "PCI: Cannot allocate resource region " |
| 1278 | "%d of PCI bridge %d, will remap\n", i, bus->number); | 1278 | "%d of PCI bridge %d, will remap\n", i, bus->number); |
| 1279 | clear_resource: | 1279 | clear_resource: |
| 1280 | res->start = res->end = 0; | ||
| 1280 | res->flags = 0; | 1281 | res->flags = 0; |
| 1281 | } | 1282 | } |
| 1282 | 1283 | ||
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 7e6fd1cbd3f8..cdaae942623d 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig | |||
| @@ -1075,6 +1075,8 @@ config CPU_LOONGSON2F | |||
| 1075 | bool "Loongson 2F" | 1075 | bool "Loongson 2F" |
| 1076 | depends on SYS_HAS_CPU_LOONGSON2F | 1076 | depends on SYS_HAS_CPU_LOONGSON2F |
| 1077 | select CPU_LOONGSON2 | 1077 | select CPU_LOONGSON2 |
| 1078 | select GENERIC_GPIO | ||
| 1079 | select ARCH_REQUIRE_GPIOLIB | ||
| 1078 | help | 1080 | help |
| 1079 | The Loongson 2F processor implements the MIPS III instruction set | 1081 | The Loongson 2F processor implements the MIPS III instruction set |
| 1080 | with many extensions. | 1082 | with many extensions. |
diff --git a/arch/mips/alchemy/common/dbdma.c b/arch/mips/alchemy/common/dbdma.c index 99ae84ce5af3..ca0506a8585a 100644 --- a/arch/mips/alchemy/common/dbdma.c +++ b/arch/mips/alchemy/common/dbdma.c | |||
| @@ -36,6 +36,7 @@ | |||
| 36 | #include <linux/spinlock.h> | 36 | #include <linux/spinlock.h> |
| 37 | #include <linux/interrupt.h> | 37 | #include <linux/interrupt.h> |
| 38 | #include <linux/module.h> | 38 | #include <linux/module.h> |
| 39 | #include <linux/sysdev.h> | ||
| 39 | #include <asm/mach-au1x00/au1000.h> | 40 | #include <asm/mach-au1x00/au1000.h> |
| 40 | #include <asm/mach-au1x00/au1xxx_dbdma.h> | 41 | #include <asm/mach-au1x00/au1xxx_dbdma.h> |
| 41 | 42 | ||
| @@ -174,10 +175,6 @@ static dbdev_tab_t dbdev_tab[] = { | |||
| 174 | 175 | ||
| 175 | #define DBDEV_TAB_SIZE ARRAY_SIZE(dbdev_tab) | 176 | #define DBDEV_TAB_SIZE ARRAY_SIZE(dbdev_tab) |
| 176 | 177 | ||
| 177 | #ifdef CONFIG_PM | ||
| 178 | static u32 au1xxx_dbdma_pm_regs[NUM_DBDMA_CHANS + 1][6]; | ||
| 179 | #endif | ||
| 180 | |||
| 181 | 178 | ||
| 182 | static chan_tab_t *chan_tab_ptr[NUM_DBDMA_CHANS]; | 179 | static chan_tab_t *chan_tab_ptr[NUM_DBDMA_CHANS]; |
| 183 | 180 | ||
| @@ -960,29 +957,37 @@ u32 au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr) | |||
| 960 | return nbytes; | 957 | return nbytes; |
| 961 | } | 958 | } |
| 962 | 959 | ||
| 963 | #ifdef CONFIG_PM | 960 | |
| 964 | void au1xxx_dbdma_suspend(void) | 961 | struct alchemy_dbdma_sysdev { |
| 962 | struct sys_device sysdev; | ||
| 963 | u32 pm_regs[NUM_DBDMA_CHANS + 1][6]; | ||
| 964 | }; | ||
| 965 | |||
| 966 | static int alchemy_dbdma_suspend(struct sys_device *dev, | ||
| 967 | pm_message_t state) | ||
| 965 | { | 968 | { |
| 969 | struct alchemy_dbdma_sysdev *sdev = | ||
| 970 | container_of(dev, struct alchemy_dbdma_sysdev, sysdev); | ||
| 966 | int i; | 971 | int i; |
| 967 | u32 addr; | 972 | u32 addr; |
| 968 | 973 | ||
| 969 | addr = DDMA_GLOBAL_BASE; | 974 | addr = DDMA_GLOBAL_BASE; |
| 970 | au1xxx_dbdma_pm_regs[0][0] = au_readl(addr + 0x00); | 975 | sdev->pm_regs[0][0] = au_readl(addr + 0x00); |
| 971 | au1xxx_dbdma_pm_regs[0][1] = au_readl(addr + 0x04); | 976 | sdev->pm_regs[0][1] = au_readl(addr + 0x04); |
| 972 | au1xxx_dbdma_pm_regs[0][2] = au_readl(addr + 0x08); | 977 | sdev->pm_regs[0][2] = au_readl(addr + 0x08); |
| 973 | au1xxx_dbdma_pm_regs[0][3] = au_readl(addr + 0x0c); | 978 | sdev->pm_regs[0][3] = au_readl(addr + 0x0c); |
| 974 | 979 | ||
| 975 | /* save channel configurations */ | 980 | /* save channel configurations */ |
| 976 | for (i = 1, addr = DDMA_CHANNEL_BASE; i <= NUM_DBDMA_CHANS; i++) { | 981 | for (i = 1, addr = DDMA_CHANNEL_BASE; i <= NUM_DBDMA_CHANS; i++) { |
| 977 | au1xxx_dbdma_pm_regs[i][0] = au_readl(addr + 0x00); | 982 | sdev->pm_regs[i][0] = au_readl(addr + 0x00); |
| 978 | au1xxx_dbdma_pm_regs[i][1] = au_readl(addr + 0x04); | 983 | sdev->pm_regs[i][1] = au_readl(addr + 0x04); |
| 979 | au1xxx_dbdma_pm_regs[i][2] = au_readl(addr + 0x08); | 984 | sdev->pm_regs[i][2] = au_readl(addr + 0x08); |
| 980 | au1xxx_dbdma_pm_regs[i][3] = au_readl(addr + 0x0c); | 985 | sdev->pm_regs[i][3] = au_readl(addr + 0x0c); |
| 981 | au1xxx_dbdma_pm_regs[i][4] = au_readl(addr + 0x10); | 986 | sdev->pm_regs[i][4] = au_readl(addr + 0x10); |
| 982 | au1xxx_dbdma_pm_regs[i][5] = au_readl(addr + 0x14); | 987 | sdev->pm_regs[i][5] = au_readl(addr + 0x14); |
| 983 | 988 | ||
| 984 | /* halt channel */ | 989 | /* halt channel */ |
| 985 | au_writel(au1xxx_dbdma_pm_regs[i][0] & ~1, addr + 0x00); | 990 | au_writel(sdev->pm_regs[i][0] & ~1, addr + 0x00); |
| 986 | au_sync(); | 991 | au_sync(); |
| 987 | while (!(au_readl(addr + 0x14) & 1)) | 992 | while (!(au_readl(addr + 0x14) & 1)) |
| 988 | au_sync(); | 993 | au_sync(); |
| @@ -992,32 +997,65 @@ void au1xxx_dbdma_suspend(void) | |||
| 992 | /* disable channel interrupts */ | 997 | /* disable channel interrupts */ |
| 993 | au_writel(0, DDMA_GLOBAL_BASE + 0x0c); | 998 | au_writel(0, DDMA_GLOBAL_BASE + 0x0c); |
| 994 | au_sync(); | 999 | au_sync(); |
| 1000 | |||
| 1001 | return 0; | ||
| 995 | } | 1002 | } |
| 996 | 1003 | ||
| 997 | void au1xxx_dbdma_resume(void) | 1004 | static int alchemy_dbdma_resume(struct sys_device *dev) |
| 998 | { | 1005 | { |
| 1006 | struct alchemy_dbdma_sysdev *sdev = | ||
| 1007 | container_of(dev, struct alchemy_dbdma_sysdev, sysdev); | ||
| 999 | int i; | 1008 | int i; |
| 1000 | u32 addr; | 1009 | u32 addr; |
| 1001 | 1010 | ||
| 1002 | addr = DDMA_GLOBAL_BASE; | 1011 | addr = DDMA_GLOBAL_BASE; |
| 1003 | au_writel(au1xxx_dbdma_pm_regs[0][0], addr + 0x00); | 1012 | au_writel(sdev->pm_regs[0][0], addr + 0x00); |
| 1004 | au_writel(au1xxx_dbdma_pm_regs[0][1], addr + 0x04); | 1013 | au_writel(sdev->pm_regs[0][1], addr + 0x04); |
| 1005 | au_writel(au1xxx_dbdma_pm_regs[0][2], addr + 0x08); | 1014 | au_writel(sdev->pm_regs[0][2], addr + 0x08); |
| 1006 | au_writel(au1xxx_dbdma_pm_regs[0][3], addr + 0x0c); | 1015 | au_writel(sdev->pm_regs[0][3], addr + 0x0c); |
| 1007 | 1016 | ||
| 1008 | /* restore channel configurations */ | 1017 | /* restore channel configurations */ |
| 1009 | for (i = 1, addr = DDMA_CHANNEL_BASE; i <= NUM_DBDMA_CHANS; i++) { | 1018 | for (i = 1, addr = DDMA_CHANNEL_BASE; i <= NUM_DBDMA_CHANS; i++) { |
| 1010 | au_writel(au1xxx_dbdma_pm_regs[i][0], addr + 0x00); | 1019 | au_writel(sdev->pm_regs[i][0], addr + 0x00); |
| 1011 | au_writel(au1xxx_dbdma_pm_regs[i][1], addr + 0x04); | 1020 | au_writel(sdev->pm_regs[i][1], addr + 0x04); |
| 1012 | au_writel(au1xxx_dbdma_pm_regs[i][2], addr + 0x08); | 1021 | au_writel(sdev->pm_regs[i][2], addr + 0x08); |
| 1013 | au_writel(au1xxx_dbdma_pm_regs[i][3], addr + 0x0c); | 1022 | au_writel(sdev->pm_regs[i][3], addr + 0x0c); |
| 1014 | au_writel(au1xxx_dbdma_pm_regs[i][4], addr + 0x10); | 1023 | au_writel(sdev->pm_regs[i][4], addr + 0x10); |
| 1015 | au_writel(au1xxx_dbdma_pm_regs[i][5], addr + 0x14); | 1024 | au_writel(sdev->pm_regs[i][5], addr + 0x14); |
| 1016 | au_sync(); | 1025 | au_sync(); |
| 1017 | addr += 0x100; /* next channel base */ | 1026 | addr += 0x100; /* next channel base */ |
| 1018 | } | 1027 | } |
| 1028 | |||
| 1029 | return 0; | ||
| 1030 | } | ||
| 1031 | |||
| 1032 | static struct sysdev_class alchemy_dbdma_sysdev_class = { | ||
| 1033 | .name = "dbdma", | ||
| 1034 | .suspend = alchemy_dbdma_suspend, | ||
| 1035 | .resume = alchemy_dbdma_resume, | ||
| 1036 | }; | ||
| 1037 | |||
| 1038 | static int __init alchemy_dbdma_sysdev_init(void) | ||
| 1039 | { | ||
| 1040 | struct alchemy_dbdma_sysdev *sdev; | ||
| 1041 | int ret; | ||
| 1042 | |||
| 1043 | ret = sysdev_class_register(&alchemy_dbdma_sysdev_class); | ||
| 1044 | if (ret) | ||
| 1045 | return ret; | ||
| 1046 | |||
| 1047 | sdev = kzalloc(sizeof(struct alchemy_dbdma_sysdev), GFP_KERNEL); | ||
| 1048 | if (!sdev) | ||
| 1049 | return -ENOMEM; | ||
| 1050 | |||
| 1051 | sdev->sysdev.id = -1; | ||
| 1052 | sdev->sysdev.cls = &alchemy_dbdma_sysdev_class; | ||
| 1053 | ret = sysdev_register(&sdev->sysdev); | ||
| 1054 | if (ret) | ||
| 1055 | kfree(sdev); | ||
| 1056 | |||
| 1057 | return ret; | ||
| 1019 | } | 1058 | } |
| 1020 | #endif /* CONFIG_PM */ | ||
| 1021 | 1059 | ||
| 1022 | static int __init au1xxx_dbdma_init(void) | 1060 | static int __init au1xxx_dbdma_init(void) |
| 1023 | { | 1061 | { |
| @@ -1046,6 +1084,11 @@ static int __init au1xxx_dbdma_init(void) | |||
| 1046 | else { | 1084 | else { |
| 1047 | dbdma_initialized = 1; | 1085 | dbdma_initialized = 1; |
| 1048 | printk(KERN_INFO "Alchemy DBDMA initialized\n"); | 1086 | printk(KERN_INFO "Alchemy DBDMA initialized\n"); |
| 1087 | ret = alchemy_dbdma_sysdev_init(); | ||
| 1088 | if (ret) { | ||
| 1089 | printk(KERN_ERR "DBDMA PM init failed\n"); | ||
| 1090 | ret = 0; | ||
| 1091 | } | ||
| 1049 | } | 1092 | } |
| 1050 | 1093 | ||
| 1051 | return ret; | 1094 | return ret; |
diff --git a/arch/mips/alchemy/common/irq.c b/arch/mips/alchemy/common/irq.c index b2821ace4d00..9f78ada83b3c 100644 --- a/arch/mips/alchemy/common/irq.c +++ b/arch/mips/alchemy/common/irq.c | |||
| @@ -29,6 +29,8 @@ | |||
| 29 | #include <linux/init.h> | 29 | #include <linux/init.h> |
| 30 | #include <linux/interrupt.h> | 30 | #include <linux/interrupt.h> |
| 31 | #include <linux/irq.h> | 31 | #include <linux/irq.h> |
| 32 | #include <linux/slab.h> | ||
| 33 | #include <linux/sysdev.h> | ||
| 32 | 34 | ||
| 33 | #include <asm/irq_cpu.h> | 35 | #include <asm/irq_cpu.h> |
| 34 | #include <asm/mipsregs.h> | 36 | #include <asm/mipsregs.h> |
| @@ -216,90 +218,6 @@ struct au1xxx_irqmap au1200_irqmap[] __initdata = { | |||
| 216 | }; | 218 | }; |
| 217 | 219 | ||
| 218 | 220 | ||
| 219 | #ifdef CONFIG_PM | ||
| 220 | |||
| 221 | /* | ||
| 222 | * Save/restore the interrupt controller state. | ||
| 223 | * Called from the save/restore core registers as part of the | ||
| 224 | * au_sleep function in power.c.....maybe I should just pm_register() | ||
| 225 | * them instead? | ||
| 226 | */ | ||
| 227 | static unsigned int sleep_intctl_config0[2]; | ||
| 228 | static unsigned int sleep_intctl_config1[2]; | ||
| 229 | static unsigned int sleep_intctl_config2[2]; | ||
| 230 | static unsigned int sleep_intctl_src[2]; | ||
| 231 | static unsigned int sleep_intctl_assign[2]; | ||
| 232 | static unsigned int sleep_intctl_wake[2]; | ||
| 233 | static unsigned int sleep_intctl_mask[2]; | ||
| 234 | |||
| 235 | void save_au1xxx_intctl(void) | ||
| 236 | { | ||
| 237 | sleep_intctl_config0[0] = au_readl(IC0_CFG0RD); | ||
| 238 | sleep_intctl_config1[0] = au_readl(IC0_CFG1RD); | ||
| 239 | sleep_intctl_config2[0] = au_readl(IC0_CFG2RD); | ||
| 240 | sleep_intctl_src[0] = au_readl(IC0_SRCRD); | ||
| 241 | sleep_intctl_assign[0] = au_readl(IC0_ASSIGNRD); | ||
| 242 | sleep_intctl_wake[0] = au_readl(IC0_WAKERD); | ||
| 243 | sleep_intctl_mask[0] = au_readl(IC0_MASKRD); | ||
| 244 | |||
| 245 | sleep_intctl_config0[1] = au_readl(IC1_CFG0RD); | ||
| 246 | sleep_intctl_config1[1] = au_readl(IC1_CFG1RD); | ||
| 247 | sleep_intctl_config2[1] = au_readl(IC1_CFG2RD); | ||
| 248 | sleep_intctl_src[1] = au_readl(IC1_SRCRD); | ||
| 249 | sleep_intctl_assign[1] = au_readl(IC1_ASSIGNRD); | ||
| 250 | sleep_intctl_wake[1] = au_readl(IC1_WAKERD); | ||
| 251 | sleep_intctl_mask[1] = au_readl(IC1_MASKRD); | ||
| 252 | } | ||
| 253 | |||
| 254 | /* | ||
| 255 | * For most restore operations, we clear the entire register and | ||
| 256 | * then set the bits we found during the save. | ||
| 257 | */ | ||
| 258 | void restore_au1xxx_intctl(void) | ||
| 259 | { | ||
| 260 | au_writel(0xffffffff, IC0_MASKCLR); au_sync(); | ||
| 261 | |||
| 262 | au_writel(0xffffffff, IC0_CFG0CLR); au_sync(); | ||
| 263 | au_writel(sleep_intctl_config0[0], IC0_CFG0SET); au_sync(); | ||
| 264 | au_writel(0xffffffff, IC0_CFG1CLR); au_sync(); | ||
| 265 | au_writel(sleep_intctl_config1[0], IC0_CFG1SET); au_sync(); | ||
| 266 | au_writel(0xffffffff, IC0_CFG2CLR); au_sync(); | ||
| 267 | au_writel(sleep_intctl_config2[0], IC0_CFG2SET); au_sync(); | ||
| 268 | au_writel(0xffffffff, IC0_SRCCLR); au_sync(); | ||
| 269 | au_writel(sleep_intctl_src[0], IC0_SRCSET); au_sync(); | ||
| 270 | au_writel(0xffffffff, IC0_ASSIGNCLR); au_sync(); | ||
| 271 | au_writel(sleep_intctl_assign[0], IC0_ASSIGNSET); au_sync(); | ||
| 272 | au_writel(0xffffffff, IC0_WAKECLR); au_sync(); | ||
| 273 | au_writel(sleep_intctl_wake[0], IC0_WAKESET); au_sync(); | ||
| 274 | au_writel(0xffffffff, IC0_RISINGCLR); au_sync(); | ||
| 275 | au_writel(0xffffffff, IC0_FALLINGCLR); au_sync(); | ||
| 276 | au_writel(0x00000000, IC0_TESTBIT); au_sync(); | ||
| 277 | |||
| 278 | au_writel(0xffffffff, IC1_MASKCLR); au_sync(); | ||
| 279 | |||
| 280 | au_writel(0xffffffff, IC1_CFG0CLR); au_sync(); | ||
| 281 | au_writel(sleep_intctl_config0[1], IC1_CFG0SET); au_sync(); | ||
| 282 | au_writel(0xffffffff, IC1_CFG1CLR); au_sync(); | ||
| 283 | au_writel(sleep_intctl_config1[1], IC1_CFG1SET); au_sync(); | ||
| 284 | au_writel(0xffffffff, IC1_CFG2CLR); au_sync(); | ||
| 285 | au_writel(sleep_intctl_config2[1], IC1_CFG2SET); au_sync(); | ||
| 286 | au_writel(0xffffffff, IC1_SRCCLR); au_sync(); | ||
| 287 | au_writel(sleep_intctl_src[1], IC1_SRCSET); au_sync(); | ||
| 288 | au_writel(0xffffffff, IC1_ASSIGNCLR); au_sync(); | ||
| 289 | au_writel(sleep_intctl_assign[1], IC1_ASSIGNSET); au_sync(); | ||
| 290 | au_writel(0xffffffff, IC1_WAKECLR); au_sync(); | ||
| 291 | au_writel(sleep_intctl_wake[1], IC1_WAKESET); au_sync(); | ||
| 292 | au_writel(0xffffffff, IC1_RISINGCLR); au_sync(); | ||
| 293 | au_writel(0xffffffff, IC1_FALLINGCLR); au_sync(); | ||
| 294 | au_writel(0x00000000, IC1_TESTBIT); au_sync(); | ||
| 295 | |||
| 296 | au_writel(sleep_intctl_mask[1], IC1_MASKSET); au_sync(); | ||
| 297 | |||
| 298 | au_writel(sleep_intctl_mask[0], IC0_MASKSET); au_sync(); | ||
| 299 | } | ||
| 300 | #endif /* CONFIG_PM */ | ||
| 301 | |||
| 302 | |||
| 303 | static void au1x_ic0_unmask(unsigned int irq_nr) | 221 | static void au1x_ic0_unmask(unsigned int irq_nr) |
| 304 | { | 222 | { |
| 305 | unsigned int bit = irq_nr - AU1000_INTC0_INT_BASE; | 223 | unsigned int bit = irq_nr - AU1000_INTC0_INT_BASE; |
| @@ -635,3 +553,91 @@ void __init arch_init_irq(void) | |||
| 635 | break; | 553 | break; |
| 636 | } | 554 | } |
| 637 | } | 555 | } |
| 556 | |||
| 557 | struct alchemy_ic_sysdev { | ||
| 558 | struct sys_device sysdev; | ||
| 559 | void __iomem *base; | ||
| 560 | unsigned long pmdata[7]; | ||
| 561 | }; | ||
| 562 | |||
| 563 | static int alchemy_ic_suspend(struct sys_device *dev, pm_message_t state) | ||
| 564 | { | ||
| 565 | struct alchemy_ic_sysdev *icdev = | ||
| 566 | container_of(dev, struct alchemy_ic_sysdev, sysdev); | ||
| 567 | |||
| 568 | icdev->pmdata[0] = __raw_readl(icdev->base + IC_CFG0RD); | ||
| 569 | icdev->pmdata[1] = __raw_readl(icdev->base + IC_CFG1RD); | ||
| 570 | icdev->pmdata[2] = __raw_readl(icdev->base + IC_CFG2RD); | ||
| 571 | icdev->pmdata[3] = __raw_readl(icdev->base + IC_SRCRD); | ||
| 572 | icdev->pmdata[4] = __raw_readl(icdev->base + IC_ASSIGNRD); | ||
| 573 | icdev->pmdata[5] = __raw_readl(icdev->base + IC_WAKERD); | ||
| 574 | icdev->pmdata[6] = __raw_readl(icdev->base + IC_MASKRD); | ||
| 575 | |||
| 576 | return 0; | ||
| 577 | } | ||
| 578 | |||
| 579 | static int alchemy_ic_resume(struct sys_device *dev) | ||
| 580 | { | ||
| 581 | struct alchemy_ic_sysdev *icdev = | ||
| 582 | container_of(dev, struct alchemy_ic_sysdev, sysdev); | ||
| 583 | |||
| 584 | __raw_writel(0xffffffff, icdev->base + IC_MASKCLR); | ||
| 585 | __raw_writel(0xffffffff, icdev->base + IC_CFG0CLR); | ||
| 586 | __raw_writel(0xffffffff, icdev->base + IC_CFG1CLR); | ||
| 587 | __raw_writel(0xffffffff, icdev->base + IC_CFG2CLR); | ||
| 588 | __raw_writel(0xffffffff, icdev->base + IC_SRCCLR); | ||
| 589 | __raw_writel(0xffffffff, icdev->base + IC_ASSIGNCLR); | ||
| 590 | __raw_writel(0xffffffff, icdev->base + IC_WAKECLR); | ||
| 591 | __raw_writel(0xffffffff, icdev->base + IC_RISINGCLR); | ||
| 592 | __raw_writel(0xffffffff, icdev->base + IC_FALLINGCLR); | ||
| 593 | __raw_writel(0x00000000, icdev->base + IC_TESTBIT); | ||
| 594 | wmb(); | ||
| 595 | __raw_writel(icdev->pmdata[0], icdev->base + IC_CFG0SET); | ||
| 596 | __raw_writel(icdev->pmdata[1], icdev->base + IC_CFG1SET); | ||
| 597 | __raw_writel(icdev->pmdata[2], icdev->base + IC_CFG2SET); | ||
| 598 | __raw_writel(icdev->pmdata[3], icdev->base + IC_SRCSET); | ||
| 599 | __raw_writel(icdev->pmdata[4], icdev->base + IC_ASSIGNSET); | ||
| 600 | __raw_writel(icdev->pmdata[5], icdev->base + IC_WAKESET); | ||
| 601 | wmb(); | ||
| 602 | |||
| 603 | __raw_writel(icdev->pmdata[6], icdev->base + IC_MASKSET); | ||
| 604 | wmb(); | ||
| 605 | |||
| 606 | return 0; | ||
| 607 | } | ||
| 608 | |||
| 609 | static struct sysdev_class alchemy_ic_sysdev_class = { | ||
| 610 | .name = "ic", | ||
| 611 | .suspend = alchemy_ic_suspend, | ||
| 612 | .resume = alchemy_ic_resume, | ||
| 613 | }; | ||
| 614 | |||
| 615 | static int __init alchemy_ic_sysdev_init(void) | ||
| 616 | { | ||
| 617 | struct alchemy_ic_sysdev *icdev; | ||
| 618 | unsigned long icbase[2] = { IC0_PHYS_ADDR, IC1_PHYS_ADDR }; | ||
| 619 | int err, i; | ||
| 620 | |||
| 621 | err = sysdev_class_register(&alchemy_ic_sysdev_class); | ||
| 622 | if (err) | ||
| 623 | return err; | ||
| 624 | |||
| 625 | for (i = 0; i < 2; i++) { | ||
| 626 | icdev = kzalloc(sizeof(struct alchemy_ic_sysdev), GFP_KERNEL); | ||
| 627 | if (!icdev) | ||
| 628 | return -ENOMEM; | ||
| 629 | |||
| 630 | icdev->base = ioremap(icbase[i], 0x1000); | ||
| 631 | |||
| 632 | icdev->sysdev.id = i; | ||
| 633 | icdev->sysdev.cls = &alchemy_ic_sysdev_class; | ||
| 634 | err = sysdev_register(&icdev->sysdev); | ||
| 635 | if (err) { | ||
| 636 | kfree(icdev); | ||
| 637 | return err; | ||
| 638 | } | ||
| 639 | } | ||
| 640 | |||
| 641 | return 0; | ||
| 642 | } | ||
| 643 | device_initcall(alchemy_ic_sysdev_init); | ||
diff --git a/arch/mips/alchemy/common/power.c b/arch/mips/alchemy/common/power.c index 6ab7b42aa1be..14eb8c492da2 100644 --- a/arch/mips/alchemy/common/power.c +++ b/arch/mips/alchemy/common/power.c | |||
| @@ -36,9 +36,6 @@ | |||
| 36 | 36 | ||
| 37 | #include <asm/uaccess.h> | 37 | #include <asm/uaccess.h> |
| 38 | #include <asm/mach-au1x00/au1000.h> | 38 | #include <asm/mach-au1x00/au1000.h> |
| 39 | #if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200) | ||
| 40 | #include <asm/mach-au1x00/au1xxx_dbdma.h> | ||
| 41 | #endif | ||
| 42 | 39 | ||
| 43 | #ifdef CONFIG_PM | 40 | #ifdef CONFIG_PM |
| 44 | 41 | ||
| @@ -106,9 +103,6 @@ static void save_core_regs(void) | |||
| 106 | sleep_usb[1] = au_readl(0xb4020024); /* OTG_MUX */ | 103 | sleep_usb[1] = au_readl(0xb4020024); /* OTG_MUX */ |
| 107 | #endif | 104 | #endif |
| 108 | 105 | ||
| 109 | /* Save interrupt controller state. */ | ||
| 110 | save_au1xxx_intctl(); | ||
| 111 | |||
| 112 | /* Clocks and PLLs. */ | 106 | /* Clocks and PLLs. */ |
| 113 | sleep_sys_clocks[0] = au_readl(SYS_FREQCTRL0); | 107 | sleep_sys_clocks[0] = au_readl(SYS_FREQCTRL0); |
| 114 | sleep_sys_clocks[1] = au_readl(SYS_FREQCTRL1); | 108 | sleep_sys_clocks[1] = au_readl(SYS_FREQCTRL1); |
| @@ -132,10 +126,6 @@ static void save_core_regs(void) | |||
| 132 | sleep_static_memctlr[3][0] = au_readl(MEM_STCFG3); | 126 | sleep_static_memctlr[3][0] = au_readl(MEM_STCFG3); |
| 133 | sleep_static_memctlr[3][1] = au_readl(MEM_STTIME3); | 127 | sleep_static_memctlr[3][1] = au_readl(MEM_STTIME3); |
| 134 | sleep_static_memctlr[3][2] = au_readl(MEM_STADDR3); | 128 | sleep_static_memctlr[3][2] = au_readl(MEM_STADDR3); |
| 135 | |||
| 136 | #if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200) | ||
| 137 | au1xxx_dbdma_suspend(); | ||
| 138 | #endif | ||
| 139 | } | 129 | } |
| 140 | 130 | ||
| 141 | static void restore_core_regs(void) | 131 | static void restore_core_regs(void) |
| @@ -199,12 +189,6 @@ static void restore_core_regs(void) | |||
| 199 | au_writel(sleep_uart0_linectl, UART0_ADDR + UART_LCR); au_sync(); | 189 | au_writel(sleep_uart0_linectl, UART0_ADDR + UART_LCR); au_sync(); |
| 200 | au_writel(sleep_uart0_clkdiv, UART0_ADDR + UART_CLK); au_sync(); | 190 | au_writel(sleep_uart0_clkdiv, UART0_ADDR + UART_CLK); au_sync(); |
| 201 | } | 191 | } |
| 202 | |||
| 203 | restore_au1xxx_intctl(); | ||
| 204 | |||
| 205 | #if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200) | ||
| 206 | au1xxx_dbdma_resume(); | ||
| 207 | #endif | ||
| 208 | } | 192 | } |
| 209 | 193 | ||
| 210 | void au_sleep(void) | 194 | void au_sleep(void) |
diff --git a/arch/mips/alchemy/devboards/pb1000/board_setup.c b/arch/mips/alchemy/devboards/pb1000/board_setup.c index b5311d8a29ab..4ef50d86b181 100644 --- a/arch/mips/alchemy/devboards/pb1000/board_setup.c +++ b/arch/mips/alchemy/devboards/pb1000/board_setup.c | |||
| @@ -27,8 +27,10 @@ | |||
| 27 | #include <linux/gpio.h> | 27 | #include <linux/gpio.h> |
| 28 | #include <linux/init.h> | 28 | #include <linux/init.h> |
| 29 | #include <linux/interrupt.h> | 29 | #include <linux/interrupt.h> |
| 30 | #include <linux/pm.h> | ||
| 30 | #include <asm/mach-au1x00/au1000.h> | 31 | #include <asm/mach-au1x00/au1000.h> |
| 31 | #include <asm/mach-pb1x00/pb1000.h> | 32 | #include <asm/mach-pb1x00/pb1000.h> |
| 33 | #include <asm/reboot.h> | ||
| 32 | #include <prom.h> | 34 | #include <prom.h> |
| 33 | 35 | ||
| 34 | #include "../platform.h" | 36 | #include "../platform.h" |
| @@ -38,8 +40,16 @@ const char *get_system_type(void) | |||
| 38 | return "Alchemy Pb1000"; | 40 | return "Alchemy Pb1000"; |
| 39 | } | 41 | } |
| 40 | 42 | ||
| 41 | void board_reset(void) | 43 | static void board_reset(char *c) |
| 42 | { | 44 | { |
| 45 | asm volatile ("jr %0" : : "r" (0xbfc00000)); | ||
| 46 | } | ||
| 47 | |||
| 48 | static void board_power_off(void) | ||
| 49 | { | ||
| 50 | printk(KERN_ALERT "It's now safe to remove power\n"); | ||
| 51 | while (1) | ||
| 52 | asm volatile (".set mips3 ; wait ; .set mips1"); | ||
| 43 | } | 53 | } |
| 44 | 54 | ||
| 45 | void __init board_setup(void) | 55 | void __init board_setup(void) |
| @@ -177,6 +187,10 @@ void __init board_setup(void) | |||
| 177 | au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL); | 187 | au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL); |
| 178 | break; | 188 | break; |
| 179 | } | 189 | } |
| 190 | |||
| 191 | pm_power_off = board_power_off; | ||
| 192 | _machine_halt = board_power_off; | ||
| 193 | _machine_restart = board_reset; | ||
| 180 | } | 194 | } |
| 181 | 195 | ||
| 182 | static int __init pb1000_init_irq(void) | 196 | static int __init pb1000_init_irq(void) |
diff --git a/arch/mips/alchemy/devboards/pb1100/board_setup.c b/arch/mips/alchemy/devboards/pb1100/board_setup.c index c7b4caa81a35..90dda5f3ecc5 100644 --- a/arch/mips/alchemy/devboards/pb1100/board_setup.c +++ b/arch/mips/alchemy/devboards/pb1100/board_setup.c | |||
| @@ -39,11 +39,6 @@ const char *get_system_type(void) | |||
| 39 | return "Alchemy Pb1100"; | 39 | return "Alchemy Pb1100"; |
| 40 | } | 40 | } |
| 41 | 41 | ||
| 42 | void board_reset(void) | ||
| 43 | { | ||
| 44 | bcsr_write(BCSR_SYSTEM, 0); | ||
| 45 | } | ||
| 46 | |||
| 47 | void __init board_setup(void) | 42 | void __init board_setup(void) |
| 48 | { | 43 | { |
| 49 | volatile void __iomem *base = (volatile void __iomem *)0xac000000UL; | 44 | volatile void __iomem *base = (volatile void __iomem *)0xac000000UL; |
diff --git a/arch/mips/alchemy/devboards/pb1200/board_setup.c b/arch/mips/alchemy/devboards/pb1200/board_setup.c index 3184063f8042..8b4466f2d44a 100644 --- a/arch/mips/alchemy/devboards/pb1200/board_setup.c +++ b/arch/mips/alchemy/devboards/pb1200/board_setup.c | |||
| @@ -48,12 +48,6 @@ const char *get_system_type(void) | |||
| 48 | return "Alchemy Pb1200"; | 48 | return "Alchemy Pb1200"; |
| 49 | } | 49 | } |
| 50 | 50 | ||
| 51 | void board_reset(void) | ||
| 52 | { | ||
| 53 | bcsr_write(BCSR_RESETS, 0); | ||
| 54 | bcsr_write(BCSR_SYSTEM, 0); | ||
| 55 | } | ||
| 56 | |||
| 57 | void __init board_setup(void) | 51 | void __init board_setup(void) |
| 58 | { | 52 | { |
| 59 | printk(KERN_INFO "AMD Alchemy Pb1200 Board\n"); | 53 | printk(KERN_INFO "AMD Alchemy Pb1200 Board\n"); |
diff --git a/arch/mips/alchemy/devboards/pb1500/board_setup.c b/arch/mips/alchemy/devboards/pb1500/board_setup.c index fa9770ac358a..9cd9dfa698e7 100644 --- a/arch/mips/alchemy/devboards/pb1500/board_setup.c +++ b/arch/mips/alchemy/devboards/pb1500/board_setup.c | |||
| @@ -45,11 +45,6 @@ const char *get_system_type(void) | |||
| 45 | return "Alchemy Pb1500"; | 45 | return "Alchemy Pb1500"; |
| 46 | } | 46 | } |
| 47 | 47 | ||
| 48 | void board_reset(void) | ||
| 49 | { | ||
| 50 | bcsr_write(BCSR_SYSTEM, 0); | ||
| 51 | } | ||
| 52 | |||
| 53 | void __init board_setup(void) | 48 | void __init board_setup(void) |
| 54 | { | 49 | { |
| 55 | u32 pin_func; | 50 | u32 pin_func; |
diff --git a/arch/mips/alchemy/devboards/pb1550/board_setup.c b/arch/mips/alchemy/devboards/pb1550/board_setup.c index 1e8fb3ddd726..9d7d6edafa8d 100644 --- a/arch/mips/alchemy/devboards/pb1550/board_setup.c +++ b/arch/mips/alchemy/devboards/pb1550/board_setup.c | |||
| @@ -48,11 +48,6 @@ const char *get_system_type(void) | |||
| 48 | return "Alchemy Pb1550"; | 48 | return "Alchemy Pb1550"; |
| 49 | } | 49 | } |
| 50 | 50 | ||
| 51 | void board_reset(void) | ||
| 52 | { | ||
| 53 | bcsr_write(BCSR_SYSTEM, 0); | ||
| 54 | } | ||
| 55 | |||
| 56 | void __init board_setup(void) | 51 | void __init board_setup(void) |
| 57 | { | 52 | { |
| 58 | u32 pin_func; | 53 | u32 pin_func; |
diff --git a/arch/mips/ar7/platform.c b/arch/mips/ar7/platform.c index 2fafc78e5ce1..566f2d7f2ea3 100644 --- a/arch/mips/ar7/platform.c +++ b/arch/mips/ar7/platform.c | |||
| @@ -576,7 +576,6 @@ static int __init ar7_register_devices(void) | |||
| 576 | { | 576 | { |
| 577 | void __iomem *bootcr; | 577 | void __iomem *bootcr; |
| 578 | u32 val; | 578 | u32 val; |
| 579 | u16 chip_id; | ||
| 580 | int res; | 579 | int res; |
| 581 | 580 | ||
| 582 | res = ar7_register_uarts(); | 581 | res = ar7_register_uarts(); |
| @@ -635,18 +634,10 @@ static int __init ar7_register_devices(void) | |||
| 635 | val = readl(bootcr); | 634 | val = readl(bootcr); |
| 636 | iounmap(bootcr); | 635 | iounmap(bootcr); |
| 637 | if (val & AR7_WDT_HW_ENA) { | 636 | if (val & AR7_WDT_HW_ENA) { |
| 638 | chip_id = ar7_chip_id(); | 637 | if (ar7_has_high_vlynq()) |
| 639 | switch (chip_id) { | ||
| 640 | case AR7_CHIP_7100: | ||
| 641 | case AR7_CHIP_7200: | ||
| 642 | ar7_wdt_res.start = AR7_REGS_WDT; | ||
| 643 | break; | ||
| 644 | case AR7_CHIP_7300: | ||
| 645 | ar7_wdt_res.start = UR8_REGS_WDT; | 638 | ar7_wdt_res.start = UR8_REGS_WDT; |
| 646 | break; | 639 | else |
| 647 | default: | 640 | ar7_wdt_res.start = AR7_REGS_WDT; |
| 648 | break; | ||
| 649 | } | ||
| 650 | 641 | ||
| 651 | ar7_wdt_res.end = ar7_wdt_res.start + 0x20; | 642 | ar7_wdt_res.end = ar7_wdt_res.start + 0x20; |
| 652 | res = platform_device_register(&ar7_wdt); | 643 | res = platform_device_register(&ar7_wdt); |
| @@ -656,4 +647,4 @@ static int __init ar7_register_devices(void) | |||
| 656 | 647 | ||
| 657 | return 0; | 648 | return 0; |
| 658 | } | 649 | } |
| 659 | arch_initcall(ar7_register_devices); | 650 | device_initcall(ar7_register_devices); |
diff --git a/arch/mips/bcm63xx/gpio.c b/arch/mips/bcm63xx/gpio.c index 315bc7f79ce1..f560fe7d38dd 100644 --- a/arch/mips/bcm63xx/gpio.c +++ b/arch/mips/bcm63xx/gpio.c | |||
| @@ -91,7 +91,7 @@ static int bcm63xx_gpio_set_direction(struct gpio_chip *chip, | |||
| 91 | 91 | ||
| 92 | spin_lock_irqsave(&bcm63xx_gpio_lock, flags); | 92 | spin_lock_irqsave(&bcm63xx_gpio_lock, flags); |
| 93 | tmp = bcm_gpio_readl(reg); | 93 | tmp = bcm_gpio_readl(reg); |
| 94 | if (dir == GPIO_DIR_IN) | 94 | if (dir == BCM63XX_GPIO_DIR_IN) |
| 95 | tmp &= ~mask; | 95 | tmp &= ~mask; |
| 96 | else | 96 | else |
| 97 | tmp |= mask; | 97 | tmp |= mask; |
| @@ -103,14 +103,14 @@ static int bcm63xx_gpio_set_direction(struct gpio_chip *chip, | |||
| 103 | 103 | ||
| 104 | static int bcm63xx_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) | 104 | static int bcm63xx_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) |
| 105 | { | 105 | { |
| 106 | return bcm63xx_gpio_set_direction(chip, gpio, GPIO_DIR_IN); | 106 | return bcm63xx_gpio_set_direction(chip, gpio, BCM63XX_GPIO_DIR_IN); |
| 107 | } | 107 | } |
| 108 | 108 | ||
| 109 | static int bcm63xx_gpio_direction_output(struct gpio_chip *chip, | 109 | static int bcm63xx_gpio_direction_output(struct gpio_chip *chip, |
| 110 | unsigned gpio, int value) | 110 | unsigned gpio, int value) |
| 111 | { | 111 | { |
| 112 | bcm63xx_gpio_set(chip, gpio, value); | 112 | bcm63xx_gpio_set(chip, gpio, value); |
| 113 | return bcm63xx_gpio_set_direction(chip, gpio, GPIO_DIR_OUT); | 113 | return bcm63xx_gpio_set_direction(chip, gpio, BCM63XX_GPIO_DIR_OUT); |
| 114 | } | 114 | } |
| 115 | 115 | ||
| 116 | 116 | ||
diff --git a/arch/mips/cavium-octeon/serial.c b/arch/mips/cavium-octeon/serial.c index 8240728d485a..83eac37a1ff9 100644 --- a/arch/mips/cavium-octeon/serial.c +++ b/arch/mips/cavium-octeon/serial.c | |||
| @@ -65,7 +65,11 @@ static void __init octeon_uart_set_common(struct plat_serial8250_port *p) | |||
| 65 | p->type = PORT_OCTEON; | 65 | p->type = PORT_OCTEON; |
| 66 | p->iotype = UPIO_MEM; | 66 | p->iotype = UPIO_MEM; |
| 67 | p->regshift = 3; /* I/O addresses are every 8 bytes */ | 67 | p->regshift = 3; /* I/O addresses are every 8 bytes */ |
| 68 | p->uartclk = mips_hpt_frequency; | 68 | if (octeon_is_simulation()) |
| 69 | /* Make simulator output fast*/ | ||
| 70 | p->uartclk = 115200 * 16; | ||
| 71 | else | ||
| 72 | p->uartclk = mips_hpt_frequency; | ||
| 69 | p->serial_in = octeon_serial_in; | 73 | p->serial_in = octeon_serial_in; |
| 70 | p->serial_out = octeon_serial_out; | 74 | p->serial_out = octeon_serial_out; |
| 71 | } | 75 | } |
diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c index 9a06fa9f9f0c..d1b5ffaf0281 100644 --- a/arch/mips/cavium-octeon/setup.c +++ b/arch/mips/cavium-octeon/setup.c | |||
| @@ -403,7 +403,6 @@ void __init prom_init(void) | |||
| 403 | const int coreid = cvmx_get_core_num(); | 403 | const int coreid = cvmx_get_core_num(); |
| 404 | int i; | 404 | int i; |
| 405 | int argc; | 405 | int argc; |
| 406 | struct uart_port octeon_port; | ||
| 407 | #ifdef CONFIG_CAVIUM_RESERVE32 | 406 | #ifdef CONFIG_CAVIUM_RESERVE32 |
| 408 | int64_t addr = -1; | 407 | int64_t addr = -1; |
| 409 | #endif | 408 | #endif |
| @@ -610,30 +609,6 @@ void __init prom_init(void) | |||
| 610 | _machine_restart = octeon_restart; | 609 | _machine_restart = octeon_restart; |
| 611 | _machine_halt = octeon_halt; | 610 | _machine_halt = octeon_halt; |
| 612 | 611 | ||
| 613 | memset(&octeon_port, 0, sizeof(octeon_port)); | ||
| 614 | /* | ||
| 615 | * For early_serial_setup we don't set the port type or | ||
| 616 | * UPF_FIXED_TYPE. | ||
| 617 | */ | ||
| 618 | octeon_port.flags = ASYNC_SKIP_TEST | UPF_SHARE_IRQ; | ||
| 619 | octeon_port.iotype = UPIO_MEM; | ||
| 620 | /* I/O addresses are every 8 bytes */ | ||
| 621 | octeon_port.regshift = 3; | ||
| 622 | /* Clock rate of the chip */ | ||
| 623 | octeon_port.uartclk = mips_hpt_frequency; | ||
| 624 | octeon_port.fifosize = 64; | ||
| 625 | octeon_port.mapbase = 0x0001180000000800ull + (1024 * octeon_uart); | ||
| 626 | octeon_port.membase = cvmx_phys_to_ptr(octeon_port.mapbase); | ||
| 627 | octeon_port.serial_in = octeon_serial_in; | ||
| 628 | octeon_port.serial_out = octeon_serial_out; | ||
| 629 | #ifdef CONFIG_CAVIUM_OCTEON_2ND_KERNEL | ||
| 630 | octeon_port.line = 0; | ||
| 631 | #else | ||
| 632 | octeon_port.line = octeon_uart; | ||
| 633 | #endif | ||
| 634 | octeon_port.irq = 42 + octeon_uart; | ||
| 635 | early_serial_setup(&octeon_port); | ||
| 636 | |||
| 637 | octeon_user_io_init(); | 612 | octeon_user_io_init(); |
| 638 | register_smp_ops(&octeon_smp_ops); | 613 | register_smp_ops(&octeon_smp_ops); |
| 639 | } | 614 | } |
| @@ -727,7 +702,7 @@ int prom_putchar(char c) | |||
| 727 | } while ((lsrval & 0x20) == 0); | 702 | } while ((lsrval & 0x20) == 0); |
| 728 | 703 | ||
| 729 | /* Write the byte */ | 704 | /* Write the byte */ |
| 730 | cvmx_write_csr(CVMX_MIO_UARTX_THR(octeon_uart), c); | 705 | cvmx_write_csr(CVMX_MIO_UARTX_THR(octeon_uart), c & 0xffull); |
| 731 | return 1; | 706 | return 1; |
| 732 | } | 707 | } |
| 733 | 708 | ||
diff --git a/arch/mips/configs/ar7_defconfig b/arch/mips/configs/ar7_defconfig index 5a5b6ba7514e..e70009584090 100644 --- a/arch/mips/configs/ar7_defconfig +++ b/arch/mips/configs/ar7_defconfig | |||
| @@ -1,7 +1,7 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.30 | 3 | # Linux kernel version: 2.6.34-rc6 |
| 4 | # Wed Jun 24 14:08:59 2009 | 4 | # Sat May 1 11:35:01 2010 |
| 5 | # | 5 | # |
| 6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
| 7 | 7 | ||
| @@ -11,11 +11,12 @@ CONFIG_MIPS=y | |||
| 11 | # CONFIG_MACH_ALCHEMY is not set | 11 | # CONFIG_MACH_ALCHEMY is not set |
| 12 | CONFIG_AR7=y | 12 | CONFIG_AR7=y |
| 13 | # CONFIG_BCM47XX is not set | 13 | # CONFIG_BCM47XX is not set |
| 14 | # CONFIG_BCM63XX is not set | ||
| 14 | # CONFIG_MIPS_COBALT is not set | 15 | # CONFIG_MIPS_COBALT is not set |
| 15 | # CONFIG_MACH_DECSTATION is not set | 16 | # CONFIG_MACH_DECSTATION is not set |
| 16 | # CONFIG_MACH_JAZZ is not set | 17 | # CONFIG_MACH_JAZZ is not set |
| 17 | # CONFIG_LASAT is not set | 18 | # CONFIG_LASAT is not set |
| 18 | # CONFIG_LEMOTE_FULONG is not set | 19 | # CONFIG_MACH_LOONGSON is not set |
| 19 | # CONFIG_MIPS_MALTA is not set | 20 | # CONFIG_MIPS_MALTA is not set |
| 20 | # CONFIG_MIPS_SIM is not set | 21 | # CONFIG_MIPS_SIM is not set |
| 21 | # CONFIG_NEC_MARKEINS is not set | 22 | # CONFIG_NEC_MARKEINS is not set |
| @@ -26,6 +27,7 @@ CONFIG_AR7=y | |||
| 26 | # CONFIG_PNX8550_STB810 is not set | 27 | # CONFIG_PNX8550_STB810 is not set |
| 27 | # CONFIG_PMC_MSP is not set | 28 | # CONFIG_PMC_MSP is not set |
| 28 | # CONFIG_PMC_YOSEMITE is not set | 29 | # CONFIG_PMC_YOSEMITE is not set |
| 30 | # CONFIG_POWERTV is not set | ||
| 29 | # CONFIG_SGI_IP22 is not set | 31 | # CONFIG_SGI_IP22 is not set |
| 30 | # CONFIG_SGI_IP27 is not set | 32 | # CONFIG_SGI_IP27 is not set |
| 31 | # CONFIG_SGI_IP28 is not set | 33 | # CONFIG_SGI_IP28 is not set |
| @@ -46,6 +48,7 @@ CONFIG_AR7=y | |||
| 46 | # CONFIG_CAVIUM_OCTEON_SIMULATOR is not set | 48 | # CONFIG_CAVIUM_OCTEON_SIMULATOR is not set |
| 47 | # CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set | 49 | # CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set |
| 48 | # CONFIG_ALCHEMY_GPIO_INDIRECT is not set | 50 | # CONFIG_ALCHEMY_GPIO_INDIRECT is not set |
| 51 | CONFIG_LOONGSON_UART_BASE=y | ||
| 49 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | 52 | CONFIG_RWSEM_GENERIC_SPINLOCK=y |
| 50 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | 53 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set |
| 51 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | 54 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set |
| @@ -63,10 +66,8 @@ CONFIG_CEVT_R4K=y | |||
| 63 | CONFIG_CSRC_R4K_LIB=y | 66 | CONFIG_CSRC_R4K_LIB=y |
| 64 | CONFIG_CSRC_R4K=y | 67 | CONFIG_CSRC_R4K=y |
| 65 | CONFIG_DMA_NONCOHERENT=y | 68 | CONFIG_DMA_NONCOHERENT=y |
| 66 | CONFIG_DMA_NEED_PCI_MAP_STATE=y | 69 | CONFIG_NEED_DMA_MAP_STATE=y |
| 67 | CONFIG_EARLY_PRINTK=y | ||
| 68 | CONFIG_SYS_HAS_EARLY_PRINTK=y | 70 | CONFIG_SYS_HAS_EARLY_PRINTK=y |
| 69 | # CONFIG_HOTPLUG_CPU is not set | ||
| 70 | # CONFIG_NO_IOPORT is not set | 71 | # CONFIG_NO_IOPORT is not set |
| 71 | CONFIG_GENERIC_GPIO=y | 72 | CONFIG_GENERIC_GPIO=y |
| 72 | # CONFIG_CPU_BIG_ENDIAN is not set | 73 | # CONFIG_CPU_BIG_ENDIAN is not set |
| @@ -81,7 +82,8 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5 | |||
| 81 | # | 82 | # |
| 82 | # CPU selection | 83 | # CPU selection |
| 83 | # | 84 | # |
| 84 | # CONFIG_CPU_LOONGSON2 is not set | 85 | # CONFIG_CPU_LOONGSON2E is not set |
| 86 | # CONFIG_CPU_LOONGSON2F is not set | ||
| 85 | CONFIG_CPU_MIPS32_R1=y | 87 | CONFIG_CPU_MIPS32_R1=y |
| 86 | # CONFIG_CPU_MIPS32_R2 is not set | 88 | # CONFIG_CPU_MIPS32_R2 is not set |
| 87 | # CONFIG_CPU_MIPS64_R1 is not set | 89 | # CONFIG_CPU_MIPS64_R1 is not set |
| @@ -103,6 +105,8 @@ CONFIG_CPU_MIPS32_R1=y | |||
| 103 | # CONFIG_CPU_RM9000 is not set | 105 | # CONFIG_CPU_RM9000 is not set |
| 104 | # CONFIG_CPU_SB1 is not set | 106 | # CONFIG_CPU_SB1 is not set |
| 105 | # CONFIG_CPU_CAVIUM_OCTEON is not set | 107 | # CONFIG_CPU_CAVIUM_OCTEON is not set |
| 108 | CONFIG_SYS_SUPPORTS_ZBOOT=y | ||
| 109 | CONFIG_SYS_SUPPORTS_ZBOOT_UART16550=y | ||
| 106 | CONFIG_SYS_HAS_CPU_MIPS32_R1=y | 110 | CONFIG_SYS_HAS_CPU_MIPS32_R1=y |
| 107 | CONFIG_CPU_MIPS32=y | 111 | CONFIG_CPU_MIPS32=y |
| 108 | CONFIG_CPU_MIPSR1=y | 112 | CONFIG_CPU_MIPSR1=y |
| @@ -124,6 +128,7 @@ CONFIG_CPU_HAS_PREFETCH=y | |||
| 124 | CONFIG_MIPS_MT_DISABLED=y | 128 | CONFIG_MIPS_MT_DISABLED=y |
| 125 | # CONFIG_MIPS_MT_SMP is not set | 129 | # CONFIG_MIPS_MT_SMP is not set |
| 126 | # CONFIG_MIPS_MT_SMTC is not set | 130 | # CONFIG_MIPS_MT_SMTC is not set |
| 131 | # CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set | ||
| 127 | CONFIG_CPU_HAS_SYNC=y | 132 | CONFIG_CPU_HAS_SYNC=y |
| 128 | CONFIG_GENERIC_HARDIRQS=y | 133 | CONFIG_GENERIC_HARDIRQS=y |
| 129 | CONFIG_GENERIC_IRQ_PROBE=y | 134 | CONFIG_GENERIC_IRQ_PROBE=y |
| @@ -141,8 +146,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4 | |||
| 141 | # CONFIG_PHYS_ADDR_T_64BIT is not set | 146 | # CONFIG_PHYS_ADDR_T_64BIT is not set |
| 142 | CONFIG_ZONE_DMA_FLAG=0 | 147 | CONFIG_ZONE_DMA_FLAG=0 |
| 143 | CONFIG_VIRT_TO_BUS=y | 148 | CONFIG_VIRT_TO_BUS=y |
| 144 | CONFIG_HAVE_MLOCK=y | 149 | # CONFIG_KSM is not set |
| 145 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | ||
| 146 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | 150 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 |
| 147 | CONFIG_TICK_ONESHOT=y | 151 | CONFIG_TICK_ONESHOT=y |
| 148 | # CONFIG_NO_HZ is not set | 152 | # CONFIG_NO_HZ is not set |
| @@ -165,6 +169,7 @@ CONFIG_KEXEC=y | |||
| 165 | CONFIG_LOCKDEP_SUPPORT=y | 169 | CONFIG_LOCKDEP_SUPPORT=y |
| 166 | CONFIG_STACKTRACE_SUPPORT=y | 170 | CONFIG_STACKTRACE_SUPPORT=y |
| 167 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | 171 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" |
| 172 | CONFIG_CONSTRUCTORS=y | ||
| 168 | 173 | ||
| 169 | # | 174 | # |
| 170 | # General setup | 175 | # General setup |
| @@ -174,6 +179,14 @@ CONFIG_BROKEN_ON_SMP=y | |||
| 174 | CONFIG_INIT_ENV_ARG_LIMIT=32 | 179 | CONFIG_INIT_ENV_ARG_LIMIT=32 |
| 175 | CONFIG_LOCALVERSION="" | 180 | CONFIG_LOCALVERSION="" |
| 176 | # CONFIG_LOCALVERSION_AUTO is not set | 181 | # CONFIG_LOCALVERSION_AUTO is not set |
| 182 | CONFIG_HAVE_KERNEL_GZIP=y | ||
| 183 | CONFIG_HAVE_KERNEL_BZIP2=y | ||
| 184 | CONFIG_HAVE_KERNEL_LZMA=y | ||
| 185 | CONFIG_HAVE_KERNEL_LZO=y | ||
| 186 | # CONFIG_KERNEL_GZIP is not set | ||
| 187 | # CONFIG_KERNEL_BZIP2 is not set | ||
| 188 | CONFIG_KERNEL_LZMA=y | ||
| 189 | # CONFIG_KERNEL_LZO is not set | ||
| 177 | CONFIG_SWAP=y | 190 | CONFIG_SWAP=y |
| 178 | CONFIG_SYSVIPC=y | 191 | CONFIG_SYSVIPC=y |
| 179 | CONFIG_SYSVIPC_SYSCTL=y | 192 | CONFIG_SYSVIPC_SYSCTL=y |
| @@ -186,14 +199,12 @@ CONFIG_BSD_PROCESS_ACCT=y | |||
| 186 | # | 199 | # |
| 187 | # RCU Subsystem | 200 | # RCU Subsystem |
| 188 | # | 201 | # |
| 189 | CONFIG_CLASSIC_RCU=y | ||
| 190 | # CONFIG_TREE_RCU is not set | 202 | # CONFIG_TREE_RCU is not set |
| 191 | # CONFIG_PREEMPT_RCU is not set | 203 | # CONFIG_TREE_PREEMPT_RCU is not set |
| 204 | CONFIG_TINY_RCU=y | ||
| 192 | # CONFIG_TREE_RCU_TRACE is not set | 205 | # CONFIG_TREE_RCU_TRACE is not set |
| 193 | # CONFIG_PREEMPT_RCU_TRACE is not set | ||
| 194 | # CONFIG_IKCONFIG is not set | 206 | # CONFIG_IKCONFIG is not set |
| 195 | CONFIG_LOG_BUF_SHIFT=14 | 207 | CONFIG_LOG_BUF_SHIFT=14 |
| 196 | # CONFIG_GROUP_SCHED is not set | ||
| 197 | # CONFIG_CGROUPS is not set | 208 | # CONFIG_CGROUPS is not set |
| 198 | CONFIG_SYSFS_DEPRECATED=y | 209 | CONFIG_SYSFS_DEPRECATED=y |
| 199 | CONFIG_SYSFS_DEPRECATED_V2=y | 210 | CONFIG_SYSFS_DEPRECATED_V2=y |
| @@ -204,6 +215,7 @@ CONFIG_INITRAMFS_SOURCE="" | |||
| 204 | CONFIG_RD_GZIP=y | 215 | CONFIG_RD_GZIP=y |
| 205 | # CONFIG_RD_BZIP2 is not set | 216 | # CONFIG_RD_BZIP2 is not set |
| 206 | CONFIG_RD_LZMA=y | 217 | CONFIG_RD_LZMA=y |
| 218 | # CONFIG_RD_LZO is not set | ||
| 207 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | 219 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y |
| 208 | CONFIG_SYSCTL=y | 220 | CONFIG_SYSCTL=y |
| 209 | CONFIG_ANON_INODES=y | 221 | CONFIG_ANON_INODES=y |
| @@ -225,19 +237,22 @@ CONFIG_SHMEM=y | |||
| 225 | CONFIG_AIO=y | 237 | CONFIG_AIO=y |
| 226 | 238 | ||
| 227 | # | 239 | # |
| 228 | # Performance Counters | 240 | # Kernel Performance Events And Counters |
| 229 | # | 241 | # |
| 230 | # CONFIG_VM_EVENT_COUNTERS is not set | 242 | # CONFIG_VM_EVENT_COUNTERS is not set |
| 231 | CONFIG_STRIP_ASM_SYMS=y | ||
| 232 | # CONFIG_COMPAT_BRK is not set | 243 | # CONFIG_COMPAT_BRK is not set |
| 233 | CONFIG_SLAB=y | 244 | CONFIG_SLAB=y |
| 234 | # CONFIG_SLUB is not set | 245 | # CONFIG_SLUB is not set |
| 235 | # CONFIG_SLOB is not set | 246 | # CONFIG_SLOB is not set |
| 236 | # CONFIG_PROFILING is not set | 247 | # CONFIG_PROFILING is not set |
| 237 | # CONFIG_MARKERS is not set | ||
| 238 | CONFIG_HAVE_OPROFILE=y | 248 | CONFIG_HAVE_OPROFILE=y |
| 249 | |||
| 250 | # | ||
| 251 | # GCOV-based kernel profiling | ||
| 252 | # | ||
| 253 | # CONFIG_GCOV_KERNEL is not set | ||
| 239 | # CONFIG_SLOW_WORK is not set | 254 | # CONFIG_SLOW_WORK is not set |
| 240 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set | 255 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y |
| 241 | CONFIG_SLABINFO=y | 256 | CONFIG_SLABINFO=y |
| 242 | CONFIG_RT_MUTEXES=y | 257 | CONFIG_RT_MUTEXES=y |
| 243 | CONFIG_BASE_SMALL=0 | 258 | CONFIG_BASE_SMALL=0 |
| @@ -248,7 +263,7 @@ CONFIG_MODULE_UNLOAD=y | |||
| 248 | # CONFIG_MODVERSIONS is not set | 263 | # CONFIG_MODVERSIONS is not set |
| 249 | # CONFIG_MODULE_SRCVERSION_ALL is not set | 264 | # CONFIG_MODULE_SRCVERSION_ALL is not set |
| 250 | CONFIG_BLOCK=y | 265 | CONFIG_BLOCK=y |
| 251 | # CONFIG_LBD is not set | 266 | # CONFIG_LBDAF is not set |
| 252 | # CONFIG_BLK_DEV_BSG is not set | 267 | # CONFIG_BLK_DEV_BSG is not set |
| 253 | # CONFIG_BLK_DEV_INTEGRITY is not set | 268 | # CONFIG_BLK_DEV_INTEGRITY is not set |
| 254 | 269 | ||
| @@ -256,14 +271,41 @@ CONFIG_BLOCK=y | |||
| 256 | # IO Schedulers | 271 | # IO Schedulers |
| 257 | # | 272 | # |
| 258 | CONFIG_IOSCHED_NOOP=y | 273 | CONFIG_IOSCHED_NOOP=y |
| 259 | # CONFIG_IOSCHED_AS is not set | ||
| 260 | CONFIG_IOSCHED_DEADLINE=y | 274 | CONFIG_IOSCHED_DEADLINE=y |
| 261 | # CONFIG_IOSCHED_CFQ is not set | 275 | # CONFIG_IOSCHED_CFQ is not set |
| 262 | # CONFIG_DEFAULT_AS is not set | ||
| 263 | CONFIG_DEFAULT_DEADLINE=y | 276 | CONFIG_DEFAULT_DEADLINE=y |
| 264 | # CONFIG_DEFAULT_CFQ is not set | 277 | # CONFIG_DEFAULT_CFQ is not set |
| 265 | # CONFIG_DEFAULT_NOOP is not set | 278 | # CONFIG_DEFAULT_NOOP is not set |
| 266 | CONFIG_DEFAULT_IOSCHED="deadline" | 279 | CONFIG_DEFAULT_IOSCHED="deadline" |
| 280 | # CONFIG_INLINE_SPIN_TRYLOCK is not set | ||
| 281 | # CONFIG_INLINE_SPIN_TRYLOCK_BH is not set | ||
| 282 | # CONFIG_INLINE_SPIN_LOCK is not set | ||
| 283 | # CONFIG_INLINE_SPIN_LOCK_BH is not set | ||
| 284 | # CONFIG_INLINE_SPIN_LOCK_IRQ is not set | ||
| 285 | # CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set | ||
| 286 | CONFIG_INLINE_SPIN_UNLOCK=y | ||
| 287 | # CONFIG_INLINE_SPIN_UNLOCK_BH is not set | ||
| 288 | CONFIG_INLINE_SPIN_UNLOCK_IRQ=y | ||
| 289 | # CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set | ||
| 290 | # CONFIG_INLINE_READ_TRYLOCK is not set | ||
| 291 | # CONFIG_INLINE_READ_LOCK is not set | ||
| 292 | # CONFIG_INLINE_READ_LOCK_BH is not set | ||
| 293 | # CONFIG_INLINE_READ_LOCK_IRQ is not set | ||
| 294 | # CONFIG_INLINE_READ_LOCK_IRQSAVE is not set | ||
| 295 | CONFIG_INLINE_READ_UNLOCK=y | ||
| 296 | # CONFIG_INLINE_READ_UNLOCK_BH is not set | ||
| 297 | CONFIG_INLINE_READ_UNLOCK_IRQ=y | ||
| 298 | # CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set | ||
| 299 | # CONFIG_INLINE_WRITE_TRYLOCK is not set | ||
| 300 | # CONFIG_INLINE_WRITE_LOCK is not set | ||
| 301 | # CONFIG_INLINE_WRITE_LOCK_BH is not set | ||
| 302 | # CONFIG_INLINE_WRITE_LOCK_IRQ is not set | ||
| 303 | # CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set | ||
| 304 | CONFIG_INLINE_WRITE_UNLOCK=y | ||
| 305 | # CONFIG_INLINE_WRITE_UNLOCK_BH is not set | ||
| 306 | CONFIG_INLINE_WRITE_UNLOCK_IRQ=y | ||
| 307 | # CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set | ||
| 308 | # CONFIG_MUTEX_SPIN_ON_OWNER is not set | ||
| 267 | # CONFIG_FREEZER is not set | 309 | # CONFIG_FREEZER is not set |
| 268 | 310 | ||
| 269 | # | 311 | # |
| @@ -293,7 +335,6 @@ CONFIG_NET=y | |||
| 293 | # Networking options | 335 | # Networking options |
| 294 | # | 336 | # |
| 295 | CONFIG_PACKET=y | 337 | CONFIG_PACKET=y |
| 296 | CONFIG_PACKET_MMAP=y | ||
| 297 | CONFIG_UNIX=y | 338 | CONFIG_UNIX=y |
| 298 | # CONFIG_NET_KEY is not set | 339 | # CONFIG_NET_KEY is not set |
| 299 | CONFIG_INET=y | 340 | CONFIG_INET=y |
| @@ -377,6 +418,7 @@ CONFIG_NF_CONNTRACK_TFTP=m | |||
| 377 | CONFIG_NETFILTER_XTABLES=m | 418 | CONFIG_NETFILTER_XTABLES=m |
| 378 | # CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set | 419 | # CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set |
| 379 | # CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set | 420 | # CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set |
| 421 | # CONFIG_NETFILTER_XT_TARGET_CT is not set | ||
| 380 | # CONFIG_NETFILTER_XT_TARGET_DSCP is not set | 422 | # CONFIG_NETFILTER_XT_TARGET_DSCP is not set |
| 381 | # CONFIG_NETFILTER_XT_TARGET_HL is not set | 423 | # CONFIG_NETFILTER_XT_TARGET_HL is not set |
| 382 | # CONFIG_NETFILTER_XT_TARGET_LED is not set | 424 | # CONFIG_NETFILTER_XT_TARGET_LED is not set |
| @@ -458,6 +500,7 @@ CONFIG_IP_NF_RAW=m | |||
| 458 | # CONFIG_IP_NF_ARPTABLES is not set | 500 | # CONFIG_IP_NF_ARPTABLES is not set |
| 459 | # CONFIG_IP_DCCP is not set | 501 | # CONFIG_IP_DCCP is not set |
| 460 | # CONFIG_IP_SCTP is not set | 502 | # CONFIG_IP_SCTP is not set |
| 503 | # CONFIG_RDS is not set | ||
| 461 | # CONFIG_TIPC is not set | 504 | # CONFIG_TIPC is not set |
| 462 | CONFIG_ATM=m | 505 | CONFIG_ATM=m |
| 463 | # CONFIG_ATM_CLIP is not set | 506 | # CONFIG_ATM_CLIP is not set |
| @@ -466,6 +509,7 @@ CONFIG_ATM_BR2684=m | |||
| 466 | CONFIG_ATM_BR2684_IPFILTER=y | 509 | CONFIG_ATM_BR2684_IPFILTER=y |
| 467 | CONFIG_STP=y | 510 | CONFIG_STP=y |
| 468 | CONFIG_BRIDGE=y | 511 | CONFIG_BRIDGE=y |
| 512 | CONFIG_BRIDGE_IGMP_SNOOPING=y | ||
| 469 | # CONFIG_NET_DSA is not set | 513 | # CONFIG_NET_DSA is not set |
| 470 | CONFIG_VLAN_8021Q=y | 514 | CONFIG_VLAN_8021Q=y |
| 471 | # CONFIG_VLAN_8021Q_GVRP is not set | 515 | # CONFIG_VLAN_8021Q_GVRP is not set |
| @@ -541,20 +585,19 @@ CONFIG_HAMRADIO=y | |||
| 541 | # CONFIG_AF_RXRPC is not set | 585 | # CONFIG_AF_RXRPC is not set |
| 542 | CONFIG_FIB_RULES=y | 586 | CONFIG_FIB_RULES=y |
| 543 | CONFIG_WIRELESS=y | 587 | CONFIG_WIRELESS=y |
| 588 | CONFIG_WEXT_CORE=y | ||
| 589 | CONFIG_WEXT_PROC=y | ||
| 544 | CONFIG_CFG80211=m | 590 | CONFIG_CFG80211=m |
| 591 | # CONFIG_NL80211_TESTMODE is not set | ||
| 592 | # CONFIG_CFG80211_DEVELOPER_WARNINGS is not set | ||
| 545 | # CONFIG_CFG80211_REG_DEBUG is not set | 593 | # CONFIG_CFG80211_REG_DEBUG is not set |
| 594 | CONFIG_CFG80211_DEFAULT_PS=y | ||
| 546 | # CONFIG_CFG80211_DEBUGFS is not set | 595 | # CONFIG_CFG80211_DEBUGFS is not set |
| 547 | # CONFIG_WIRELESS_OLD_REGULATORY is not set | 596 | # CONFIG_CFG80211_INTERNAL_REGDB is not set |
| 548 | CONFIG_WIRELESS_EXT=y | 597 | CONFIG_CFG80211_WEXT=y |
| 549 | CONFIG_WIRELESS_EXT_SYSFS=y | 598 | CONFIG_WIRELESS_EXT_SYSFS=y |
| 550 | # CONFIG_LIB80211 is not set | 599 | # CONFIG_LIB80211 is not set |
| 551 | CONFIG_MAC80211=m | 600 | CONFIG_MAC80211=m |
| 552 | CONFIG_MAC80211_DEFAULT_PS=y | ||
| 553 | CONFIG_MAC80211_DEFAULT_PS_VALUE=1 | ||
| 554 | |||
| 555 | # | ||
| 556 | # Rate control algorithm selection | ||
| 557 | # | ||
| 558 | CONFIG_MAC80211_RC_PID=y | 601 | CONFIG_MAC80211_RC_PID=y |
| 559 | CONFIG_MAC80211_RC_MINSTREL=y | 602 | CONFIG_MAC80211_RC_MINSTREL=y |
| 560 | CONFIG_MAC80211_RC_DEFAULT_PID=y | 603 | CONFIG_MAC80211_RC_DEFAULT_PID=y |
| @@ -576,6 +619,7 @@ CONFIG_MAC80211_RC_DEFAULT="pid" | |||
| 576 | # Generic Driver Options | 619 | # Generic Driver Options |
| 577 | # | 620 | # |
| 578 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 621 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 622 | # CONFIG_DEVTMPFS is not set | ||
| 579 | CONFIG_STANDALONE=y | 623 | CONFIG_STANDALONE=y |
| 580 | CONFIG_PREVENT_FIRMWARE_BUILD=y | 624 | CONFIG_PREVENT_FIRMWARE_BUILD=y |
| 581 | CONFIG_FW_LOADER=y | 625 | CONFIG_FW_LOADER=y |
| @@ -585,9 +629,9 @@ CONFIG_EXTRA_FIRMWARE="" | |||
| 585 | # CONFIG_CONNECTOR is not set | 629 | # CONFIG_CONNECTOR is not set |
| 586 | CONFIG_MTD=y | 630 | CONFIG_MTD=y |
| 587 | # CONFIG_MTD_DEBUG is not set | 631 | # CONFIG_MTD_DEBUG is not set |
| 632 | # CONFIG_MTD_TESTS is not set | ||
| 588 | # CONFIG_MTD_CONCAT is not set | 633 | # CONFIG_MTD_CONCAT is not set |
| 589 | CONFIG_MTD_PARTITIONS=y | 634 | CONFIG_MTD_PARTITIONS=y |
| 590 | # CONFIG_MTD_TESTS is not set | ||
| 591 | # CONFIG_MTD_REDBOOT_PARTS is not set | 635 | # CONFIG_MTD_REDBOOT_PARTS is not set |
| 592 | # CONFIG_MTD_CMDLINE_PARTS is not set | 636 | # CONFIG_MTD_CMDLINE_PARTS is not set |
| 593 | # CONFIG_MTD_AR7_PARTS is not set | 637 | # CONFIG_MTD_AR7_PARTS is not set |
| @@ -636,6 +680,7 @@ CONFIG_MTD_CFI_UTIL=y | |||
| 636 | CONFIG_MTD_COMPLEX_MAPPINGS=y | 680 | CONFIG_MTD_COMPLEX_MAPPINGS=y |
| 637 | CONFIG_MTD_PHYSMAP=y | 681 | CONFIG_MTD_PHYSMAP=y |
| 638 | # CONFIG_MTD_PHYSMAP_COMPAT is not set | 682 | # CONFIG_MTD_PHYSMAP_COMPAT is not set |
| 683 | # CONFIG_MTD_GPIO_ADDR is not set | ||
| 639 | # CONFIG_MTD_PLATRAM is not set | 684 | # CONFIG_MTD_PLATRAM is not set |
| 640 | 685 | ||
| 641 | # | 686 | # |
| @@ -668,6 +713,10 @@ CONFIG_MTD_PHYSMAP=y | |||
| 668 | CONFIG_BLK_DEV=y | 713 | CONFIG_BLK_DEV=y |
| 669 | # CONFIG_BLK_DEV_COW_COMMON is not set | 714 | # CONFIG_BLK_DEV_COW_COMMON is not set |
| 670 | # CONFIG_BLK_DEV_LOOP is not set | 715 | # CONFIG_BLK_DEV_LOOP is not set |
| 716 | |||
| 717 | # | ||
| 718 | # DRBD disabled because PROC_FS, INET or CONNECTOR not selected | ||
| 719 | # | ||
| 671 | # CONFIG_BLK_DEV_NBD is not set | 720 | # CONFIG_BLK_DEV_NBD is not set |
| 672 | # CONFIG_BLK_DEV_RAM is not set | 721 | # CONFIG_BLK_DEV_RAM is not set |
| 673 | # CONFIG_CDROM_PKTCDVD is not set | 722 | # CONFIG_CDROM_PKTCDVD is not set |
| @@ -687,6 +736,7 @@ CONFIG_HAVE_IDE=y | |||
| 687 | # | 736 | # |
| 688 | # SCSI device support | 737 | # SCSI device support |
| 689 | # | 738 | # |
| 739 | CONFIG_SCSI_MOD=y | ||
| 690 | # CONFIG_RAID_ATTRS is not set | 740 | # CONFIG_RAID_ATTRS is not set |
| 691 | # CONFIG_SCSI is not set | 741 | # CONFIG_SCSI is not set |
| 692 | # CONFIG_SCSI_DMA is not set | 742 | # CONFIG_SCSI_DMA is not set |
| @@ -727,6 +777,7 @@ CONFIG_MII=y | |||
| 727 | # CONFIG_SMC91X is not set | 777 | # CONFIG_SMC91X is not set |
| 728 | # CONFIG_DM9000 is not set | 778 | # CONFIG_DM9000 is not set |
| 729 | # CONFIG_ETHOC is not set | 779 | # CONFIG_ETHOC is not set |
| 780 | # CONFIG_SMSC911X is not set | ||
| 730 | # CONFIG_DNET is not set | 781 | # CONFIG_DNET is not set |
| 731 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | 782 | # CONFIG_IBM_NEW_EMAC_ZMII is not set |
| 732 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | 783 | # CONFIG_IBM_NEW_EMAC_RGMII is not set |
| @@ -737,23 +788,21 @@ CONFIG_MII=y | |||
| 737 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | 788 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set |
| 738 | # CONFIG_B44 is not set | 789 | # CONFIG_B44 is not set |
| 739 | # CONFIG_KS8842 is not set | 790 | # CONFIG_KS8842 is not set |
| 791 | # CONFIG_KS8851_MLL is not set | ||
| 740 | CONFIG_CPMAC=y | 792 | CONFIG_CPMAC=y |
| 741 | # CONFIG_NETDEV_1000 is not set | 793 | # CONFIG_NETDEV_1000 is not set |
| 742 | # CONFIG_NETDEV_10000 is not set | 794 | # CONFIG_NETDEV_10000 is not set |
| 743 | 795 | CONFIG_WLAN=y | |
| 744 | # | ||
| 745 | # Wireless LAN | ||
| 746 | # | ||
| 747 | # CONFIG_WLAN_PRE80211 is not set | ||
| 748 | CONFIG_WLAN_80211=y | ||
| 749 | # CONFIG_LIBERTAS is not set | ||
| 750 | # CONFIG_LIBERTAS_THINFIRM is not set | 796 | # CONFIG_LIBERTAS_THINFIRM is not set |
| 751 | # CONFIG_MAC80211_HWSIM is not set | 797 | # CONFIG_MAC80211_HWSIM is not set |
| 752 | # CONFIG_P54_COMMON is not set | 798 | # CONFIG_ATH_COMMON is not set |
| 753 | # CONFIG_HOSTAP is not set | ||
| 754 | # CONFIG_B43 is not set | 799 | # CONFIG_B43 is not set |
| 755 | # CONFIG_B43LEGACY is not set | 800 | # CONFIG_B43LEGACY is not set |
| 801 | # CONFIG_HOSTAP is not set | ||
| 802 | # CONFIG_LIBERTAS is not set | ||
| 803 | # CONFIG_P54_COMMON is not set | ||
| 756 | # CONFIG_RT2X00 is not set | 804 | # CONFIG_RT2X00 is not set |
| 805 | # CONFIG_WL12XX is not set | ||
| 757 | 806 | ||
| 758 | # | 807 | # |
| 759 | # Enable WiMAX (Networking options) to see the WiMAX drivers | 808 | # Enable WiMAX (Networking options) to see the WiMAX drivers |
| @@ -813,6 +862,7 @@ CONFIG_SERIAL_8250_RUNTIME_UARTS=2 | |||
| 813 | # | 862 | # |
| 814 | CONFIG_SERIAL_CORE=y | 863 | CONFIG_SERIAL_CORE=y |
| 815 | CONFIG_SERIAL_CORE_CONSOLE=y | 864 | CONFIG_SERIAL_CORE_CONSOLE=y |
| 865 | # CONFIG_SERIAL_TIMBERDALE is not set | ||
| 816 | CONFIG_UNIX98_PTYS=y | 866 | CONFIG_UNIX98_PTYS=y |
| 817 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | 867 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set |
| 818 | # CONFIG_LEGACY_PTYS is not set | 868 | # CONFIG_LEGACY_PTYS is not set |
| @@ -824,11 +874,39 @@ CONFIG_HW_RANDOM=y | |||
| 824 | # CONFIG_TCG_TPM is not set | 874 | # CONFIG_TCG_TPM is not set |
| 825 | # CONFIG_I2C is not set | 875 | # CONFIG_I2C is not set |
| 826 | # CONFIG_SPI is not set | 876 | # CONFIG_SPI is not set |
| 877 | |||
| 878 | # | ||
| 879 | # PPS support | ||
| 880 | # | ||
| 881 | # CONFIG_PPS is not set | ||
| 882 | CONFIG_ARCH_REQUIRE_GPIOLIB=y | ||
| 883 | CONFIG_GPIOLIB=y | ||
| 884 | CONFIG_GPIO_SYSFS=y | ||
| 885 | |||
| 886 | # | ||
| 887 | # Memory mapped GPIO expanders: | ||
| 888 | # | ||
| 889 | # CONFIG_GPIO_IT8761E is not set | ||
| 890 | |||
| 891 | # | ||
| 892 | # I2C GPIO expanders: | ||
| 893 | # | ||
| 894 | |||
| 895 | # | ||
| 896 | # PCI GPIO expanders: | ||
| 897 | # | ||
| 898 | |||
| 899 | # | ||
| 900 | # SPI GPIO expanders: | ||
| 901 | # | ||
| 902 | |||
| 903 | # | ||
| 904 | # AC97 GPIO expanders: | ||
| 905 | # | ||
| 827 | # CONFIG_W1 is not set | 906 | # CONFIG_W1 is not set |
| 828 | # CONFIG_POWER_SUPPLY is not set | 907 | # CONFIG_POWER_SUPPLY is not set |
| 829 | # CONFIG_HWMON is not set | 908 | # CONFIG_HWMON is not set |
| 830 | # CONFIG_THERMAL is not set | 909 | # CONFIG_THERMAL is not set |
| 831 | # CONFIG_THERMAL_HWMON is not set | ||
| 832 | CONFIG_WATCHDOG=y | 910 | CONFIG_WATCHDOG=y |
| 833 | # CONFIG_WATCHDOG_NOWAYOUT is not set | 911 | # CONFIG_WATCHDOG_NOWAYOUT is not set |
| 834 | 912 | ||
| @@ -842,13 +920,7 @@ CONFIG_SSB_POSSIBLE=y | |||
| 842 | # | 920 | # |
| 843 | # Sonics Silicon Backplane | 921 | # Sonics Silicon Backplane |
| 844 | # | 922 | # |
| 845 | CONFIG_SSB=y | 923 | # CONFIG_SSB is not set |
| 846 | # CONFIG_SSB_SILENT is not set | ||
| 847 | # CONFIG_SSB_DEBUG is not set | ||
| 848 | CONFIG_SSB_SERIAL=y | ||
| 849 | CONFIG_SSB_DRIVER_MIPS=y | ||
| 850 | CONFIG_SSB_EMBEDDED=y | ||
| 851 | CONFIG_SSB_DRIVER_EXTIF=y | ||
| 852 | 924 | ||
| 853 | # | 925 | # |
| 854 | # Multifunction device drivers | 926 | # Multifunction device drivers |
| @@ -882,15 +954,18 @@ CONFIG_LEDS_CLASS=y | |||
| 882 | # | 954 | # |
| 883 | # LED drivers | 955 | # LED drivers |
| 884 | # | 956 | # |
| 885 | # CONFIG_LEDS_GPIO is not set | 957 | CONFIG_LEDS_GPIO=y |
| 958 | CONFIG_LEDS_GPIO_PLATFORM=y | ||
| 959 | # CONFIG_LEDS_LT3593 is not set | ||
| 960 | CONFIG_LEDS_TRIGGERS=y | ||
| 886 | 961 | ||
| 887 | # | 962 | # |
| 888 | # LED Triggers | 963 | # LED Triggers |
| 889 | # | 964 | # |
| 890 | CONFIG_LEDS_TRIGGERS=y | ||
| 891 | CONFIG_LEDS_TRIGGER_TIMER=y | 965 | CONFIG_LEDS_TRIGGER_TIMER=y |
| 892 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | 966 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y |
| 893 | # CONFIG_LEDS_TRIGGER_BACKLIGHT is not set | 967 | # CONFIG_LEDS_TRIGGER_BACKLIGHT is not set |
| 968 | # CONFIG_LEDS_TRIGGER_GPIO is not set | ||
| 894 | CONFIG_LEDS_TRIGGER_DEFAULT_ON=y | 969 | CONFIG_LEDS_TRIGGER_DEFAULT_ON=y |
| 895 | 970 | ||
| 896 | # | 971 | # |
| @@ -921,6 +996,7 @@ CONFIG_VLYNQ=y | |||
| 921 | # CONFIG_XFS_FS is not set | 996 | # CONFIG_XFS_FS is not set |
| 922 | # CONFIG_OCFS2_FS is not set | 997 | # CONFIG_OCFS2_FS is not set |
| 923 | # CONFIG_BTRFS_FS is not set | 998 | # CONFIG_BTRFS_FS is not set |
| 999 | # CONFIG_NILFS2_FS is not set | ||
| 924 | CONFIG_FILE_LOCKING=y | 1000 | CONFIG_FILE_LOCKING=y |
| 925 | CONFIG_FSNOTIFY=y | 1001 | CONFIG_FSNOTIFY=y |
| 926 | # CONFIG_DNOTIFY is not set | 1002 | # CONFIG_DNOTIFY is not set |
| @@ -984,6 +1060,7 @@ CONFIG_JFFS2_RTIME=y | |||
| 984 | CONFIG_JFFS2_CMODE_PRIORITY=y | 1060 | CONFIG_JFFS2_CMODE_PRIORITY=y |
| 985 | # CONFIG_JFFS2_CMODE_SIZE is not set | 1061 | # CONFIG_JFFS2_CMODE_SIZE is not set |
| 986 | # CONFIG_JFFS2_CMODE_FAVOURLZO is not set | 1062 | # CONFIG_JFFS2_CMODE_FAVOURLZO is not set |
| 1063 | # CONFIG_LOGFS is not set | ||
| 987 | # CONFIG_CRAMFS is not set | 1064 | # CONFIG_CRAMFS is not set |
| 988 | CONFIG_SQUASHFS=y | 1065 | CONFIG_SQUASHFS=y |
| 989 | # CONFIG_SQUASHFS_EMBEDDED is not set | 1066 | # CONFIG_SQUASHFS_EMBEDDED is not set |
| @@ -996,11 +1073,11 @@ CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 | |||
| 996 | # CONFIG_ROMFS_FS is not set | 1073 | # CONFIG_ROMFS_FS is not set |
| 997 | # CONFIG_SYSV_FS is not set | 1074 | # CONFIG_SYSV_FS is not set |
| 998 | # CONFIG_UFS_FS is not set | 1075 | # CONFIG_UFS_FS is not set |
| 999 | # CONFIG_NILFS2_FS is not set | ||
| 1000 | CONFIG_NETWORK_FILESYSTEMS=y | 1076 | CONFIG_NETWORK_FILESYSTEMS=y |
| 1001 | # CONFIG_NFS_FS is not set | 1077 | # CONFIG_NFS_FS is not set |
| 1002 | # CONFIG_NFSD is not set | 1078 | # CONFIG_NFSD is not set |
| 1003 | # CONFIG_SMB_FS is not set | 1079 | # CONFIG_SMB_FS is not set |
| 1080 | # CONFIG_CEPH_FS is not set | ||
| 1004 | # CONFIG_CIFS is not set | 1081 | # CONFIG_CIFS is not set |
| 1005 | # CONFIG_NCP_FS is not set | 1082 | # CONFIG_NCP_FS is not set |
| 1006 | # CONFIG_CODA_FS is not set | 1083 | # CONFIG_CODA_FS is not set |
| @@ -1039,21 +1116,29 @@ CONFIG_ENABLE_WARN_DEPRECATED=y | |||
| 1039 | # CONFIG_ENABLE_MUST_CHECK is not set | 1116 | # CONFIG_ENABLE_MUST_CHECK is not set |
| 1040 | CONFIG_FRAME_WARN=1024 | 1117 | CONFIG_FRAME_WARN=1024 |
| 1041 | # CONFIG_MAGIC_SYSRQ is not set | 1118 | # CONFIG_MAGIC_SYSRQ is not set |
| 1119 | CONFIG_STRIP_ASM_SYMS=y | ||
| 1042 | # CONFIG_UNUSED_SYMBOLS is not set | 1120 | # CONFIG_UNUSED_SYMBOLS is not set |
| 1043 | CONFIG_DEBUG_FS=y | 1121 | CONFIG_DEBUG_FS=y |
| 1044 | # CONFIG_HEADERS_CHECK is not set | 1122 | # CONFIG_HEADERS_CHECK is not set |
| 1045 | # CONFIG_DEBUG_KERNEL is not set | 1123 | # CONFIG_DEBUG_KERNEL is not set |
| 1046 | # CONFIG_DEBUG_MEMORY_INIT is not set | 1124 | # CONFIG_DEBUG_MEMORY_INIT is not set |
| 1047 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | 1125 | # CONFIG_LKDTM is not set |
| 1048 | CONFIG_SYSCTL_SYSCALL_CHECK=y | 1126 | CONFIG_SYSCTL_SYSCALL_CHECK=y |
| 1127 | CONFIG_HAVE_FUNCTION_TRACER=y | ||
| 1128 | CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y | ||
| 1129 | CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y | ||
| 1130 | CONFIG_HAVE_DYNAMIC_FTRACE=y | ||
| 1131 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y | ||
| 1049 | CONFIG_TRACING_SUPPORT=y | 1132 | CONFIG_TRACING_SUPPORT=y |
| 1050 | # CONFIG_FTRACE is not set | 1133 | # CONFIG_FTRACE is not set |
| 1051 | # CONFIG_DYNAMIC_DEBUG is not set | 1134 | # CONFIG_DYNAMIC_DEBUG is not set |
| 1052 | # CONFIG_SAMPLES is not set | 1135 | # CONFIG_SAMPLES is not set |
| 1053 | CONFIG_HAVE_ARCH_KGDB=y | 1136 | CONFIG_HAVE_ARCH_KGDB=y |
| 1137 | CONFIG_EARLY_PRINTK=y | ||
| 1054 | CONFIG_CMDLINE_BOOL=y | 1138 | CONFIG_CMDLINE_BOOL=y |
| 1055 | CONFIG_CMDLINE="rootfstype=squashfs,jffs2" | 1139 | CONFIG_CMDLINE="rootfstype=squashfs,jffs2" |
| 1056 | # CONFIG_CMDLINE_OVERRIDE is not set | 1140 | # CONFIG_CMDLINE_OVERRIDE is not set |
| 1141 | # CONFIG_SPINLOCK_TEST is not set | ||
| 1057 | 1142 | ||
| 1058 | # | 1143 | # |
| 1059 | # Security options | 1144 | # Security options |
| @@ -1061,13 +1146,16 @@ CONFIG_CMDLINE="rootfstype=squashfs,jffs2" | |||
| 1061 | # CONFIG_KEYS is not set | 1146 | # CONFIG_KEYS is not set |
| 1062 | # CONFIG_SECURITY is not set | 1147 | # CONFIG_SECURITY is not set |
| 1063 | # CONFIG_SECURITYFS is not set | 1148 | # CONFIG_SECURITYFS is not set |
| 1064 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | 1149 | # CONFIG_DEFAULT_SECURITY_SELINUX is not set |
| 1150 | # CONFIG_DEFAULT_SECURITY_SMACK is not set | ||
| 1151 | # CONFIG_DEFAULT_SECURITY_TOMOYO is not set | ||
| 1152 | CONFIG_DEFAULT_SECURITY_DAC=y | ||
| 1153 | CONFIG_DEFAULT_SECURITY="" | ||
| 1065 | CONFIG_CRYPTO=y | 1154 | CONFIG_CRYPTO=y |
| 1066 | 1155 | ||
| 1067 | # | 1156 | # |
| 1068 | # Crypto core or helper | 1157 | # Crypto core or helper |
| 1069 | # | 1158 | # |
| 1070 | # CONFIG_CRYPTO_FIPS is not set | ||
| 1071 | CONFIG_CRYPTO_ALGAPI=m | 1159 | CONFIG_CRYPTO_ALGAPI=m |
| 1072 | CONFIG_CRYPTO_ALGAPI2=m | 1160 | CONFIG_CRYPTO_ALGAPI2=m |
| 1073 | CONFIG_CRYPTO_AEAD2=m | 1161 | CONFIG_CRYPTO_AEAD2=m |
| @@ -1108,11 +1196,13 @@ CONFIG_CRYPTO_ECB=m | |||
| 1108 | # | 1196 | # |
| 1109 | # CONFIG_CRYPTO_HMAC is not set | 1197 | # CONFIG_CRYPTO_HMAC is not set |
| 1110 | # CONFIG_CRYPTO_XCBC is not set | 1198 | # CONFIG_CRYPTO_XCBC is not set |
| 1199 | # CONFIG_CRYPTO_VMAC is not set | ||
| 1111 | 1200 | ||
| 1112 | # | 1201 | # |
| 1113 | # Digest | 1202 | # Digest |
| 1114 | # | 1203 | # |
| 1115 | # CONFIG_CRYPTO_CRC32C is not set | 1204 | # CONFIG_CRYPTO_CRC32C is not set |
| 1205 | # CONFIG_CRYPTO_GHASH is not set | ||
| 1116 | # CONFIG_CRYPTO_MD4 is not set | 1206 | # CONFIG_CRYPTO_MD4 is not set |
| 1117 | # CONFIG_CRYPTO_MD5 is not set | 1207 | # CONFIG_CRYPTO_MD5 is not set |
| 1118 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | 1208 | # CONFIG_CRYPTO_MICHAEL_MIC is not set |
diff --git a/arch/mips/configs/bcm47xx_defconfig b/arch/mips/configs/bcm47xx_defconfig index 267bd46120bc..bbd826b8032d 100644 --- a/arch/mips/configs/bcm47xx_defconfig +++ b/arch/mips/configs/bcm47xx_defconfig | |||
| @@ -1,7 +1,7 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.25-rc2 | 3 | # Linux kernel version: 2.6.34-rc6 |
| 4 | # Mon Feb 18 11:55:24 2008 | 4 | # Sat May 1 12:14:30 2010 |
| 5 | # | 5 | # |
| 6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
| 7 | 7 | ||
| @@ -9,20 +9,25 @@ CONFIG_MIPS=y | |||
| 9 | # Machine selection | 9 | # Machine selection |
| 10 | # | 10 | # |
| 11 | # CONFIG_MACH_ALCHEMY is not set | 11 | # CONFIG_MACH_ALCHEMY is not set |
| 12 | # CONFIG_AR7 is not set | ||
| 12 | CONFIG_BCM47XX=y | 13 | CONFIG_BCM47XX=y |
| 14 | # CONFIG_BCM63XX is not set | ||
| 13 | # CONFIG_MIPS_COBALT is not set | 15 | # CONFIG_MIPS_COBALT is not set |
| 14 | # CONFIG_MACH_DECSTATION is not set | 16 | # CONFIG_MACH_DECSTATION is not set |
| 15 | # CONFIG_MACH_JAZZ is not set | 17 | # CONFIG_MACH_JAZZ is not set |
| 16 | # CONFIG_LASAT is not set | 18 | # CONFIG_LASAT is not set |
| 17 | # CONFIG_LEMOTE_FULONG is not set | 19 | # CONFIG_MACH_LOONGSON is not set |
| 18 | # CONFIG_MIPS_MALTA is not set | 20 | # CONFIG_MIPS_MALTA is not set |
| 19 | # CONFIG_MIPS_SIM is not set | 21 | # CONFIG_MIPS_SIM is not set |
| 20 | # CONFIG_MARKEINS is not set | 22 | # CONFIG_NEC_MARKEINS is not set |
| 21 | # CONFIG_MACH_VR41XX is not set | 23 | # CONFIG_MACH_VR41XX is not set |
| 24 | # CONFIG_NXP_STB220 is not set | ||
| 25 | # CONFIG_NXP_STB225 is not set | ||
| 22 | # CONFIG_PNX8550_JBS is not set | 26 | # CONFIG_PNX8550_JBS is not set |
| 23 | # CONFIG_PNX8550_STB810 is not set | 27 | # CONFIG_PNX8550_STB810 is not set |
| 24 | # CONFIG_PMC_MSP is not set | 28 | # CONFIG_PMC_MSP is not set |
| 25 | # CONFIG_PMC_YOSEMITE is not set | 29 | # CONFIG_PMC_YOSEMITE is not set |
| 30 | # CONFIG_POWERTV is not set | ||
| 26 | # CONFIG_SGI_IP22 is not set | 31 | # CONFIG_SGI_IP22 is not set |
| 27 | # CONFIG_SGI_IP27 is not set | 32 | # CONFIG_SGI_IP27 is not set |
| 28 | # CONFIG_SGI_IP28 is not set | 33 | # CONFIG_SGI_IP28 is not set |
| @@ -36,10 +41,14 @@ CONFIG_BCM47XX=y | |||
| 36 | # CONFIG_SIBYTE_SENTOSA is not set | 41 | # CONFIG_SIBYTE_SENTOSA is not set |
| 37 | # CONFIG_SIBYTE_BIGSUR is not set | 42 | # CONFIG_SIBYTE_BIGSUR is not set |
| 38 | # CONFIG_SNI_RM is not set | 43 | # CONFIG_SNI_RM is not set |
| 39 | # CONFIG_TOSHIBA_JMR3927 is not set | 44 | # CONFIG_MACH_TX39XX is not set |
| 40 | # CONFIG_TOSHIBA_RBTX4927 is not set | 45 | # CONFIG_MACH_TX49XX is not set |
| 41 | # CONFIG_TOSHIBA_RBTX4938 is not set | 46 | # CONFIG_MIKROTIK_RB532 is not set |
| 42 | # CONFIG_WR_PPMC is not set | 47 | # CONFIG_WR_PPMC is not set |
| 48 | # CONFIG_CAVIUM_OCTEON_SIMULATOR is not set | ||
| 49 | # CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set | ||
| 50 | # CONFIG_ALCHEMY_GPIO_INDIRECT is not set | ||
| 51 | CONFIG_LOONGSON_UART_BASE=y | ||
| 43 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | 52 | CONFIG_RWSEM_GENERIC_SPINLOCK=y |
| 44 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | 53 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set |
| 45 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | 54 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set |
| @@ -50,16 +59,16 @@ CONFIG_GENERIC_CALIBRATE_DELAY=y | |||
| 50 | CONFIG_GENERIC_CLOCKEVENTS=y | 59 | CONFIG_GENERIC_CLOCKEVENTS=y |
| 51 | CONFIG_GENERIC_TIME=y | 60 | CONFIG_GENERIC_TIME=y |
| 52 | CONFIG_GENERIC_CMOS_UPDATE=y | 61 | CONFIG_GENERIC_CMOS_UPDATE=y |
| 53 | CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y | 62 | CONFIG_SCHED_OMIT_FRAME_POINTER=y |
| 54 | # CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set | 63 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y |
| 64 | CONFIG_CEVT_R4K_LIB=y | ||
| 55 | CONFIG_CEVT_R4K=y | 65 | CONFIG_CEVT_R4K=y |
| 66 | CONFIG_CSRC_R4K_LIB=y | ||
| 56 | CONFIG_CSRC_R4K=y | 67 | CONFIG_CSRC_R4K=y |
| 57 | CONFIG_CFE=y | 68 | CONFIG_CFE=y |
| 58 | CONFIG_DMA_NONCOHERENT=y | 69 | CONFIG_DMA_NONCOHERENT=y |
| 59 | CONFIG_DMA_NEED_PCI_MAP_STATE=y | 70 | CONFIG_NEED_DMA_MAP_STATE=y |
| 60 | CONFIG_EARLY_PRINTK=y | ||
| 61 | CONFIG_SYS_HAS_EARLY_PRINTK=y | 71 | CONFIG_SYS_HAS_EARLY_PRINTK=y |
| 62 | # CONFIG_HOTPLUG_CPU is not set | ||
| 63 | # CONFIG_NO_IOPORT is not set | 72 | # CONFIG_NO_IOPORT is not set |
| 64 | CONFIG_GENERIC_GPIO=y | 73 | CONFIG_GENERIC_GPIO=y |
| 65 | # CONFIG_CPU_BIG_ENDIAN is not set | 74 | # CONFIG_CPU_BIG_ENDIAN is not set |
| @@ -71,7 +80,8 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5 | |||
| 71 | # | 80 | # |
| 72 | # CPU selection | 81 | # CPU selection |
| 73 | # | 82 | # |
| 74 | # CONFIG_CPU_LOONGSON2 is not set | 83 | # CONFIG_CPU_LOONGSON2E is not set |
| 84 | # CONFIG_CPU_LOONGSON2F is not set | ||
| 75 | CONFIG_CPU_MIPS32_R1=y | 85 | CONFIG_CPU_MIPS32_R1=y |
| 76 | # CONFIG_CPU_MIPS32_R2 is not set | 86 | # CONFIG_CPU_MIPS32_R2 is not set |
| 77 | # CONFIG_CPU_MIPS64_R1 is not set | 87 | # CONFIG_CPU_MIPS64_R1 is not set |
| @@ -84,6 +94,7 @@ CONFIG_CPU_MIPS32_R1=y | |||
| 84 | # CONFIG_CPU_TX49XX is not set | 94 | # CONFIG_CPU_TX49XX is not set |
| 85 | # CONFIG_CPU_R5000 is not set | 95 | # CONFIG_CPU_R5000 is not set |
| 86 | # CONFIG_CPU_R5432 is not set | 96 | # CONFIG_CPU_R5432 is not set |
| 97 | # CONFIG_CPU_R5500 is not set | ||
| 87 | # CONFIG_CPU_R6000 is not set | 98 | # CONFIG_CPU_R6000 is not set |
| 88 | # CONFIG_CPU_NEVADA is not set | 99 | # CONFIG_CPU_NEVADA is not set |
| 89 | # CONFIG_CPU_R8000 is not set | 100 | # CONFIG_CPU_R8000 is not set |
| @@ -91,11 +102,13 @@ CONFIG_CPU_MIPS32_R1=y | |||
| 91 | # CONFIG_CPU_RM7000 is not set | 102 | # CONFIG_CPU_RM7000 is not set |
| 92 | # CONFIG_CPU_RM9000 is not set | 103 | # CONFIG_CPU_RM9000 is not set |
| 93 | # CONFIG_CPU_SB1 is not set | 104 | # CONFIG_CPU_SB1 is not set |
| 105 | # CONFIG_CPU_CAVIUM_OCTEON is not set | ||
| 94 | CONFIG_SYS_HAS_CPU_MIPS32_R1=y | 106 | CONFIG_SYS_HAS_CPU_MIPS32_R1=y |
| 95 | CONFIG_CPU_MIPS32=y | 107 | CONFIG_CPU_MIPS32=y |
| 96 | CONFIG_CPU_MIPSR1=y | 108 | CONFIG_CPU_MIPSR1=y |
| 97 | CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y | 109 | CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y |
| 98 | CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y | 110 | CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y |
| 111 | CONFIG_HARDWARE_WATCHPOINTS=y | ||
| 99 | 112 | ||
| 100 | # | 113 | # |
| 101 | # Kernel type | 114 | # Kernel type |
| @@ -105,11 +118,13 @@ CONFIG_32BIT=y | |||
| 105 | CONFIG_PAGE_SIZE_4KB=y | 118 | CONFIG_PAGE_SIZE_4KB=y |
| 106 | # CONFIG_PAGE_SIZE_8KB is not set | 119 | # CONFIG_PAGE_SIZE_8KB is not set |
| 107 | # CONFIG_PAGE_SIZE_16KB is not set | 120 | # CONFIG_PAGE_SIZE_16KB is not set |
| 121 | # CONFIG_PAGE_SIZE_32KB is not set | ||
| 108 | # CONFIG_PAGE_SIZE_64KB is not set | 122 | # CONFIG_PAGE_SIZE_64KB is not set |
| 109 | CONFIG_CPU_HAS_PREFETCH=y | 123 | CONFIG_CPU_HAS_PREFETCH=y |
| 110 | CONFIG_MIPS_MT_DISABLED=y | 124 | CONFIG_MIPS_MT_DISABLED=y |
| 111 | # CONFIG_MIPS_MT_SMP is not set | 125 | # CONFIG_MIPS_MT_SMP is not set |
| 112 | # CONFIG_MIPS_MT_SMTC is not set | 126 | # CONFIG_MIPS_MT_SMTC is not set |
| 127 | # CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set | ||
| 113 | CONFIG_CPU_HAS_SYNC=y | 128 | CONFIG_CPU_HAS_SYNC=y |
| 114 | CONFIG_GENERIC_HARDIRQS=y | 129 | CONFIG_GENERIC_HARDIRQS=y |
| 115 | CONFIG_GENERIC_IRQ_PROBE=y | 130 | CONFIG_GENERIC_IRQ_PROBE=y |
| @@ -122,12 +137,13 @@ CONFIG_FLATMEM_MANUAL=y | |||
| 122 | # CONFIG_SPARSEMEM_MANUAL is not set | 137 | # CONFIG_SPARSEMEM_MANUAL is not set |
| 123 | CONFIG_FLATMEM=y | 138 | CONFIG_FLATMEM=y |
| 124 | CONFIG_FLAT_NODE_MEM_MAP=y | 139 | CONFIG_FLAT_NODE_MEM_MAP=y |
| 125 | # CONFIG_SPARSEMEM_STATIC is not set | 140 | CONFIG_PAGEFLAGS_EXTENDED=y |
| 126 | # CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set | ||
| 127 | CONFIG_SPLIT_PTLOCK_CPUS=4 | 141 | CONFIG_SPLIT_PTLOCK_CPUS=4 |
| 128 | # CONFIG_RESOURCES_64BIT is not set | 142 | # CONFIG_PHYS_ADDR_T_64BIT is not set |
| 129 | CONFIG_ZONE_DMA_FLAG=0 | 143 | CONFIG_ZONE_DMA_FLAG=0 |
| 130 | CONFIG_VIRT_TO_BUS=y | 144 | CONFIG_VIRT_TO_BUS=y |
| 145 | # CONFIG_KSM is not set | ||
| 146 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | ||
| 131 | CONFIG_TICK_ONESHOT=y | 147 | CONFIG_TICK_ONESHOT=y |
| 132 | CONFIG_NO_HZ=y | 148 | CONFIG_NO_HZ=y |
| 133 | CONFIG_HIGH_RES_TIMERS=y | 149 | CONFIG_HIGH_RES_TIMERS=y |
| @@ -144,12 +160,12 @@ CONFIG_HZ=250 | |||
| 144 | CONFIG_PREEMPT_NONE=y | 160 | CONFIG_PREEMPT_NONE=y |
| 145 | # CONFIG_PREEMPT_VOLUNTARY is not set | 161 | # CONFIG_PREEMPT_VOLUNTARY is not set |
| 146 | # CONFIG_PREEMPT is not set | 162 | # CONFIG_PREEMPT is not set |
| 147 | CONFIG_RCU_TRACE=y | ||
| 148 | CONFIG_KEXEC=y | 163 | CONFIG_KEXEC=y |
| 149 | # CONFIG_SECCOMP is not set | 164 | # CONFIG_SECCOMP is not set |
| 150 | CONFIG_LOCKDEP_SUPPORT=y | 165 | CONFIG_LOCKDEP_SUPPORT=y |
| 151 | CONFIG_STACKTRACE_SUPPORT=y | 166 | CONFIG_STACKTRACE_SUPPORT=y |
| 152 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | 167 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" |
| 168 | CONFIG_CONSTRUCTORS=y | ||
| 153 | 169 | ||
| 154 | # | 170 | # |
| 155 | # General setup | 171 | # General setup |
| @@ -163,6 +179,7 @@ CONFIG_SWAP=y | |||
| 163 | CONFIG_SYSVIPC=y | 179 | CONFIG_SYSVIPC=y |
| 164 | CONFIG_SYSVIPC_SYSCTL=y | 180 | CONFIG_SYSVIPC_SYSCTL=y |
| 165 | CONFIG_POSIX_MQUEUE=y | 181 | CONFIG_POSIX_MQUEUE=y |
| 182 | CONFIG_POSIX_MQUEUE_SYSCTL=y | ||
| 166 | CONFIG_BSD_PROCESS_ACCT=y | 183 | CONFIG_BSD_PROCESS_ACCT=y |
| 167 | CONFIG_BSD_PROCESS_ACCT_V3=y | 184 | CONFIG_BSD_PROCESS_ACCT_V3=y |
| 168 | CONFIG_TASKSTATS=y | 185 | CONFIG_TASKSTATS=y |
| @@ -170,25 +187,37 @@ CONFIG_TASK_DELAY_ACCT=y | |||
| 170 | CONFIG_TASK_XACCT=y | 187 | CONFIG_TASK_XACCT=y |
| 171 | CONFIG_TASK_IO_ACCOUNTING=y | 188 | CONFIG_TASK_IO_ACCOUNTING=y |
| 172 | CONFIG_AUDIT=y | 189 | CONFIG_AUDIT=y |
| 190 | |||
| 191 | # | ||
| 192 | # RCU Subsystem | ||
| 193 | # | ||
| 194 | # CONFIG_TREE_RCU is not set | ||
| 195 | # CONFIG_TREE_PREEMPT_RCU is not set | ||
| 196 | CONFIG_TINY_RCU=y | ||
| 197 | # CONFIG_TREE_RCU_TRACE is not set | ||
| 173 | # CONFIG_IKCONFIG is not set | 198 | # CONFIG_IKCONFIG is not set |
| 174 | CONFIG_LOG_BUF_SHIFT=17 | 199 | CONFIG_LOG_BUF_SHIFT=17 |
| 175 | CONFIG_CGROUPS=y | 200 | CONFIG_CGROUPS=y |
| 176 | # CONFIG_CGROUP_DEBUG is not set | 201 | # CONFIG_CGROUP_DEBUG is not set |
| 177 | CONFIG_CGROUP_NS=y | 202 | CONFIG_CGROUP_NS=y |
| 178 | CONFIG_GROUP_SCHED=y | 203 | # CONFIG_CGROUP_FREEZER is not set |
| 179 | CONFIG_FAIR_GROUP_SCHED=y | 204 | # CONFIG_CGROUP_DEVICE is not set |
| 180 | # CONFIG_RT_GROUP_SCHED is not set | 205 | # CONFIG_CPUSETS is not set |
| 181 | CONFIG_USER_SCHED=y | ||
| 182 | # CONFIG_CGROUP_SCHED is not set | ||
| 183 | CONFIG_CGROUP_CPUACCT=y | 206 | CONFIG_CGROUP_CPUACCT=y |
| 184 | # CONFIG_RESOURCE_COUNTERS is not set | 207 | # CONFIG_RESOURCE_COUNTERS is not set |
| 185 | CONFIG_SYSFS_DEPRECATED=y | 208 | # CONFIG_CGROUP_SCHED is not set |
| 209 | # CONFIG_SYSFS_DEPRECATED_V2 is not set | ||
| 186 | CONFIG_RELAY=y | 210 | CONFIG_RELAY=y |
| 187 | # CONFIG_NAMESPACES is not set | 211 | # CONFIG_NAMESPACES is not set |
| 188 | CONFIG_BLK_DEV_INITRD=y | 212 | CONFIG_BLK_DEV_INITRD=y |
| 189 | CONFIG_INITRAMFS_SOURCE="" | 213 | CONFIG_INITRAMFS_SOURCE="" |
| 214 | CONFIG_RD_GZIP=y | ||
| 215 | # CONFIG_RD_BZIP2 is not set | ||
| 216 | CONFIG_RD_LZMA=y | ||
| 217 | # CONFIG_RD_LZO is not set | ||
| 190 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | 218 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y |
| 191 | CONFIG_SYSCTL=y | 219 | CONFIG_SYSCTL=y |
| 220 | CONFIG_ANON_INODES=y | ||
| 192 | CONFIG_EMBEDDED=y | 221 | CONFIG_EMBEDDED=y |
| 193 | CONFIG_SYSCTL_SYSCALL=y | 222 | CONFIG_SYSCTL_SYSCALL=y |
| 194 | CONFIG_KALLSYMS=y | 223 | CONFIG_KALLSYMS=y |
| @@ -197,54 +226,90 @@ CONFIG_HOTPLUG=y | |||
| 197 | CONFIG_PRINTK=y | 226 | CONFIG_PRINTK=y |
| 198 | CONFIG_BUG=y | 227 | CONFIG_BUG=y |
| 199 | CONFIG_ELF_CORE=y | 228 | CONFIG_ELF_CORE=y |
| 200 | CONFIG_COMPAT_BRK=y | 229 | CONFIG_PCSPKR_PLATFORM=y |
| 201 | CONFIG_BASE_FULL=y | 230 | CONFIG_BASE_FULL=y |
| 202 | CONFIG_FUTEX=y | 231 | CONFIG_FUTEX=y |
| 203 | CONFIG_ANON_INODES=y | ||
| 204 | CONFIG_EPOLL=y | 232 | CONFIG_EPOLL=y |
| 205 | CONFIG_SIGNALFD=y | 233 | CONFIG_SIGNALFD=y |
| 206 | CONFIG_TIMERFD=y | 234 | CONFIG_TIMERFD=y |
| 207 | CONFIG_EVENTFD=y | 235 | CONFIG_EVENTFD=y |
| 208 | CONFIG_SHMEM=y | 236 | CONFIG_SHMEM=y |
| 237 | CONFIG_AIO=y | ||
| 238 | |||
| 239 | # | ||
| 240 | # Kernel Performance Events And Counters | ||
| 241 | # | ||
| 209 | CONFIG_VM_EVENT_COUNTERS=y | 242 | CONFIG_VM_EVENT_COUNTERS=y |
| 243 | CONFIG_PCI_QUIRKS=y | ||
| 244 | CONFIG_COMPAT_BRK=y | ||
| 210 | CONFIG_SLAB=y | 245 | CONFIG_SLAB=y |
| 211 | # CONFIG_SLUB is not set | 246 | # CONFIG_SLUB is not set |
| 212 | # CONFIG_SLOB is not set | 247 | # CONFIG_SLOB is not set |
| 213 | # CONFIG_PROFILING is not set | 248 | # CONFIG_PROFILING is not set |
| 214 | # CONFIG_MARKERS is not set | ||
| 215 | CONFIG_HAVE_OPROFILE=y | 249 | CONFIG_HAVE_OPROFILE=y |
| 216 | # CONFIG_HAVE_KPROBES is not set | 250 | |
| 217 | CONFIG_PROC_PAGE_MONITOR=y | 251 | # |
| 252 | # GCOV-based kernel profiling | ||
| 253 | # | ||
| 254 | # CONFIG_GCOV_KERNEL is not set | ||
| 255 | CONFIG_SLOW_WORK=y | ||
| 256 | # CONFIG_SLOW_WORK_DEBUG is not set | ||
| 257 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | ||
| 218 | CONFIG_SLABINFO=y | 258 | CONFIG_SLABINFO=y |
| 219 | CONFIG_RT_MUTEXES=y | 259 | CONFIG_RT_MUTEXES=y |
| 220 | # CONFIG_TINY_SHMEM is not set | ||
| 221 | CONFIG_BASE_SMALL=0 | 260 | CONFIG_BASE_SMALL=0 |
| 222 | CONFIG_MODULES=y | 261 | CONFIG_MODULES=y |
| 262 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
| 223 | CONFIG_MODULE_UNLOAD=y | 263 | CONFIG_MODULE_UNLOAD=y |
| 224 | CONFIG_MODULE_FORCE_UNLOAD=y | 264 | CONFIG_MODULE_FORCE_UNLOAD=y |
| 225 | CONFIG_MODVERSIONS=y | 265 | CONFIG_MODVERSIONS=y |
| 226 | # CONFIG_MODULE_SRCVERSION_ALL is not set | 266 | # CONFIG_MODULE_SRCVERSION_ALL is not set |
| 227 | CONFIG_KMOD=y | ||
| 228 | CONFIG_BLOCK=y | 267 | CONFIG_BLOCK=y |
| 229 | CONFIG_LBD=y | 268 | CONFIG_LBDAF=y |
| 230 | CONFIG_BLK_DEV_IO_TRACE=y | ||
| 231 | CONFIG_LSF=y | ||
| 232 | # CONFIG_BLK_DEV_BSG is not set | 269 | # CONFIG_BLK_DEV_BSG is not set |
| 270 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
| 233 | 271 | ||
| 234 | # | 272 | # |
| 235 | # IO Schedulers | 273 | # IO Schedulers |
| 236 | # | 274 | # |
| 237 | CONFIG_IOSCHED_NOOP=y | 275 | CONFIG_IOSCHED_NOOP=y |
| 238 | CONFIG_IOSCHED_AS=y | ||
| 239 | CONFIG_IOSCHED_DEADLINE=y | 276 | CONFIG_IOSCHED_DEADLINE=y |
| 240 | CONFIG_IOSCHED_CFQ=y | 277 | CONFIG_IOSCHED_CFQ=y |
| 241 | # CONFIG_DEFAULT_AS is not set | 278 | # CONFIG_CFQ_GROUP_IOSCHED is not set |
| 242 | # CONFIG_DEFAULT_DEADLINE is not set | 279 | # CONFIG_DEFAULT_DEADLINE is not set |
| 243 | CONFIG_DEFAULT_CFQ=y | 280 | CONFIG_DEFAULT_CFQ=y |
| 244 | # CONFIG_DEFAULT_NOOP is not set | 281 | # CONFIG_DEFAULT_NOOP is not set |
| 245 | CONFIG_DEFAULT_IOSCHED="cfq" | 282 | CONFIG_DEFAULT_IOSCHED="cfq" |
| 246 | CONFIG_CLASSIC_RCU=y | 283 | # CONFIG_INLINE_SPIN_TRYLOCK is not set |
| 247 | # CONFIG_PREEMPT_RCU is not set | 284 | # CONFIG_INLINE_SPIN_TRYLOCK_BH is not set |
| 285 | # CONFIG_INLINE_SPIN_LOCK is not set | ||
| 286 | # CONFIG_INLINE_SPIN_LOCK_BH is not set | ||
| 287 | # CONFIG_INLINE_SPIN_LOCK_IRQ is not set | ||
| 288 | # CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set | ||
| 289 | CONFIG_INLINE_SPIN_UNLOCK=y | ||
| 290 | # CONFIG_INLINE_SPIN_UNLOCK_BH is not set | ||
| 291 | CONFIG_INLINE_SPIN_UNLOCK_IRQ=y | ||
| 292 | # CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set | ||
| 293 | # CONFIG_INLINE_READ_TRYLOCK is not set | ||
| 294 | # CONFIG_INLINE_READ_LOCK is not set | ||
| 295 | # CONFIG_INLINE_READ_LOCK_BH is not set | ||
| 296 | # CONFIG_INLINE_READ_LOCK_IRQ is not set | ||
| 297 | # CONFIG_INLINE_READ_LOCK_IRQSAVE is not set | ||
| 298 | CONFIG_INLINE_READ_UNLOCK=y | ||
| 299 | # CONFIG_INLINE_READ_UNLOCK_BH is not set | ||
| 300 | CONFIG_INLINE_READ_UNLOCK_IRQ=y | ||
| 301 | # CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set | ||
| 302 | # CONFIG_INLINE_WRITE_TRYLOCK is not set | ||
| 303 | # CONFIG_INLINE_WRITE_LOCK is not set | ||
| 304 | # CONFIG_INLINE_WRITE_LOCK_BH is not set | ||
| 305 | # CONFIG_INLINE_WRITE_LOCK_IRQ is not set | ||
| 306 | # CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set | ||
| 307 | CONFIG_INLINE_WRITE_UNLOCK=y | ||
| 308 | # CONFIG_INLINE_WRITE_UNLOCK_BH is not set | ||
| 309 | CONFIG_INLINE_WRITE_UNLOCK_IRQ=y | ||
| 310 | # CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set | ||
| 311 | # CONFIG_MUTEX_SPIN_ON_OWNER is not set | ||
| 312 | # CONFIG_FREEZER is not set | ||
| 248 | 313 | ||
| 249 | # | 314 | # |
| 250 | # Bus options (PCI, PCMCIA, EISA, ISA, TC) | 315 | # Bus options (PCI, PCMCIA, EISA, ISA, TC) |
| @@ -253,7 +318,8 @@ CONFIG_HW_HAS_PCI=y | |||
| 253 | CONFIG_PCI=y | 318 | CONFIG_PCI=y |
| 254 | CONFIG_PCI_DOMAINS=y | 319 | CONFIG_PCI_DOMAINS=y |
| 255 | # CONFIG_ARCH_SUPPORTS_MSI is not set | 320 | # CONFIG_ARCH_SUPPORTS_MSI is not set |
| 256 | CONFIG_PCI_LEGACY=y | 321 | # CONFIG_PCI_STUB is not set |
| 322 | # CONFIG_PCI_IOV is not set | ||
| 257 | CONFIG_MMU=y | 323 | CONFIG_MMU=y |
| 258 | # CONFIG_PCCARD is not set | 324 | # CONFIG_PCCARD is not set |
| 259 | # CONFIG_HOTPLUG_PCI is not set | 325 | # CONFIG_HOTPLUG_PCI is not set |
| @@ -262,31 +328,30 @@ CONFIG_MMU=y | |||
| 262 | # Executable file formats | 328 | # Executable file formats |
| 263 | # | 329 | # |
| 264 | CONFIG_BINFMT_ELF=y | 330 | CONFIG_BINFMT_ELF=y |
| 331 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
| 332 | # CONFIG_HAVE_AOUT is not set | ||
| 265 | CONFIG_BINFMT_MISC=m | 333 | CONFIG_BINFMT_MISC=m |
| 266 | CONFIG_TRAD_SIGNALS=y | 334 | CONFIG_TRAD_SIGNALS=y |
| 267 | 335 | ||
| 268 | # | 336 | # |
| 269 | # Power management options | 337 | # Power management options |
| 270 | # | 338 | # |
| 339 | CONFIG_ARCH_HIBERNATION_POSSIBLE=y | ||
| 271 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | 340 | CONFIG_ARCH_SUSPEND_POSSIBLE=y |
| 272 | # CONFIG_PM is not set | 341 | # CONFIG_PM is not set |
| 273 | |||
| 274 | # | ||
| 275 | # Networking | ||
| 276 | # | ||
| 277 | CONFIG_NET=y | 342 | CONFIG_NET=y |
| 278 | 343 | ||
| 279 | # | 344 | # |
| 280 | # Networking options | 345 | # Networking options |
| 281 | # | 346 | # |
| 282 | CONFIG_PACKET=y | 347 | CONFIG_PACKET=y |
| 283 | CONFIG_PACKET_MMAP=y | ||
| 284 | CONFIG_UNIX=y | 348 | CONFIG_UNIX=y |
| 285 | CONFIG_XFRM=y | 349 | CONFIG_XFRM=y |
| 286 | CONFIG_XFRM_USER=m | 350 | CONFIG_XFRM_USER=m |
| 287 | # CONFIG_XFRM_SUB_POLICY is not set | 351 | # CONFIG_XFRM_SUB_POLICY is not set |
| 288 | # CONFIG_XFRM_MIGRATE is not set | 352 | # CONFIG_XFRM_MIGRATE is not set |
| 289 | # CONFIG_XFRM_STATISTICS is not set | 353 | # CONFIG_XFRM_STATISTICS is not set |
| 354 | CONFIG_XFRM_IPCOMP=m | ||
| 290 | CONFIG_NET_KEY=m | 355 | CONFIG_NET_KEY=m |
| 291 | # CONFIG_NET_KEY_MIGRATE is not set | 356 | # CONFIG_NET_KEY_MIGRATE is not set |
| 292 | CONFIG_INET=y | 357 | CONFIG_INET=y |
| @@ -315,7 +380,7 @@ CONFIG_INET_TUNNEL=m | |||
| 315 | CONFIG_INET_XFRM_MODE_TRANSPORT=m | 380 | CONFIG_INET_XFRM_MODE_TRANSPORT=m |
| 316 | CONFIG_INET_XFRM_MODE_TUNNEL=m | 381 | CONFIG_INET_XFRM_MODE_TUNNEL=m |
| 317 | CONFIG_INET_XFRM_MODE_BEET=m | 382 | CONFIG_INET_XFRM_MODE_BEET=m |
| 318 | CONFIG_INET_LRO=m | 383 | CONFIG_INET_LRO=y |
| 319 | CONFIG_INET_DIAG=m | 384 | CONFIG_INET_DIAG=m |
| 320 | CONFIG_INET_TCP_DIAG=m | 385 | CONFIG_INET_TCP_DIAG=m |
| 321 | CONFIG_TCP_CONG_ADVANCED=y | 386 | CONFIG_TCP_CONG_ADVANCED=y |
| @@ -339,36 +404,6 @@ CONFIG_DEFAULT_BIC=y | |||
| 339 | # CONFIG_DEFAULT_RENO is not set | 404 | # CONFIG_DEFAULT_RENO is not set |
| 340 | CONFIG_DEFAULT_TCP_CONG="bic" | 405 | CONFIG_DEFAULT_TCP_CONG="bic" |
| 341 | # CONFIG_TCP_MD5SIG is not set | 406 | # CONFIG_TCP_MD5SIG is not set |
| 342 | CONFIG_IP_VS=m | ||
| 343 | # CONFIG_IP_VS_DEBUG is not set | ||
| 344 | CONFIG_IP_VS_TAB_BITS=12 | ||
| 345 | |||
| 346 | # | ||
| 347 | # IPVS transport protocol load balancing support | ||
| 348 | # | ||
| 349 | CONFIG_IP_VS_PROTO_TCP=y | ||
| 350 | CONFIG_IP_VS_PROTO_UDP=y | ||
| 351 | CONFIG_IP_VS_PROTO_ESP=y | ||
| 352 | CONFIG_IP_VS_PROTO_AH=y | ||
| 353 | |||
| 354 | # | ||
| 355 | # IPVS scheduler | ||
| 356 | # | ||
| 357 | CONFIG_IP_VS_RR=m | ||
| 358 | CONFIG_IP_VS_WRR=m | ||
| 359 | CONFIG_IP_VS_LC=m | ||
| 360 | CONFIG_IP_VS_WLC=m | ||
| 361 | CONFIG_IP_VS_LBLC=m | ||
| 362 | CONFIG_IP_VS_LBLCR=m | ||
| 363 | CONFIG_IP_VS_DH=m | ||
| 364 | CONFIG_IP_VS_SH=m | ||
| 365 | CONFIG_IP_VS_SED=m | ||
| 366 | CONFIG_IP_VS_NQ=m | ||
| 367 | |||
| 368 | # | ||
| 369 | # IPVS application helper | ||
| 370 | # | ||
| 371 | CONFIG_IP_VS_FTP=m | ||
| 372 | CONFIG_IPV6=m | 407 | CONFIG_IPV6=m |
| 373 | CONFIG_IPV6_PRIVACY=y | 408 | CONFIG_IPV6_PRIVACY=y |
| 374 | # CONFIG_IPV6_ROUTER_PREF is not set | 409 | # CONFIG_IPV6_ROUTER_PREF is not set |
| @@ -384,9 +419,12 @@ CONFIG_INET6_XFRM_MODE_TUNNEL=m | |||
| 384 | CONFIG_INET6_XFRM_MODE_BEET=m | 419 | CONFIG_INET6_XFRM_MODE_BEET=m |
| 385 | CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m | 420 | CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m |
| 386 | CONFIG_IPV6_SIT=m | 421 | CONFIG_IPV6_SIT=m |
| 422 | # CONFIG_IPV6_SIT_6RD is not set | ||
| 423 | CONFIG_IPV6_NDISC_NODETYPE=y | ||
| 387 | CONFIG_IPV6_TUNNEL=m | 424 | CONFIG_IPV6_TUNNEL=m |
| 388 | CONFIG_IPV6_MULTIPLE_TABLES=y | 425 | CONFIG_IPV6_MULTIPLE_TABLES=y |
| 389 | CONFIG_IPV6_SUBTREES=y | 426 | CONFIG_IPV6_SUBTREES=y |
| 427 | # CONFIG_IPV6_MROUTE is not set | ||
| 390 | CONFIG_NETWORK_SECMARK=y | 428 | CONFIG_NETWORK_SECMARK=y |
| 391 | CONFIG_NETFILTER=y | 429 | CONFIG_NETFILTER=y |
| 392 | # CONFIG_NETFILTER_DEBUG is not set | 430 | # CONFIG_NETFILTER_DEBUG is not set |
| @@ -404,6 +442,7 @@ CONFIG_NF_CT_ACCT=y | |||
| 404 | CONFIG_NF_CONNTRACK_MARK=y | 442 | CONFIG_NF_CONNTRACK_MARK=y |
| 405 | CONFIG_NF_CONNTRACK_SECMARK=y | 443 | CONFIG_NF_CONNTRACK_SECMARK=y |
| 406 | CONFIG_NF_CONNTRACK_EVENTS=y | 444 | CONFIG_NF_CONNTRACK_EVENTS=y |
| 445 | CONFIG_NF_CT_PROTO_DCCP=m | ||
| 407 | CONFIG_NF_CT_PROTO_GRE=m | 446 | CONFIG_NF_CT_PROTO_GRE=m |
| 408 | CONFIG_NF_CT_PROTO_SCTP=m | 447 | CONFIG_NF_CT_PROTO_SCTP=m |
| 409 | CONFIG_NF_CT_PROTO_UDPLITE=m | 448 | CONFIG_NF_CT_PROTO_UDPLITE=m |
| @@ -417,20 +456,25 @@ CONFIG_NF_CONNTRACK_SANE=m | |||
| 417 | CONFIG_NF_CONNTRACK_SIP=m | 456 | CONFIG_NF_CONNTRACK_SIP=m |
| 418 | CONFIG_NF_CONNTRACK_TFTP=m | 457 | CONFIG_NF_CONNTRACK_TFTP=m |
| 419 | CONFIG_NF_CT_NETLINK=m | 458 | CONFIG_NF_CT_NETLINK=m |
| 459 | # CONFIG_NETFILTER_TPROXY is not set | ||
| 420 | CONFIG_NETFILTER_XTABLES=m | 460 | CONFIG_NETFILTER_XTABLES=m |
| 421 | CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m | 461 | CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m |
| 422 | CONFIG_NETFILTER_XT_TARGET_CONNMARK=m | 462 | CONFIG_NETFILTER_XT_TARGET_CONNMARK=m |
| 463 | CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m | ||
| 464 | # CONFIG_NETFILTER_XT_TARGET_CT is not set | ||
| 423 | CONFIG_NETFILTER_XT_TARGET_DSCP=m | 465 | CONFIG_NETFILTER_XT_TARGET_DSCP=m |
| 466 | CONFIG_NETFILTER_XT_TARGET_HL=m | ||
| 467 | # CONFIG_NETFILTER_XT_TARGET_LED is not set | ||
| 424 | CONFIG_NETFILTER_XT_TARGET_MARK=m | 468 | CONFIG_NETFILTER_XT_TARGET_MARK=m |
| 425 | CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m | ||
| 426 | CONFIG_NETFILTER_XT_TARGET_NFLOG=m | 469 | CONFIG_NETFILTER_XT_TARGET_NFLOG=m |
| 470 | CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m | ||
| 427 | CONFIG_NETFILTER_XT_TARGET_NOTRACK=m | 471 | CONFIG_NETFILTER_XT_TARGET_NOTRACK=m |
| 428 | # CONFIG_NETFILTER_XT_TARGET_RATEEST is not set | 472 | # CONFIG_NETFILTER_XT_TARGET_RATEEST is not set |
| 429 | CONFIG_NETFILTER_XT_TARGET_TRACE=m | 473 | CONFIG_NETFILTER_XT_TARGET_TRACE=m |
| 430 | CONFIG_NETFILTER_XT_TARGET_SECMARK=m | 474 | CONFIG_NETFILTER_XT_TARGET_SECMARK=m |
| 431 | CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m | ||
| 432 | CONFIG_NETFILTER_XT_TARGET_TCPMSS=m | 475 | CONFIG_NETFILTER_XT_TARGET_TCPMSS=m |
| 433 | # CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set | 476 | # CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set |
| 477 | # CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set | ||
| 434 | CONFIG_NETFILTER_XT_MATCH_COMMENT=m | 478 | CONFIG_NETFILTER_XT_MATCH_COMMENT=m |
| 435 | CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m | 479 | CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m |
| 436 | CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m | 480 | CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m |
| @@ -439,20 +483,23 @@ CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m | |||
| 439 | CONFIG_NETFILTER_XT_MATCH_DCCP=m | 483 | CONFIG_NETFILTER_XT_MATCH_DCCP=m |
| 440 | CONFIG_NETFILTER_XT_MATCH_DSCP=m | 484 | CONFIG_NETFILTER_XT_MATCH_DSCP=m |
| 441 | CONFIG_NETFILTER_XT_MATCH_ESP=m | 485 | CONFIG_NETFILTER_XT_MATCH_ESP=m |
| 486 | CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m | ||
| 442 | CONFIG_NETFILTER_XT_MATCH_HELPER=m | 487 | CONFIG_NETFILTER_XT_MATCH_HELPER=m |
| 488 | CONFIG_NETFILTER_XT_MATCH_HL=m | ||
| 443 | # CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set | 489 | # CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set |
| 444 | CONFIG_NETFILTER_XT_MATCH_LENGTH=m | 490 | CONFIG_NETFILTER_XT_MATCH_LENGTH=m |
| 445 | CONFIG_NETFILTER_XT_MATCH_LIMIT=m | 491 | CONFIG_NETFILTER_XT_MATCH_LIMIT=m |
| 446 | CONFIG_NETFILTER_XT_MATCH_MAC=m | 492 | CONFIG_NETFILTER_XT_MATCH_MAC=m |
| 447 | CONFIG_NETFILTER_XT_MATCH_MARK=m | 493 | CONFIG_NETFILTER_XT_MATCH_MARK=m |
| 494 | CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m | ||
| 448 | # CONFIG_NETFILTER_XT_MATCH_OWNER is not set | 495 | # CONFIG_NETFILTER_XT_MATCH_OWNER is not set |
| 449 | CONFIG_NETFILTER_XT_MATCH_POLICY=m | 496 | CONFIG_NETFILTER_XT_MATCH_POLICY=m |
| 450 | CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m | ||
| 451 | CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m | 497 | CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m |
| 452 | CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m | 498 | CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m |
| 453 | CONFIG_NETFILTER_XT_MATCH_QUOTA=m | 499 | CONFIG_NETFILTER_XT_MATCH_QUOTA=m |
| 454 | # CONFIG_NETFILTER_XT_MATCH_RATEEST is not set | 500 | # CONFIG_NETFILTER_XT_MATCH_RATEEST is not set |
| 455 | CONFIG_NETFILTER_XT_MATCH_REALM=m | 501 | CONFIG_NETFILTER_XT_MATCH_REALM=m |
| 502 | # CONFIG_NETFILTER_XT_MATCH_RECENT is not set | ||
| 456 | CONFIG_NETFILTER_XT_MATCH_SCTP=m | 503 | CONFIG_NETFILTER_XT_MATCH_SCTP=m |
| 457 | CONFIG_NETFILTER_XT_MATCH_STATE=m | 504 | CONFIG_NETFILTER_XT_MATCH_STATE=m |
| 458 | CONFIG_NETFILTER_XT_MATCH_STATISTIC=m | 505 | CONFIG_NETFILTER_XT_MATCH_STATISTIC=m |
| @@ -460,20 +507,53 @@ CONFIG_NETFILTER_XT_MATCH_STRING=m | |||
| 460 | CONFIG_NETFILTER_XT_MATCH_TCPMSS=m | 507 | CONFIG_NETFILTER_XT_MATCH_TCPMSS=m |
| 461 | CONFIG_NETFILTER_XT_MATCH_TIME=m | 508 | CONFIG_NETFILTER_XT_MATCH_TIME=m |
| 462 | CONFIG_NETFILTER_XT_MATCH_U32=m | 509 | CONFIG_NETFILTER_XT_MATCH_U32=m |
| 463 | CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m | 510 | # CONFIG_NETFILTER_XT_MATCH_OSF is not set |
| 511 | CONFIG_IP_VS=m | ||
| 512 | # CONFIG_IP_VS_IPV6 is not set | ||
| 513 | # CONFIG_IP_VS_DEBUG is not set | ||
| 514 | CONFIG_IP_VS_TAB_BITS=12 | ||
| 515 | |||
| 516 | # | ||
| 517 | # IPVS transport protocol load balancing support | ||
| 518 | # | ||
| 519 | CONFIG_IP_VS_PROTO_TCP=y | ||
| 520 | CONFIG_IP_VS_PROTO_UDP=y | ||
| 521 | CONFIG_IP_VS_PROTO_AH_ESP=y | ||
| 522 | CONFIG_IP_VS_PROTO_ESP=y | ||
| 523 | CONFIG_IP_VS_PROTO_AH=y | ||
| 524 | # CONFIG_IP_VS_PROTO_SCTP is not set | ||
| 525 | |||
| 526 | # | ||
| 527 | # IPVS scheduler | ||
| 528 | # | ||
| 529 | CONFIG_IP_VS_RR=m | ||
| 530 | CONFIG_IP_VS_WRR=m | ||
| 531 | CONFIG_IP_VS_LC=m | ||
| 532 | CONFIG_IP_VS_WLC=m | ||
| 533 | CONFIG_IP_VS_LBLC=m | ||
| 534 | CONFIG_IP_VS_LBLCR=m | ||
| 535 | CONFIG_IP_VS_DH=m | ||
| 536 | CONFIG_IP_VS_SH=m | ||
| 537 | CONFIG_IP_VS_SED=m | ||
| 538 | CONFIG_IP_VS_NQ=m | ||
| 539 | |||
| 540 | # | ||
| 541 | # IPVS application helper | ||
| 542 | # | ||
| 543 | CONFIG_IP_VS_FTP=m | ||
| 464 | 544 | ||
| 465 | # | 545 | # |
| 466 | # IP: Netfilter Configuration | 546 | # IP: Netfilter Configuration |
| 467 | # | 547 | # |
| 548 | CONFIG_NF_DEFRAG_IPV4=m | ||
| 468 | CONFIG_NF_CONNTRACK_IPV4=m | 549 | CONFIG_NF_CONNTRACK_IPV4=m |
| 469 | CONFIG_NF_CONNTRACK_PROC_COMPAT=y | 550 | CONFIG_NF_CONNTRACK_PROC_COMPAT=y |
| 470 | CONFIG_IP_NF_QUEUE=m | 551 | CONFIG_IP_NF_QUEUE=m |
| 471 | CONFIG_IP_NF_IPTABLES=m | 552 | CONFIG_IP_NF_IPTABLES=m |
| 472 | CONFIG_IP_NF_MATCH_RECENT=m | 553 | CONFIG_IP_NF_MATCH_ADDRTYPE=m |
| 473 | CONFIG_IP_NF_MATCH_ECN=m | ||
| 474 | CONFIG_IP_NF_MATCH_AH=m | 554 | CONFIG_IP_NF_MATCH_AH=m |
| 555 | CONFIG_IP_NF_MATCH_ECN=m | ||
| 475 | CONFIG_IP_NF_MATCH_TTL=m | 556 | CONFIG_IP_NF_MATCH_TTL=m |
| 476 | CONFIG_IP_NF_MATCH_ADDRTYPE=m | ||
| 477 | CONFIG_IP_NF_FILTER=m | 557 | CONFIG_IP_NF_FILTER=m |
| 478 | CONFIG_IP_NF_TARGET_REJECT=m | 558 | CONFIG_IP_NF_TARGET_REJECT=m |
| 479 | CONFIG_IP_NF_TARGET_LOG=m | 559 | CONFIG_IP_NF_TARGET_LOG=m |
| @@ -481,10 +561,13 @@ CONFIG_IP_NF_TARGET_ULOG=m | |||
| 481 | CONFIG_NF_NAT=m | 561 | CONFIG_NF_NAT=m |
| 482 | CONFIG_NF_NAT_NEEDED=y | 562 | CONFIG_NF_NAT_NEEDED=y |
| 483 | CONFIG_IP_NF_TARGET_MASQUERADE=m | 563 | CONFIG_IP_NF_TARGET_MASQUERADE=m |
| 484 | CONFIG_IP_NF_TARGET_REDIRECT=m | ||
| 485 | CONFIG_IP_NF_TARGET_NETMAP=m | 564 | CONFIG_IP_NF_TARGET_NETMAP=m |
| 565 | CONFIG_IP_NF_TARGET_REDIRECT=m | ||
| 486 | CONFIG_NF_NAT_SNMP_BASIC=m | 566 | CONFIG_NF_NAT_SNMP_BASIC=m |
| 567 | CONFIG_NF_NAT_PROTO_DCCP=m | ||
| 487 | CONFIG_NF_NAT_PROTO_GRE=m | 568 | CONFIG_NF_NAT_PROTO_GRE=m |
| 569 | CONFIG_NF_NAT_PROTO_UDPLITE=m | ||
| 570 | CONFIG_NF_NAT_PROTO_SCTP=m | ||
| 488 | CONFIG_NF_NAT_FTP=m | 571 | CONFIG_NF_NAT_FTP=m |
| 489 | CONFIG_NF_NAT_IRC=m | 572 | CONFIG_NF_NAT_IRC=m |
| 490 | CONFIG_NF_NAT_TFTP=m | 573 | CONFIG_NF_NAT_TFTP=m |
| @@ -493,9 +576,9 @@ CONFIG_NF_NAT_PPTP=m | |||
| 493 | CONFIG_NF_NAT_H323=m | 576 | CONFIG_NF_NAT_H323=m |
| 494 | CONFIG_NF_NAT_SIP=m | 577 | CONFIG_NF_NAT_SIP=m |
| 495 | CONFIG_IP_NF_MANGLE=m | 578 | CONFIG_IP_NF_MANGLE=m |
| 579 | CONFIG_IP_NF_TARGET_CLUSTERIP=m | ||
| 496 | CONFIG_IP_NF_TARGET_ECN=m | 580 | CONFIG_IP_NF_TARGET_ECN=m |
| 497 | CONFIG_IP_NF_TARGET_TTL=m | 581 | CONFIG_IP_NF_TARGET_TTL=m |
| 498 | CONFIG_IP_NF_TARGET_CLUSTERIP=m | ||
| 499 | CONFIG_IP_NF_RAW=m | 582 | CONFIG_IP_NF_RAW=m |
| 500 | CONFIG_IP_NF_ARPTABLES=m | 583 | CONFIG_IP_NF_ARPTABLES=m |
| 501 | CONFIG_IP_NF_ARPFILTER=m | 584 | CONFIG_IP_NF_ARPFILTER=m |
| @@ -507,24 +590,20 @@ CONFIG_IP_NF_ARP_MANGLE=m | |||
| 507 | CONFIG_NF_CONNTRACK_IPV6=m | 590 | CONFIG_NF_CONNTRACK_IPV6=m |
| 508 | CONFIG_IP6_NF_QUEUE=m | 591 | CONFIG_IP6_NF_QUEUE=m |
| 509 | CONFIG_IP6_NF_IPTABLES=m | 592 | CONFIG_IP6_NF_IPTABLES=m |
| 510 | CONFIG_IP6_NF_MATCH_RT=m | 593 | CONFIG_IP6_NF_MATCH_AH=m |
| 511 | CONFIG_IP6_NF_MATCH_OPTS=m | 594 | CONFIG_IP6_NF_MATCH_EUI64=m |
| 512 | CONFIG_IP6_NF_MATCH_FRAG=m | 595 | CONFIG_IP6_NF_MATCH_FRAG=m |
| 596 | CONFIG_IP6_NF_MATCH_OPTS=m | ||
| 513 | CONFIG_IP6_NF_MATCH_HL=m | 597 | CONFIG_IP6_NF_MATCH_HL=m |
| 514 | CONFIG_IP6_NF_MATCH_IPV6HEADER=m | 598 | CONFIG_IP6_NF_MATCH_IPV6HEADER=m |
| 515 | CONFIG_IP6_NF_MATCH_AH=m | ||
| 516 | CONFIG_IP6_NF_MATCH_MH=m | 599 | CONFIG_IP6_NF_MATCH_MH=m |
| 517 | CONFIG_IP6_NF_MATCH_EUI64=m | 600 | CONFIG_IP6_NF_MATCH_RT=m |
| 518 | CONFIG_IP6_NF_FILTER=m | 601 | CONFIG_IP6_NF_TARGET_HL=m |
| 519 | CONFIG_IP6_NF_TARGET_LOG=m | 602 | CONFIG_IP6_NF_TARGET_LOG=m |
| 603 | CONFIG_IP6_NF_FILTER=m | ||
| 520 | CONFIG_IP6_NF_TARGET_REJECT=m | 604 | CONFIG_IP6_NF_TARGET_REJECT=m |
| 521 | CONFIG_IP6_NF_MANGLE=m | 605 | CONFIG_IP6_NF_MANGLE=m |
| 522 | CONFIG_IP6_NF_TARGET_HL=m | ||
| 523 | CONFIG_IP6_NF_RAW=m | 606 | CONFIG_IP6_NF_RAW=m |
| 524 | |||
| 525 | # | ||
| 526 | # Bridge: Netfilter Configuration | ||
| 527 | # | ||
| 528 | CONFIG_BRIDGE_NF_EBTABLES=m | 607 | CONFIG_BRIDGE_NF_EBTABLES=m |
| 529 | CONFIG_BRIDGE_EBT_BROUTE=m | 608 | CONFIG_BRIDGE_EBT_BROUTE=m |
| 530 | CONFIG_BRIDGE_EBT_T_FILTER=m | 609 | CONFIG_BRIDGE_EBT_T_FILTER=m |
| @@ -533,6 +612,7 @@ CONFIG_BRIDGE_EBT_802_3=m | |||
| 533 | CONFIG_BRIDGE_EBT_AMONG=m | 612 | CONFIG_BRIDGE_EBT_AMONG=m |
| 534 | CONFIG_BRIDGE_EBT_ARP=m | 613 | CONFIG_BRIDGE_EBT_ARP=m |
| 535 | CONFIG_BRIDGE_EBT_IP=m | 614 | CONFIG_BRIDGE_EBT_IP=m |
| 615 | # CONFIG_BRIDGE_EBT_IP6 is not set | ||
| 536 | CONFIG_BRIDGE_EBT_LIMIT=m | 616 | CONFIG_BRIDGE_EBT_LIMIT=m |
| 537 | CONFIG_BRIDGE_EBT_MARK=m | 617 | CONFIG_BRIDGE_EBT_MARK=m |
| 538 | CONFIG_BRIDGE_EBT_PKTTYPE=m | 618 | CONFIG_BRIDGE_EBT_PKTTYPE=m |
| @@ -545,31 +625,30 @@ CONFIG_BRIDGE_EBT_REDIRECT=m | |||
| 545 | CONFIG_BRIDGE_EBT_SNAT=m | 625 | CONFIG_BRIDGE_EBT_SNAT=m |
| 546 | CONFIG_BRIDGE_EBT_LOG=m | 626 | CONFIG_BRIDGE_EBT_LOG=m |
| 547 | CONFIG_BRIDGE_EBT_ULOG=m | 627 | CONFIG_BRIDGE_EBT_ULOG=m |
| 628 | # CONFIG_BRIDGE_EBT_NFLOG is not set | ||
| 548 | CONFIG_IP_DCCP=m | 629 | CONFIG_IP_DCCP=m |
| 549 | CONFIG_INET_DCCP_DIAG=m | 630 | CONFIG_INET_DCCP_DIAG=m |
| 550 | CONFIG_IP_DCCP_ACKVEC=y | ||
| 551 | 631 | ||
| 552 | # | 632 | # |
| 553 | # DCCP CCIDs Configuration (EXPERIMENTAL) | 633 | # DCCP CCIDs Configuration (EXPERIMENTAL) |
| 554 | # | 634 | # |
| 555 | CONFIG_IP_DCCP_CCID2=m | ||
| 556 | # CONFIG_IP_DCCP_CCID2_DEBUG is not set | 635 | # CONFIG_IP_DCCP_CCID2_DEBUG is not set |
| 557 | CONFIG_IP_DCCP_CCID3=m | 636 | CONFIG_IP_DCCP_CCID3=y |
| 558 | # CONFIG_IP_DCCP_CCID3_DEBUG is not set | 637 | # CONFIG_IP_DCCP_CCID3_DEBUG is not set |
| 559 | CONFIG_IP_DCCP_CCID3_RTO=100 | 638 | CONFIG_IP_DCCP_CCID3_RTO=100 |
| 560 | CONFIG_IP_DCCP_TFRC_LIB=m | 639 | CONFIG_IP_DCCP_TFRC_LIB=y |
| 561 | CONFIG_IP_SCTP=m | 640 | CONFIG_IP_SCTP=m |
| 562 | # CONFIG_SCTP_DBG_MSG is not set | 641 | # CONFIG_SCTP_DBG_MSG is not set |
| 563 | # CONFIG_SCTP_DBG_OBJCNT is not set | 642 | # CONFIG_SCTP_DBG_OBJCNT is not set |
| 564 | # CONFIG_SCTP_HMAC_NONE is not set | 643 | # CONFIG_SCTP_HMAC_NONE is not set |
| 565 | # CONFIG_SCTP_HMAC_SHA1 is not set | 644 | # CONFIG_SCTP_HMAC_SHA1 is not set |
| 566 | CONFIG_SCTP_HMAC_MD5=y | 645 | CONFIG_SCTP_HMAC_MD5=y |
| 646 | # CONFIG_RDS is not set | ||
| 567 | CONFIG_TIPC=m | 647 | CONFIG_TIPC=m |
| 568 | CONFIG_TIPC_ADVANCED=y | 648 | CONFIG_TIPC_ADVANCED=y |
| 569 | CONFIG_TIPC_ZONES=3 | 649 | CONFIG_TIPC_ZONES=3 |
| 570 | CONFIG_TIPC_CLUSTERS=1 | 650 | CONFIG_TIPC_CLUSTERS=1 |
| 571 | CONFIG_TIPC_NODES=255 | 651 | CONFIG_TIPC_NODES=255 |
| 572 | CONFIG_TIPC_SLAVE_NODES=0 | ||
| 573 | CONFIG_TIPC_PORTS=8191 | 652 | CONFIG_TIPC_PORTS=8191 |
| 574 | CONFIG_TIPC_LOG=0 | 653 | CONFIG_TIPC_LOG=0 |
| 575 | # CONFIG_TIPC_DEBUG is not set | 654 | # CONFIG_TIPC_DEBUG is not set |
| @@ -580,8 +659,12 @@ CONFIG_ATM_LANE=m | |||
| 580 | CONFIG_ATM_MPOA=m | 659 | CONFIG_ATM_MPOA=m |
| 581 | CONFIG_ATM_BR2684=m | 660 | CONFIG_ATM_BR2684=m |
| 582 | # CONFIG_ATM_BR2684_IPFILTER is not set | 661 | # CONFIG_ATM_BR2684_IPFILTER is not set |
| 662 | CONFIG_STP=m | ||
| 583 | CONFIG_BRIDGE=m | 663 | CONFIG_BRIDGE=m |
| 664 | CONFIG_BRIDGE_IGMP_SNOOPING=y | ||
| 665 | # CONFIG_NET_DSA is not set | ||
| 584 | CONFIG_VLAN_8021Q=m | 666 | CONFIG_VLAN_8021Q=m |
| 667 | # CONFIG_VLAN_8021Q_GVRP is not set | ||
| 585 | # CONFIG_DECNET is not set | 668 | # CONFIG_DECNET is not set |
| 586 | CONFIG_LLC=m | 669 | CONFIG_LLC=m |
| 587 | # CONFIG_LLC2 is not set | 670 | # CONFIG_LLC2 is not set |
| @@ -591,6 +674,8 @@ CONFIG_LLC=m | |||
| 591 | # CONFIG_LAPB is not set | 674 | # CONFIG_LAPB is not set |
| 592 | # CONFIG_ECONET is not set | 675 | # CONFIG_ECONET is not set |
| 593 | # CONFIG_WAN_ROUTER is not set | 676 | # CONFIG_WAN_ROUTER is not set |
| 677 | # CONFIG_PHONET is not set | ||
| 678 | # CONFIG_IEEE802154 is not set | ||
| 594 | CONFIG_NET_SCHED=y | 679 | CONFIG_NET_SCHED=y |
| 595 | 680 | ||
| 596 | # | 681 | # |
| @@ -601,7 +686,7 @@ CONFIG_NET_SCH_HTB=m | |||
| 601 | CONFIG_NET_SCH_HFSC=m | 686 | CONFIG_NET_SCH_HFSC=m |
| 602 | CONFIG_NET_SCH_ATM=m | 687 | CONFIG_NET_SCH_ATM=m |
| 603 | CONFIG_NET_SCH_PRIO=m | 688 | CONFIG_NET_SCH_PRIO=m |
| 604 | CONFIG_NET_SCH_RR=m | 689 | # CONFIG_NET_SCH_MULTIQ is not set |
| 605 | CONFIG_NET_SCH_RED=m | 690 | CONFIG_NET_SCH_RED=m |
| 606 | CONFIG_NET_SCH_SFQ=m | 691 | CONFIG_NET_SCH_SFQ=m |
| 607 | CONFIG_NET_SCH_TEQL=m | 692 | CONFIG_NET_SCH_TEQL=m |
| @@ -609,6 +694,7 @@ CONFIG_NET_SCH_TBF=m | |||
| 609 | CONFIG_NET_SCH_GRED=m | 694 | CONFIG_NET_SCH_GRED=m |
| 610 | CONFIG_NET_SCH_DSMARK=m | 695 | CONFIG_NET_SCH_DSMARK=m |
| 611 | CONFIG_NET_SCH_NETEM=m | 696 | CONFIG_NET_SCH_NETEM=m |
| 697 | # CONFIG_NET_SCH_DRR is not set | ||
| 612 | CONFIG_NET_SCH_INGRESS=m | 698 | CONFIG_NET_SCH_INGRESS=m |
| 613 | 699 | ||
| 614 | # | 700 | # |
| @@ -626,6 +712,7 @@ CONFIG_CLS_U32_MARK=y | |||
| 626 | CONFIG_NET_CLS_RSVP=m | 712 | CONFIG_NET_CLS_RSVP=m |
| 627 | CONFIG_NET_CLS_RSVP6=m | 713 | CONFIG_NET_CLS_RSVP6=m |
| 628 | # CONFIG_NET_CLS_FLOW is not set | 714 | # CONFIG_NET_CLS_FLOW is not set |
| 715 | # CONFIG_NET_CLS_CGROUP is not set | ||
| 629 | CONFIG_NET_EMATCH=y | 716 | CONFIG_NET_EMATCH=y |
| 630 | CONFIG_NET_EMATCH_STACK=32 | 717 | CONFIG_NET_EMATCH_STACK=32 |
| 631 | CONFIG_NET_EMATCH_CMP=m | 718 | CONFIG_NET_EMATCH_CMP=m |
| @@ -642,8 +729,10 @@ CONFIG_NET_ACT_IPT=m | |||
| 642 | CONFIG_NET_ACT_NAT=m | 729 | CONFIG_NET_ACT_NAT=m |
| 643 | CONFIG_NET_ACT_PEDIT=m | 730 | CONFIG_NET_ACT_PEDIT=m |
| 644 | CONFIG_NET_ACT_SIMP=m | 731 | CONFIG_NET_ACT_SIMP=m |
| 732 | # CONFIG_NET_ACT_SKBEDIT is not set | ||
| 645 | CONFIG_NET_CLS_IND=y | 733 | CONFIG_NET_CLS_IND=y |
| 646 | CONFIG_NET_SCH_FIFO=y | 734 | CONFIG_NET_SCH_FIFO=y |
| 735 | # CONFIG_DCB is not set | ||
| 647 | 736 | ||
| 648 | # | 737 | # |
| 649 | # Network testing | 738 | # Network testing |
| @@ -651,58 +740,7 @@ CONFIG_NET_SCH_FIFO=y | |||
| 651 | CONFIG_NET_PKTGEN=m | 740 | CONFIG_NET_PKTGEN=m |
| 652 | # CONFIG_HAMRADIO is not set | 741 | # CONFIG_HAMRADIO is not set |
| 653 | # CONFIG_CAN is not set | 742 | # CONFIG_CAN is not set |
| 654 | CONFIG_IRDA=m | 743 | # CONFIG_IRDA is not set |
| 655 | |||
| 656 | # | ||
| 657 | # IrDA protocols | ||
| 658 | # | ||
| 659 | CONFIG_IRLAN=m | ||
| 660 | CONFIG_IRNET=m | ||
| 661 | CONFIG_IRCOMM=m | ||
| 662 | # CONFIG_IRDA_ULTRA is not set | ||
| 663 | |||
| 664 | # | ||
| 665 | # IrDA options | ||
| 666 | # | ||
| 667 | CONFIG_IRDA_CACHE_LAST_LSAP=y | ||
| 668 | CONFIG_IRDA_FAST_RR=y | ||
| 669 | # CONFIG_IRDA_DEBUG is not set | ||
| 670 | |||
| 671 | # | ||
| 672 | # Infrared-port device drivers | ||
| 673 | # | ||
| 674 | |||
| 675 | # | ||
| 676 | # SIR device drivers | ||
| 677 | # | ||
| 678 | CONFIG_IRTTY_SIR=m | ||
| 679 | |||
| 680 | # | ||
| 681 | # Dongle support | ||
| 682 | # | ||
| 683 | CONFIG_DONGLE=y | ||
| 684 | CONFIG_ESI_DONGLE=m | ||
| 685 | CONFIG_ACTISYS_DONGLE=m | ||
| 686 | CONFIG_TEKRAM_DONGLE=m | ||
| 687 | CONFIG_TOIM3232_DONGLE=m | ||
| 688 | CONFIG_LITELINK_DONGLE=m | ||
| 689 | CONFIG_MA600_DONGLE=m | ||
| 690 | CONFIG_GIRBIL_DONGLE=m | ||
| 691 | CONFIG_MCP2120_DONGLE=m | ||
| 692 | CONFIG_OLD_BELKIN_DONGLE=m | ||
| 693 | CONFIG_ACT200L_DONGLE=m | ||
| 694 | CONFIG_KINGSUN_DONGLE=m | ||
| 695 | CONFIG_KSDAZZLE_DONGLE=m | ||
| 696 | CONFIG_KS959_DONGLE=m | ||
| 697 | |||
| 698 | # | ||
| 699 | # FIR device drivers | ||
| 700 | # | ||
| 701 | CONFIG_USB_IRDA=m | ||
| 702 | CONFIG_SIGMATEL_FIR=m | ||
| 703 | CONFIG_TOSHIBA_FIR=m | ||
| 704 | CONFIG_VLSI_FIR=m | ||
| 705 | CONFIG_MCS_FIR=m | ||
| 706 | CONFIG_BT=m | 744 | CONFIG_BT=m |
| 707 | # CONFIG_BT_L2CAP is not set | 745 | # CONFIG_BT_L2CAP is not set |
| 708 | # CONFIG_BT_SCO is not set | 746 | # CONFIG_BT_SCO is not set |
| @@ -710,8 +748,7 @@ CONFIG_BT=m | |||
| 710 | # | 748 | # |
| 711 | # Bluetooth device drivers | 749 | # Bluetooth device drivers |
| 712 | # | 750 | # |
| 713 | CONFIG_BT_HCIUSB=m | 751 | # CONFIG_BT_HCIBTUSB is not set |
| 714 | CONFIG_BT_HCIUSB_SCO=y | ||
| 715 | CONFIG_BT_HCIUART=m | 752 | CONFIG_BT_HCIUART=m |
| 716 | CONFIG_BT_HCIUART_H4=y | 753 | CONFIG_BT_HCIUART_H4=y |
| 717 | CONFIG_BT_HCIUART_BCSP=y | 754 | CONFIG_BT_HCIUART_BCSP=y |
| @@ -720,51 +757,37 @@ CONFIG_BT_HCIBCM203X=m | |||
| 720 | CONFIG_BT_HCIBPA10X=m | 757 | CONFIG_BT_HCIBPA10X=m |
| 721 | CONFIG_BT_HCIBFUSB=m | 758 | CONFIG_BT_HCIBFUSB=m |
| 722 | CONFIG_BT_HCIVHCI=m | 759 | CONFIG_BT_HCIVHCI=m |
| 760 | # CONFIG_BT_MRVL is not set | ||
| 723 | # CONFIG_AF_RXRPC is not set | 761 | # CONFIG_AF_RXRPC is not set |
| 724 | CONFIG_FIB_RULES=y | 762 | CONFIG_FIB_RULES=y |
| 725 | 763 | CONFIG_WIRELESS=y | |
| 726 | # | 764 | CONFIG_WEXT_CORE=y |
| 727 | # Wireless | 765 | CONFIG_WEXT_PROC=y |
| 728 | # | ||
| 729 | CONFIG_CFG80211=m | 766 | CONFIG_CFG80211=m |
| 730 | CONFIG_NL80211=y | 767 | # CONFIG_NL80211_TESTMODE is not set |
| 731 | CONFIG_WIRELESS_EXT=y | 768 | # CONFIG_CFG80211_DEVELOPER_WARNINGS is not set |
| 769 | # CONFIG_CFG80211_REG_DEBUG is not set | ||
| 770 | CONFIG_CFG80211_DEFAULT_PS=y | ||
| 771 | # CONFIG_CFG80211_DEBUGFS is not set | ||
| 772 | # CONFIG_CFG80211_INTERNAL_REGDB is not set | ||
| 773 | CONFIG_CFG80211_WEXT=y | ||
| 774 | CONFIG_WIRELESS_EXT_SYSFS=y | ||
| 775 | # CONFIG_LIB80211 is not set | ||
| 732 | CONFIG_MAC80211=m | 776 | CONFIG_MAC80211=m |
| 733 | 777 | CONFIG_MAC80211_RC_PID=y | |
| 734 | # | 778 | CONFIG_MAC80211_RC_MINSTREL=y |
| 735 | # Rate control algorithm selection | ||
| 736 | # | ||
| 737 | CONFIG_MAC80211_RC_DEFAULT_PID=y | 779 | CONFIG_MAC80211_RC_DEFAULT_PID=y |
| 738 | # CONFIG_MAC80211_RC_DEFAULT_SIMPLE is not set | 780 | # CONFIG_MAC80211_RC_DEFAULT_MINSTREL is not set |
| 739 | # CONFIG_MAC80211_RC_DEFAULT_NONE is not set | ||
| 740 | |||
| 741 | # | ||
| 742 | # Selecting 'y' for an algorithm will | ||
| 743 | # | ||
| 744 | |||
| 745 | # | ||
| 746 | # build the algorithm into mac80211. | ||
| 747 | # | ||
| 748 | CONFIG_MAC80211_RC_DEFAULT="pid" | 781 | CONFIG_MAC80211_RC_DEFAULT="pid" |
| 749 | CONFIG_MAC80211_RC_PID=y | 782 | CONFIG_MAC80211_MESH=y |
| 750 | # CONFIG_MAC80211_RC_SIMPLE is not set | ||
| 751 | CONFIG_MAC80211_LEDS=y | 783 | CONFIG_MAC80211_LEDS=y |
| 752 | # CONFIG_MAC80211_DEBUGFS is not set | 784 | # CONFIG_MAC80211_DEBUGFS is not set |
| 753 | # CONFIG_MAC80211_DEBUG_PACKET_ALIGNMENT is not set | 785 | # CONFIG_MAC80211_DEBUG_MENU is not set |
| 754 | # CONFIG_MAC80211_DEBUG is not set | 786 | # CONFIG_WIMAX is not set |
| 755 | CONFIG_IEEE80211=m | ||
| 756 | # CONFIG_IEEE80211_DEBUG is not set | ||
| 757 | CONFIG_IEEE80211_CRYPT_WEP=m | ||
| 758 | CONFIG_IEEE80211_CRYPT_CCMP=m | ||
| 759 | CONFIG_IEEE80211_CRYPT_TKIP=m | ||
| 760 | CONFIG_IEEE80211_SOFTMAC=m | ||
| 761 | # CONFIG_IEEE80211_SOFTMAC_DEBUG is not set | ||
| 762 | CONFIG_RFKILL=m | 787 | CONFIG_RFKILL=m |
| 763 | CONFIG_RFKILL_INPUT=m | ||
| 764 | CONFIG_RFKILL_LEDS=y | 788 | CONFIG_RFKILL_LEDS=y |
| 765 | CONFIG_NET_9P=m | 789 | CONFIG_RFKILL_INPUT=y |
| 766 | CONFIG_NET_9P_FD=m | 790 | # CONFIG_NET_9P is not set |
| 767 | # CONFIG_NET_9P_DEBUG is not set | ||
| 768 | 791 | ||
| 769 | # | 792 | # |
| 770 | # Device Drivers | 793 | # Device Drivers |
| @@ -774,17 +797,22 @@ CONFIG_NET_9P_FD=m | |||
| 774 | # Generic Driver Options | 797 | # Generic Driver Options |
| 775 | # | 798 | # |
| 776 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 799 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 800 | # CONFIG_DEVTMPFS is not set | ||
| 777 | CONFIG_STANDALONE=y | 801 | CONFIG_STANDALONE=y |
| 778 | CONFIG_PREVENT_FIRMWARE_BUILD=y | 802 | CONFIG_PREVENT_FIRMWARE_BUILD=y |
| 779 | CONFIG_FW_LOADER=m | 803 | CONFIG_FW_LOADER=m |
| 804 | CONFIG_FIRMWARE_IN_KERNEL=y | ||
| 805 | CONFIG_EXTRA_FIRMWARE="" | ||
| 780 | # CONFIG_SYS_HYPERVISOR is not set | 806 | # CONFIG_SYS_HYPERVISOR is not set |
| 781 | CONFIG_CONNECTOR=m | 807 | CONFIG_CONNECTOR=m |
| 782 | CONFIG_MTD=y | 808 | CONFIG_MTD=y |
| 783 | # CONFIG_MTD_DEBUG is not set | 809 | # CONFIG_MTD_DEBUG is not set |
| 810 | # CONFIG_MTD_TESTS is not set | ||
| 784 | CONFIG_MTD_CONCAT=y | 811 | CONFIG_MTD_CONCAT=y |
| 785 | CONFIG_MTD_PARTITIONS=y | 812 | CONFIG_MTD_PARTITIONS=y |
| 786 | # CONFIG_MTD_REDBOOT_PARTS is not set | 813 | # CONFIG_MTD_REDBOOT_PARTS is not set |
| 787 | # CONFIG_MTD_CMDLINE_PARTS is not set | 814 | # CONFIG_MTD_CMDLINE_PARTS is not set |
| 815 | # CONFIG_MTD_AR7_PARTS is not set | ||
| 788 | 816 | ||
| 789 | # | 817 | # |
| 790 | # User Modules And Translation Layers | 818 | # User Modules And Translation Layers |
| @@ -829,9 +857,7 @@ CONFIG_MTD_ABSENT=y | |||
| 829 | # | 857 | # |
| 830 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | 858 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set |
| 831 | CONFIG_MTD_PHYSMAP=y | 859 | CONFIG_MTD_PHYSMAP=y |
| 832 | CONFIG_MTD_PHYSMAP_START=0x8000000 | 860 | # CONFIG_MTD_PHYSMAP_COMPAT is not set |
| 833 | CONFIG_MTD_PHYSMAP_LEN=0x0 | ||
| 834 | CONFIG_MTD_PHYSMAP_BANKWIDTH=2 | ||
| 835 | # CONFIG_MTD_INTEL_VR_NOR is not set | 861 | # CONFIG_MTD_INTEL_VR_NOR is not set |
| 836 | # CONFIG_MTD_PLATRAM is not set | 862 | # CONFIG_MTD_PLATRAM is not set |
| 837 | 863 | ||
| @@ -854,6 +880,11 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2 | |||
| 854 | # CONFIG_MTD_ONENAND is not set | 880 | # CONFIG_MTD_ONENAND is not set |
| 855 | 881 | ||
| 856 | # | 882 | # |
| 883 | # LPDDR flash memory drivers | ||
| 884 | # | ||
| 885 | # CONFIG_MTD_LPDDR is not set | ||
| 886 | |||
| 887 | # | ||
| 857 | # UBI - Unsorted block images | 888 | # UBI - Unsorted block images |
| 858 | # | 889 | # |
| 859 | # CONFIG_MTD_UBI is not set | 890 | # CONFIG_MTD_UBI is not set |
| @@ -866,6 +897,7 @@ CONFIG_BLK_DEV=y | |||
| 866 | # CONFIG_BLK_DEV_COW_COMMON is not set | 897 | # CONFIG_BLK_DEV_COW_COMMON is not set |
| 867 | CONFIG_BLK_DEV_LOOP=m | 898 | CONFIG_BLK_DEV_LOOP=m |
| 868 | CONFIG_BLK_DEV_CRYPTOLOOP=m | 899 | CONFIG_BLK_DEV_CRYPTOLOOP=m |
| 900 | # CONFIG_BLK_DEV_DRBD is not set | ||
| 869 | CONFIG_BLK_DEV_NBD=m | 901 | CONFIG_BLK_DEV_NBD=m |
| 870 | # CONFIG_BLK_DEV_SX8 is not set | 902 | # CONFIG_BLK_DEV_SX8 is not set |
| 871 | # CONFIG_BLK_DEV_UB is not set | 903 | # CONFIG_BLK_DEV_UB is not set |
| @@ -875,18 +907,27 @@ CONFIG_BLK_DEV_RAM_SIZE=16384 | |||
| 875 | # CONFIG_BLK_DEV_XIP is not set | 907 | # CONFIG_BLK_DEV_XIP is not set |
| 876 | # CONFIG_CDROM_PKTCDVD is not set | 908 | # CONFIG_CDROM_PKTCDVD is not set |
| 877 | CONFIG_ATA_OVER_ETH=m | 909 | CONFIG_ATA_OVER_ETH=m |
| 910 | # CONFIG_BLK_DEV_HD is not set | ||
| 878 | CONFIG_MISC_DEVICES=y | 911 | CONFIG_MISC_DEVICES=y |
| 879 | # CONFIG_PHANTOM is not set | 912 | # CONFIG_PHANTOM is not set |
| 880 | # CONFIG_EEPROM_93CX6 is not set | ||
| 881 | # CONFIG_SGI_IOC4 is not set | 913 | # CONFIG_SGI_IOC4 is not set |
| 882 | # CONFIG_TIFM_CORE is not set | 914 | # CONFIG_TIFM_CORE is not set |
| 883 | # CONFIG_ENCLOSURE_SERVICES is not set | 915 | # CONFIG_ENCLOSURE_SERVICES is not set |
| 916 | # CONFIG_HP_ILO is not set | ||
| 917 | # CONFIG_C2PORT is not set | ||
| 918 | |||
| 919 | # | ||
| 920 | # EEPROM support | ||
| 921 | # | ||
| 922 | # CONFIG_EEPROM_93CX6 is not set | ||
| 923 | # CONFIG_CB710_CORE is not set | ||
| 884 | CONFIG_HAVE_IDE=y | 924 | CONFIG_HAVE_IDE=y |
| 885 | # CONFIG_IDE is not set | 925 | # CONFIG_IDE is not set |
| 886 | 926 | ||
| 887 | # | 927 | # |
| 888 | # SCSI device support | 928 | # SCSI device support |
| 889 | # | 929 | # |
| 930 | CONFIG_SCSI_MOD=y | ||
| 890 | CONFIG_RAID_ATTRS=m | 931 | CONFIG_RAID_ATTRS=m |
| 891 | CONFIG_SCSI=y | 932 | CONFIG_SCSI=y |
| 892 | CONFIG_SCSI_DMA=y | 933 | CONFIG_SCSI_DMA=y |
| @@ -904,10 +945,6 @@ CONFIG_BLK_DEV_SR=m | |||
| 904 | CONFIG_BLK_DEV_SR_VENDOR=y | 945 | CONFIG_BLK_DEV_SR_VENDOR=y |
| 905 | CONFIG_CHR_DEV_SG=m | 946 | CONFIG_CHR_DEV_SG=m |
| 906 | CONFIG_CHR_DEV_SCH=m | 947 | CONFIG_CHR_DEV_SCH=m |
| 907 | |||
| 908 | # | ||
| 909 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs | ||
| 910 | # | ||
| 911 | CONFIG_SCSI_MULTI_LUN=y | 948 | CONFIG_SCSI_MULTI_LUN=y |
| 912 | CONFIG_SCSI_CONSTANTS=y | 949 | CONFIG_SCSI_CONSTANTS=y |
| 913 | CONFIG_SCSI_LOGGING=y | 950 | CONFIG_SCSI_LOGGING=y |
| @@ -924,21 +961,30 @@ CONFIG_SCSI_ISCSI_ATTRS=m | |||
| 924 | # CONFIG_SCSI_SRP_ATTRS is not set | 961 | # CONFIG_SCSI_SRP_ATTRS is not set |
| 925 | CONFIG_SCSI_LOWLEVEL=y | 962 | CONFIG_SCSI_LOWLEVEL=y |
| 926 | CONFIG_ISCSI_TCP=m | 963 | CONFIG_ISCSI_TCP=m |
| 964 | # CONFIG_SCSI_BNX2_ISCSI is not set | ||
| 965 | # CONFIG_BE2ISCSI is not set | ||
| 927 | # CONFIG_BLK_DEV_3W_XXXX_RAID is not set | 966 | # CONFIG_BLK_DEV_3W_XXXX_RAID is not set |
| 967 | # CONFIG_SCSI_HPSA is not set | ||
| 928 | # CONFIG_SCSI_3W_9XXX is not set | 968 | # CONFIG_SCSI_3W_9XXX is not set |
| 969 | # CONFIG_SCSI_3W_SAS is not set | ||
| 929 | # CONFIG_SCSI_ACARD is not set | 970 | # CONFIG_SCSI_ACARD is not set |
| 930 | # CONFIG_SCSI_AACRAID is not set | 971 | # CONFIG_SCSI_AACRAID is not set |
| 931 | # CONFIG_SCSI_AIC7XXX is not set | 972 | # CONFIG_SCSI_AIC7XXX is not set |
| 932 | # CONFIG_SCSI_AIC7XXX_OLD is not set | 973 | # CONFIG_SCSI_AIC7XXX_OLD is not set |
| 933 | # CONFIG_SCSI_AIC79XX is not set | 974 | # CONFIG_SCSI_AIC79XX is not set |
| 934 | # CONFIG_SCSI_AIC94XX is not set | 975 | # CONFIG_SCSI_AIC94XX is not set |
| 976 | # CONFIG_SCSI_MVSAS is not set | ||
| 935 | # CONFIG_SCSI_DPT_I2O is not set | 977 | # CONFIG_SCSI_DPT_I2O is not set |
| 936 | # CONFIG_SCSI_ADVANSYS is not set | 978 | # CONFIG_SCSI_ADVANSYS is not set |
| 937 | # CONFIG_SCSI_ARCMSR is not set | 979 | # CONFIG_SCSI_ARCMSR is not set |
| 938 | # CONFIG_MEGARAID_NEWGEN is not set | 980 | # CONFIG_MEGARAID_NEWGEN is not set |
| 939 | # CONFIG_MEGARAID_LEGACY is not set | 981 | # CONFIG_MEGARAID_LEGACY is not set |
| 940 | # CONFIG_MEGARAID_SAS is not set | 982 | # CONFIG_MEGARAID_SAS is not set |
| 983 | # CONFIG_SCSI_MPT2SAS is not set | ||
| 941 | # CONFIG_SCSI_HPTIOP is not set | 984 | # CONFIG_SCSI_HPTIOP is not set |
| 985 | # CONFIG_LIBFC is not set | ||
| 986 | # CONFIG_LIBFCOE is not set | ||
| 987 | # CONFIG_FCOE is not set | ||
| 942 | # CONFIG_SCSI_DMX3191D is not set | 988 | # CONFIG_SCSI_DMX3191D is not set |
| 943 | # CONFIG_SCSI_FUTURE_DOMAIN is not set | 989 | # CONFIG_SCSI_FUTURE_DOMAIN is not set |
| 944 | # CONFIG_SCSI_IPS is not set | 990 | # CONFIG_SCSI_IPS is not set |
| @@ -954,7 +1000,12 @@ CONFIG_ISCSI_TCP=m | |||
| 954 | # CONFIG_SCSI_DC390T is not set | 1000 | # CONFIG_SCSI_DC390T is not set |
| 955 | # CONFIG_SCSI_NSP32 is not set | 1001 | # CONFIG_SCSI_NSP32 is not set |
| 956 | # CONFIG_SCSI_DEBUG is not set | 1002 | # CONFIG_SCSI_DEBUG is not set |
| 1003 | # CONFIG_SCSI_PMCRAID is not set | ||
| 1004 | # CONFIG_SCSI_PM8001 is not set | ||
| 957 | # CONFIG_SCSI_SRP is not set | 1005 | # CONFIG_SCSI_SRP is not set |
| 1006 | # CONFIG_SCSI_BFA_FC is not set | ||
| 1007 | # CONFIG_SCSI_DH is not set | ||
| 1008 | # CONFIG_SCSI_OSD_INITIATOR is not set | ||
| 958 | # CONFIG_ATA is not set | 1009 | # CONFIG_ATA is not set |
| 959 | # CONFIG_MD is not set | 1010 | # CONFIG_MD is not set |
| 960 | # CONFIG_FUSION is not set | 1011 | # CONFIG_FUSION is not set |
| @@ -962,11 +1013,18 @@ CONFIG_ISCSI_TCP=m | |||
| 962 | # | 1013 | # |
| 963 | # IEEE 1394 (FireWire) support | 1014 | # IEEE 1394 (FireWire) support |
| 964 | # | 1015 | # |
| 1016 | |||
| 1017 | # | ||
| 1018 | # You can enable one or both FireWire driver stacks. | ||
| 1019 | # | ||
| 1020 | |||
| 1021 | # | ||
| 1022 | # The newer stack is recommended. | ||
| 1023 | # | ||
| 965 | # CONFIG_FIREWIRE is not set | 1024 | # CONFIG_FIREWIRE is not set |
| 966 | # CONFIG_IEEE1394 is not set | 1025 | # CONFIG_IEEE1394 is not set |
| 967 | # CONFIG_I2O is not set | 1026 | # CONFIG_I2O is not set |
| 968 | CONFIG_NETDEVICES=y | 1027 | CONFIG_NETDEVICES=y |
| 969 | # CONFIG_NETDEVICES_MULTIQUEUE is not set | ||
| 970 | # CONFIG_IFB is not set | 1028 | # CONFIG_IFB is not set |
| 971 | CONFIG_DUMMY=m | 1029 | CONFIG_DUMMY=m |
| 972 | # CONFIG_BONDING is not set | 1030 | # CONFIG_BONDING is not set |
| @@ -990,8 +1048,11 @@ CONFIG_SMSC_PHY=m | |||
| 990 | CONFIG_BROADCOM_PHY=m | 1048 | CONFIG_BROADCOM_PHY=m |
| 991 | CONFIG_ICPLUS_PHY=m | 1049 | CONFIG_ICPLUS_PHY=m |
| 992 | # CONFIG_REALTEK_PHY is not set | 1050 | # CONFIG_REALTEK_PHY is not set |
| 993 | # CONFIG_FIXED_PHY is not set | 1051 | # CONFIG_NATIONAL_PHY is not set |
| 1052 | # CONFIG_STE10XP is not set | ||
| 1053 | # CONFIG_LSI_ET1011C_PHY is not set | ||
| 994 | CONFIG_MDIO_BITBANG=m | 1054 | CONFIG_MDIO_BITBANG=m |
| 1055 | # CONFIG_MDIO_GPIO is not set | ||
| 995 | CONFIG_NET_ETHERNET=y | 1056 | CONFIG_NET_ETHERNET=y |
| 996 | CONFIG_MII=y | 1057 | CONFIG_MII=y |
| 997 | # CONFIG_AX88796 is not set | 1058 | # CONFIG_AX88796 is not set |
| @@ -999,24 +1060,31 @@ CONFIG_MII=y | |||
| 999 | # CONFIG_SUNGEM is not set | 1060 | # CONFIG_SUNGEM is not set |
| 1000 | # CONFIG_CASSINI is not set | 1061 | # CONFIG_CASSINI is not set |
| 1001 | # CONFIG_NET_VENDOR_3COM is not set | 1062 | # CONFIG_NET_VENDOR_3COM is not set |
| 1063 | # CONFIG_SMC91X is not set | ||
| 1002 | # CONFIG_DM9000 is not set | 1064 | # CONFIG_DM9000 is not set |
| 1065 | # CONFIG_ETHOC is not set | ||
| 1066 | # CONFIG_SMSC911X is not set | ||
| 1067 | # CONFIG_DNET is not set | ||
| 1003 | # CONFIG_NET_TULIP is not set | 1068 | # CONFIG_NET_TULIP is not set |
| 1004 | # CONFIG_HP100 is not set | 1069 | # CONFIG_HP100 is not set |
| 1005 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | 1070 | # CONFIG_IBM_NEW_EMAC_ZMII is not set |
| 1006 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | 1071 | # CONFIG_IBM_NEW_EMAC_RGMII is not set |
| 1007 | # CONFIG_IBM_NEW_EMAC_TAH is not set | 1072 | # CONFIG_IBM_NEW_EMAC_TAH is not set |
| 1008 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | 1073 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set |
| 1074 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
| 1075 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
| 1076 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
| 1009 | CONFIG_NET_PCI=y | 1077 | CONFIG_NET_PCI=y |
| 1010 | # CONFIG_PCNET32 is not set | 1078 | # CONFIG_PCNET32 is not set |
| 1011 | # CONFIG_AMD8111_ETH is not set | 1079 | # CONFIG_AMD8111_ETH is not set |
| 1012 | # CONFIG_ADAPTEC_STARFIRE is not set | 1080 | # CONFIG_ADAPTEC_STARFIRE is not set |
| 1081 | # CONFIG_KSZ884X_PCI is not set | ||
| 1013 | CONFIG_B44=y | 1082 | CONFIG_B44=y |
| 1014 | CONFIG_B44_PCI_AUTOSELECT=y | 1083 | CONFIG_B44_PCI_AUTOSELECT=y |
| 1015 | CONFIG_B44_PCICORE_AUTOSELECT=y | 1084 | CONFIG_B44_PCICORE_AUTOSELECT=y |
| 1016 | CONFIG_B44_PCI=y | 1085 | CONFIG_B44_PCI=y |
| 1017 | # CONFIG_FORCEDETH is not set | 1086 | # CONFIG_FORCEDETH is not set |
| 1018 | # CONFIG_TC35815 is not set | 1087 | # CONFIG_TC35815 is not set |
| 1019 | # CONFIG_EEPRO100 is not set | ||
| 1020 | # CONFIG_E100 is not set | 1088 | # CONFIG_E100 is not set |
| 1021 | # CONFIG_FEALNX is not set | 1089 | # CONFIG_FEALNX is not set |
| 1022 | # CONFIG_NATSEMI is not set | 1090 | # CONFIG_NATSEMI is not set |
| @@ -1026,41 +1094,67 @@ CONFIG_B44_PCI=y | |||
| 1026 | # CONFIG_R6040 is not set | 1094 | # CONFIG_R6040 is not set |
| 1027 | # CONFIG_SIS900 is not set | 1095 | # CONFIG_SIS900 is not set |
| 1028 | # CONFIG_EPIC100 is not set | 1096 | # CONFIG_EPIC100 is not set |
| 1097 | # CONFIG_SMSC9420 is not set | ||
| 1029 | # CONFIG_SUNDANCE is not set | 1098 | # CONFIG_SUNDANCE is not set |
| 1030 | # CONFIG_TLAN is not set | 1099 | # CONFIG_TLAN is not set |
| 1100 | # CONFIG_KS8842 is not set | ||
| 1101 | # CONFIG_KS8851_MLL is not set | ||
| 1031 | # CONFIG_VIA_RHINE is not set | 1102 | # CONFIG_VIA_RHINE is not set |
| 1032 | # CONFIG_SC92031 is not set | 1103 | # CONFIG_SC92031 is not set |
| 1104 | # CONFIG_ATL2 is not set | ||
| 1033 | # CONFIG_NETDEV_1000 is not set | 1105 | # CONFIG_NETDEV_1000 is not set |
| 1034 | # CONFIG_NETDEV_10000 is not set | 1106 | # CONFIG_NETDEV_10000 is not set |
| 1035 | # CONFIG_TR is not set | 1107 | # CONFIG_TR is not set |
| 1036 | 1108 | CONFIG_WLAN=y | |
| 1037 | # | 1109 | # CONFIG_LIBERTAS_THINFIRM is not set |
| 1038 | # Wireless LAN | ||
| 1039 | # | ||
| 1040 | # CONFIG_WLAN_PRE80211 is not set | ||
| 1041 | CONFIG_WLAN_80211=y | ||
| 1042 | # CONFIG_IPW2100 is not set | ||
| 1043 | # CONFIG_IPW2200 is not set | ||
| 1044 | # CONFIG_LIBERTAS is not set | ||
| 1045 | # CONFIG_HERMES is not set | ||
| 1046 | # CONFIG_ATMEL is not set | 1110 | # CONFIG_ATMEL is not set |
| 1111 | # CONFIG_AT76C50X_USB is not set | ||
| 1047 | # CONFIG_PRISM54 is not set | 1112 | # CONFIG_PRISM54 is not set |
| 1048 | # CONFIG_USB_ZD1201 is not set | 1113 | # CONFIG_USB_ZD1201 is not set |
| 1049 | # CONFIG_USB_NET_RNDIS_WLAN is not set | 1114 | # CONFIG_USB_NET_RNDIS_WLAN is not set |
| 1050 | # CONFIG_RTL8180 is not set | 1115 | # CONFIG_RTL8180 is not set |
| 1051 | # CONFIG_RTL8187 is not set | 1116 | # CONFIG_RTL8187 is not set |
| 1052 | # CONFIG_ADM8211 is not set | 1117 | # CONFIG_ADM8211 is not set |
| 1053 | # CONFIG_P54_COMMON is not set | 1118 | # CONFIG_MAC80211_HWSIM is not set |
| 1119 | # CONFIG_MWL8K is not set | ||
| 1120 | CONFIG_ATH_COMMON=m | ||
| 1121 | # CONFIG_ATH_DEBUG is not set | ||
| 1054 | CONFIG_ATH5K=m | 1122 | CONFIG_ATH5K=m |
| 1055 | # CONFIG_IWL4965 is not set | 1123 | # CONFIG_ATH5K_DEBUG is not set |
| 1056 | # CONFIG_IWL3945 is not set | 1124 | # CONFIG_ATH9K is not set |
| 1125 | # CONFIG_AR9170_USB is not set | ||
| 1126 | CONFIG_B43=m | ||
| 1127 | CONFIG_B43_PCI_AUTOSELECT=y | ||
| 1128 | CONFIG_B43_PCICORE_AUTOSELECT=y | ||
| 1129 | CONFIG_B43_PIO=y | ||
| 1130 | CONFIG_B43_PHY_LP=y | ||
| 1131 | CONFIG_B43_LEDS=y | ||
| 1132 | # CONFIG_B43_DEBUG is not set | ||
| 1133 | CONFIG_B43LEGACY=m | ||
| 1134 | CONFIG_B43LEGACY_PCI_AUTOSELECT=y | ||
| 1135 | CONFIG_B43LEGACY_PCICORE_AUTOSELECT=y | ||
| 1136 | CONFIG_B43LEGACY_LEDS=y | ||
| 1137 | CONFIG_B43LEGACY_DEBUG=y | ||
| 1138 | CONFIG_B43LEGACY_DMA=y | ||
| 1139 | CONFIG_B43LEGACY_PIO=y | ||
| 1140 | CONFIG_B43LEGACY_DMA_AND_PIO_MODE=y | ||
| 1141 | # CONFIG_B43LEGACY_DMA_MODE is not set | ||
| 1142 | # CONFIG_B43LEGACY_PIO_MODE is not set | ||
| 1057 | # CONFIG_HOSTAP is not set | 1143 | # CONFIG_HOSTAP is not set |
| 1058 | # CONFIG_BCM43XX is not set | 1144 | # CONFIG_IPW2100 is not set |
| 1059 | # CONFIG_B43 is not set | 1145 | # CONFIG_IPW2200 is not set |
| 1060 | # CONFIG_B43LEGACY is not set | 1146 | # CONFIG_IWLWIFI is not set |
| 1147 | # CONFIG_LIBERTAS is not set | ||
| 1148 | # CONFIG_HERMES is not set | ||
| 1149 | # CONFIG_P54_COMMON is not set | ||
| 1150 | # CONFIG_RT2X00 is not set | ||
| 1151 | # CONFIG_WL12XX is not set | ||
| 1061 | CONFIG_ZD1211RW=m | 1152 | CONFIG_ZD1211RW=m |
| 1062 | # CONFIG_ZD1211RW_DEBUG is not set | 1153 | # CONFIG_ZD1211RW_DEBUG is not set |
| 1063 | # CONFIG_RT2X00 is not set | 1154 | |
| 1155 | # | ||
| 1156 | # Enable WiMAX (Networking options) to see the WiMAX drivers | ||
| 1157 | # | ||
| 1064 | 1158 | ||
| 1065 | # | 1159 | # |
| 1066 | # USB Network Adapters | 1160 | # USB Network Adapters |
| @@ -1072,7 +1166,10 @@ CONFIG_USB_RTL8150=m | |||
| 1072 | CONFIG_USB_USBNET=m | 1166 | CONFIG_USB_USBNET=m |
| 1073 | CONFIG_USB_NET_AX8817X=m | 1167 | CONFIG_USB_NET_AX8817X=m |
| 1074 | CONFIG_USB_NET_CDCETHER=m | 1168 | CONFIG_USB_NET_CDCETHER=m |
| 1169 | # CONFIG_USB_NET_CDC_EEM is not set | ||
| 1075 | CONFIG_USB_NET_DM9601=m | 1170 | CONFIG_USB_NET_DM9601=m |
| 1171 | # CONFIG_USB_NET_SMSC75XX is not set | ||
| 1172 | # CONFIG_USB_NET_SMSC95XX is not set | ||
| 1076 | CONFIG_USB_NET_GL620A=m | 1173 | CONFIG_USB_NET_GL620A=m |
| 1077 | CONFIG_USB_NET_NET1080=m | 1174 | CONFIG_USB_NET_NET1080=m |
| 1078 | CONFIG_USB_NET_PLUSB=m | 1175 | CONFIG_USB_NET_PLUSB=m |
| @@ -1086,6 +1183,10 @@ CONFIG_USB_ARMLINUX=y | |||
| 1086 | CONFIG_USB_EPSON2888=y | 1183 | CONFIG_USB_EPSON2888=y |
| 1087 | CONFIG_USB_KC2190=y | 1184 | CONFIG_USB_KC2190=y |
| 1088 | CONFIG_USB_NET_ZAURUS=m | 1185 | CONFIG_USB_NET_ZAURUS=m |
| 1186 | # CONFIG_USB_HSO is not set | ||
| 1187 | # CONFIG_USB_NET_INT51X1 is not set | ||
| 1188 | # CONFIG_USB_IPHETH is not set | ||
| 1189 | CONFIG_USB_SIERRA_NET=m | ||
| 1089 | # CONFIG_WAN is not set | 1190 | # CONFIG_WAN is not set |
| 1090 | CONFIG_ATM_DRIVERS=y | 1191 | CONFIG_ATM_DRIVERS=y |
| 1091 | CONFIG_ATM_DUMMY=m | 1192 | CONFIG_ATM_DUMMY=m |
| @@ -1099,8 +1200,9 @@ CONFIG_ATM_TCP=m | |||
| 1099 | # CONFIG_ATM_AMBASSADOR is not set | 1200 | # CONFIG_ATM_AMBASSADOR is not set |
| 1100 | # CONFIG_ATM_HORIZON is not set | 1201 | # CONFIG_ATM_HORIZON is not set |
| 1101 | # CONFIG_ATM_IA is not set | 1202 | # CONFIG_ATM_IA is not set |
| 1102 | # CONFIG_ATM_FORE200E_MAYBE is not set | 1203 | # CONFIG_ATM_FORE200E is not set |
| 1103 | # CONFIG_ATM_HE is not set | 1204 | # CONFIG_ATM_HE is not set |
| 1205 | # CONFIG_ATM_SOLOS is not set | ||
| 1104 | # CONFIG_FDDI is not set | 1206 | # CONFIG_FDDI is not set |
| 1105 | # CONFIG_HIPPI is not set | 1207 | # CONFIG_HIPPI is not set |
| 1106 | CONFIG_PPP=m | 1208 | CONFIG_PPP=m |
| @@ -1120,11 +1222,10 @@ CONFIG_SLHC=m | |||
| 1120 | # CONFIG_SLIP_SMART is not set | 1222 | # CONFIG_SLIP_SMART is not set |
| 1121 | # CONFIG_SLIP_MODE_SLIP6 is not set | 1223 | # CONFIG_SLIP_MODE_SLIP6 is not set |
| 1122 | # CONFIG_NET_FC is not set | 1224 | # CONFIG_NET_FC is not set |
| 1123 | CONFIG_NETCONSOLE=y | 1225 | # CONFIG_NETCONSOLE is not set |
| 1124 | # CONFIG_NETCONSOLE_DYNAMIC is not set | 1226 | # CONFIG_NETPOLL is not set |
| 1125 | CONFIG_NETPOLL=y | 1227 | # CONFIG_NET_POLL_CONTROLLER is not set |
| 1126 | # CONFIG_NETPOLL_TRAP is not set | 1228 | # CONFIG_VMXNET3 is not set |
| 1127 | CONFIG_NET_POLL_CONTROLLER=y | ||
| 1128 | # CONFIG_ISDN is not set | 1229 | # CONFIG_ISDN is not set |
| 1129 | # CONFIG_PHONE is not set | 1230 | # CONFIG_PHONE is not set |
| 1130 | 1231 | ||
| @@ -1134,6 +1235,7 @@ CONFIG_NET_POLL_CONTROLLER=y | |||
| 1134 | CONFIG_INPUT=y | 1235 | CONFIG_INPUT=y |
| 1135 | # CONFIG_INPUT_FF_MEMLESS is not set | 1236 | # CONFIG_INPUT_FF_MEMLESS is not set |
| 1136 | # CONFIG_INPUT_POLLDEV is not set | 1237 | # CONFIG_INPUT_POLLDEV is not set |
| 1238 | # CONFIG_INPUT_SPARSEKMAP is not set | ||
| 1137 | 1239 | ||
| 1138 | # | 1240 | # |
| 1139 | # Userland interfaces | 1241 | # Userland interfaces |
| @@ -1166,6 +1268,7 @@ CONFIG_INPUT_EVDEV=m | |||
| 1166 | # Character devices | 1268 | # Character devices |
| 1167 | # | 1269 | # |
| 1168 | # CONFIG_VT is not set | 1270 | # CONFIG_VT is not set |
| 1271 | CONFIG_DEVKMEM=y | ||
| 1169 | # CONFIG_SERIAL_NONSTANDARD is not set | 1272 | # CONFIG_SERIAL_NONSTANDARD is not set |
| 1170 | # CONFIG_NOZOMI is not set | 1273 | # CONFIG_NOZOMI is not set |
| 1171 | 1274 | ||
| @@ -1185,23 +1288,24 @@ CONFIG_SERIAL_8250_RUNTIME_UARTS=2 | |||
| 1185 | CONFIG_SERIAL_CORE=y | 1288 | CONFIG_SERIAL_CORE=y |
| 1186 | CONFIG_SERIAL_CORE_CONSOLE=y | 1289 | CONFIG_SERIAL_CORE_CONSOLE=y |
| 1187 | # CONFIG_SERIAL_JSM is not set | 1290 | # CONFIG_SERIAL_JSM is not set |
| 1291 | # CONFIG_SERIAL_TIMBERDALE is not set | ||
| 1188 | CONFIG_UNIX98_PTYS=y | 1292 | CONFIG_UNIX98_PTYS=y |
| 1293 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
| 1189 | # CONFIG_LEGACY_PTYS is not set | 1294 | # CONFIG_LEGACY_PTYS is not set |
| 1190 | # CONFIG_IPMI_HANDLER is not set | 1295 | # CONFIG_IPMI_HANDLER is not set |
| 1191 | # CONFIG_HW_RANDOM is not set | 1296 | # CONFIG_HW_RANDOM is not set |
| 1192 | # CONFIG_RTC is not set | ||
| 1193 | # CONFIG_R3964 is not set | 1297 | # CONFIG_R3964 is not set |
| 1194 | # CONFIG_APPLICOM is not set | 1298 | # CONFIG_APPLICOM is not set |
| 1195 | # CONFIG_RAW_DRIVER is not set | 1299 | # CONFIG_RAW_DRIVER is not set |
| 1196 | # CONFIG_TCG_TPM is not set | 1300 | # CONFIG_TCG_TPM is not set |
| 1197 | CONFIG_DEVPORT=y | 1301 | CONFIG_DEVPORT=y |
| 1198 | # CONFIG_I2C is not set | 1302 | # CONFIG_I2C is not set |
| 1303 | # CONFIG_SPI is not set | ||
| 1199 | 1304 | ||
| 1200 | # | 1305 | # |
| 1201 | # SPI support | 1306 | # PPS support |
| 1202 | # | 1307 | # |
| 1203 | # CONFIG_SPI is not set | 1308 | # CONFIG_PPS is not set |
| 1204 | # CONFIG_SPI_MASTER is not set | ||
| 1205 | CONFIG_W1=m | 1309 | CONFIG_W1=m |
| 1206 | CONFIG_W1_CON=y | 1310 | CONFIG_W1_CON=y |
| 1207 | 1311 | ||
| @@ -1217,21 +1321,45 @@ CONFIG_W1_MASTER_DS2490=m | |||
| 1217 | # | 1321 | # |
| 1218 | CONFIG_W1_SLAVE_THERM=m | 1322 | CONFIG_W1_SLAVE_THERM=m |
| 1219 | CONFIG_W1_SLAVE_SMEM=m | 1323 | CONFIG_W1_SLAVE_SMEM=m |
| 1324 | # CONFIG_W1_SLAVE_DS2431 is not set | ||
| 1220 | CONFIG_W1_SLAVE_DS2433=m | 1325 | CONFIG_W1_SLAVE_DS2433=m |
| 1221 | # CONFIG_W1_SLAVE_DS2433_CRC is not set | 1326 | # CONFIG_W1_SLAVE_DS2433_CRC is not set |
| 1222 | CONFIG_W1_SLAVE_DS2760=m | 1327 | CONFIG_W1_SLAVE_DS2760=m |
| 1328 | # CONFIG_W1_SLAVE_BQ27000 is not set | ||
| 1223 | # CONFIG_POWER_SUPPLY is not set | 1329 | # CONFIG_POWER_SUPPLY is not set |
| 1224 | # CONFIG_HWMON is not set | 1330 | # CONFIG_HWMON is not set |
| 1225 | CONFIG_THERMAL=y | 1331 | CONFIG_THERMAL=y |
| 1226 | # CONFIG_WATCHDOG is not set | 1332 | CONFIG_WATCHDOG=y |
| 1333 | CONFIG_WATCHDOG_NOWAYOUT=y | ||
| 1227 | 1334 | ||
| 1228 | # | 1335 | # |
| 1229 | # Sonics Silicon Backplane | 1336 | # Watchdog Device Drivers |
| 1337 | # | ||
| 1338 | # CONFIG_SOFT_WATCHDOG is not set | ||
| 1339 | # CONFIG_ALIM7101_WDT is not set | ||
| 1340 | CONFIG_BCM47XX_WDT=y | ||
| 1341 | |||
| 1342 | # | ||
| 1343 | # PCI-based Watchdog Cards | ||
| 1344 | # | ||
| 1345 | # CONFIG_PCIPCWATCHDOG is not set | ||
| 1346 | # CONFIG_WDTPCI is not set | ||
| 1347 | |||
| 1230 | # | 1348 | # |
| 1349 | # USB-based Watchdog Cards | ||
| 1350 | # | ||
| 1351 | # CONFIG_USBPCWATCHDOG is not set | ||
| 1231 | CONFIG_SSB_POSSIBLE=y | 1352 | CONFIG_SSB_POSSIBLE=y |
| 1353 | |||
| 1354 | # | ||
| 1355 | # Sonics Silicon Backplane | ||
| 1356 | # | ||
| 1232 | CONFIG_SSB=y | 1357 | CONFIG_SSB=y |
| 1358 | CONFIG_SSB_SPROM=y | ||
| 1359 | CONFIG_SSB_BLOCKIO=y | ||
| 1233 | CONFIG_SSB_PCIHOST_POSSIBLE=y | 1360 | CONFIG_SSB_PCIHOST_POSSIBLE=y |
| 1234 | CONFIG_SSB_PCIHOST=y | 1361 | CONFIG_SSB_PCIHOST=y |
| 1362 | CONFIG_SSB_B43_PCI_BRIDGE=y | ||
| 1235 | # CONFIG_SSB_SILENT is not set | 1363 | # CONFIG_SSB_SILENT is not set |
| 1236 | # CONFIG_SSB_DEBUG is not set | 1364 | # CONFIG_SSB_DEBUG is not set |
| 1237 | CONFIG_SSB_SERIAL=y | 1365 | CONFIG_SSB_SERIAL=y |
| @@ -1239,24 +1367,26 @@ CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y | |||
| 1239 | CONFIG_SSB_DRIVER_PCICORE=y | 1367 | CONFIG_SSB_DRIVER_PCICORE=y |
| 1240 | CONFIG_SSB_PCICORE_HOSTMODE=y | 1368 | CONFIG_SSB_PCICORE_HOSTMODE=y |
| 1241 | CONFIG_SSB_DRIVER_MIPS=y | 1369 | CONFIG_SSB_DRIVER_MIPS=y |
| 1370 | CONFIG_SSB_EMBEDDED=y | ||
| 1242 | CONFIG_SSB_DRIVER_EXTIF=y | 1371 | CONFIG_SSB_DRIVER_EXTIF=y |
| 1372 | CONFIG_SSB_DRIVER_GIGE=y | ||
| 1243 | 1373 | ||
| 1244 | # | 1374 | # |
| 1245 | # Multifunction device drivers | 1375 | # Multifunction device drivers |
| 1246 | # | 1376 | # |
| 1377 | # CONFIG_MFD_CORE is not set | ||
| 1247 | # CONFIG_MFD_SM501 is not set | 1378 | # CONFIG_MFD_SM501 is not set |
| 1248 | 1379 | # CONFIG_HTC_PASIC3 is not set | |
| 1249 | # | 1380 | # CONFIG_MFD_TMIO is not set |
| 1250 | # Multimedia devices | 1381 | # CONFIG_LPC_SCH is not set |
| 1251 | # | 1382 | # CONFIG_REGULATOR is not set |
| 1252 | # CONFIG_VIDEO_DEV is not set | 1383 | # CONFIG_MEDIA_SUPPORT is not set |
| 1253 | # CONFIG_DVB_CORE is not set | ||
| 1254 | CONFIG_DAB=y | ||
| 1255 | CONFIG_USB_DABUSB=m | ||
| 1256 | 1384 | ||
| 1257 | # | 1385 | # |
| 1258 | # Graphics support | 1386 | # Graphics support |
| 1259 | # | 1387 | # |
| 1388 | CONFIG_VGA_ARB=y | ||
| 1389 | CONFIG_VGA_ARB_MAX_GPUS=16 | ||
| 1260 | # CONFIG_DRM is not set | 1390 | # CONFIG_DRM is not set |
| 1261 | # CONFIG_VGASTATE is not set | 1391 | # CONFIG_VGASTATE is not set |
| 1262 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | 1392 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set |
| @@ -1271,15 +1401,9 @@ CONFIG_DISPLAY_SUPPORT=m | |||
| 1271 | # | 1401 | # |
| 1272 | # Display hardware drivers | 1402 | # Display hardware drivers |
| 1273 | # | 1403 | # |
| 1274 | |||
| 1275 | # | ||
| 1276 | # Sound | ||
| 1277 | # | ||
| 1278 | CONFIG_SOUND=m | 1404 | CONFIG_SOUND=m |
| 1279 | 1405 | CONFIG_SOUND_OSS_CORE=y | |
| 1280 | # | 1406 | CONFIG_SOUND_OSS_CORE_PRECLAIM=y |
| 1281 | # Advanced Linux Sound Architecture | ||
| 1282 | # | ||
| 1283 | CONFIG_SND=m | 1407 | CONFIG_SND=m |
| 1284 | CONFIG_SND_TIMER=m | 1408 | CONFIG_SND_TIMER=m |
| 1285 | CONFIG_SND_PCM=m | 1409 | CONFIG_SND_PCM=m |
| @@ -1292,24 +1416,24 @@ CONFIG_SND_MIXER_OSS=m | |||
| 1292 | CONFIG_SND_PCM_OSS=m | 1416 | CONFIG_SND_PCM_OSS=m |
| 1293 | CONFIG_SND_PCM_OSS_PLUGINS=y | 1417 | CONFIG_SND_PCM_OSS_PLUGINS=y |
| 1294 | CONFIG_SND_SEQUENCER_OSS=y | 1418 | CONFIG_SND_SEQUENCER_OSS=y |
| 1419 | # CONFIG_SND_HRTIMER is not set | ||
| 1295 | # CONFIG_SND_DYNAMIC_MINORS is not set | 1420 | # CONFIG_SND_DYNAMIC_MINORS is not set |
| 1296 | CONFIG_SND_SUPPORT_OLD_API=y | 1421 | CONFIG_SND_SUPPORT_OLD_API=y |
| 1297 | CONFIG_SND_VERBOSE_PROCFS=y | 1422 | CONFIG_SND_VERBOSE_PROCFS=y |
| 1298 | # CONFIG_SND_VERBOSE_PRINTK is not set | 1423 | # CONFIG_SND_VERBOSE_PRINTK is not set |
| 1299 | # CONFIG_SND_DEBUG is not set | 1424 | # CONFIG_SND_DEBUG is not set |
| 1300 | 1425 | CONFIG_SND_RAWMIDI_SEQ=m | |
| 1301 | # | 1426 | # CONFIG_SND_OPL3_LIB_SEQ is not set |
| 1302 | # Generic devices | 1427 | # CONFIG_SND_OPL4_LIB_SEQ is not set |
| 1303 | # | 1428 | # CONFIG_SND_SBAWE_SEQ is not set |
| 1429 | # CONFIG_SND_EMU10K1_SEQ is not set | ||
| 1430 | CONFIG_SND_DRIVERS=y | ||
| 1304 | CONFIG_SND_DUMMY=m | 1431 | CONFIG_SND_DUMMY=m |
| 1305 | CONFIG_SND_VIRMIDI=m | 1432 | CONFIG_SND_VIRMIDI=m |
| 1306 | # CONFIG_SND_MTPAV is not set | 1433 | # CONFIG_SND_MTPAV is not set |
| 1307 | # CONFIG_SND_SERIAL_U16550 is not set | 1434 | # CONFIG_SND_SERIAL_U16550 is not set |
| 1308 | # CONFIG_SND_MPU401 is not set | 1435 | # CONFIG_SND_MPU401 is not set |
| 1309 | 1436 | CONFIG_SND_PCI=y | |
| 1310 | # | ||
| 1311 | # PCI devices | ||
| 1312 | # | ||
| 1313 | # CONFIG_SND_AD1889 is not set | 1437 | # CONFIG_SND_AD1889 is not set |
| 1314 | # CONFIG_SND_ALS300 is not set | 1438 | # CONFIG_SND_ALS300 is not set |
| 1315 | # CONFIG_SND_ALI5451 is not set | 1439 | # CONFIG_SND_ALI5451 is not set |
| @@ -1318,6 +1442,7 @@ CONFIG_SND_VIRMIDI=m | |||
| 1318 | # CONFIG_SND_AU8810 is not set | 1442 | # CONFIG_SND_AU8810 is not set |
| 1319 | # CONFIG_SND_AU8820 is not set | 1443 | # CONFIG_SND_AU8820 is not set |
| 1320 | # CONFIG_SND_AU8830 is not set | 1444 | # CONFIG_SND_AU8830 is not set |
| 1445 | # CONFIG_SND_AW2 is not set | ||
| 1321 | # CONFIG_SND_AZT3328 is not set | 1446 | # CONFIG_SND_AZT3328 is not set |
| 1322 | # CONFIG_SND_BT87X is not set | 1447 | # CONFIG_SND_BT87X is not set |
| 1323 | # CONFIG_SND_CA0106 is not set | 1448 | # CONFIG_SND_CA0106 is not set |
| @@ -1325,6 +1450,8 @@ CONFIG_SND_VIRMIDI=m | |||
| 1325 | # CONFIG_SND_OXYGEN is not set | 1450 | # CONFIG_SND_OXYGEN is not set |
| 1326 | # CONFIG_SND_CS4281 is not set | 1451 | # CONFIG_SND_CS4281 is not set |
| 1327 | # CONFIG_SND_CS46XX is not set | 1452 | # CONFIG_SND_CS46XX is not set |
| 1453 | # CONFIG_SND_CS5535AUDIO is not set | ||
| 1454 | # CONFIG_SND_CTXFI is not set | ||
| 1328 | # CONFIG_SND_DARLA20 is not set | 1455 | # CONFIG_SND_DARLA20 is not set |
| 1329 | # CONFIG_SND_GINA20 is not set | 1456 | # CONFIG_SND_GINA20 is not set |
| 1330 | # CONFIG_SND_LAYLA20 is not set | 1457 | # CONFIG_SND_LAYLA20 is not set |
| @@ -1337,6 +1464,8 @@ CONFIG_SND_VIRMIDI=m | |||
| 1337 | # CONFIG_SND_INDIGO is not set | 1464 | # CONFIG_SND_INDIGO is not set |
| 1338 | # CONFIG_SND_INDIGOIO is not set | 1465 | # CONFIG_SND_INDIGOIO is not set |
| 1339 | # CONFIG_SND_INDIGODJ is not set | 1466 | # CONFIG_SND_INDIGODJ is not set |
| 1467 | # CONFIG_SND_INDIGOIOX is not set | ||
| 1468 | # CONFIG_SND_INDIGODJX is not set | ||
| 1340 | # CONFIG_SND_EMU10K1 is not set | 1469 | # CONFIG_SND_EMU10K1 is not set |
| 1341 | # CONFIG_SND_EMU10K1X is not set | 1470 | # CONFIG_SND_EMU10K1X is not set |
| 1342 | # CONFIG_SND_ENS1370 is not set | 1471 | # CONFIG_SND_ENS1370 is not set |
| @@ -1353,6 +1482,7 @@ CONFIG_SND_VIRMIDI=m | |||
| 1353 | # CONFIG_SND_INTEL8X0 is not set | 1482 | # CONFIG_SND_INTEL8X0 is not set |
| 1354 | # CONFIG_SND_INTEL8X0M is not set | 1483 | # CONFIG_SND_INTEL8X0M is not set |
| 1355 | # CONFIG_SND_KORG1212 is not set | 1484 | # CONFIG_SND_KORG1212 is not set |
| 1485 | # CONFIG_SND_LX6464ES is not set | ||
| 1356 | # CONFIG_SND_MAESTRO3 is not set | 1486 | # CONFIG_SND_MAESTRO3 is not set |
| 1357 | # CONFIG_SND_MIXART is not set | 1487 | # CONFIG_SND_MIXART is not set |
| 1358 | # CONFIG_SND_NM256 is not set | 1488 | # CONFIG_SND_NM256 is not set |
| @@ -1368,45 +1498,22 @@ CONFIG_SND_VIRMIDI=m | |||
| 1368 | # CONFIG_SND_VIRTUOSO is not set | 1498 | # CONFIG_SND_VIRTUOSO is not set |
| 1369 | # CONFIG_SND_VX222 is not set | 1499 | # CONFIG_SND_VX222 is not set |
| 1370 | # CONFIG_SND_YMFPCI is not set | 1500 | # CONFIG_SND_YMFPCI is not set |
| 1371 | 1501 | CONFIG_SND_MIPS=y | |
| 1372 | # | 1502 | CONFIG_SND_USB=y |
| 1373 | # ALSA MIPS devices | ||
| 1374 | # | ||
| 1375 | |||
| 1376 | # | ||
| 1377 | # USB devices | ||
| 1378 | # | ||
| 1379 | CONFIG_SND_USB_AUDIO=m | 1503 | CONFIG_SND_USB_AUDIO=m |
| 1504 | # CONFIG_SND_USB_UA101 is not set | ||
| 1380 | # CONFIG_SND_USB_CAIAQ is not set | 1505 | # CONFIG_SND_USB_CAIAQ is not set |
| 1381 | |||
| 1382 | # | ||
| 1383 | # System on Chip audio support | ||
| 1384 | # | ||
| 1385 | # CONFIG_SND_SOC is not set | 1506 | # CONFIG_SND_SOC is not set |
| 1386 | |||
| 1387 | # | ||
| 1388 | # SoC Audio support for SuperH | ||
| 1389 | # | ||
| 1390 | |||
| 1391 | # | ||
| 1392 | # ALSA SoC audio for Freescale SOCs | ||
| 1393 | # | ||
| 1394 | |||
| 1395 | # | ||
| 1396 | # Open Sound System | ||
| 1397 | # | ||
| 1398 | # CONFIG_SOUND_PRIME is not set | 1507 | # CONFIG_SOUND_PRIME is not set |
| 1399 | CONFIG_HID_SUPPORT=y | 1508 | CONFIG_HID_SUPPORT=y |
| 1400 | CONFIG_HID=m | 1509 | CONFIG_HID=m |
| 1401 | # CONFIG_HID_DEBUG is not set | ||
| 1402 | # CONFIG_HIDRAW is not set | 1510 | # CONFIG_HIDRAW is not set |
| 1403 | 1511 | ||
| 1404 | # | 1512 | # |
| 1405 | # USB Input Devices | 1513 | # USB Input Devices |
| 1406 | # | 1514 | # |
| 1407 | CONFIG_USB_HID=m | 1515 | CONFIG_USB_HID=m |
| 1408 | # CONFIG_USB_HIDINPUT_POWERBOOK is not set | 1516 | # CONFIG_HID_PID is not set |
| 1409 | # CONFIG_HID_FF is not set | ||
| 1410 | CONFIG_USB_HIDDEV=y | 1517 | CONFIG_USB_HIDDEV=y |
| 1411 | 1518 | ||
| 1412 | # | 1519 | # |
| @@ -1414,6 +1521,41 @@ CONFIG_USB_HIDDEV=y | |||
| 1414 | # | 1521 | # |
| 1415 | # CONFIG_USB_KBD is not set | 1522 | # CONFIG_USB_KBD is not set |
| 1416 | # CONFIG_USB_MOUSE is not set | 1523 | # CONFIG_USB_MOUSE is not set |
| 1524 | |||
| 1525 | # | ||
| 1526 | # Special HID drivers | ||
| 1527 | # | ||
| 1528 | # CONFIG_HID_3M_PCT is not set | ||
| 1529 | # CONFIG_HID_A4TECH is not set | ||
| 1530 | # CONFIG_HID_APPLE is not set | ||
| 1531 | # CONFIG_HID_BELKIN is not set | ||
| 1532 | # CONFIG_HID_CHERRY is not set | ||
| 1533 | # CONFIG_HID_CHICONY is not set | ||
| 1534 | # CONFIG_HID_CYPRESS is not set | ||
| 1535 | # CONFIG_HID_DRAGONRISE is not set | ||
| 1536 | # CONFIG_HID_EZKEY is not set | ||
| 1537 | # CONFIG_HID_KYE is not set | ||
| 1538 | # CONFIG_HID_GYRATION is not set | ||
| 1539 | # CONFIG_HID_TWINHAN is not set | ||
| 1540 | # CONFIG_HID_KENSINGTON is not set | ||
| 1541 | # CONFIG_HID_LOGITECH is not set | ||
| 1542 | # CONFIG_HID_MICROSOFT is not set | ||
| 1543 | # CONFIG_HID_MOSART is not set | ||
| 1544 | # CONFIG_HID_MONTEREY is not set | ||
| 1545 | # CONFIG_HID_NTRIG is not set | ||
| 1546 | # CONFIG_HID_ORTEK is not set | ||
| 1547 | # CONFIG_HID_PANTHERLORD is not set | ||
| 1548 | # CONFIG_HID_PETALYNX is not set | ||
| 1549 | # CONFIG_HID_QUANTA is not set | ||
| 1550 | # CONFIG_HID_SAMSUNG is not set | ||
| 1551 | # CONFIG_HID_SONY is not set | ||
| 1552 | # CONFIG_HID_STANTUM is not set | ||
| 1553 | # CONFIG_HID_SUNPLUS is not set | ||
| 1554 | # CONFIG_HID_GREENASIA is not set | ||
| 1555 | # CONFIG_HID_SMARTJOYPLUS is not set | ||
| 1556 | # CONFIG_HID_TOPSEED is not set | ||
| 1557 | # CONFIG_HID_THRUSTMASTER is not set | ||
| 1558 | # CONFIG_HID_ZEROPLUS is not set | ||
| 1417 | CONFIG_USB_SUPPORT=y | 1559 | CONFIG_USB_SUPPORT=y |
| 1418 | CONFIG_USB_ARCH_HAS_HCD=y | 1560 | CONFIG_USB_ARCH_HAS_HCD=y |
| 1419 | CONFIG_USB_ARCH_HAS_OHCI=y | 1561 | CONFIG_USB_ARCH_HAS_OHCI=y |
| @@ -1429,14 +1571,24 @@ CONFIG_USB_DEVICEFS=y | |||
| 1429 | # CONFIG_USB_DEVICE_CLASS is not set | 1571 | # CONFIG_USB_DEVICE_CLASS is not set |
| 1430 | # CONFIG_USB_DYNAMIC_MINORS is not set | 1572 | # CONFIG_USB_DYNAMIC_MINORS is not set |
| 1431 | # CONFIG_USB_OTG is not set | 1573 | # CONFIG_USB_OTG is not set |
| 1574 | # CONFIG_USB_OTG_WHITELIST is not set | ||
| 1575 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set | ||
| 1576 | # CONFIG_USB_MON is not set | ||
| 1577 | # CONFIG_USB_WUSB is not set | ||
| 1578 | # CONFIG_USB_WUSB_CBAF is not set | ||
| 1432 | 1579 | ||
| 1433 | # | 1580 | # |
| 1434 | # USB Host Controller Drivers | 1581 | # USB Host Controller Drivers |
| 1435 | # | 1582 | # |
| 1583 | # CONFIG_USB_C67X00_HCD is not set | ||
| 1584 | # CONFIG_USB_XHCI_HCD is not set | ||
| 1436 | CONFIG_USB_EHCI_HCD=y | 1585 | CONFIG_USB_EHCI_HCD=y |
| 1437 | CONFIG_USB_EHCI_ROOT_HUB_TT=y | 1586 | CONFIG_USB_EHCI_ROOT_HUB_TT=y |
| 1438 | CONFIG_USB_EHCI_TT_NEWSCHED=y | 1587 | CONFIG_USB_EHCI_TT_NEWSCHED=y |
| 1588 | # CONFIG_USB_OXU210HP_HCD is not set | ||
| 1439 | # CONFIG_USB_ISP116X_HCD is not set | 1589 | # CONFIG_USB_ISP116X_HCD is not set |
| 1590 | # CONFIG_USB_ISP1760_HCD is not set | ||
| 1591 | # CONFIG_USB_ISP1362_HCD is not set | ||
| 1440 | CONFIG_USB_OHCI_HCD=y | 1592 | CONFIG_USB_OHCI_HCD=y |
| 1441 | # CONFIG_USB_OHCI_HCD_SSB is not set | 1593 | # CONFIG_USB_OHCI_HCD_SSB is not set |
| 1442 | # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set | 1594 | # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set |
| @@ -1446,26 +1598,30 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y | |||
| 1446 | CONFIG_USB_U132_HCD=m | 1598 | CONFIG_USB_U132_HCD=m |
| 1447 | # CONFIG_USB_SL811_HCD is not set | 1599 | # CONFIG_USB_SL811_HCD is not set |
| 1448 | CONFIG_USB_R8A66597_HCD=m | 1600 | CONFIG_USB_R8A66597_HCD=m |
| 1601 | # CONFIG_USB_WHCI_HCD is not set | ||
| 1602 | # CONFIG_USB_HWA_HCD is not set | ||
| 1603 | # CONFIG_USB_GADGET_MUSB_HDRC is not set | ||
| 1449 | 1604 | ||
| 1450 | # | 1605 | # |
| 1451 | # USB Device Class drivers | 1606 | # USB Device Class drivers |
| 1452 | # | 1607 | # |
| 1453 | CONFIG_USB_ACM=m | 1608 | CONFIG_USB_ACM=m |
| 1454 | CONFIG_USB_PRINTER=m | 1609 | CONFIG_USB_PRINTER=m |
| 1610 | # CONFIG_USB_WDM is not set | ||
| 1611 | # CONFIG_USB_TMC is not set | ||
| 1455 | 1612 | ||
| 1456 | # | 1613 | # |
| 1457 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | 1614 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may |
| 1458 | # | 1615 | # |
| 1459 | 1616 | ||
| 1460 | # | 1617 | # |
| 1461 | # may also be needed; see USB_STORAGE Help for more information | 1618 | # also be needed; see USB_STORAGE Help for more info |
| 1462 | # | 1619 | # |
| 1463 | CONFIG_USB_STORAGE=y | 1620 | CONFIG_USB_STORAGE=y |
| 1464 | # CONFIG_USB_STORAGE_DEBUG is not set | 1621 | # CONFIG_USB_STORAGE_DEBUG is not set |
| 1465 | CONFIG_USB_STORAGE_DATAFAB=y | 1622 | CONFIG_USB_STORAGE_DATAFAB=y |
| 1466 | CONFIG_USB_STORAGE_FREECOM=y | 1623 | CONFIG_USB_STORAGE_FREECOM=y |
| 1467 | # CONFIG_USB_STORAGE_ISD200 is not set | 1624 | # CONFIG_USB_STORAGE_ISD200 is not set |
| 1468 | CONFIG_USB_STORAGE_DPCM=y | ||
| 1469 | CONFIG_USB_STORAGE_USBAT=y | 1625 | CONFIG_USB_STORAGE_USBAT=y |
| 1470 | CONFIG_USB_STORAGE_SDDR09=y | 1626 | CONFIG_USB_STORAGE_SDDR09=y |
| 1471 | CONFIG_USB_STORAGE_SDDR55=y | 1627 | CONFIG_USB_STORAGE_SDDR55=y |
| @@ -1473,6 +1629,7 @@ CONFIG_USB_STORAGE_JUMPSHOT=y | |||
| 1473 | CONFIG_USB_STORAGE_ALAUDA=y | 1629 | CONFIG_USB_STORAGE_ALAUDA=y |
| 1474 | CONFIG_USB_STORAGE_ONETOUCH=y | 1630 | CONFIG_USB_STORAGE_ONETOUCH=y |
| 1475 | CONFIG_USB_STORAGE_KARMA=y | 1631 | CONFIG_USB_STORAGE_KARMA=y |
| 1632 | # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set | ||
| 1476 | # CONFIG_USB_LIBUSUAL is not set | 1633 | # CONFIG_USB_LIBUSUAL is not set |
| 1477 | 1634 | ||
| 1478 | # | 1635 | # |
| @@ -1480,7 +1637,6 @@ CONFIG_USB_STORAGE_KARMA=y | |||
| 1480 | # | 1637 | # |
| 1481 | CONFIG_USB_MDC800=m | 1638 | CONFIG_USB_MDC800=m |
| 1482 | CONFIG_USB_MICROTEK=m | 1639 | CONFIG_USB_MICROTEK=m |
| 1483 | # CONFIG_USB_MON is not set | ||
| 1484 | 1640 | ||
| 1485 | # | 1641 | # |
| 1486 | # USB port drivers | 1642 | # USB port drivers |
| @@ -1489,13 +1645,12 @@ CONFIG_USB_SERIAL=m | |||
| 1489 | CONFIG_USB_EZUSB=y | 1645 | CONFIG_USB_EZUSB=y |
| 1490 | CONFIG_USB_SERIAL_GENERIC=y | 1646 | CONFIG_USB_SERIAL_GENERIC=y |
| 1491 | CONFIG_USB_SERIAL_AIRCABLE=m | 1647 | CONFIG_USB_SERIAL_AIRCABLE=m |
| 1492 | CONFIG_USB_SERIAL_AIRPRIME=m | ||
| 1493 | CONFIG_USB_SERIAL_ARK3116=m | 1648 | CONFIG_USB_SERIAL_ARK3116=m |
| 1494 | CONFIG_USB_SERIAL_BELKIN=m | 1649 | CONFIG_USB_SERIAL_BELKIN=m |
| 1495 | CONFIG_USB_SERIAL_CH341=m | 1650 | CONFIG_USB_SERIAL_CH341=m |
| 1496 | # CONFIG_USB_SERIAL_WHITEHEAT is not set | 1651 | # CONFIG_USB_SERIAL_WHITEHEAT is not set |
| 1497 | CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m | 1652 | CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m |
| 1498 | CONFIG_USB_SERIAL_CP2101=m | 1653 | # CONFIG_USB_SERIAL_CP210X is not set |
| 1499 | CONFIG_USB_SERIAL_CYPRESS_M8=m | 1654 | CONFIG_USB_SERIAL_CYPRESS_M8=m |
| 1500 | CONFIG_USB_SERIAL_EMPEG=m | 1655 | CONFIG_USB_SERIAL_EMPEG=m |
| 1501 | CONFIG_USB_SERIAL_FTDI_SIO=m | 1656 | CONFIG_USB_SERIAL_FTDI_SIO=m |
| @@ -1515,18 +1670,26 @@ CONFIG_USB_SERIAL_KOBIL_SCT=m | |||
| 1515 | CONFIG_USB_SERIAL_MCT_U232=m | 1670 | CONFIG_USB_SERIAL_MCT_U232=m |
| 1516 | CONFIG_USB_SERIAL_MOS7720=m | 1671 | CONFIG_USB_SERIAL_MOS7720=m |
| 1517 | CONFIG_USB_SERIAL_MOS7840=m | 1672 | CONFIG_USB_SERIAL_MOS7840=m |
| 1673 | # CONFIG_USB_SERIAL_MOTOROLA is not set | ||
| 1518 | CONFIG_USB_SERIAL_NAVMAN=m | 1674 | CONFIG_USB_SERIAL_NAVMAN=m |
| 1519 | CONFIG_USB_SERIAL_PL2303=m | 1675 | CONFIG_USB_SERIAL_PL2303=m |
| 1520 | CONFIG_USB_SERIAL_OTI6858=m | 1676 | CONFIG_USB_SERIAL_OTI6858=m |
| 1677 | # CONFIG_USB_SERIAL_QCAUX is not set | ||
| 1678 | # CONFIG_USB_SERIAL_QUALCOMM is not set | ||
| 1679 | # CONFIG_USB_SERIAL_SPCP8X5 is not set | ||
| 1521 | CONFIG_USB_SERIAL_HP4X=m | 1680 | CONFIG_USB_SERIAL_HP4X=m |
| 1522 | CONFIG_USB_SERIAL_SAFE=m | 1681 | CONFIG_USB_SERIAL_SAFE=m |
| 1523 | # CONFIG_USB_SERIAL_SAFE_PADDED is not set | 1682 | # CONFIG_USB_SERIAL_SAFE_PADDED is not set |
| 1683 | # CONFIG_USB_SERIAL_SIEMENS_MPI is not set | ||
| 1524 | CONFIG_USB_SERIAL_SIERRAWIRELESS=m | 1684 | CONFIG_USB_SERIAL_SIERRAWIRELESS=m |
| 1685 | # CONFIG_USB_SERIAL_SYMBOL is not set | ||
| 1525 | # CONFIG_USB_SERIAL_TI is not set | 1686 | # CONFIG_USB_SERIAL_TI is not set |
| 1526 | CONFIG_USB_SERIAL_CYBERJACK=m | 1687 | CONFIG_USB_SERIAL_CYBERJACK=m |
| 1527 | CONFIG_USB_SERIAL_XIRCOM=m | 1688 | CONFIG_USB_SERIAL_XIRCOM=m |
| 1528 | CONFIG_USB_SERIAL_OPTION=m | 1689 | CONFIG_USB_SERIAL_OPTION=m |
| 1529 | CONFIG_USB_SERIAL_OMNINET=m | 1690 | CONFIG_USB_SERIAL_OMNINET=m |
| 1691 | # CONFIG_USB_SERIAL_OPTICON is not set | ||
| 1692 | # CONFIG_USB_SERIAL_VIVOPAY_SERIAL is not set | ||
| 1530 | CONFIG_USB_SERIAL_DEBUG=m | 1693 | CONFIG_USB_SERIAL_DEBUG=m |
| 1531 | 1694 | ||
| 1532 | # | 1695 | # |
| @@ -1535,18 +1698,13 @@ CONFIG_USB_SERIAL_DEBUG=m | |||
| 1535 | # CONFIG_USB_EMI62 is not set | 1698 | # CONFIG_USB_EMI62 is not set |
| 1536 | # CONFIG_USB_EMI26 is not set | 1699 | # CONFIG_USB_EMI26 is not set |
| 1537 | CONFIG_USB_ADUTUX=m | 1700 | CONFIG_USB_ADUTUX=m |
| 1538 | CONFIG_USB_AUERSWALD=m | 1701 | # CONFIG_USB_SEVSEG is not set |
| 1539 | CONFIG_USB_RIO500=m | 1702 | CONFIG_USB_RIO500=m |
| 1540 | CONFIG_USB_LEGOTOWER=m | 1703 | CONFIG_USB_LEGOTOWER=m |
| 1541 | CONFIG_USB_LCD=m | 1704 | CONFIG_USB_LCD=m |
| 1542 | CONFIG_USB_BERRY_CHARGE=m | ||
| 1543 | CONFIG_USB_LED=m | 1705 | CONFIG_USB_LED=m |
| 1544 | CONFIG_USB_CYPRESS_CY7C63=m | 1706 | CONFIG_USB_CYPRESS_CY7C63=m |
| 1545 | CONFIG_USB_CYTHERM=m | 1707 | CONFIG_USB_CYTHERM=m |
| 1546 | CONFIG_USB_PHIDGET=m | ||
| 1547 | CONFIG_USB_PHIDGETKIT=m | ||
| 1548 | CONFIG_USB_PHIDGETMOTORCONTROL=m | ||
| 1549 | CONFIG_USB_PHIDGETSERVO=m | ||
| 1550 | CONFIG_USB_IDMOUSE=m | 1708 | CONFIG_USB_IDMOUSE=m |
| 1551 | CONFIG_USB_FTDI_ELAN=m | 1709 | CONFIG_USB_FTDI_ELAN=m |
| 1552 | # CONFIG_USB_APPLEDISPLAY is not set | 1710 | # CONFIG_USB_APPLEDISPLAY is not set |
| @@ -1555,6 +1713,7 @@ CONFIG_USB_LD=m | |||
| 1555 | CONFIG_USB_TRANCEVIBRATOR=m | 1713 | CONFIG_USB_TRANCEVIBRATOR=m |
| 1556 | CONFIG_USB_IOWARRIOR=m | 1714 | CONFIG_USB_IOWARRIOR=m |
| 1557 | CONFIG_USB_TEST=m | 1715 | CONFIG_USB_TEST=m |
| 1716 | # CONFIG_USB_ISIGHTFW is not set | ||
| 1558 | CONFIG_USB_ATM=m | 1717 | CONFIG_USB_ATM=m |
| 1559 | CONFIG_USB_SPEEDTOUCH=m | 1718 | CONFIG_USB_SPEEDTOUCH=m |
| 1560 | CONFIG_USB_CXACRU=m | 1719 | CONFIG_USB_CXACRU=m |
| @@ -1563,30 +1722,51 @@ CONFIG_USB_XUSBATM=m | |||
| 1563 | CONFIG_USB_GADGET=m | 1722 | CONFIG_USB_GADGET=m |
| 1564 | # CONFIG_USB_GADGET_DEBUG_FILES is not set | 1723 | # CONFIG_USB_GADGET_DEBUG_FILES is not set |
| 1565 | # CONFIG_USB_GADGET_DEBUG_FS is not set | 1724 | # CONFIG_USB_GADGET_DEBUG_FS is not set |
| 1725 | CONFIG_USB_GADGET_VBUS_DRAW=2 | ||
| 1566 | CONFIG_USB_GADGET_SELECTED=y | 1726 | CONFIG_USB_GADGET_SELECTED=y |
| 1567 | # CONFIG_USB_GADGET_AMD5536UDC is not set | 1727 | # CONFIG_USB_GADGET_AT91 is not set |
| 1568 | # CONFIG_USB_GADGET_ATMEL_USBA is not set | 1728 | # CONFIG_USB_GADGET_ATMEL_USBA is not set |
| 1569 | # CONFIG_USB_GADGET_FSL_USB2 is not set | 1729 | # CONFIG_USB_GADGET_FSL_USB2 is not set |
| 1570 | CONFIG_USB_GADGET_NET2280=y | ||
| 1571 | CONFIG_USB_NET2280=m | ||
| 1572 | # CONFIG_USB_GADGET_PXA2XX is not set | ||
| 1573 | # CONFIG_USB_GADGET_M66592 is not set | ||
| 1574 | # CONFIG_USB_GADGET_GOKU is not set | ||
| 1575 | # CONFIG_USB_GADGET_LH7A40X is not set | 1730 | # CONFIG_USB_GADGET_LH7A40X is not set |
| 1576 | # CONFIG_USB_GADGET_OMAP is not set | 1731 | # CONFIG_USB_GADGET_OMAP is not set |
| 1732 | # CONFIG_USB_GADGET_PXA25X is not set | ||
| 1733 | # CONFIG_USB_GADGET_R8A66597 is not set | ||
| 1734 | # CONFIG_USB_GADGET_PXA27X is not set | ||
| 1735 | # CONFIG_USB_GADGET_S3C_HSOTG is not set | ||
| 1736 | # CONFIG_USB_GADGET_IMX is not set | ||
| 1577 | # CONFIG_USB_GADGET_S3C2410 is not set | 1737 | # CONFIG_USB_GADGET_S3C2410 is not set |
| 1578 | # CONFIG_USB_GADGET_AT91 is not set | 1738 | # CONFIG_USB_GADGET_M66592 is not set |
| 1739 | # CONFIG_USB_GADGET_AMD5536UDC is not set | ||
| 1740 | # CONFIG_USB_GADGET_FSL_QE is not set | ||
| 1741 | # CONFIG_USB_GADGET_CI13XXX is not set | ||
| 1742 | CONFIG_USB_GADGET_NET2280=y | ||
| 1743 | CONFIG_USB_NET2280=m | ||
| 1744 | # CONFIG_USB_GADGET_GOKU is not set | ||
| 1745 | # CONFIG_USB_GADGET_LANGWELL is not set | ||
| 1579 | # CONFIG_USB_GADGET_DUMMY_HCD is not set | 1746 | # CONFIG_USB_GADGET_DUMMY_HCD is not set |
| 1580 | CONFIG_USB_GADGET_DUALSPEED=y | 1747 | CONFIG_USB_GADGET_DUALSPEED=y |
| 1581 | CONFIG_USB_ZERO=m | 1748 | CONFIG_USB_ZERO=m |
| 1749 | # CONFIG_USB_AUDIO is not set | ||
| 1582 | CONFIG_USB_ETH=m | 1750 | CONFIG_USB_ETH=m |
| 1583 | CONFIG_USB_ETH_RNDIS=y | 1751 | CONFIG_USB_ETH_RNDIS=y |
| 1752 | # CONFIG_USB_ETH_EEM is not set | ||
| 1584 | CONFIG_USB_GADGETFS=m | 1753 | CONFIG_USB_GADGETFS=m |
| 1585 | CONFIG_USB_FILE_STORAGE=m | 1754 | CONFIG_USB_FILE_STORAGE=m |
| 1586 | # CONFIG_USB_FILE_STORAGE_TEST is not set | 1755 | # CONFIG_USB_FILE_STORAGE_TEST is not set |
| 1756 | # CONFIG_USB_MASS_STORAGE is not set | ||
| 1587 | CONFIG_USB_G_SERIAL=m | 1757 | CONFIG_USB_G_SERIAL=m |
| 1588 | CONFIG_USB_MIDI_GADGET=m | 1758 | CONFIG_USB_MIDI_GADGET=m |
| 1589 | # CONFIG_USB_G_PRINTER is not set | 1759 | # CONFIG_USB_G_PRINTER is not set |
| 1760 | # CONFIG_USB_CDC_COMPOSITE is not set | ||
| 1761 | # CONFIG_USB_G_NOKIA is not set | ||
| 1762 | # CONFIG_USB_G_MULTI is not set | ||
| 1763 | |||
| 1764 | # | ||
| 1765 | # OTG and related infrastructure | ||
| 1766 | # | ||
| 1767 | # CONFIG_USB_GPIO_VBUS is not set | ||
| 1768 | # CONFIG_NOP_USB_XCEIV is not set | ||
| 1769 | # CONFIG_UWB is not set | ||
| 1590 | # CONFIG_MMC is not set | 1770 | # CONFIG_MMC is not set |
| 1591 | # CONFIG_MEMSTICK is not set | 1771 | # CONFIG_MEMSTICK is not set |
| 1592 | CONFIG_NEW_LEDS=y | 1772 | CONFIG_NEW_LEDS=y |
| @@ -1596,21 +1776,33 @@ CONFIG_LEDS_CLASS=y | |||
| 1596 | # LED drivers | 1776 | # LED drivers |
| 1597 | # | 1777 | # |
| 1598 | CONFIG_LEDS_GPIO=y | 1778 | CONFIG_LEDS_GPIO=y |
| 1779 | CONFIG_LEDS_GPIO_PLATFORM=y | ||
| 1780 | # CONFIG_LEDS_LT3593 is not set | ||
| 1781 | CONFIG_LEDS_TRIGGERS=y | ||
| 1599 | 1782 | ||
| 1600 | # | 1783 | # |
| 1601 | # LED Triggers | 1784 | # LED Triggers |
| 1602 | # | 1785 | # |
| 1603 | CONFIG_LEDS_TRIGGERS=y | ||
| 1604 | CONFIG_LEDS_TRIGGER_TIMER=y | 1786 | CONFIG_LEDS_TRIGGER_TIMER=y |
| 1605 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | 1787 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y |
| 1788 | # CONFIG_LEDS_TRIGGER_BACKLIGHT is not set | ||
| 1789 | CONFIG_LEDS_TRIGGER_DEFAULT_ON=y | ||
| 1790 | |||
| 1791 | # | ||
| 1792 | # iptables trigger is under Netfilter config (LED target) | ||
| 1793 | # | ||
| 1794 | # CONFIG_ACCESSIBILITY is not set | ||
| 1606 | # CONFIG_INFINIBAND is not set | 1795 | # CONFIG_INFINIBAND is not set |
| 1607 | CONFIG_RTC_LIB=y | 1796 | CONFIG_RTC_LIB=y |
| 1608 | # CONFIG_RTC_CLASS is not set | 1797 | # CONFIG_RTC_CLASS is not set |
| 1798 | # CONFIG_DMADEVICES is not set | ||
| 1799 | # CONFIG_AUXDISPLAY is not set | ||
| 1800 | # CONFIG_UIO is not set | ||
| 1609 | 1801 | ||
| 1610 | # | 1802 | # |
| 1611 | # Userspace I/O | 1803 | # TI VLYNQ |
| 1612 | # | 1804 | # |
| 1613 | # CONFIG_UIO is not set | 1805 | # CONFIG_STAGING is not set |
| 1614 | 1806 | ||
| 1615 | # | 1807 | # |
| 1616 | # File systems | 1808 | # File systems |
| @@ -1621,10 +1813,11 @@ CONFIG_EXT2_FS_POSIX_ACL=y | |||
| 1621 | CONFIG_EXT2_FS_SECURITY=y | 1813 | CONFIG_EXT2_FS_SECURITY=y |
| 1622 | # CONFIG_EXT2_FS_XIP is not set | 1814 | # CONFIG_EXT2_FS_XIP is not set |
| 1623 | CONFIG_EXT3_FS=y | 1815 | CONFIG_EXT3_FS=y |
| 1816 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 1624 | CONFIG_EXT3_FS_XATTR=y | 1817 | CONFIG_EXT3_FS_XATTR=y |
| 1625 | CONFIG_EXT3_FS_POSIX_ACL=y | 1818 | CONFIG_EXT3_FS_POSIX_ACL=y |
| 1626 | CONFIG_EXT3_FS_SECURITY=y | 1819 | CONFIG_EXT3_FS_SECURITY=y |
| 1627 | # CONFIG_EXT4DEV_FS is not set | 1820 | # CONFIG_EXT4_FS is not set |
| 1628 | CONFIG_JBD=y | 1821 | CONFIG_JBD=y |
| 1629 | # CONFIG_JBD_DEBUG is not set | 1822 | # CONFIG_JBD_DEBUG is not set |
| 1630 | CONFIG_FS_MBCACHE=y | 1823 | CONFIG_FS_MBCACHE=y |
| @@ -1642,28 +1835,39 @@ CONFIG_JFS_SECURITY=y | |||
| 1642 | CONFIG_FS_POSIX_ACL=y | 1835 | CONFIG_FS_POSIX_ACL=y |
| 1643 | CONFIG_XFS_FS=m | 1836 | CONFIG_XFS_FS=m |
| 1644 | CONFIG_XFS_QUOTA=y | 1837 | CONFIG_XFS_QUOTA=y |
| 1645 | CONFIG_XFS_SECURITY=y | ||
| 1646 | CONFIG_XFS_POSIX_ACL=y | 1838 | CONFIG_XFS_POSIX_ACL=y |
| 1647 | CONFIG_XFS_RT=y | 1839 | CONFIG_XFS_RT=y |
| 1840 | # CONFIG_XFS_DEBUG is not set | ||
| 1648 | CONFIG_GFS2_FS=m | 1841 | CONFIG_GFS2_FS=m |
| 1649 | CONFIG_GFS2_FS_LOCKING_NOLOCK=m | 1842 | # CONFIG_GFS2_FS_LOCKING_DLM is not set |
| 1650 | CONFIG_GFS2_FS_LOCKING_DLM=m | ||
| 1651 | # CONFIG_OCFS2_FS is not set | 1843 | # CONFIG_OCFS2_FS is not set |
| 1844 | # CONFIG_BTRFS_FS is not set | ||
| 1845 | # CONFIG_NILFS2_FS is not set | ||
| 1846 | CONFIG_FILE_LOCKING=y | ||
| 1847 | CONFIG_FSNOTIFY=y | ||
| 1652 | CONFIG_DNOTIFY=y | 1848 | CONFIG_DNOTIFY=y |
| 1653 | CONFIG_INOTIFY=y | 1849 | CONFIG_INOTIFY=y |
| 1654 | CONFIG_INOTIFY_USER=y | 1850 | CONFIG_INOTIFY_USER=y |
| 1655 | CONFIG_QUOTA=y | 1851 | CONFIG_QUOTA=y |
| 1656 | CONFIG_QUOTA_NETLINK_INTERFACE=y | 1852 | CONFIG_QUOTA_NETLINK_INTERFACE=y |
| 1657 | CONFIG_PRINT_QUOTA_WARNING=y | 1853 | CONFIG_PRINT_QUOTA_WARNING=y |
| 1854 | # CONFIG_QUOTA_DEBUG is not set | ||
| 1855 | CONFIG_QUOTA_TREE=m | ||
| 1658 | CONFIG_QFMT_V1=m | 1856 | CONFIG_QFMT_V1=m |
| 1659 | CONFIG_QFMT_V2=m | 1857 | CONFIG_QFMT_V2=m |
| 1660 | CONFIG_QUOTACTL=y | 1858 | CONFIG_QUOTACTL=y |
| 1661 | CONFIG_AUTOFS_FS=m | 1859 | CONFIG_AUTOFS_FS=m |
| 1662 | CONFIG_AUTOFS4_FS=m | 1860 | CONFIG_AUTOFS4_FS=m |
| 1663 | CONFIG_FUSE_FS=m | 1861 | CONFIG_FUSE_FS=m |
| 1862 | # CONFIG_CUSE is not set | ||
| 1664 | CONFIG_GENERIC_ACL=y | 1863 | CONFIG_GENERIC_ACL=y |
| 1665 | 1864 | ||
| 1666 | # | 1865 | # |
| 1866 | # Caches | ||
| 1867 | # | ||
| 1868 | # CONFIG_FSCACHE is not set | ||
| 1869 | |||
| 1870 | # | ||
| 1667 | # CD-ROM/DVD Filesystems | 1871 | # CD-ROM/DVD Filesystems |
| 1668 | # | 1872 | # |
| 1669 | CONFIG_ISO9660_FS=m | 1873 | CONFIG_ISO9660_FS=m |
| @@ -1690,15 +1894,13 @@ CONFIG_NTFS_RW=y | |||
| 1690 | CONFIG_PROC_FS=y | 1894 | CONFIG_PROC_FS=y |
| 1691 | CONFIG_PROC_KCORE=y | 1895 | CONFIG_PROC_KCORE=y |
| 1692 | CONFIG_PROC_SYSCTL=y | 1896 | CONFIG_PROC_SYSCTL=y |
| 1897 | CONFIG_PROC_PAGE_MONITOR=y | ||
| 1693 | CONFIG_SYSFS=y | 1898 | CONFIG_SYSFS=y |
| 1694 | CONFIG_TMPFS=y | 1899 | CONFIG_TMPFS=y |
| 1695 | CONFIG_TMPFS_POSIX_ACL=y | 1900 | CONFIG_TMPFS_POSIX_ACL=y |
| 1696 | # CONFIG_HUGETLB_PAGE is not set | 1901 | # CONFIG_HUGETLB_PAGE is not set |
| 1697 | CONFIG_CONFIGFS_FS=m | 1902 | CONFIG_CONFIGFS_FS=m |
| 1698 | 1903 | CONFIG_MISC_FILESYSTEMS=y | |
| 1699 | # | ||
| 1700 | # Miscellaneous filesystems | ||
| 1701 | # | ||
| 1702 | CONFIG_ADFS_FS=m | 1904 | CONFIG_ADFS_FS=m |
| 1703 | # CONFIG_ADFS_FS_RW is not set | 1905 | # CONFIG_ADFS_FS_RW is not set |
| 1704 | CONFIG_AFFS_FS=m | 1906 | CONFIG_AFFS_FS=m |
| @@ -1721,12 +1923,19 @@ CONFIG_JFFS2_ZLIB=y | |||
| 1721 | # CONFIG_JFFS2_LZO is not set | 1923 | # CONFIG_JFFS2_LZO is not set |
| 1722 | CONFIG_JFFS2_RTIME=y | 1924 | CONFIG_JFFS2_RTIME=y |
| 1723 | # CONFIG_JFFS2_RUBIN is not set | 1925 | # CONFIG_JFFS2_RUBIN is not set |
| 1926 | # CONFIG_LOGFS is not set | ||
| 1724 | CONFIG_CRAMFS=m | 1927 | CONFIG_CRAMFS=m |
| 1928 | # CONFIG_SQUASHFS is not set | ||
| 1725 | CONFIG_VXFS_FS=m | 1929 | CONFIG_VXFS_FS=m |
| 1726 | CONFIG_MINIX_FS=m | 1930 | CONFIG_MINIX_FS=m |
| 1931 | # CONFIG_OMFS_FS is not set | ||
| 1727 | CONFIG_HPFS_FS=m | 1932 | CONFIG_HPFS_FS=m |
| 1728 | CONFIG_QNX4FS_FS=m | 1933 | CONFIG_QNX4FS_FS=m |
| 1729 | CONFIG_ROMFS_FS=m | 1934 | CONFIG_ROMFS_FS=m |
| 1935 | CONFIG_ROMFS_BACKED_BY_BLOCK=y | ||
| 1936 | # CONFIG_ROMFS_BACKED_BY_MTD is not set | ||
| 1937 | # CONFIG_ROMFS_BACKED_BY_BOTH is not set | ||
| 1938 | CONFIG_ROMFS_ON_BLOCK=y | ||
| 1730 | CONFIG_SYSV_FS=m | 1939 | CONFIG_SYSV_FS=m |
| 1731 | CONFIG_UFS_FS=m | 1940 | CONFIG_UFS_FS=m |
| 1732 | # CONFIG_UFS_FS_WRITE is not set | 1941 | # CONFIG_UFS_FS_WRITE is not set |
| @@ -1736,13 +1945,12 @@ CONFIG_NFS_FS=m | |||
| 1736 | CONFIG_NFS_V3=y | 1945 | CONFIG_NFS_V3=y |
| 1737 | CONFIG_NFS_V3_ACL=y | 1946 | CONFIG_NFS_V3_ACL=y |
| 1738 | CONFIG_NFS_V4=y | 1947 | CONFIG_NFS_V4=y |
| 1739 | # CONFIG_NFS_DIRECTIO is not set | 1948 | # CONFIG_NFS_V4_1 is not set |
| 1740 | CONFIG_NFSD=m | 1949 | CONFIG_NFSD=m |
| 1741 | CONFIG_NFSD_V2_ACL=y | 1950 | CONFIG_NFSD_V2_ACL=y |
| 1742 | CONFIG_NFSD_V3=y | 1951 | CONFIG_NFSD_V3=y |
| 1743 | CONFIG_NFSD_V3_ACL=y | 1952 | CONFIG_NFSD_V3_ACL=y |
| 1744 | CONFIG_NFSD_V4=y | 1953 | CONFIG_NFSD_V4=y |
| 1745 | CONFIG_NFSD_TCP=y | ||
| 1746 | CONFIG_LOCKD=m | 1954 | CONFIG_LOCKD=m |
| 1747 | CONFIG_LOCKD_V4=y | 1955 | CONFIG_LOCKD_V4=y |
| 1748 | CONFIG_EXPORTFS=m | 1956 | CONFIG_EXPORTFS=m |
| @@ -1750,10 +1958,10 @@ CONFIG_NFS_ACL_SUPPORT=m | |||
| 1750 | CONFIG_NFS_COMMON=y | 1958 | CONFIG_NFS_COMMON=y |
| 1751 | CONFIG_SUNRPC=m | 1959 | CONFIG_SUNRPC=m |
| 1752 | CONFIG_SUNRPC_GSS=m | 1960 | CONFIG_SUNRPC_GSS=m |
| 1753 | CONFIG_SUNRPC_BIND34=y | ||
| 1754 | CONFIG_RPCSEC_GSS_KRB5=m | 1961 | CONFIG_RPCSEC_GSS_KRB5=m |
| 1755 | CONFIG_RPCSEC_GSS_SPKM3=m | 1962 | CONFIG_RPCSEC_GSS_SPKM3=m |
| 1756 | # CONFIG_SMB_FS is not set | 1963 | # CONFIG_SMB_FS is not set |
| 1964 | # CONFIG_CEPH_FS is not set | ||
| 1757 | CONFIG_CIFS=m | 1965 | CONFIG_CIFS=m |
| 1758 | # CONFIG_CIFS_STATS is not set | 1966 | # CONFIG_CIFS_STATS is not set |
| 1759 | # CONFIG_CIFS_WEAK_PW_HASH is not set | 1967 | # CONFIG_CIFS_WEAK_PW_HASH is not set |
| @@ -1771,9 +1979,7 @@ CONFIG_NCPFS_OS2_NS=y | |||
| 1771 | CONFIG_NCPFS_NLS=y | 1979 | CONFIG_NCPFS_NLS=y |
| 1772 | CONFIG_NCPFS_EXTRAS=y | 1980 | CONFIG_NCPFS_EXTRAS=y |
| 1773 | CONFIG_CODA_FS=m | 1981 | CONFIG_CODA_FS=m |
| 1774 | # CONFIG_CODA_FS_OLD_API is not set | ||
| 1775 | # CONFIG_AFS_FS is not set | 1982 | # CONFIG_AFS_FS is not set |
| 1776 | CONFIG_9P_FS=m | ||
| 1777 | 1983 | ||
| 1778 | # | 1984 | # |
| 1779 | # Partition Types | 1985 | # Partition Types |
| @@ -1846,90 +2052,167 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y | |||
| 1846 | # CONFIG_PRINTK_TIME is not set | 2052 | # CONFIG_PRINTK_TIME is not set |
| 1847 | CONFIG_ENABLE_WARN_DEPRECATED=y | 2053 | CONFIG_ENABLE_WARN_DEPRECATED=y |
| 1848 | CONFIG_ENABLE_MUST_CHECK=y | 2054 | CONFIG_ENABLE_MUST_CHECK=y |
| 2055 | CONFIG_FRAME_WARN=1024 | ||
| 1849 | # CONFIG_MAGIC_SYSRQ is not set | 2056 | # CONFIG_MAGIC_SYSRQ is not set |
| 2057 | # CONFIG_STRIP_ASM_SYMS is not set | ||
| 1850 | # CONFIG_UNUSED_SYMBOLS is not set | 2058 | # CONFIG_UNUSED_SYMBOLS is not set |
| 1851 | CONFIG_DEBUG_FS=y | 2059 | CONFIG_DEBUG_FS=y |
| 1852 | # CONFIG_HEADERS_CHECK is not set | 2060 | # CONFIG_HEADERS_CHECK is not set |
| 1853 | # CONFIG_DEBUG_KERNEL is not set | 2061 | # CONFIG_DEBUG_KERNEL is not set |
| 2062 | # CONFIG_DEBUG_MEMORY_INIT is not set | ||
| 2063 | # CONFIG_LKDTM is not set | ||
| 2064 | # CONFIG_SYSCTL_SYSCALL_CHECK is not set | ||
| 2065 | CONFIG_HAVE_FUNCTION_TRACER=y | ||
| 2066 | CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y | ||
| 2067 | CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y | ||
| 2068 | CONFIG_HAVE_DYNAMIC_FTRACE=y | ||
| 2069 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y | ||
| 2070 | CONFIG_TRACING_SUPPORT=y | ||
| 2071 | # CONFIG_FTRACE is not set | ||
| 2072 | # CONFIG_DYNAMIC_DEBUG is not set | ||
| 1854 | # CONFIG_SAMPLES is not set | 2073 | # CONFIG_SAMPLES is not set |
| 2074 | CONFIG_HAVE_ARCH_KGDB=y | ||
| 2075 | CONFIG_EARLY_PRINTK=y | ||
| 1855 | # CONFIG_CMDLINE_BOOL is not set | 2076 | # CONFIG_CMDLINE_BOOL is not set |
| 2077 | # CONFIG_SPINLOCK_TEST is not set | ||
| 1856 | 2078 | ||
| 1857 | # | 2079 | # |
| 1858 | # Security options | 2080 | # Security options |
| 1859 | # | 2081 | # |
| 1860 | # CONFIG_KEYS is not set | 2082 | # CONFIG_KEYS is not set |
| 1861 | # CONFIG_SECURITY is not set | 2083 | # CONFIG_SECURITY is not set |
| 1862 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | 2084 | # CONFIG_SECURITYFS is not set |
| 2085 | # CONFIG_DEFAULT_SECURITY_SELINUX is not set | ||
| 2086 | # CONFIG_DEFAULT_SECURITY_SMACK is not set | ||
| 2087 | # CONFIG_DEFAULT_SECURITY_TOMOYO is not set | ||
| 2088 | CONFIG_DEFAULT_SECURITY_DAC=y | ||
| 2089 | CONFIG_DEFAULT_SECURITY="" | ||
| 1863 | CONFIG_CRYPTO=y | 2090 | CONFIG_CRYPTO=y |
| 2091 | |||
| 2092 | # | ||
| 2093 | # Crypto core or helper | ||
| 2094 | # | ||
| 2095 | # CONFIG_CRYPTO_FIPS is not set | ||
| 1864 | CONFIG_CRYPTO_ALGAPI=y | 2096 | CONFIG_CRYPTO_ALGAPI=y |
| 2097 | CONFIG_CRYPTO_ALGAPI2=y | ||
| 1865 | CONFIG_CRYPTO_AEAD=m | 2098 | CONFIG_CRYPTO_AEAD=m |
| 2099 | CONFIG_CRYPTO_AEAD2=y | ||
| 1866 | CONFIG_CRYPTO_BLKCIPHER=m | 2100 | CONFIG_CRYPTO_BLKCIPHER=m |
| 1867 | # CONFIG_CRYPTO_SEQIV is not set | 2101 | CONFIG_CRYPTO_BLKCIPHER2=y |
| 1868 | CONFIG_CRYPTO_HASH=y | 2102 | CONFIG_CRYPTO_HASH=y |
| 2103 | CONFIG_CRYPTO_HASH2=y | ||
| 2104 | CONFIG_CRYPTO_RNG=m | ||
| 2105 | CONFIG_CRYPTO_RNG2=y | ||
| 2106 | CONFIG_CRYPTO_PCOMP=y | ||
| 1869 | CONFIG_CRYPTO_MANAGER=y | 2107 | CONFIG_CRYPTO_MANAGER=y |
| 2108 | CONFIG_CRYPTO_MANAGER2=y | ||
| 2109 | CONFIG_CRYPTO_GF128MUL=m | ||
| 2110 | CONFIG_CRYPTO_NULL=m | ||
| 2111 | CONFIG_CRYPTO_WORKQUEUE=y | ||
| 2112 | # CONFIG_CRYPTO_CRYPTD is not set | ||
| 2113 | CONFIG_CRYPTO_AUTHENC=m | ||
| 2114 | CONFIG_CRYPTO_TEST=m | ||
| 2115 | |||
| 2116 | # | ||
| 2117 | # Authenticated Encryption with Associated Data | ||
| 2118 | # | ||
| 2119 | # CONFIG_CRYPTO_CCM is not set | ||
| 2120 | # CONFIG_CRYPTO_GCM is not set | ||
| 2121 | # CONFIG_CRYPTO_SEQIV is not set | ||
| 2122 | |||
| 2123 | # | ||
| 2124 | # Block modes | ||
| 2125 | # | ||
| 2126 | CONFIG_CRYPTO_CBC=m | ||
| 2127 | # CONFIG_CRYPTO_CTR is not set | ||
| 2128 | # CONFIG_CRYPTO_CTS is not set | ||
| 2129 | CONFIG_CRYPTO_ECB=m | ||
| 2130 | CONFIG_CRYPTO_LRW=m | ||
| 2131 | CONFIG_CRYPTO_PCBC=m | ||
| 2132 | CONFIG_CRYPTO_XTS=m | ||
| 2133 | |||
| 2134 | # | ||
| 2135 | # Hash modes | ||
| 2136 | # | ||
| 1870 | CONFIG_CRYPTO_HMAC=y | 2137 | CONFIG_CRYPTO_HMAC=y |
| 1871 | CONFIG_CRYPTO_XCBC=m | 2138 | CONFIG_CRYPTO_XCBC=m |
| 1872 | CONFIG_CRYPTO_NULL=m | 2139 | # CONFIG_CRYPTO_VMAC is not set |
| 2140 | |||
| 2141 | # | ||
| 2142 | # Digest | ||
| 2143 | # | ||
| 2144 | CONFIG_CRYPTO_CRC32C=m | ||
| 2145 | # CONFIG_CRYPTO_GHASH is not set | ||
| 1873 | CONFIG_CRYPTO_MD4=m | 2146 | CONFIG_CRYPTO_MD4=m |
| 1874 | CONFIG_CRYPTO_MD5=y | 2147 | CONFIG_CRYPTO_MD5=y |
| 2148 | CONFIG_CRYPTO_MICHAEL_MIC=m | ||
| 2149 | # CONFIG_CRYPTO_RMD128 is not set | ||
| 2150 | # CONFIG_CRYPTO_RMD160 is not set | ||
| 2151 | # CONFIG_CRYPTO_RMD256 is not set | ||
| 2152 | # CONFIG_CRYPTO_RMD320 is not set | ||
| 1875 | CONFIG_CRYPTO_SHA1=m | 2153 | CONFIG_CRYPTO_SHA1=m |
| 1876 | CONFIG_CRYPTO_SHA256=m | 2154 | CONFIG_CRYPTO_SHA256=m |
| 1877 | CONFIG_CRYPTO_SHA512=m | 2155 | CONFIG_CRYPTO_SHA512=m |
| 1878 | CONFIG_CRYPTO_WP512=m | ||
| 1879 | CONFIG_CRYPTO_TGR192=m | 2156 | CONFIG_CRYPTO_TGR192=m |
| 1880 | CONFIG_CRYPTO_GF128MUL=m | 2157 | CONFIG_CRYPTO_WP512=m |
| 1881 | CONFIG_CRYPTO_ECB=m | 2158 | |
| 1882 | CONFIG_CRYPTO_CBC=m | 2159 | # |
| 1883 | CONFIG_CRYPTO_PCBC=m | 2160 | # Ciphers |
| 1884 | CONFIG_CRYPTO_LRW=m | 2161 | # |
| 1885 | CONFIG_CRYPTO_XTS=m | ||
| 1886 | # CONFIG_CRYPTO_CTR is not set | ||
| 1887 | # CONFIG_CRYPTO_GCM is not set | ||
| 1888 | # CONFIG_CRYPTO_CCM is not set | ||
| 1889 | # CONFIG_CRYPTO_CRYPTD is not set | ||
| 1890 | CONFIG_CRYPTO_DES=m | ||
| 1891 | CONFIG_CRYPTO_FCRYPT=m | ||
| 1892 | CONFIG_CRYPTO_BLOWFISH=m | ||
| 1893 | CONFIG_CRYPTO_TWOFISH=m | ||
| 1894 | CONFIG_CRYPTO_TWOFISH_COMMON=m | ||
| 1895 | CONFIG_CRYPTO_SERPENT=m | ||
| 1896 | CONFIG_CRYPTO_AES=m | 2162 | CONFIG_CRYPTO_AES=m |
| 2163 | CONFIG_CRYPTO_ANUBIS=m | ||
| 2164 | CONFIG_CRYPTO_ARC4=m | ||
| 2165 | CONFIG_CRYPTO_BLOWFISH=m | ||
| 2166 | CONFIG_CRYPTO_CAMELLIA=m | ||
| 1897 | CONFIG_CRYPTO_CAST5=m | 2167 | CONFIG_CRYPTO_CAST5=m |
| 1898 | CONFIG_CRYPTO_CAST6=m | 2168 | CONFIG_CRYPTO_CAST6=m |
| 1899 | CONFIG_CRYPTO_TEA=m | 2169 | CONFIG_CRYPTO_DES=m |
| 1900 | CONFIG_CRYPTO_ARC4=m | 2170 | CONFIG_CRYPTO_FCRYPT=m |
| 1901 | CONFIG_CRYPTO_KHAZAD=m | 2171 | CONFIG_CRYPTO_KHAZAD=m |
| 1902 | CONFIG_CRYPTO_ANUBIS=m | ||
| 1903 | CONFIG_CRYPTO_SEED=m | ||
| 1904 | # CONFIG_CRYPTO_SALSA20 is not set | 2172 | # CONFIG_CRYPTO_SALSA20 is not set |
| 2173 | CONFIG_CRYPTO_SEED=m | ||
| 2174 | CONFIG_CRYPTO_SERPENT=m | ||
| 2175 | CONFIG_CRYPTO_TEA=m | ||
| 2176 | CONFIG_CRYPTO_TWOFISH=m | ||
| 2177 | CONFIG_CRYPTO_TWOFISH_COMMON=m | ||
| 2178 | |||
| 2179 | # | ||
| 2180 | # Compression | ||
| 2181 | # | ||
| 1905 | CONFIG_CRYPTO_DEFLATE=m | 2182 | CONFIG_CRYPTO_DEFLATE=m |
| 1906 | CONFIG_CRYPTO_MICHAEL_MIC=m | 2183 | # CONFIG_CRYPTO_ZLIB is not set |
| 1907 | CONFIG_CRYPTO_CRC32C=m | ||
| 1908 | CONFIG_CRYPTO_CAMELLIA=m | ||
| 1909 | CONFIG_CRYPTO_TEST=m | ||
| 1910 | CONFIG_CRYPTO_AUTHENC=m | ||
| 1911 | # CONFIG_CRYPTO_LZO is not set | 2184 | # CONFIG_CRYPTO_LZO is not set |
| 2185 | |||
| 2186 | # | ||
| 2187 | # Random Number Generation | ||
| 2188 | # | ||
| 2189 | CONFIG_CRYPTO_ANSI_CPRNG=m | ||
| 1912 | CONFIG_CRYPTO_HW=y | 2190 | CONFIG_CRYPTO_HW=y |
| 1913 | # CONFIG_CRYPTO_DEV_HIFN_795X is not set | 2191 | # CONFIG_CRYPTO_DEV_HIFN_795X is not set |
| 2192 | # CONFIG_BINARY_PRINTF is not set | ||
| 1914 | 2193 | ||
| 1915 | # | 2194 | # |
| 1916 | # Library routines | 2195 | # Library routines |
| 1917 | # | 2196 | # |
| 1918 | CONFIG_BITREVERSE=y | 2197 | CONFIG_BITREVERSE=y |
| 2198 | CONFIG_GENERIC_FIND_LAST_BIT=y | ||
| 1919 | CONFIG_CRC_CCITT=m | 2199 | CONFIG_CRC_CCITT=m |
| 1920 | CONFIG_CRC16=m | 2200 | CONFIG_CRC16=m |
| 2201 | # CONFIG_CRC_T10DIF is not set | ||
| 1921 | CONFIG_CRC_ITU_T=m | 2202 | CONFIG_CRC_ITU_T=m |
| 1922 | CONFIG_CRC32=y | 2203 | CONFIG_CRC32=y |
| 1923 | CONFIG_CRC7=m | 2204 | CONFIG_CRC7=m |
| 1924 | CONFIG_LIBCRC32C=m | 2205 | CONFIG_LIBCRC32C=m |
| 1925 | CONFIG_AUDIT_GENERIC=y | 2206 | CONFIG_AUDIT_GENERIC=y |
| 1926 | CONFIG_ZLIB_INFLATE=m | 2207 | CONFIG_ZLIB_INFLATE=y |
| 1927 | CONFIG_ZLIB_DEFLATE=m | 2208 | CONFIG_ZLIB_DEFLATE=m |
| 2209 | CONFIG_DECOMPRESS_GZIP=y | ||
| 2210 | CONFIG_DECOMPRESS_LZMA=y | ||
| 1928 | CONFIG_TEXTSEARCH=y | 2211 | CONFIG_TEXTSEARCH=y |
| 1929 | CONFIG_TEXTSEARCH_KMP=m | 2212 | CONFIG_TEXTSEARCH_KMP=m |
| 1930 | CONFIG_TEXTSEARCH_BM=m | 2213 | CONFIG_TEXTSEARCH_BM=m |
| 1931 | CONFIG_TEXTSEARCH_FSM=m | 2214 | CONFIG_TEXTSEARCH_FSM=m |
| 1932 | CONFIG_PLIST=y | ||
| 1933 | CONFIG_HAS_IOMEM=y | 2215 | CONFIG_HAS_IOMEM=y |
| 1934 | CONFIG_HAS_IOPORT=y | 2216 | CONFIG_HAS_IOPORT=y |
| 1935 | CONFIG_HAS_DMA=y | 2217 | CONFIG_HAS_DMA=y |
| 2218 | CONFIG_NLATTR=y | ||
diff --git a/arch/mips/configs/mtx1_defconfig b/arch/mips/configs/mtx1_defconfig index 144b94d9a6ad..cff8f4c0e57c 100644 --- a/arch/mips/configs/mtx1_defconfig +++ b/arch/mips/configs/mtx1_defconfig | |||
| @@ -1,7 +1,7 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.23-rc8 | 3 | # Linux kernel version: 2.6.34-rc6 |
| 4 | # Sun Sep 30 12:56:10 2007 | 4 | # Sat May 1 13:39:10 2010 |
| 5 | # | 5 | # |
| 6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
| 7 | 7 | ||
| @@ -9,20 +9,28 @@ CONFIG_MIPS=y | |||
| 9 | # Machine selection | 9 | # Machine selection |
| 10 | # | 10 | # |
| 11 | CONFIG_MACH_ALCHEMY=y | 11 | CONFIG_MACH_ALCHEMY=y |
| 12 | # CONFIG_AR7 is not set | ||
| 13 | # CONFIG_BCM47XX is not set | ||
| 14 | # CONFIG_BCM63XX is not set | ||
| 12 | # CONFIG_MIPS_COBALT is not set | 15 | # CONFIG_MIPS_COBALT is not set |
| 13 | # CONFIG_MACH_DECSTATION is not set | 16 | # CONFIG_MACH_DECSTATION is not set |
| 14 | # CONFIG_MACH_JAZZ is not set | 17 | # CONFIG_MACH_JAZZ is not set |
| 15 | # CONFIG_LEMOTE_FULONG is not set | 18 | # CONFIG_LASAT is not set |
| 19 | # CONFIG_MACH_LOONGSON is not set | ||
| 16 | # CONFIG_MIPS_MALTA is not set | 20 | # CONFIG_MIPS_MALTA is not set |
| 17 | # CONFIG_MIPS_SIM is not set | 21 | # CONFIG_MIPS_SIM is not set |
| 18 | # CONFIG_MARKEINS is not set | 22 | # CONFIG_NEC_MARKEINS is not set |
| 19 | # CONFIG_MACH_VR41XX is not set | 23 | # CONFIG_MACH_VR41XX is not set |
| 24 | # CONFIG_NXP_STB220 is not set | ||
| 25 | # CONFIG_NXP_STB225 is not set | ||
| 20 | # CONFIG_PNX8550_JBS is not set | 26 | # CONFIG_PNX8550_JBS is not set |
| 21 | # CONFIG_PNX8550_STB810 is not set | 27 | # CONFIG_PNX8550_STB810 is not set |
| 22 | # CONFIG_PMC_MSP is not set | 28 | # CONFIG_PMC_MSP is not set |
| 23 | # CONFIG_PMC_YOSEMITE is not set | 29 | # CONFIG_PMC_YOSEMITE is not set |
| 30 | # CONFIG_POWERTV is not set | ||
| 24 | # CONFIG_SGI_IP22 is not set | 31 | # CONFIG_SGI_IP22 is not set |
| 25 | # CONFIG_SGI_IP27 is not set | 32 | # CONFIG_SGI_IP27 is not set |
| 33 | # CONFIG_SGI_IP28 is not set | ||
| 26 | # CONFIG_SGI_IP32 is not set | 34 | # CONFIG_SGI_IP32 is not set |
| 27 | # CONFIG_SIBYTE_CRHINE is not set | 35 | # CONFIG_SIBYTE_CRHINE is not set |
| 28 | # CONFIG_SIBYTE_CARMEL is not set | 36 | # CONFIG_SIBYTE_CARMEL is not set |
| @@ -33,10 +41,14 @@ CONFIG_MACH_ALCHEMY=y | |||
| 33 | # CONFIG_SIBYTE_SENTOSA is not set | 41 | # CONFIG_SIBYTE_SENTOSA is not set |
| 34 | # CONFIG_SIBYTE_BIGSUR is not set | 42 | # CONFIG_SIBYTE_BIGSUR is not set |
| 35 | # CONFIG_SNI_RM is not set | 43 | # CONFIG_SNI_RM is not set |
| 36 | # CONFIG_TOSHIBA_JMR3927 is not set | 44 | # CONFIG_MACH_TX39XX is not set |
| 37 | # CONFIG_TOSHIBA_RBTX4927 is not set | 45 | # CONFIG_MACH_TX49XX is not set |
| 38 | # CONFIG_TOSHIBA_RBTX4938 is not set | 46 | # CONFIG_MIKROTIK_RB532 is not set |
| 39 | # CONFIG_WR_PPMC is not set | 47 | # CONFIG_WR_PPMC is not set |
| 48 | # CONFIG_CAVIUM_OCTEON_SIMULATOR is not set | ||
| 49 | # CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set | ||
| 50 | CONFIG_ALCHEMY_GPIOINT_AU1000=y | ||
| 51 | # CONFIG_ALCHEMY_GPIO_INDIRECT is not set | ||
| 40 | CONFIG_MIPS_MTX1=y | 52 | CONFIG_MIPS_MTX1=y |
| 41 | # CONFIG_MIPS_BOSPORUS is not set | 53 | # CONFIG_MIPS_BOSPORUS is not set |
| 42 | # CONFIG_MIPS_DB1000 is not set | 54 | # CONFIG_MIPS_DB1000 is not set |
| @@ -53,29 +65,38 @@ CONFIG_MIPS_MTX1=y | |||
| 53 | # CONFIG_MIPS_XXS1500 is not set | 65 | # CONFIG_MIPS_XXS1500 is not set |
| 54 | CONFIG_SOC_AU1500=y | 66 | CONFIG_SOC_AU1500=y |
| 55 | CONFIG_SOC_AU1X00=y | 67 | CONFIG_SOC_AU1X00=y |
| 68 | CONFIG_LOONGSON_UART_BASE=y | ||
| 56 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | 69 | CONFIG_RWSEM_GENERIC_SPINLOCK=y |
| 57 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | 70 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set |
| 58 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | 71 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set |
| 72 | CONFIG_ARCH_SUPPORTS_OPROFILE=y | ||
| 59 | CONFIG_GENERIC_FIND_NEXT_BIT=y | 73 | CONFIG_GENERIC_FIND_NEXT_BIT=y |
| 60 | CONFIG_GENERIC_HWEIGHT=y | 74 | CONFIG_GENERIC_HWEIGHT=y |
| 61 | CONFIG_GENERIC_CALIBRATE_DELAY=y | 75 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
| 76 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
| 62 | CONFIG_GENERIC_TIME=y | 77 | CONFIG_GENERIC_TIME=y |
| 63 | CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y | 78 | CONFIG_GENERIC_CMOS_UPDATE=y |
| 64 | # CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set | 79 | CONFIG_SCHED_OMIT_FRAME_POINTER=y |
| 80 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
| 81 | CONFIG_CEVT_R4K_LIB=y | ||
| 82 | CONFIG_CSRC_R4K_LIB=y | ||
| 65 | CONFIG_DMA_NONCOHERENT=y | 83 | CONFIG_DMA_NONCOHERENT=y |
| 66 | CONFIG_DMA_NEED_PCI_MAP_STATE=y | 84 | CONFIG_NEED_DMA_MAP_STATE=y |
| 67 | # CONFIG_HOTPLUG_CPU is not set | 85 | CONFIG_SYS_HAS_EARLY_PRINTK=y |
| 68 | # CONFIG_NO_IOPORT is not set | 86 | # CONFIG_NO_IOPORT is not set |
| 87 | CONFIG_GENERIC_GPIO=y | ||
| 69 | # CONFIG_CPU_BIG_ENDIAN is not set | 88 | # CONFIG_CPU_BIG_ENDIAN is not set |
| 70 | CONFIG_CPU_LITTLE_ENDIAN=y | 89 | CONFIG_CPU_LITTLE_ENDIAN=y |
| 71 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | 90 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y |
| 72 | CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y | 91 | CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y |
| 92 | CONFIG_IRQ_CPU=y | ||
| 73 | CONFIG_MIPS_L1_CACHE_SHIFT=5 | 93 | CONFIG_MIPS_L1_CACHE_SHIFT=5 |
| 74 | 94 | ||
| 75 | # | 95 | # |
| 76 | # CPU selection | 96 | # CPU selection |
| 77 | # | 97 | # |
| 78 | # CONFIG_CPU_LOONGSON2 is not set | 98 | # CONFIG_CPU_LOONGSON2E is not set |
| 99 | # CONFIG_CPU_LOONGSON2F is not set | ||
| 79 | CONFIG_CPU_MIPS32_R1=y | 100 | CONFIG_CPU_MIPS32_R1=y |
| 80 | # CONFIG_CPU_MIPS32_R2 is not set | 101 | # CONFIG_CPU_MIPS32_R2 is not set |
| 81 | # CONFIG_CPU_MIPS64_R1 is not set | 102 | # CONFIG_CPU_MIPS64_R1 is not set |
| @@ -88,6 +109,7 @@ CONFIG_CPU_MIPS32_R1=y | |||
| 88 | # CONFIG_CPU_TX49XX is not set | 109 | # CONFIG_CPU_TX49XX is not set |
| 89 | # CONFIG_CPU_R5000 is not set | 110 | # CONFIG_CPU_R5000 is not set |
| 90 | # CONFIG_CPU_R5432 is not set | 111 | # CONFIG_CPU_R5432 is not set |
| 112 | # CONFIG_CPU_R5500 is not set | ||
| 91 | # CONFIG_CPU_R6000 is not set | 113 | # CONFIG_CPU_R6000 is not set |
| 92 | # CONFIG_CPU_NEVADA is not set | 114 | # CONFIG_CPU_NEVADA is not set |
| 93 | # CONFIG_CPU_R8000 is not set | 115 | # CONFIG_CPU_R8000 is not set |
| @@ -95,11 +117,14 @@ CONFIG_CPU_MIPS32_R1=y | |||
| 95 | # CONFIG_CPU_RM7000 is not set | 117 | # CONFIG_CPU_RM7000 is not set |
| 96 | # CONFIG_CPU_RM9000 is not set | 118 | # CONFIG_CPU_RM9000 is not set |
| 97 | # CONFIG_CPU_SB1 is not set | 119 | # CONFIG_CPU_SB1 is not set |
| 120 | # CONFIG_CPU_CAVIUM_OCTEON is not set | ||
| 121 | CONFIG_SYS_SUPPORTS_ZBOOT=y | ||
| 98 | CONFIG_SYS_HAS_CPU_MIPS32_R1=y | 122 | CONFIG_SYS_HAS_CPU_MIPS32_R1=y |
| 99 | CONFIG_CPU_MIPS32=y | 123 | CONFIG_CPU_MIPS32=y |
| 100 | CONFIG_CPU_MIPSR1=y | 124 | CONFIG_CPU_MIPSR1=y |
| 101 | CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y | 125 | CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y |
| 102 | CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y | 126 | CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y |
| 127 | CONFIG_HARDWARE_WATCHPOINTS=y | ||
| 103 | 128 | ||
| 104 | # | 129 | # |
| 105 | # Kernel type | 130 | # Kernel type |
| @@ -109,28 +134,36 @@ CONFIG_32BIT=y | |||
| 109 | CONFIG_PAGE_SIZE_4KB=y | 134 | CONFIG_PAGE_SIZE_4KB=y |
| 110 | # CONFIG_PAGE_SIZE_8KB is not set | 135 | # CONFIG_PAGE_SIZE_8KB is not set |
| 111 | # CONFIG_PAGE_SIZE_16KB is not set | 136 | # CONFIG_PAGE_SIZE_16KB is not set |
| 137 | # CONFIG_PAGE_SIZE_32KB is not set | ||
| 112 | # CONFIG_PAGE_SIZE_64KB is not set | 138 | # CONFIG_PAGE_SIZE_64KB is not set |
| 113 | CONFIG_CPU_HAS_PREFETCH=y | 139 | CONFIG_CPU_HAS_PREFETCH=y |
| 114 | CONFIG_MIPS_MT_DISABLED=y | 140 | CONFIG_MIPS_MT_DISABLED=y |
| 115 | # CONFIG_MIPS_MT_SMP is not set | 141 | # CONFIG_MIPS_MT_SMP is not set |
| 116 | # CONFIG_MIPS_MT_SMTC is not set | 142 | # CONFIG_MIPS_MT_SMTC is not set |
| 117 | CONFIG_64BIT_PHYS_ADDR=y | 143 | CONFIG_64BIT_PHYS_ADDR=y |
| 144 | CONFIG_ARCH_PHYS_ADDR_T_64BIT=y | ||
| 118 | CONFIG_CPU_HAS_SYNC=y | 145 | CONFIG_CPU_HAS_SYNC=y |
| 119 | CONFIG_GENERIC_HARDIRQS=y | 146 | CONFIG_GENERIC_HARDIRQS=y |
| 120 | CONFIG_GENERIC_IRQ_PROBE=y | 147 | CONFIG_GENERIC_IRQ_PROBE=y |
| 121 | CONFIG_CPU_SUPPORTS_HIGHMEM=y | 148 | CONFIG_CPU_SUPPORTS_HIGHMEM=y |
| 122 | CONFIG_ARCH_FLATMEM_ENABLE=y | 149 | CONFIG_ARCH_FLATMEM_ENABLE=y |
| 150 | CONFIG_ARCH_POPULATES_NODE_MAP=y | ||
| 123 | CONFIG_SELECT_MEMORY_MODEL=y | 151 | CONFIG_SELECT_MEMORY_MODEL=y |
| 124 | CONFIG_FLATMEM_MANUAL=y | 152 | CONFIG_FLATMEM_MANUAL=y |
| 125 | # CONFIG_DISCONTIGMEM_MANUAL is not set | 153 | # CONFIG_DISCONTIGMEM_MANUAL is not set |
| 126 | # CONFIG_SPARSEMEM_MANUAL is not set | 154 | # CONFIG_SPARSEMEM_MANUAL is not set |
| 127 | CONFIG_FLATMEM=y | 155 | CONFIG_FLATMEM=y |
| 128 | CONFIG_FLAT_NODE_MEM_MAP=y | 156 | CONFIG_FLAT_NODE_MEM_MAP=y |
| 129 | # CONFIG_SPARSEMEM_STATIC is not set | 157 | CONFIG_PAGEFLAGS_EXTENDED=y |
| 130 | CONFIG_SPLIT_PTLOCK_CPUS=4 | 158 | CONFIG_SPLIT_PTLOCK_CPUS=4 |
| 131 | CONFIG_RESOURCES_64BIT=y | 159 | CONFIG_PHYS_ADDR_T_64BIT=y |
| 132 | CONFIG_ZONE_DMA_FLAG=0 | 160 | CONFIG_ZONE_DMA_FLAG=0 |
| 133 | CONFIG_VIRT_TO_BUS=y | 161 | CONFIG_VIRT_TO_BUS=y |
| 162 | # CONFIG_KSM is not set | ||
| 163 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | ||
| 164 | # CONFIG_NO_HZ is not set | ||
| 165 | # CONFIG_HIGH_RES_TIMERS is not set | ||
| 166 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
| 134 | # CONFIG_HZ_48 is not set | 167 | # CONFIG_HZ_48 is not set |
| 135 | # CONFIG_HZ_100 is not set | 168 | # CONFIG_HZ_100 is not set |
| 136 | # CONFIG_HZ_128 is not set | 169 | # CONFIG_HZ_128 is not set |
| @@ -148,6 +181,7 @@ CONFIG_SECCOMP=y | |||
| 148 | CONFIG_LOCKDEP_SUPPORT=y | 181 | CONFIG_LOCKDEP_SUPPORT=y |
| 149 | CONFIG_STACKTRACE_SUPPORT=y | 182 | CONFIG_STACKTRACE_SUPPORT=y |
| 150 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | 183 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" |
| 184 | CONFIG_CONSTRUCTORS=y | ||
| 151 | 185 | ||
| 152 | # | 186 | # |
| 153 | # General setup | 187 | # General setup |
| @@ -157,23 +191,49 @@ CONFIG_BROKEN_ON_SMP=y | |||
| 157 | CONFIG_INIT_ENV_ARG_LIMIT=32 | 191 | CONFIG_INIT_ENV_ARG_LIMIT=32 |
| 158 | CONFIG_LOCALVERSION="" | 192 | CONFIG_LOCALVERSION="" |
| 159 | # CONFIG_LOCALVERSION_AUTO is not set | 193 | # CONFIG_LOCALVERSION_AUTO is not set |
| 194 | CONFIG_HAVE_KERNEL_GZIP=y | ||
| 195 | CONFIG_HAVE_KERNEL_BZIP2=y | ||
| 196 | CONFIG_HAVE_KERNEL_LZMA=y | ||
| 197 | CONFIG_HAVE_KERNEL_LZO=y | ||
| 198 | CONFIG_KERNEL_GZIP=y | ||
| 199 | # CONFIG_KERNEL_BZIP2 is not set | ||
| 200 | # CONFIG_KERNEL_LZMA is not set | ||
| 201 | # CONFIG_KERNEL_LZO is not set | ||
| 160 | CONFIG_SWAP=y | 202 | CONFIG_SWAP=y |
| 161 | CONFIG_SYSVIPC=y | 203 | CONFIG_SYSVIPC=y |
| 162 | CONFIG_SYSVIPC_SYSCTL=y | 204 | CONFIG_SYSVIPC_SYSCTL=y |
| 163 | CONFIG_POSIX_MQUEUE=y | 205 | CONFIG_POSIX_MQUEUE=y |
| 206 | CONFIG_POSIX_MQUEUE_SYSCTL=y | ||
| 164 | CONFIG_BSD_PROCESS_ACCT=y | 207 | CONFIG_BSD_PROCESS_ACCT=y |
| 165 | CONFIG_BSD_PROCESS_ACCT_V3=y | 208 | CONFIG_BSD_PROCESS_ACCT_V3=y |
| 166 | # CONFIG_TASKSTATS is not set | 209 | # CONFIG_TASKSTATS is not set |
| 167 | # CONFIG_USER_NS is not set | ||
| 168 | CONFIG_AUDIT=y | 210 | CONFIG_AUDIT=y |
| 211 | |||
| 212 | # | ||
| 213 | # RCU Subsystem | ||
| 214 | # | ||
| 215 | CONFIG_TREE_RCU=y | ||
| 216 | # CONFIG_TREE_PREEMPT_RCU is not set | ||
| 217 | # CONFIG_TINY_RCU is not set | ||
| 218 | # CONFIG_RCU_TRACE is not set | ||
| 219 | CONFIG_RCU_FANOUT=32 | ||
| 220 | # CONFIG_RCU_FANOUT_EXACT is not set | ||
| 221 | # CONFIG_TREE_RCU_TRACE is not set | ||
| 169 | # CONFIG_IKCONFIG is not set | 222 | # CONFIG_IKCONFIG is not set |
| 170 | CONFIG_LOG_BUF_SHIFT=17 | 223 | CONFIG_LOG_BUF_SHIFT=17 |
| 171 | CONFIG_SYSFS_DEPRECATED=y | 224 | # CONFIG_CGROUPS is not set |
| 225 | # CONFIG_SYSFS_DEPRECATED_V2 is not set | ||
| 172 | CONFIG_RELAY=y | 226 | CONFIG_RELAY=y |
| 227 | # CONFIG_NAMESPACES is not set | ||
| 173 | CONFIG_BLK_DEV_INITRD=y | 228 | CONFIG_BLK_DEV_INITRD=y |
| 174 | CONFIG_INITRAMFS_SOURCE="" | 229 | CONFIG_INITRAMFS_SOURCE="" |
| 230 | CONFIG_RD_GZIP=y | ||
| 231 | # CONFIG_RD_BZIP2 is not set | ||
| 232 | # CONFIG_RD_LZMA is not set | ||
| 233 | # CONFIG_RD_LZO is not set | ||
| 175 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | 234 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set |
| 176 | CONFIG_SYSCTL=y | 235 | CONFIG_SYSCTL=y |
| 236 | CONFIG_ANON_INODES=y | ||
| 177 | CONFIG_EMBEDDED=y | 237 | CONFIG_EMBEDDED=y |
| 178 | CONFIG_SYSCTL_SYSCALL=y | 238 | CONFIG_SYSCTL_SYSCALL=y |
| 179 | CONFIG_KALLSYMS=y | 239 | CONFIG_KALLSYMS=y |
| @@ -182,61 +242,104 @@ CONFIG_HOTPLUG=y | |||
| 182 | CONFIG_PRINTK=y | 242 | CONFIG_PRINTK=y |
| 183 | CONFIG_BUG=y | 243 | CONFIG_BUG=y |
| 184 | CONFIG_ELF_CORE=y | 244 | CONFIG_ELF_CORE=y |
| 245 | CONFIG_PCSPKR_PLATFORM=y | ||
| 185 | CONFIG_BASE_FULL=y | 246 | CONFIG_BASE_FULL=y |
| 186 | CONFIG_FUTEX=y | 247 | CONFIG_FUTEX=y |
| 187 | CONFIG_ANON_INODES=y | ||
| 188 | CONFIG_EPOLL=y | 248 | CONFIG_EPOLL=y |
| 189 | CONFIG_SIGNALFD=y | 249 | CONFIG_SIGNALFD=y |
| 250 | CONFIG_TIMERFD=y | ||
| 190 | CONFIG_EVENTFD=y | 251 | CONFIG_EVENTFD=y |
| 191 | CONFIG_SHMEM=y | 252 | CONFIG_SHMEM=y |
| 253 | CONFIG_AIO=y | ||
| 254 | |||
| 255 | # | ||
| 256 | # Kernel Performance Events And Counters | ||
| 257 | # | ||
| 192 | CONFIG_VM_EVENT_COUNTERS=y | 258 | CONFIG_VM_EVENT_COUNTERS=y |
| 259 | CONFIG_PCI_QUIRKS=y | ||
| 260 | CONFIG_COMPAT_BRK=y | ||
| 193 | CONFIG_SLAB=y | 261 | CONFIG_SLAB=y |
| 194 | # CONFIG_SLUB is not set | 262 | # CONFIG_SLUB is not set |
| 195 | # CONFIG_SLOB is not set | 263 | # CONFIG_SLOB is not set |
| 264 | CONFIG_PROFILING=y | ||
| 265 | CONFIG_OPROFILE=m | ||
| 266 | CONFIG_HAVE_OPROFILE=y | ||
| 267 | |||
| 268 | # | ||
| 269 | # GCOV-based kernel profiling | ||
| 270 | # | ||
| 271 | # CONFIG_GCOV_KERNEL is not set | ||
| 272 | CONFIG_SLOW_WORK=y | ||
| 273 | # CONFIG_SLOW_WORK_DEBUG is not set | ||
| 274 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | ||
| 275 | CONFIG_SLABINFO=y | ||
| 196 | CONFIG_RT_MUTEXES=y | 276 | CONFIG_RT_MUTEXES=y |
| 197 | # CONFIG_TINY_SHMEM is not set | ||
| 198 | CONFIG_BASE_SMALL=0 | 277 | CONFIG_BASE_SMALL=0 |
| 199 | CONFIG_MODULES=y | 278 | CONFIG_MODULES=y |
| 279 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
| 200 | CONFIG_MODULE_UNLOAD=y | 280 | CONFIG_MODULE_UNLOAD=y |
| 201 | # CONFIG_MODULE_FORCE_UNLOAD is not set | 281 | # CONFIG_MODULE_FORCE_UNLOAD is not set |
| 202 | CONFIG_MODVERSIONS=y | 282 | CONFIG_MODVERSIONS=y |
| 203 | CONFIG_MODULE_SRCVERSION_ALL=y | 283 | CONFIG_MODULE_SRCVERSION_ALL=y |
| 204 | CONFIG_KMOD=y | ||
| 205 | CONFIG_BLOCK=y | 284 | CONFIG_BLOCK=y |
| 206 | CONFIG_LBD=y | 285 | CONFIG_LBDAF=y |
| 207 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
| 208 | # CONFIG_LSF is not set | ||
| 209 | # CONFIG_BLK_DEV_BSG is not set | 286 | # CONFIG_BLK_DEV_BSG is not set |
| 287 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
| 210 | 288 | ||
| 211 | # | 289 | # |
| 212 | # IO Schedulers | 290 | # IO Schedulers |
| 213 | # | 291 | # |
| 214 | CONFIG_IOSCHED_NOOP=y | 292 | CONFIG_IOSCHED_NOOP=y |
| 215 | CONFIG_IOSCHED_AS=y | ||
| 216 | CONFIG_IOSCHED_DEADLINE=y | 293 | CONFIG_IOSCHED_DEADLINE=y |
| 217 | CONFIG_IOSCHED_CFQ=y | 294 | CONFIG_IOSCHED_CFQ=y |
| 218 | # CONFIG_DEFAULT_AS is not set | ||
| 219 | # CONFIG_DEFAULT_DEADLINE is not set | 295 | # CONFIG_DEFAULT_DEADLINE is not set |
| 220 | CONFIG_DEFAULT_CFQ=y | 296 | CONFIG_DEFAULT_CFQ=y |
| 221 | # CONFIG_DEFAULT_NOOP is not set | 297 | # CONFIG_DEFAULT_NOOP is not set |
| 222 | CONFIG_DEFAULT_IOSCHED="cfq" | 298 | CONFIG_DEFAULT_IOSCHED="cfq" |
| 299 | # CONFIG_INLINE_SPIN_TRYLOCK is not set | ||
| 300 | # CONFIG_INLINE_SPIN_TRYLOCK_BH is not set | ||
| 301 | # CONFIG_INLINE_SPIN_LOCK is not set | ||
| 302 | # CONFIG_INLINE_SPIN_LOCK_BH is not set | ||
| 303 | # CONFIG_INLINE_SPIN_LOCK_IRQ is not set | ||
| 304 | # CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set | ||
| 305 | CONFIG_INLINE_SPIN_UNLOCK=y | ||
| 306 | # CONFIG_INLINE_SPIN_UNLOCK_BH is not set | ||
| 307 | CONFIG_INLINE_SPIN_UNLOCK_IRQ=y | ||
| 308 | # CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set | ||
| 309 | # CONFIG_INLINE_READ_TRYLOCK is not set | ||
| 310 | # CONFIG_INLINE_READ_LOCK is not set | ||
| 311 | # CONFIG_INLINE_READ_LOCK_BH is not set | ||
| 312 | # CONFIG_INLINE_READ_LOCK_IRQ is not set | ||
| 313 | # CONFIG_INLINE_READ_LOCK_IRQSAVE is not set | ||
| 314 | CONFIG_INLINE_READ_UNLOCK=y | ||
| 315 | # CONFIG_INLINE_READ_UNLOCK_BH is not set | ||
| 316 | CONFIG_INLINE_READ_UNLOCK_IRQ=y | ||
| 317 | # CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set | ||
| 318 | # CONFIG_INLINE_WRITE_TRYLOCK is not set | ||
| 319 | # CONFIG_INLINE_WRITE_LOCK is not set | ||
| 320 | # CONFIG_INLINE_WRITE_LOCK_BH is not set | ||
| 321 | # CONFIG_INLINE_WRITE_LOCK_IRQ is not set | ||
| 322 | # CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set | ||
| 323 | CONFIG_INLINE_WRITE_UNLOCK=y | ||
| 324 | # CONFIG_INLINE_WRITE_UNLOCK_BH is not set | ||
| 325 | CONFIG_INLINE_WRITE_UNLOCK_IRQ=y | ||
| 326 | # CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set | ||
| 327 | # CONFIG_MUTEX_SPIN_ON_OWNER is not set | ||
| 328 | CONFIG_FREEZER=y | ||
| 223 | 329 | ||
| 224 | # | 330 | # |
| 225 | # Bus options (PCI, PCMCIA, EISA, ISA, TC) | 331 | # Bus options (PCI, PCMCIA, EISA, ISA, TC) |
| 226 | # | 332 | # |
| 227 | CONFIG_HW_HAS_PCI=y | 333 | CONFIG_HW_HAS_PCI=y |
| 228 | CONFIG_PCI=y | 334 | CONFIG_PCI=y |
| 335 | CONFIG_PCI_DOMAINS=y | ||
| 229 | # CONFIG_ARCH_SUPPORTS_MSI is not set | 336 | # CONFIG_ARCH_SUPPORTS_MSI is not set |
| 337 | # CONFIG_PCI_STUB is not set | ||
| 338 | # CONFIG_PCI_IOV is not set | ||
| 230 | CONFIG_MMU=y | 339 | CONFIG_MMU=y |
| 231 | |||
| 232 | # | ||
| 233 | # PCCARD (PCMCIA/CardBus) support | ||
| 234 | # | ||
| 235 | CONFIG_PCCARD=m | 340 | CONFIG_PCCARD=m |
| 236 | # CONFIG_PCMCIA_DEBUG is not set | ||
| 237 | CONFIG_PCMCIA=m | 341 | CONFIG_PCMCIA=m |
| 238 | CONFIG_PCMCIA_LOAD_CIS=y | 342 | CONFIG_PCMCIA_LOAD_CIS=y |
| 239 | CONFIG_PCMCIA_IOCTL=y | ||
| 240 | CONFIG_CARDBUS=y | 343 | CONFIG_CARDBUS=y |
| 241 | 344 | ||
| 242 | # | 345 | # |
| @@ -251,6 +354,7 @@ CONFIG_YENTA_TOSHIBA=y | |||
| 251 | CONFIG_PD6729=m | 354 | CONFIG_PD6729=m |
| 252 | CONFIG_I82092=m | 355 | CONFIG_I82092=m |
| 253 | # CONFIG_PCMCIA_AU1X00 is not set | 356 | # CONFIG_PCMCIA_AU1X00 is not set |
| 357 | # CONFIG_PCMCIA_ALCHEMY_DEVBOARD is not set | ||
| 254 | CONFIG_PCCARD_NONSTATIC=m | 358 | CONFIG_PCCARD_NONSTATIC=m |
| 255 | # CONFIG_HOTPLUG_PCI is not set | 359 | # CONFIG_HOTPLUG_PCI is not set |
| 256 | 360 | ||
| @@ -258,35 +362,38 @@ CONFIG_PCCARD_NONSTATIC=m | |||
| 258 | # Executable file formats | 362 | # Executable file formats |
| 259 | # | 363 | # |
| 260 | CONFIG_BINFMT_ELF=y | 364 | CONFIG_BINFMT_ELF=y |
| 365 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
| 366 | # CONFIG_HAVE_AOUT is not set | ||
| 261 | CONFIG_BINFMT_MISC=m | 367 | CONFIG_BINFMT_MISC=m |
| 262 | CONFIG_TRAD_SIGNALS=y | 368 | CONFIG_TRAD_SIGNALS=y |
| 263 | 369 | ||
| 264 | # | 370 | # |
| 265 | # Power management options | 371 | # Power management options |
| 266 | # | 372 | # |
| 373 | CONFIG_ARCH_HIBERNATION_POSSIBLE=y | ||
| 374 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | ||
| 267 | CONFIG_PM=y | 375 | CONFIG_PM=y |
| 268 | # CONFIG_PM_LEGACY is not set | ||
| 269 | # CONFIG_PM_DEBUG is not set | 376 | # CONFIG_PM_DEBUG is not set |
| 270 | CONFIG_PM_SLEEP=y | 377 | CONFIG_PM_SLEEP=y |
| 271 | CONFIG_SUSPEND_UP_POSSIBLE=y | ||
| 272 | CONFIG_SUSPEND=y | 378 | CONFIG_SUSPEND=y |
| 379 | CONFIG_SUSPEND_FREEZER=y | ||
| 380 | # CONFIG_HIBERNATION is not set | ||
| 273 | # CONFIG_APM_EMULATION is not set | 381 | # CONFIG_APM_EMULATION is not set |
| 274 | 382 | # CONFIG_PM_RUNTIME is not set | |
| 275 | # | 383 | CONFIG_PM_OPS=y |
| 276 | # Networking | ||
| 277 | # | ||
| 278 | CONFIG_NET=y | 384 | CONFIG_NET=y |
| 279 | 385 | ||
| 280 | # | 386 | # |
| 281 | # Networking options | 387 | # Networking options |
| 282 | # | 388 | # |
| 283 | CONFIG_PACKET=m | 389 | CONFIG_PACKET=m |
| 284 | CONFIG_PACKET_MMAP=y | ||
| 285 | CONFIG_UNIX=y | 390 | CONFIG_UNIX=y |
| 286 | CONFIG_XFRM=y | 391 | CONFIG_XFRM=y |
| 287 | CONFIG_XFRM_USER=m | 392 | CONFIG_XFRM_USER=m |
| 288 | # CONFIG_XFRM_SUB_POLICY is not set | 393 | # CONFIG_XFRM_SUB_POLICY is not set |
| 289 | # CONFIG_XFRM_MIGRATE is not set | 394 | # CONFIG_XFRM_MIGRATE is not set |
| 395 | # CONFIG_XFRM_STATISTICS is not set | ||
| 396 | CONFIG_XFRM_IPCOMP=m | ||
| 290 | CONFIG_NET_KEY=m | 397 | CONFIG_NET_KEY=m |
| 291 | # CONFIG_NET_KEY_MIGRATE is not set | 398 | # CONFIG_NET_KEY_MIGRATE is not set |
| 292 | CONFIG_INET=y | 399 | CONFIG_INET=y |
| @@ -315,42 +422,13 @@ CONFIG_INET_TUNNEL=m | |||
| 315 | CONFIG_INET_XFRM_MODE_TRANSPORT=m | 422 | CONFIG_INET_XFRM_MODE_TRANSPORT=m |
| 316 | CONFIG_INET_XFRM_MODE_TUNNEL=m | 423 | CONFIG_INET_XFRM_MODE_TUNNEL=m |
| 317 | CONFIG_INET_XFRM_MODE_BEET=m | 424 | CONFIG_INET_XFRM_MODE_BEET=m |
| 425 | CONFIG_INET_LRO=y | ||
| 318 | CONFIG_INET_DIAG=y | 426 | CONFIG_INET_DIAG=y |
| 319 | CONFIG_INET_TCP_DIAG=y | 427 | CONFIG_INET_TCP_DIAG=y |
| 320 | # CONFIG_TCP_CONG_ADVANCED is not set | 428 | # CONFIG_TCP_CONG_ADVANCED is not set |
| 321 | CONFIG_TCP_CONG_CUBIC=y | 429 | CONFIG_TCP_CONG_CUBIC=y |
| 322 | CONFIG_DEFAULT_TCP_CONG="cubic" | 430 | CONFIG_DEFAULT_TCP_CONG="cubic" |
| 323 | # CONFIG_TCP_MD5SIG is not set | 431 | # CONFIG_TCP_MD5SIG is not set |
| 324 | CONFIG_IP_VS=m | ||
| 325 | # CONFIG_IP_VS_DEBUG is not set | ||
| 326 | CONFIG_IP_VS_TAB_BITS=12 | ||
| 327 | |||
| 328 | # | ||
| 329 | # IPVS transport protocol load balancing support | ||
| 330 | # | ||
| 331 | CONFIG_IP_VS_PROTO_TCP=y | ||
| 332 | CONFIG_IP_VS_PROTO_UDP=y | ||
| 333 | CONFIG_IP_VS_PROTO_ESP=y | ||
| 334 | CONFIG_IP_VS_PROTO_AH=y | ||
| 335 | |||
| 336 | # | ||
| 337 | # IPVS scheduler | ||
| 338 | # | ||
| 339 | CONFIG_IP_VS_RR=m | ||
| 340 | CONFIG_IP_VS_WRR=m | ||
| 341 | CONFIG_IP_VS_LC=m | ||
| 342 | CONFIG_IP_VS_WLC=m | ||
| 343 | CONFIG_IP_VS_LBLC=m | ||
| 344 | CONFIG_IP_VS_LBLCR=m | ||
| 345 | CONFIG_IP_VS_DH=m | ||
| 346 | CONFIG_IP_VS_SH=m | ||
| 347 | CONFIG_IP_VS_SED=m | ||
| 348 | CONFIG_IP_VS_NQ=m | ||
| 349 | |||
| 350 | # | ||
| 351 | # IPVS application helper | ||
| 352 | # | ||
| 353 | CONFIG_IP_VS_FTP=m | ||
| 354 | CONFIG_IPV6=m | 432 | CONFIG_IPV6=m |
| 355 | CONFIG_IPV6_PRIVACY=y | 433 | CONFIG_IPV6_PRIVACY=y |
| 356 | # CONFIG_IPV6_ROUTER_PREF is not set | 434 | # CONFIG_IPV6_ROUTER_PREF is not set |
| @@ -366,12 +444,15 @@ CONFIG_INET6_XFRM_MODE_TUNNEL=m | |||
| 366 | CONFIG_INET6_XFRM_MODE_BEET=m | 444 | CONFIG_INET6_XFRM_MODE_BEET=m |
| 367 | CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m | 445 | CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m |
| 368 | CONFIG_IPV6_SIT=m | 446 | CONFIG_IPV6_SIT=m |
| 447 | # CONFIG_IPV6_SIT_6RD is not set | ||
| 448 | CONFIG_IPV6_NDISC_NODETYPE=y | ||
| 369 | CONFIG_IPV6_TUNNEL=m | 449 | CONFIG_IPV6_TUNNEL=m |
| 370 | # CONFIG_IPV6_MULTIPLE_TABLES is not set | 450 | # CONFIG_IPV6_MULTIPLE_TABLES is not set |
| 371 | # CONFIG_NETLABEL is not set | 451 | # CONFIG_IPV6_MROUTE is not set |
| 372 | CONFIG_NETWORK_SECMARK=y | 452 | CONFIG_NETWORK_SECMARK=y |
| 373 | CONFIG_NETFILTER=y | 453 | CONFIG_NETFILTER=y |
| 374 | # CONFIG_NETFILTER_DEBUG is not set | 454 | # CONFIG_NETFILTER_DEBUG is not set |
| 455 | CONFIG_NETFILTER_ADVANCED=y | ||
| 375 | CONFIG_BRIDGE_NETFILTER=y | 456 | CONFIG_BRIDGE_NETFILTER=y |
| 376 | 457 | ||
| 377 | # | 458 | # |
| @@ -380,57 +461,97 @@ CONFIG_BRIDGE_NETFILTER=y | |||
| 380 | CONFIG_NETFILTER_NETLINK=m | 461 | CONFIG_NETFILTER_NETLINK=m |
| 381 | CONFIG_NETFILTER_NETLINK_QUEUE=m | 462 | CONFIG_NETFILTER_NETLINK_QUEUE=m |
| 382 | CONFIG_NETFILTER_NETLINK_LOG=m | 463 | CONFIG_NETFILTER_NETLINK_LOG=m |
| 383 | # CONFIG_NF_CONNTRACK_ENABLED is not set | ||
| 384 | # CONFIG_NF_CONNTRACK is not set | 464 | # CONFIG_NF_CONNTRACK is not set |
| 465 | # CONFIG_NETFILTER_TPROXY is not set | ||
| 385 | CONFIG_NETFILTER_XTABLES=m | 466 | CONFIG_NETFILTER_XTABLES=m |
| 386 | CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m | 467 | CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m |
| 387 | CONFIG_NETFILTER_XT_TARGET_DSCP=m | 468 | CONFIG_NETFILTER_XT_TARGET_DSCP=m |
| 469 | CONFIG_NETFILTER_XT_TARGET_HL=m | ||
| 470 | # CONFIG_NETFILTER_XT_TARGET_LED is not set | ||
| 388 | CONFIG_NETFILTER_XT_TARGET_MARK=m | 471 | CONFIG_NETFILTER_XT_TARGET_MARK=m |
| 389 | CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m | ||
| 390 | # CONFIG_NETFILTER_XT_TARGET_NFLOG is not set | 472 | # CONFIG_NETFILTER_XT_TARGET_NFLOG is not set |
| 473 | CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m | ||
| 474 | # CONFIG_NETFILTER_XT_TARGET_RATEEST is not set | ||
| 391 | # CONFIG_NETFILTER_XT_TARGET_TRACE is not set | 475 | # CONFIG_NETFILTER_XT_TARGET_TRACE is not set |
| 392 | CONFIG_NETFILTER_XT_TARGET_SECMARK=m | 476 | CONFIG_NETFILTER_XT_TARGET_SECMARK=m |
| 393 | # CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set | 477 | # CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set |
| 478 | # CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set | ||
| 394 | CONFIG_NETFILTER_XT_MATCH_COMMENT=m | 479 | CONFIG_NETFILTER_XT_MATCH_COMMENT=m |
| 395 | CONFIG_NETFILTER_XT_MATCH_DCCP=m | 480 | CONFIG_NETFILTER_XT_MATCH_DCCP=m |
| 396 | CONFIG_NETFILTER_XT_MATCH_DSCP=m | 481 | CONFIG_NETFILTER_XT_MATCH_DSCP=m |
| 397 | CONFIG_NETFILTER_XT_MATCH_ESP=m | 482 | CONFIG_NETFILTER_XT_MATCH_ESP=m |
| 483 | # CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set | ||
| 484 | CONFIG_NETFILTER_XT_MATCH_HL=m | ||
| 485 | # CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set | ||
| 398 | CONFIG_NETFILTER_XT_MATCH_LENGTH=m | 486 | CONFIG_NETFILTER_XT_MATCH_LENGTH=m |
| 399 | CONFIG_NETFILTER_XT_MATCH_LIMIT=m | 487 | CONFIG_NETFILTER_XT_MATCH_LIMIT=m |
| 400 | CONFIG_NETFILTER_XT_MATCH_MAC=m | 488 | CONFIG_NETFILTER_XT_MATCH_MAC=m |
| 401 | CONFIG_NETFILTER_XT_MATCH_MARK=m | 489 | CONFIG_NETFILTER_XT_MATCH_MARK=m |
| 402 | CONFIG_NETFILTER_XT_MATCH_POLICY=m | ||
| 403 | CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m | 490 | CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m |
| 491 | # CONFIG_NETFILTER_XT_MATCH_OWNER is not set | ||
| 492 | CONFIG_NETFILTER_XT_MATCH_POLICY=m | ||
| 404 | CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m | 493 | CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m |
| 405 | CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m | 494 | CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m |
| 406 | CONFIG_NETFILTER_XT_MATCH_QUOTA=m | 495 | CONFIG_NETFILTER_XT_MATCH_QUOTA=m |
| 496 | # CONFIG_NETFILTER_XT_MATCH_RATEEST is not set | ||
| 407 | CONFIG_NETFILTER_XT_MATCH_REALM=m | 497 | CONFIG_NETFILTER_XT_MATCH_REALM=m |
| 498 | # CONFIG_NETFILTER_XT_MATCH_RECENT is not set | ||
| 408 | CONFIG_NETFILTER_XT_MATCH_SCTP=m | 499 | CONFIG_NETFILTER_XT_MATCH_SCTP=m |
| 409 | CONFIG_NETFILTER_XT_MATCH_STATISTIC=m | 500 | CONFIG_NETFILTER_XT_MATCH_STATISTIC=m |
| 410 | CONFIG_NETFILTER_XT_MATCH_STRING=m | 501 | CONFIG_NETFILTER_XT_MATCH_STRING=m |
| 411 | CONFIG_NETFILTER_XT_MATCH_TCPMSS=m | 502 | CONFIG_NETFILTER_XT_MATCH_TCPMSS=m |
| 503 | # CONFIG_NETFILTER_XT_MATCH_TIME is not set | ||
| 412 | # CONFIG_NETFILTER_XT_MATCH_U32 is not set | 504 | # CONFIG_NETFILTER_XT_MATCH_U32 is not set |
| 413 | # CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set | 505 | # CONFIG_NETFILTER_XT_MATCH_OSF is not set |
| 506 | CONFIG_IP_VS=m | ||
| 507 | # CONFIG_IP_VS_IPV6 is not set | ||
| 508 | # CONFIG_IP_VS_DEBUG is not set | ||
| 509 | CONFIG_IP_VS_TAB_BITS=12 | ||
| 510 | |||
| 511 | # | ||
| 512 | # IPVS transport protocol load balancing support | ||
| 513 | # | ||
| 514 | CONFIG_IP_VS_PROTO_TCP=y | ||
| 515 | CONFIG_IP_VS_PROTO_UDP=y | ||
| 516 | CONFIG_IP_VS_PROTO_AH_ESP=y | ||
| 517 | CONFIG_IP_VS_PROTO_ESP=y | ||
| 518 | CONFIG_IP_VS_PROTO_AH=y | ||
| 519 | # CONFIG_IP_VS_PROTO_SCTP is not set | ||
| 520 | |||
| 521 | # | ||
| 522 | # IPVS scheduler | ||
| 523 | # | ||
| 524 | CONFIG_IP_VS_RR=m | ||
| 525 | CONFIG_IP_VS_WRR=m | ||
| 526 | CONFIG_IP_VS_LC=m | ||
| 527 | CONFIG_IP_VS_WLC=m | ||
| 528 | CONFIG_IP_VS_LBLC=m | ||
| 529 | CONFIG_IP_VS_LBLCR=m | ||
| 530 | CONFIG_IP_VS_DH=m | ||
| 531 | CONFIG_IP_VS_SH=m | ||
| 532 | CONFIG_IP_VS_SED=m | ||
| 533 | CONFIG_IP_VS_NQ=m | ||
| 534 | |||
| 535 | # | ||
| 536 | # IPVS application helper | ||
| 537 | # | ||
| 538 | CONFIG_IP_VS_FTP=m | ||
| 414 | 539 | ||
| 415 | # | 540 | # |
| 416 | # IP: Netfilter Configuration | 541 | # IP: Netfilter Configuration |
| 417 | # | 542 | # |
| 543 | # CONFIG_NF_DEFRAG_IPV4 is not set | ||
| 418 | CONFIG_IP_NF_QUEUE=m | 544 | CONFIG_IP_NF_QUEUE=m |
| 419 | CONFIG_IP_NF_IPTABLES=m | 545 | CONFIG_IP_NF_IPTABLES=m |
| 420 | CONFIG_IP_NF_MATCH_IPRANGE=m | 546 | CONFIG_IP_NF_MATCH_ADDRTYPE=m |
| 421 | CONFIG_IP_NF_MATCH_TOS=m | ||
| 422 | CONFIG_IP_NF_MATCH_RECENT=m | ||
| 423 | CONFIG_IP_NF_MATCH_ECN=m | ||
| 424 | CONFIG_IP_NF_MATCH_AH=m | 547 | CONFIG_IP_NF_MATCH_AH=m |
| 548 | CONFIG_IP_NF_MATCH_ECN=m | ||
| 425 | CONFIG_IP_NF_MATCH_TTL=m | 549 | CONFIG_IP_NF_MATCH_TTL=m |
| 426 | CONFIG_IP_NF_MATCH_OWNER=m | ||
| 427 | CONFIG_IP_NF_MATCH_ADDRTYPE=m | ||
| 428 | CONFIG_IP_NF_FILTER=m | 550 | CONFIG_IP_NF_FILTER=m |
| 429 | CONFIG_IP_NF_TARGET_REJECT=m | 551 | CONFIG_IP_NF_TARGET_REJECT=m |
| 430 | CONFIG_IP_NF_TARGET_LOG=m | 552 | CONFIG_IP_NF_TARGET_LOG=m |
| 431 | CONFIG_IP_NF_TARGET_ULOG=m | 553 | CONFIG_IP_NF_TARGET_ULOG=m |
| 432 | CONFIG_IP_NF_MANGLE=m | 554 | CONFIG_IP_NF_MANGLE=m |
| 433 | CONFIG_IP_NF_TARGET_TOS=m | ||
| 434 | CONFIG_IP_NF_TARGET_ECN=m | 555 | CONFIG_IP_NF_TARGET_ECN=m |
| 435 | CONFIG_IP_NF_TARGET_TTL=m | 556 | CONFIG_IP_NF_TARGET_TTL=m |
| 436 | CONFIG_IP_NF_RAW=m | 557 | CONFIG_IP_NF_RAW=m |
| @@ -439,34 +560,29 @@ CONFIG_IP_NF_ARPFILTER=m | |||
| 439 | CONFIG_IP_NF_ARP_MANGLE=m | 560 | CONFIG_IP_NF_ARP_MANGLE=m |
| 440 | 561 | ||
| 441 | # | 562 | # |
| 442 | # IPv6: Netfilter Configuration (EXPERIMENTAL) | 563 | # IPv6: Netfilter Configuration |
| 443 | # | 564 | # |
| 444 | CONFIG_IP6_NF_QUEUE=m | 565 | CONFIG_IP6_NF_QUEUE=m |
| 445 | CONFIG_IP6_NF_IPTABLES=m | 566 | CONFIG_IP6_NF_IPTABLES=m |
| 446 | CONFIG_IP6_NF_MATCH_RT=m | 567 | CONFIG_IP6_NF_MATCH_AH=m |
| 447 | CONFIG_IP6_NF_MATCH_OPTS=m | 568 | CONFIG_IP6_NF_MATCH_EUI64=m |
| 448 | CONFIG_IP6_NF_MATCH_FRAG=m | 569 | CONFIG_IP6_NF_MATCH_FRAG=m |
| 570 | CONFIG_IP6_NF_MATCH_OPTS=m | ||
| 449 | CONFIG_IP6_NF_MATCH_HL=m | 571 | CONFIG_IP6_NF_MATCH_HL=m |
| 450 | CONFIG_IP6_NF_MATCH_OWNER=m | ||
| 451 | CONFIG_IP6_NF_MATCH_IPV6HEADER=m | 572 | CONFIG_IP6_NF_MATCH_IPV6HEADER=m |
| 452 | CONFIG_IP6_NF_MATCH_AH=m | ||
| 453 | # CONFIG_IP6_NF_MATCH_MH is not set | 573 | # CONFIG_IP6_NF_MATCH_MH is not set |
| 454 | CONFIG_IP6_NF_MATCH_EUI64=m | 574 | CONFIG_IP6_NF_MATCH_RT=m |
| 455 | CONFIG_IP6_NF_FILTER=m | 575 | CONFIG_IP6_NF_TARGET_HL=m |
| 456 | CONFIG_IP6_NF_TARGET_LOG=m | 576 | CONFIG_IP6_NF_TARGET_LOG=m |
| 577 | CONFIG_IP6_NF_FILTER=m | ||
| 457 | CONFIG_IP6_NF_TARGET_REJECT=m | 578 | CONFIG_IP6_NF_TARGET_REJECT=m |
| 458 | CONFIG_IP6_NF_MANGLE=m | 579 | CONFIG_IP6_NF_MANGLE=m |
| 459 | CONFIG_IP6_NF_TARGET_HL=m | ||
| 460 | CONFIG_IP6_NF_RAW=m | 580 | CONFIG_IP6_NF_RAW=m |
| 461 | 581 | ||
| 462 | # | 582 | # |
| 463 | # DECnet: Netfilter Configuration | 583 | # DECnet: Netfilter Configuration |
| 464 | # | 584 | # |
| 465 | CONFIG_DECNET_NF_GRABULATOR=m | 585 | CONFIG_DECNET_NF_GRABULATOR=m |
| 466 | |||
| 467 | # | ||
| 468 | # Bridge: Netfilter Configuration | ||
| 469 | # | ||
| 470 | CONFIG_BRIDGE_NF_EBTABLES=m | 586 | CONFIG_BRIDGE_NF_EBTABLES=m |
| 471 | CONFIG_BRIDGE_EBT_BROUTE=m | 587 | CONFIG_BRIDGE_EBT_BROUTE=m |
| 472 | CONFIG_BRIDGE_EBT_T_FILTER=m | 588 | CONFIG_BRIDGE_EBT_T_FILTER=m |
| @@ -475,6 +591,7 @@ CONFIG_BRIDGE_EBT_802_3=m | |||
| 475 | CONFIG_BRIDGE_EBT_AMONG=m | 591 | CONFIG_BRIDGE_EBT_AMONG=m |
| 476 | CONFIG_BRIDGE_EBT_ARP=m | 592 | CONFIG_BRIDGE_EBT_ARP=m |
| 477 | CONFIG_BRIDGE_EBT_IP=m | 593 | CONFIG_BRIDGE_EBT_IP=m |
| 594 | # CONFIG_BRIDGE_EBT_IP6 is not set | ||
| 478 | CONFIG_BRIDGE_EBT_LIMIT=m | 595 | CONFIG_BRIDGE_EBT_LIMIT=m |
| 479 | CONFIG_BRIDGE_EBT_MARK=m | 596 | CONFIG_BRIDGE_EBT_MARK=m |
| 480 | CONFIG_BRIDGE_EBT_PKTTYPE=m | 597 | CONFIG_BRIDGE_EBT_PKTTYPE=m |
| @@ -487,25 +604,25 @@ CONFIG_BRIDGE_EBT_REDIRECT=m | |||
| 487 | CONFIG_BRIDGE_EBT_SNAT=m | 604 | CONFIG_BRIDGE_EBT_SNAT=m |
| 488 | CONFIG_BRIDGE_EBT_LOG=m | 605 | CONFIG_BRIDGE_EBT_LOG=m |
| 489 | CONFIG_BRIDGE_EBT_ULOG=m | 606 | CONFIG_BRIDGE_EBT_ULOG=m |
| 607 | # CONFIG_BRIDGE_EBT_NFLOG is not set | ||
| 490 | CONFIG_IP_DCCP=m | 608 | CONFIG_IP_DCCP=m |
| 491 | CONFIG_INET_DCCP_DIAG=m | 609 | CONFIG_INET_DCCP_DIAG=m |
| 492 | CONFIG_IP_DCCP_ACKVEC=y | ||
| 493 | 610 | ||
| 494 | # | 611 | # |
| 495 | # DCCP CCIDs Configuration (EXPERIMENTAL) | 612 | # DCCP CCIDs Configuration (EXPERIMENTAL) |
| 496 | # | 613 | # |
| 497 | CONFIG_IP_DCCP_CCID2=m | ||
| 498 | # CONFIG_IP_DCCP_CCID2_DEBUG is not set | 614 | # CONFIG_IP_DCCP_CCID2_DEBUG is not set |
| 499 | CONFIG_IP_DCCP_CCID3=m | 615 | CONFIG_IP_DCCP_CCID3=y |
| 500 | CONFIG_IP_DCCP_TFRC_LIB=m | ||
| 501 | # CONFIG_IP_DCCP_CCID3_DEBUG is not set | 616 | # CONFIG_IP_DCCP_CCID3_DEBUG is not set |
| 502 | CONFIG_IP_DCCP_CCID3_RTO=100 | 617 | CONFIG_IP_DCCP_CCID3_RTO=100 |
| 618 | CONFIG_IP_DCCP_TFRC_LIB=y | ||
| 503 | CONFIG_IP_SCTP=m | 619 | CONFIG_IP_SCTP=m |
| 504 | # CONFIG_SCTP_DBG_MSG is not set | 620 | # CONFIG_SCTP_DBG_MSG is not set |
| 505 | # CONFIG_SCTP_DBG_OBJCNT is not set | 621 | # CONFIG_SCTP_DBG_OBJCNT is not set |
| 506 | # CONFIG_SCTP_HMAC_NONE is not set | 622 | # CONFIG_SCTP_HMAC_NONE is not set |
| 507 | # CONFIG_SCTP_HMAC_SHA1 is not set | 623 | # CONFIG_SCTP_HMAC_SHA1 is not set |
| 508 | CONFIG_SCTP_HMAC_MD5=y | 624 | CONFIG_SCTP_HMAC_MD5=y |
| 625 | # CONFIG_RDS is not set | ||
| 509 | CONFIG_TIPC=m | 626 | CONFIG_TIPC=m |
| 510 | # CONFIG_TIPC_ADVANCED is not set | 627 | # CONFIG_TIPC_ADVANCED is not set |
| 511 | # CONFIG_TIPC_DEBUG is not set | 628 | # CONFIG_TIPC_DEBUG is not set |
| @@ -516,8 +633,12 @@ CONFIG_ATM_LANE=m | |||
| 516 | CONFIG_ATM_MPOA=m | 633 | CONFIG_ATM_MPOA=m |
| 517 | CONFIG_ATM_BR2684=m | 634 | CONFIG_ATM_BR2684=m |
| 518 | # CONFIG_ATM_BR2684_IPFILTER is not set | 635 | # CONFIG_ATM_BR2684_IPFILTER is not set |
| 636 | CONFIG_STP=m | ||
| 519 | CONFIG_BRIDGE=m | 637 | CONFIG_BRIDGE=m |
| 638 | CONFIG_BRIDGE_IGMP_SNOOPING=y | ||
| 639 | # CONFIG_NET_DSA is not set | ||
| 520 | CONFIG_VLAN_8021Q=m | 640 | CONFIG_VLAN_8021Q=m |
| 641 | # CONFIG_VLAN_8021Q_GVRP is not set | ||
| 521 | CONFIG_DECNET=m | 642 | CONFIG_DECNET=m |
| 522 | # CONFIG_DECNET_ROUTER is not set | 643 | # CONFIG_DECNET_ROUTER is not set |
| 523 | CONFIG_LLC=y | 644 | CONFIG_LLC=y |
| @@ -535,12 +656,9 @@ CONFIG_ECONET=m | |||
| 535 | CONFIG_ECONET_AUNUDP=y | 656 | CONFIG_ECONET_AUNUDP=y |
| 536 | CONFIG_ECONET_NATIVE=y | 657 | CONFIG_ECONET_NATIVE=y |
| 537 | CONFIG_WAN_ROUTER=m | 658 | CONFIG_WAN_ROUTER=m |
| 538 | 659 | # CONFIG_PHONET is not set | |
| 539 | # | 660 | # CONFIG_IEEE802154 is not set |
| 540 | # QoS and/or fair queueing | ||
| 541 | # | ||
| 542 | CONFIG_NET_SCHED=y | 661 | CONFIG_NET_SCHED=y |
| 543 | CONFIG_NET_SCH_FIFO=y | ||
| 544 | 662 | ||
| 545 | # | 663 | # |
| 546 | # Queueing/Scheduling | 664 | # Queueing/Scheduling |
| @@ -550,7 +668,7 @@ CONFIG_NET_SCH_HTB=m | |||
| 550 | CONFIG_NET_SCH_HFSC=m | 668 | CONFIG_NET_SCH_HFSC=m |
| 551 | CONFIG_NET_SCH_ATM=m | 669 | CONFIG_NET_SCH_ATM=m |
| 552 | CONFIG_NET_SCH_PRIO=m | 670 | CONFIG_NET_SCH_PRIO=m |
| 553 | # CONFIG_NET_SCH_RR is not set | 671 | # CONFIG_NET_SCH_MULTIQ is not set |
| 554 | CONFIG_NET_SCH_RED=m | 672 | CONFIG_NET_SCH_RED=m |
| 555 | CONFIG_NET_SCH_SFQ=m | 673 | CONFIG_NET_SCH_SFQ=m |
| 556 | CONFIG_NET_SCH_TEQL=m | 674 | CONFIG_NET_SCH_TEQL=m |
| @@ -558,6 +676,7 @@ CONFIG_NET_SCH_TBF=m | |||
| 558 | CONFIG_NET_SCH_GRED=m | 676 | CONFIG_NET_SCH_GRED=m |
| 559 | CONFIG_NET_SCH_DSMARK=m | 677 | CONFIG_NET_SCH_DSMARK=m |
| 560 | CONFIG_NET_SCH_NETEM=m | 678 | CONFIG_NET_SCH_NETEM=m |
| 679 | # CONFIG_NET_SCH_DRR is not set | ||
| 561 | CONFIG_NET_SCH_INGRESS=m | 680 | CONFIG_NET_SCH_INGRESS=m |
| 562 | 681 | ||
| 563 | # | 682 | # |
| @@ -574,6 +693,7 @@ CONFIG_NET_CLS_U32=m | |||
| 574 | CONFIG_CLS_U32_MARK=y | 693 | CONFIG_CLS_U32_MARK=y |
| 575 | CONFIG_NET_CLS_RSVP=m | 694 | CONFIG_NET_CLS_RSVP=m |
| 576 | CONFIG_NET_CLS_RSVP6=m | 695 | CONFIG_NET_CLS_RSVP6=m |
| 696 | # CONFIG_NET_CLS_FLOW is not set | ||
| 577 | CONFIG_NET_EMATCH=y | 697 | CONFIG_NET_EMATCH=y |
| 578 | CONFIG_NET_EMATCH_STACK=32 | 698 | CONFIG_NET_EMATCH_STACK=32 |
| 579 | CONFIG_NET_EMATCH_CMP=m | 699 | CONFIG_NET_EMATCH_CMP=m |
| @@ -586,10 +706,13 @@ CONFIG_NET_ACT_POLICE=y | |||
| 586 | # CONFIG_NET_ACT_GACT is not set | 706 | # CONFIG_NET_ACT_GACT is not set |
| 587 | # CONFIG_NET_ACT_MIRRED is not set | 707 | # CONFIG_NET_ACT_MIRRED is not set |
| 588 | # CONFIG_NET_ACT_IPT is not set | 708 | # CONFIG_NET_ACT_IPT is not set |
| 709 | # CONFIG_NET_ACT_NAT is not set | ||
| 589 | # CONFIG_NET_ACT_PEDIT is not set | 710 | # CONFIG_NET_ACT_PEDIT is not set |
| 590 | # CONFIG_NET_ACT_SIMP is not set | 711 | # CONFIG_NET_ACT_SIMP is not set |
| 591 | CONFIG_NET_CLS_POLICE=y | 712 | # CONFIG_NET_ACT_SKBEDIT is not set |
| 592 | # CONFIG_NET_CLS_IND is not set | 713 | # CONFIG_NET_CLS_IND is not set |
| 714 | CONFIG_NET_SCH_FIFO=y | ||
| 715 | # CONFIG_DCB is not set | ||
| 593 | 716 | ||
| 594 | # | 717 | # |
| 595 | # Network testing | 718 | # Network testing |
| @@ -613,9 +736,8 @@ CONFIG_6PACK=m | |||
| 613 | CONFIG_BPQETHER=m | 736 | CONFIG_BPQETHER=m |
| 614 | CONFIG_BAYCOM_SER_FDX=m | 737 | CONFIG_BAYCOM_SER_FDX=m |
| 615 | CONFIG_BAYCOM_SER_HDX=m | 738 | CONFIG_BAYCOM_SER_HDX=m |
| 616 | CONFIG_BAYCOM_PAR=m | ||
| 617 | CONFIG_BAYCOM_EPP=m | ||
| 618 | CONFIG_YAM=m | 739 | CONFIG_YAM=m |
| 740 | # CONFIG_CAN is not set | ||
| 619 | CONFIG_IRDA=m | 741 | CONFIG_IRDA=m |
| 620 | 742 | ||
| 621 | # | 743 | # |
| @@ -657,15 +779,8 @@ CONFIG_MCP2120_DONGLE=m | |||
| 657 | CONFIG_OLD_BELKIN_DONGLE=m | 779 | CONFIG_OLD_BELKIN_DONGLE=m |
| 658 | CONFIG_ACT200L_DONGLE=m | 780 | CONFIG_ACT200L_DONGLE=m |
| 659 | # CONFIG_KINGSUN_DONGLE is not set | 781 | # CONFIG_KINGSUN_DONGLE is not set |
| 660 | 782 | # CONFIG_KSDAZZLE_DONGLE is not set | |
| 661 | # | 783 | # CONFIG_KS959_DONGLE is not set |
| 662 | # Old SIR device drivers | ||
| 663 | # | ||
| 664 | # CONFIG_IRPORT_SIR is not set | ||
| 665 | |||
| 666 | # | ||
| 667 | # Old Serial dongle support | ||
| 668 | # | ||
| 669 | 784 | ||
| 670 | # | 785 | # |
| 671 | # FIR device drivers | 786 | # FIR device drivers |
| @@ -683,17 +798,17 @@ CONFIG_BT_RFCOMM_TTY=y | |||
| 683 | CONFIG_BT_BNEP=m | 798 | CONFIG_BT_BNEP=m |
| 684 | CONFIG_BT_BNEP_MC_FILTER=y | 799 | CONFIG_BT_BNEP_MC_FILTER=y |
| 685 | CONFIG_BT_BNEP_PROTO_FILTER=y | 800 | CONFIG_BT_BNEP_PROTO_FILTER=y |
| 686 | CONFIG_BT_CMTP=m | ||
| 687 | CONFIG_BT_HIDP=m | 801 | CONFIG_BT_HIDP=m |
| 688 | 802 | ||
| 689 | # | 803 | # |
| 690 | # Bluetooth device drivers | 804 | # Bluetooth device drivers |
| 691 | # | 805 | # |
| 692 | CONFIG_BT_HCIUSB=m | 806 | # CONFIG_BT_HCIBTUSB is not set |
| 693 | CONFIG_BT_HCIUSB_SCO=y | 807 | # CONFIG_BT_HCIBTSDIO is not set |
| 694 | CONFIG_BT_HCIUART=m | 808 | CONFIG_BT_HCIUART=m |
| 695 | CONFIG_BT_HCIUART_H4=y | 809 | CONFIG_BT_HCIUART_H4=y |
| 696 | CONFIG_BT_HCIUART_BCSP=y | 810 | CONFIG_BT_HCIUART_BCSP=y |
| 811 | # CONFIG_BT_HCIUART_LL is not set | ||
| 697 | CONFIG_BT_HCIBCM203X=m | 812 | CONFIG_BT_HCIBCM203X=m |
| 698 | CONFIG_BT_HCIBPA10X=m | 813 | CONFIG_BT_HCIBPA10X=m |
| 699 | CONFIG_BT_HCIBFUSB=m | 814 | CONFIG_BT_HCIBFUSB=m |
| @@ -702,24 +817,19 @@ CONFIG_BT_HCIBT3C=m | |||
| 702 | CONFIG_BT_HCIBLUECARD=m | 817 | CONFIG_BT_HCIBLUECARD=m |
| 703 | CONFIG_BT_HCIBTUART=m | 818 | CONFIG_BT_HCIBTUART=m |
| 704 | CONFIG_BT_HCIVHCI=m | 819 | CONFIG_BT_HCIVHCI=m |
| 820 | # CONFIG_BT_MRVL is not set | ||
| 705 | CONFIG_AF_RXRPC=m | 821 | CONFIG_AF_RXRPC=m |
| 706 | # CONFIG_AF_RXRPC_DEBUG is not set | 822 | # CONFIG_AF_RXRPC_DEBUG is not set |
| 707 | # CONFIG_RXKAD is not set | 823 | # CONFIG_RXKAD is not set |
| 708 | CONFIG_FIB_RULES=y | 824 | CONFIG_FIB_RULES=y |
| 825 | CONFIG_WIRELESS=y | ||
| 826 | # CONFIG_CFG80211 is not set | ||
| 827 | # CONFIG_LIB80211 is not set | ||
| 709 | 828 | ||
| 710 | # | 829 | # |
| 711 | # Wireless | 830 | # CFG80211 needs to be enabled for MAC80211 |
| 712 | # | 831 | # |
| 713 | # CONFIG_CFG80211 is not set | 832 | # CONFIG_WIMAX is not set |
| 714 | CONFIG_WIRELESS_EXT=y | ||
| 715 | # CONFIG_MAC80211 is not set | ||
| 716 | CONFIG_IEEE80211=m | ||
| 717 | # CONFIG_IEEE80211_DEBUG is not set | ||
| 718 | CONFIG_IEEE80211_CRYPT_WEP=m | ||
| 719 | CONFIG_IEEE80211_CRYPT_CCMP=m | ||
| 720 | CONFIG_IEEE80211_CRYPT_TKIP=m | ||
| 721 | CONFIG_IEEE80211_SOFTMAC=m | ||
| 722 | # CONFIG_IEEE80211_SOFTMAC_DEBUG is not set | ||
| 723 | # CONFIG_RFKILL is not set | 833 | # CONFIG_RFKILL is not set |
| 724 | # CONFIG_NET_9P is not set | 834 | # CONFIG_NET_9P is not set |
| 725 | 835 | ||
| @@ -730,40 +840,43 @@ CONFIG_IEEE80211_SOFTMAC=m | |||
| 730 | # | 840 | # |
| 731 | # Generic Driver Options | 841 | # Generic Driver Options |
| 732 | # | 842 | # |
| 843 | CONFIG_UEVENT_HELPER_PATH="" | ||
| 844 | # CONFIG_DEVTMPFS is not set | ||
| 733 | CONFIG_STANDALONE=y | 845 | CONFIG_STANDALONE=y |
| 734 | CONFIG_PREVENT_FIRMWARE_BUILD=y | 846 | CONFIG_PREVENT_FIRMWARE_BUILD=y |
| 735 | CONFIG_FW_LOADER=y | 847 | CONFIG_FW_LOADER=y |
| 848 | CONFIG_FIRMWARE_IN_KERNEL=y | ||
| 849 | CONFIG_EXTRA_FIRMWARE="" | ||
| 736 | # CONFIG_SYS_HYPERVISOR is not set | 850 | # CONFIG_SYS_HYPERVISOR is not set |
| 737 | CONFIG_CONNECTOR=m | 851 | CONFIG_CONNECTOR=m |
| 738 | CONFIG_MTD=m | 852 | CONFIG_MTD=y |
| 739 | # CONFIG_MTD_DEBUG is not set | 853 | # CONFIG_MTD_DEBUG is not set |
| 740 | CONFIG_MTD_CONCAT=m | 854 | # CONFIG_MTD_TESTS is not set |
| 855 | # CONFIG_MTD_CONCAT is not set | ||
| 741 | CONFIG_MTD_PARTITIONS=y | 856 | CONFIG_MTD_PARTITIONS=y |
| 742 | CONFIG_MTD_REDBOOT_PARTS=m | 857 | # CONFIG_MTD_REDBOOT_PARTS is not set |
| 743 | CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 | 858 | # CONFIG_MTD_CMDLINE_PARTS is not set |
| 744 | # CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set | 859 | # CONFIG_MTD_AR7_PARTS is not set |
| 745 | # CONFIG_MTD_REDBOOT_PARTS_READONLY is not set | ||
| 746 | 860 | ||
| 747 | # | 861 | # |
| 748 | # User Modules And Translation Layers | 862 | # User Modules And Translation Layers |
| 749 | # | 863 | # |
| 750 | CONFIG_MTD_CHAR=m | 864 | CONFIG_MTD_CHAR=y |
| 751 | CONFIG_MTD_BLKDEVS=m | 865 | CONFIG_MTD_BLKDEVS=y |
| 752 | CONFIG_MTD_BLOCK=m | 866 | CONFIG_MTD_BLOCK=y |
| 753 | CONFIG_MTD_BLOCK_RO=m | 867 | # CONFIG_FTL is not set |
| 754 | CONFIG_FTL=m | 868 | # CONFIG_NFTL is not set |
| 755 | CONFIG_NFTL=m | 869 | # CONFIG_INFTL is not set |
| 756 | CONFIG_NFTL_RW=y | 870 | # CONFIG_RFD_FTL is not set |
| 757 | CONFIG_INFTL=m | 871 | # CONFIG_SSFDC is not set |
| 758 | CONFIG_RFD_FTL=m | 872 | # CONFIG_MTD_OOPS is not set |
| 759 | CONFIG_SSFDC=m | ||
| 760 | 873 | ||
| 761 | # | 874 | # |
| 762 | # RAM/ROM/Flash chip drivers | 875 | # RAM/ROM/Flash chip drivers |
| 763 | # | 876 | # |
| 764 | CONFIG_MTD_CFI=m | 877 | CONFIG_MTD_CFI=y |
| 765 | CONFIG_MTD_JEDECPROBE=m | 878 | # CONFIG_MTD_JEDECPROBE is not set |
| 766 | CONFIG_MTD_GEN_PROBE=m | 879 | CONFIG_MTD_GEN_PROBE=y |
| 767 | # CONFIG_MTD_CFI_ADV_OPTIONS is not set | 880 | # CONFIG_MTD_CFI_ADV_OPTIONS is not set |
| 768 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | 881 | CONFIG_MTD_MAP_BANK_WIDTH_1=y |
| 769 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | 882 | CONFIG_MTD_MAP_BANK_WIDTH_2=y |
| @@ -775,206 +888,81 @@ CONFIG_MTD_CFI_I1=y | |||
| 775 | CONFIG_MTD_CFI_I2=y | 888 | CONFIG_MTD_CFI_I2=y |
| 776 | # CONFIG_MTD_CFI_I4 is not set | 889 | # CONFIG_MTD_CFI_I4 is not set |
| 777 | # CONFIG_MTD_CFI_I8 is not set | 890 | # CONFIG_MTD_CFI_I8 is not set |
| 778 | CONFIG_MTD_CFI_INTELEXT=m | 891 | CONFIG_MTD_CFI_INTELEXT=y |
| 779 | CONFIG_MTD_CFI_AMDSTD=m | 892 | CONFIG_MTD_CFI_AMDSTD=y |
| 780 | CONFIG_MTD_CFI_STAA=m | 893 | # CONFIG_MTD_CFI_STAA is not set |
| 781 | CONFIG_MTD_CFI_UTIL=m | 894 | CONFIG_MTD_CFI_UTIL=y |
| 782 | CONFIG_MTD_RAM=m | 895 | CONFIG_MTD_RAM=m |
| 783 | CONFIG_MTD_ROM=m | 896 | # CONFIG_MTD_ROM is not set |
| 784 | CONFIG_MTD_ABSENT=m | 897 | # CONFIG_MTD_ABSENT is not set |
| 785 | 898 | ||
| 786 | # | 899 | # |
| 787 | # Mapping drivers for chip access | 900 | # Mapping drivers for chip access |
| 788 | # | 901 | # |
| 789 | CONFIG_MTD_COMPLEX_MAPPINGS=y | 902 | CONFIG_MTD_COMPLEX_MAPPINGS=y |
| 790 | CONFIG_MTD_PHYSMAP=m | 903 | CONFIG_MTD_PHYSMAP=y |
| 791 | CONFIG_MTD_PHYSMAP_START=0x8000000 | 904 | # CONFIG_MTD_PHYSMAP_COMPAT is not set |
| 792 | CONFIG_MTD_PHYSMAP_LEN=0x4000000 | 905 | # CONFIG_MTD_PCI is not set |
| 793 | CONFIG_MTD_PHYSMAP_BANKWIDTH=2 | 906 | # CONFIG_MTD_GPIO_ADDR is not set |
| 794 | # CONFIG_MTD_ALCHEMY is not set | 907 | # CONFIG_MTD_INTEL_VR_NOR is not set |
| 795 | # CONFIG_MTD_MTX1 is not set | 908 | # CONFIG_MTD_PLATRAM is not set |
| 796 | CONFIG_MTD_PCI=m | ||
| 797 | CONFIG_MTD_PLATRAM=m | ||
| 798 | 909 | ||
| 799 | # | 910 | # |
| 800 | # Self-contained MTD device drivers | 911 | # Self-contained MTD device drivers |
| 801 | # | 912 | # |
| 802 | CONFIG_MTD_PMC551=m | 913 | # CONFIG_MTD_PMC551 is not set |
| 803 | # CONFIG_MTD_PMC551_BUGFIX is not set | 914 | # CONFIG_MTD_SLRAM is not set |
| 804 | # CONFIG_MTD_PMC551_DEBUG is not set | 915 | # CONFIG_MTD_PHRAM is not set |
| 805 | CONFIG_MTD_DATAFLASH=m | 916 | # CONFIG_MTD_MTDRAM is not set |
| 806 | CONFIG_MTD_M25P80=m | 917 | # CONFIG_MTD_BLOCK2MTD is not set |
| 807 | CONFIG_MTD_SLRAM=m | ||
| 808 | CONFIG_MTD_PHRAM=m | ||
| 809 | CONFIG_MTD_MTDRAM=m | ||
| 810 | CONFIG_MTDRAM_TOTAL_SIZE=4096 | ||
| 811 | CONFIG_MTDRAM_ERASE_SIZE=128 | ||
| 812 | CONFIG_MTD_BLOCK2MTD=m | ||
| 813 | 918 | ||
| 814 | # | 919 | # |
| 815 | # Disk-On-Chip Device Drivers | 920 | # Disk-On-Chip Device Drivers |
| 816 | # | 921 | # |
| 817 | CONFIG_MTD_DOC2000=m | 922 | # CONFIG_MTD_DOC2000 is not set |
| 818 | CONFIG_MTD_DOC2001=m | 923 | # CONFIG_MTD_DOC2001 is not set |
| 819 | CONFIG_MTD_DOC2001PLUS=m | 924 | # CONFIG_MTD_DOC2001PLUS is not set |
| 820 | CONFIG_MTD_DOCPROBE=m | 925 | # CONFIG_MTD_NAND is not set |
| 821 | CONFIG_MTD_DOCECC=m | 926 | # CONFIG_MTD_ONENAND is not set |
| 822 | # CONFIG_MTD_DOCPROBE_ADVANCED is not set | 927 | |
| 823 | CONFIG_MTD_DOCPROBE_ADDRESS=0 | 928 | # |
| 824 | CONFIG_MTD_NAND=m | 929 | # LPDDR flash memory drivers |
| 825 | # CONFIG_MTD_NAND_VERIFY_WRITE is not set | 930 | # |
| 826 | # CONFIG_MTD_NAND_ECC_SMC is not set | 931 | # CONFIG_MTD_LPDDR is not set |
| 827 | # CONFIG_MTD_NAND_MUSEUM_IDS is not set | ||
| 828 | CONFIG_MTD_NAND_IDS=m | ||
| 829 | CONFIG_MTD_NAND_DISKONCHIP=m | ||
| 830 | # CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED is not set | ||
| 831 | CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS=0 | ||
| 832 | # CONFIG_MTD_NAND_DISKONCHIP_BBTWRITE is not set | ||
| 833 | # CONFIG_MTD_NAND_CAFE is not set | ||
| 834 | CONFIG_MTD_NAND_NANDSIM=m | ||
| 835 | # CONFIG_MTD_NAND_PLATFORM is not set | ||
| 836 | CONFIG_MTD_ONENAND=m | ||
| 837 | CONFIG_MTD_ONENAND_VERIFY_WRITE=y | ||
| 838 | # CONFIG_MTD_ONENAND_OTP is not set | ||
| 839 | 932 | ||
| 840 | # | 933 | # |
| 841 | # UBI - Unsorted block images | 934 | # UBI - Unsorted block images |
| 842 | # | 935 | # |
| 843 | # CONFIG_MTD_UBI is not set | 936 | # CONFIG_MTD_UBI is not set |
| 844 | CONFIG_PARPORT=m | 937 | # CONFIG_PARPORT is not set |
| 845 | CONFIG_PARPORT_PC=m | ||
| 846 | CONFIG_PARPORT_SERIAL=m | ||
| 847 | CONFIG_PARPORT_PC_FIFO=y | ||
| 848 | CONFIG_PARPORT_PC_SUPERIO=y | ||
| 849 | CONFIG_PARPORT_PC_PCMCIA=m | ||
| 850 | # CONFIG_PARPORT_GSC is not set | ||
| 851 | CONFIG_PARPORT_AX88796=m | ||
| 852 | CONFIG_PARPORT_1284=y | ||
| 853 | CONFIG_PARPORT_NOT_PC=y | ||
| 854 | CONFIG_BLK_DEV=y | 938 | CONFIG_BLK_DEV=y |
| 855 | CONFIG_PARIDE=m | 939 | # CONFIG_BLK_CPQ_DA is not set |
| 856 | 940 | # CONFIG_BLK_CPQ_CISS_DA is not set | |
| 857 | # | 941 | # CONFIG_BLK_DEV_DAC960 is not set |
| 858 | # Parallel IDE high-level drivers | 942 | # CONFIG_BLK_DEV_UMEM is not set |
| 859 | # | ||
| 860 | CONFIG_PARIDE_PD=m | ||
| 861 | CONFIG_PARIDE_PCD=m | ||
| 862 | CONFIG_PARIDE_PF=m | ||
| 863 | CONFIG_PARIDE_PT=m | ||
| 864 | CONFIG_PARIDE_PG=m | ||
| 865 | |||
| 866 | # | ||
| 867 | # Parallel IDE protocol modules | ||
| 868 | # | ||
| 869 | CONFIG_PARIDE_ATEN=m | ||
| 870 | CONFIG_PARIDE_BPCK=m | ||
| 871 | CONFIG_PARIDE_BPCK6=m | ||
| 872 | CONFIG_PARIDE_COMM=m | ||
| 873 | CONFIG_PARIDE_DSTR=m | ||
| 874 | CONFIG_PARIDE_FIT2=m | ||
| 875 | CONFIG_PARIDE_FIT3=m | ||
| 876 | CONFIG_PARIDE_EPAT=m | ||
| 877 | CONFIG_PARIDE_EPATC8=y | ||
| 878 | CONFIG_PARIDE_EPIA=m | ||
| 879 | CONFIG_PARIDE_FRIQ=m | ||
| 880 | CONFIG_PARIDE_FRPW=m | ||
| 881 | CONFIG_PARIDE_KBIC=m | ||
| 882 | CONFIG_PARIDE_KTTI=m | ||
| 883 | CONFIG_PARIDE_ON20=m | ||
| 884 | CONFIG_PARIDE_ON26=m | ||
| 885 | CONFIG_BLK_CPQ_DA=m | ||
| 886 | CONFIG_BLK_CPQ_CISS_DA=m | ||
| 887 | CONFIG_CISS_SCSI_TAPE=y | ||
| 888 | CONFIG_BLK_DEV_DAC960=m | ||
| 889 | CONFIG_BLK_DEV_UMEM=m | ||
| 890 | # CONFIG_BLK_DEV_COW_COMMON is not set | 943 | # CONFIG_BLK_DEV_COW_COMMON is not set |
| 891 | CONFIG_BLK_DEV_LOOP=m | 944 | # CONFIG_BLK_DEV_LOOP is not set |
| 892 | CONFIG_BLK_DEV_CRYPTOLOOP=m | 945 | # CONFIG_BLK_DEV_DRBD is not set |
| 893 | CONFIG_BLK_DEV_NBD=m | 946 | CONFIG_BLK_DEV_NBD=m |
| 894 | CONFIG_BLK_DEV_SX8=m | 947 | # CONFIG_BLK_DEV_SX8 is not set |
| 895 | # CONFIG_BLK_DEV_UB is not set | 948 | # CONFIG_BLK_DEV_UB is not set |
| 896 | CONFIG_BLK_DEV_RAM=y | 949 | CONFIG_BLK_DEV_RAM=y |
| 897 | CONFIG_BLK_DEV_RAM_COUNT=16 | 950 | CONFIG_BLK_DEV_RAM_COUNT=16 |
| 898 | CONFIG_BLK_DEV_RAM_SIZE=65536 | 951 | CONFIG_BLK_DEV_RAM_SIZE=65536 |
| 899 | CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 | 952 | # CONFIG_BLK_DEV_XIP is not set |
| 900 | CONFIG_CDROM_PKTCDVD=m | 953 | # CONFIG_CDROM_PKTCDVD is not set |
| 901 | CONFIG_CDROM_PKTCDVD_BUFFERS=8 | 954 | # CONFIG_ATA_OVER_ETH is not set |
| 902 | # CONFIG_CDROM_PKTCDVD_WCACHE is not set | ||
| 903 | CONFIG_ATA_OVER_ETH=m | ||
| 904 | CONFIG_MISC_DEVICES=y | ||
| 905 | # CONFIG_PHANTOM is not set | ||
| 906 | # CONFIG_EEPROM_93CX6 is not set | ||
| 907 | CONFIG_SGI_IOC4=m | ||
| 908 | CONFIG_TIFM_CORE=m | ||
| 909 | CONFIG_TIFM_7XX1=m | ||
| 910 | CONFIG_IDE=y | ||
| 911 | CONFIG_IDE_MAX_HWIFS=4 | ||
| 912 | CONFIG_BLK_DEV_IDE=y | ||
| 913 | |||
| 914 | # | ||
| 915 | # Please see Documentation/ide.txt for help/info on IDE drives | ||
| 916 | # | ||
| 917 | # CONFIG_BLK_DEV_IDE_SATA is not set | ||
| 918 | CONFIG_BLK_DEV_IDEDISK=m | ||
| 919 | # CONFIG_IDEDISK_MULTI_MODE is not set | ||
| 920 | CONFIG_BLK_DEV_IDECS=m | ||
| 921 | # CONFIG_BLK_DEV_DELKIN is not set | ||
| 922 | CONFIG_BLK_DEV_IDECD=m | ||
| 923 | CONFIG_BLK_DEV_IDETAPE=m | ||
| 924 | CONFIG_BLK_DEV_IDEFLOPPY=m | ||
| 925 | CONFIG_BLK_DEV_IDESCSI=m | ||
| 926 | # CONFIG_IDE_TASK_IOCTL is not set | ||
| 927 | CONFIG_IDE_PROC_FS=y | ||
| 928 | |||
| 929 | # | ||
| 930 | # IDE chipset support/bugfixes | ||
| 931 | # | ||
| 932 | CONFIG_IDE_GENERIC=m | ||
| 933 | CONFIG_BLK_DEV_IDEPCI=y | ||
| 934 | CONFIG_IDEPCI_SHARE_IRQ=y | ||
| 935 | CONFIG_IDEPCI_PCIBUS_ORDER=y | ||
| 936 | # CONFIG_BLK_DEV_OFFBOARD is not set | ||
| 937 | CONFIG_BLK_DEV_GENERIC=m | ||
| 938 | CONFIG_BLK_DEV_OPTI621=m | ||
| 939 | CONFIG_BLK_DEV_IDEDMA_PCI=y | ||
| 940 | # CONFIG_BLK_DEV_IDEDMA_FORCED is not set | ||
| 941 | # CONFIG_IDEDMA_ONLYDISK is not set | ||
| 942 | CONFIG_BLK_DEV_AEC62XX=m | ||
| 943 | CONFIG_BLK_DEV_ALI15X3=m | ||
| 944 | # CONFIG_WDC_ALI15X3 is not set | ||
| 945 | CONFIG_BLK_DEV_AMD74XX=m | ||
| 946 | CONFIG_BLK_DEV_CMD64X=m | ||
| 947 | CONFIG_BLK_DEV_TRIFLEX=m | ||
| 948 | CONFIG_BLK_DEV_CY82C693=m | ||
| 949 | # CONFIG_BLK_DEV_CS5520 is not set | ||
| 950 | CONFIG_BLK_DEV_CS5530=m | ||
| 951 | CONFIG_BLK_DEV_HPT34X=m | ||
| 952 | # CONFIG_HPT34X_AUTODMA is not set | ||
| 953 | CONFIG_BLK_DEV_HPT366=m | ||
| 954 | # CONFIG_BLK_DEV_JMICRON is not set | ||
| 955 | CONFIG_BLK_DEV_SC1200=m | ||
| 956 | CONFIG_BLK_DEV_PIIX=m | ||
| 957 | # CONFIG_BLK_DEV_IT8213 is not set | ||
| 958 | CONFIG_BLK_DEV_IT821X=m | ||
| 959 | CONFIG_BLK_DEV_NS87415=m | ||
| 960 | CONFIG_BLK_DEV_PDC202XX_OLD=m | ||
| 961 | CONFIG_PDC202XX_BURST=y | ||
| 962 | CONFIG_BLK_DEV_PDC202XX_NEW=m | ||
| 963 | CONFIG_BLK_DEV_SVWKS=m | ||
| 964 | CONFIG_BLK_DEV_SIIMAGE=m | ||
| 965 | # CONFIG_BLK_DEV_SLC90E66 is not set | ||
| 966 | CONFIG_BLK_DEV_TRM290=m | ||
| 967 | # CONFIG_BLK_DEV_VIA82CXXX is not set | ||
| 968 | # CONFIG_BLK_DEV_TC86C001 is not set | ||
| 969 | # CONFIG_IDE_ARM is not set | ||
| 970 | CONFIG_BLK_DEV_IDEDMA=y | ||
| 971 | # CONFIG_IDEDMA_IVB is not set | ||
| 972 | # CONFIG_BLK_DEV_HD is not set | 955 | # CONFIG_BLK_DEV_HD is not set |
| 956 | # CONFIG_MISC_DEVICES is not set | ||
| 957 | CONFIG_TIFM_CORE=m | ||
| 958 | CONFIG_HAVE_IDE=y | ||
| 959 | # CONFIG_IDE is not set | ||
| 973 | 960 | ||
| 974 | # | 961 | # |
| 975 | # SCSI device support | 962 | # SCSI device support |
| 976 | # | 963 | # |
| 977 | CONFIG_RAID_ATTRS=m | 964 | CONFIG_SCSI_MOD=m |
| 965 | # CONFIG_RAID_ATTRS is not set | ||
| 978 | CONFIG_SCSI=m | 966 | CONFIG_SCSI=m |
| 979 | CONFIG_SCSI_DMA=y | 967 | CONFIG_SCSI_DMA=y |
| 980 | # CONFIG_SCSI_TGT is not set | 968 | # CONFIG_SCSI_TGT is not set |
| @@ -985,18 +973,13 @@ CONFIG_SCSI_PROC_FS=y | |||
| 985 | # SCSI support type (disk, tape, CD-ROM) | 973 | # SCSI support type (disk, tape, CD-ROM) |
| 986 | # | 974 | # |
| 987 | CONFIG_BLK_DEV_SD=m | 975 | CONFIG_BLK_DEV_SD=m |
| 988 | CONFIG_CHR_DEV_ST=m | 976 | # CONFIG_CHR_DEV_ST is not set |
| 989 | CONFIG_CHR_DEV_OSST=m | 977 | # CONFIG_CHR_DEV_OSST is not set |
| 990 | CONFIG_BLK_DEV_SR=m | 978 | # CONFIG_BLK_DEV_SR is not set |
| 991 | # CONFIG_BLK_DEV_SR_VENDOR is not set | ||
| 992 | CONFIG_CHR_DEV_SG=m | 979 | CONFIG_CHR_DEV_SG=m |
| 993 | CONFIG_CHR_DEV_SCH=m | 980 | # CONFIG_CHR_DEV_SCH is not set |
| 994 | |||
| 995 | # | ||
| 996 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs | ||
| 997 | # | ||
| 998 | CONFIG_SCSI_MULTI_LUN=y | 981 | CONFIG_SCSI_MULTI_LUN=y |
| 999 | CONFIG_SCSI_CONSTANTS=y | 982 | # CONFIG_SCSI_CONSTANTS is not set |
| 1000 | CONFIG_SCSI_LOGGING=y | 983 | CONFIG_SCSI_LOGGING=y |
| 1001 | # CONFIG_SCSI_SCAN_ASYNC is not set | 984 | # CONFIG_SCSI_SCAN_ASYNC is not set |
| 1002 | CONFIG_SCSI_WAIT_SCAN=m | 985 | CONFIG_SCSI_WAIT_SCAN=m |
| @@ -1009,198 +992,39 @@ CONFIG_SCSI_FC_ATTRS=m | |||
| 1009 | CONFIG_SCSI_ISCSI_ATTRS=m | 992 | CONFIG_SCSI_ISCSI_ATTRS=m |
| 1010 | CONFIG_SCSI_SAS_ATTRS=m | 993 | CONFIG_SCSI_SAS_ATTRS=m |
| 1011 | CONFIG_SCSI_SAS_LIBSAS=m | 994 | CONFIG_SCSI_SAS_LIBSAS=m |
| 1012 | # CONFIG_SCSI_SAS_ATA is not set | 995 | CONFIG_SCSI_SAS_HOST_SMP=y |
| 1013 | # CONFIG_SCSI_SAS_LIBSAS_DEBUG is not set | 996 | # CONFIG_SCSI_SAS_LIBSAS_DEBUG is not set |
| 1014 | CONFIG_SCSI_LOWLEVEL=y | 997 | # CONFIG_SCSI_SRP_ATTRS is not set |
| 1015 | CONFIG_ISCSI_TCP=m | 998 | # CONFIG_SCSI_LOWLEVEL is not set |
| 1016 | CONFIG_BLK_DEV_3W_XXXX_RAID=m | ||
| 1017 | CONFIG_SCSI_3W_9XXX=m | ||
| 1018 | CONFIG_SCSI_ACARD=m | ||
| 1019 | CONFIG_SCSI_AACRAID=m | ||
| 1020 | CONFIG_SCSI_AIC7XXX=m | ||
| 1021 | CONFIG_AIC7XXX_CMDS_PER_DEVICE=8 | ||
| 1022 | CONFIG_AIC7XXX_RESET_DELAY_MS=15000 | ||
| 1023 | CONFIG_AIC7XXX_DEBUG_ENABLE=y | ||
| 1024 | CONFIG_AIC7XXX_DEBUG_MASK=0 | ||
| 1025 | CONFIG_AIC7XXX_REG_PRETTY_PRINT=y | ||
| 1026 | # CONFIG_SCSI_AIC7XXX_OLD is not set | ||
| 1027 | CONFIG_SCSI_AIC79XX=m | ||
| 1028 | CONFIG_AIC79XX_CMDS_PER_DEVICE=32 | ||
| 1029 | CONFIG_AIC79XX_RESET_DELAY_MS=15000 | ||
| 1030 | CONFIG_AIC79XX_DEBUG_ENABLE=y | ||
| 1031 | CONFIG_AIC79XX_DEBUG_MASK=0 | ||
| 1032 | CONFIG_AIC79XX_REG_PRETTY_PRINT=y | ||
| 1033 | CONFIG_SCSI_AIC94XX=m | ||
| 1034 | # CONFIG_AIC94XX_DEBUG is not set | ||
| 1035 | CONFIG_SCSI_DPT_I2O=m | ||
| 1036 | CONFIG_SCSI_ARCMSR=m | ||
| 1037 | CONFIG_MEGARAID_NEWGEN=y | ||
| 1038 | CONFIG_MEGARAID_MM=m | ||
| 1039 | CONFIG_MEGARAID_MAILBOX=m | ||
| 1040 | CONFIG_MEGARAID_LEGACY=m | ||
| 1041 | CONFIG_MEGARAID_SAS=m | ||
| 1042 | CONFIG_SCSI_HPTIOP=m | ||
| 1043 | CONFIG_SCSI_DMX3191D=m | ||
| 1044 | CONFIG_SCSI_FUTURE_DOMAIN=m | ||
| 1045 | CONFIG_SCSI_IPS=m | ||
| 1046 | CONFIG_SCSI_INITIO=m | ||
| 1047 | # CONFIG_SCSI_INIA100 is not set | ||
| 1048 | CONFIG_SCSI_PPA=m | ||
| 1049 | CONFIG_SCSI_IMM=m | ||
| 1050 | # CONFIG_SCSI_IZIP_EPP16 is not set | ||
| 1051 | # CONFIG_SCSI_IZIP_SLOW_CTR is not set | ||
| 1052 | CONFIG_SCSI_STEX=m | ||
| 1053 | CONFIG_SCSI_SYM53C8XX_2=m | ||
| 1054 | CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=1 | ||
| 1055 | CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16 | ||
| 1056 | CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64 | ||
| 1057 | CONFIG_SCSI_SYM53C8XX_MMIO=y | ||
| 1058 | CONFIG_SCSI_IPR=m | ||
| 1059 | # CONFIG_SCSI_IPR_TRACE is not set | ||
| 1060 | # CONFIG_SCSI_IPR_DUMP is not set | ||
| 1061 | CONFIG_SCSI_QLOGIC_1280=m | ||
| 1062 | CONFIG_SCSI_QLA_FC=m | ||
| 1063 | CONFIG_SCSI_QLA_ISCSI=m | ||
| 1064 | CONFIG_SCSI_LPFC=m | ||
| 1065 | CONFIG_SCSI_DC395x=m | ||
| 1066 | CONFIG_SCSI_DC390T=m | ||
| 1067 | CONFIG_SCSI_NSP32=m | ||
| 1068 | CONFIG_SCSI_DEBUG=m | ||
| 1069 | # CONFIG_SCSI_SRP is not set | ||
| 1070 | # CONFIG_SCSI_LOWLEVEL_PCMCIA is not set | 999 | # CONFIG_SCSI_LOWLEVEL_PCMCIA is not set |
| 1071 | CONFIG_ATA=m | 1000 | # CONFIG_SCSI_DH is not set |
| 1072 | # CONFIG_ATA_NONSTANDARD is not set | 1001 | # CONFIG_SCSI_OSD_INITIATOR is not set |
| 1073 | CONFIG_SATA_AHCI=m | 1002 | # CONFIG_ATA is not set |
| 1074 | CONFIG_SATA_SVW=m | 1003 | # CONFIG_MD is not set |
| 1075 | CONFIG_ATA_PIIX=m | 1004 | # CONFIG_FUSION is not set |
| 1076 | CONFIG_SATA_MV=m | ||
| 1077 | CONFIG_SATA_NV=m | ||
| 1078 | CONFIG_PDC_ADMA=m | ||
| 1079 | CONFIG_SATA_QSTOR=m | ||
| 1080 | CONFIG_SATA_PROMISE=m | ||
| 1081 | CONFIG_SATA_SX4=m | ||
| 1082 | CONFIG_SATA_SIL=m | ||
| 1083 | CONFIG_SATA_SIL24=m | ||
| 1084 | CONFIG_SATA_SIS=m | ||
| 1085 | CONFIG_SATA_ULI=m | ||
| 1086 | CONFIG_SATA_VIA=m | ||
| 1087 | CONFIG_SATA_VITESSE=m | ||
| 1088 | # CONFIG_SATA_INIC162X is not set | ||
| 1089 | # CONFIG_PATA_ALI is not set | ||
| 1090 | # CONFIG_PATA_AMD is not set | ||
| 1091 | # CONFIG_PATA_ARTOP is not set | ||
| 1092 | # CONFIG_PATA_ATIIXP is not set | ||
| 1093 | # CONFIG_PATA_CMD640_PCI is not set | ||
| 1094 | # CONFIG_PATA_CMD64X is not set | ||
| 1095 | CONFIG_PATA_CS5520=m | ||
| 1096 | # CONFIG_PATA_CS5530 is not set | ||
| 1097 | # CONFIG_PATA_CYPRESS is not set | ||
| 1098 | CONFIG_PATA_EFAR=m | ||
| 1099 | CONFIG_ATA_GENERIC=m | ||
| 1100 | # CONFIG_PATA_HPT366 is not set | ||
| 1101 | # CONFIG_PATA_HPT37X is not set | ||
| 1102 | # CONFIG_PATA_HPT3X2N is not set | ||
| 1103 | # CONFIG_PATA_HPT3X3 is not set | ||
| 1104 | # CONFIG_PATA_IT821X is not set | ||
| 1105 | # CONFIG_PATA_IT8213 is not set | ||
| 1106 | CONFIG_PATA_JMICRON=m | ||
| 1107 | CONFIG_PATA_TRIFLEX=m | ||
| 1108 | # CONFIG_PATA_MARVELL is not set | ||
| 1109 | CONFIG_PATA_MPIIX=m | ||
| 1110 | # CONFIG_PATA_OLDPIIX is not set | ||
| 1111 | CONFIG_PATA_NETCELL=m | ||
| 1112 | # CONFIG_PATA_NS87410 is not set | ||
| 1113 | # CONFIG_PATA_OPTI is not set | ||
| 1114 | # CONFIG_PATA_OPTIDMA is not set | ||
| 1115 | CONFIG_PATA_PCMCIA=m | ||
| 1116 | # CONFIG_PATA_PDC_OLD is not set | ||
| 1117 | # CONFIG_PATA_RADISYS is not set | ||
| 1118 | CONFIG_PATA_RZ1000=m | ||
| 1119 | # CONFIG_PATA_SC1200 is not set | ||
| 1120 | # CONFIG_PATA_SERVERWORKS is not set | ||
| 1121 | CONFIG_PATA_PDC2027X=m | ||
| 1122 | CONFIG_PATA_SIL680=m | ||
| 1123 | CONFIG_PATA_SIS=m | ||
| 1124 | CONFIG_PATA_VIA=m | ||
| 1125 | CONFIG_PATA_WINBOND=m | ||
| 1126 | # CONFIG_PATA_PLATFORM is not set | ||
| 1127 | CONFIG_MD=y | ||
| 1128 | CONFIG_BLK_DEV_MD=m | ||
| 1129 | CONFIG_MD_LINEAR=m | ||
| 1130 | CONFIG_MD_RAID0=m | ||
| 1131 | CONFIG_MD_RAID1=m | ||
| 1132 | CONFIG_MD_RAID10=m | ||
| 1133 | CONFIG_MD_RAID456=m | ||
| 1134 | # CONFIG_MD_RAID5_RESHAPE is not set | ||
| 1135 | CONFIG_MD_MULTIPATH=m | ||
| 1136 | CONFIG_MD_FAULTY=m | ||
| 1137 | CONFIG_BLK_DEV_DM=m | ||
| 1138 | # CONFIG_DM_DEBUG is not set | ||
| 1139 | CONFIG_DM_CRYPT=m | ||
| 1140 | CONFIG_DM_SNAPSHOT=m | ||
| 1141 | CONFIG_DM_MIRROR=m | ||
| 1142 | CONFIG_DM_ZERO=m | ||
| 1143 | CONFIG_DM_MULTIPATH=m | ||
| 1144 | CONFIG_DM_MULTIPATH_EMC=m | ||
| 1145 | # CONFIG_DM_MULTIPATH_RDAC is not set | ||
| 1146 | # CONFIG_DM_DELAY is not set | ||
| 1147 | |||
| 1148 | # | ||
| 1149 | # Fusion MPT device support | ||
| 1150 | # | ||
| 1151 | CONFIG_FUSION=y | ||
| 1152 | CONFIG_FUSION_SPI=m | ||
| 1153 | CONFIG_FUSION_FC=m | ||
| 1154 | CONFIG_FUSION_SAS=m | ||
| 1155 | CONFIG_FUSION_MAX_SGE=128 | ||
| 1156 | CONFIG_FUSION_CTL=m | ||
| 1157 | CONFIG_FUSION_LAN=m | ||
| 1158 | # CONFIG_FUSION_LOGGING is not set | ||
| 1159 | 1005 | ||
| 1160 | # | 1006 | # |
| 1161 | # IEEE 1394 (FireWire) support | 1007 | # IEEE 1394 (FireWire) support |
| 1162 | # | 1008 | # |
| 1163 | # CONFIG_FIREWIRE is not set | ||
| 1164 | CONFIG_IEEE1394=m | ||
| 1165 | |||
| 1166 | # | ||
| 1167 | # Subsystem Options | ||
| 1168 | # | ||
| 1169 | # CONFIG_IEEE1394_VERBOSEDEBUG is not set | ||
| 1170 | 1009 | ||
| 1171 | # | 1010 | # |
| 1172 | # Controllers | 1011 | # You can enable one or both FireWire driver stacks. |
| 1173 | # | 1012 | # |
| 1174 | CONFIG_IEEE1394_PCILYNX=m | ||
| 1175 | CONFIG_IEEE1394_OHCI1394=m | ||
| 1176 | 1013 | ||
| 1177 | # | 1014 | # |
| 1178 | # Protocols | 1015 | # The newer stack is recommended. |
| 1179 | # | 1016 | # |
| 1180 | CONFIG_IEEE1394_VIDEO1394=m | 1017 | # CONFIG_FIREWIRE is not set |
| 1181 | CONFIG_IEEE1394_SBP2=m | 1018 | # CONFIG_IEEE1394 is not set |
| 1182 | # CONFIG_IEEE1394_SBP2_PHYS_DMA is not set | 1019 | # CONFIG_I2O is not set |
| 1183 | CONFIG_IEEE1394_ETH1394_ROM_ENTRY=y | ||
| 1184 | CONFIG_IEEE1394_ETH1394=m | ||
| 1185 | CONFIG_IEEE1394_DV1394=m | ||
| 1186 | CONFIG_IEEE1394_RAWIO=m | ||
| 1187 | CONFIG_I2O=m | ||
| 1188 | CONFIG_I2O_LCT_NOTIFY_ON_CHANGES=y | ||
| 1189 | CONFIG_I2O_EXT_ADAPTEC=y | ||
| 1190 | CONFIG_I2O_CONFIG=m | ||
| 1191 | CONFIG_I2O_CONFIG_OLD_IOCTL=y | ||
| 1192 | CONFIG_I2O_BUS=m | ||
| 1193 | CONFIG_I2O_BLOCK=m | ||
| 1194 | CONFIG_I2O_SCSI=m | ||
| 1195 | CONFIG_I2O_PROC=m | ||
| 1196 | CONFIG_NETDEVICES=y | 1020 | CONFIG_NETDEVICES=y |
| 1197 | # CONFIG_NETDEVICES_MULTIQUEUE is not set | ||
| 1198 | # CONFIG_IFB is not set | 1021 | # CONFIG_IFB is not set |
| 1199 | CONFIG_DUMMY=m | 1022 | CONFIG_DUMMY=m |
| 1200 | CONFIG_BONDING=m | 1023 | CONFIG_BONDING=m |
| 1201 | # CONFIG_MACVLAN is not set | 1024 | # CONFIG_MACVLAN is not set |
| 1202 | CONFIG_EQUALIZER=m | 1025 | CONFIG_EQUALIZER=m |
| 1203 | CONFIG_TUN=m | 1026 | CONFIG_TUN=m |
| 1027 | # CONFIG_VETH is not set | ||
| 1204 | CONFIG_ARCNET=m | 1028 | CONFIG_ARCNET=m |
| 1205 | CONFIG_ARCNET_1201=m | 1029 | CONFIG_ARCNET_1201=m |
| 1206 | CONFIG_ARCNET_1051=m | 1030 | CONFIG_ARCNET_1051=m |
| @@ -1225,9 +1049,11 @@ CONFIG_VITESSE_PHY=m | |||
| 1225 | CONFIG_SMSC_PHY=m | 1049 | CONFIG_SMSC_PHY=m |
| 1226 | # CONFIG_BROADCOM_PHY is not set | 1050 | # CONFIG_BROADCOM_PHY is not set |
| 1227 | # CONFIG_ICPLUS_PHY is not set | 1051 | # CONFIG_ICPLUS_PHY is not set |
| 1228 | CONFIG_FIXED_PHY=m | 1052 | # CONFIG_REALTEK_PHY is not set |
| 1229 | # CONFIG_FIXED_MII_10_FDX is not set | 1053 | # CONFIG_NATIONAL_PHY is not set |
| 1230 | # CONFIG_FIXED_MII_100_FDX is not set | 1054 | # CONFIG_STE10XP is not set |
| 1055 | # CONFIG_LSI_ET1011C_PHY is not set | ||
| 1056 | # CONFIG_MDIO_BITBANG is not set | ||
| 1231 | CONFIG_NET_ETHERNET=y | 1057 | CONFIG_NET_ETHERNET=y |
| 1232 | CONFIG_MII=m | 1058 | CONFIG_MII=m |
| 1233 | # CONFIG_AX88796 is not set | 1059 | # CONFIG_AX88796 is not set |
| @@ -1240,8 +1066,12 @@ CONFIG_VORTEX=m | |||
| 1240 | CONFIG_TYPHOON=m | 1066 | CONFIG_TYPHOON=m |
| 1241 | # CONFIG_SMC91X is not set | 1067 | # CONFIG_SMC91X is not set |
| 1242 | # CONFIG_DM9000 is not set | 1068 | # CONFIG_DM9000 is not set |
| 1069 | # CONFIG_ETHOC is not set | ||
| 1070 | # CONFIG_SMSC911X is not set | ||
| 1071 | # CONFIG_DNET is not set | ||
| 1243 | CONFIG_NET_TULIP=y | 1072 | CONFIG_NET_TULIP=y |
| 1244 | CONFIG_DE2104X=m | 1073 | CONFIG_DE2104X=m |
| 1074 | CONFIG_DE2104X_DSL=0 | ||
| 1245 | CONFIG_TULIP=m | 1075 | CONFIG_TULIP=m |
| 1246 | # CONFIG_TULIP_MWI is not set | 1076 | # CONFIG_TULIP_MWI is not set |
| 1247 | # CONFIG_TULIP_MMIO is not set | 1077 | # CONFIG_TULIP_MMIO is not set |
| @@ -1251,21 +1081,26 @@ CONFIG_WINBOND_840=m | |||
| 1251 | CONFIG_DM9102=m | 1081 | CONFIG_DM9102=m |
| 1252 | CONFIG_ULI526X=m | 1082 | CONFIG_ULI526X=m |
| 1253 | CONFIG_PCMCIA_XIRCOM=m | 1083 | CONFIG_PCMCIA_XIRCOM=m |
| 1254 | # CONFIG_PCMCIA_XIRTULIP is not set | ||
| 1255 | CONFIG_HP100=m | 1084 | CONFIG_HP100=m |
| 1085 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
| 1086 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
| 1087 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
| 1088 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
| 1089 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
| 1090 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
| 1091 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
| 1256 | CONFIG_NET_PCI=y | 1092 | CONFIG_NET_PCI=y |
| 1257 | CONFIG_PCNET32=m | 1093 | CONFIG_PCNET32=m |
| 1258 | # CONFIG_PCNET32_NAPI is not set | ||
| 1259 | CONFIG_AMD8111_ETH=m | 1094 | CONFIG_AMD8111_ETH=m |
| 1260 | # CONFIG_AMD8111E_NAPI is not set | ||
| 1261 | CONFIG_ADAPTEC_STARFIRE=m | 1095 | CONFIG_ADAPTEC_STARFIRE=m |
| 1262 | # CONFIG_ADAPTEC_STARFIRE_NAPI is not set | 1096 | # CONFIG_KSZ884X_PCI is not set |
| 1263 | CONFIG_B44=m | 1097 | CONFIG_B44=m |
| 1098 | CONFIG_B44_PCI_AUTOSELECT=y | ||
| 1099 | CONFIG_B44_PCICORE_AUTOSELECT=y | ||
| 1100 | CONFIG_B44_PCI=y | ||
| 1264 | CONFIG_FORCEDETH=m | 1101 | CONFIG_FORCEDETH=m |
| 1265 | # CONFIG_FORCEDETH_NAPI is not set | 1102 | # CONFIG_FORCEDETH_NAPI is not set |
| 1266 | # CONFIG_TC35815 is not set | 1103 | # CONFIG_TC35815 is not set |
| 1267 | CONFIG_DGRS=m | ||
| 1268 | CONFIG_EEPRO100=m | ||
| 1269 | CONFIG_E100=m | 1104 | CONFIG_E100=m |
| 1270 | CONFIG_FEALNX=m | 1105 | CONFIG_FEALNX=m |
| 1271 | CONFIG_NATSEMI=m | 1106 | CONFIG_NATSEMI=m |
| @@ -1276,52 +1111,71 @@ CONFIG_8139TOO=m | |||
| 1276 | # CONFIG_8139TOO_TUNE_TWISTER is not set | 1111 | # CONFIG_8139TOO_TUNE_TWISTER is not set |
| 1277 | CONFIG_8139TOO_8129=y | 1112 | CONFIG_8139TOO_8129=y |
| 1278 | # CONFIG_8139_OLD_RX_RESET is not set | 1113 | # CONFIG_8139_OLD_RX_RESET is not set |
| 1114 | # CONFIG_R6040 is not set | ||
| 1279 | CONFIG_SIS900=m | 1115 | CONFIG_SIS900=m |
| 1280 | CONFIG_EPIC100=m | 1116 | CONFIG_EPIC100=m |
| 1117 | # CONFIG_SMSC9420 is not set | ||
| 1281 | CONFIG_SUNDANCE=m | 1118 | CONFIG_SUNDANCE=m |
| 1282 | # CONFIG_SUNDANCE_MMIO is not set | 1119 | # CONFIG_SUNDANCE_MMIO is not set |
| 1283 | CONFIG_TLAN=m | 1120 | CONFIG_TLAN=m |
| 1121 | # CONFIG_KS8842 is not set | ||
| 1122 | # CONFIG_KS8851_MLL is not set | ||
| 1284 | CONFIG_VIA_RHINE=m | 1123 | CONFIG_VIA_RHINE=m |
| 1285 | # CONFIG_VIA_RHINE_MMIO is not set | 1124 | # CONFIG_VIA_RHINE_MMIO is not set |
| 1286 | # CONFIG_VIA_RHINE_NAPI is not set | ||
| 1287 | # CONFIG_SC92031 is not set | 1125 | # CONFIG_SC92031 is not set |
| 1288 | CONFIG_NET_POCKET=y | 1126 | # CONFIG_ATL2 is not set |
| 1289 | CONFIG_DE600=m | ||
| 1290 | CONFIG_DE620=m | ||
| 1291 | CONFIG_NETDEV_1000=y | 1127 | CONFIG_NETDEV_1000=y |
| 1292 | CONFIG_ACENIC=m | 1128 | CONFIG_ACENIC=m |
| 1293 | # CONFIG_ACENIC_OMIT_TIGON_I is not set | 1129 | # CONFIG_ACENIC_OMIT_TIGON_I is not set |
| 1294 | CONFIG_DL2K=m | 1130 | CONFIG_DL2K=m |
| 1295 | CONFIG_E1000=m | 1131 | CONFIG_E1000=m |
| 1296 | # CONFIG_E1000_NAPI is not set | 1132 | # CONFIG_E1000E is not set |
| 1297 | # CONFIG_E1000_DISABLE_PACKET_SPLIT is not set | 1133 | # CONFIG_IP1000 is not set |
| 1134 | # CONFIG_IGB is not set | ||
| 1135 | # CONFIG_IGBVF is not set | ||
| 1298 | CONFIG_NS83820=m | 1136 | CONFIG_NS83820=m |
| 1299 | CONFIG_HAMACHI=m | 1137 | CONFIG_HAMACHI=m |
| 1300 | CONFIG_YELLOWFIN=m | 1138 | CONFIG_YELLOWFIN=m |
| 1301 | CONFIG_R8169=m | 1139 | CONFIG_R8169=m |
| 1302 | # CONFIG_R8169_NAPI is not set | ||
| 1303 | CONFIG_R8169_VLAN=y | 1140 | CONFIG_R8169_VLAN=y |
| 1304 | CONFIG_SIS190=m | 1141 | CONFIG_SIS190=m |
| 1305 | CONFIG_SKGE=m | 1142 | CONFIG_SKGE=m |
| 1143 | # CONFIG_SKGE_DEBUG is not set | ||
| 1306 | CONFIG_SKY2=m | 1144 | CONFIG_SKY2=m |
| 1307 | CONFIG_SK98LIN=m | 1145 | # CONFIG_SKY2_DEBUG is not set |
| 1308 | CONFIG_VIA_VELOCITY=m | 1146 | CONFIG_VIA_VELOCITY=m |
| 1309 | CONFIG_TIGON3=m | 1147 | CONFIG_TIGON3=m |
| 1310 | CONFIG_BNX2=m | 1148 | CONFIG_BNX2=m |
| 1149 | # CONFIG_CNIC is not set | ||
| 1311 | CONFIG_QLA3XXX=m | 1150 | CONFIG_QLA3XXX=m |
| 1312 | # CONFIG_ATL1 is not set | 1151 | # CONFIG_ATL1 is not set |
| 1152 | # CONFIG_ATL1E is not set | ||
| 1153 | # CONFIG_ATL1C is not set | ||
| 1154 | # CONFIG_JME is not set | ||
| 1313 | CONFIG_NETDEV_10000=y | 1155 | CONFIG_NETDEV_10000=y |
| 1156 | CONFIG_MDIO=m | ||
| 1314 | CONFIG_CHELSIO_T1=m | 1157 | CONFIG_CHELSIO_T1=m |
| 1315 | # CONFIG_CHELSIO_T1_1G is not set | 1158 | # CONFIG_CHELSIO_T1_1G is not set |
| 1316 | CONFIG_CHELSIO_T1_NAPI=y | 1159 | CONFIG_CHELSIO_T3_DEPENDS=y |
| 1317 | # CONFIG_CHELSIO_T3 is not set | 1160 | # CONFIG_CHELSIO_T3 is not set |
| 1161 | CONFIG_CHELSIO_T4_DEPENDS=y | ||
| 1162 | # CONFIG_CHELSIO_T4 is not set | ||
| 1163 | # CONFIG_ENIC is not set | ||
| 1164 | # CONFIG_IXGBE is not set | ||
| 1318 | CONFIG_IXGB=m | 1165 | CONFIG_IXGB=m |
| 1319 | # CONFIG_IXGB_NAPI is not set | ||
| 1320 | CONFIG_S2IO=m | 1166 | CONFIG_S2IO=m |
| 1321 | # CONFIG_S2IO_NAPI is not set | 1167 | # CONFIG_VXGE is not set |
| 1322 | CONFIG_MYRI10GE=m | 1168 | CONFIG_MYRI10GE=m |
| 1323 | # CONFIG_NETXEN_NIC is not set | 1169 | # CONFIG_NETXEN_NIC is not set |
| 1170 | # CONFIG_NIU is not set | ||
| 1171 | # CONFIG_MLX4_EN is not set | ||
| 1324 | # CONFIG_MLX4_CORE is not set | 1172 | # CONFIG_MLX4_CORE is not set |
| 1173 | # CONFIG_TEHUTI is not set | ||
| 1174 | # CONFIG_BNX2X is not set | ||
| 1175 | # CONFIG_QLCNIC is not set | ||
| 1176 | # CONFIG_QLGE is not set | ||
| 1177 | # CONFIG_SFC is not set | ||
| 1178 | # CONFIG_BE2NET is not set | ||
| 1325 | CONFIG_TR=y | 1179 | CONFIG_TR=y |
| 1326 | CONFIG_IBMOL=m | 1180 | CONFIG_IBMOL=m |
| 1327 | CONFIG_IBMLS=m | 1181 | CONFIG_IBMLS=m |
| @@ -1329,12 +1183,18 @@ CONFIG_3C359=m | |||
| 1329 | CONFIG_TMS380TR=m | 1183 | CONFIG_TMS380TR=m |
| 1330 | CONFIG_TMSPCI=m | 1184 | CONFIG_TMSPCI=m |
| 1331 | CONFIG_ABYSS=m | 1185 | CONFIG_ABYSS=m |
| 1186 | CONFIG_WLAN=y | ||
| 1187 | # CONFIG_PCMCIA_RAYCS is not set | ||
| 1188 | # CONFIG_ATMEL is not set | ||
| 1189 | # CONFIG_AIRO_CS is not set | ||
| 1190 | # CONFIG_PCMCIA_WL3501 is not set | ||
| 1191 | # CONFIG_PRISM54 is not set | ||
| 1192 | # CONFIG_USB_ZD1201 is not set | ||
| 1193 | # CONFIG_HOSTAP is not set | ||
| 1332 | 1194 | ||
| 1333 | # | 1195 | # |
| 1334 | # Wireless LAN | 1196 | # Enable WiMAX (Networking options) to see the WiMAX drivers |
| 1335 | # | 1197 | # |
| 1336 | # CONFIG_WLAN_PRE80211 is not set | ||
| 1337 | # CONFIG_WLAN_80211 is not set | ||
| 1338 | 1198 | ||
| 1339 | # | 1199 | # |
| 1340 | # USB Network Adapters | 1200 | # USB Network Adapters |
| @@ -1343,11 +1203,13 @@ CONFIG_USB_CATC=m | |||
| 1343 | CONFIG_USB_KAWETH=m | 1203 | CONFIG_USB_KAWETH=m |
| 1344 | CONFIG_USB_PEGASUS=m | 1204 | CONFIG_USB_PEGASUS=m |
| 1345 | CONFIG_USB_RTL8150=m | 1205 | CONFIG_USB_RTL8150=m |
| 1346 | CONFIG_USB_USBNET_MII=m | ||
| 1347 | CONFIG_USB_USBNET=m | 1206 | CONFIG_USB_USBNET=m |
| 1348 | CONFIG_USB_NET_AX8817X=m | 1207 | CONFIG_USB_NET_AX8817X=m |
| 1349 | CONFIG_USB_NET_CDCETHER=m | 1208 | CONFIG_USB_NET_CDCETHER=m |
| 1209 | # CONFIG_USB_NET_CDC_EEM is not set | ||
| 1350 | # CONFIG_USB_NET_DM9601 is not set | 1210 | # CONFIG_USB_NET_DM9601 is not set |
| 1211 | # CONFIG_USB_NET_SMSC75XX is not set | ||
| 1212 | # CONFIG_USB_NET_SMSC95XX is not set | ||
| 1351 | CONFIG_USB_NET_GL620A=m | 1213 | CONFIG_USB_NET_GL620A=m |
| 1352 | CONFIG_USB_NET_NET1080=m | 1214 | CONFIG_USB_NET_NET1080=m |
| 1353 | CONFIG_USB_NET_PLUSB=m | 1215 | CONFIG_USB_NET_PLUSB=m |
| @@ -1361,6 +1223,9 @@ CONFIG_USB_ARMLINUX=y | |||
| 1361 | CONFIG_USB_EPSON2888=y | 1223 | CONFIG_USB_EPSON2888=y |
| 1362 | # CONFIG_USB_KC2190 is not set | 1224 | # CONFIG_USB_KC2190 is not set |
| 1363 | CONFIG_USB_NET_ZAURUS=m | 1225 | CONFIG_USB_NET_ZAURUS=m |
| 1226 | # CONFIG_USB_NET_INT51X1 is not set | ||
| 1227 | # CONFIG_USB_IPHETH is not set | ||
| 1228 | CONFIG_USB_SIERRA_NET=m | ||
| 1364 | CONFIG_NET_PCMCIA=y | 1229 | CONFIG_NET_PCMCIA=y |
| 1365 | CONFIG_PCMCIA_3C589=m | 1230 | CONFIG_PCMCIA_3C589=m |
| 1366 | CONFIG_PCMCIA_3C574=m | 1231 | CONFIG_PCMCIA_3C574=m |
| @@ -1383,16 +1248,6 @@ CONFIG_HDLC_PPP=m | |||
| 1383 | CONFIG_HDLC_X25=m | 1248 | CONFIG_HDLC_X25=m |
| 1384 | CONFIG_PCI200SYN=m | 1249 | CONFIG_PCI200SYN=m |
| 1385 | CONFIG_WANXL=m | 1250 | CONFIG_WANXL=m |
| 1386 | CONFIG_PC300=m | ||
| 1387 | CONFIG_PC300_MLPPP=y | ||
| 1388 | |||
| 1389 | # | ||
| 1390 | # Cyclades-PC300 MLPPP support is disabled. | ||
| 1391 | # | ||
| 1392 | |||
| 1393 | # | ||
| 1394 | # Refer to the file README.mlppp, provided by PC300 package. | ||
| 1395 | # | ||
| 1396 | # CONFIG_PC300TOO is not set | 1251 | # CONFIG_PC300TOO is not set |
| 1397 | CONFIG_FARSYNC=m | 1252 | CONFIG_FARSYNC=m |
| 1398 | CONFIG_DSCC4=m | 1253 | CONFIG_DSCC4=m |
| @@ -1428,15 +1283,13 @@ CONFIG_ATM_HORIZON=m | |||
| 1428 | # CONFIG_ATM_HORIZON_DEBUG is not set | 1283 | # CONFIG_ATM_HORIZON_DEBUG is not set |
| 1429 | CONFIG_ATM_IA=m | 1284 | CONFIG_ATM_IA=m |
| 1430 | # CONFIG_ATM_IA_DEBUG is not set | 1285 | # CONFIG_ATM_IA_DEBUG is not set |
| 1431 | CONFIG_ATM_FORE200E_MAYBE=m | 1286 | CONFIG_ATM_FORE200E=m |
| 1432 | CONFIG_ATM_FORE200E_PCA=y | ||
| 1433 | CONFIG_ATM_FORE200E_PCA_DEFAULT_FW=y | ||
| 1434 | # CONFIG_ATM_FORE200E_USE_TASKLET is not set | 1287 | # CONFIG_ATM_FORE200E_USE_TASKLET is not set |
| 1435 | CONFIG_ATM_FORE200E_TX_RETRY=16 | 1288 | CONFIG_ATM_FORE200E_TX_RETRY=16 |
| 1436 | CONFIG_ATM_FORE200E_DEBUG=0 | 1289 | CONFIG_ATM_FORE200E_DEBUG=0 |
| 1437 | CONFIG_ATM_FORE200E=m | ||
| 1438 | CONFIG_ATM_HE=m | 1290 | CONFIG_ATM_HE=m |
| 1439 | CONFIG_ATM_HE_USE_SUNI=y | 1291 | CONFIG_ATM_HE_USE_SUNI=y |
| 1292 | # CONFIG_ATM_SOLOS is not set | ||
| 1440 | CONFIG_FDDI=y | 1293 | CONFIG_FDDI=y |
| 1441 | CONFIG_DEFXX=m | 1294 | CONFIG_DEFXX=m |
| 1442 | # CONFIG_DEFXX_MMIO is not set | 1295 | # CONFIG_DEFXX_MMIO is not set |
| @@ -1444,7 +1297,6 @@ CONFIG_SKFP=m | |||
| 1444 | CONFIG_HIPPI=y | 1297 | CONFIG_HIPPI=y |
| 1445 | CONFIG_ROADRUNNER=m | 1298 | CONFIG_ROADRUNNER=m |
| 1446 | # CONFIG_ROADRUNNER_LARGE_RINGS is not set | 1299 | # CONFIG_ROADRUNNER_LARGE_RINGS is not set |
| 1447 | CONFIG_PLIP=m | ||
| 1448 | CONFIG_PPP=m | 1300 | CONFIG_PPP=m |
| 1449 | CONFIG_PPP_MULTILINK=y | 1301 | CONFIG_PPP_MULTILINK=y |
| 1450 | CONFIG_PPP_FILTER=y | 1302 | CONFIG_PPP_FILTER=y |
| @@ -1462,219 +1314,53 @@ CONFIG_SLHC=m | |||
| 1462 | CONFIG_SLIP_SMART=y | 1314 | CONFIG_SLIP_SMART=y |
| 1463 | CONFIG_SLIP_MODE_SLIP6=y | 1315 | CONFIG_SLIP_MODE_SLIP6=y |
| 1464 | CONFIG_NET_FC=y | 1316 | CONFIG_NET_FC=y |
| 1465 | CONFIG_SHAPER=m | ||
| 1466 | CONFIG_NETCONSOLE=m | 1317 | CONFIG_NETCONSOLE=m |
| 1318 | # CONFIG_NETCONSOLE_DYNAMIC is not set | ||
| 1467 | CONFIG_NETPOLL=y | 1319 | CONFIG_NETPOLL=y |
| 1468 | # CONFIG_NETPOLL_TRAP is not set | 1320 | # CONFIG_NETPOLL_TRAP is not set |
| 1469 | CONFIG_NET_POLL_CONTROLLER=y | 1321 | CONFIG_NET_POLL_CONTROLLER=y |
| 1470 | CONFIG_ISDN=m | 1322 | # CONFIG_VMXNET3 is not set |
| 1471 | CONFIG_ISDN_I4L=m | 1323 | # CONFIG_ISDN is not set |
| 1472 | CONFIG_ISDN_PPP=y | 1324 | # CONFIG_PHONE is not set |
| 1473 | CONFIG_ISDN_PPP_VJ=y | ||
| 1474 | CONFIG_ISDN_MPP=y | ||
| 1475 | CONFIG_IPPP_FILTER=y | ||
| 1476 | CONFIG_ISDN_PPP_BSDCOMP=m | ||
| 1477 | CONFIG_ISDN_AUDIO=y | ||
| 1478 | CONFIG_ISDN_TTY_FAX=y | ||
| 1479 | CONFIG_ISDN_X25=y | ||
| 1480 | |||
| 1481 | # | ||
| 1482 | # ISDN feature submodules | ||
| 1483 | # | ||
| 1484 | # CONFIG_ISDN_DRV_LOOP is not set | ||
| 1485 | CONFIG_ISDN_DIVERSION=m | ||
| 1486 | |||
| 1487 | # | ||
| 1488 | # ISDN4Linux hardware drivers | ||
| 1489 | # | ||
| 1490 | |||
| 1491 | # | ||
| 1492 | # Passive cards | ||
| 1493 | # | ||
| 1494 | CONFIG_ISDN_DRV_HISAX=m | ||
| 1495 | |||
| 1496 | # | ||
| 1497 | # D-channel protocol features | ||
| 1498 | # | ||
| 1499 | CONFIG_HISAX_EURO=y | ||
| 1500 | CONFIG_DE_AOC=y | ||
| 1501 | # CONFIG_HISAX_NO_SENDCOMPLETE is not set | ||
| 1502 | # CONFIG_HISAX_NO_LLC is not set | ||
| 1503 | # CONFIG_HISAX_NO_KEYPAD is not set | ||
| 1504 | CONFIG_HISAX_1TR6=y | ||
| 1505 | CONFIG_HISAX_NI1=y | ||
| 1506 | CONFIG_HISAX_MAX_CARDS=8 | ||
| 1507 | |||
| 1508 | # | ||
| 1509 | # HiSax supported cards | ||
| 1510 | # | ||
| 1511 | CONFIG_HISAX_16_3=y | ||
| 1512 | CONFIG_HISAX_TELESPCI=y | ||
| 1513 | CONFIG_HISAX_S0BOX=y | ||
| 1514 | CONFIG_HISAX_FRITZPCI=y | ||
| 1515 | CONFIG_HISAX_AVM_A1_PCMCIA=y | ||
| 1516 | CONFIG_HISAX_ELSA=y | ||
| 1517 | CONFIG_HISAX_DIEHLDIVA=y | ||
| 1518 | CONFIG_HISAX_SEDLBAUER=y | ||
| 1519 | CONFIG_HISAX_NETJET=y | ||
| 1520 | CONFIG_HISAX_NETJET_U=y | ||
| 1521 | CONFIG_HISAX_NICCY=y | ||
| 1522 | CONFIG_HISAX_BKM_A4T=y | ||
| 1523 | CONFIG_HISAX_SCT_QUADRO=y | ||
| 1524 | CONFIG_HISAX_GAZEL=y | ||
| 1525 | CONFIG_HISAX_HFC_PCI=y | ||
| 1526 | CONFIG_HISAX_W6692=y | ||
| 1527 | CONFIG_HISAX_HFC_SX=y | ||
| 1528 | CONFIG_HISAX_ENTERNOW_PCI=y | ||
| 1529 | # CONFIG_HISAX_DEBUG is not set | ||
| 1530 | |||
| 1531 | # | ||
| 1532 | # HiSax PCMCIA card service modules | ||
| 1533 | # | ||
| 1534 | CONFIG_HISAX_SEDLBAUER_CS=m | ||
| 1535 | CONFIG_HISAX_ELSA_CS=m | ||
| 1536 | CONFIG_HISAX_AVM_A1_CS=m | ||
| 1537 | CONFIG_HISAX_TELES_CS=m | ||
| 1538 | |||
| 1539 | # | ||
| 1540 | # HiSax sub driver modules | ||
| 1541 | # | ||
| 1542 | CONFIG_HISAX_ST5481=m | ||
| 1543 | CONFIG_HISAX_HFCUSB=m | ||
| 1544 | CONFIG_HISAX_HFC4S8S=m | ||
| 1545 | CONFIG_HISAX_FRITZ_PCIPNP=m | ||
| 1546 | CONFIG_HISAX_HDLC=y | ||
| 1547 | |||
| 1548 | # | ||
| 1549 | # Active cards | ||
| 1550 | # | ||
| 1551 | # CONFIG_HYSDN is not set | ||
| 1552 | CONFIG_ISDN_DRV_GIGASET=m | ||
| 1553 | CONFIG_GIGASET_BASE=m | ||
| 1554 | CONFIG_GIGASET_M105=m | ||
| 1555 | # CONFIG_GIGASET_M101 is not set | ||
| 1556 | # CONFIG_GIGASET_DEBUG is not set | ||
| 1557 | # CONFIG_GIGASET_UNDOCREQ is not set | ||
| 1558 | CONFIG_ISDN_CAPI=m | ||
| 1559 | CONFIG_ISDN_DRV_AVMB1_VERBOSE_REASON=y | ||
| 1560 | CONFIG_CAPI_TRACE=y | ||
| 1561 | CONFIG_ISDN_CAPI_MIDDLEWARE=y | ||
| 1562 | CONFIG_ISDN_CAPI_CAPI20=m | ||
| 1563 | CONFIG_ISDN_CAPI_CAPIFS_BOOL=y | ||
| 1564 | CONFIG_ISDN_CAPI_CAPIFS=m | ||
| 1565 | CONFIG_ISDN_CAPI_CAPIDRV=m | ||
| 1566 | |||
| 1567 | # | ||
| 1568 | # CAPI hardware drivers | ||
| 1569 | # | ||
| 1570 | CONFIG_CAPI_AVM=y | ||
| 1571 | CONFIG_ISDN_DRV_AVMB1_B1PCI=m | ||
| 1572 | CONFIG_ISDN_DRV_AVMB1_B1PCIV4=y | ||
| 1573 | CONFIG_ISDN_DRV_AVMB1_B1PCMCIA=m | ||
| 1574 | CONFIG_ISDN_DRV_AVMB1_AVM_CS=m | ||
| 1575 | CONFIG_ISDN_DRV_AVMB1_T1PCI=m | ||
| 1576 | CONFIG_ISDN_DRV_AVMB1_C4=m | ||
| 1577 | CONFIG_CAPI_EICON=y | ||
| 1578 | CONFIG_ISDN_DIVAS=m | ||
| 1579 | CONFIG_ISDN_DIVAS_BRIPCI=y | ||
| 1580 | CONFIG_ISDN_DIVAS_PRIPCI=y | ||
| 1581 | CONFIG_ISDN_DIVAS_DIVACAPI=m | ||
| 1582 | CONFIG_ISDN_DIVAS_USERIDI=m | ||
| 1583 | CONFIG_ISDN_DIVAS_MAINT=m | ||
| 1584 | CONFIG_PHONE=m | ||
| 1585 | CONFIG_PHONE_IXJ=m | ||
| 1586 | CONFIG_PHONE_IXJ_PCMCIA=m | ||
| 1587 | 1325 | ||
| 1588 | # | 1326 | # |
| 1589 | # Input device support | 1327 | # Input device support |
| 1590 | # | 1328 | # |
| 1591 | CONFIG_INPUT=y | 1329 | CONFIG_INPUT=y |
| 1592 | CONFIG_INPUT_FF_MEMLESS=m | 1330 | # CONFIG_INPUT_FF_MEMLESS is not set |
| 1593 | # CONFIG_INPUT_POLLDEV is not set | 1331 | # CONFIG_INPUT_POLLDEV is not set |
| 1332 | # CONFIG_INPUT_SPARSEKMAP is not set | ||
| 1594 | 1333 | ||
| 1595 | # | 1334 | # |
| 1596 | # Userland interfaces | 1335 | # Userland interfaces |
| 1597 | # | 1336 | # |
| 1598 | CONFIG_INPUT_MOUSEDEV=y | 1337 | # CONFIG_INPUT_MOUSEDEV is not set |
| 1599 | CONFIG_INPUT_MOUSEDEV_PSAUX=y | 1338 | # CONFIG_INPUT_JOYDEV is not set |
| 1600 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | 1339 | # CONFIG_INPUT_EVDEV is not set |
| 1601 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | 1340 | # CONFIG_INPUT_EVBUG is not set |
| 1602 | CONFIG_INPUT_JOYDEV=m | ||
| 1603 | CONFIG_INPUT_TSDEV=m | ||
| 1604 | CONFIG_INPUT_TSDEV_SCREEN_X=240 | ||
| 1605 | CONFIG_INPUT_TSDEV_SCREEN_Y=320 | ||
| 1606 | CONFIG_INPUT_EVDEV=m | ||
| 1607 | CONFIG_INPUT_EVBUG=m | ||
| 1608 | 1341 | ||
| 1609 | # | 1342 | # |
| 1610 | # Input Device Drivers | 1343 | # Input Device Drivers |
| 1611 | # | 1344 | # |
| 1612 | CONFIG_INPUT_KEYBOARD=y | 1345 | CONFIG_INPUT_KEYBOARD=y |
| 1613 | CONFIG_KEYBOARD_ATKBD=y | 1346 | # CONFIG_KEYBOARD_ADP5588 is not set |
| 1347 | # CONFIG_KEYBOARD_ATKBD is not set | ||
| 1348 | # CONFIG_QT2160 is not set | ||
| 1349 | # CONFIG_KEYBOARD_LKKBD is not set | ||
| 1614 | CONFIG_KEYBOARD_GPIO=y | 1350 | CONFIG_KEYBOARD_GPIO=y |
| 1615 | CONFIG_KEYBOARD_SUNKBD=m | 1351 | # CONFIG_KEYBOARD_MATRIX is not set |
| 1616 | CONFIG_KEYBOARD_LKKBD=m | 1352 | # CONFIG_KEYBOARD_LM8323 is not set |
| 1617 | CONFIG_KEYBOARD_XTKBD=m | 1353 | # CONFIG_KEYBOARD_MAX7359 is not set |
| 1618 | CONFIG_KEYBOARD_NEWTON=m | 1354 | # CONFIG_KEYBOARD_NEWTON is not set |
| 1619 | CONFIG_KEYBOARD_STOWAWAY=m | 1355 | # CONFIG_KEYBOARD_OPENCORES is not set |
| 1620 | CONFIG_INPUT_MOUSE=y | 1356 | # CONFIG_KEYBOARD_STOWAWAY is not set |
| 1621 | CONFIG_MOUSE_PS2=m | 1357 | # CONFIG_KEYBOARD_SUNKBD is not set |
| 1622 | CONFIG_MOUSE_PS2_ALPS=y | 1358 | # CONFIG_KEYBOARD_XTKBD is not set |
| 1623 | CONFIG_MOUSE_PS2_LOGIPS2PP=y | 1359 | # CONFIG_INPUT_MOUSE is not set |
| 1624 | CONFIG_MOUSE_PS2_SYNAPTICS=y | 1360 | # CONFIG_INPUT_JOYSTICK is not set |
| 1625 | CONFIG_MOUSE_PS2_LIFEBOOK=y | ||
| 1626 | CONFIG_MOUSE_PS2_TRACKPOINT=y | ||
| 1627 | # CONFIG_MOUSE_PS2_TOUCHKIT is not set | ||
| 1628 | CONFIG_MOUSE_SERIAL=m | ||
| 1629 | # CONFIG_MOUSE_APPLETOUCH is not set | ||
| 1630 | CONFIG_MOUSE_VSXXXAA=m | ||
| 1631 | CONFIG_INPUT_JOYSTICK=y | ||
| 1632 | CONFIG_JOYSTICK_ANALOG=m | ||
| 1633 | CONFIG_JOYSTICK_A3D=m | ||
| 1634 | CONFIG_JOYSTICK_ADI=m | ||
| 1635 | CONFIG_JOYSTICK_COBRA=m | ||
| 1636 | CONFIG_JOYSTICK_GF2K=m | ||
| 1637 | CONFIG_JOYSTICK_GRIP=m | ||
| 1638 | CONFIG_JOYSTICK_GRIP_MP=m | ||
| 1639 | CONFIG_JOYSTICK_GUILLEMOT=m | ||
| 1640 | CONFIG_JOYSTICK_INTERACT=m | ||
| 1641 | CONFIG_JOYSTICK_SIDEWINDER=m | ||
| 1642 | CONFIG_JOYSTICK_TMDC=m | ||
| 1643 | CONFIG_JOYSTICK_IFORCE=m | ||
| 1644 | CONFIG_JOYSTICK_IFORCE_USB=y | ||
| 1645 | CONFIG_JOYSTICK_IFORCE_232=y | ||
| 1646 | CONFIG_JOYSTICK_WARRIOR=m | ||
| 1647 | CONFIG_JOYSTICK_MAGELLAN=m | ||
| 1648 | CONFIG_JOYSTICK_SPACEORB=m | ||
| 1649 | CONFIG_JOYSTICK_SPACEBALL=m | ||
| 1650 | CONFIG_JOYSTICK_STINGER=m | ||
| 1651 | CONFIG_JOYSTICK_TWIDJOY=m | ||
| 1652 | CONFIG_JOYSTICK_DB9=m | ||
| 1653 | CONFIG_JOYSTICK_GAMECON=m | ||
| 1654 | CONFIG_JOYSTICK_TURBOGRAFX=m | ||
| 1655 | CONFIG_JOYSTICK_JOYDUMP=m | ||
| 1656 | # CONFIG_JOYSTICK_XPAD is not set | ||
| 1657 | # CONFIG_INPUT_TABLET is not set | 1361 | # CONFIG_INPUT_TABLET is not set |
| 1658 | CONFIG_INPUT_TOUCHSCREEN=y | 1362 | # CONFIG_INPUT_TOUCHSCREEN is not set |
| 1659 | CONFIG_TOUCHSCREEN_ADS7846=m | 1363 | # CONFIG_INPUT_MISC is not set |
| 1660 | # CONFIG_TOUCHSCREEN_FUJITSU is not set | ||
| 1661 | CONFIG_TOUCHSCREEN_GUNZE=m | ||
| 1662 | CONFIG_TOUCHSCREEN_ELO=m | ||
| 1663 | CONFIG_TOUCHSCREEN_MTOUCH=m | ||
| 1664 | CONFIG_TOUCHSCREEN_MK712=m | ||
| 1665 | CONFIG_TOUCHSCREEN_PENMOUNT=m | ||
| 1666 | CONFIG_TOUCHSCREEN_TOUCHRIGHT=m | ||
| 1667 | CONFIG_TOUCHSCREEN_TOUCHWIN=m | ||
| 1668 | # CONFIG_TOUCHSCREEN_UCB1400 is not set | ||
| 1669 | # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set | ||
| 1670 | CONFIG_INPUT_MISC=y | ||
| 1671 | CONFIG_INPUT_PCSPKR=m | ||
| 1672 | # CONFIG_INPUT_ATI_REMOTE is not set | ||
| 1673 | # CONFIG_INPUT_ATI_REMOTE2 is not set | ||
| 1674 | # CONFIG_INPUT_KEYSPAN_REMOTE is not set | ||
| 1675 | # CONFIG_INPUT_POWERMATE is not set | ||
| 1676 | # CONFIG_INPUT_YEALINK is not set | ||
| 1677 | CONFIG_INPUT_UINPUT=m | ||
| 1678 | 1364 | ||
| 1679 | # | 1365 | # |
| 1680 | # Hardware I/O ports | 1366 | # Hardware I/O ports |
| @@ -1682,10 +1368,10 @@ CONFIG_INPUT_UINPUT=m | |||
| 1682 | CONFIG_SERIO=y | 1368 | CONFIG_SERIO=y |
| 1683 | CONFIG_SERIO_I8042=y | 1369 | CONFIG_SERIO_I8042=y |
| 1684 | CONFIG_SERIO_SERPORT=m | 1370 | CONFIG_SERIO_SERPORT=m |
| 1685 | CONFIG_SERIO_PARKBD=m | ||
| 1686 | CONFIG_SERIO_PCIPS2=m | 1371 | CONFIG_SERIO_PCIPS2=m |
| 1687 | CONFIG_SERIO_LIBPS2=y | 1372 | CONFIG_SERIO_LIBPS2=y |
| 1688 | CONFIG_SERIO_RAW=m | 1373 | CONFIG_SERIO_RAW=m |
| 1374 | # CONFIG_SERIO_ALTERA_PS2 is not set | ||
| 1689 | CONFIG_GAMEPORT=m | 1375 | CONFIG_GAMEPORT=m |
| 1690 | CONFIG_GAMEPORT_NS558=m | 1376 | CONFIG_GAMEPORT_NS558=m |
| 1691 | CONFIG_GAMEPORT_L4=m | 1377 | CONFIG_GAMEPORT_L4=m |
| @@ -1696,30 +1382,13 @@ CONFIG_GAMEPORT_FM801=m | |||
| 1696 | # Character devices | 1382 | # Character devices |
| 1697 | # | 1383 | # |
| 1698 | CONFIG_VT=y | 1384 | CONFIG_VT=y |
| 1385 | CONFIG_CONSOLE_TRANSLATIONS=y | ||
| 1699 | CONFIG_VT_CONSOLE=y | 1386 | CONFIG_VT_CONSOLE=y |
| 1700 | CONFIG_HW_CONSOLE=y | 1387 | CONFIG_HW_CONSOLE=y |
| 1701 | CONFIG_VT_HW_CONSOLE_BINDING=y | 1388 | CONFIG_VT_HW_CONSOLE_BINDING=y |
| 1702 | CONFIG_SERIAL_NONSTANDARD=y | 1389 | CONFIG_DEVKMEM=y |
| 1703 | # CONFIG_COMPUTONE is not set | 1390 | # CONFIG_SERIAL_NONSTANDARD is not set |
| 1704 | CONFIG_ROCKETPORT=m | 1391 | # CONFIG_NOZOMI is not set |
| 1705 | CONFIG_CYCLADES=m | ||
| 1706 | # CONFIG_CYZ_INTR is not set | ||
| 1707 | CONFIG_DIGIEPCA=m | ||
| 1708 | # CONFIG_MOXA_INTELLIO is not set | ||
| 1709 | CONFIG_MOXA_SMARTIO=m | ||
| 1710 | # CONFIG_MOXA_SMARTIO_NEW is not set | ||
| 1711 | # CONFIG_ISI is not set | ||
| 1712 | CONFIG_SYNCLINKMP=m | ||
| 1713 | CONFIG_SYNCLINK_GT=m | ||
| 1714 | CONFIG_N_HDLC=m | ||
| 1715 | # CONFIG_RISCOM8 is not set | ||
| 1716 | CONFIG_SPECIALIX=m | ||
| 1717 | # CONFIG_SPECIALIX_RTSCTS is not set | ||
| 1718 | CONFIG_SX=m | ||
| 1719 | # CONFIG_RIO is not set | ||
| 1720 | CONFIG_STALDRV=y | ||
| 1721 | # CONFIG_STALLION is not set | ||
| 1722 | # CONFIG_ISTALLION is not set | ||
| 1723 | 1392 | ||
| 1724 | # | 1393 | # |
| 1725 | # Serial drivers | 1394 | # Serial drivers |
| @@ -1741,161 +1410,128 @@ CONFIG_SERIAL_8250_RSA=y | |||
| 1741 | # | 1410 | # |
| 1742 | CONFIG_SERIAL_CORE=m | 1411 | CONFIG_SERIAL_CORE=m |
| 1743 | CONFIG_SERIAL_JSM=m | 1412 | CONFIG_SERIAL_JSM=m |
| 1413 | # CONFIG_SERIAL_TIMBERDALE is not set | ||
| 1744 | CONFIG_UNIX98_PTYS=y | 1414 | CONFIG_UNIX98_PTYS=y |
| 1415 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
| 1745 | CONFIG_LEGACY_PTYS=y | 1416 | CONFIG_LEGACY_PTYS=y |
| 1746 | CONFIG_LEGACY_PTY_COUNT=256 | 1417 | CONFIG_LEGACY_PTY_COUNT=256 |
| 1747 | CONFIG_PRINTER=m | 1418 | # CONFIG_IPMI_HANDLER is not set |
| 1748 | # CONFIG_LP_CONSOLE is not set | ||
| 1749 | CONFIG_PPDEV=m | ||
| 1750 | CONFIG_TIPAR=m | ||
| 1751 | CONFIG_IPMI_HANDLER=m | ||
| 1752 | # CONFIG_IPMI_PANIC_EVENT is not set | ||
| 1753 | CONFIG_IPMI_DEVICE_INTERFACE=m | ||
| 1754 | CONFIG_IPMI_SI=m | ||
| 1755 | CONFIG_IPMI_WATCHDOG=m | ||
| 1756 | CONFIG_IPMI_POWEROFF=m | ||
| 1757 | CONFIG_WATCHDOG=y | ||
| 1758 | # CONFIG_WATCHDOG_NOWAYOUT is not set | ||
| 1759 | |||
| 1760 | # | ||
| 1761 | # Watchdog Device Drivers | ||
| 1762 | # | ||
| 1763 | CONFIG_SOFT_WATCHDOG=m | ||
| 1764 | # CONFIG_WDT_MTX1 is not set | ||
| 1765 | |||
| 1766 | # | ||
| 1767 | # PCI-based Watchdog Cards | ||
| 1768 | # | ||
| 1769 | CONFIG_PCIPCWATCHDOG=m | ||
| 1770 | CONFIG_WDTPCI=m | ||
| 1771 | CONFIG_WDT_501_PCI=y | ||
| 1772 | |||
| 1773 | # | ||
| 1774 | # USB-based Watchdog Cards | ||
| 1775 | # | ||
| 1776 | CONFIG_USBPCWATCHDOG=m | ||
| 1777 | CONFIG_HW_RANDOM=y | 1419 | CONFIG_HW_RANDOM=y |
| 1778 | CONFIG_RTC=y | 1420 | # CONFIG_HW_RANDOM_TIMERIOMEM is not set |
| 1779 | CONFIG_R3964=m | 1421 | # CONFIG_R3964 is not set |
| 1780 | CONFIG_APPLICOM=m | 1422 | # CONFIG_APPLICOM is not set |
| 1781 | CONFIG_DRM=m | ||
| 1782 | CONFIG_DRM_TDFX=m | ||
| 1783 | CONFIG_DRM_R128=m | ||
| 1784 | CONFIG_DRM_RADEON=m | ||
| 1785 | CONFIG_DRM_MGA=m | ||
| 1786 | CONFIG_DRM_VIA=m | ||
| 1787 | CONFIG_DRM_SAVAGE=m | ||
| 1788 | 1423 | ||
| 1789 | # | 1424 | # |
| 1790 | # PCMCIA character devices | 1425 | # PCMCIA character devices |
| 1791 | # | 1426 | # |
| 1792 | CONFIG_SYNCLINK_CS=m | 1427 | # CONFIG_SYNCLINK_CS is not set |
| 1793 | CONFIG_CARDMAN_4000=m | 1428 | # CONFIG_CARDMAN_4000 is not set |
| 1794 | CONFIG_CARDMAN_4040=m | 1429 | # CONFIG_CARDMAN_4040 is not set |
| 1795 | CONFIG_RAW_DRIVER=m | 1430 | # CONFIG_IPWIRELESS is not set |
| 1796 | CONFIG_MAX_RAW_DEVS=256 | 1431 | # CONFIG_RAW_DRIVER is not set |
| 1797 | CONFIG_TCG_TPM=m | 1432 | # CONFIG_TCG_TPM is not set |
| 1798 | CONFIG_TCG_ATMEL=m | ||
| 1799 | CONFIG_DEVPORT=y | 1433 | CONFIG_DEVPORT=y |
| 1800 | CONFIG_I2C=m | 1434 | CONFIG_I2C=m |
| 1801 | CONFIG_I2C_BOARDINFO=y | 1435 | CONFIG_I2C_BOARDINFO=y |
| 1436 | CONFIG_I2C_COMPAT=y | ||
| 1802 | CONFIG_I2C_CHARDEV=m | 1437 | CONFIG_I2C_CHARDEV=m |
| 1438 | CONFIG_I2C_HELPER_AUTO=y | ||
| 1439 | CONFIG_I2C_ALGOBIT=m | ||
| 1803 | 1440 | ||
| 1804 | # | 1441 | # |
| 1805 | # I2C Algorithms | 1442 | # I2C Hardware Bus support |
| 1806 | # | 1443 | # |
| 1807 | CONFIG_I2C_ALGOBIT=m | ||
| 1808 | CONFIG_I2C_ALGOPCF=m | ||
| 1809 | CONFIG_I2C_ALGOPCA=m | ||
| 1810 | 1444 | ||
| 1811 | # | 1445 | # |
| 1812 | # I2C Hardware Bus support | 1446 | # PC SMBus host controller drivers |
| 1447 | # | ||
| 1448 | # CONFIG_I2C_ALI1535 is not set | ||
| 1449 | # CONFIG_I2C_ALI1563 is not set | ||
| 1450 | # CONFIG_I2C_ALI15X3 is not set | ||
| 1451 | # CONFIG_I2C_AMD756 is not set | ||
| 1452 | # CONFIG_I2C_AMD8111 is not set | ||
| 1453 | # CONFIG_I2C_I801 is not set | ||
| 1454 | # CONFIG_I2C_ISCH is not set | ||
| 1455 | # CONFIG_I2C_PIIX4 is not set | ||
| 1456 | # CONFIG_I2C_NFORCE2 is not set | ||
| 1457 | # CONFIG_I2C_SIS5595 is not set | ||
| 1458 | # CONFIG_I2C_SIS630 is not set | ||
| 1459 | # CONFIG_I2C_SIS96X is not set | ||
| 1460 | # CONFIG_I2C_VIA is not set | ||
| 1461 | # CONFIG_I2C_VIAPRO is not set | ||
| 1462 | |||
| 1463 | # | ||
| 1464 | # I2C system bus drivers (mostly embedded / system-on-chip) | ||
| 1813 | # | 1465 | # |
| 1814 | CONFIG_I2C_ALI1535=m | 1466 | CONFIG_I2C_GPIO=m |
| 1815 | CONFIG_I2C_ALI1563=m | 1467 | # CONFIG_I2C_OCORES is not set |
| 1816 | CONFIG_I2C_ALI15X3=m | ||
| 1817 | CONFIG_I2C_AMD756=m | ||
| 1818 | CONFIG_I2C_AMD756_S4882=m | ||
| 1819 | CONFIG_I2C_AMD8111=m | ||
| 1820 | CONFIG_I2C_I801=m | ||
| 1821 | CONFIG_I2C_I810=m | ||
| 1822 | CONFIG_I2C_PIIX4=m | ||
| 1823 | CONFIG_I2C_NFORCE2=m | ||
| 1824 | CONFIG_I2C_OCORES=m | ||
| 1825 | CONFIG_I2C_PARPORT=m | ||
| 1826 | CONFIG_I2C_PARPORT_LIGHT=m | ||
| 1827 | CONFIG_I2C_PROSAVAGE=m | ||
| 1828 | CONFIG_I2C_SAVAGE4=m | ||
| 1829 | # CONFIG_I2C_SIMTEC is not set | 1468 | # CONFIG_I2C_SIMTEC is not set |
| 1830 | CONFIG_I2C_SIS5595=m | 1469 | # CONFIG_I2C_XILINX is not set |
| 1831 | CONFIG_I2C_SIS630=m | 1470 | |
| 1832 | CONFIG_I2C_SIS96X=m | 1471 | # |
| 1472 | # External I2C/SMBus adapter drivers | ||
| 1473 | # | ||
| 1474 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
| 1833 | # CONFIG_I2C_TAOS_EVM is not set | 1475 | # CONFIG_I2C_TAOS_EVM is not set |
| 1834 | CONFIG_I2C_STUB=m | ||
| 1835 | # CONFIG_I2C_TINY_USB is not set | 1476 | # CONFIG_I2C_TINY_USB is not set |
| 1836 | CONFIG_I2C_VIA=m | ||
| 1837 | CONFIG_I2C_VIAPRO=m | ||
| 1838 | CONFIG_I2C_VOODOO3=m | ||
| 1839 | 1477 | ||
| 1840 | # | 1478 | # |
| 1841 | # Miscellaneous I2C Chip support | 1479 | # Other I2C/SMBus bus drivers |
| 1842 | # | 1480 | # |
| 1843 | CONFIG_SENSORS_DS1337=m | 1481 | # CONFIG_I2C_PCA_PLATFORM is not set |
| 1844 | CONFIG_SENSORS_DS1374=m | 1482 | # CONFIG_I2C_STUB is not set |
| 1845 | # CONFIG_DS1682 is not set | ||
| 1846 | CONFIG_EEPROM_LEGACY=m | ||
| 1847 | CONFIG_SENSORS_PCF8574=m | ||
| 1848 | CONFIG_SENSORS_PCA9539=m | ||
| 1849 | CONFIG_SENSORS_PCF8591=m | ||
| 1850 | CONFIG_EEPROM_MAX6875=m | ||
| 1851 | # CONFIG_SENSORS_TSL2550 is not set | ||
| 1852 | # CONFIG_I2C_DEBUG_CORE is not set | 1483 | # CONFIG_I2C_DEBUG_CORE is not set |
| 1853 | # CONFIG_I2C_DEBUG_ALGO is not set | 1484 | # CONFIG_I2C_DEBUG_ALGO is not set |
| 1854 | # CONFIG_I2C_DEBUG_BUS is not set | 1485 | # CONFIG_I2C_DEBUG_BUS is not set |
| 1855 | # CONFIG_I2C_DEBUG_CHIP is not set | 1486 | # CONFIG_SPI is not set |
| 1856 | 1487 | ||
| 1857 | # | 1488 | # |
| 1858 | # SPI support | 1489 | # PPS support |
| 1859 | # | 1490 | # |
| 1860 | CONFIG_SPI=y | 1491 | # CONFIG_PPS is not set |
| 1861 | CONFIG_SPI_MASTER=y | 1492 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y |
| 1493 | CONFIG_GPIOLIB=y | ||
| 1494 | CONFIG_GPIO_SYSFS=y | ||
| 1862 | 1495 | ||
| 1863 | # | 1496 | # |
| 1864 | # SPI Master Controller Drivers | 1497 | # Memory mapped GPIO expanders: |
| 1865 | # | 1498 | # |
| 1866 | CONFIG_SPI_BITBANG=m | 1499 | # CONFIG_GPIO_IT8761E is not set |
| 1867 | CONFIG_SPI_BUTTERFLY=m | 1500 | # CONFIG_GPIO_SCH is not set |
| 1868 | # CONFIG_SPI_LM70_LLP is not set | ||
| 1869 | 1501 | ||
| 1870 | # | 1502 | # |
| 1871 | # SPI Protocol Masters | 1503 | # I2C GPIO expanders: |
| 1872 | # | 1504 | # |
| 1873 | # CONFIG_EEPROM_AT25 is not set | 1505 | # CONFIG_GPIO_MAX7300 is not set |
| 1874 | # CONFIG_SPI_SPIDEV is not set | 1506 | # CONFIG_GPIO_MAX732X is not set |
| 1875 | # CONFIG_SPI_TLE62X0 is not set | 1507 | # CONFIG_GPIO_PCA953X is not set |
| 1876 | CONFIG_W1=m | 1508 | # CONFIG_GPIO_PCF857X is not set |
| 1877 | CONFIG_W1_CON=y | 1509 | # CONFIG_GPIO_ADP5588 is not set |
| 1878 | 1510 | ||
| 1879 | # | 1511 | # |
| 1880 | # 1-wire Bus Masters | 1512 | # PCI GPIO expanders: |
| 1881 | # | 1513 | # |
| 1882 | CONFIG_W1_MASTER_MATROX=m | 1514 | # CONFIG_GPIO_CS5535 is not set |
| 1883 | CONFIG_W1_MASTER_DS2490=m | 1515 | # CONFIG_GPIO_BT8XX is not set |
| 1884 | CONFIG_W1_MASTER_DS2482=m | 1516 | # CONFIG_GPIO_LANGWELL is not set |
| 1885 | 1517 | ||
| 1886 | # | 1518 | # |
| 1887 | # 1-wire Slaves | 1519 | # SPI GPIO expanders: |
| 1888 | # | 1520 | # |
| 1889 | CONFIG_W1_SLAVE_THERM=m | 1521 | |
| 1890 | CONFIG_W1_SLAVE_SMEM=m | 1522 | # |
| 1891 | CONFIG_W1_SLAVE_DS2433=m | 1523 | # AC97 GPIO expanders: |
| 1892 | # CONFIG_W1_SLAVE_DS2433_CRC is not set | 1524 | # |
| 1893 | # CONFIG_W1_SLAVE_DS2760 is not set | 1525 | # CONFIG_W1 is not set |
| 1894 | # CONFIG_POWER_SUPPLY is not set | 1526 | # CONFIG_POWER_SUPPLY is not set |
| 1895 | CONFIG_HWMON=y | 1527 | CONFIG_HWMON=y |
| 1896 | CONFIG_HWMON_VID=m | 1528 | CONFIG_HWMON_VID=m |
| 1897 | CONFIG_SENSORS_ABITUGURU=m | 1529 | # CONFIG_HWMON_DEBUG_CHIP is not set |
| 1898 | # CONFIG_SENSORS_ABITUGURU3 is not set | 1530 | |
| 1531 | # | ||
| 1532 | # Native drivers | ||
| 1533 | # | ||
| 1534 | # CONFIG_SENSORS_AD7414 is not set | ||
| 1899 | # CONFIG_SENSORS_AD7418 is not set | 1535 | # CONFIG_SENSORS_AD7418 is not set |
| 1900 | CONFIG_SENSORS_ADM1021=m | 1536 | CONFIG_SENSORS_ADM1021=m |
| 1901 | CONFIG_SENSORS_ADM1025=m | 1537 | CONFIG_SENSORS_ADM1025=m |
| @@ -1903,17 +1539,23 @@ CONFIG_SENSORS_ADM1026=m | |||
| 1903 | # CONFIG_SENSORS_ADM1029 is not set | 1539 | # CONFIG_SENSORS_ADM1029 is not set |
| 1904 | CONFIG_SENSORS_ADM1031=m | 1540 | CONFIG_SENSORS_ADM1031=m |
| 1905 | CONFIG_SENSORS_ADM9240=m | 1541 | CONFIG_SENSORS_ADM9240=m |
| 1906 | CONFIG_SENSORS_ASB100=m | 1542 | # CONFIG_SENSORS_ADT7411 is not set |
| 1543 | # CONFIG_SENSORS_ADT7462 is not set | ||
| 1544 | # CONFIG_SENSORS_ADT7470 is not set | ||
| 1545 | # CONFIG_SENSORS_ADT7475 is not set | ||
| 1546 | # CONFIG_SENSORS_ASC7621 is not set | ||
| 1907 | CONFIG_SENSORS_ATXP1=m | 1547 | CONFIG_SENSORS_ATXP1=m |
| 1908 | CONFIG_SENSORS_DS1621=m | 1548 | CONFIG_SENSORS_DS1621=m |
| 1549 | # CONFIG_SENSORS_I5K_AMB is not set | ||
| 1909 | CONFIG_SENSORS_F71805F=m | 1550 | CONFIG_SENSORS_F71805F=m |
| 1910 | CONFIG_SENSORS_FSCHER=m | 1551 | # CONFIG_SENSORS_F71882FG is not set |
| 1911 | CONFIG_SENSORS_FSCPOS=m | 1552 | # CONFIG_SENSORS_F75375S is not set |
| 1553 | # CONFIG_SENSORS_G760A is not set | ||
| 1912 | CONFIG_SENSORS_GL518SM=m | 1554 | CONFIG_SENSORS_GL518SM=m |
| 1913 | CONFIG_SENSORS_GL520SM=m | 1555 | CONFIG_SENSORS_GL520SM=m |
| 1914 | CONFIG_SENSORS_IT87=m | 1556 | CONFIG_SENSORS_IT87=m |
| 1915 | CONFIG_SENSORS_LM63=m | 1557 | CONFIG_SENSORS_LM63=m |
| 1916 | CONFIG_SENSORS_LM70=m | 1558 | # CONFIG_SENSORS_LM73 is not set |
| 1917 | CONFIG_SENSORS_LM75=m | 1559 | CONFIG_SENSORS_LM75=m |
| 1918 | CONFIG_SENSORS_LM77=m | 1560 | CONFIG_SENSORS_LM77=m |
| 1919 | CONFIG_SENSORS_LM78=m | 1561 | CONFIG_SENSORS_LM78=m |
| @@ -1924,16 +1566,25 @@ CONFIG_SENSORS_LM87=m | |||
| 1924 | CONFIG_SENSORS_LM90=m | 1566 | CONFIG_SENSORS_LM90=m |
| 1925 | CONFIG_SENSORS_LM92=m | 1567 | CONFIG_SENSORS_LM92=m |
| 1926 | # CONFIG_SENSORS_LM93 is not set | 1568 | # CONFIG_SENSORS_LM93 is not set |
| 1569 | # CONFIG_SENSORS_LTC4215 is not set | ||
| 1570 | # CONFIG_SENSORS_LTC4245 is not set | ||
| 1571 | # CONFIG_SENSORS_LM95241 is not set | ||
| 1927 | CONFIG_SENSORS_MAX1619=m | 1572 | CONFIG_SENSORS_MAX1619=m |
| 1928 | # CONFIG_SENSORS_MAX6650 is not set | 1573 | # CONFIG_SENSORS_MAX6650 is not set |
| 1929 | CONFIG_SENSORS_PC87360=m | 1574 | CONFIG_SENSORS_PC87360=m |
| 1930 | # CONFIG_SENSORS_PC87427 is not set | 1575 | # CONFIG_SENSORS_PC87427 is not set |
| 1576 | CONFIG_SENSORS_PCF8591=m | ||
| 1577 | # CONFIG_SENSORS_SHT15 is not set | ||
| 1931 | CONFIG_SENSORS_SIS5595=m | 1578 | CONFIG_SENSORS_SIS5595=m |
| 1932 | # CONFIG_SENSORS_DME1737 is not set | 1579 | # CONFIG_SENSORS_DME1737 is not set |
| 1933 | CONFIG_SENSORS_SMSC47M1=m | 1580 | CONFIG_SENSORS_SMSC47M1=m |
| 1934 | CONFIG_SENSORS_SMSC47M192=m | 1581 | CONFIG_SENSORS_SMSC47M192=m |
| 1935 | CONFIG_SENSORS_SMSC47B397=m | 1582 | CONFIG_SENSORS_SMSC47B397=m |
| 1583 | # CONFIG_SENSORS_ADS7828 is not set | ||
| 1584 | # CONFIG_SENSORS_AMC6821 is not set | ||
| 1936 | # CONFIG_SENSORS_THMC50 is not set | 1585 | # CONFIG_SENSORS_THMC50 is not set |
| 1586 | # CONFIG_SENSORS_TMP401 is not set | ||
| 1587 | # CONFIG_SENSORS_TMP421 is not set | ||
| 1937 | CONFIG_SENSORS_VIA686A=m | 1588 | CONFIG_SENSORS_VIA686A=m |
| 1938 | CONFIG_SENSORS_VT1211=m | 1589 | CONFIG_SENSORS_VT1211=m |
| 1939 | CONFIG_SENSORS_VT8231=m | 1590 | CONFIG_SENSORS_VT8231=m |
| @@ -1942,370 +1593,94 @@ CONFIG_SENSORS_W83791D=m | |||
| 1942 | CONFIG_SENSORS_W83792D=m | 1593 | CONFIG_SENSORS_W83792D=m |
| 1943 | # CONFIG_SENSORS_W83793 is not set | 1594 | # CONFIG_SENSORS_W83793 is not set |
| 1944 | CONFIG_SENSORS_W83L785TS=m | 1595 | CONFIG_SENSORS_W83L785TS=m |
| 1596 | # CONFIG_SENSORS_W83L786NG is not set | ||
| 1945 | CONFIG_SENSORS_W83627HF=m | 1597 | CONFIG_SENSORS_W83627HF=m |
| 1946 | CONFIG_SENSORS_W83627EHF=m | 1598 | CONFIG_SENSORS_W83627EHF=m |
| 1947 | # CONFIG_HWMON_DEBUG_CHIP is not set | 1599 | # CONFIG_SENSORS_LIS3_I2C is not set |
| 1948 | 1600 | # CONFIG_THERMAL is not set | |
| 1949 | # | 1601 | CONFIG_WATCHDOG=y |
| 1950 | # Multifunction device drivers | 1602 | CONFIG_WATCHDOG_NOWAYOUT=y |
| 1951 | # | ||
| 1952 | # CONFIG_MFD_SM501 is not set | ||
| 1953 | |||
| 1954 | # | ||
| 1955 | # Multimedia devices | ||
| 1956 | # | ||
| 1957 | CONFIG_VIDEO_DEV=m | ||
| 1958 | CONFIG_VIDEO_V4L1=y | ||
| 1959 | CONFIG_VIDEO_V4L1_COMPAT=y | ||
| 1960 | CONFIG_VIDEO_V4L2=y | ||
| 1961 | CONFIG_VIDEO_CAPTURE_DRIVERS=y | ||
| 1962 | # CONFIG_VIDEO_ADV_DEBUG is not set | ||
| 1963 | CONFIG_VIDEO_HELPER_CHIPS_AUTO=y | ||
| 1964 | CONFIG_VIDEO_TVAUDIO=m | ||
| 1965 | CONFIG_VIDEO_TDA7432=m | ||
| 1966 | CONFIG_VIDEO_TDA9840=m | ||
| 1967 | CONFIG_VIDEO_TDA9875=m | ||
| 1968 | CONFIG_VIDEO_TEA6415C=m | ||
| 1969 | CONFIG_VIDEO_TEA6420=m | ||
| 1970 | CONFIG_VIDEO_MSP3400=m | ||
| 1971 | CONFIG_VIDEO_WM8775=m | ||
| 1972 | CONFIG_VIDEO_BT819=m | ||
| 1973 | CONFIG_VIDEO_BT856=m | ||
| 1974 | CONFIG_VIDEO_KS0127=m | ||
| 1975 | CONFIG_VIDEO_SAA7110=m | ||
| 1976 | CONFIG_VIDEO_SAA7111=m | ||
| 1977 | CONFIG_VIDEO_SAA7114=m | ||
| 1978 | CONFIG_VIDEO_SAA711X=m | ||
| 1979 | CONFIG_VIDEO_TVP5150=m | ||
| 1980 | CONFIG_VIDEO_VPX3220=m | ||
| 1981 | CONFIG_VIDEO_CX25840=m | ||
| 1982 | CONFIG_VIDEO_CX2341X=m | ||
| 1983 | CONFIG_VIDEO_SAA7185=m | ||
| 1984 | CONFIG_VIDEO_ADV7170=m | ||
| 1985 | CONFIG_VIDEO_ADV7175=m | ||
| 1986 | CONFIG_VIDEO_VIVI=m | ||
| 1987 | CONFIG_VIDEO_BT848=m | ||
| 1988 | CONFIG_VIDEO_BT848_DVB=y | ||
| 1989 | CONFIG_VIDEO_SAA6588=m | ||
| 1990 | CONFIG_VIDEO_BWQCAM=m | ||
| 1991 | CONFIG_VIDEO_CQCAM=m | ||
| 1992 | CONFIG_VIDEO_W9966=m | ||
| 1993 | CONFIG_VIDEO_CPIA=m | ||
| 1994 | CONFIG_VIDEO_CPIA_PP=m | ||
| 1995 | CONFIG_VIDEO_CPIA_USB=m | ||
| 1996 | CONFIG_VIDEO_CPIA2=m | ||
| 1997 | CONFIG_VIDEO_SAA5246A=m | ||
| 1998 | CONFIG_VIDEO_SAA5249=m | ||
| 1999 | CONFIG_TUNER_3036=m | ||
| 2000 | # CONFIG_TUNER_TEA5761 is not set | ||
| 2001 | CONFIG_VIDEO_STRADIS=m | ||
| 2002 | CONFIG_VIDEO_ZORAN_ZR36060=m | ||
| 2003 | CONFIG_VIDEO_ZORAN=m | ||
| 2004 | CONFIG_VIDEO_ZORAN_BUZ=m | ||
| 2005 | CONFIG_VIDEO_ZORAN_DC10=m | ||
| 2006 | CONFIG_VIDEO_ZORAN_DC30=m | ||
| 2007 | CONFIG_VIDEO_ZORAN_LML33=m | ||
| 2008 | CONFIG_VIDEO_ZORAN_LML33R10=m | ||
| 2009 | CONFIG_VIDEO_ZORAN_AVS6EYES=m | ||
| 2010 | CONFIG_VIDEO_SAA7134=m | ||
| 2011 | CONFIG_VIDEO_SAA7134_ALSA=m | ||
| 2012 | CONFIG_VIDEO_SAA7134_OSS=m | ||
| 2013 | CONFIG_VIDEO_SAA7134_DVB=m | ||
| 2014 | CONFIG_VIDEO_MXB=m | ||
| 2015 | CONFIG_VIDEO_DPC=m | ||
| 2016 | CONFIG_VIDEO_HEXIUM_ORION=m | ||
| 2017 | CONFIG_VIDEO_HEXIUM_GEMINI=m | ||
| 2018 | CONFIG_VIDEO_CX88=m | ||
| 2019 | CONFIG_VIDEO_CX88_ALSA=m | ||
| 2020 | CONFIG_VIDEO_CX88_BLACKBIRD=m | ||
| 2021 | CONFIG_VIDEO_CX88_DVB=m | ||
| 2022 | CONFIG_VIDEO_CX88_VP3054=m | ||
| 2023 | # CONFIG_VIDEO_IVTV is not set | ||
| 2024 | # CONFIG_VIDEO_CAFE_CCIC is not set | ||
| 2025 | CONFIG_V4L_USB_DRIVERS=y | ||
| 2026 | CONFIG_VIDEO_PVRUSB2=m | ||
| 2027 | CONFIG_VIDEO_PVRUSB2_29XXX=y | ||
| 2028 | CONFIG_VIDEO_PVRUSB2_24XXX=y | ||
| 2029 | CONFIG_VIDEO_PVRUSB2_SYSFS=y | ||
| 2030 | # CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set | ||
| 2031 | CONFIG_VIDEO_EM28XX=m | ||
| 2032 | # CONFIG_VIDEO_USBVISION is not set | ||
| 2033 | CONFIG_VIDEO_USBVIDEO=m | ||
| 2034 | CONFIG_USB_VICAM=m | ||
| 2035 | CONFIG_USB_IBMCAM=m | ||
| 2036 | CONFIG_USB_KONICAWC=m | ||
| 2037 | CONFIG_USB_QUICKCAM_MESSENGER=m | ||
| 2038 | CONFIG_USB_ET61X251=m | ||
| 2039 | CONFIG_VIDEO_OVCAMCHIP=m | ||
| 2040 | CONFIG_USB_W9968CF=m | ||
| 2041 | # CONFIG_USB_OV511 is not set | ||
| 2042 | CONFIG_USB_SE401=m | ||
| 2043 | CONFIG_USB_SN9C102=m | ||
| 2044 | CONFIG_USB_STV680=m | ||
| 2045 | CONFIG_USB_ZC0301=m | ||
| 2046 | CONFIG_USB_PWC=m | ||
| 2047 | # CONFIG_USB_PWC_DEBUG is not set | ||
| 2048 | # CONFIG_USB_ZR364XX is not set | ||
| 2049 | CONFIG_RADIO_ADAPTERS=y | ||
| 2050 | CONFIG_RADIO_GEMTEK_PCI=m | ||
| 2051 | CONFIG_RADIO_MAXIRADIO=m | ||
| 2052 | CONFIG_RADIO_MAESTRO=m | ||
| 2053 | CONFIG_USB_DSBR=m | ||
| 2054 | CONFIG_DVB_CORE=m | ||
| 2055 | CONFIG_DVB_CORE_ATTACH=y | ||
| 2056 | CONFIG_DVB_CAPTURE_DRIVERS=y | ||
| 2057 | |||
| 2058 | # | ||
| 2059 | # Supported SAA7146 based PCI Adapters | ||
| 2060 | # | ||
| 2061 | CONFIG_DVB_AV7110=m | ||
| 2062 | CONFIG_DVB_AV7110_OSD=y | ||
| 2063 | CONFIG_DVB_BUDGET=m | ||
| 2064 | CONFIG_DVB_BUDGET_CI=m | ||
| 2065 | CONFIG_DVB_BUDGET_AV=m | ||
| 2066 | CONFIG_DVB_BUDGET_PATCH=m | ||
| 2067 | |||
| 2068 | # | ||
| 2069 | # Supported USB Adapters | ||
| 2070 | # | ||
| 2071 | CONFIG_DVB_USB=m | ||
| 2072 | # CONFIG_DVB_USB_DEBUG is not set | ||
| 2073 | CONFIG_DVB_USB_A800=m | ||
| 2074 | CONFIG_DVB_USB_DIBUSB_MB=m | ||
| 2075 | CONFIG_DVB_USB_DIBUSB_MB_FAULTY=y | ||
| 2076 | CONFIG_DVB_USB_DIBUSB_MC=m | ||
| 2077 | CONFIG_DVB_USB_DIB0700=m | ||
| 2078 | CONFIG_DVB_USB_UMT_010=m | ||
| 2079 | CONFIG_DVB_USB_CXUSB=m | ||
| 2080 | # CONFIG_DVB_USB_M920X is not set | ||
| 2081 | # CONFIG_DVB_USB_GL861 is not set | ||
| 2082 | # CONFIG_DVB_USB_AU6610 is not set | ||
| 2083 | CONFIG_DVB_USB_DIGITV=m | ||
| 2084 | CONFIG_DVB_USB_VP7045=m | ||
| 2085 | CONFIG_DVB_USB_VP702X=m | ||
| 2086 | CONFIG_DVB_USB_GP8PSK=m | ||
| 2087 | CONFIG_DVB_USB_NOVA_T_USB2=m | ||
| 2088 | # CONFIG_DVB_USB_TTUSB2 is not set | ||
| 2089 | CONFIG_DVB_USB_DTT200U=m | ||
| 2090 | # CONFIG_DVB_USB_OPERA1 is not set | ||
| 2091 | # CONFIG_DVB_USB_AF9005 is not set | ||
| 2092 | CONFIG_DVB_TTUSB_BUDGET=m | ||
| 2093 | CONFIG_DVB_TTUSB_DEC=m | ||
| 2094 | CONFIG_DVB_CINERGYT2=m | ||
| 2095 | CONFIG_DVB_CINERGYT2_TUNING=y | ||
| 2096 | CONFIG_DVB_CINERGYT2_STREAM_URB_COUNT=32 | ||
| 2097 | CONFIG_DVB_CINERGYT2_STREAM_BUF_SIZE=512 | ||
| 2098 | CONFIG_DVB_CINERGYT2_QUERY_INTERVAL=250 | ||
| 2099 | CONFIG_DVB_CINERGYT2_ENABLE_RC_INPUT_DEVICE=y | ||
| 2100 | CONFIG_DVB_CINERGYT2_RC_QUERY_INTERVAL=100 | ||
| 2101 | |||
| 2102 | # | ||
| 2103 | # Supported FlexCopII (B2C2) Adapters | ||
| 2104 | # | ||
| 2105 | CONFIG_DVB_B2C2_FLEXCOP=m | ||
| 2106 | CONFIG_DVB_B2C2_FLEXCOP_PCI=m | ||
| 2107 | CONFIG_DVB_B2C2_FLEXCOP_USB=m | ||
| 2108 | # CONFIG_DVB_B2C2_FLEXCOP_DEBUG is not set | ||
| 2109 | |||
| 2110 | # | ||
| 2111 | # Supported BT878 Adapters | ||
| 2112 | # | ||
| 2113 | CONFIG_DVB_BT8XX=m | ||
| 2114 | |||
| 2115 | # | ||
| 2116 | # Supported Pluto2 Adapters | ||
| 2117 | # | ||
| 2118 | CONFIG_DVB_PLUTO2=m | ||
| 2119 | |||
| 2120 | # | ||
| 2121 | # Supported DVB Frontends | ||
| 2122 | # | ||
| 2123 | |||
| 2124 | # | ||
| 2125 | # Customise DVB Frontends | ||
| 2126 | # | ||
| 2127 | # CONFIG_DVB_FE_CUSTOMISE is not set | ||
| 2128 | |||
| 2129 | # | ||
| 2130 | # DVB-S (satellite) frontends | ||
| 2131 | # | ||
| 2132 | CONFIG_DVB_STV0299=m | ||
| 2133 | CONFIG_DVB_CX24110=m | ||
| 2134 | CONFIG_DVB_CX24123=m | ||
| 2135 | CONFIG_DVB_TDA8083=m | ||
| 2136 | CONFIG_DVB_MT312=m | ||
| 2137 | CONFIG_DVB_VES1X93=m | ||
| 2138 | CONFIG_DVB_S5H1420=m | ||
| 2139 | CONFIG_DVB_TDA10086=m | ||
| 2140 | 1603 | ||
| 2141 | # | 1604 | # |
| 2142 | # DVB-T (terrestrial) frontends | 1605 | # Watchdog Device Drivers |
| 2143 | # | 1606 | # |
| 2144 | CONFIG_DVB_SP8870=m | 1607 | # CONFIG_SOFT_WATCHDOG is not set |
| 2145 | CONFIG_DVB_SP887X=m | 1608 | # CONFIG_ALIM7101_WDT is not set |
| 2146 | CONFIG_DVB_CX22700=m | 1609 | CONFIG_WDT_MTX1=y |
| 2147 | CONFIG_DVB_CX22702=m | ||
| 2148 | CONFIG_DVB_L64781=m | ||
| 2149 | CONFIG_DVB_TDA1004X=m | ||
| 2150 | CONFIG_DVB_NXT6000=m | ||
| 2151 | CONFIG_DVB_MT352=m | ||
| 2152 | CONFIG_DVB_ZL10353=m | ||
| 2153 | CONFIG_DVB_DIB3000MB=m | ||
| 2154 | CONFIG_DVB_DIB3000MC=m | ||
| 2155 | CONFIG_DVB_DIB7000M=m | ||
| 2156 | CONFIG_DVB_DIB7000P=m | ||
| 2157 | 1610 | ||
| 2158 | # | 1611 | # |
| 2159 | # DVB-C (cable) frontends | 1612 | # PCI-based Watchdog Cards |
| 2160 | # | 1613 | # |
| 2161 | CONFIG_DVB_VES1820=m | 1614 | # CONFIG_PCIPCWATCHDOG is not set |
| 2162 | CONFIG_DVB_TDA10021=m | 1615 | # CONFIG_WDTPCI is not set |
| 2163 | CONFIG_DVB_TDA10023=m | ||
| 2164 | CONFIG_DVB_STV0297=m | ||
| 2165 | 1616 | ||
| 2166 | # | 1617 | # |
| 2167 | # ATSC (North American/Korean Terrestrial/Cable DTV) frontends | 1618 | # USB-based Watchdog Cards |
| 2168 | # | 1619 | # |
| 2169 | CONFIG_DVB_NXT200X=m | 1620 | # CONFIG_USBPCWATCHDOG is not set |
| 2170 | CONFIG_DVB_OR51211=m | 1621 | CONFIG_SSB_POSSIBLE=y |
| 2171 | CONFIG_DVB_OR51132=m | ||
| 2172 | CONFIG_DVB_BCM3510=m | ||
| 2173 | CONFIG_DVB_LGDT330X=m | ||
| 2174 | 1622 | ||
| 2175 | # | 1623 | # |
| 2176 | # Tuners/PLL support | 1624 | # Sonics Silicon Backplane |
| 2177 | # | 1625 | # |
| 2178 | CONFIG_DVB_PLL=m | 1626 | CONFIG_SSB=m |
| 2179 | CONFIG_DVB_TDA826X=m | 1627 | CONFIG_SSB_SPROM=y |
| 2180 | CONFIG_DVB_TDA827X=m | 1628 | CONFIG_SSB_PCIHOST_POSSIBLE=y |
| 2181 | # CONFIG_DVB_TUNER_QT1010 is not set | 1629 | CONFIG_SSB_PCIHOST=y |
| 2182 | CONFIG_DVB_TUNER_MT2060=m | 1630 | # CONFIG_SSB_B43_PCI_BRIDGE is not set |
| 1631 | CONFIG_SSB_PCMCIAHOST_POSSIBLE=y | ||
| 1632 | # CONFIG_SSB_PCMCIAHOST is not set | ||
| 1633 | CONFIG_SSB_SDIOHOST_POSSIBLE=y | ||
| 1634 | # CONFIG_SSB_SDIOHOST is not set | ||
| 1635 | # CONFIG_SSB_SILENT is not set | ||
| 1636 | # CONFIG_SSB_DEBUG is not set | ||
| 1637 | CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y | ||
| 1638 | CONFIG_SSB_DRIVER_PCICORE=y | ||
| 1639 | # CONFIG_SSB_DRIVER_MIPS is not set | ||
| 2183 | 1640 | ||
| 2184 | # | 1641 | # |
| 2185 | # Miscellaneous devices | 1642 | # Multifunction device drivers |
| 2186 | # | 1643 | # |
| 2187 | CONFIG_DVB_LNBP21=m | 1644 | # CONFIG_MFD_CORE is not set |
| 2188 | CONFIG_DVB_ISL6421=m | 1645 | # CONFIG_MFD_SM501 is not set |
| 2189 | CONFIG_DVB_TUA6100=m | 1646 | # CONFIG_HTC_PASIC3 is not set |
| 2190 | CONFIG_VIDEO_SAA7146=m | 1647 | # CONFIG_UCB1400_CORE is not set |
| 2191 | CONFIG_VIDEO_SAA7146_VV=m | 1648 | # CONFIG_TPS65010 is not set |
| 2192 | CONFIG_VIDEO_TUNER=m | 1649 | # CONFIG_MFD_TMIO is not set |
| 2193 | CONFIG_VIDEO_BUF=m | 1650 | # CONFIG_MFD_WM8400 is not set |
| 2194 | CONFIG_VIDEO_BUF_DVB=m | 1651 | # CONFIG_MFD_WM8994 is not set |
| 2195 | CONFIG_VIDEO_BTCX=m | 1652 | # CONFIG_MFD_PCF50633 is not set |
| 2196 | CONFIG_VIDEO_IR_I2C=m | 1653 | # CONFIG_MFD_TIMBERDALE is not set |
| 2197 | CONFIG_VIDEO_IR=m | 1654 | # CONFIG_LPC_SCH is not set |
| 2198 | CONFIG_VIDEO_TVEEPROM=m | 1655 | # CONFIG_REGULATOR is not set |
| 2199 | CONFIG_DAB=y | 1656 | # CONFIG_MEDIA_SUPPORT is not set |
| 2200 | CONFIG_USB_DABUSB=m | ||
| 2201 | 1657 | ||
| 2202 | # | 1658 | # |
| 2203 | # Graphics support | 1659 | # Graphics support |
| 2204 | # | 1660 | # |
| 1661 | # CONFIG_VGA_ARB is not set | ||
| 1662 | # CONFIG_DRM is not set | ||
| 1663 | # CONFIG_VGASTATE is not set | ||
| 1664 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
| 1665 | # CONFIG_FB is not set | ||
| 2205 | CONFIG_BACKLIGHT_LCD_SUPPORT=y | 1666 | CONFIG_BACKLIGHT_LCD_SUPPORT=y |
| 2206 | CONFIG_LCD_CLASS_DEVICE=m | 1667 | # CONFIG_LCD_CLASS_DEVICE is not set |
| 2207 | CONFIG_BACKLIGHT_CLASS_DEVICE=y | 1668 | CONFIG_BACKLIGHT_CLASS_DEVICE=y |
| 1669 | # CONFIG_BACKLIGHT_GENERIC is not set | ||
| 2208 | 1670 | ||
| 2209 | # | 1671 | # |
| 2210 | # Display device support | 1672 | # Display device support |
| 2211 | # | 1673 | # |
| 2212 | # CONFIG_DISPLAY_SUPPORT is not set | 1674 | # CONFIG_DISPLAY_SUPPORT is not set |
| 2213 | CONFIG_VGASTATE=m | ||
| 2214 | CONFIG_VIDEO_OUTPUT_CONTROL=m | ||
| 2215 | CONFIG_FB=y | ||
| 2216 | CONFIG_FIRMWARE_EDID=y | ||
| 2217 | CONFIG_FB_DDC=m | ||
| 2218 | CONFIG_FB_CFB_FILLRECT=m | ||
| 2219 | CONFIG_FB_CFB_COPYAREA=m | ||
| 2220 | CONFIG_FB_CFB_IMAGEBLIT=m | ||
| 2221 | # CONFIG_FB_SYS_FILLRECT is not set | ||
| 2222 | # CONFIG_FB_SYS_COPYAREA is not set | ||
| 2223 | # CONFIG_FB_SYS_IMAGEBLIT is not set | ||
| 2224 | # CONFIG_FB_SYS_FOPS is not set | ||
| 2225 | CONFIG_FB_DEFERRED_IO=y | ||
| 2226 | # CONFIG_FB_SVGALIB is not set | ||
| 2227 | # CONFIG_FB_MACMODES is not set | ||
| 2228 | CONFIG_FB_BACKLIGHT=y | ||
| 2229 | CONFIG_FB_MODE_HELPERS=y | ||
| 2230 | CONFIG_FB_TILEBLITTING=y | ||
| 2231 | |||
| 2232 | # | ||
| 2233 | # Frame buffer hardware drivers | ||
| 2234 | # | ||
| 2235 | CONFIG_FB_CIRRUS=m | ||
| 2236 | CONFIG_FB_PM2=m | ||
| 2237 | CONFIG_FB_PM2_FIFO_DISCONNECT=y | ||
| 2238 | CONFIG_FB_CYBER2000=m | ||
| 2239 | # CONFIG_FB_ASILIANT is not set | ||
| 2240 | # CONFIG_FB_IMSTT is not set | ||
| 2241 | CONFIG_FB_S1D13XXX=m | ||
| 2242 | CONFIG_FB_NVIDIA=m | ||
| 2243 | CONFIG_FB_NVIDIA_I2C=y | ||
| 2244 | # CONFIG_FB_NVIDIA_DEBUG is not set | ||
| 2245 | CONFIG_FB_NVIDIA_BACKLIGHT=y | ||
| 2246 | CONFIG_FB_RIVA=m | ||
| 2247 | CONFIG_FB_RIVA_I2C=y | ||
| 2248 | # CONFIG_FB_RIVA_DEBUG is not set | ||
| 2249 | CONFIG_FB_RIVA_BACKLIGHT=y | ||
| 2250 | CONFIG_FB_MATROX=m | ||
| 2251 | CONFIG_FB_MATROX_MILLENIUM=y | ||
| 2252 | CONFIG_FB_MATROX_MYSTIQUE=y | ||
| 2253 | CONFIG_FB_MATROX_G=y | ||
| 2254 | CONFIG_FB_MATROX_I2C=m | ||
| 2255 | CONFIG_FB_MATROX_MAVEN=m | ||
| 2256 | CONFIG_FB_MATROX_MULTIHEAD=y | ||
| 2257 | CONFIG_FB_RADEON=m | ||
| 2258 | CONFIG_FB_RADEON_I2C=y | ||
| 2259 | CONFIG_FB_RADEON_BACKLIGHT=y | ||
| 2260 | # CONFIG_FB_RADEON_DEBUG is not set | ||
| 2261 | CONFIG_FB_ATY128=m | ||
| 2262 | CONFIG_FB_ATY128_BACKLIGHT=y | ||
| 2263 | CONFIG_FB_ATY=m | ||
| 2264 | CONFIG_FB_ATY_CT=y | ||
| 2265 | CONFIG_FB_ATY_GENERIC_LCD=y | ||
| 2266 | CONFIG_FB_ATY_GX=y | ||
| 2267 | CONFIG_FB_ATY_BACKLIGHT=y | ||
| 2268 | # CONFIG_FB_S3 is not set | ||
| 2269 | CONFIG_FB_SAVAGE=m | ||
| 2270 | CONFIG_FB_SAVAGE_I2C=y | ||
| 2271 | CONFIG_FB_SAVAGE_ACCEL=y | ||
| 2272 | CONFIG_FB_SIS=m | ||
| 2273 | CONFIG_FB_SIS_300=y | ||
| 2274 | CONFIG_FB_SIS_315=y | ||
| 2275 | CONFIG_FB_NEOMAGIC=m | ||
| 2276 | CONFIG_FB_KYRO=m | ||
| 2277 | CONFIG_FB_3DFX=m | ||
| 2278 | # CONFIG_FB_3DFX_ACCEL is not set | ||
| 2279 | CONFIG_FB_VOODOO1=m | ||
| 2280 | # CONFIG_FB_VT8623 is not set | ||
| 2281 | CONFIG_FB_TRIDENT=m | ||
| 2282 | # CONFIG_FB_TRIDENT_ACCEL is not set | ||
| 2283 | # CONFIG_FB_ARK is not set | ||
| 2284 | # CONFIG_FB_PM3 is not set | ||
| 2285 | # CONFIG_FB_VIRTUAL is not set | ||
| 2286 | 1675 | ||
| 2287 | # | 1676 | # |
| 2288 | # Console display driver support | 1677 | # Console display driver support |
| 2289 | # | 1678 | # |
| 2290 | CONFIG_VGA_CONSOLE=y | 1679 | # CONFIG_VGA_CONSOLE is not set |
| 2291 | # CONFIG_VGACON_SOFT_SCROLLBACK is not set | ||
| 2292 | CONFIG_DUMMY_CONSOLE=y | 1680 | CONFIG_DUMMY_CONSOLE=y |
| 2293 | CONFIG_FRAMEBUFFER_CONSOLE=m | ||
| 2294 | # CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set | ||
| 2295 | # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set | ||
| 2296 | # CONFIG_FONTS is not set | ||
| 2297 | CONFIG_FONT_8x8=y | ||
| 2298 | CONFIG_FONT_8x16=y | ||
| 2299 | # CONFIG_LOGO is not set | ||
| 2300 | |||
| 2301 | # | ||
| 2302 | # Sound | ||
| 2303 | # | ||
| 2304 | CONFIG_SOUND=m | 1681 | CONFIG_SOUND=m |
| 2305 | 1682 | CONFIG_SOUND_OSS_CORE=y | |
| 2306 | # | 1683 | CONFIG_SOUND_OSS_CORE_PRECLAIM=y |
| 2307 | # Advanced Linux Sound Architecture | ||
| 2308 | # | ||
| 2309 | CONFIG_SND=m | 1684 | CONFIG_SND=m |
| 2310 | CONFIG_SND_TIMER=m | 1685 | CONFIG_SND_TIMER=m |
| 2311 | CONFIG_SND_PCM=m | 1686 | CONFIG_SND_PCM=m |
| @@ -2318,32 +1693,29 @@ CONFIG_SND_MIXER_OSS=m | |||
| 2318 | CONFIG_SND_PCM_OSS=m | 1693 | CONFIG_SND_PCM_OSS=m |
| 2319 | CONFIG_SND_PCM_OSS_PLUGINS=y | 1694 | CONFIG_SND_PCM_OSS_PLUGINS=y |
| 2320 | CONFIG_SND_SEQUENCER_OSS=y | 1695 | CONFIG_SND_SEQUENCER_OSS=y |
| 2321 | CONFIG_SND_RTCTIMER=m | ||
| 2322 | CONFIG_SND_SEQ_RTCTIMER_DEFAULT=y | ||
| 2323 | CONFIG_SND_DYNAMIC_MINORS=y | 1696 | CONFIG_SND_DYNAMIC_MINORS=y |
| 2324 | CONFIG_SND_SUPPORT_OLD_API=y | 1697 | CONFIG_SND_SUPPORT_OLD_API=y |
| 2325 | CONFIG_SND_VERBOSE_PROCFS=y | 1698 | CONFIG_SND_VERBOSE_PROCFS=y |
| 2326 | # CONFIG_SND_VERBOSE_PRINTK is not set | 1699 | # CONFIG_SND_VERBOSE_PRINTK is not set |
| 2327 | # CONFIG_SND_DEBUG is not set | 1700 | # CONFIG_SND_DEBUG is not set |
| 2328 | 1701 | CONFIG_SND_VMASTER=y | |
| 2329 | # | 1702 | CONFIG_SND_RAWMIDI_SEQ=m |
| 2330 | # Generic devices | 1703 | CONFIG_SND_OPL3_LIB_SEQ=m |
| 2331 | # | 1704 | # CONFIG_SND_OPL4_LIB_SEQ is not set |
| 1705 | # CONFIG_SND_SBAWE_SEQ is not set | ||
| 1706 | CONFIG_SND_EMU10K1_SEQ=m | ||
| 2332 | CONFIG_SND_MPU401_UART=m | 1707 | CONFIG_SND_MPU401_UART=m |
| 2333 | CONFIG_SND_OPL3_LIB=m | 1708 | CONFIG_SND_OPL3_LIB=m |
| 2334 | CONFIG_SND_VX_LIB=m | 1709 | CONFIG_SND_VX_LIB=m |
| 2335 | CONFIG_SND_AC97_CODEC=m | 1710 | CONFIG_SND_AC97_CODEC=m |
| 1711 | CONFIG_SND_DRIVERS=y | ||
| 2336 | CONFIG_SND_DUMMY=m | 1712 | CONFIG_SND_DUMMY=m |
| 2337 | CONFIG_SND_VIRMIDI=m | 1713 | CONFIG_SND_VIRMIDI=m |
| 2338 | CONFIG_SND_MTPAV=m | 1714 | CONFIG_SND_MTPAV=m |
| 2339 | CONFIG_SND_MTS64=m | ||
| 2340 | CONFIG_SND_SERIAL_U16550=m | 1715 | CONFIG_SND_SERIAL_U16550=m |
| 2341 | CONFIG_SND_MPU401=m | 1716 | CONFIG_SND_MPU401=m |
| 2342 | # CONFIG_SND_PORTMAN2X4 is not set | 1717 | # CONFIG_SND_AC97_POWER_SAVE is not set |
| 2343 | 1718 | CONFIG_SND_PCI=y | |
| 2344 | # | ||
| 2345 | # PCI devices | ||
| 2346 | # | ||
| 2347 | CONFIG_SND_AD1889=m | 1719 | CONFIG_SND_AD1889=m |
| 2348 | CONFIG_SND_ALS300=m | 1720 | CONFIG_SND_ALS300=m |
| 2349 | CONFIG_SND_ALI5451=m | 1721 | CONFIG_SND_ALI5451=m |
| @@ -2352,14 +1724,18 @@ CONFIG_SND_ATIIXP_MODEM=m | |||
| 2352 | CONFIG_SND_AU8810=m | 1724 | CONFIG_SND_AU8810=m |
| 2353 | CONFIG_SND_AU8820=m | 1725 | CONFIG_SND_AU8820=m |
| 2354 | CONFIG_SND_AU8830=m | 1726 | CONFIG_SND_AU8830=m |
| 1727 | # CONFIG_SND_AW2 is not set | ||
| 2355 | CONFIG_SND_AZT3328=m | 1728 | CONFIG_SND_AZT3328=m |
| 2356 | CONFIG_SND_BT87X=m | 1729 | CONFIG_SND_BT87X=m |
| 2357 | # CONFIG_SND_BT87X_OVERCLOCK is not set | 1730 | # CONFIG_SND_BT87X_OVERCLOCK is not set |
| 2358 | CONFIG_SND_CA0106=m | 1731 | CONFIG_SND_CA0106=m |
| 2359 | CONFIG_SND_CMIPCI=m | 1732 | CONFIG_SND_CMIPCI=m |
| 1733 | # CONFIG_SND_OXYGEN is not set | ||
| 2360 | CONFIG_SND_CS4281=m | 1734 | CONFIG_SND_CS4281=m |
| 2361 | CONFIG_SND_CS46XX=m | 1735 | CONFIG_SND_CS46XX=m |
| 2362 | CONFIG_SND_CS46XX_NEW_DSP=y | 1736 | CONFIG_SND_CS46XX_NEW_DSP=y |
| 1737 | # CONFIG_SND_CS5535AUDIO is not set | ||
| 1738 | # CONFIG_SND_CTXFI is not set | ||
| 2363 | CONFIG_SND_DARLA20=m | 1739 | CONFIG_SND_DARLA20=m |
| 2364 | CONFIG_SND_GINA20=m | 1740 | CONFIG_SND_GINA20=m |
| 2365 | CONFIG_SND_LAYLA20=m | 1741 | CONFIG_SND_LAYLA20=m |
| @@ -2372,6 +1748,8 @@ CONFIG_SND_ECHO3G=m | |||
| 2372 | CONFIG_SND_INDIGO=m | 1748 | CONFIG_SND_INDIGO=m |
| 2373 | CONFIG_SND_INDIGOIO=m | 1749 | CONFIG_SND_INDIGOIO=m |
| 2374 | CONFIG_SND_INDIGODJ=m | 1750 | CONFIG_SND_INDIGODJ=m |
| 1751 | # CONFIG_SND_INDIGOIOX is not set | ||
| 1752 | # CONFIG_SND_INDIGODJX is not set | ||
| 2375 | CONFIG_SND_EMU10K1=m | 1753 | CONFIG_SND_EMU10K1=m |
| 2376 | CONFIG_SND_EMU10K1X=m | 1754 | CONFIG_SND_EMU10K1X=m |
| 2377 | CONFIG_SND_ENS1370=m | 1755 | CONFIG_SND_ENS1370=m |
| @@ -2379,19 +1757,36 @@ CONFIG_SND_ENS1371=m | |||
| 2379 | CONFIG_SND_ES1938=m | 1757 | CONFIG_SND_ES1938=m |
| 2380 | CONFIG_SND_ES1968=m | 1758 | CONFIG_SND_ES1968=m |
| 2381 | CONFIG_SND_FM801=m | 1759 | CONFIG_SND_FM801=m |
| 2382 | CONFIG_SND_FM801_TEA575X_BOOL=y | ||
| 2383 | CONFIG_SND_FM801_TEA575X=m | ||
| 2384 | CONFIG_SND_HDA_INTEL=m | 1760 | CONFIG_SND_HDA_INTEL=m |
| 1761 | # CONFIG_SND_HDA_HWDEP is not set | ||
| 1762 | # CONFIG_SND_HDA_INPUT_BEEP is not set | ||
| 1763 | # CONFIG_SND_HDA_INPUT_JACK is not set | ||
| 1764 | # CONFIG_SND_HDA_PATCH_LOADER is not set | ||
| 1765 | CONFIG_SND_HDA_CODEC_REALTEK=y | ||
| 1766 | CONFIG_SND_HDA_CODEC_ANALOG=y | ||
| 1767 | CONFIG_SND_HDA_CODEC_SIGMATEL=y | ||
| 1768 | CONFIG_SND_HDA_CODEC_VIA=y | ||
| 1769 | CONFIG_SND_HDA_CODEC_ATIHDMI=y | ||
| 1770 | CONFIG_SND_HDA_CODEC_NVHDMI=y | ||
| 1771 | CONFIG_SND_HDA_CODEC_INTELHDMI=y | ||
| 1772 | CONFIG_SND_HDA_ELD=y | ||
| 1773 | CONFIG_SND_HDA_CODEC_CIRRUS=y | ||
| 1774 | CONFIG_SND_HDA_CODEC_CONEXANT=y | ||
| 1775 | CONFIG_SND_HDA_CODEC_CA0110=y | ||
| 1776 | CONFIG_SND_HDA_CODEC_CMEDIA=y | ||
| 1777 | CONFIG_SND_HDA_CODEC_SI3054=y | ||
| 1778 | CONFIG_SND_HDA_GENERIC=y | ||
| 1779 | # CONFIG_SND_HDA_POWER_SAVE is not set | ||
| 2385 | CONFIG_SND_HDSP=m | 1780 | CONFIG_SND_HDSP=m |
| 2386 | CONFIG_SND_HDSPM=m | 1781 | CONFIG_SND_HDSPM=m |
| 1782 | # CONFIG_SND_HIFIER is not set | ||
| 2387 | CONFIG_SND_ICE1712=m | 1783 | CONFIG_SND_ICE1712=m |
| 2388 | CONFIG_SND_ICE1724=m | 1784 | CONFIG_SND_ICE1724=m |
| 2389 | CONFIG_SND_INTEL8X0=m | 1785 | CONFIG_SND_INTEL8X0=m |
| 2390 | CONFIG_SND_INTEL8X0M=m | 1786 | CONFIG_SND_INTEL8X0M=m |
| 2391 | CONFIG_SND_KORG1212=m | 1787 | CONFIG_SND_KORG1212=m |
| 2392 | CONFIG_SND_KORG1212_FIRMWARE_IN_KERNEL=y | 1788 | # CONFIG_SND_LX6464ES is not set |
| 2393 | CONFIG_SND_MAESTRO3=m | 1789 | CONFIG_SND_MAESTRO3=m |
| 2394 | CONFIG_SND_MAESTRO3_FIRMWARE_IN_KERNEL=y | ||
| 2395 | CONFIG_SND_MIXART=m | 1790 | CONFIG_SND_MIXART=m |
| 2396 | CONFIG_SND_NM256=m | 1791 | CONFIG_SND_NM256=m |
| 2397 | CONFIG_SND_PCXHR=m | 1792 | CONFIG_SND_PCXHR=m |
| @@ -2403,55 +1798,30 @@ CONFIG_SND_SONICVIBES=m | |||
| 2403 | CONFIG_SND_TRIDENT=m | 1798 | CONFIG_SND_TRIDENT=m |
| 2404 | CONFIG_SND_VIA82XX=m | 1799 | CONFIG_SND_VIA82XX=m |
| 2405 | CONFIG_SND_VIA82XX_MODEM=m | 1800 | CONFIG_SND_VIA82XX_MODEM=m |
| 1801 | # CONFIG_SND_VIRTUOSO is not set | ||
| 2406 | CONFIG_SND_VX222=m | 1802 | CONFIG_SND_VX222=m |
| 2407 | CONFIG_SND_YMFPCI=m | 1803 | CONFIG_SND_YMFPCI=m |
| 2408 | CONFIG_SND_YMFPCI_FIRMWARE_IN_KERNEL=y | 1804 | CONFIG_SND_MIPS=y |
| 2409 | # CONFIG_SND_AC97_POWER_SAVE is not set | ||
| 2410 | |||
| 2411 | # | ||
| 2412 | # ALSA MIPS devices | ||
| 2413 | # | ||
| 2414 | # CONFIG_SND_AU1X00 is not set | 1805 | # CONFIG_SND_AU1X00 is not set |
| 2415 | 1806 | CONFIG_SND_USB=y | |
| 2416 | # | ||
| 2417 | # USB devices | ||
| 2418 | # | ||
| 2419 | CONFIG_SND_USB_AUDIO=m | 1807 | CONFIG_SND_USB_AUDIO=m |
| 1808 | # CONFIG_SND_USB_UA101 is not set | ||
| 2420 | # CONFIG_SND_USB_CAIAQ is not set | 1809 | # CONFIG_SND_USB_CAIAQ is not set |
| 2421 | 1810 | CONFIG_SND_PCMCIA=y | |
| 2422 | # | ||
| 2423 | # PCMCIA devices | ||
| 2424 | # | ||
| 2425 | CONFIG_SND_VXPOCKET=m | 1811 | CONFIG_SND_VXPOCKET=m |
| 2426 | CONFIG_SND_PDAUDIOCF=m | 1812 | CONFIG_SND_PDAUDIOCF=m |
| 2427 | |||
| 2428 | # | ||
| 2429 | # System on Chip audio support | ||
| 2430 | # | ||
| 2431 | # CONFIG_SND_SOC is not set | 1813 | # CONFIG_SND_SOC is not set |
| 2432 | |||
| 2433 | # | ||
| 2434 | # SoC Audio support for SuperH | ||
| 2435 | # | ||
| 2436 | |||
| 2437 | # | ||
| 2438 | # Open Sound System | ||
| 2439 | # | ||
| 2440 | CONFIG_SOUND_PRIME=m | 1814 | CONFIG_SOUND_PRIME=m |
| 2441 | CONFIG_SOUND_TRIDENT=m | ||
| 2442 | # CONFIG_SOUND_MSNDCLAS is not set | ||
| 2443 | # CONFIG_SOUND_MSNDPIN is not set | ||
| 2444 | CONFIG_AC97_BUS=m | 1815 | CONFIG_AC97_BUS=m |
| 2445 | CONFIG_HID_SUPPORT=y | 1816 | CONFIG_HID_SUPPORT=y |
| 2446 | CONFIG_HID=y | 1817 | CONFIG_HID=y |
| 2447 | # CONFIG_HID_DEBUG is not set | 1818 | # CONFIG_HIDRAW is not set |
| 2448 | 1819 | ||
| 2449 | # | 1820 | # |
| 2450 | # USB Input Devices | 1821 | # USB Input Devices |
| 2451 | # | 1822 | # |
| 2452 | CONFIG_USB_HID=m | 1823 | CONFIG_USB_HID=m |
| 2453 | CONFIG_USB_HIDINPUT_POWERBOOK=y | 1824 | # CONFIG_HID_PID is not set |
| 2454 | # CONFIG_HID_FF is not set | ||
| 2455 | CONFIG_USB_HIDDEV=y | 1825 | CONFIG_USB_HIDDEV=y |
| 2456 | 1826 | ||
| 2457 | # | 1827 | # |
| @@ -2459,12 +1829,50 @@ CONFIG_USB_HIDDEV=y | |||
| 2459 | # | 1829 | # |
| 2460 | CONFIG_USB_KBD=m | 1830 | CONFIG_USB_KBD=m |
| 2461 | CONFIG_USB_MOUSE=m | 1831 | CONFIG_USB_MOUSE=m |
| 1832 | |||
| 1833 | # | ||
| 1834 | # Special HID drivers | ||
| 1835 | # | ||
| 1836 | # CONFIG_HID_3M_PCT is not set | ||
| 1837 | # CONFIG_HID_A4TECH is not set | ||
| 1838 | # CONFIG_HID_APPLE is not set | ||
| 1839 | # CONFIG_HID_BELKIN is not set | ||
| 1840 | # CONFIG_HID_CHERRY is not set | ||
| 1841 | # CONFIG_HID_CHICONY is not set | ||
| 1842 | # CONFIG_HID_CYPRESS is not set | ||
| 1843 | # CONFIG_HID_DRAGONRISE is not set | ||
| 1844 | # CONFIG_HID_EZKEY is not set | ||
| 1845 | # CONFIG_HID_KYE is not set | ||
| 1846 | # CONFIG_HID_GYRATION is not set | ||
| 1847 | # CONFIG_HID_TWINHAN is not set | ||
| 1848 | # CONFIG_HID_KENSINGTON is not set | ||
| 1849 | # CONFIG_HID_LOGITECH is not set | ||
| 1850 | # CONFIG_HID_MAGICMOUSE is not set | ||
| 1851 | # CONFIG_HID_MICROSOFT is not set | ||
| 1852 | # CONFIG_HID_MOSART is not set | ||
| 1853 | # CONFIG_HID_MONTEREY is not set | ||
| 1854 | # CONFIG_HID_NTRIG is not set | ||
| 1855 | # CONFIG_HID_ORTEK is not set | ||
| 1856 | # CONFIG_HID_PANTHERLORD is not set | ||
| 1857 | # CONFIG_HID_PETALYNX is not set | ||
| 1858 | # CONFIG_HID_QUANTA is not set | ||
| 1859 | # CONFIG_HID_SAMSUNG is not set | ||
| 1860 | # CONFIG_HID_SONY is not set | ||
| 1861 | # CONFIG_HID_STANTUM is not set | ||
| 1862 | # CONFIG_HID_SUNPLUS is not set | ||
| 1863 | # CONFIG_HID_GREENASIA is not set | ||
| 1864 | # CONFIG_HID_SMARTJOYPLUS is not set | ||
| 1865 | # CONFIG_HID_TOPSEED is not set | ||
| 1866 | # CONFIG_HID_THRUSTMASTER is not set | ||
| 1867 | # CONFIG_HID_WACOM is not set | ||
| 1868 | # CONFIG_HID_ZEROPLUS is not set | ||
| 2462 | CONFIG_USB_SUPPORT=y | 1869 | CONFIG_USB_SUPPORT=y |
| 2463 | CONFIG_USB_ARCH_HAS_HCD=y | 1870 | CONFIG_USB_ARCH_HAS_HCD=y |
| 2464 | CONFIG_USB_ARCH_HAS_OHCI=y | 1871 | CONFIG_USB_ARCH_HAS_OHCI=y |
| 2465 | CONFIG_USB_ARCH_HAS_EHCI=y | 1872 | CONFIG_USB_ARCH_HAS_EHCI=y |
| 2466 | CONFIG_USB=m | 1873 | CONFIG_USB=m |
| 2467 | # CONFIG_USB_DEBUG is not set | 1874 | # CONFIG_USB_DEBUG is not set |
| 1875 | # CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set | ||
| 2468 | 1876 | ||
| 2469 | # | 1877 | # |
| 2470 | # Miscellaneous USB options | 1878 | # Miscellaneous USB options |
| @@ -2472,19 +1880,27 @@ CONFIG_USB=m | |||
| 2472 | CONFIG_USB_DEVICEFS=y | 1880 | CONFIG_USB_DEVICEFS=y |
| 2473 | CONFIG_USB_DEVICE_CLASS=y | 1881 | CONFIG_USB_DEVICE_CLASS=y |
| 2474 | # CONFIG_USB_DYNAMIC_MINORS is not set | 1882 | # CONFIG_USB_DYNAMIC_MINORS is not set |
| 2475 | CONFIG_USB_SUSPEND=y | ||
| 2476 | # CONFIG_USB_PERSIST is not set | ||
| 2477 | # CONFIG_USB_OTG is not set | 1883 | # CONFIG_USB_OTG is not set |
| 1884 | # CONFIG_USB_OTG_WHITELIST is not set | ||
| 1885 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set | ||
| 1886 | CONFIG_USB_MON=m | ||
| 1887 | # CONFIG_USB_WUSB is not set | ||
| 1888 | # CONFIG_USB_WUSB_CBAF is not set | ||
| 2478 | 1889 | ||
| 2479 | # | 1890 | # |
| 2480 | # USB Host Controller Drivers | 1891 | # USB Host Controller Drivers |
| 2481 | # | 1892 | # |
| 1893 | # CONFIG_USB_C67X00_HCD is not set | ||
| 1894 | # CONFIG_USB_XHCI_HCD is not set | ||
| 2482 | CONFIG_USB_EHCI_HCD=m | 1895 | CONFIG_USB_EHCI_HCD=m |
| 2483 | CONFIG_USB_EHCI_SPLIT_ISO=y | ||
| 2484 | CONFIG_USB_EHCI_ROOT_HUB_TT=y | 1896 | CONFIG_USB_EHCI_ROOT_HUB_TT=y |
| 2485 | CONFIG_USB_EHCI_TT_NEWSCHED=y | 1897 | CONFIG_USB_EHCI_TT_NEWSCHED=y |
| 1898 | # CONFIG_USB_OXU210HP_HCD is not set | ||
| 2486 | # CONFIG_USB_ISP116X_HCD is not set | 1899 | # CONFIG_USB_ISP116X_HCD is not set |
| 1900 | # CONFIG_USB_ISP1760_HCD is not set | ||
| 1901 | # CONFIG_USB_ISP1362_HCD is not set | ||
| 2487 | CONFIG_USB_OHCI_HCD=m | 1902 | CONFIG_USB_OHCI_HCD=m |
| 1903 | # CONFIG_USB_OHCI_HCD_SSB is not set | ||
| 2488 | # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set | 1904 | # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set |
| 2489 | # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set | 1905 | # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set |
| 2490 | CONFIG_USB_OHCI_LITTLE_ENDIAN=y | 1906 | CONFIG_USB_OHCI_LITTLE_ENDIAN=y |
| @@ -2493,32 +1909,38 @@ CONFIG_USB_U132_HCD=m | |||
| 2493 | CONFIG_USB_SL811_HCD=m | 1909 | CONFIG_USB_SL811_HCD=m |
| 2494 | CONFIG_USB_SL811_CS=m | 1910 | CONFIG_USB_SL811_CS=m |
| 2495 | # CONFIG_USB_R8A66597_HCD is not set | 1911 | # CONFIG_USB_R8A66597_HCD is not set |
| 1912 | # CONFIG_USB_WHCI_HCD is not set | ||
| 1913 | # CONFIG_USB_HWA_HCD is not set | ||
| 1914 | # CONFIG_USB_GADGET_MUSB_HDRC is not set | ||
| 2496 | 1915 | ||
| 2497 | # | 1916 | # |
| 2498 | # USB Device Class drivers | 1917 | # USB Device Class drivers |
| 2499 | # | 1918 | # |
| 2500 | CONFIG_USB_ACM=m | 1919 | CONFIG_USB_ACM=m |
| 2501 | CONFIG_USB_PRINTER=m | 1920 | CONFIG_USB_PRINTER=m |
| 1921 | # CONFIG_USB_WDM is not set | ||
| 1922 | # CONFIG_USB_TMC is not set | ||
| 2502 | 1923 | ||
| 2503 | # | 1924 | # |
| 2504 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | 1925 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may |
| 2505 | # | 1926 | # |
| 2506 | 1927 | ||
| 2507 | # | 1928 | # |
| 2508 | # may also be needed; see USB_STORAGE Help for more information | 1929 | # also be needed; see USB_STORAGE Help for more info |
| 2509 | # | 1930 | # |
| 2510 | CONFIG_USB_STORAGE=m | 1931 | CONFIG_USB_STORAGE=m |
| 2511 | # CONFIG_USB_STORAGE_DEBUG is not set | 1932 | # CONFIG_USB_STORAGE_DEBUG is not set |
| 2512 | CONFIG_USB_STORAGE_DATAFAB=y | 1933 | CONFIG_USB_STORAGE_DATAFAB=m |
| 2513 | CONFIG_USB_STORAGE_FREECOM=y | 1934 | CONFIG_USB_STORAGE_FREECOM=m |
| 2514 | CONFIG_USB_STORAGE_ISD200=y | 1935 | CONFIG_USB_STORAGE_ISD200=m |
| 2515 | CONFIG_USB_STORAGE_DPCM=y | 1936 | CONFIG_USB_STORAGE_USBAT=m |
| 2516 | CONFIG_USB_STORAGE_USBAT=y | 1937 | CONFIG_USB_STORAGE_SDDR09=m |
| 2517 | CONFIG_USB_STORAGE_SDDR09=y | 1938 | CONFIG_USB_STORAGE_SDDR55=m |
| 2518 | CONFIG_USB_STORAGE_SDDR55=y | 1939 | CONFIG_USB_STORAGE_JUMPSHOT=m |
| 2519 | CONFIG_USB_STORAGE_JUMPSHOT=y | 1940 | CONFIG_USB_STORAGE_ALAUDA=m |
| 2520 | CONFIG_USB_STORAGE_ALAUDA=y | 1941 | # CONFIG_USB_STORAGE_ONETOUCH is not set |
| 2521 | CONFIG_USB_STORAGE_KARMA=y | 1942 | CONFIG_USB_STORAGE_KARMA=m |
| 1943 | # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set | ||
| 2522 | CONFIG_USB_LIBUSUAL=y | 1944 | CONFIG_USB_LIBUSUAL=y |
| 2523 | 1945 | ||
| 2524 | # | 1946 | # |
| @@ -2526,25 +1948,20 @@ CONFIG_USB_LIBUSUAL=y | |||
| 2526 | # | 1948 | # |
| 2527 | CONFIG_USB_MDC800=m | 1949 | CONFIG_USB_MDC800=m |
| 2528 | CONFIG_USB_MICROTEK=m | 1950 | CONFIG_USB_MICROTEK=m |
| 2529 | CONFIG_USB_MON=y | ||
| 2530 | 1951 | ||
| 2531 | # | 1952 | # |
| 2532 | # USB port drivers | 1953 | # USB port drivers |
| 2533 | # | 1954 | # |
| 2534 | CONFIG_USB_USS720=m | ||
| 2535 | |||
| 2536 | # | ||
| 2537 | # USB Serial Converter support | ||
| 2538 | # | ||
| 2539 | CONFIG_USB_SERIAL=m | 1955 | CONFIG_USB_SERIAL=m |
| 1956 | CONFIG_USB_EZUSB=y | ||
| 2540 | CONFIG_USB_SERIAL_GENERIC=y | 1957 | CONFIG_USB_SERIAL_GENERIC=y |
| 2541 | CONFIG_USB_SERIAL_AIRCABLE=m | 1958 | CONFIG_USB_SERIAL_AIRCABLE=m |
| 2542 | CONFIG_USB_SERIAL_AIRPRIME=m | ||
| 2543 | CONFIG_USB_SERIAL_ARK3116=m | 1959 | CONFIG_USB_SERIAL_ARK3116=m |
| 2544 | CONFIG_USB_SERIAL_BELKIN=m | 1960 | CONFIG_USB_SERIAL_BELKIN=m |
| 1961 | # CONFIG_USB_SERIAL_CH341 is not set | ||
| 2545 | CONFIG_USB_SERIAL_WHITEHEAT=m | 1962 | CONFIG_USB_SERIAL_WHITEHEAT=m |
| 2546 | CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m | 1963 | CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m |
| 2547 | CONFIG_USB_SERIAL_CP2101=m | 1964 | # CONFIG_USB_SERIAL_CP210X is not set |
| 2548 | CONFIG_USB_SERIAL_CYPRESS_M8=m | 1965 | CONFIG_USB_SERIAL_CYPRESS_M8=m |
| 2549 | CONFIG_USB_SERIAL_EMPEG=m | 1966 | CONFIG_USB_SERIAL_EMPEG=m |
| 2550 | CONFIG_USB_SERIAL_FTDI_SIO=m | 1967 | CONFIG_USB_SERIAL_FTDI_SIO=m |
| @@ -2556,6 +1973,7 @@ CONFIG_USB_SERIAL_EDGEPORT=m | |||
| 2556 | CONFIG_USB_SERIAL_EDGEPORT_TI=m | 1973 | CONFIG_USB_SERIAL_EDGEPORT_TI=m |
| 2557 | CONFIG_USB_SERIAL_GARMIN=m | 1974 | CONFIG_USB_SERIAL_GARMIN=m |
| 2558 | CONFIG_USB_SERIAL_IPW=m | 1975 | CONFIG_USB_SERIAL_IPW=m |
| 1976 | # CONFIG_USB_SERIAL_IUU is not set | ||
| 2559 | CONFIG_USB_SERIAL_KEYSPAN_PDA=m | 1977 | CONFIG_USB_SERIAL_KEYSPAN_PDA=m |
| 2560 | CONFIG_USB_SERIAL_KEYSPAN=m | 1978 | CONFIG_USB_SERIAL_KEYSPAN=m |
| 2561 | # CONFIG_USB_SERIAL_KEYSPAN_MPR is not set | 1979 | # CONFIG_USB_SERIAL_KEYSPAN_MPR is not set |
| @@ -2575,20 +1993,27 @@ CONFIG_USB_SERIAL_KOBIL_SCT=m | |||
| 2575 | CONFIG_USB_SERIAL_MCT_U232=m | 1993 | CONFIG_USB_SERIAL_MCT_U232=m |
| 2576 | CONFIG_USB_SERIAL_MOS7720=m | 1994 | CONFIG_USB_SERIAL_MOS7720=m |
| 2577 | CONFIG_USB_SERIAL_MOS7840=m | 1995 | CONFIG_USB_SERIAL_MOS7840=m |
| 1996 | # CONFIG_USB_SERIAL_MOTOROLA is not set | ||
| 2578 | CONFIG_USB_SERIAL_NAVMAN=m | 1997 | CONFIG_USB_SERIAL_NAVMAN=m |
| 2579 | CONFIG_USB_SERIAL_PL2303=m | 1998 | CONFIG_USB_SERIAL_PL2303=m |
| 2580 | # CONFIG_USB_SERIAL_OTI6858 is not set | 1999 | # CONFIG_USB_SERIAL_OTI6858 is not set |
| 2000 | # CONFIG_USB_SERIAL_QCAUX is not set | ||
| 2001 | # CONFIG_USB_SERIAL_QUALCOMM is not set | ||
| 2002 | # CONFIG_USB_SERIAL_SPCP8X5 is not set | ||
| 2581 | CONFIG_USB_SERIAL_HP4X=m | 2003 | CONFIG_USB_SERIAL_HP4X=m |
| 2582 | CONFIG_USB_SERIAL_SAFE=m | 2004 | CONFIG_USB_SERIAL_SAFE=m |
| 2583 | # CONFIG_USB_SERIAL_SAFE_PADDED is not set | 2005 | # CONFIG_USB_SERIAL_SAFE_PADDED is not set |
| 2006 | # CONFIG_USB_SERIAL_SIEMENS_MPI is not set | ||
| 2584 | CONFIG_USB_SERIAL_SIERRAWIRELESS=m | 2007 | CONFIG_USB_SERIAL_SIERRAWIRELESS=m |
| 2008 | # CONFIG_USB_SERIAL_SYMBOL is not set | ||
| 2585 | CONFIG_USB_SERIAL_TI=m | 2009 | CONFIG_USB_SERIAL_TI=m |
| 2586 | CONFIG_USB_SERIAL_CYBERJACK=m | 2010 | CONFIG_USB_SERIAL_CYBERJACK=m |
| 2587 | CONFIG_USB_SERIAL_XIRCOM=m | 2011 | CONFIG_USB_SERIAL_XIRCOM=m |
| 2588 | CONFIG_USB_SERIAL_OPTION=m | 2012 | CONFIG_USB_SERIAL_OPTION=m |
| 2589 | CONFIG_USB_SERIAL_OMNINET=m | 2013 | CONFIG_USB_SERIAL_OMNINET=m |
| 2014 | # CONFIG_USB_SERIAL_OPTICON is not set | ||
| 2015 | # CONFIG_USB_SERIAL_VIVOPAY_SERIAL is not set | ||
| 2590 | # CONFIG_USB_SERIAL_DEBUG is not set | 2016 | # CONFIG_USB_SERIAL_DEBUG is not set |
| 2591 | CONFIG_USB_EZUSB=y | ||
| 2592 | 2017 | ||
| 2593 | # | 2018 | # |
| 2594 | # USB Miscellaneous drivers | 2019 | # USB Miscellaneous drivers |
| @@ -2596,18 +2021,13 @@ CONFIG_USB_EZUSB=y | |||
| 2596 | CONFIG_USB_EMI62=m | 2021 | CONFIG_USB_EMI62=m |
| 2597 | CONFIG_USB_EMI26=m | 2022 | CONFIG_USB_EMI26=m |
| 2598 | CONFIG_USB_ADUTUX=m | 2023 | CONFIG_USB_ADUTUX=m |
| 2599 | CONFIG_USB_AUERSWALD=m | 2024 | # CONFIG_USB_SEVSEG is not set |
| 2600 | CONFIG_USB_RIO500=m | 2025 | CONFIG_USB_RIO500=m |
| 2601 | CONFIG_USB_LEGOTOWER=m | 2026 | CONFIG_USB_LEGOTOWER=m |
| 2602 | CONFIG_USB_LCD=m | 2027 | CONFIG_USB_LCD=m |
| 2603 | # CONFIG_USB_BERRY_CHARGE is not set | ||
| 2604 | CONFIG_USB_LED=m | 2028 | CONFIG_USB_LED=m |
| 2605 | CONFIG_USB_CYPRESS_CY7C63=m | 2029 | CONFIG_USB_CYPRESS_CY7C63=m |
| 2606 | CONFIG_USB_CYTHERM=m | 2030 | CONFIG_USB_CYTHERM=m |
| 2607 | CONFIG_USB_PHIDGET=m | ||
| 2608 | CONFIG_USB_PHIDGETKIT=m | ||
| 2609 | CONFIG_USB_PHIDGETMOTORCONTROL=m | ||
| 2610 | CONFIG_USB_PHIDGETSERVO=m | ||
| 2611 | CONFIG_USB_IDMOUSE=m | 2031 | CONFIG_USB_IDMOUSE=m |
| 2612 | CONFIG_USB_FTDI_ELAN=m | 2032 | CONFIG_USB_FTDI_ELAN=m |
| 2613 | CONFIG_USB_APPLEDISPLAY=m | 2033 | CONFIG_USB_APPLEDISPLAY=m |
| @@ -2617,86 +2037,113 @@ CONFIG_USB_LD=m | |||
| 2617 | CONFIG_USB_TRANCEVIBRATOR=m | 2037 | CONFIG_USB_TRANCEVIBRATOR=m |
| 2618 | # CONFIG_USB_IOWARRIOR is not set | 2038 | # CONFIG_USB_IOWARRIOR is not set |
| 2619 | CONFIG_USB_TEST=m | 2039 | CONFIG_USB_TEST=m |
| 2620 | 2040 | # CONFIG_USB_ISIGHTFW is not set | |
| 2621 | # | ||
| 2622 | # USB DSL modem support | ||
| 2623 | # | ||
| 2624 | CONFIG_USB_ATM=m | 2041 | CONFIG_USB_ATM=m |
| 2625 | CONFIG_USB_SPEEDTOUCH=m | 2042 | CONFIG_USB_SPEEDTOUCH=m |
| 2626 | CONFIG_USB_CXACRU=m | 2043 | CONFIG_USB_CXACRU=m |
| 2627 | CONFIG_USB_UEAGLEATM=m | 2044 | CONFIG_USB_UEAGLEATM=m |
| 2628 | CONFIG_USB_XUSBATM=m | 2045 | CONFIG_USB_XUSBATM=m |
| 2629 | |||
| 2630 | # | ||
| 2631 | # USB Gadget Support | ||
| 2632 | # | ||
| 2633 | CONFIG_USB_GADGET=m | 2046 | CONFIG_USB_GADGET=m |
| 2634 | # CONFIG_USB_GADGET_DEBUG_FILES is not set | 2047 | # CONFIG_USB_GADGET_DEBUG_FILES is not set |
| 2048 | # CONFIG_USB_GADGET_DEBUG_FS is not set | ||
| 2049 | CONFIG_USB_GADGET_VBUS_DRAW=2 | ||
| 2635 | CONFIG_USB_GADGET_SELECTED=y | 2050 | CONFIG_USB_GADGET_SELECTED=y |
| 2636 | # CONFIG_USB_GADGET_AMD5536UDC is not set | 2051 | # CONFIG_USB_GADGET_AT91 is not set |
| 2052 | # CONFIG_USB_GADGET_ATMEL_USBA is not set | ||
| 2637 | # CONFIG_USB_GADGET_FSL_USB2 is not set | 2053 | # CONFIG_USB_GADGET_FSL_USB2 is not set |
| 2638 | CONFIG_USB_GADGET_NET2280=y | ||
| 2639 | CONFIG_USB_NET2280=m | ||
| 2640 | # CONFIG_USB_GADGET_PXA2XX is not set | ||
| 2641 | # CONFIG_USB_GADGET_M66592 is not set | ||
| 2642 | # CONFIG_USB_GADGET_GOKU is not set | ||
| 2643 | # CONFIG_USB_GADGET_LH7A40X is not set | 2054 | # CONFIG_USB_GADGET_LH7A40X is not set |
| 2644 | # CONFIG_USB_GADGET_OMAP is not set | 2055 | # CONFIG_USB_GADGET_OMAP is not set |
| 2056 | # CONFIG_USB_GADGET_PXA25X is not set | ||
| 2057 | # CONFIG_USB_GADGET_R8A66597 is not set | ||
| 2058 | # CONFIG_USB_GADGET_PXA27X is not set | ||
| 2059 | # CONFIG_USB_GADGET_S3C_HSOTG is not set | ||
| 2060 | # CONFIG_USB_GADGET_IMX is not set | ||
| 2645 | # CONFIG_USB_GADGET_S3C2410 is not set | 2061 | # CONFIG_USB_GADGET_S3C2410 is not set |
| 2646 | # CONFIG_USB_GADGET_AT91 is not set | 2062 | # CONFIG_USB_GADGET_M66592 is not set |
| 2063 | # CONFIG_USB_GADGET_AMD5536UDC is not set | ||
| 2064 | # CONFIG_USB_GADGET_FSL_QE is not set | ||
| 2065 | # CONFIG_USB_GADGET_CI13XXX is not set | ||
| 2066 | CONFIG_USB_GADGET_NET2280=y | ||
| 2067 | CONFIG_USB_NET2280=m | ||
| 2068 | # CONFIG_USB_GADGET_GOKU is not set | ||
| 2069 | # CONFIG_USB_GADGET_LANGWELL is not set | ||
| 2647 | # CONFIG_USB_GADGET_DUMMY_HCD is not set | 2070 | # CONFIG_USB_GADGET_DUMMY_HCD is not set |
| 2648 | CONFIG_USB_GADGET_DUALSPEED=y | 2071 | CONFIG_USB_GADGET_DUALSPEED=y |
| 2649 | CONFIG_USB_ZERO=m | 2072 | CONFIG_USB_ZERO=m |
| 2073 | # CONFIG_USB_AUDIO is not set | ||
| 2650 | CONFIG_USB_ETH=m | 2074 | CONFIG_USB_ETH=m |
| 2651 | CONFIG_USB_ETH_RNDIS=y | 2075 | CONFIG_USB_ETH_RNDIS=y |
| 2076 | # CONFIG_USB_ETH_EEM is not set | ||
| 2652 | CONFIG_USB_GADGETFS=m | 2077 | CONFIG_USB_GADGETFS=m |
| 2653 | CONFIG_USB_FILE_STORAGE=m | 2078 | CONFIG_USB_FILE_STORAGE=m |
| 2654 | # CONFIG_USB_FILE_STORAGE_TEST is not set | 2079 | # CONFIG_USB_FILE_STORAGE_TEST is not set |
| 2080 | # CONFIG_USB_MASS_STORAGE is not set | ||
| 2655 | CONFIG_USB_G_SERIAL=m | 2081 | CONFIG_USB_G_SERIAL=m |
| 2656 | CONFIG_USB_MIDI_GADGET=m | 2082 | CONFIG_USB_MIDI_GADGET=m |
| 2083 | # CONFIG_USB_G_PRINTER is not set | ||
| 2084 | # CONFIG_USB_CDC_COMPOSITE is not set | ||
| 2085 | # CONFIG_USB_G_NOKIA is not set | ||
| 2086 | # CONFIG_USB_G_MULTI is not set | ||
| 2087 | |||
| 2088 | # | ||
| 2089 | # OTG and related infrastructure | ||
| 2090 | # | ||
| 2091 | # CONFIG_USB_GPIO_VBUS is not set | ||
| 2092 | # CONFIG_NOP_USB_XCEIV is not set | ||
| 2093 | # CONFIG_UWB is not set | ||
| 2657 | CONFIG_MMC=m | 2094 | CONFIG_MMC=m |
| 2658 | # CONFIG_MMC_DEBUG is not set | 2095 | # CONFIG_MMC_DEBUG is not set |
| 2659 | # CONFIG_MMC_UNSAFE_RESUME is not set | 2096 | # CONFIG_MMC_UNSAFE_RESUME is not set |
| 2660 | 2097 | ||
| 2661 | # | 2098 | # |
| 2662 | # MMC/SD Card Drivers | 2099 | # MMC/SD/SDIO Card Drivers |
| 2663 | # | 2100 | # |
| 2664 | CONFIG_MMC_BLOCK=m | 2101 | CONFIG_MMC_BLOCK=m |
| 2665 | CONFIG_MMC_BLOCK_BOUNCE=y | 2102 | CONFIG_MMC_BLOCK_BOUNCE=y |
| 2103 | # CONFIG_SDIO_UART is not set | ||
| 2104 | # CONFIG_MMC_TEST is not set | ||
| 2666 | 2105 | ||
| 2667 | # | 2106 | # |
| 2668 | # MMC/SD Host Controller Drivers | 2107 | # MMC/SD/SDIO Host Controller Drivers |
| 2669 | # | 2108 | # |
| 2670 | CONFIG_MMC_SDHCI=m | 2109 | CONFIG_MMC_SDHCI=m |
| 2110 | # CONFIG_MMC_SDHCI_PCI is not set | ||
| 2111 | # CONFIG_MMC_SDHCI_PLTFM is not set | ||
| 2671 | CONFIG_MMC_TIFM_SD=m | 2112 | CONFIG_MMC_TIFM_SD=m |
| 2113 | # CONFIG_MMC_SDRICOH_CS is not set | ||
| 2114 | # CONFIG_MMC_CB710 is not set | ||
| 2115 | # CONFIG_MMC_VIA_SDMMC is not set | ||
| 2116 | # CONFIG_MEMSTICK is not set | ||
| 2672 | CONFIG_NEW_LEDS=y | 2117 | CONFIG_NEW_LEDS=y |
| 2673 | CONFIG_LEDS_CLASS=m | 2118 | CONFIG_LEDS_CLASS=y |
| 2674 | 2119 | ||
| 2675 | # | 2120 | # |
| 2676 | # LED drivers | 2121 | # LED drivers |
| 2677 | # | 2122 | # |
| 2123 | # CONFIG_LEDS_PCA9532 is not set | ||
| 2124 | CONFIG_LEDS_GPIO=y | ||
| 2125 | CONFIG_LEDS_GPIO_PLATFORM=y | ||
| 2126 | # CONFIG_LEDS_LP3944 is not set | ||
| 2127 | # CONFIG_LEDS_PCA955X is not set | ||
| 2128 | # CONFIG_LEDS_BD2802 is not set | ||
| 2129 | # CONFIG_LEDS_LT3593 is not set | ||
| 2130 | CONFIG_LEDS_TRIGGERS=y | ||
| 2678 | 2131 | ||
| 2679 | # | 2132 | # |
| 2680 | # LED Triggers | 2133 | # LED Triggers |
| 2681 | # | 2134 | # |
| 2682 | # CONFIG_LEDS_TRIGGERS is not set | 2135 | CONFIG_LEDS_TRIGGER_TIMER=y |
| 2683 | CONFIG_INFINIBAND=m | 2136 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y |
| 2684 | CONFIG_INFINIBAND_USER_MAD=m | 2137 | # CONFIG_LEDS_TRIGGER_BACKLIGHT is not set |
| 2685 | CONFIG_INFINIBAND_USER_ACCESS=m | 2138 | # CONFIG_LEDS_TRIGGER_GPIO is not set |
| 2686 | CONFIG_INFINIBAND_USER_MEM=y | 2139 | CONFIG_LEDS_TRIGGER_DEFAULT_ON=y |
| 2687 | CONFIG_INFINIBAND_ADDR_TRANS=y | 2140 | |
| 2688 | CONFIG_INFINIBAND_MTHCA=m | 2141 | # |
| 2689 | CONFIG_INFINIBAND_MTHCA_DEBUG=y | 2142 | # iptables trigger is under Netfilter config (LED target) |
| 2690 | CONFIG_INFINIBAND_AMSO1100=m | 2143 | # |
| 2691 | CONFIG_INFINIBAND_AMSO1100_DEBUG=y | 2144 | # CONFIG_ACCESSIBILITY is not set |
| 2692 | # CONFIG_MLX4_INFINIBAND is not set | 2145 | # CONFIG_INFINIBAND is not set |
| 2693 | CONFIG_INFINIBAND_IPOIB=m | 2146 | CONFIG_RTC_LIB=y |
| 2694 | # CONFIG_INFINIBAND_IPOIB_CM is not set | ||
| 2695 | CONFIG_INFINIBAND_IPOIB_DEBUG=y | ||
| 2696 | # CONFIG_INFINIBAND_IPOIB_DEBUG_DATA is not set | ||
| 2697 | CONFIG_INFINIBAND_SRP=m | ||
| 2698 | CONFIG_INFINIBAND_ISER=m | ||
| 2699 | CONFIG_RTC_LIB=m | ||
| 2700 | CONFIG_RTC_CLASS=m | 2147 | CONFIG_RTC_CLASS=m |
| 2701 | 2148 | ||
| 2702 | # | 2149 | # |
| @@ -2712,6 +2159,7 @@ CONFIG_RTC_DRV_TEST=m | |||
| 2712 | # I2C RTC drivers | 2159 | # I2C RTC drivers |
| 2713 | # | 2160 | # |
| 2714 | CONFIG_RTC_DRV_DS1307=m | 2161 | CONFIG_RTC_DRV_DS1307=m |
| 2162 | # CONFIG_RTC_DRV_DS1374 is not set | ||
| 2715 | CONFIG_RTC_DRV_DS1672=m | 2163 | CONFIG_RTC_DRV_DS1672=m |
| 2716 | # CONFIG_RTC_DRV_MAX6900 is not set | 2164 | # CONFIG_RTC_DRV_MAX6900 is not set |
| 2717 | CONFIG_RTC_DRV_RS5C372=m | 2165 | CONFIG_RTC_DRV_RS5C372=m |
| @@ -2720,48 +2168,45 @@ CONFIG_RTC_DRV_X1205=m | |||
| 2720 | CONFIG_RTC_DRV_PCF8563=m | 2168 | CONFIG_RTC_DRV_PCF8563=m |
| 2721 | CONFIG_RTC_DRV_PCF8583=m | 2169 | CONFIG_RTC_DRV_PCF8583=m |
| 2722 | # CONFIG_RTC_DRV_M41T80 is not set | 2170 | # CONFIG_RTC_DRV_M41T80 is not set |
| 2171 | # CONFIG_RTC_DRV_BQ32K is not set | ||
| 2172 | # CONFIG_RTC_DRV_S35390A is not set | ||
| 2173 | # CONFIG_RTC_DRV_FM3130 is not set | ||
| 2174 | # CONFIG_RTC_DRV_RX8581 is not set | ||
| 2175 | # CONFIG_RTC_DRV_RX8025 is not set | ||
| 2723 | 2176 | ||
| 2724 | # | 2177 | # |
| 2725 | # SPI RTC drivers | 2178 | # SPI RTC drivers |
| 2726 | # | 2179 | # |
| 2727 | CONFIG_RTC_DRV_RS5C348=m | ||
| 2728 | CONFIG_RTC_DRV_MAX6902=m | ||
| 2729 | 2180 | ||
| 2730 | # | 2181 | # |
| 2731 | # Platform RTC drivers | 2182 | # Platform RTC drivers |
| 2732 | # | 2183 | # |
| 2733 | # CONFIG_RTC_DRV_CMOS is not set | 2184 | # CONFIG_RTC_DRV_CMOS is not set |
| 2185 | # CONFIG_RTC_DRV_DS1286 is not set | ||
| 2186 | # CONFIG_RTC_DRV_DS1511 is not set | ||
| 2734 | CONFIG_RTC_DRV_DS1553=m | 2187 | CONFIG_RTC_DRV_DS1553=m |
| 2735 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
| 2736 | CONFIG_RTC_DRV_DS1742=m | 2188 | CONFIG_RTC_DRV_DS1742=m |
| 2189 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
| 2737 | CONFIG_RTC_DRV_M48T86=m | 2190 | CONFIG_RTC_DRV_M48T86=m |
| 2191 | # CONFIG_RTC_DRV_M48T35 is not set | ||
| 2738 | # CONFIG_RTC_DRV_M48T59 is not set | 2192 | # CONFIG_RTC_DRV_M48T59 is not set |
| 2193 | # CONFIG_RTC_DRV_MSM6242 is not set | ||
| 2194 | # CONFIG_RTC_DRV_BQ4802 is not set | ||
| 2195 | # CONFIG_RTC_DRV_RP5C01 is not set | ||
| 2739 | CONFIG_RTC_DRV_V3020=m | 2196 | CONFIG_RTC_DRV_V3020=m |
| 2740 | 2197 | ||
| 2741 | # | 2198 | # |
| 2742 | # on-CPU RTC drivers | 2199 | # on-CPU RTC drivers |
| 2743 | # | 2200 | # |
| 2744 | 2201 | # CONFIG_RTC_DRV_AU1XXX is not set | |
| 2745 | # | 2202 | # CONFIG_DMADEVICES is not set |
| 2746 | # DMA Engine support | ||
| 2747 | # | ||
| 2748 | CONFIG_DMA_ENGINE=y | ||
| 2749 | |||
| 2750 | # | ||
| 2751 | # DMA Clients | ||
| 2752 | # | ||
| 2753 | CONFIG_NET_DMA=y | ||
| 2754 | |||
| 2755 | # | ||
| 2756 | # DMA Devices | ||
| 2757 | # | ||
| 2758 | CONFIG_INTEL_IOATDMA=m | ||
| 2759 | # CONFIG_AUXDISPLAY is not set | 2203 | # CONFIG_AUXDISPLAY is not set |
| 2204 | # CONFIG_UIO is not set | ||
| 2760 | 2205 | ||
| 2761 | # | 2206 | # |
| 2762 | # Userspace I/O | 2207 | # TI VLYNQ |
| 2763 | # | 2208 | # |
| 2764 | # CONFIG_UIO is not set | 2209 | # CONFIG_STAGING is not set |
| 2765 | 2210 | ||
| 2766 | # | 2211 | # |
| 2767 | # File systems | 2212 | # File systems |
| @@ -2772,44 +2217,43 @@ CONFIG_EXT2_FS_POSIX_ACL=y | |||
| 2772 | CONFIG_EXT2_FS_SECURITY=y | 2217 | CONFIG_EXT2_FS_SECURITY=y |
| 2773 | # CONFIG_EXT2_FS_XIP is not set | 2218 | # CONFIG_EXT2_FS_XIP is not set |
| 2774 | CONFIG_EXT3_FS=m | 2219 | CONFIG_EXT3_FS=m |
| 2220 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 2775 | CONFIG_EXT3_FS_XATTR=y | 2221 | CONFIG_EXT3_FS_XATTR=y |
| 2776 | CONFIG_EXT3_FS_POSIX_ACL=y | 2222 | CONFIG_EXT3_FS_POSIX_ACL=y |
| 2777 | CONFIG_EXT3_FS_SECURITY=y | 2223 | CONFIG_EXT3_FS_SECURITY=y |
| 2778 | # CONFIG_EXT4DEV_FS is not set | 2224 | # CONFIG_EXT4_FS is not set |
| 2779 | CONFIG_JBD=m | 2225 | CONFIG_JBD=m |
| 2780 | # CONFIG_JBD_DEBUG is not set | 2226 | # CONFIG_JBD_DEBUG is not set |
| 2781 | CONFIG_FS_MBCACHE=m | 2227 | CONFIG_FS_MBCACHE=m |
| 2782 | CONFIG_REISERFS_FS=m | 2228 | # CONFIG_REISERFS_FS is not set |
| 2783 | # CONFIG_REISERFS_CHECK is not set | 2229 | # CONFIG_JFS_FS is not set |
| 2784 | # CONFIG_REISERFS_PROC_INFO is not set | ||
| 2785 | CONFIG_REISERFS_FS_XATTR=y | ||
| 2786 | CONFIG_REISERFS_FS_POSIX_ACL=y | ||
| 2787 | CONFIG_REISERFS_FS_SECURITY=y | ||
| 2788 | CONFIG_JFS_FS=m | ||
| 2789 | CONFIG_JFS_POSIX_ACL=y | ||
| 2790 | CONFIG_JFS_SECURITY=y | ||
| 2791 | # CONFIG_JFS_DEBUG is not set | ||
| 2792 | CONFIG_JFS_STATISTICS=y | ||
| 2793 | CONFIG_FS_POSIX_ACL=y | 2230 | CONFIG_FS_POSIX_ACL=y |
| 2794 | CONFIG_XFS_FS=m | 2231 | # CONFIG_XFS_FS is not set |
| 2795 | CONFIG_XFS_QUOTA=y | ||
| 2796 | CONFIG_XFS_SECURITY=y | ||
| 2797 | CONFIG_XFS_POSIX_ACL=y | ||
| 2798 | CONFIG_XFS_RT=y | ||
| 2799 | # CONFIG_GFS2_FS is not set | 2232 | # CONFIG_GFS2_FS is not set |
| 2800 | # CONFIG_OCFS2_FS is not set | 2233 | # CONFIG_OCFS2_FS is not set |
| 2801 | CONFIG_MINIX_FS=m | 2234 | # CONFIG_BTRFS_FS is not set |
| 2802 | CONFIG_ROMFS_FS=m | 2235 | # CONFIG_NILFS2_FS is not set |
| 2236 | CONFIG_FILE_LOCKING=y | ||
| 2237 | CONFIG_FSNOTIFY=y | ||
| 2238 | CONFIG_DNOTIFY=y | ||
| 2803 | CONFIG_INOTIFY=y | 2239 | CONFIG_INOTIFY=y |
| 2804 | CONFIG_INOTIFY_USER=y | 2240 | CONFIG_INOTIFY_USER=y |
| 2805 | CONFIG_QUOTA=y | 2241 | CONFIG_QUOTA=y |
| 2806 | CONFIG_QFMT_V1=m | 2242 | # CONFIG_QUOTA_NETLINK_INTERFACE is not set |
| 2807 | CONFIG_QFMT_V2=m | 2243 | CONFIG_PRINT_QUOTA_WARNING=y |
| 2244 | # CONFIG_QUOTA_DEBUG is not set | ||
| 2245 | # CONFIG_QFMT_V1 is not set | ||
| 2246 | # CONFIG_QFMT_V2 is not set | ||
| 2808 | CONFIG_QUOTACTL=y | 2247 | CONFIG_QUOTACTL=y |
| 2809 | CONFIG_DNOTIFY=y | 2248 | # CONFIG_AUTOFS_FS is not set |
| 2810 | CONFIG_AUTOFS_FS=m | 2249 | CONFIG_AUTOFS4_FS=y |
| 2811 | CONFIG_AUTOFS4_FS=m | ||
| 2812 | CONFIG_FUSE_FS=m | 2250 | CONFIG_FUSE_FS=m |
| 2251 | # CONFIG_CUSE is not set | ||
| 2252 | |||
| 2253 | # | ||
| 2254 | # Caches | ||
| 2255 | # | ||
| 2256 | # CONFIG_FSCACHE is not set | ||
| 2813 | 2257 | ||
| 2814 | # | 2258 | # |
| 2815 | # CD-ROM/DVD Filesystems | 2259 | # CD-ROM/DVD Filesystems |
| @@ -2838,73 +2282,79 @@ CONFIG_NTFS_FS=m | |||
| 2838 | CONFIG_PROC_FS=y | 2282 | CONFIG_PROC_FS=y |
| 2839 | CONFIG_PROC_KCORE=y | 2283 | CONFIG_PROC_KCORE=y |
| 2840 | CONFIG_PROC_SYSCTL=y | 2284 | CONFIG_PROC_SYSCTL=y |
| 2285 | CONFIG_PROC_PAGE_MONITOR=y | ||
| 2841 | CONFIG_SYSFS=y | 2286 | CONFIG_SYSFS=y |
| 2842 | CONFIG_TMPFS=y | 2287 | CONFIG_TMPFS=y |
| 2843 | # CONFIG_TMPFS_POSIX_ACL is not set | 2288 | # CONFIG_TMPFS_POSIX_ACL is not set |
| 2844 | # CONFIG_HUGETLB_PAGE is not set | 2289 | # CONFIG_HUGETLB_PAGE is not set |
| 2845 | CONFIG_RAMFS=y | ||
| 2846 | CONFIG_CONFIGFS_FS=m | 2290 | CONFIG_CONFIGFS_FS=m |
| 2847 | 2291 | CONFIG_MISC_FILESYSTEMS=y | |
| 2848 | # | 2292 | # CONFIG_ADFS_FS is not set |
| 2849 | # Miscellaneous filesystems | 2293 | # CONFIG_AFFS_FS is not set |
| 2850 | # | 2294 | # CONFIG_ECRYPT_FS is not set |
| 2851 | CONFIG_ADFS_FS=m | 2295 | # CONFIG_HFS_FS is not set |
| 2852 | # CONFIG_ADFS_FS_RW is not set | 2296 | # CONFIG_HFSPLUS_FS is not set |
| 2853 | CONFIG_AFFS_FS=m | 2297 | # CONFIG_BEFS_FS is not set |
| 2854 | CONFIG_ECRYPT_FS=m | 2298 | # CONFIG_BFS_FS is not set |
| 2855 | CONFIG_HFS_FS=m | 2299 | # CONFIG_EFS_FS is not set |
| 2856 | CONFIG_HFSPLUS_FS=m | 2300 | CONFIG_JFFS2_FS=y |
| 2857 | CONFIG_BEFS_FS=m | ||
| 2858 | # CONFIG_BEFS_DEBUG is not set | ||
| 2859 | CONFIG_BFS_FS=m | ||
| 2860 | CONFIG_EFS_FS=m | ||
| 2861 | CONFIG_JFFS2_FS=m | ||
| 2862 | CONFIG_JFFS2_FS_DEBUG=0 | 2301 | CONFIG_JFFS2_FS_DEBUG=0 |
| 2863 | CONFIG_JFFS2_FS_WRITEBUFFER=y | 2302 | CONFIG_JFFS2_FS_WRITEBUFFER=y |
| 2303 | # CONFIG_JFFS2_FS_WBUF_VERIFY is not set | ||
| 2864 | # CONFIG_JFFS2_SUMMARY is not set | 2304 | # CONFIG_JFFS2_SUMMARY is not set |
| 2865 | # CONFIG_JFFS2_FS_XATTR is not set | 2305 | CONFIG_JFFS2_FS_XATTR=y |
| 2866 | # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set | 2306 | CONFIG_JFFS2_FS_POSIX_ACL=y |
| 2307 | CONFIG_JFFS2_FS_SECURITY=y | ||
| 2308 | CONFIG_JFFS2_COMPRESSION_OPTIONS=y | ||
| 2867 | CONFIG_JFFS2_ZLIB=y | 2309 | CONFIG_JFFS2_ZLIB=y |
| 2310 | # CONFIG_JFFS2_LZO is not set | ||
| 2868 | CONFIG_JFFS2_RTIME=y | 2311 | CONFIG_JFFS2_RTIME=y |
| 2869 | # CONFIG_JFFS2_RUBIN is not set | 2312 | # CONFIG_JFFS2_RUBIN is not set |
| 2313 | # CONFIG_JFFS2_CMODE_NONE is not set | ||
| 2314 | CONFIG_JFFS2_CMODE_PRIORITY=y | ||
| 2315 | # CONFIG_JFFS2_CMODE_SIZE is not set | ||
| 2316 | # CONFIG_JFFS2_CMODE_FAVOURLZO is not set | ||
| 2317 | # CONFIG_LOGFS is not set | ||
| 2870 | CONFIG_CRAMFS=y | 2318 | CONFIG_CRAMFS=y |
| 2871 | CONFIG_VXFS_FS=m | 2319 | CONFIG_SQUASHFS=y |
| 2872 | CONFIG_HPFS_FS=m | 2320 | # CONFIG_SQUASHFS_EMBEDDED is not set |
| 2873 | CONFIG_QNX4FS_FS=m | 2321 | CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 |
| 2874 | CONFIG_SYSV_FS=m | 2322 | # CONFIG_VXFS_FS is not set |
| 2875 | CONFIG_UFS_FS=m | 2323 | # CONFIG_MINIX_FS is not set |
| 2876 | # CONFIG_UFS_FS_WRITE is not set | 2324 | # CONFIG_OMFS_FS is not set |
| 2877 | # CONFIG_UFS_DEBUG is not set | 2325 | # CONFIG_HPFS_FS is not set |
| 2878 | 2326 | # CONFIG_QNX4FS_FS is not set | |
| 2879 | # | 2327 | # CONFIG_ROMFS_FS is not set |
| 2880 | # Network File Systems | 2328 | # CONFIG_SYSV_FS is not set |
| 2881 | # | 2329 | # CONFIG_UFS_FS is not set |
| 2330 | CONFIG_NETWORK_FILESYSTEMS=y | ||
| 2882 | CONFIG_NFS_FS=m | 2331 | CONFIG_NFS_FS=m |
| 2883 | CONFIG_NFS_V3=y | 2332 | CONFIG_NFS_V3=y |
| 2884 | # CONFIG_NFS_V3_ACL is not set | 2333 | # CONFIG_NFS_V3_ACL is not set |
| 2885 | CONFIG_NFS_V4=y | 2334 | CONFIG_NFS_V4=y |
| 2886 | CONFIG_NFS_DIRECTIO=y | 2335 | # CONFIG_NFS_V4_1 is not set |
| 2887 | CONFIG_NFSD=m | 2336 | CONFIG_NFSD=m |
| 2888 | CONFIG_NFSD_V3=y | 2337 | CONFIG_NFSD_V3=y |
| 2889 | # CONFIG_NFSD_V3_ACL is not set | 2338 | # CONFIG_NFSD_V3_ACL is not set |
| 2890 | CONFIG_NFSD_V4=y | 2339 | CONFIG_NFSD_V4=y |
| 2891 | CONFIG_NFSD_TCP=y | ||
| 2892 | CONFIG_LOCKD=m | 2340 | CONFIG_LOCKD=m |
| 2893 | CONFIG_LOCKD_V4=y | 2341 | CONFIG_LOCKD_V4=y |
| 2894 | CONFIG_EXPORTFS=m | 2342 | CONFIG_EXPORTFS=m |
| 2895 | CONFIG_NFS_COMMON=y | 2343 | CONFIG_NFS_COMMON=y |
| 2896 | CONFIG_SUNRPC=m | 2344 | CONFIG_SUNRPC=m |
| 2897 | CONFIG_SUNRPC_GSS=m | 2345 | CONFIG_SUNRPC_GSS=m |
| 2898 | # CONFIG_SUNRPC_BIND34 is not set | ||
| 2899 | CONFIG_RPCSEC_GSS_KRB5=m | 2346 | CONFIG_RPCSEC_GSS_KRB5=m |
| 2900 | CONFIG_RPCSEC_GSS_SPKM3=m | 2347 | CONFIG_RPCSEC_GSS_SPKM3=m |
| 2901 | CONFIG_SMB_FS=m | 2348 | CONFIG_SMB_FS=m |
| 2902 | # CONFIG_SMB_NLS_DEFAULT is not set | 2349 | # CONFIG_SMB_NLS_DEFAULT is not set |
| 2350 | # CONFIG_CEPH_FS is not set | ||
| 2903 | CONFIG_CIFS=m | 2351 | CONFIG_CIFS=m |
| 2904 | # CONFIG_CIFS_STATS is not set | 2352 | # CONFIG_CIFS_STATS is not set |
| 2905 | # CONFIG_CIFS_WEAK_PW_HASH is not set | 2353 | # CONFIG_CIFS_WEAK_PW_HASH is not set |
| 2354 | # CONFIG_CIFS_UPCALL is not set | ||
| 2906 | # CONFIG_CIFS_XATTR is not set | 2355 | # CONFIG_CIFS_XATTR is not set |
| 2907 | # CONFIG_CIFS_DEBUG2 is not set | 2356 | # CONFIG_CIFS_DEBUG2 is not set |
| 2357 | # CONFIG_CIFS_DFS_UPCALL is not set | ||
| 2908 | # CONFIG_CIFS_EXPERIMENTAL is not set | 2358 | # CONFIG_CIFS_EXPERIMENTAL is not set |
| 2909 | CONFIG_NCP_FS=m | 2359 | CONFIG_NCP_FS=m |
| 2910 | CONFIG_NCPFS_PACKET_SIGNING=y | 2360 | CONFIG_NCPFS_PACKET_SIGNING=y |
| @@ -2916,7 +2366,6 @@ CONFIG_NCPFS_OS2_NS=y | |||
| 2916 | CONFIG_NCPFS_NLS=y | 2366 | CONFIG_NCPFS_NLS=y |
| 2917 | CONFIG_NCPFS_EXTRAS=y | 2367 | CONFIG_NCPFS_EXTRAS=y |
| 2918 | CONFIG_CODA_FS=m | 2368 | CONFIG_CODA_FS=m |
| 2919 | # CONFIG_CODA_FS_OLD_API is not set | ||
| 2920 | CONFIG_AFS_FS=m | 2369 | CONFIG_AFS_FS=m |
| 2921 | # CONFIG_AFS_DEBUG is not set | 2370 | # CONFIG_AFS_DEBUG is not set |
| 2922 | 2371 | ||
| @@ -2948,10 +2397,6 @@ CONFIG_SUN_PARTITION=y | |||
| 2948 | CONFIG_KARMA_PARTITION=y | 2397 | CONFIG_KARMA_PARTITION=y |
| 2949 | CONFIG_EFI_PARTITION=y | 2398 | CONFIG_EFI_PARTITION=y |
| 2950 | # CONFIG_SYSV68_PARTITION is not set | 2399 | # CONFIG_SYSV68_PARTITION is not set |
| 2951 | |||
| 2952 | # | ||
| 2953 | # Native Language Support | ||
| 2954 | # | ||
| 2955 | CONFIG_NLS=y | 2400 | CONFIG_NLS=y |
| 2956 | CONFIG_NLS_DEFAULT="cp437" | 2401 | CONFIG_NLS_DEFAULT="cp437" |
| 2957 | CONFIG_NLS_CODEPAGE_437=m | 2402 | CONFIG_NLS_CODEPAGE_437=m |
| @@ -2992,118 +2437,179 @@ CONFIG_NLS_ISO8859_15=m | |||
| 2992 | CONFIG_NLS_KOI8_R=m | 2437 | CONFIG_NLS_KOI8_R=m |
| 2993 | CONFIG_NLS_KOI8_U=m | 2438 | CONFIG_NLS_KOI8_U=m |
| 2994 | CONFIG_NLS_UTF8=m | 2439 | CONFIG_NLS_UTF8=m |
| 2995 | 2440 | # CONFIG_DLM is not set | |
| 2996 | # | ||
| 2997 | # Distributed Lock Manager | ||
| 2998 | # | ||
| 2999 | CONFIG_DLM=m | ||
| 3000 | # CONFIG_DLM_DEBUG is not set | ||
| 3001 | |||
| 3002 | # | ||
| 3003 | # Profiling support | ||
| 3004 | # | ||
| 3005 | CONFIG_PROFILING=y | ||
| 3006 | CONFIG_OPROFILE=m | ||
| 3007 | 2441 | ||
| 3008 | # | 2442 | # |
| 3009 | # Kernel hacking | 2443 | # Kernel hacking |
| 3010 | # | 2444 | # |
| 3011 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | 2445 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y |
| 3012 | # CONFIG_PRINTK_TIME is not set | 2446 | # CONFIG_PRINTK_TIME is not set |
| 2447 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
| 3013 | # CONFIG_ENABLE_MUST_CHECK is not set | 2448 | # CONFIG_ENABLE_MUST_CHECK is not set |
| 2449 | CONFIG_FRAME_WARN=1024 | ||
| 3014 | CONFIG_MAGIC_SYSRQ=y | 2450 | CONFIG_MAGIC_SYSRQ=y |
| 2451 | # CONFIG_STRIP_ASM_SYMS is not set | ||
| 3015 | # CONFIG_UNUSED_SYMBOLS is not set | 2452 | # CONFIG_UNUSED_SYMBOLS is not set |
| 3016 | # CONFIG_DEBUG_FS is not set | 2453 | CONFIG_DEBUG_FS=y |
| 3017 | # CONFIG_HEADERS_CHECK is not set | 2454 | # CONFIG_HEADERS_CHECK is not set |
| 3018 | # CONFIG_DEBUG_KERNEL is not set | 2455 | # CONFIG_DEBUG_KERNEL is not set |
| 3019 | CONFIG_CROSSCOMPILE=y | 2456 | # CONFIG_DEBUG_MEMORY_INIT is not set |
| 2457 | CONFIG_RCU_CPU_STALL_DETECTOR=y | ||
| 2458 | # CONFIG_LKDTM is not set | ||
| 2459 | # CONFIG_SYSCTL_SYSCALL_CHECK is not set | ||
| 2460 | CONFIG_HAVE_FUNCTION_TRACER=y | ||
| 2461 | CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y | ||
| 2462 | CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y | ||
| 2463 | CONFIG_HAVE_DYNAMIC_FTRACE=y | ||
| 2464 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y | ||
| 2465 | CONFIG_RING_BUFFER=y | ||
| 2466 | CONFIG_RING_BUFFER_ALLOW_SWAP=y | ||
| 2467 | CONFIG_TRACING_SUPPORT=y | ||
| 2468 | # CONFIG_FTRACE is not set | ||
| 2469 | # CONFIG_DYNAMIC_DEBUG is not set | ||
| 2470 | # CONFIG_SAMPLES is not set | ||
| 2471 | CONFIG_HAVE_ARCH_KGDB=y | ||
| 2472 | CONFIG_EARLY_PRINTK=y | ||
| 3020 | # CONFIG_CMDLINE_BOOL is not set | 2473 | # CONFIG_CMDLINE_BOOL is not set |
| 2474 | # CONFIG_SPINLOCK_TEST is not set | ||
| 3021 | 2475 | ||
| 3022 | # | 2476 | # |
| 3023 | # Security options | 2477 | # Security options |
| 3024 | # | 2478 | # |
| 3025 | CONFIG_KEYS=y | 2479 | CONFIG_KEYS=y |
| 3026 | # CONFIG_KEYS_DEBUG_PROC_KEYS is not set | 2480 | # CONFIG_KEYS_DEBUG_PROC_KEYS is not set |
| 3027 | CONFIG_SECURITY=y | 2481 | # CONFIG_SECURITY is not set |
| 3028 | CONFIG_SECURITY_NETWORK=y | 2482 | # CONFIG_SECURITYFS is not set |
| 3029 | # CONFIG_SECURITY_NETWORK_XFRM is not set | 2483 | # CONFIG_DEFAULT_SECURITY_SELINUX is not set |
| 3030 | CONFIG_SECURITY_CAPABILITIES=m | 2484 | # CONFIG_DEFAULT_SECURITY_SMACK is not set |
| 3031 | CONFIG_SECURITY_ROOTPLUG=m | 2485 | # CONFIG_DEFAULT_SECURITY_TOMOYO is not set |
| 3032 | CONFIG_SECURITY_SELINUX=y | 2486 | CONFIG_DEFAULT_SECURITY_DAC=y |
| 3033 | CONFIG_SECURITY_SELINUX_BOOTPARAM=y | 2487 | CONFIG_DEFAULT_SECURITY="" |
| 3034 | CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=0 | ||
| 3035 | CONFIG_SECURITY_SELINUX_DISABLE=y | ||
| 3036 | CONFIG_SECURITY_SELINUX_DEVELOP=y | ||
| 3037 | CONFIG_SECURITY_SELINUX_AVC_STATS=y | ||
| 3038 | CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1 | ||
| 3039 | # CONFIG_SECURITY_SELINUX_ENABLE_SECMARK_DEFAULT is not set | ||
| 3040 | # CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set | ||
| 3041 | CONFIG_XOR_BLOCKS=m | ||
| 3042 | CONFIG_ASYNC_CORE=m | ||
| 3043 | CONFIG_ASYNC_MEMCPY=m | ||
| 3044 | CONFIG_ASYNC_XOR=m | ||
| 3045 | CONFIG_CRYPTO=y | 2488 | CONFIG_CRYPTO=y |
| 2489 | |||
| 2490 | # | ||
| 2491 | # Crypto core or helper | ||
| 2492 | # | ||
| 2493 | # CONFIG_CRYPTO_FIPS is not set | ||
| 3046 | CONFIG_CRYPTO_ALGAPI=y | 2494 | CONFIG_CRYPTO_ALGAPI=y |
| 2495 | CONFIG_CRYPTO_ALGAPI2=y | ||
| 2496 | CONFIG_CRYPTO_AEAD=m | ||
| 2497 | CONFIG_CRYPTO_AEAD2=y | ||
| 3047 | CONFIG_CRYPTO_BLKCIPHER=m | 2498 | CONFIG_CRYPTO_BLKCIPHER=m |
| 2499 | CONFIG_CRYPTO_BLKCIPHER2=y | ||
| 3048 | CONFIG_CRYPTO_HASH=y | 2500 | CONFIG_CRYPTO_HASH=y |
| 2501 | CONFIG_CRYPTO_HASH2=y | ||
| 2502 | CONFIG_CRYPTO_RNG=m | ||
| 2503 | CONFIG_CRYPTO_RNG2=y | ||
| 2504 | CONFIG_CRYPTO_PCOMP=y | ||
| 3049 | CONFIG_CRYPTO_MANAGER=y | 2505 | CONFIG_CRYPTO_MANAGER=y |
| 2506 | CONFIG_CRYPTO_MANAGER2=y | ||
| 2507 | # CONFIG_CRYPTO_GF128MUL is not set | ||
| 2508 | CONFIG_CRYPTO_NULL=m | ||
| 2509 | CONFIG_CRYPTO_WORKQUEUE=y | ||
| 2510 | # CONFIG_CRYPTO_CRYPTD is not set | ||
| 2511 | CONFIG_CRYPTO_AUTHENC=m | ||
| 2512 | CONFIG_CRYPTO_TEST=m | ||
| 2513 | |||
| 2514 | # | ||
| 2515 | # Authenticated Encryption with Associated Data | ||
| 2516 | # | ||
| 2517 | # CONFIG_CRYPTO_CCM is not set | ||
| 2518 | # CONFIG_CRYPTO_GCM is not set | ||
| 2519 | # CONFIG_CRYPTO_SEQIV is not set | ||
| 2520 | |||
| 2521 | # | ||
| 2522 | # Block modes | ||
| 2523 | # | ||
| 2524 | CONFIG_CRYPTO_CBC=m | ||
| 2525 | # CONFIG_CRYPTO_CTR is not set | ||
| 2526 | # CONFIG_CRYPTO_CTS is not set | ||
| 2527 | CONFIG_CRYPTO_ECB=m | ||
| 2528 | # CONFIG_CRYPTO_LRW is not set | ||
| 2529 | CONFIG_CRYPTO_PCBC=m | ||
| 2530 | # CONFIG_CRYPTO_XTS is not set | ||
| 2531 | |||
| 2532 | # | ||
| 2533 | # Hash modes | ||
| 2534 | # | ||
| 3050 | CONFIG_CRYPTO_HMAC=y | 2535 | CONFIG_CRYPTO_HMAC=y |
| 3051 | # CONFIG_CRYPTO_XCBC is not set | 2536 | # CONFIG_CRYPTO_XCBC is not set |
| 3052 | CONFIG_CRYPTO_NULL=m | 2537 | # CONFIG_CRYPTO_VMAC is not set |
| 2538 | |||
| 2539 | # | ||
| 2540 | # Digest | ||
| 2541 | # | ||
| 2542 | CONFIG_CRYPTO_CRC32C=m | ||
| 2543 | # CONFIG_CRYPTO_GHASH is not set | ||
| 3053 | CONFIG_CRYPTO_MD4=m | 2544 | CONFIG_CRYPTO_MD4=m |
| 3054 | CONFIG_CRYPTO_MD5=y | 2545 | CONFIG_CRYPTO_MD5=y |
| 2546 | CONFIG_CRYPTO_MICHAEL_MIC=m | ||
| 2547 | # CONFIG_CRYPTO_RMD128 is not set | ||
| 2548 | # CONFIG_CRYPTO_RMD160 is not set | ||
| 2549 | # CONFIG_CRYPTO_RMD256 is not set | ||
| 2550 | # CONFIG_CRYPTO_RMD320 is not set | ||
| 3055 | CONFIG_CRYPTO_SHA1=m | 2551 | CONFIG_CRYPTO_SHA1=m |
| 3056 | CONFIG_CRYPTO_SHA256=m | 2552 | CONFIG_CRYPTO_SHA256=m |
| 3057 | CONFIG_CRYPTO_SHA512=m | 2553 | CONFIG_CRYPTO_SHA512=m |
| 3058 | CONFIG_CRYPTO_WP512=m | ||
| 3059 | CONFIG_CRYPTO_TGR192=m | 2554 | CONFIG_CRYPTO_TGR192=m |
| 3060 | # CONFIG_CRYPTO_GF128MUL is not set | 2555 | CONFIG_CRYPTO_WP512=m |
| 3061 | CONFIG_CRYPTO_ECB=m | 2556 | |
| 3062 | CONFIG_CRYPTO_CBC=m | 2557 | # |
| 3063 | CONFIG_CRYPTO_PCBC=m | 2558 | # Ciphers |
| 3064 | # CONFIG_CRYPTO_LRW is not set | 2559 | # |
| 3065 | # CONFIG_CRYPTO_CRYPTD is not set | ||
| 3066 | CONFIG_CRYPTO_DES=m | ||
| 3067 | # CONFIG_CRYPTO_FCRYPT is not set | ||
| 3068 | CONFIG_CRYPTO_BLOWFISH=m | ||
| 3069 | CONFIG_CRYPTO_TWOFISH=m | ||
| 3070 | CONFIG_CRYPTO_TWOFISH_COMMON=m | ||
| 3071 | CONFIG_CRYPTO_SERPENT=m | ||
| 3072 | CONFIG_CRYPTO_AES=m | 2560 | CONFIG_CRYPTO_AES=m |
| 2561 | CONFIG_CRYPTO_ANUBIS=m | ||
| 2562 | CONFIG_CRYPTO_ARC4=m | ||
| 2563 | CONFIG_CRYPTO_BLOWFISH=m | ||
| 2564 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
| 3073 | CONFIG_CRYPTO_CAST5=m | 2565 | CONFIG_CRYPTO_CAST5=m |
| 3074 | CONFIG_CRYPTO_CAST6=m | 2566 | CONFIG_CRYPTO_CAST6=m |
| 3075 | CONFIG_CRYPTO_TEA=m | 2567 | CONFIG_CRYPTO_DES=m |
| 3076 | CONFIG_CRYPTO_ARC4=m | 2568 | # CONFIG_CRYPTO_FCRYPT is not set |
| 3077 | CONFIG_CRYPTO_KHAZAD=m | 2569 | CONFIG_CRYPTO_KHAZAD=m |
| 3078 | CONFIG_CRYPTO_ANUBIS=m | 2570 | # CONFIG_CRYPTO_SALSA20 is not set |
| 2571 | # CONFIG_CRYPTO_SEED is not set | ||
| 2572 | CONFIG_CRYPTO_SERPENT=m | ||
| 2573 | CONFIG_CRYPTO_TEA=m | ||
| 2574 | CONFIG_CRYPTO_TWOFISH=m | ||
| 2575 | CONFIG_CRYPTO_TWOFISH_COMMON=m | ||
| 2576 | |||
| 2577 | # | ||
| 2578 | # Compression | ||
| 2579 | # | ||
| 3079 | CONFIG_CRYPTO_DEFLATE=m | 2580 | CONFIG_CRYPTO_DEFLATE=m |
| 3080 | CONFIG_CRYPTO_MICHAEL_MIC=m | 2581 | # CONFIG_CRYPTO_ZLIB is not set |
| 3081 | CONFIG_CRYPTO_CRC32C=m | 2582 | # CONFIG_CRYPTO_LZO is not set |
| 3082 | # CONFIG_CRYPTO_CAMELLIA is not set | 2583 | |
| 3083 | CONFIG_CRYPTO_TEST=m | 2584 | # |
| 2585 | # Random Number Generation | ||
| 2586 | # | ||
| 2587 | CONFIG_CRYPTO_ANSI_CPRNG=m | ||
| 3084 | CONFIG_CRYPTO_HW=y | 2588 | CONFIG_CRYPTO_HW=y |
| 2589 | # CONFIG_CRYPTO_DEV_HIFN_795X is not set | ||
| 2590 | # CONFIG_BINARY_PRINTF is not set | ||
| 3085 | 2591 | ||
| 3086 | # | 2592 | # |
| 3087 | # Library routines | 2593 | # Library routines |
| 3088 | # | 2594 | # |
| 3089 | CONFIG_BITREVERSE=y | 2595 | CONFIG_BITREVERSE=y |
| 2596 | CONFIG_GENERIC_FIND_LAST_BIT=y | ||
| 3090 | CONFIG_CRC_CCITT=m | 2597 | CONFIG_CRC_CCITT=m |
| 3091 | CONFIG_CRC16=m | 2598 | CONFIG_CRC16=m |
| 3092 | # CONFIG_CRC_ITU_T is not set | 2599 | # CONFIG_CRC_T10DIF is not set |
| 2600 | CONFIG_CRC_ITU_T=m | ||
| 3093 | CONFIG_CRC32=y | 2601 | CONFIG_CRC32=y |
| 3094 | # CONFIG_CRC7 is not set | 2602 | # CONFIG_CRC7 is not set |
| 3095 | CONFIG_LIBCRC32C=m | 2603 | CONFIG_LIBCRC32C=m |
| 3096 | CONFIG_AUDIT_GENERIC=y | 2604 | CONFIG_AUDIT_GENERIC=y |
| 3097 | CONFIG_ZLIB_INFLATE=y | 2605 | CONFIG_ZLIB_INFLATE=y |
| 3098 | CONFIG_ZLIB_DEFLATE=m | 2606 | CONFIG_ZLIB_DEFLATE=y |
| 3099 | CONFIG_REED_SOLOMON=m | 2607 | CONFIG_DECOMPRESS_GZIP=y |
| 3100 | CONFIG_REED_SOLOMON_DEC16=y | ||
| 3101 | CONFIG_TEXTSEARCH=y | 2608 | CONFIG_TEXTSEARCH=y |
| 3102 | CONFIG_TEXTSEARCH_KMP=m | 2609 | CONFIG_TEXTSEARCH_KMP=m |
| 3103 | CONFIG_TEXTSEARCH_BM=m | 2610 | CONFIG_TEXTSEARCH_BM=m |
| 3104 | CONFIG_TEXTSEARCH_FSM=m | 2611 | CONFIG_TEXTSEARCH_FSM=m |
| 3105 | CONFIG_PLIST=y | ||
| 3106 | CONFIG_HAS_IOMEM=y | 2612 | CONFIG_HAS_IOMEM=y |
| 3107 | CONFIG_HAS_IOPORT=y | 2613 | CONFIG_HAS_IOPORT=y |
| 3108 | CONFIG_HAS_DMA=y | 2614 | CONFIG_HAS_DMA=y |
| 3109 | CONFIG_CHECK_SIGNATURE=y | 2615 | CONFIG_NLATTR=y |
diff --git a/arch/mips/configs/rb532_defconfig b/arch/mips/configs/rb532_defconfig index 57a50483abdf..90a032af95ce 100644 --- a/arch/mips/configs/rb532_defconfig +++ b/arch/mips/configs/rb532_defconfig | |||
| @@ -1,7 +1,7 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.25 | 3 | # Linux kernel version: 2.6.34-rc6 |
| 4 | # Mon Apr 28 12:24:17 2008 | 4 | # Sat May 1 11:49:51 2010 |
| 5 | # | 5 | # |
| 6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
| 7 | 7 | ||
| @@ -9,22 +9,25 @@ CONFIG_MIPS=y | |||
| 9 | # Machine selection | 9 | # Machine selection |
| 10 | # | 10 | # |
| 11 | # CONFIG_MACH_ALCHEMY is not set | 11 | # CONFIG_MACH_ALCHEMY is not set |
| 12 | # CONFIG_AR7 is not set | ||
| 12 | # CONFIG_BCM47XX is not set | 13 | # CONFIG_BCM47XX is not set |
| 14 | # CONFIG_BCM63XX is not set | ||
| 13 | # CONFIG_MIPS_COBALT is not set | 15 | # CONFIG_MIPS_COBALT is not set |
| 14 | # CONFIG_MACH_DECSTATION is not set | 16 | # CONFIG_MACH_DECSTATION is not set |
| 15 | # CONFIG_MACH_JAZZ is not set | 17 | # CONFIG_MACH_JAZZ is not set |
| 16 | # CONFIG_LASAT is not set | 18 | # CONFIG_LASAT is not set |
| 17 | # CONFIG_LEMOTE_FULONG is not set | 19 | # CONFIG_MACH_LOONGSON is not set |
| 18 | # CONFIG_MIPS_ATLAS is not set | ||
| 19 | # CONFIG_MIPS_MALTA is not set | 20 | # CONFIG_MIPS_MALTA is not set |
| 20 | # CONFIG_MIPS_SEAD is not set | ||
| 21 | # CONFIG_MIPS_SIM is not set | 21 | # CONFIG_MIPS_SIM is not set |
| 22 | # CONFIG_MARKEINS is not set | 22 | # CONFIG_NEC_MARKEINS is not set |
| 23 | # CONFIG_MACH_VR41XX is not set | 23 | # CONFIG_MACH_VR41XX is not set |
| 24 | # CONFIG_NXP_STB220 is not set | ||
| 25 | # CONFIG_NXP_STB225 is not set | ||
| 24 | # CONFIG_PNX8550_JBS is not set | 26 | # CONFIG_PNX8550_JBS is not set |
| 25 | # CONFIG_PNX8550_STB810 is not set | 27 | # CONFIG_PNX8550_STB810 is not set |
| 26 | # CONFIG_PMC_MSP is not set | 28 | # CONFIG_PMC_MSP is not set |
| 27 | # CONFIG_PMC_YOSEMITE is not set | 29 | # CONFIG_PMC_YOSEMITE is not set |
| 30 | # CONFIG_POWERTV is not set | ||
| 28 | # CONFIG_SGI_IP22 is not set | 31 | # CONFIG_SGI_IP22 is not set |
| 29 | # CONFIG_SGI_IP27 is not set | 32 | # CONFIG_SGI_IP27 is not set |
| 30 | # CONFIG_SGI_IP28 is not set | 33 | # CONFIG_SGI_IP28 is not set |
| @@ -38,11 +41,14 @@ CONFIG_MIPS=y | |||
| 38 | # CONFIG_SIBYTE_SENTOSA is not set | 41 | # CONFIG_SIBYTE_SENTOSA is not set |
| 39 | # CONFIG_SIBYTE_BIGSUR is not set | 42 | # CONFIG_SIBYTE_BIGSUR is not set |
| 40 | # CONFIG_SNI_RM is not set | 43 | # CONFIG_SNI_RM is not set |
| 41 | # CONFIG_TOSHIBA_JMR3927 is not set | 44 | # CONFIG_MACH_TX39XX is not set |
| 45 | # CONFIG_MACH_TX49XX is not set | ||
| 42 | CONFIG_MIKROTIK_RB532=y | 46 | CONFIG_MIKROTIK_RB532=y |
| 43 | # CONFIG_TOSHIBA_RBTX4927 is not set | ||
| 44 | # CONFIG_TOSHIBA_RBTX4938 is not set | ||
| 45 | # CONFIG_WR_PPMC is not set | 47 | # CONFIG_WR_PPMC is not set |
| 48 | # CONFIG_CAVIUM_OCTEON_SIMULATOR is not set | ||
| 49 | # CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set | ||
| 50 | # CONFIG_ALCHEMY_GPIO_INDIRECT is not set | ||
| 51 | CONFIG_LOONGSON_UART_BASE=y | ||
| 46 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | 52 | CONFIG_RWSEM_GENERIC_SPINLOCK=y |
| 47 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | 53 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set |
| 48 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | 54 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set |
| @@ -53,14 +59,15 @@ CONFIG_GENERIC_CALIBRATE_DELAY=y | |||
| 53 | CONFIG_GENERIC_CLOCKEVENTS=y | 59 | CONFIG_GENERIC_CLOCKEVENTS=y |
| 54 | CONFIG_GENERIC_TIME=y | 60 | CONFIG_GENERIC_TIME=y |
| 55 | CONFIG_GENERIC_CMOS_UPDATE=y | 61 | CONFIG_GENERIC_CMOS_UPDATE=y |
| 56 | CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y | 62 | CONFIG_SCHED_OMIT_FRAME_POINTER=y |
| 57 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | 63 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y |
| 58 | CONFIG_BOOT_RAW=y | 64 | CONFIG_BOOT_RAW=y |
| 65 | CONFIG_CEVT_R4K_LIB=y | ||
| 59 | CONFIG_CEVT_R4K=y | 66 | CONFIG_CEVT_R4K=y |
| 67 | CONFIG_CSRC_R4K_LIB=y | ||
| 60 | CONFIG_CSRC_R4K=y | 68 | CONFIG_CSRC_R4K=y |
| 61 | CONFIG_DMA_NONCOHERENT=y | 69 | CONFIG_DMA_NONCOHERENT=y |
| 62 | CONFIG_DMA_NEED_PCI_MAP_STATE=y | 70 | CONFIG_NEED_DMA_MAP_STATE=y |
| 63 | # CONFIG_HOTPLUG_CPU is not set | ||
| 64 | # CONFIG_NO_IOPORT is not set | 71 | # CONFIG_NO_IOPORT is not set |
| 65 | CONFIG_GENERIC_GPIO=y | 72 | CONFIG_GENERIC_GPIO=y |
| 66 | # CONFIG_CPU_BIG_ENDIAN is not set | 73 | # CONFIG_CPU_BIG_ENDIAN is not set |
| @@ -73,7 +80,8 @@ CONFIG_MIPS_L1_CACHE_SHIFT=4 | |||
| 73 | # | 80 | # |
| 74 | # CPU selection | 81 | # CPU selection |
| 75 | # | 82 | # |
| 76 | # CONFIG_CPU_LOONGSON2 is not set | 83 | # CONFIG_CPU_LOONGSON2E is not set |
| 84 | # CONFIG_CPU_LOONGSON2F is not set | ||
| 77 | CONFIG_CPU_MIPS32_R1=y | 85 | CONFIG_CPU_MIPS32_R1=y |
| 78 | # CONFIG_CPU_MIPS32_R2 is not set | 86 | # CONFIG_CPU_MIPS32_R2 is not set |
| 79 | # CONFIG_CPU_MIPS64_R1 is not set | 87 | # CONFIG_CPU_MIPS64_R1 is not set |
| @@ -86,6 +94,7 @@ CONFIG_CPU_MIPS32_R1=y | |||
| 86 | # CONFIG_CPU_TX49XX is not set | 94 | # CONFIG_CPU_TX49XX is not set |
| 87 | # CONFIG_CPU_R5000 is not set | 95 | # CONFIG_CPU_R5000 is not set |
| 88 | # CONFIG_CPU_R5432 is not set | 96 | # CONFIG_CPU_R5432 is not set |
| 97 | # CONFIG_CPU_R5500 is not set | ||
| 89 | # CONFIG_CPU_R6000 is not set | 98 | # CONFIG_CPU_R6000 is not set |
| 90 | # CONFIG_CPU_NEVADA is not set | 99 | # CONFIG_CPU_NEVADA is not set |
| 91 | # CONFIG_CPU_R8000 is not set | 100 | # CONFIG_CPU_R8000 is not set |
| @@ -93,11 +102,13 @@ CONFIG_CPU_MIPS32_R1=y | |||
| 93 | # CONFIG_CPU_RM7000 is not set | 102 | # CONFIG_CPU_RM7000 is not set |
| 94 | # CONFIG_CPU_RM9000 is not set | 103 | # CONFIG_CPU_RM9000 is not set |
| 95 | # CONFIG_CPU_SB1 is not set | 104 | # CONFIG_CPU_SB1 is not set |
| 105 | # CONFIG_CPU_CAVIUM_OCTEON is not set | ||
| 96 | CONFIG_SYS_HAS_CPU_MIPS32_R1=y | 106 | CONFIG_SYS_HAS_CPU_MIPS32_R1=y |
| 97 | CONFIG_CPU_MIPS32=y | 107 | CONFIG_CPU_MIPS32=y |
| 98 | CONFIG_CPU_MIPSR1=y | 108 | CONFIG_CPU_MIPSR1=y |
| 99 | CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y | 109 | CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y |
| 100 | CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y | 110 | CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y |
| 111 | CONFIG_HARDWARE_WATCHPOINTS=y | ||
| 101 | 112 | ||
| 102 | # | 113 | # |
| 103 | # Kernel type | 114 | # Kernel type |
| @@ -107,11 +118,13 @@ CONFIG_32BIT=y | |||
| 107 | CONFIG_PAGE_SIZE_4KB=y | 118 | CONFIG_PAGE_SIZE_4KB=y |
| 108 | # CONFIG_PAGE_SIZE_8KB is not set | 119 | # CONFIG_PAGE_SIZE_8KB is not set |
| 109 | # CONFIG_PAGE_SIZE_16KB is not set | 120 | # CONFIG_PAGE_SIZE_16KB is not set |
| 121 | # CONFIG_PAGE_SIZE_32KB is not set | ||
| 110 | # CONFIG_PAGE_SIZE_64KB is not set | 122 | # CONFIG_PAGE_SIZE_64KB is not set |
| 111 | CONFIG_CPU_HAS_PREFETCH=y | 123 | CONFIG_CPU_HAS_PREFETCH=y |
| 112 | CONFIG_MIPS_MT_DISABLED=y | 124 | CONFIG_MIPS_MT_DISABLED=y |
| 113 | # CONFIG_MIPS_MT_SMP is not set | 125 | # CONFIG_MIPS_MT_SMP is not set |
| 114 | # CONFIG_MIPS_MT_SMTC is not set | 126 | # CONFIG_MIPS_MT_SMTC is not set |
| 127 | # CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set | ||
| 115 | CONFIG_CPU_HAS_SYNC=y | 128 | CONFIG_CPU_HAS_SYNC=y |
| 116 | CONFIG_GENERIC_HARDIRQS=y | 129 | CONFIG_GENERIC_HARDIRQS=y |
| 117 | CONFIG_GENERIC_IRQ_PROBE=y | 130 | CONFIG_GENERIC_IRQ_PROBE=y |
| @@ -124,12 +137,13 @@ CONFIG_FLATMEM_MANUAL=y | |||
| 124 | # CONFIG_SPARSEMEM_MANUAL is not set | 137 | # CONFIG_SPARSEMEM_MANUAL is not set |
| 125 | CONFIG_FLATMEM=y | 138 | CONFIG_FLATMEM=y |
| 126 | CONFIG_FLAT_NODE_MEM_MAP=y | 139 | CONFIG_FLAT_NODE_MEM_MAP=y |
| 127 | # CONFIG_SPARSEMEM_STATIC is not set | 140 | CONFIG_PAGEFLAGS_EXTENDED=y |
| 128 | # CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set | ||
| 129 | CONFIG_SPLIT_PTLOCK_CPUS=4 | 141 | CONFIG_SPLIT_PTLOCK_CPUS=4 |
| 130 | # CONFIG_RESOURCES_64BIT is not set | 142 | # CONFIG_PHYS_ADDR_T_64BIT is not set |
| 131 | CONFIG_ZONE_DMA_FLAG=0 | 143 | CONFIG_ZONE_DMA_FLAG=0 |
| 132 | CONFIG_VIRT_TO_BUS=y | 144 | CONFIG_VIRT_TO_BUS=y |
| 145 | # CONFIG_KSM is not set | ||
| 146 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | ||
| 133 | CONFIG_TICK_ONESHOT=y | 147 | CONFIG_TICK_ONESHOT=y |
| 134 | CONFIG_NO_HZ=y | 148 | CONFIG_NO_HZ=y |
| 135 | CONFIG_HIGH_RES_TIMERS=y | 149 | CONFIG_HIGH_RES_TIMERS=y |
| @@ -151,6 +165,7 @@ CONFIG_PREEMPT_NONE=y | |||
| 151 | CONFIG_LOCKDEP_SUPPORT=y | 165 | CONFIG_LOCKDEP_SUPPORT=y |
| 152 | CONFIG_STACKTRACE_SUPPORT=y | 166 | CONFIG_STACKTRACE_SUPPORT=y |
| 153 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | 167 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" |
| 168 | CONFIG_CONSTRUCTORS=y | ||
| 154 | 169 | ||
| 155 | # | 170 | # |
| 156 | # General setup | 171 | # General setup |
| @@ -168,23 +183,31 @@ CONFIG_BSD_PROCESS_ACCT=y | |||
| 168 | # CONFIG_BSD_PROCESS_ACCT_V3 is not set | 183 | # CONFIG_BSD_PROCESS_ACCT_V3 is not set |
| 169 | # CONFIG_TASKSTATS is not set | 184 | # CONFIG_TASKSTATS is not set |
| 170 | # CONFIG_AUDIT is not set | 185 | # CONFIG_AUDIT is not set |
| 186 | |||
| 187 | # | ||
| 188 | # RCU Subsystem | ||
| 189 | # | ||
| 190 | # CONFIG_TREE_RCU is not set | ||
| 191 | # CONFIG_TREE_PREEMPT_RCU is not set | ||
| 192 | CONFIG_TINY_RCU=y | ||
| 193 | # CONFIG_TREE_RCU_TRACE is not set | ||
| 171 | CONFIG_IKCONFIG=y | 194 | CONFIG_IKCONFIG=y |
| 172 | CONFIG_IKCONFIG_PROC=y | 195 | CONFIG_IKCONFIG_PROC=y |
| 173 | CONFIG_LOG_BUF_SHIFT=14 | 196 | CONFIG_LOG_BUF_SHIFT=14 |
| 174 | # CONFIG_CGROUPS is not set | 197 | # CONFIG_CGROUPS is not set |
| 175 | CONFIG_GROUP_SCHED=y | ||
| 176 | CONFIG_FAIR_GROUP_SCHED=y | ||
| 177 | # CONFIG_RT_GROUP_SCHED is not set | ||
| 178 | CONFIG_USER_SCHED=y | ||
| 179 | # CONFIG_CGROUP_SCHED is not set | ||
| 180 | CONFIG_SYSFS_DEPRECATED=y | 198 | CONFIG_SYSFS_DEPRECATED=y |
| 181 | CONFIG_SYSFS_DEPRECATED_V2=y | 199 | CONFIG_SYSFS_DEPRECATED_V2=y |
| 182 | # CONFIG_RELAY is not set | 200 | # CONFIG_RELAY is not set |
| 183 | # CONFIG_NAMESPACES is not set | 201 | # CONFIG_NAMESPACES is not set |
| 184 | CONFIG_BLK_DEV_INITRD=y | 202 | CONFIG_BLK_DEV_INITRD=y |
| 185 | CONFIG_INITRAMFS_SOURCE="" | 203 | CONFIG_INITRAMFS_SOURCE="" |
| 204 | CONFIG_RD_GZIP=y | ||
| 205 | # CONFIG_RD_BZIP2 is not set | ||
| 206 | # CONFIG_RD_LZMA is not set | ||
| 207 | # CONFIG_RD_LZO is not set | ||
| 186 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | 208 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y |
| 187 | CONFIG_SYSCTL=y | 209 | CONFIG_SYSCTL=y |
| 210 | CONFIG_ANON_INODES=y | ||
| 188 | CONFIG_EMBEDDED=y | 211 | CONFIG_EMBEDDED=y |
| 189 | CONFIG_SYSCTL_SYSCALL=y | 212 | CONFIG_SYSCTL_SYSCALL=y |
| 190 | # CONFIG_KALLSYMS is not set | 213 | # CONFIG_KALLSYMS is not set |
| @@ -192,54 +215,87 @@ CONFIG_HOTPLUG=y | |||
| 192 | CONFIG_PRINTK=y | 215 | CONFIG_PRINTK=y |
| 193 | CONFIG_BUG=y | 216 | CONFIG_BUG=y |
| 194 | # CONFIG_ELF_CORE is not set | 217 | # CONFIG_ELF_CORE is not set |
| 195 | CONFIG_COMPAT_BRK=y | 218 | CONFIG_PCSPKR_PLATFORM=y |
| 196 | CONFIG_BASE_FULL=y | 219 | CONFIG_BASE_FULL=y |
| 197 | CONFIG_FUTEX=y | 220 | CONFIG_FUTEX=y |
| 198 | CONFIG_ANON_INODES=y | ||
| 199 | CONFIG_EPOLL=y | 221 | CONFIG_EPOLL=y |
| 200 | CONFIG_SIGNALFD=y | 222 | CONFIG_SIGNALFD=y |
| 201 | CONFIG_TIMERFD=y | 223 | CONFIG_TIMERFD=y |
| 202 | CONFIG_EVENTFD=y | 224 | CONFIG_EVENTFD=y |
| 203 | CONFIG_SHMEM=y | 225 | CONFIG_SHMEM=y |
| 226 | CONFIG_AIO=y | ||
| 227 | |||
| 228 | # | ||
| 229 | # Kernel Performance Events And Counters | ||
| 230 | # | ||
| 204 | # CONFIG_VM_EVENT_COUNTERS is not set | 231 | # CONFIG_VM_EVENT_COUNTERS is not set |
| 232 | # CONFIG_PCI_QUIRKS is not set | ||
| 233 | CONFIG_COMPAT_BRK=y | ||
| 205 | CONFIG_SLAB=y | 234 | CONFIG_SLAB=y |
| 206 | # CONFIG_SLUB is not set | 235 | # CONFIG_SLUB is not set |
| 207 | # CONFIG_SLOB is not set | 236 | # CONFIG_SLOB is not set |
| 208 | # CONFIG_PROFILING is not set | 237 | # CONFIG_PROFILING is not set |
| 209 | # CONFIG_MARKERS is not set | ||
| 210 | CONFIG_HAVE_OPROFILE=y | 238 | CONFIG_HAVE_OPROFILE=y |
| 211 | # CONFIG_HAVE_KPROBES is not set | 239 | |
| 212 | # CONFIG_HAVE_KRETPROBES is not set | 240 | # |
| 213 | CONFIG_PROC_PAGE_MONITOR=y | 241 | # GCOV-based kernel profiling |
| 242 | # | ||
| 243 | # CONFIG_SLOW_WORK is not set | ||
| 244 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | ||
| 214 | CONFIG_SLABINFO=y | 245 | CONFIG_SLABINFO=y |
| 215 | CONFIG_RT_MUTEXES=y | 246 | CONFIG_RT_MUTEXES=y |
| 216 | # CONFIG_TINY_SHMEM is not set | ||
| 217 | CONFIG_BASE_SMALL=0 | 247 | CONFIG_BASE_SMALL=0 |
| 218 | CONFIG_MODULES=y | 248 | CONFIG_MODULES=y |
| 249 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
| 219 | CONFIG_MODULE_UNLOAD=y | 250 | CONFIG_MODULE_UNLOAD=y |
| 220 | # CONFIG_MODULE_FORCE_UNLOAD is not set | 251 | # CONFIG_MODULE_FORCE_UNLOAD is not set |
| 221 | # CONFIG_MODVERSIONS is not set | 252 | # CONFIG_MODVERSIONS is not set |
| 222 | # CONFIG_MODULE_SRCVERSION_ALL is not set | 253 | # CONFIG_MODULE_SRCVERSION_ALL is not set |
| 223 | # CONFIG_KMOD is not set | ||
| 224 | CONFIG_BLOCK=y | 254 | CONFIG_BLOCK=y |
| 225 | # CONFIG_LBD is not set | 255 | # CONFIG_LBDAF is not set |
| 226 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
| 227 | # CONFIG_LSF is not set | ||
| 228 | # CONFIG_BLK_DEV_BSG is not set | 256 | # CONFIG_BLK_DEV_BSG is not set |
| 257 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
| 229 | 258 | ||
| 230 | # | 259 | # |
| 231 | # IO Schedulers | 260 | # IO Schedulers |
| 232 | # | 261 | # |
| 233 | CONFIG_IOSCHED_NOOP=y | 262 | CONFIG_IOSCHED_NOOP=y |
| 234 | # CONFIG_IOSCHED_AS is not set | ||
| 235 | CONFIG_IOSCHED_DEADLINE=y | 263 | CONFIG_IOSCHED_DEADLINE=y |
| 236 | # CONFIG_IOSCHED_CFQ is not set | 264 | # CONFIG_IOSCHED_CFQ is not set |
| 237 | # CONFIG_DEFAULT_AS is not set | ||
| 238 | CONFIG_DEFAULT_DEADLINE=y | 265 | CONFIG_DEFAULT_DEADLINE=y |
| 239 | # CONFIG_DEFAULT_CFQ is not set | 266 | # CONFIG_DEFAULT_CFQ is not set |
| 240 | # CONFIG_DEFAULT_NOOP is not set | 267 | # CONFIG_DEFAULT_NOOP is not set |
| 241 | CONFIG_DEFAULT_IOSCHED="deadline" | 268 | CONFIG_DEFAULT_IOSCHED="deadline" |
| 242 | CONFIG_CLASSIC_RCU=y | 269 | # CONFIG_INLINE_SPIN_TRYLOCK is not set |
| 270 | # CONFIG_INLINE_SPIN_TRYLOCK_BH is not set | ||
| 271 | # CONFIG_INLINE_SPIN_LOCK is not set | ||
| 272 | # CONFIG_INLINE_SPIN_LOCK_BH is not set | ||
| 273 | # CONFIG_INLINE_SPIN_LOCK_IRQ is not set | ||
| 274 | # CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set | ||
| 275 | CONFIG_INLINE_SPIN_UNLOCK=y | ||
| 276 | # CONFIG_INLINE_SPIN_UNLOCK_BH is not set | ||
| 277 | CONFIG_INLINE_SPIN_UNLOCK_IRQ=y | ||
| 278 | # CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set | ||
| 279 | # CONFIG_INLINE_READ_TRYLOCK is not set | ||
| 280 | # CONFIG_INLINE_READ_LOCK is not set | ||
| 281 | # CONFIG_INLINE_READ_LOCK_BH is not set | ||
| 282 | # CONFIG_INLINE_READ_LOCK_IRQ is not set | ||
| 283 | # CONFIG_INLINE_READ_LOCK_IRQSAVE is not set | ||
| 284 | CONFIG_INLINE_READ_UNLOCK=y | ||
| 285 | # CONFIG_INLINE_READ_UNLOCK_BH is not set | ||
| 286 | CONFIG_INLINE_READ_UNLOCK_IRQ=y | ||
| 287 | # CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set | ||
| 288 | # CONFIG_INLINE_WRITE_TRYLOCK is not set | ||
| 289 | # CONFIG_INLINE_WRITE_LOCK is not set | ||
| 290 | # CONFIG_INLINE_WRITE_LOCK_BH is not set | ||
| 291 | # CONFIG_INLINE_WRITE_LOCK_IRQ is not set | ||
| 292 | # CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set | ||
| 293 | CONFIG_INLINE_WRITE_UNLOCK=y | ||
| 294 | # CONFIG_INLINE_WRITE_UNLOCK_BH is not set | ||
| 295 | CONFIG_INLINE_WRITE_UNLOCK_IRQ=y | ||
| 296 | # CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set | ||
| 297 | # CONFIG_MUTEX_SPIN_ON_OWNER is not set | ||
| 298 | # CONFIG_FREEZER is not set | ||
| 243 | 299 | ||
| 244 | # | 300 | # |
| 245 | # Bus options (PCI, PCMCIA, EISA, ISA, TC) | 301 | # Bus options (PCI, PCMCIA, EISA, ISA, TC) |
| @@ -248,7 +304,8 @@ CONFIG_HW_HAS_PCI=y | |||
| 248 | CONFIG_PCI=y | 304 | CONFIG_PCI=y |
| 249 | CONFIG_PCI_DOMAINS=y | 305 | CONFIG_PCI_DOMAINS=y |
| 250 | # CONFIG_ARCH_SUPPORTS_MSI is not set | 306 | # CONFIG_ARCH_SUPPORTS_MSI is not set |
| 251 | CONFIG_PCI_LEGACY=y | 307 | # CONFIG_PCI_STUB is not set |
| 308 | # CONFIG_PCI_IOV is not set | ||
| 252 | CONFIG_MMU=y | 309 | CONFIG_MMU=y |
| 253 | # CONFIG_PCCARD is not set | 310 | # CONFIG_PCCARD is not set |
| 254 | # CONFIG_HOTPLUG_PCI is not set | 311 | # CONFIG_HOTPLUG_PCI is not set |
| @@ -257,25 +314,22 @@ CONFIG_MMU=y | |||
| 257 | # Executable file formats | 314 | # Executable file formats |
| 258 | # | 315 | # |
| 259 | CONFIG_BINFMT_ELF=y | 316 | CONFIG_BINFMT_ELF=y |
| 317 | # CONFIG_HAVE_AOUT is not set | ||
| 260 | # CONFIG_BINFMT_MISC is not set | 318 | # CONFIG_BINFMT_MISC is not set |
| 261 | CONFIG_TRAD_SIGNALS=y | 319 | CONFIG_TRAD_SIGNALS=y |
| 262 | 320 | ||
| 263 | # | 321 | # |
| 264 | # Power management options | 322 | # Power management options |
| 265 | # | 323 | # |
| 324 | CONFIG_ARCH_HIBERNATION_POSSIBLE=y | ||
| 266 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | 325 | CONFIG_ARCH_SUSPEND_POSSIBLE=y |
| 267 | # CONFIG_PM is not set | 326 | # CONFIG_PM is not set |
| 268 | |||
| 269 | # | ||
| 270 | # Networking | ||
| 271 | # | ||
| 272 | CONFIG_NET=y | 327 | CONFIG_NET=y |
| 273 | 328 | ||
| 274 | # | 329 | # |
| 275 | # Networking options | 330 | # Networking options |
| 276 | # | 331 | # |
| 277 | CONFIG_PACKET=y | 332 | CONFIG_PACKET=y |
| 278 | CONFIG_PACKET_MMAP=y | ||
| 279 | CONFIG_UNIX=y | 333 | CONFIG_UNIX=y |
| 280 | # CONFIG_NET_KEY is not set | 334 | # CONFIG_NET_KEY is not set |
| 281 | CONFIG_INET=y | 335 | CONFIG_INET=y |
| @@ -325,7 +379,6 @@ CONFIG_DEFAULT_VEGAS=y | |||
| 325 | # CONFIG_DEFAULT_RENO is not set | 379 | # CONFIG_DEFAULT_RENO is not set |
| 326 | CONFIG_DEFAULT_TCP_CONG="vegas" | 380 | CONFIG_DEFAULT_TCP_CONG="vegas" |
| 327 | # CONFIG_TCP_MD5SIG is not set | 381 | # CONFIG_TCP_MD5SIG is not set |
| 328 | # CONFIG_IP_VS is not set | ||
| 329 | # CONFIG_IPV6 is not set | 382 | # CONFIG_IPV6 is not set |
| 330 | # CONFIG_NETWORK_SECMARK is not set | 383 | # CONFIG_NETWORK_SECMARK is not set |
| 331 | CONFIG_NETFILTER=y | 384 | CONFIG_NETFILTER=y |
| @@ -336,8 +389,9 @@ CONFIG_NETFILTER_ADVANCED=y | |||
| 336 | # | 389 | # |
| 337 | # Core Netfilter Configuration | 390 | # Core Netfilter Configuration |
| 338 | # | 391 | # |
| 392 | CONFIG_NETFILTER_NETLINK=m | ||
| 339 | # CONFIG_NETFILTER_NETLINK_QUEUE is not set | 393 | # CONFIG_NETFILTER_NETLINK_QUEUE is not set |
| 340 | # CONFIG_NETFILTER_NETLINK_LOG is not set | 394 | CONFIG_NETFILTER_NETLINK_LOG=m |
| 341 | CONFIG_NF_CONNTRACK=y | 395 | CONFIG_NF_CONNTRACK=y |
| 342 | CONFIG_NF_CT_ACCT=y | 396 | CONFIG_NF_CT_ACCT=y |
| 343 | CONFIG_NF_CONNTRACK_MARK=y | 397 | CONFIG_NF_CONNTRACK_MARK=y |
| @@ -355,18 +409,23 @@ CONFIG_NF_CONNTRACK_IRC=m | |||
| 355 | # CONFIG_NF_CONNTRACK_SIP is not set | 409 | # CONFIG_NF_CONNTRACK_SIP is not set |
| 356 | CONFIG_NF_CONNTRACK_TFTP=m | 410 | CONFIG_NF_CONNTRACK_TFTP=m |
| 357 | # CONFIG_NF_CT_NETLINK is not set | 411 | # CONFIG_NF_CT_NETLINK is not set |
| 412 | # CONFIG_NETFILTER_TPROXY is not set | ||
| 358 | CONFIG_NETFILTER_XTABLES=y | 413 | CONFIG_NETFILTER_XTABLES=y |
| 359 | # CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set | 414 | # CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set |
| 360 | # CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set | 415 | # CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set |
| 416 | # CONFIG_NETFILTER_XT_TARGET_CT is not set | ||
| 361 | # CONFIG_NETFILTER_XT_TARGET_DSCP is not set | 417 | # CONFIG_NETFILTER_XT_TARGET_DSCP is not set |
| 418 | # CONFIG_NETFILTER_XT_TARGET_HL is not set | ||
| 419 | # CONFIG_NETFILTER_XT_TARGET_LED is not set | ||
| 362 | # CONFIG_NETFILTER_XT_TARGET_MARK is not set | 420 | # CONFIG_NETFILTER_XT_TARGET_MARK is not set |
| 363 | CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m | ||
| 364 | CONFIG_NETFILTER_XT_TARGET_NFLOG=m | 421 | CONFIG_NETFILTER_XT_TARGET_NFLOG=m |
| 422 | CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m | ||
| 365 | # CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set | 423 | # CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set |
| 366 | # CONFIG_NETFILTER_XT_TARGET_RATEEST is not set | 424 | # CONFIG_NETFILTER_XT_TARGET_RATEEST is not set |
| 367 | CONFIG_NETFILTER_XT_TARGET_TRACE=m | 425 | CONFIG_NETFILTER_XT_TARGET_TRACE=m |
| 368 | # CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set | 426 | # CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set |
| 369 | # CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set | 427 | # CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set |
| 428 | # CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set | ||
| 370 | CONFIG_NETFILTER_XT_MATCH_COMMENT=m | 429 | CONFIG_NETFILTER_XT_MATCH_COMMENT=m |
| 371 | # CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set | 430 | # CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set |
| 372 | CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m | 431 | CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m |
| @@ -375,18 +434,21 @@ CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m | |||
| 375 | CONFIG_NETFILTER_XT_MATCH_DCCP=m | 434 | CONFIG_NETFILTER_XT_MATCH_DCCP=m |
| 376 | # CONFIG_NETFILTER_XT_MATCH_DSCP is not set | 435 | # CONFIG_NETFILTER_XT_MATCH_DSCP is not set |
| 377 | # CONFIG_NETFILTER_XT_MATCH_ESP is not set | 436 | # CONFIG_NETFILTER_XT_MATCH_ESP is not set |
| 437 | CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m | ||
| 378 | # CONFIG_NETFILTER_XT_MATCH_HELPER is not set | 438 | # CONFIG_NETFILTER_XT_MATCH_HELPER is not set |
| 439 | # CONFIG_NETFILTER_XT_MATCH_HL is not set | ||
| 379 | # CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set | 440 | # CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set |
| 380 | # CONFIG_NETFILTER_XT_MATCH_LENGTH is not set | 441 | # CONFIG_NETFILTER_XT_MATCH_LENGTH is not set |
| 381 | CONFIG_NETFILTER_XT_MATCH_LIMIT=y | 442 | CONFIG_NETFILTER_XT_MATCH_LIMIT=y |
| 382 | # CONFIG_NETFILTER_XT_MATCH_MAC is not set | 443 | # CONFIG_NETFILTER_XT_MATCH_MAC is not set |
| 383 | # CONFIG_NETFILTER_XT_MATCH_MARK is not set | 444 | # CONFIG_NETFILTER_XT_MATCH_MARK is not set |
| 384 | # CONFIG_NETFILTER_XT_MATCH_OWNER is not set | ||
| 385 | CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y | 445 | CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y |
| 446 | # CONFIG_NETFILTER_XT_MATCH_OWNER is not set | ||
| 386 | # CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set | 447 | # CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set |
| 387 | # CONFIG_NETFILTER_XT_MATCH_QUOTA is not set | 448 | # CONFIG_NETFILTER_XT_MATCH_QUOTA is not set |
| 388 | # CONFIG_NETFILTER_XT_MATCH_RATEEST is not set | 449 | # CONFIG_NETFILTER_XT_MATCH_RATEEST is not set |
| 389 | CONFIG_NETFILTER_XT_MATCH_REALM=m | 450 | CONFIG_NETFILTER_XT_MATCH_REALM=m |
| 451 | # CONFIG_NETFILTER_XT_MATCH_RECENT is not set | ||
| 390 | CONFIG_NETFILTER_XT_MATCH_SCTP=m | 452 | CONFIG_NETFILTER_XT_MATCH_SCTP=m |
| 391 | CONFIG_NETFILTER_XT_MATCH_STATE=y | 453 | CONFIG_NETFILTER_XT_MATCH_STATE=y |
| 392 | # CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set | 454 | # CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set |
| @@ -394,20 +456,21 @@ CONFIG_NETFILTER_XT_MATCH_STATE=y | |||
| 394 | # CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set | 456 | # CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set |
| 395 | # CONFIG_NETFILTER_XT_MATCH_TIME is not set | 457 | # CONFIG_NETFILTER_XT_MATCH_TIME is not set |
| 396 | CONFIG_NETFILTER_XT_MATCH_U32=m | 458 | CONFIG_NETFILTER_XT_MATCH_U32=m |
| 397 | CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m | 459 | # CONFIG_NETFILTER_XT_MATCH_OSF is not set |
| 460 | # CONFIG_IP_VS is not set | ||
| 398 | 461 | ||
| 399 | # | 462 | # |
| 400 | # IP: Netfilter Configuration | 463 | # IP: Netfilter Configuration |
| 401 | # | 464 | # |
| 465 | CONFIG_NF_DEFRAG_IPV4=y | ||
| 402 | CONFIG_NF_CONNTRACK_IPV4=y | 466 | CONFIG_NF_CONNTRACK_IPV4=y |
| 403 | CONFIG_NF_CONNTRACK_PROC_COMPAT=y | 467 | CONFIG_NF_CONNTRACK_PROC_COMPAT=y |
| 404 | # CONFIG_IP_NF_QUEUE is not set | 468 | # CONFIG_IP_NF_QUEUE is not set |
| 405 | CONFIG_IP_NF_IPTABLES=y | 469 | CONFIG_IP_NF_IPTABLES=y |
| 406 | # CONFIG_IP_NF_MATCH_RECENT is not set | 470 | CONFIG_IP_NF_MATCH_ADDRTYPE=m |
| 407 | # CONFIG_IP_NF_MATCH_ECN is not set | ||
| 408 | # CONFIG_IP_NF_MATCH_AH is not set | 471 | # CONFIG_IP_NF_MATCH_AH is not set |
| 472 | # CONFIG_IP_NF_MATCH_ECN is not set | ||
| 409 | # CONFIG_IP_NF_MATCH_TTL is not set | 473 | # CONFIG_IP_NF_MATCH_TTL is not set |
| 410 | CONFIG_IP_NF_MATCH_ADDRTYPE=m | ||
| 411 | CONFIG_IP_NF_FILTER=y | 474 | CONFIG_IP_NF_FILTER=y |
| 412 | CONFIG_IP_NF_TARGET_REJECT=y | 475 | CONFIG_IP_NF_TARGET_REJECT=y |
| 413 | # CONFIG_IP_NF_TARGET_LOG is not set | 476 | # CONFIG_IP_NF_TARGET_LOG is not set |
| @@ -415,8 +478,8 @@ CONFIG_IP_NF_TARGET_REJECT=y | |||
| 415 | CONFIG_NF_NAT=y | 478 | CONFIG_NF_NAT=y |
| 416 | CONFIG_NF_NAT_NEEDED=y | 479 | CONFIG_NF_NAT_NEEDED=y |
| 417 | CONFIG_IP_NF_TARGET_MASQUERADE=y | 480 | CONFIG_IP_NF_TARGET_MASQUERADE=y |
| 418 | # CONFIG_IP_NF_TARGET_REDIRECT is not set | ||
| 419 | # CONFIG_IP_NF_TARGET_NETMAP is not set | 481 | # CONFIG_IP_NF_TARGET_NETMAP is not set |
| 482 | # CONFIG_IP_NF_TARGET_REDIRECT is not set | ||
| 420 | # CONFIG_NF_NAT_SNMP_BASIC is not set | 483 | # CONFIG_NF_NAT_SNMP_BASIC is not set |
| 421 | CONFIG_NF_NAT_FTP=m | 484 | CONFIG_NF_NAT_FTP=m |
| 422 | CONFIG_NF_NAT_IRC=m | 485 | CONFIG_NF_NAT_IRC=m |
| @@ -426,17 +489,22 @@ CONFIG_NF_NAT_TFTP=m | |||
| 426 | # CONFIG_NF_NAT_H323 is not set | 489 | # CONFIG_NF_NAT_H323 is not set |
| 427 | # CONFIG_NF_NAT_SIP is not set | 490 | # CONFIG_NF_NAT_SIP is not set |
| 428 | CONFIG_IP_NF_MANGLE=y | 491 | CONFIG_IP_NF_MANGLE=y |
| 492 | # CONFIG_IP_NF_TARGET_CLUSTERIP is not set | ||
| 429 | # CONFIG_IP_NF_TARGET_ECN is not set | 493 | # CONFIG_IP_NF_TARGET_ECN is not set |
| 430 | # CONFIG_IP_NF_TARGET_TTL is not set | 494 | # CONFIG_IP_NF_TARGET_TTL is not set |
| 431 | # CONFIG_IP_NF_TARGET_CLUSTERIP is not set | ||
| 432 | CONFIG_IP_NF_RAW=m | 495 | CONFIG_IP_NF_RAW=m |
| 433 | # CONFIG_IP_NF_ARPTABLES is not set | 496 | # CONFIG_IP_NF_ARPTABLES is not set |
| 434 | # CONFIG_IP_DCCP is not set | 497 | # CONFIG_IP_DCCP is not set |
| 435 | # CONFIG_IP_SCTP is not set | 498 | # CONFIG_IP_SCTP is not set |
| 499 | # CONFIG_RDS is not set | ||
| 436 | # CONFIG_TIPC is not set | 500 | # CONFIG_TIPC is not set |
| 437 | # CONFIG_ATM is not set | 501 | # CONFIG_ATM is not set |
| 502 | CONFIG_STP=y | ||
| 438 | CONFIG_BRIDGE=y | 503 | CONFIG_BRIDGE=y |
| 504 | CONFIG_BRIDGE_IGMP_SNOOPING=y | ||
| 505 | # CONFIG_NET_DSA is not set | ||
| 439 | CONFIG_VLAN_8021Q=y | 506 | CONFIG_VLAN_8021Q=y |
| 507 | # CONFIG_VLAN_8021Q_GVRP is not set | ||
| 440 | # CONFIG_DECNET is not set | 508 | # CONFIG_DECNET is not set |
| 441 | CONFIG_LLC=y | 509 | CONFIG_LLC=y |
| 442 | CONFIG_LLC2=m | 510 | CONFIG_LLC2=m |
| @@ -446,6 +514,8 @@ CONFIG_LLC2=m | |||
| 446 | # CONFIG_LAPB is not set | 514 | # CONFIG_LAPB is not set |
| 447 | # CONFIG_ECONET is not set | 515 | # CONFIG_ECONET is not set |
| 448 | # CONFIG_WAN_ROUTER is not set | 516 | # CONFIG_WAN_ROUTER is not set |
| 517 | # CONFIG_PHONET is not set | ||
| 518 | # CONFIG_IEEE802154 is not set | ||
| 449 | CONFIG_NET_SCHED=y | 519 | CONFIG_NET_SCHED=y |
| 450 | 520 | ||
| 451 | # | 521 | # |
| @@ -455,7 +525,7 @@ CONFIG_NET_SCH_CBQ=m | |||
| 455 | # CONFIG_NET_SCH_HTB is not set | 525 | # CONFIG_NET_SCH_HTB is not set |
| 456 | # CONFIG_NET_SCH_HFSC is not set | 526 | # CONFIG_NET_SCH_HFSC is not set |
| 457 | CONFIG_NET_SCH_PRIO=m | 527 | CONFIG_NET_SCH_PRIO=m |
| 458 | CONFIG_NET_SCH_RR=m | 528 | # CONFIG_NET_SCH_MULTIQ is not set |
| 459 | # CONFIG_NET_SCH_RED is not set | 529 | # CONFIG_NET_SCH_RED is not set |
| 460 | # CONFIG_NET_SCH_SFQ is not set | 530 | # CONFIG_NET_SCH_SFQ is not set |
| 461 | # CONFIG_NET_SCH_TEQL is not set | 531 | # CONFIG_NET_SCH_TEQL is not set |
| @@ -463,6 +533,7 @@ CONFIG_NET_SCH_RR=m | |||
| 463 | # CONFIG_NET_SCH_GRED is not set | 533 | # CONFIG_NET_SCH_GRED is not set |
| 464 | # CONFIG_NET_SCH_DSMARK is not set | 534 | # CONFIG_NET_SCH_DSMARK is not set |
| 465 | CONFIG_NET_SCH_NETEM=m | 535 | CONFIG_NET_SCH_NETEM=m |
| 536 | # CONFIG_NET_SCH_DRR is not set | ||
| 466 | # CONFIG_NET_SCH_INGRESS is not set | 537 | # CONFIG_NET_SCH_INGRESS is not set |
| 467 | 538 | ||
| 468 | # | 539 | # |
| @@ -496,8 +567,10 @@ CONFIG_NET_ACT_IPT=m | |||
| 496 | # CONFIG_NET_ACT_NAT is not set | 567 | # CONFIG_NET_ACT_NAT is not set |
| 497 | CONFIG_NET_ACT_PEDIT=m | 568 | CONFIG_NET_ACT_PEDIT=m |
| 498 | # CONFIG_NET_ACT_SIMP is not set | 569 | # CONFIG_NET_ACT_SIMP is not set |
| 570 | # CONFIG_NET_ACT_SKBEDIT is not set | ||
| 499 | CONFIG_NET_CLS_IND=y | 571 | CONFIG_NET_CLS_IND=y |
| 500 | CONFIG_NET_SCH_FIFO=y | 572 | CONFIG_NET_SCH_FIFO=y |
| 573 | # CONFIG_DCB is not set | ||
| 501 | 574 | ||
| 502 | # | 575 | # |
| 503 | # Network testing | 576 | # Network testing |
| @@ -514,14 +587,19 @@ CONFIG_HAMRADIO=y | |||
| 514 | # CONFIG_BT is not set | 587 | # CONFIG_BT is not set |
| 515 | # CONFIG_AF_RXRPC is not set | 588 | # CONFIG_AF_RXRPC is not set |
| 516 | CONFIG_FIB_RULES=y | 589 | CONFIG_FIB_RULES=y |
| 590 | CONFIG_WIRELESS=y | ||
| 591 | CONFIG_WIRELESS_EXT=y | ||
| 592 | CONFIG_WEXT_CORE=y | ||
| 593 | CONFIG_WEXT_PROC=y | ||
| 594 | CONFIG_WEXT_PRIV=y | ||
| 595 | # CONFIG_CFG80211 is not set | ||
| 596 | CONFIG_WIRELESS_EXT_SYSFS=y | ||
| 597 | # CONFIG_LIB80211 is not set | ||
| 517 | 598 | ||
| 518 | # | 599 | # |
| 519 | # Wireless | 600 | # CFG80211 needs to be enabled for MAC80211 |
| 520 | # | 601 | # |
| 521 | # CONFIG_CFG80211 is not set | 602 | # CONFIG_WIMAX is not set |
| 522 | CONFIG_WIRELESS_EXT=y | ||
| 523 | # CONFIG_MAC80211 is not set | ||
| 524 | # CONFIG_IEEE80211 is not set | ||
| 525 | # CONFIG_RFKILL is not set | 603 | # CONFIG_RFKILL is not set |
| 526 | # CONFIG_NET_9P is not set | 604 | # CONFIG_NET_9P is not set |
| 527 | 605 | ||
| @@ -533,13 +611,17 @@ CONFIG_WIRELESS_EXT=y | |||
| 533 | # Generic Driver Options | 611 | # Generic Driver Options |
| 534 | # | 612 | # |
| 535 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 613 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 614 | # CONFIG_DEVTMPFS is not set | ||
| 536 | CONFIG_STANDALONE=y | 615 | CONFIG_STANDALONE=y |
| 537 | CONFIG_PREVENT_FIRMWARE_BUILD=y | 616 | CONFIG_PREVENT_FIRMWARE_BUILD=y |
| 538 | CONFIG_FW_LOADER=y | 617 | CONFIG_FW_LOADER=y |
| 618 | CONFIG_FIRMWARE_IN_KERNEL=y | ||
| 619 | CONFIG_EXTRA_FIRMWARE="" | ||
| 539 | # CONFIG_SYS_HYPERVISOR is not set | 620 | # CONFIG_SYS_HYPERVISOR is not set |
| 540 | # CONFIG_CONNECTOR is not set | 621 | # CONFIG_CONNECTOR is not set |
| 541 | CONFIG_MTD=y | 622 | CONFIG_MTD=y |
| 542 | # CONFIG_MTD_DEBUG is not set | 623 | # CONFIG_MTD_DEBUG is not set |
| 624 | # CONFIG_MTD_TESTS is not set | ||
| 543 | # CONFIG_MTD_CONCAT is not set | 625 | # CONFIG_MTD_CONCAT is not set |
| 544 | CONFIG_MTD_PARTITIONS=y | 626 | CONFIG_MTD_PARTITIONS=y |
| 545 | # CONFIG_MTD_REDBOOT_PARTS is not set | 627 | # CONFIG_MTD_REDBOOT_PARTS is not set |
| @@ -612,6 +694,11 @@ CONFIG_MTD_NAND_PLATFORM=y | |||
| 612 | # CONFIG_MTD_ONENAND is not set | 694 | # CONFIG_MTD_ONENAND is not set |
| 613 | 695 | ||
| 614 | # | 696 | # |
| 697 | # LPDDR flash memory drivers | ||
| 698 | # | ||
| 699 | # CONFIG_MTD_LPDDR is not set | ||
| 700 | |||
| 701 | # | ||
| 615 | # UBI - Unsorted block images | 702 | # UBI - Unsorted block images |
| 616 | # | 703 | # |
| 617 | # CONFIG_MTD_UBI is not set | 704 | # CONFIG_MTD_UBI is not set |
| @@ -623,23 +710,36 @@ CONFIG_BLK_DEV=y | |||
| 623 | # CONFIG_BLK_DEV_UMEM is not set | 710 | # CONFIG_BLK_DEV_UMEM is not set |
| 624 | # CONFIG_BLK_DEV_COW_COMMON is not set | 711 | # CONFIG_BLK_DEV_COW_COMMON is not set |
| 625 | # CONFIG_BLK_DEV_LOOP is not set | 712 | # CONFIG_BLK_DEV_LOOP is not set |
| 713 | |||
| 714 | # | ||
| 715 | # DRBD disabled because PROC_FS, INET or CONNECTOR not selected | ||
| 716 | # | ||
| 626 | # CONFIG_BLK_DEV_NBD is not set | 717 | # CONFIG_BLK_DEV_NBD is not set |
| 627 | # CONFIG_BLK_DEV_SX8 is not set | 718 | # CONFIG_BLK_DEV_SX8 is not set |
| 628 | # CONFIG_BLK_DEV_RAM is not set | 719 | # CONFIG_BLK_DEV_RAM is not set |
| 629 | # CONFIG_CDROM_PKTCDVD is not set | 720 | # CONFIG_CDROM_PKTCDVD is not set |
| 630 | # CONFIG_ATA_OVER_ETH is not set | 721 | # CONFIG_ATA_OVER_ETH is not set |
| 722 | # CONFIG_BLK_DEV_HD is not set | ||
| 631 | CONFIG_MISC_DEVICES=y | 723 | CONFIG_MISC_DEVICES=y |
| 632 | # CONFIG_PHANTOM is not set | 724 | # CONFIG_PHANTOM is not set |
| 633 | # CONFIG_EEPROM_93CX6 is not set | ||
| 634 | # CONFIG_SGI_IOC4 is not set | 725 | # CONFIG_SGI_IOC4 is not set |
| 635 | # CONFIG_TIFM_CORE is not set | 726 | # CONFIG_TIFM_CORE is not set |
| 636 | # CONFIG_ENCLOSURE_SERVICES is not set | 727 | # CONFIG_ENCLOSURE_SERVICES is not set |
| 728 | # CONFIG_HP_ILO is not set | ||
| 729 | # CONFIG_C2PORT is not set | ||
| 730 | |||
| 731 | # | ||
| 732 | # EEPROM support | ||
| 733 | # | ||
| 734 | # CONFIG_EEPROM_93CX6 is not set | ||
| 735 | # CONFIG_CB710_CORE is not set | ||
| 637 | CONFIG_HAVE_IDE=y | 736 | CONFIG_HAVE_IDE=y |
| 638 | # CONFIG_IDE is not set | 737 | # CONFIG_IDE is not set |
| 639 | 738 | ||
| 640 | # | 739 | # |
| 641 | # SCSI device support | 740 | # SCSI device support |
| 642 | # | 741 | # |
| 742 | CONFIG_SCSI_MOD=y | ||
| 643 | # CONFIG_RAID_ATTRS is not set | 743 | # CONFIG_RAID_ATTRS is not set |
| 644 | CONFIG_SCSI=y | 744 | CONFIG_SCSI=y |
| 645 | CONFIG_SCSI_DMA=y | 745 | CONFIG_SCSI_DMA=y |
| @@ -656,10 +756,6 @@ CONFIG_SCSI_PROC_FS=y | |||
| 656 | # CONFIG_BLK_DEV_SR is not set | 756 | # CONFIG_BLK_DEV_SR is not set |
| 657 | # CONFIG_CHR_DEV_SG is not set | 757 | # CONFIG_CHR_DEV_SG is not set |
| 658 | # CONFIG_CHR_DEV_SCH is not set | 758 | # CONFIG_CHR_DEV_SCH is not set |
| 659 | |||
| 660 | # | ||
| 661 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs | ||
| 662 | # | ||
| 663 | # CONFIG_SCSI_MULTI_LUN is not set | 759 | # CONFIG_SCSI_MULTI_LUN is not set |
| 664 | # CONFIG_SCSI_CONSTANTS is not set | 760 | # CONFIG_SCSI_CONSTANTS is not set |
| 665 | # CONFIG_SCSI_LOGGING is not set | 761 | # CONFIG_SCSI_LOGGING is not set |
| @@ -676,27 +772,35 @@ CONFIG_SCSI_WAIT_SCAN=m | |||
| 676 | # CONFIG_SCSI_SRP_ATTRS is not set | 772 | # CONFIG_SCSI_SRP_ATTRS is not set |
| 677 | CONFIG_SCSI_LOWLEVEL=y | 773 | CONFIG_SCSI_LOWLEVEL=y |
| 678 | # CONFIG_ISCSI_TCP is not set | 774 | # CONFIG_ISCSI_TCP is not set |
| 775 | # CONFIG_SCSI_BNX2_ISCSI is not set | ||
| 776 | # CONFIG_BE2ISCSI is not set | ||
| 679 | # CONFIG_BLK_DEV_3W_XXXX_RAID is not set | 777 | # CONFIG_BLK_DEV_3W_XXXX_RAID is not set |
| 778 | # CONFIG_SCSI_HPSA is not set | ||
| 680 | # CONFIG_SCSI_3W_9XXX is not set | 779 | # CONFIG_SCSI_3W_9XXX is not set |
| 780 | # CONFIG_SCSI_3W_SAS is not set | ||
| 681 | # CONFIG_SCSI_ACARD is not set | 781 | # CONFIG_SCSI_ACARD is not set |
| 682 | # CONFIG_SCSI_AACRAID is not set | 782 | # CONFIG_SCSI_AACRAID is not set |
| 683 | # CONFIG_SCSI_AIC7XXX is not set | 783 | # CONFIG_SCSI_AIC7XXX is not set |
| 684 | # CONFIG_SCSI_AIC7XXX_OLD is not set | 784 | # CONFIG_SCSI_AIC7XXX_OLD is not set |
| 685 | # CONFIG_SCSI_AIC79XX is not set | 785 | # CONFIG_SCSI_AIC79XX is not set |
| 686 | # CONFIG_SCSI_AIC94XX is not set | 786 | # CONFIG_SCSI_AIC94XX is not set |
| 787 | # CONFIG_SCSI_MVSAS is not set | ||
| 687 | # CONFIG_SCSI_DPT_I2O is not set | 788 | # CONFIG_SCSI_DPT_I2O is not set |
| 688 | # CONFIG_SCSI_ADVANSYS is not set | 789 | # CONFIG_SCSI_ADVANSYS is not set |
| 689 | # CONFIG_SCSI_ARCMSR is not set | 790 | # CONFIG_SCSI_ARCMSR is not set |
| 690 | # CONFIG_MEGARAID_NEWGEN is not set | 791 | # CONFIG_MEGARAID_NEWGEN is not set |
| 691 | # CONFIG_MEGARAID_LEGACY is not set | 792 | # CONFIG_MEGARAID_LEGACY is not set |
| 692 | # CONFIG_MEGARAID_SAS is not set | 793 | # CONFIG_MEGARAID_SAS is not set |
| 794 | # CONFIG_SCSI_MPT2SAS is not set | ||
| 693 | # CONFIG_SCSI_HPTIOP is not set | 795 | # CONFIG_SCSI_HPTIOP is not set |
| 796 | # CONFIG_LIBFC is not set | ||
| 797 | # CONFIG_LIBFCOE is not set | ||
| 798 | # CONFIG_FCOE is not set | ||
| 694 | # CONFIG_SCSI_DMX3191D is not set | 799 | # CONFIG_SCSI_DMX3191D is not set |
| 695 | # CONFIG_SCSI_FUTURE_DOMAIN is not set | 800 | # CONFIG_SCSI_FUTURE_DOMAIN is not set |
| 696 | # CONFIG_SCSI_IPS is not set | 801 | # CONFIG_SCSI_IPS is not set |
| 697 | # CONFIG_SCSI_INITIO is not set | 802 | # CONFIG_SCSI_INITIO is not set |
| 698 | # CONFIG_SCSI_INIA100 is not set | 803 | # CONFIG_SCSI_INIA100 is not set |
| 699 | # CONFIG_SCSI_MVSAS is not set | ||
| 700 | # CONFIG_SCSI_STEX is not set | 804 | # CONFIG_SCSI_STEX is not set |
| 701 | # CONFIG_SCSI_SYM53C8XX_2 is not set | 805 | # CONFIG_SCSI_SYM53C8XX_2 is not set |
| 702 | # CONFIG_SCSI_IPR is not set | 806 | # CONFIG_SCSI_IPR is not set |
| @@ -708,9 +812,15 @@ CONFIG_SCSI_LOWLEVEL=y | |||
| 708 | # CONFIG_SCSI_DC390T is not set | 812 | # CONFIG_SCSI_DC390T is not set |
| 709 | # CONFIG_SCSI_NSP32 is not set | 813 | # CONFIG_SCSI_NSP32 is not set |
| 710 | # CONFIG_SCSI_DEBUG is not set | 814 | # CONFIG_SCSI_DEBUG is not set |
| 815 | # CONFIG_SCSI_PMCRAID is not set | ||
| 816 | # CONFIG_SCSI_PM8001 is not set | ||
| 711 | # CONFIG_SCSI_SRP is not set | 817 | # CONFIG_SCSI_SRP is not set |
| 818 | # CONFIG_SCSI_BFA_FC is not set | ||
| 819 | # CONFIG_SCSI_DH is not set | ||
| 820 | # CONFIG_SCSI_OSD_INITIATOR is not set | ||
| 712 | CONFIG_ATA=y | 821 | CONFIG_ATA=y |
| 713 | # CONFIG_ATA_NONSTANDARD is not set | 822 | # CONFIG_ATA_NONSTANDARD is not set |
| 823 | # CONFIG_ATA_VERBOSE_ERROR is not set | ||
| 714 | # CONFIG_SATA_PMP is not set | 824 | # CONFIG_SATA_PMP is not set |
| 715 | # CONFIG_SATA_AHCI is not set | 825 | # CONFIG_SATA_AHCI is not set |
| 716 | # CONFIG_SATA_SIL24 is not set | 826 | # CONFIG_SATA_SIL24 is not set |
| @@ -732,6 +842,7 @@ CONFIG_ATA_SFF=y | |||
| 732 | # CONFIG_PATA_ALI is not set | 842 | # CONFIG_PATA_ALI is not set |
| 733 | # CONFIG_PATA_AMD is not set | 843 | # CONFIG_PATA_AMD is not set |
| 734 | # CONFIG_PATA_ARTOP is not set | 844 | # CONFIG_PATA_ARTOP is not set |
| 845 | # CONFIG_PATA_ATP867X is not set | ||
| 735 | # CONFIG_PATA_ATIIXP is not set | 846 | # CONFIG_PATA_ATIIXP is not set |
| 736 | # CONFIG_PATA_CMD640_PCI is not set | 847 | # CONFIG_PATA_CMD640_PCI is not set |
| 737 | # CONFIG_PATA_CMD64X is not set | 848 | # CONFIG_PATA_CMD64X is not set |
| @@ -747,6 +858,7 @@ CONFIG_ATA_SFF=y | |||
| 747 | # CONFIG_PATA_IT821X is not set | 858 | # CONFIG_PATA_IT821X is not set |
| 748 | # CONFIG_PATA_IT8213 is not set | 859 | # CONFIG_PATA_IT8213 is not set |
| 749 | # CONFIG_PATA_JMICRON is not set | 860 | # CONFIG_PATA_JMICRON is not set |
| 861 | # CONFIG_PATA_LEGACY is not set | ||
| 750 | # CONFIG_PATA_TRIFLEX is not set | 862 | # CONFIG_PATA_TRIFLEX is not set |
| 751 | # CONFIG_PATA_MARVELL is not set | 863 | # CONFIG_PATA_MARVELL is not set |
| 752 | # CONFIG_PATA_MPIIX is not set | 864 | # CONFIG_PATA_MPIIX is not set |
| @@ -757,29 +869,39 @@ CONFIG_ATA_SFF=y | |||
| 757 | # CONFIG_PATA_NS87415 is not set | 869 | # CONFIG_PATA_NS87415 is not set |
| 758 | # CONFIG_PATA_OPTI is not set | 870 | # CONFIG_PATA_OPTI is not set |
| 759 | # CONFIG_PATA_OPTIDMA is not set | 871 | # CONFIG_PATA_OPTIDMA is not set |
| 872 | # CONFIG_PATA_PDC2027X is not set | ||
| 760 | # CONFIG_PATA_PDC_OLD is not set | 873 | # CONFIG_PATA_PDC_OLD is not set |
| 761 | # CONFIG_PATA_RADISYS is not set | 874 | # CONFIG_PATA_RADISYS is not set |
| 762 | CONFIG_PATA_RB532=y | 875 | CONFIG_PATA_RB532=y |
| 876 | # CONFIG_PATA_RDC is not set | ||
| 763 | # CONFIG_PATA_RZ1000 is not set | 877 | # CONFIG_PATA_RZ1000 is not set |
| 764 | # CONFIG_PATA_SC1200 is not set | 878 | # CONFIG_PATA_SC1200 is not set |
| 765 | # CONFIG_PATA_SERVERWORKS is not set | 879 | # CONFIG_PATA_SERVERWORKS is not set |
| 766 | # CONFIG_PATA_PDC2027X is not set | ||
| 767 | # CONFIG_PATA_SIL680 is not set | 880 | # CONFIG_PATA_SIL680 is not set |
| 768 | # CONFIG_PATA_SIS is not set | 881 | # CONFIG_PATA_SIS is not set |
| 882 | # CONFIG_PATA_TOSHIBA is not set | ||
| 769 | # CONFIG_PATA_VIA is not set | 883 | # CONFIG_PATA_VIA is not set |
| 770 | # CONFIG_PATA_WINBOND is not set | 884 | # CONFIG_PATA_WINBOND is not set |
| 771 | # CONFIG_PATA_PLATFORM is not set | 885 | # CONFIG_PATA_PLATFORM is not set |
| 886 | # CONFIG_PATA_SCH is not set | ||
| 772 | # CONFIG_MD is not set | 887 | # CONFIG_MD is not set |
| 773 | # CONFIG_FUSION is not set | 888 | # CONFIG_FUSION is not set |
| 774 | 889 | ||
| 775 | # | 890 | # |
| 776 | # IEEE 1394 (FireWire) support | 891 | # IEEE 1394 (FireWire) support |
| 777 | # | 892 | # |
| 893 | |||
| 894 | # | ||
| 895 | # You can enable one or both FireWire driver stacks. | ||
| 896 | # | ||
| 897 | |||
| 898 | # | ||
| 899 | # The newer stack is recommended. | ||
| 900 | # | ||
| 778 | # CONFIG_FIREWIRE is not set | 901 | # CONFIG_FIREWIRE is not set |
| 779 | # CONFIG_IEEE1394 is not set | 902 | # CONFIG_IEEE1394 is not set |
| 780 | # CONFIG_I2O is not set | 903 | # CONFIG_I2O is not set |
| 781 | CONFIG_NETDEVICES=y | 904 | CONFIG_NETDEVICES=y |
| 782 | # CONFIG_NETDEVICES_MULTIQUEUE is not set | ||
| 783 | CONFIG_IFB=m | 905 | CONFIG_IFB=m |
| 784 | # CONFIG_DUMMY is not set | 906 | # CONFIG_DUMMY is not set |
| 785 | # CONFIG_BONDING is not set | 907 | # CONFIG_BONDING is not set |
| @@ -797,21 +919,28 @@ CONFIG_KORINA=y | |||
| 797 | # CONFIG_SUNGEM is not set | 919 | # CONFIG_SUNGEM is not set |
| 798 | # CONFIG_CASSINI is not set | 920 | # CONFIG_CASSINI is not set |
| 799 | # CONFIG_NET_VENDOR_3COM is not set | 921 | # CONFIG_NET_VENDOR_3COM is not set |
| 922 | # CONFIG_SMC91X is not set | ||
| 800 | # CONFIG_DM9000 is not set | 923 | # CONFIG_DM9000 is not set |
| 924 | # CONFIG_ETHOC is not set | ||
| 925 | # CONFIG_SMSC911X is not set | ||
| 926 | # CONFIG_DNET is not set | ||
| 801 | # CONFIG_NET_TULIP is not set | 927 | # CONFIG_NET_TULIP is not set |
| 802 | # CONFIG_HP100 is not set | 928 | # CONFIG_HP100 is not set |
| 803 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | 929 | # CONFIG_IBM_NEW_EMAC_ZMII is not set |
| 804 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | 930 | # CONFIG_IBM_NEW_EMAC_RGMII is not set |
| 805 | # CONFIG_IBM_NEW_EMAC_TAH is not set | 931 | # CONFIG_IBM_NEW_EMAC_TAH is not set |
| 806 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | 932 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set |
| 933 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
| 934 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
| 935 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
| 807 | CONFIG_NET_PCI=y | 936 | CONFIG_NET_PCI=y |
| 808 | # CONFIG_PCNET32 is not set | 937 | # CONFIG_PCNET32 is not set |
| 809 | # CONFIG_AMD8111_ETH is not set | 938 | # CONFIG_AMD8111_ETH is not set |
| 810 | # CONFIG_ADAPTEC_STARFIRE is not set | 939 | # CONFIG_ADAPTEC_STARFIRE is not set |
| 940 | # CONFIG_KSZ884X_PCI is not set | ||
| 811 | # CONFIG_B44 is not set | 941 | # CONFIG_B44 is not set |
| 812 | # CONFIG_FORCEDETH is not set | 942 | # CONFIG_FORCEDETH is not set |
| 813 | # CONFIG_TC35815 is not set | 943 | # CONFIG_TC35815 is not set |
| 814 | # CONFIG_EEPRO100 is not set | ||
| 815 | # CONFIG_E100 is not set | 944 | # CONFIG_E100 is not set |
| 816 | # CONFIG_FEALNX is not set | 945 | # CONFIG_FEALNX is not set |
| 817 | # CONFIG_NATSEMI is not set | 946 | # CONFIG_NATSEMI is not set |
| @@ -821,30 +950,27 @@ CONFIG_NET_PCI=y | |||
| 821 | # CONFIG_R6040 is not set | 950 | # CONFIG_R6040 is not set |
| 822 | # CONFIG_SIS900 is not set | 951 | # CONFIG_SIS900 is not set |
| 823 | # CONFIG_EPIC100 is not set | 952 | # CONFIG_EPIC100 is not set |
| 953 | # CONFIG_SMSC9420 is not set | ||
| 824 | # CONFIG_SUNDANCE is not set | 954 | # CONFIG_SUNDANCE is not set |
| 825 | # CONFIG_TLAN is not set | 955 | # CONFIG_TLAN is not set |
| 956 | # CONFIG_KS8842 is not set | ||
| 957 | # CONFIG_KS8851_MLL is not set | ||
| 826 | CONFIG_VIA_RHINE=y | 958 | CONFIG_VIA_RHINE=y |
| 827 | # CONFIG_VIA_RHINE_MMIO is not set | 959 | # CONFIG_VIA_RHINE_MMIO is not set |
| 828 | CONFIG_VIA_RHINE_NAPI=y | ||
| 829 | # CONFIG_SC92031 is not set | 960 | # CONFIG_SC92031 is not set |
| 961 | # CONFIG_ATL2 is not set | ||
| 830 | # CONFIG_NETDEV_1000 is not set | 962 | # CONFIG_NETDEV_1000 is not set |
| 831 | # CONFIG_NETDEV_10000 is not set | 963 | # CONFIG_NETDEV_10000 is not set |
| 832 | # CONFIG_TR is not set | 964 | # CONFIG_TR is not set |
| 833 | 965 | CONFIG_WLAN=y | |
| 834 | # | ||
| 835 | # Wireless LAN | ||
| 836 | # | ||
| 837 | # CONFIG_WLAN_PRE80211 is not set | ||
| 838 | CONFIG_WLAN_80211=y | ||
| 839 | # CONFIG_IPW2100 is not set | ||
| 840 | # CONFIG_IPW2200 is not set | ||
| 841 | # CONFIG_LIBERTAS is not set | ||
| 842 | # CONFIG_HERMES is not set | ||
| 843 | CONFIG_ATMEL=m | 966 | CONFIG_ATMEL=m |
| 844 | # CONFIG_PCI_ATMEL is not set | 967 | # CONFIG_PCI_ATMEL is not set |
| 845 | # CONFIG_PRISM54 is not set | 968 | # CONFIG_PRISM54 is not set |
| 846 | # CONFIG_IWLWIFI_LEDS is not set | ||
| 847 | # CONFIG_HOSTAP is not set | 969 | # CONFIG_HOSTAP is not set |
| 970 | |||
| 971 | # | ||
| 972 | # Enable WiMAX (Networking options) to see the WiMAX drivers | ||
| 973 | # | ||
| 848 | # CONFIG_WAN is not set | 974 | # CONFIG_WAN is not set |
| 849 | # CONFIG_FDDI is not set | 975 | # CONFIG_FDDI is not set |
| 850 | # CONFIG_HIPPI is not set | 976 | # CONFIG_HIPPI is not set |
| @@ -864,6 +990,7 @@ CONFIG_SLHC=m | |||
| 864 | # CONFIG_NETCONSOLE is not set | 990 | # CONFIG_NETCONSOLE is not set |
| 865 | # CONFIG_NETPOLL is not set | 991 | # CONFIG_NETPOLL is not set |
| 866 | # CONFIG_NET_POLL_CONTROLLER is not set | 992 | # CONFIG_NET_POLL_CONTROLLER is not set |
| 993 | # CONFIG_VMXNET3 is not set | ||
| 867 | # CONFIG_ISDN is not set | 994 | # CONFIG_ISDN is not set |
| 868 | # CONFIG_PHONE is not set | 995 | # CONFIG_PHONE is not set |
| 869 | 996 | ||
| @@ -872,7 +999,8 @@ CONFIG_SLHC=m | |||
| 872 | # | 999 | # |
| 873 | CONFIG_INPUT=y | 1000 | CONFIG_INPUT=y |
| 874 | # CONFIG_INPUT_FF_MEMLESS is not set | 1001 | # CONFIG_INPUT_FF_MEMLESS is not set |
| 875 | # CONFIG_INPUT_POLLDEV is not set | 1002 | CONFIG_INPUT_POLLDEV=y |
| 1003 | # CONFIG_INPUT_SPARSEKMAP is not set | ||
| 876 | 1004 | ||
| 877 | # | 1005 | # |
| 878 | # Userland interfaces | 1006 | # Userland interfaces |
| @@ -887,17 +1015,29 @@ CONFIG_INPUT=y | |||
| 887 | # | 1015 | # |
| 888 | CONFIG_INPUT_KEYBOARD=y | 1016 | CONFIG_INPUT_KEYBOARD=y |
| 889 | # CONFIG_KEYBOARD_ATKBD is not set | 1017 | # CONFIG_KEYBOARD_ATKBD is not set |
| 890 | # CONFIG_KEYBOARD_SUNKBD is not set | ||
| 891 | # CONFIG_KEYBOARD_LKKBD is not set | 1018 | # CONFIG_KEYBOARD_LKKBD is not set |
| 892 | # CONFIG_KEYBOARD_XTKBD is not set | 1019 | # CONFIG_KEYBOARD_GPIO is not set |
| 1020 | # CONFIG_KEYBOARD_MATRIX is not set | ||
| 893 | # CONFIG_KEYBOARD_NEWTON is not set | 1021 | # CONFIG_KEYBOARD_NEWTON is not set |
| 1022 | # CONFIG_KEYBOARD_OPENCORES is not set | ||
| 894 | # CONFIG_KEYBOARD_STOWAWAY is not set | 1023 | # CONFIG_KEYBOARD_STOWAWAY is not set |
| 895 | # CONFIG_KEYBOARD_GPIO is not set | 1024 | # CONFIG_KEYBOARD_SUNKBD is not set |
| 1025 | # CONFIG_KEYBOARD_XTKBD is not set | ||
| 896 | # CONFIG_INPUT_MOUSE is not set | 1026 | # CONFIG_INPUT_MOUSE is not set |
| 897 | # CONFIG_INPUT_JOYSTICK is not set | 1027 | # CONFIG_INPUT_JOYSTICK is not set |
| 898 | # CONFIG_INPUT_TABLET is not set | 1028 | # CONFIG_INPUT_TABLET is not set |
| 899 | # CONFIG_INPUT_TOUCHSCREEN is not set | 1029 | # CONFIG_INPUT_TOUCHSCREEN is not set |
| 900 | # CONFIG_INPUT_MISC is not set | 1030 | CONFIG_INPUT_MISC=y |
| 1031 | # CONFIG_INPUT_PCSPKR is not set | ||
| 1032 | # CONFIG_INPUT_ATI_REMOTE is not set | ||
| 1033 | # CONFIG_INPUT_ATI_REMOTE2 is not set | ||
| 1034 | # CONFIG_INPUT_KEYSPAN_REMOTE is not set | ||
| 1035 | # CONFIG_INPUT_POWERMATE is not set | ||
| 1036 | # CONFIG_INPUT_YEALINK is not set | ||
| 1037 | # CONFIG_INPUT_CM109 is not set | ||
| 1038 | # CONFIG_INPUT_UINPUT is not set | ||
| 1039 | # CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set | ||
| 1040 | CONFIG_INPUT_RB532_BUTTON=y | ||
| 901 | 1041 | ||
| 902 | # | 1042 | # |
| 903 | # Hardware I/O ports | 1043 | # Hardware I/O ports |
| @@ -909,6 +1049,7 @@ CONFIG_INPUT_KEYBOARD=y | |||
| 909 | # Character devices | 1049 | # Character devices |
| 910 | # | 1050 | # |
| 911 | # CONFIG_VT is not set | 1051 | # CONFIG_VT is not set |
| 1052 | CONFIG_DEVKMEM=y | ||
| 912 | # CONFIG_SERIAL_NONSTANDARD is not set | 1053 | # CONFIG_SERIAL_NONSTANDARD is not set |
| 913 | # CONFIG_NOZOMI is not set | 1054 | # CONFIG_NOZOMI is not set |
| 914 | 1055 | ||
| @@ -928,105 +1069,95 @@ CONFIG_SERIAL_8250_RUNTIME_UARTS=2 | |||
| 928 | CONFIG_SERIAL_CORE=y | 1069 | CONFIG_SERIAL_CORE=y |
| 929 | CONFIG_SERIAL_CORE_CONSOLE=y | 1070 | CONFIG_SERIAL_CORE_CONSOLE=y |
| 930 | # CONFIG_SERIAL_JSM is not set | 1071 | # CONFIG_SERIAL_JSM is not set |
| 1072 | # CONFIG_SERIAL_TIMBERDALE is not set | ||
| 931 | CONFIG_UNIX98_PTYS=y | 1073 | CONFIG_UNIX98_PTYS=y |
| 1074 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
| 932 | # CONFIG_LEGACY_PTYS is not set | 1075 | # CONFIG_LEGACY_PTYS is not set |
| 933 | # CONFIG_IPMI_HANDLER is not set | 1076 | # CONFIG_IPMI_HANDLER is not set |
| 934 | CONFIG_HW_RANDOM=y | 1077 | CONFIG_HW_RANDOM=y |
| 935 | # CONFIG_RTC is not set | 1078 | # CONFIG_HW_RANDOM_TIMERIOMEM is not set |
| 936 | # CONFIG_R3964 is not set | 1079 | # CONFIG_R3964 is not set |
| 937 | # CONFIG_APPLICOM is not set | 1080 | # CONFIG_APPLICOM is not set |
| 938 | # CONFIG_RAW_DRIVER is not set | 1081 | # CONFIG_RAW_DRIVER is not set |
| 939 | # CONFIG_TCG_TPM is not set | 1082 | # CONFIG_TCG_TPM is not set |
| 940 | CONFIG_DEVPORT=y | 1083 | CONFIG_DEVPORT=y |
| 941 | # CONFIG_I2C is not set | 1084 | # CONFIG_I2C is not set |
| 942 | |||
| 943 | # | ||
| 944 | # SPI support | ||
| 945 | # | ||
| 946 | # CONFIG_SPI is not set | 1085 | # CONFIG_SPI is not set |
| 947 | # CONFIG_SPI_MASTER is not set | ||
| 948 | # CONFIG_W1 is not set | ||
| 949 | # CONFIG_POWER_SUPPLY is not set | ||
| 950 | # CONFIG_HWMON is not set | ||
| 951 | # CONFIG_THERMAL is not set | ||
| 952 | CONFIG_WATCHDOG=y | ||
| 953 | # CONFIG_WATCHDOG_NOWAYOUT is not set | ||
| 954 | 1086 | ||
| 955 | # | 1087 | # |
| 956 | # Watchdog Device Drivers | 1088 | # PPS support |
| 957 | # | 1089 | # |
| 958 | # CONFIG_SOFT_WATCHDOG is not set | 1090 | # CONFIG_PPS is not set |
| 1091 | CONFIG_ARCH_REQUIRE_GPIOLIB=y | ||
| 1092 | CONFIG_GPIOLIB=y | ||
| 1093 | CONFIG_GPIO_SYSFS=y | ||
| 959 | 1094 | ||
| 960 | # | 1095 | # |
| 961 | # PCI-based Watchdog Cards | 1096 | # Memory mapped GPIO expanders: |
| 962 | # | 1097 | # |
| 963 | # CONFIG_PCIPCWATCHDOG is not set | 1098 | # CONFIG_GPIO_IT8761E is not set |
| 964 | # CONFIG_WDTPCI is not set | 1099 | # CONFIG_GPIO_SCH is not set |
| 965 | 1100 | ||
| 966 | # | 1101 | # |
| 967 | # Sonics Silicon Backplane | 1102 | # I2C GPIO expanders: |
| 968 | # | 1103 | # |
| 969 | CONFIG_SSB_POSSIBLE=y | ||
| 970 | # CONFIG_SSB is not set | ||
| 971 | 1104 | ||
| 972 | # | 1105 | # |
| 973 | # Multifunction device drivers | 1106 | # PCI GPIO expanders: |
| 974 | # | ||
| 975 | # CONFIG_MFD_SM501 is not set | ||
| 976 | # CONFIG_HTC_PASIC3 is not set | ||
| 977 | |||
| 978 | # | ||
| 979 | # Multimedia devices | ||
| 980 | # | ||
| 981 | CONFIG_VIDEO_DEV=m | ||
| 982 | CONFIG_VIDEO_V4L2_COMMON=m | ||
| 983 | CONFIG_VIDEO_ALLOW_V4L1=y | ||
| 984 | CONFIG_VIDEO_V4L1_COMPAT=y | ||
| 985 | CONFIG_VIDEO_V4L2=m | ||
| 986 | CONFIG_VIDEO_V4L1=m | ||
| 987 | CONFIG_VIDEO_CAPTURE_DRIVERS=y | ||
| 988 | # CONFIG_VIDEO_ADV_DEBUG is not set | ||
| 989 | # CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set | ||
| 990 | |||
| 991 | # | ||
| 992 | # Encoders/decoders and other helper chips | ||
| 993 | # | 1107 | # |
| 1108 | # CONFIG_GPIO_CS5535 is not set | ||
| 1109 | # CONFIG_GPIO_BT8XX is not set | ||
| 1110 | # CONFIG_GPIO_LANGWELL is not set | ||
| 994 | 1111 | ||
| 995 | # | 1112 | # |
| 996 | # Audio decoders | 1113 | # SPI GPIO expanders: |
| 997 | # | 1114 | # |
| 998 | 1115 | ||
| 999 | # | 1116 | # |
| 1000 | # Video decoders | 1117 | # AC97 GPIO expanders: |
| 1001 | # | 1118 | # |
| 1119 | # CONFIG_W1 is not set | ||
| 1120 | # CONFIG_POWER_SUPPLY is not set | ||
| 1121 | # CONFIG_HWMON is not set | ||
| 1122 | # CONFIG_THERMAL is not set | ||
| 1123 | CONFIG_WATCHDOG=y | ||
| 1124 | CONFIG_WATCHDOG_NOWAYOUT=y | ||
| 1002 | 1125 | ||
| 1003 | # | 1126 | # |
| 1004 | # Video and audio decoders | 1127 | # Watchdog Device Drivers |
| 1005 | # | 1128 | # |
| 1129 | # CONFIG_SOFT_WATCHDOG is not set | ||
| 1130 | # CONFIG_ALIM7101_WDT is not set | ||
| 1131 | CONFIG_RC32434_WDT=y | ||
| 1006 | 1132 | ||
| 1007 | # | 1133 | # |
| 1008 | # MPEG video encoders | 1134 | # PCI-based Watchdog Cards |
| 1009 | # | 1135 | # |
| 1010 | # CONFIG_VIDEO_CX2341X is not set | 1136 | # CONFIG_PCIPCWATCHDOG is not set |
| 1137 | # CONFIG_WDTPCI is not set | ||
| 1138 | CONFIG_SSB_POSSIBLE=y | ||
| 1011 | 1139 | ||
| 1012 | # | 1140 | # |
| 1013 | # Video encoders | 1141 | # Sonics Silicon Backplane |
| 1014 | # | 1142 | # |
| 1143 | # CONFIG_SSB is not set | ||
| 1015 | 1144 | ||
| 1016 | # | 1145 | # |
| 1017 | # Video improvement chips | 1146 | # Multifunction device drivers |
| 1018 | # | 1147 | # |
| 1019 | # CONFIG_VIDEO_VIVI is not set | 1148 | # CONFIG_MFD_CORE is not set |
| 1020 | # CONFIG_VIDEO_CPIA is not set | 1149 | # CONFIG_MFD_SM501 is not set |
| 1021 | # CONFIG_VIDEO_STRADIS is not set | 1150 | # CONFIG_HTC_PASIC3 is not set |
| 1022 | # CONFIG_SOC_CAMERA is not set | 1151 | # CONFIG_MFD_TMIO is not set |
| 1023 | # CONFIG_RADIO_ADAPTERS is not set | 1152 | # CONFIG_MFD_TIMBERDALE is not set |
| 1024 | # CONFIG_DVB_CORE is not set | 1153 | # CONFIG_LPC_SCH is not set |
| 1025 | # CONFIG_DAB is not set | 1154 | # CONFIG_REGULATOR is not set |
| 1155 | # CONFIG_MEDIA_SUPPORT is not set | ||
| 1026 | 1156 | ||
| 1027 | # | 1157 | # |
| 1028 | # Graphics support | 1158 | # Graphics support |
| 1029 | # | 1159 | # |
| 1160 | # CONFIG_VGA_ARB is not set | ||
| 1030 | # CONFIG_DRM is not set | 1161 | # CONFIG_DRM is not set |
| 1031 | # CONFIG_VGASTATE is not set | 1162 | # CONFIG_VGASTATE is not set |
| 1032 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | 1163 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set |
| @@ -1037,13 +1168,10 @@ CONFIG_VIDEO_CAPTURE_DRIVERS=y | |||
| 1037 | # Display device support | 1168 | # Display device support |
| 1038 | # | 1169 | # |
| 1039 | # CONFIG_DISPLAY_SUPPORT is not set | 1170 | # CONFIG_DISPLAY_SUPPORT is not set |
| 1040 | |||
| 1041 | # | ||
| 1042 | # Sound | ||
| 1043 | # | ||
| 1044 | # CONFIG_SOUND is not set | 1171 | # CONFIG_SOUND is not set |
| 1045 | CONFIG_HID_SUPPORT=y | 1172 | CONFIG_HID_SUPPORT=y |
| 1046 | # CONFIG_HID is not set | 1173 | # CONFIG_HID is not set |
| 1174 | # CONFIG_HID_PID is not set | ||
| 1047 | CONFIG_USB_SUPPORT=y | 1175 | CONFIG_USB_SUPPORT=y |
| 1048 | CONFIG_USB_ARCH_HAS_HCD=y | 1176 | CONFIG_USB_ARCH_HAS_HCD=y |
| 1049 | CONFIG_USB_ARCH_HAS_OHCI=y | 1177 | CONFIG_USB_ARCH_HAS_OHCI=y |
| @@ -1053,9 +1181,18 @@ CONFIG_USB_ARCH_HAS_EHCI=y | |||
| 1053 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set | 1181 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set |
| 1054 | 1182 | ||
| 1055 | # | 1183 | # |
| 1056 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | 1184 | # Enable Host or Gadget support to see Inventra options |
| 1185 | # | ||
| 1186 | |||
| 1187 | # | ||
| 1188 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may | ||
| 1057 | # | 1189 | # |
| 1058 | # CONFIG_USB_GADGET is not set | 1190 | # CONFIG_USB_GADGET is not set |
| 1191 | |||
| 1192 | # | ||
| 1193 | # OTG and related infrastructure | ||
| 1194 | # | ||
| 1195 | # CONFIG_UWB is not set | ||
| 1059 | # CONFIG_MMC is not set | 1196 | # CONFIG_MMC is not set |
| 1060 | # CONFIG_MEMSTICK is not set | 1197 | # CONFIG_MEMSTICK is not set |
| 1061 | CONFIG_NEW_LEDS=y | 1198 | CONFIG_NEW_LEDS=y |
| @@ -1064,41 +1201,67 @@ CONFIG_LEDS_CLASS=y | |||
| 1064 | # | 1201 | # |
| 1065 | # LED drivers | 1202 | # LED drivers |
| 1066 | # | 1203 | # |
| 1204 | CONFIG_LEDS_MIKROTIK_RB532=y | ||
| 1067 | # CONFIG_LEDS_GPIO is not set | 1205 | # CONFIG_LEDS_GPIO is not set |
| 1206 | # CONFIG_LEDS_LT3593 is not set | ||
| 1207 | CONFIG_LEDS_TRIGGERS=y | ||
| 1068 | 1208 | ||
| 1069 | # | 1209 | # |
| 1070 | # LED Triggers | 1210 | # LED Triggers |
| 1071 | # | 1211 | # |
| 1072 | CONFIG_LEDS_TRIGGERS=y | ||
| 1073 | CONFIG_LEDS_TRIGGER_TIMER=y | 1212 | CONFIG_LEDS_TRIGGER_TIMER=y |
| 1074 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | 1213 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y |
| 1075 | # CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set | 1214 | # CONFIG_LEDS_TRIGGER_BACKLIGHT is not set |
| 1215 | # CONFIG_LEDS_TRIGGER_GPIO is not set | ||
| 1216 | CONFIG_LEDS_TRIGGER_DEFAULT_ON=y | ||
| 1217 | |||
| 1218 | # | ||
| 1219 | # iptables trigger is under Netfilter config (LED target) | ||
| 1220 | # | ||
| 1221 | # CONFIG_ACCESSIBILITY is not set | ||
| 1076 | # CONFIG_INFINIBAND is not set | 1222 | # CONFIG_INFINIBAND is not set |
| 1077 | CONFIG_RTC_LIB=y | 1223 | CONFIG_RTC_LIB=y |
| 1078 | # CONFIG_RTC_CLASS is not set | 1224 | # CONFIG_RTC_CLASS is not set |
| 1225 | # CONFIG_DMADEVICES is not set | ||
| 1226 | # CONFIG_AUXDISPLAY is not set | ||
| 1079 | # CONFIG_UIO is not set | 1227 | # CONFIG_UIO is not set |
| 1080 | 1228 | ||
| 1081 | # | 1229 | # |
| 1230 | # TI VLYNQ | ||
| 1231 | # | ||
| 1232 | # CONFIG_STAGING is not set | ||
| 1233 | |||
| 1234 | # | ||
| 1082 | # File systems | 1235 | # File systems |
| 1083 | # | 1236 | # |
| 1084 | CONFIG_EXT2_FS=y | 1237 | CONFIG_EXT2_FS=y |
| 1085 | # CONFIG_EXT2_FS_XATTR is not set | 1238 | # CONFIG_EXT2_FS_XATTR is not set |
| 1086 | # CONFIG_EXT2_FS_XIP is not set | 1239 | # CONFIG_EXT2_FS_XIP is not set |
| 1087 | # CONFIG_EXT3_FS is not set | 1240 | # CONFIG_EXT3_FS is not set |
| 1088 | # CONFIG_EXT4DEV_FS is not set | 1241 | # CONFIG_EXT4_FS is not set |
| 1089 | # CONFIG_REISERFS_FS is not set | 1242 | # CONFIG_REISERFS_FS is not set |
| 1090 | # CONFIG_JFS_FS is not set | 1243 | # CONFIG_JFS_FS is not set |
| 1091 | # CONFIG_FS_POSIX_ACL is not set | 1244 | # CONFIG_FS_POSIX_ACL is not set |
| 1092 | # CONFIG_XFS_FS is not set | 1245 | # CONFIG_XFS_FS is not set |
| 1093 | # CONFIG_OCFS2_FS is not set | 1246 | # CONFIG_OCFS2_FS is not set |
| 1247 | # CONFIG_BTRFS_FS is not set | ||
| 1248 | # CONFIG_NILFS2_FS is not set | ||
| 1249 | CONFIG_FILE_LOCKING=y | ||
| 1250 | CONFIG_FSNOTIFY=y | ||
| 1094 | # CONFIG_DNOTIFY is not set | 1251 | # CONFIG_DNOTIFY is not set |
| 1095 | # CONFIG_INOTIFY is not set | 1252 | # CONFIG_INOTIFY is not set |
| 1253 | CONFIG_INOTIFY_USER=y | ||
| 1096 | # CONFIG_QUOTA is not set | 1254 | # CONFIG_QUOTA is not set |
| 1097 | # CONFIG_AUTOFS_FS is not set | 1255 | # CONFIG_AUTOFS_FS is not set |
| 1098 | # CONFIG_AUTOFS4_FS is not set | 1256 | # CONFIG_AUTOFS4_FS is not set |
| 1099 | # CONFIG_FUSE_FS is not set | 1257 | # CONFIG_FUSE_FS is not set |
| 1100 | 1258 | ||
| 1101 | # | 1259 | # |
| 1260 | # Caches | ||
| 1261 | # | ||
| 1262 | # CONFIG_FSCACHE is not set | ||
| 1263 | |||
| 1264 | # | ||
| 1102 | # CD-ROM/DVD Filesystems | 1265 | # CD-ROM/DVD Filesystems |
| 1103 | # | 1266 | # |
| 1104 | # CONFIG_ISO9660_FS is not set | 1267 | # CONFIG_ISO9660_FS is not set |
| @@ -1117,15 +1280,13 @@ CONFIG_EXT2_FS=y | |||
| 1117 | CONFIG_PROC_FS=y | 1280 | CONFIG_PROC_FS=y |
| 1118 | CONFIG_PROC_KCORE=y | 1281 | CONFIG_PROC_KCORE=y |
| 1119 | CONFIG_PROC_SYSCTL=y | 1282 | CONFIG_PROC_SYSCTL=y |
| 1283 | CONFIG_PROC_PAGE_MONITOR=y | ||
| 1120 | CONFIG_SYSFS=y | 1284 | CONFIG_SYSFS=y |
| 1121 | CONFIG_TMPFS=y | 1285 | CONFIG_TMPFS=y |
| 1122 | # CONFIG_TMPFS_POSIX_ACL is not set | 1286 | # CONFIG_TMPFS_POSIX_ACL is not set |
| 1123 | # CONFIG_HUGETLB_PAGE is not set | 1287 | # CONFIG_HUGETLB_PAGE is not set |
| 1124 | CONFIG_CONFIGFS_FS=y | 1288 | CONFIG_CONFIGFS_FS=y |
| 1125 | 1289 | CONFIG_MISC_FILESYSTEMS=y | |
| 1126 | # | ||
| 1127 | # Miscellaneous filesystems | ||
| 1128 | # | ||
| 1129 | # CONFIG_ADFS_FS is not set | 1290 | # CONFIG_ADFS_FS is not set |
| 1130 | # CONFIG_AFFS_FS is not set | 1291 | # CONFIG_AFFS_FS is not set |
| 1131 | # CONFIG_HFS_FS is not set | 1292 | # CONFIG_HFS_FS is not set |
| @@ -1148,9 +1309,14 @@ CONFIG_JFFS2_RTIME=y | |||
| 1148 | CONFIG_JFFS2_CMODE_PRIORITY=y | 1309 | CONFIG_JFFS2_CMODE_PRIORITY=y |
| 1149 | # CONFIG_JFFS2_CMODE_SIZE is not set | 1310 | # CONFIG_JFFS2_CMODE_SIZE is not set |
| 1150 | # CONFIG_JFFS2_CMODE_FAVOURLZO is not set | 1311 | # CONFIG_JFFS2_CMODE_FAVOURLZO is not set |
| 1312 | # CONFIG_LOGFS is not set | ||
| 1151 | # CONFIG_CRAMFS is not set | 1313 | # CONFIG_CRAMFS is not set |
| 1314 | CONFIG_SQUASHFS=y | ||
| 1315 | # CONFIG_SQUASHFS_EMBEDDED is not set | ||
| 1316 | CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 | ||
| 1152 | # CONFIG_VXFS_FS is not set | 1317 | # CONFIG_VXFS_FS is not set |
| 1153 | # CONFIG_MINIX_FS is not set | 1318 | # CONFIG_MINIX_FS is not set |
| 1319 | # CONFIG_OMFS_FS is not set | ||
| 1154 | # CONFIG_HPFS_FS is not set | 1320 | # CONFIG_HPFS_FS is not set |
| 1155 | # CONFIG_QNX4FS_FS is not set | 1321 | # CONFIG_QNX4FS_FS is not set |
| 1156 | # CONFIG_ROMFS_FS is not set | 1322 | # CONFIG_ROMFS_FS is not set |
| @@ -1160,6 +1326,7 @@ CONFIG_NETWORK_FILESYSTEMS=y | |||
| 1160 | # CONFIG_NFS_FS is not set | 1326 | # CONFIG_NFS_FS is not set |
| 1161 | # CONFIG_NFSD is not set | 1327 | # CONFIG_NFSD is not set |
| 1162 | # CONFIG_SMB_FS is not set | 1328 | # CONFIG_SMB_FS is not set |
| 1329 | # CONFIG_CEPH_FS is not set | ||
| 1163 | # CONFIG_CIFS is not set | 1330 | # CONFIG_CIFS is not set |
| 1164 | # CONFIG_NCP_FS is not set | 1331 | # CONFIG_NCP_FS is not set |
| 1165 | # CONFIG_CODA_FS is not set | 1332 | # CONFIG_CODA_FS is not set |
| @@ -1198,11 +1365,22 @@ CONFIG_ENABLE_WARN_DEPRECATED=y | |||
| 1198 | # CONFIG_ENABLE_MUST_CHECK is not set | 1365 | # CONFIG_ENABLE_MUST_CHECK is not set |
| 1199 | CONFIG_FRAME_WARN=1024 | 1366 | CONFIG_FRAME_WARN=1024 |
| 1200 | # CONFIG_MAGIC_SYSRQ is not set | 1367 | # CONFIG_MAGIC_SYSRQ is not set |
| 1368 | CONFIG_STRIP_ASM_SYMS=y | ||
| 1201 | # CONFIG_UNUSED_SYMBOLS is not set | 1369 | # CONFIG_UNUSED_SYMBOLS is not set |
| 1202 | # CONFIG_DEBUG_FS is not set | 1370 | # CONFIG_DEBUG_FS is not set |
| 1203 | # CONFIG_HEADERS_CHECK is not set | 1371 | # CONFIG_HEADERS_CHECK is not set |
| 1204 | # CONFIG_DEBUG_KERNEL is not set | 1372 | # CONFIG_DEBUG_KERNEL is not set |
| 1373 | # CONFIG_DEBUG_MEMORY_INIT is not set | ||
| 1374 | # CONFIG_SYSCTL_SYSCALL_CHECK is not set | ||
| 1375 | CONFIG_HAVE_FUNCTION_TRACER=y | ||
| 1376 | CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y | ||
| 1377 | CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y | ||
| 1378 | CONFIG_HAVE_DYNAMIC_FTRACE=y | ||
| 1379 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y | ||
| 1380 | CONFIG_TRACING_SUPPORT=y | ||
| 1381 | # CONFIG_FTRACE is not set | ||
| 1205 | # CONFIG_SAMPLES is not set | 1382 | # CONFIG_SAMPLES is not set |
| 1383 | CONFIG_HAVE_ARCH_KGDB=y | ||
| 1206 | # CONFIG_CMDLINE_BOOL is not set | 1384 | # CONFIG_CMDLINE_BOOL is not set |
| 1207 | 1385 | ||
| 1208 | # | 1386 | # |
| @@ -1210,18 +1388,32 @@ CONFIG_FRAME_WARN=1024 | |||
| 1210 | # | 1388 | # |
| 1211 | # CONFIG_KEYS is not set | 1389 | # CONFIG_KEYS is not set |
| 1212 | # CONFIG_SECURITY is not set | 1390 | # CONFIG_SECURITY is not set |
| 1213 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | 1391 | # CONFIG_SECURITYFS is not set |
| 1392 | # CONFIG_DEFAULT_SECURITY_SELINUX is not set | ||
| 1393 | # CONFIG_DEFAULT_SECURITY_SMACK is not set | ||
| 1394 | # CONFIG_DEFAULT_SECURITY_TOMOYO is not set | ||
| 1395 | CONFIG_DEFAULT_SECURITY_DAC=y | ||
| 1396 | CONFIG_DEFAULT_SECURITY="" | ||
| 1214 | CONFIG_CRYPTO=y | 1397 | CONFIG_CRYPTO=y |
| 1215 | 1398 | ||
| 1216 | # | 1399 | # |
| 1217 | # Crypto core or helper | 1400 | # Crypto core or helper |
| 1218 | # | 1401 | # |
| 1402 | # CONFIG_CRYPTO_FIPS is not set | ||
| 1219 | CONFIG_CRYPTO_ALGAPI=m | 1403 | CONFIG_CRYPTO_ALGAPI=m |
| 1220 | CONFIG_CRYPTO_AEAD=m | 1404 | CONFIG_CRYPTO_ALGAPI2=y |
| 1221 | CONFIG_CRYPTO_BLKCIPHER=m | 1405 | CONFIG_CRYPTO_AEAD2=m |
| 1222 | # CONFIG_CRYPTO_MANAGER is not set | 1406 | CONFIG_CRYPTO_BLKCIPHER2=m |
| 1407 | CONFIG_CRYPTO_HASH=m | ||
| 1408 | CONFIG_CRYPTO_HASH2=m | ||
| 1409 | CONFIG_CRYPTO_RNG=m | ||
| 1410 | CONFIG_CRYPTO_RNG2=m | ||
| 1411 | CONFIG_CRYPTO_PCOMP=y | ||
| 1412 | CONFIG_CRYPTO_MANAGER=m | ||
| 1413 | CONFIG_CRYPTO_MANAGER2=m | ||
| 1223 | # CONFIG_CRYPTO_GF128MUL is not set | 1414 | # CONFIG_CRYPTO_GF128MUL is not set |
| 1224 | # CONFIG_CRYPTO_NULL is not set | 1415 | # CONFIG_CRYPTO_NULL is not set |
| 1416 | CONFIG_CRYPTO_WORKQUEUE=m | ||
| 1225 | # CONFIG_CRYPTO_CRYPTD is not set | 1417 | # CONFIG_CRYPTO_CRYPTD is not set |
| 1226 | # CONFIG_CRYPTO_AUTHENC is not set | 1418 | # CONFIG_CRYPTO_AUTHENC is not set |
| 1227 | CONFIG_CRYPTO_TEST=m | 1419 | CONFIG_CRYPTO_TEST=m |
| @@ -1249,14 +1441,20 @@ CONFIG_CRYPTO_TEST=m | |||
| 1249 | # | 1441 | # |
| 1250 | # CONFIG_CRYPTO_HMAC is not set | 1442 | # CONFIG_CRYPTO_HMAC is not set |
| 1251 | # CONFIG_CRYPTO_XCBC is not set | 1443 | # CONFIG_CRYPTO_XCBC is not set |
| 1444 | # CONFIG_CRYPTO_VMAC is not set | ||
| 1252 | 1445 | ||
| 1253 | # | 1446 | # |
| 1254 | # Digest | 1447 | # Digest |
| 1255 | # | 1448 | # |
| 1256 | # CONFIG_CRYPTO_CRC32C is not set | 1449 | CONFIG_CRYPTO_CRC32C=m |
| 1450 | # CONFIG_CRYPTO_GHASH is not set | ||
| 1257 | # CONFIG_CRYPTO_MD4 is not set | 1451 | # CONFIG_CRYPTO_MD4 is not set |
| 1258 | # CONFIG_CRYPTO_MD5 is not set | 1452 | # CONFIG_CRYPTO_MD5 is not set |
| 1259 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | 1453 | # CONFIG_CRYPTO_MICHAEL_MIC is not set |
| 1454 | # CONFIG_CRYPTO_RMD128 is not set | ||
| 1455 | # CONFIG_CRYPTO_RMD160 is not set | ||
| 1456 | # CONFIG_CRYPTO_RMD256 is not set | ||
| 1457 | # CONFIG_CRYPTO_RMD320 is not set | ||
| 1260 | # CONFIG_CRYPTO_SHA1 is not set | 1458 | # CONFIG_CRYPTO_SHA1 is not set |
| 1261 | # CONFIG_CRYPTO_SHA256 is not set | 1459 | # CONFIG_CRYPTO_SHA256 is not set |
| 1262 | # CONFIG_CRYPTO_SHA512 is not set | 1460 | # CONFIG_CRYPTO_SHA512 is not set |
| @@ -1266,7 +1464,7 @@ CONFIG_CRYPTO_TEST=m | |||
| 1266 | # | 1464 | # |
| 1267 | # Ciphers | 1465 | # Ciphers |
| 1268 | # | 1466 | # |
| 1269 | # CONFIG_CRYPTO_AES is not set | 1467 | CONFIG_CRYPTO_AES=m |
| 1270 | # CONFIG_CRYPTO_ANUBIS is not set | 1468 | # CONFIG_CRYPTO_ANUBIS is not set |
| 1271 | # CONFIG_CRYPTO_ARC4 is not set | 1469 | # CONFIG_CRYPTO_ARC4 is not set |
| 1272 | # CONFIG_CRYPTO_BLOWFISH is not set | 1470 | # CONFIG_CRYPTO_BLOWFISH is not set |
| @@ -1286,27 +1484,36 @@ CONFIG_CRYPTO_TEST=m | |||
| 1286 | # Compression | 1484 | # Compression |
| 1287 | # | 1485 | # |
| 1288 | # CONFIG_CRYPTO_DEFLATE is not set | 1486 | # CONFIG_CRYPTO_DEFLATE is not set |
| 1487 | CONFIG_CRYPTO_ZLIB=y | ||
| 1289 | # CONFIG_CRYPTO_LZO is not set | 1488 | # CONFIG_CRYPTO_LZO is not set |
| 1489 | |||
| 1490 | # | ||
| 1491 | # Random Number Generation | ||
| 1492 | # | ||
| 1493 | CONFIG_CRYPTO_ANSI_CPRNG=m | ||
| 1290 | # CONFIG_CRYPTO_HW is not set | 1494 | # CONFIG_CRYPTO_HW is not set |
| 1495 | # CONFIG_BINARY_PRINTF is not set | ||
| 1291 | 1496 | ||
| 1292 | # | 1497 | # |
| 1293 | # Library routines | 1498 | # Library routines |
| 1294 | # | 1499 | # |
| 1295 | CONFIG_BITREVERSE=y | 1500 | CONFIG_BITREVERSE=y |
| 1296 | # CONFIG_GENERIC_FIND_FIRST_BIT is not set | 1501 | CONFIG_GENERIC_FIND_LAST_BIT=y |
| 1297 | CONFIG_CRC_CCITT=m | 1502 | CONFIG_CRC_CCITT=m |
| 1298 | CONFIG_CRC16=m | 1503 | CONFIG_CRC16=m |
| 1504 | # CONFIG_CRC_T10DIF is not set | ||
| 1299 | # CONFIG_CRC_ITU_T is not set | 1505 | # CONFIG_CRC_ITU_T is not set |
| 1300 | CONFIG_CRC32=y | 1506 | CONFIG_CRC32=y |
| 1301 | # CONFIG_CRC7 is not set | 1507 | # CONFIG_CRC7 is not set |
| 1302 | CONFIG_LIBCRC32C=m | 1508 | CONFIG_LIBCRC32C=m |
| 1303 | CONFIG_ZLIB_INFLATE=y | 1509 | CONFIG_ZLIB_INFLATE=y |
| 1304 | CONFIG_ZLIB_DEFLATE=y | 1510 | CONFIG_ZLIB_DEFLATE=y |
| 1511 | CONFIG_DECOMPRESS_GZIP=y | ||
| 1305 | CONFIG_TEXTSEARCH=y | 1512 | CONFIG_TEXTSEARCH=y |
| 1306 | CONFIG_TEXTSEARCH_KMP=m | 1513 | CONFIG_TEXTSEARCH_KMP=m |
| 1307 | CONFIG_TEXTSEARCH_BM=m | 1514 | CONFIG_TEXTSEARCH_BM=m |
| 1308 | CONFIG_TEXTSEARCH_FSM=m | 1515 | CONFIG_TEXTSEARCH_FSM=m |
| 1309 | CONFIG_PLIST=y | ||
| 1310 | CONFIG_HAS_IOMEM=y | 1516 | CONFIG_HAS_IOMEM=y |
| 1311 | CONFIG_HAS_IOPORT=y | 1517 | CONFIG_HAS_IOPORT=y |
| 1312 | CONFIG_HAS_DMA=y | 1518 | CONFIG_HAS_DMA=y |
| 1519 | CONFIG_NLATTR=y | ||
diff --git a/arch/mips/include/asm/mach-au1x00/au1000.h b/arch/mips/include/asm/mach-au1x00/au1000.h index ae07423e6e82..e76941db2312 100644 --- a/arch/mips/include/asm/mach-au1x00/au1000.h +++ b/arch/mips/include/asm/mach-au1x00/au1000.h | |||
| @@ -190,8 +190,6 @@ extern unsigned long au1xxx_calc_clock(void); | |||
| 190 | /* PM: arch/mips/alchemy/common/sleeper.S, power.c, irq.c */ | 190 | /* PM: arch/mips/alchemy/common/sleeper.S, power.c, irq.c */ |
| 191 | void au1xxx_save_and_sleep(void); | 191 | void au1xxx_save_and_sleep(void); |
| 192 | void au_sleep(void); | 192 | void au_sleep(void); |
| 193 | void save_au1xxx_intctl(void); | ||
| 194 | void restore_au1xxx_intctl(void); | ||
| 195 | 193 | ||
| 196 | 194 | ||
| 197 | /* SOC Interrupt numbers */ | 195 | /* SOC Interrupt numbers */ |
| @@ -835,6 +833,38 @@ enum soc_au1200_ints { | |||
| 835 | #define MEM_STNAND_DATA 0x20 | 833 | #define MEM_STNAND_DATA 0x20 |
| 836 | #endif | 834 | #endif |
| 837 | 835 | ||
| 836 | |||
| 837 | /* Interrupt Controller register offsets */ | ||
| 838 | #define IC_CFG0RD 0x40 | ||
| 839 | #define IC_CFG0SET 0x40 | ||
| 840 | #define IC_CFG0CLR 0x44 | ||
| 841 | #define IC_CFG1RD 0x48 | ||
| 842 | #define IC_CFG1SET 0x48 | ||
| 843 | #define IC_CFG1CLR 0x4C | ||
| 844 | #define IC_CFG2RD 0x50 | ||
| 845 | #define IC_CFG2SET 0x50 | ||
| 846 | #define IC_CFG2CLR 0x54 | ||
| 847 | #define IC_REQ0INT 0x54 | ||
| 848 | #define IC_SRCRD 0x58 | ||
| 849 | #define IC_SRCSET 0x58 | ||
| 850 | #define IC_SRCCLR 0x5C | ||
| 851 | #define IC_REQ1INT 0x5C | ||
| 852 | #define IC_ASSIGNRD 0x60 | ||
| 853 | #define IC_ASSIGNSET 0x60 | ||
| 854 | #define IC_ASSIGNCLR 0x64 | ||
| 855 | #define IC_WAKERD 0x68 | ||
| 856 | #define IC_WAKESET 0x68 | ||
| 857 | #define IC_WAKECLR 0x6C | ||
| 858 | #define IC_MASKRD 0x70 | ||
| 859 | #define IC_MASKSET 0x70 | ||
| 860 | #define IC_MASKCLR 0x74 | ||
| 861 | #define IC_RISINGRD 0x78 | ||
| 862 | #define IC_RISINGCLR 0x78 | ||
| 863 | #define IC_FALLINGRD 0x7C | ||
| 864 | #define IC_FALLINGCLR 0x7C | ||
| 865 | #define IC_TESTBIT 0x80 | ||
| 866 | |||
| 867 | |||
| 838 | /* Interrupt Controller 0 */ | 868 | /* Interrupt Controller 0 */ |
| 839 | #define IC0_CFG0RD 0xB0400040 | 869 | #define IC0_CFG0RD 0xB0400040 |
| 840 | #define IC0_CFG0SET 0xB0400040 | 870 | #define IC0_CFG0SET 0xB0400040 |
diff --git a/arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h b/arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h index 8c6b1105ce0b..c8a553a36ba4 100644 --- a/arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h +++ b/arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h | |||
| @@ -358,10 +358,6 @@ u32 au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr); | |||
| 358 | u32 au1xxx_ddma_add_device(dbdev_tab_t *dev); | 358 | u32 au1xxx_ddma_add_device(dbdev_tab_t *dev); |
| 359 | extern void au1xxx_ddma_del_device(u32 devid); | 359 | extern void au1xxx_ddma_del_device(u32 devid); |
| 360 | void *au1xxx_ddma_get_nextptr_virt(au1x_ddma_desc_t *dp); | 360 | void *au1xxx_ddma_get_nextptr_virt(au1x_ddma_desc_t *dp); |
| 361 | #ifdef CONFIG_PM | ||
| 362 | void au1xxx_dbdma_suspend(void); | ||
| 363 | void au1xxx_dbdma_resume(void); | ||
| 364 | #endif | ||
| 365 | 361 | ||
| 366 | /* | 362 | /* |
| 367 | * Flags for the put_source/put_dest functions. | 363 | * Flags for the put_source/put_dest functions. |
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h index 43d4da0b1e9f..3999ec0aa7f5 100644 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h | |||
| @@ -20,7 +20,7 @@ static inline unsigned long bcm63xx_gpio_count(void) | |||
| 20 | } | 20 | } |
| 21 | } | 21 | } |
| 22 | 22 | ||
| 23 | #define GPIO_DIR_OUT 0x0 | 23 | #define BCM63XX_GPIO_DIR_OUT 0x0 |
| 24 | #define GPIO_DIR_IN 0x1 | 24 | #define BCM63XX_GPIO_DIR_IN 0x1 |
| 25 | 25 | ||
| 26 | #endif /* !BCM63XX_GPIO_H */ | 26 | #endif /* !BCM63XX_GPIO_H */ |
diff --git a/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h b/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h index 16210cedd929..675bd8641d5a 100644 --- a/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h +++ b/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h | |||
| @@ -52,6 +52,8 @@ | |||
| 52 | #define cpu_has_tx39_cache 0 | 52 | #define cpu_has_tx39_cache 0 |
| 53 | #define cpu_has_userlocal 0 | 53 | #define cpu_has_userlocal 0 |
| 54 | #define cpu_has_vce 0 | 54 | #define cpu_has_vce 0 |
| 55 | #define cpu_has_veic 0 | ||
| 56 | #define cpu_has_vint 0 | ||
| 55 | #define cpu_has_vtag_icache 0 | 57 | #define cpu_has_vtag_icache 0 |
| 56 | #define cpu_has_watch 1 | 58 | #define cpu_has_watch 1 |
| 57 | 59 | ||
diff --git a/arch/mips/include/asm/mach-loongson/gpio.h b/arch/mips/include/asm/mach-loongson/gpio.h new file mode 100644 index 000000000000..e30e73d443df --- /dev/null +++ b/arch/mips/include/asm/mach-loongson/gpio.h | |||
| @@ -0,0 +1,35 @@ | |||
| 1 | /* | ||
| 2 | * STLS2F GPIO Support | ||
| 3 | * | ||
| 4 | * Copyright (c) 2008 Richard Liu, STMicroelectronics <richard.liu@st.com> | ||
| 5 | * Copyright (c) 2008-2010 Arnaud Patard <apatard@mandriva.com> | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License as published by | ||
| 9 | * the Free Software Foundation; either version 2 of the License, or | ||
| 10 | * (at your option) any later version. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #ifndef __STLS2F_GPIO_H | ||
| 14 | #define __STLS2F_GPIO_H | ||
| 15 | |||
| 16 | #include <asm-generic/gpio.h> | ||
| 17 | |||
| 18 | extern void gpio_set_value(unsigned gpio, int value); | ||
| 19 | extern int gpio_get_value(unsigned gpio); | ||
| 20 | extern int gpio_cansleep(unsigned gpio); | ||
| 21 | |||
| 22 | /* The chip can do interrupt | ||
| 23 | * but it has not been tested and doc not clear | ||
| 24 | */ | ||
| 25 | static inline int gpio_to_irq(int gpio) | ||
| 26 | { | ||
| 27 | return -EINVAL; | ||
| 28 | } | ||
| 29 | |||
| 30 | static inline int irq_to_gpio(int gpio) | ||
| 31 | { | ||
| 32 | return -EINVAL; | ||
| 33 | } | ||
| 34 | |||
| 35 | #endif /* __STLS2F_GPIO_H */ | ||
diff --git a/arch/mips/include/asm/processor.h b/arch/mips/include/asm/processor.h index ab387910009a..5d33b727acf5 100644 --- a/arch/mips/include/asm/processor.h +++ b/arch/mips/include/asm/processor.h | |||
| @@ -344,16 +344,10 @@ unsigned long get_wchan(struct task_struct *p); | |||
| 344 | #ifdef CONFIG_CPU_HAS_PREFETCH | 344 | #ifdef CONFIG_CPU_HAS_PREFETCH |
| 345 | 345 | ||
| 346 | #define ARCH_HAS_PREFETCH | 346 | #define ARCH_HAS_PREFETCH |
| 347 | #define prefetch(x) __builtin_prefetch((x), 0, 1) | ||
| 347 | 348 | ||
| 348 | static inline void prefetch(const void *addr) | 349 | #define ARCH_HAS_PREFETCHW |
| 349 | { | 350 | #define prefetchw(x) __builtin_prefetch((x), 1, 1) |
| 350 | __asm__ __volatile__( | ||
| 351 | " .set mips4 \n" | ||
| 352 | " pref %0, (%1) \n" | ||
| 353 | " .set mips0 \n" | ||
| 354 | : | ||
| 355 | : "i" (Pref_Load), "r" (addr)); | ||
| 356 | } | ||
| 357 | 351 | ||
| 358 | #endif | 352 | #endif |
| 359 | 353 | ||
diff --git a/arch/mips/include/asm/scatterlist.h b/arch/mips/include/asm/scatterlist.h index 83d69fe17c9f..9af65e79be36 100644 --- a/arch/mips/include/asm/scatterlist.h +++ b/arch/mips/include/asm/scatterlist.h | |||
| @@ -1,27 +1,7 @@ | |||
| 1 | #ifndef __ASM_SCATTERLIST_H | 1 | #ifndef __ASM_SCATTERLIST_H |
| 2 | #define __ASM_SCATTERLIST_H | 2 | #define __ASM_SCATTERLIST_H |
| 3 | 3 | ||
| 4 | #include <asm/types.h> | 4 | #include <asm-generic/scatterlist.h> |
| 5 | |||
| 6 | struct scatterlist { | ||
| 7 | #ifdef CONFIG_DEBUG_SG | ||
| 8 | unsigned long sg_magic; | ||
| 9 | #endif | ||
| 10 | unsigned long page_link; | ||
| 11 | unsigned int offset; | ||
| 12 | dma_addr_t dma_address; | ||
| 13 | unsigned int length; | ||
| 14 | }; | ||
| 15 | |||
| 16 | /* | ||
| 17 | * These macros should be used after a pci_map_sg call has been done | ||
| 18 | * to get bus addresses of each of the SG entries and their lengths. | ||
| 19 | * You should only work with the number of sg entries pci_map_sg | ||
| 20 | * returns, or alternatively stop on the first sg_dma_len(sg) which | ||
| 21 | * is 0. | ||
| 22 | */ | ||
| 23 | #define sg_dma_address(sg) ((sg)->dma_address) | ||
| 24 | #define sg_dma_len(sg) ((sg)->length) | ||
| 25 | 5 | ||
| 26 | #define ISA_DMA_THRESHOLD (0x00ffffffUL) | 6 | #define ISA_DMA_THRESHOLD (0x00ffffffUL) |
| 27 | 7 | ||
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index be5bb16be4e0..3562b854f2cd 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c | |||
| @@ -125,6 +125,30 @@ static int __init wait_disable(char *s) | |||
| 125 | 125 | ||
| 126 | __setup("nowait", wait_disable); | 126 | __setup("nowait", wait_disable); |
| 127 | 127 | ||
| 128 | static int __cpuinitdata mips_fpu_disabled; | ||
| 129 | |||
| 130 | static int __init fpu_disable(char *s) | ||
| 131 | { | ||
| 132 | cpu_data[0].options &= ~MIPS_CPU_FPU; | ||
| 133 | mips_fpu_disabled = 1; | ||
| 134 | |||
| 135 | return 1; | ||
| 136 | } | ||
| 137 | |||
| 138 | __setup("nofpu", fpu_disable); | ||
| 139 | |||
| 140 | int __cpuinitdata mips_dsp_disabled; | ||
| 141 | |||
| 142 | static int __init dsp_disable(char *s) | ||
| 143 | { | ||
| 144 | cpu_data[0].ases &= ~MIPS_ASE_DSP; | ||
| 145 | mips_dsp_disabled = 1; | ||
| 146 | |||
| 147 | return 1; | ||
| 148 | } | ||
| 149 | |||
| 150 | __setup("nodsp", dsp_disable); | ||
| 151 | |||
| 128 | void __init check_wait(void) | 152 | void __init check_wait(void) |
| 129 | { | 153 | { |
| 130 | struct cpuinfo_mips *c = ¤t_cpu_data; | 154 | struct cpuinfo_mips *c = ¤t_cpu_data; |
| @@ -982,6 +1006,12 @@ __cpuinit void cpu_probe(void) | |||
| 982 | */ | 1006 | */ |
| 983 | BUG_ON(current_cpu_type() != c->cputype); | 1007 | BUG_ON(current_cpu_type() != c->cputype); |
| 984 | 1008 | ||
| 1009 | if (mips_fpu_disabled) | ||
| 1010 | c->options &= ~MIPS_CPU_FPU; | ||
| 1011 | |||
| 1012 | if (mips_dsp_disabled) | ||
| 1013 | c->ases &= ~MIPS_ASE_DSP; | ||
| 1014 | |||
| 985 | if (c->options & MIPS_CPU_FPU) { | 1015 | if (c->options & MIPS_CPU_FPU) { |
| 986 | c->fpu_id = cpu_get_fpu_id(); | 1016 | c->fpu_id = cpu_get_fpu_id(); |
| 987 | 1017 | ||
diff --git a/arch/mips/kernel/cpufreq/loongson2_cpufreq.c b/arch/mips/kernel/cpufreq/loongson2_cpufreq.c index 2f6a0b147ab8..ae5db206347c 100644 --- a/arch/mips/kernel/cpufreq/loongson2_cpufreq.c +++ b/arch/mips/kernel/cpufreq/loongson2_cpufreq.c | |||
| @@ -65,7 +65,7 @@ static int loongson2_cpufreq_target(struct cpufreq_policy *policy, | |||
| 65 | return -ENODEV; | 65 | return -ENODEV; |
| 66 | 66 | ||
| 67 | cpus_allowed = current->cpus_allowed; | 67 | cpus_allowed = current->cpus_allowed; |
| 68 | set_cpus_allowed(current, cpumask_of_cpu(cpu)); | 68 | set_cpus_allowed_ptr(current, cpumask_of(cpu)); |
| 69 | 69 | ||
| 70 | if (cpufreq_frequency_table_target | 70 | if (cpufreq_frequency_table_target |
| 71 | (policy, &loongson2_clockmod_table[0], target_freq, relation, | 71 | (policy, &loongson2_clockmod_table[0], target_freq, relation, |
| @@ -91,7 +91,7 @@ static int loongson2_cpufreq_target(struct cpufreq_policy *policy, | |||
| 91 | /* notifiers */ | 91 | /* notifiers */ |
| 92 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | 92 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); |
| 93 | 93 | ||
| 94 | set_cpus_allowed(current, cpus_allowed); | 94 | set_cpus_allowed_ptr(current, &cpus_allowed); |
| 95 | 95 | ||
| 96 | /* setting the cpu frequency */ | 96 | /* setting the cpu frequency */ |
| 97 | clk_set_rate(cpuclk, freq); | 97 | clk_set_rate(cpuclk, freq); |
diff --git a/arch/mips/kernel/mips-mt-fpaff.c b/arch/mips/kernel/mips-mt-fpaff.c index cbc6182b0065..f5981c499109 100644 --- a/arch/mips/kernel/mips-mt-fpaff.c +++ b/arch/mips/kernel/mips-mt-fpaff.c | |||
| @@ -100,10 +100,10 @@ asmlinkage long mipsmt_sys_sched_setaffinity(pid_t pid, unsigned int len, | |||
| 100 | if (test_ti_thread_flag(ti, TIF_FPUBOUND) && | 100 | if (test_ti_thread_flag(ti, TIF_FPUBOUND) && |
| 101 | cpus_intersects(new_mask, mt_fpu_cpumask)) { | 101 | cpus_intersects(new_mask, mt_fpu_cpumask)) { |
| 102 | cpus_and(effective_mask, new_mask, mt_fpu_cpumask); | 102 | cpus_and(effective_mask, new_mask, mt_fpu_cpumask); |
| 103 | retval = set_cpus_allowed(p, effective_mask); | 103 | retval = set_cpus_allowed_ptr(p, &effective_mask); |
| 104 | } else { | 104 | } else { |
| 105 | clear_ti_thread_flag(ti, TIF_FPUBOUND); | 105 | clear_ti_thread_flag(ti, TIF_FPUBOUND); |
| 106 | retval = set_cpus_allowed(p, new_mask); | 106 | retval = set_cpus_allowed_ptr(p, &new_mask); |
| 107 | } | 107 | } |
| 108 | 108 | ||
| 109 | out_unlock: | 109 | out_unlock: |
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c index f9513f9e61d3..85aef3fc6716 100644 --- a/arch/mips/kernel/setup.c +++ b/arch/mips/kernel/setup.c | |||
| @@ -569,27 +569,6 @@ void __init setup_arch(char **cmdline_p) | |||
| 569 | plat_smp_setup(); | 569 | plat_smp_setup(); |
| 570 | } | 570 | } |
| 571 | 571 | ||
| 572 | static int __init fpu_disable(char *s) | ||
| 573 | { | ||
| 574 | int i; | ||
| 575 | |||
| 576 | for (i = 0; i < NR_CPUS; i++) | ||
| 577 | cpu_data[i].options &= ~MIPS_CPU_FPU; | ||
| 578 | |||
| 579 | return 1; | ||
| 580 | } | ||
| 581 | |||
| 582 | __setup("nofpu", fpu_disable); | ||
| 583 | |||
| 584 | static int __init dsp_disable(char *s) | ||
| 585 | { | ||
| 586 | cpu_data[0].ases &= ~MIPS_ASE_DSP; | ||
| 587 | |||
| 588 | return 1; | ||
| 589 | } | ||
| 590 | |||
| 591 | __setup("nodsp", dsp_disable); | ||
| 592 | |||
| 593 | unsigned long kernelsp[NR_CPUS]; | 572 | unsigned long kernelsp[NR_CPUS]; |
| 594 | unsigned long fw_arg0, fw_arg1, fw_arg2, fw_arg3; | 573 | unsigned long fw_arg0, fw_arg1, fw_arg2, fw_arg3; |
| 595 | 574 | ||
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index 950bde8813fc..8bdd6a663c7f 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c | |||
| @@ -867,7 +867,7 @@ static void mt_ase_fp_affinity(void) | |||
| 867 | = current->cpus_allowed; | 867 | = current->cpus_allowed; |
| 868 | cpus_and(tmask, current->cpus_allowed, | 868 | cpus_and(tmask, current->cpus_allowed, |
| 869 | mt_fpu_cpumask); | 869 | mt_fpu_cpumask); |
| 870 | set_cpus_allowed(current, tmask); | 870 | set_cpus_allowed_ptr(current, &tmask); |
| 871 | set_thread_flag(TIF_FPUBOUND); | 871 | set_thread_flag(TIF_FPUBOUND); |
| 872 | } | 872 | } |
| 873 | } | 873 | } |
diff --git a/arch/mips/lasat/image/head.S b/arch/mips/lasat/image/head.S index efb95f2609c2..e0ecda92c40a 100644 --- a/arch/mips/lasat/image/head.S +++ b/arch/mips/lasat/image/head.S | |||
| @@ -1,7 +1,7 @@ | |||
| 1 | #include <asm/lasat/head.h> | 1 | #include <asm/lasat/head.h> |
| 2 | 2 | ||
| 3 | .text | 3 | .text |
| 4 | .section .text.start, "ax" | 4 | .section .text..start, "ax" |
| 5 | .set noreorder | 5 | .set noreorder |
| 6 | .set mips3 | 6 | .set mips3 |
| 7 | 7 | ||
diff --git a/arch/mips/lasat/image/romscript.normal b/arch/mips/lasat/image/romscript.normal index 988f8ad189cb..0864c963e188 100644 --- a/arch/mips/lasat/image/romscript.normal +++ b/arch/mips/lasat/image/romscript.normal | |||
| @@ -4,7 +4,7 @@ SECTIONS | |||
| 4 | { | 4 | { |
| 5 | .text : | 5 | .text : |
| 6 | { | 6 | { |
| 7 | *(.text.start) | 7 | *(.text..start) |
| 8 | } | 8 | } |
| 9 | 9 | ||
| 10 | /* Data in ROM */ | 10 | /* Data in ROM */ |
diff --git a/arch/mips/loongson/common/Makefile b/arch/mips/loongson/common/Makefile index 7668c4de1151..cdd2e812ba1a 100644 --- a/arch/mips/loongson/common/Makefile +++ b/arch/mips/loongson/common/Makefile | |||
| @@ -4,6 +4,7 @@ | |||
| 4 | 4 | ||
| 5 | obj-y += setup.o init.o cmdline.o env.o time.o reset.o irq.o \ | 5 | obj-y += setup.o init.o cmdline.o env.o time.o reset.o irq.o \ |
| 6 | pci.o bonito-irq.o mem.o machtype.o platform.o | 6 | pci.o bonito-irq.o mem.o machtype.o platform.o |
| 7 | obj-$(CONFIG_GENERIC_GPIO) += gpio.o | ||
| 7 | 8 | ||
| 8 | # | 9 | # |
| 9 | # Serial port support | 10 | # Serial port support |
diff --git a/arch/mips/loongson/common/gpio.c b/arch/mips/loongson/common/gpio.c new file mode 100644 index 000000000000..e8a0ffa935b4 --- /dev/null +++ b/arch/mips/loongson/common/gpio.c | |||
| @@ -0,0 +1,139 @@ | |||
| 1 | /* | ||
| 2 | * STLS2F GPIO Support | ||
| 3 | * | ||
| 4 | * Copyright (c) 2008 Richard Liu, STMicroelectronics <richard.liu@st.com> | ||
| 5 | * Copyright (c) 2008-2010 Arnaud Patard <apatard@mandriva.com> | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License as published by | ||
| 9 | * the Free Software Foundation; either version 2 of the License, or | ||
| 10 | * (at your option) any later version. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #include <linux/kernel.h> | ||
| 14 | #include <linux/init.h> | ||
| 15 | #include <linux/module.h> | ||
| 16 | #include <linux/spinlock.h> | ||
| 17 | #include <linux/err.h> | ||
| 18 | #include <asm/types.h> | ||
| 19 | #include <loongson.h> | ||
| 20 | #include <linux/gpio.h> | ||
| 21 | |||
| 22 | #define STLS2F_N_GPIO 4 | ||
| 23 | #define STLS2F_GPIO_IN_OFFSET 16 | ||
| 24 | |||
| 25 | static DEFINE_SPINLOCK(gpio_lock); | ||
| 26 | |||
| 27 | int gpio_get_value(unsigned gpio) | ||
| 28 | { | ||
| 29 | u32 val; | ||
| 30 | u32 mask; | ||
| 31 | |||
| 32 | if (gpio >= STLS2F_N_GPIO) | ||
| 33 | return __gpio_get_value(gpio); | ||
| 34 | |||
| 35 | mask = 1 << (gpio + STLS2F_GPIO_IN_OFFSET); | ||
| 36 | spin_lock(&gpio_lock); | ||
| 37 | val = LOONGSON_GPIODATA; | ||
| 38 | spin_unlock(&gpio_lock); | ||
| 39 | |||
| 40 | return ((val & mask) != 0); | ||
| 41 | } | ||
| 42 | EXPORT_SYMBOL(gpio_get_value); | ||
| 43 | |||
| 44 | void gpio_set_value(unsigned gpio, int state) | ||
| 45 | { | ||
| 46 | u32 val; | ||
| 47 | u32 mask; | ||
| 48 | |||
| 49 | if (gpio >= STLS2F_N_GPIO) { | ||
| 50 | __gpio_set_value(gpio, state); | ||
| 51 | return ; | ||
| 52 | } | ||
| 53 | |||
| 54 | mask = 1 << gpio; | ||
| 55 | |||
| 56 | spin_lock(&gpio_lock); | ||
| 57 | val = LOONGSON_GPIODATA; | ||
| 58 | if (state) | ||
| 59 | val |= mask; | ||
| 60 | else | ||
| 61 | val &= (~mask); | ||
| 62 | LOONGSON_GPIODATA = val; | ||
| 63 | spin_unlock(&gpio_lock); | ||
| 64 | } | ||
| 65 | EXPORT_SYMBOL(gpio_set_value); | ||
| 66 | |||
| 67 | int gpio_cansleep(unsigned gpio) | ||
| 68 | { | ||
| 69 | if (gpio < STLS2F_N_GPIO) | ||
| 70 | return 0; | ||
| 71 | else | ||
| 72 | return __gpio_cansleep(gpio); | ||
| 73 | } | ||
| 74 | EXPORT_SYMBOL(gpio_cansleep); | ||
| 75 | |||
| 76 | static int ls2f_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) | ||
| 77 | { | ||
| 78 | u32 temp; | ||
| 79 | u32 mask; | ||
| 80 | |||
| 81 | if (gpio >= STLS2F_N_GPIO) | ||
| 82 | return -EINVAL; | ||
| 83 | |||
| 84 | spin_lock(&gpio_lock); | ||
| 85 | mask = 1 << gpio; | ||
| 86 | temp = LOONGSON_GPIOIE; | ||
| 87 | temp |= mask; | ||
| 88 | LOONGSON_GPIOIE = temp; | ||
| 89 | spin_unlock(&gpio_lock); | ||
| 90 | |||
| 91 | return 0; | ||
| 92 | } | ||
| 93 | |||
| 94 | static int ls2f_gpio_direction_output(struct gpio_chip *chip, | ||
| 95 | unsigned gpio, int level) | ||
| 96 | { | ||
| 97 | u32 temp; | ||
| 98 | u32 mask; | ||
| 99 | |||
| 100 | if (gpio >= STLS2F_N_GPIO) | ||
| 101 | return -EINVAL; | ||
| 102 | |||
| 103 | gpio_set_value(gpio, level); | ||
| 104 | spin_lock(&gpio_lock); | ||
| 105 | mask = 1 << gpio; | ||
| 106 | temp = LOONGSON_GPIOIE; | ||
| 107 | temp &= (~mask); | ||
| 108 | LOONGSON_GPIOIE = temp; | ||
| 109 | spin_unlock(&gpio_lock); | ||
| 110 | |||
| 111 | return 0; | ||
| 112 | } | ||
| 113 | |||
| 114 | static int ls2f_gpio_get_value(struct gpio_chip *chip, unsigned gpio) | ||
| 115 | { | ||
| 116 | return gpio_get_value(gpio); | ||
| 117 | } | ||
| 118 | |||
| 119 | static void ls2f_gpio_set_value(struct gpio_chip *chip, | ||
| 120 | unsigned gpio, int value) | ||
| 121 | { | ||
| 122 | gpio_set_value(gpio, value); | ||
| 123 | } | ||
| 124 | |||
| 125 | static struct gpio_chip ls2f_chip = { | ||
| 126 | .label = "ls2f", | ||
| 127 | .direction_input = ls2f_gpio_direction_input, | ||
| 128 | .get = ls2f_gpio_get_value, | ||
| 129 | .direction_output = ls2f_gpio_direction_output, | ||
| 130 | .set = ls2f_gpio_set_value, | ||
| 131 | .base = 0, | ||
| 132 | .ngpio = STLS2F_N_GPIO, | ||
| 133 | }; | ||
| 134 | |||
| 135 | static int __init ls2f_gpio_setup(void) | ||
| 136 | { | ||
| 137 | return gpiochip_add(&ls2f_chip); | ||
| 138 | } | ||
| 139 | arch_initcall(ls2f_gpio_setup); | ||
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c index f2338d1c0b48..47842b7d26ae 100644 --- a/arch/mips/math-emu/cp1emu.c +++ b/arch/mips/math-emu/cp1emu.c | |||
| @@ -354,7 +354,8 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx) | |||
| 354 | 354 | ||
| 355 | if (MIPSInst_RD(ir) == FPCREG_CSR) { | 355 | if (MIPSInst_RD(ir) == FPCREG_CSR) { |
| 356 | value = ctx->fcr31; | 356 | value = ctx->fcr31; |
| 357 | value = (value & ~0x3) | mips_rm[value & 0x3]; | 357 | value = (value & ~FPU_CSR_RM) | |
| 358 | mips_rm[modeindex(value)]; | ||
| 358 | #ifdef CSRTRACE | 359 | #ifdef CSRTRACE |
| 359 | printk("%p gpr[%d]<-csr=%08x\n", | 360 | printk("%p gpr[%d]<-csr=%08x\n", |
| 360 | (void *) (xcp->cp0_epc), | 361 | (void *) (xcp->cp0_epc), |
| @@ -907,7 +908,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx, | |||
| 907 | ieee754sp fs; | 908 | ieee754sp fs; |
| 908 | 909 | ||
| 909 | SPFROMREG(fs, MIPSInst_FS(ir)); | 910 | SPFROMREG(fs, MIPSInst_FS(ir)); |
| 910 | ieee754_csr.rm = ieee_rm[MIPSInst_FUNC(ir) & 0x3]; | 911 | ieee754_csr.rm = ieee_rm[modeindex(MIPSInst_FUNC(ir))]; |
| 911 | rv.w = ieee754sp_tint(fs); | 912 | rv.w = ieee754sp_tint(fs); |
| 912 | ieee754_csr.rm = oldrm; | 913 | ieee754_csr.rm = oldrm; |
| 913 | rfmt = w_fmt; | 914 | rfmt = w_fmt; |
| @@ -933,7 +934,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx, | |||
| 933 | ieee754sp fs; | 934 | ieee754sp fs; |
| 934 | 935 | ||
| 935 | SPFROMREG(fs, MIPSInst_FS(ir)); | 936 | SPFROMREG(fs, MIPSInst_FS(ir)); |
| 936 | ieee754_csr.rm = ieee_rm[MIPSInst_FUNC(ir) & 0x3]; | 937 | ieee754_csr.rm = ieee_rm[modeindex(MIPSInst_FUNC(ir))]; |
| 937 | rv.l = ieee754sp_tlong(fs); | 938 | rv.l = ieee754sp_tlong(fs); |
| 938 | ieee754_csr.rm = oldrm; | 939 | ieee754_csr.rm = oldrm; |
| 939 | rfmt = l_fmt; | 940 | rfmt = l_fmt; |
| @@ -1081,7 +1082,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx, | |||
| 1081 | ieee754dp fs; | 1082 | ieee754dp fs; |
| 1082 | 1083 | ||
| 1083 | DPFROMREG(fs, MIPSInst_FS(ir)); | 1084 | DPFROMREG(fs, MIPSInst_FS(ir)); |
| 1084 | ieee754_csr.rm = ieee_rm[MIPSInst_FUNC(ir) & 0x3]; | 1085 | ieee754_csr.rm = ieee_rm[modeindex(MIPSInst_FUNC(ir))]; |
| 1085 | rv.w = ieee754dp_tint(fs); | 1086 | rv.w = ieee754dp_tint(fs); |
| 1086 | ieee754_csr.rm = oldrm; | 1087 | ieee754_csr.rm = oldrm; |
| 1087 | rfmt = w_fmt; | 1088 | rfmt = w_fmt; |
| @@ -1107,7 +1108,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx, | |||
| 1107 | ieee754dp fs; | 1108 | ieee754dp fs; |
| 1108 | 1109 | ||
| 1109 | DPFROMREG(fs, MIPSInst_FS(ir)); | 1110 | DPFROMREG(fs, MIPSInst_FS(ir)); |
| 1110 | ieee754_csr.rm = ieee_rm[MIPSInst_FUNC(ir) & 0x3]; | 1111 | ieee754_csr.rm = ieee_rm[modeindex(MIPSInst_FUNC(ir))]; |
| 1111 | rv.l = ieee754dp_tlong(fs); | 1112 | rv.l = ieee754dp_tlong(fs); |
| 1112 | ieee754_csr.rm = oldrm; | 1113 | ieee754_csr.rm = oldrm; |
| 1113 | rfmt = l_fmt; | 1114 | rfmt = l_fmt; |
diff --git a/arch/mips/oprofile/op_model_loongson2.c b/arch/mips/oprofile/op_model_loongson2.c index fa3bf661ae29..d0d24e047676 100644 --- a/arch/mips/oprofile/op_model_loongson2.c +++ b/arch/mips/oprofile/op_model_loongson2.c | |||
| @@ -8,7 +8,6 @@ | |||
| 8 | * This file is subject to the terms and conditions of the GNU General Public | 8 | * This file is subject to the terms and conditions of the GNU General Public |
| 9 | * License. See the file "COPYING" in the main directory of this archive | 9 | * License. See the file "COPYING" in the main directory of this archive |
| 10 | * for more details. | 10 | * for more details. |
| 11 | * | ||
| 12 | */ | 11 | */ |
| 13 | #include <linux/init.h> | 12 | #include <linux/init.h> |
| 14 | #include <linux/oprofile.h> | 13 | #include <linux/oprofile.h> |
| @@ -17,24 +16,18 @@ | |||
| 17 | #include <loongson.h> /* LOONGSON2_PERFCNT_IRQ */ | 16 | #include <loongson.h> /* LOONGSON2_PERFCNT_IRQ */ |
| 18 | #include "op_impl.h" | 17 | #include "op_impl.h" |
| 19 | 18 | ||
| 20 | /* | ||
| 21 | * a patch should be sent to oprofile with the loongson-specific support. | ||
| 22 | * otherwise, the oprofile tool will not recognize this and complain about | ||
| 23 | * "cpu_type 'unset' is not valid". | ||
| 24 | */ | ||
| 25 | #define LOONGSON2_CPU_TYPE "mips/loongson2" | 19 | #define LOONGSON2_CPU_TYPE "mips/loongson2" |
| 26 | 20 | ||
| 27 | #define LOONGSON2_COUNTER1_EVENT(event) ((event & 0x0f) << 5) | ||
| 28 | #define LOONGSON2_COUNTER2_EVENT(event) ((event & 0x0f) << 9) | ||
| 29 | |||
| 30 | #define LOONGSON2_PERFCNT_EXL (1UL << 0) | ||
| 31 | #define LOONGSON2_PERFCNT_KERNEL (1UL << 1) | ||
| 32 | #define LOONGSON2_PERFCNT_SUPERVISOR (1UL << 2) | ||
| 33 | #define LOONGSON2_PERFCNT_USER (1UL << 3) | ||
| 34 | #define LOONGSON2_PERFCNT_INT_EN (1UL << 4) | ||
| 35 | #define LOONGSON2_PERFCNT_OVERFLOW (1ULL << 31) | 21 | #define LOONGSON2_PERFCNT_OVERFLOW (1ULL << 31) |
| 36 | 22 | ||
| 37 | /* Loongson2 performance counter register */ | 23 | #define LOONGSON2_PERFCTRL_EXL (1UL << 0) |
| 24 | #define LOONGSON2_PERFCTRL_KERNEL (1UL << 1) | ||
| 25 | #define LOONGSON2_PERFCTRL_SUPERVISOR (1UL << 2) | ||
| 26 | #define LOONGSON2_PERFCTRL_USER (1UL << 3) | ||
| 27 | #define LOONGSON2_PERFCTRL_ENABLE (1UL << 4) | ||
| 28 | #define LOONGSON2_PERFCTRL_EVENT(idx, event) \ | ||
| 29 | (((event) & 0x0f) << ((idx) ? 9 : 5)) | ||
| 30 | |||
| 38 | #define read_c0_perfctrl() __read_64bit_c0_register($24, 0) | 31 | #define read_c0_perfctrl() __read_64bit_c0_register($24, 0) |
| 39 | #define write_c0_perfctrl(val) __write_64bit_c0_register($24, 0, val) | 32 | #define write_c0_perfctrl(val) __write_64bit_c0_register($24, 0, val) |
| 40 | #define read_c0_perfcnt() __read_64bit_c0_register($25, 0) | 33 | #define read_c0_perfcnt() __read_64bit_c0_register($25, 0) |
| @@ -49,7 +42,6 @@ static struct loongson2_register_config { | |||
| 49 | 42 | ||
| 50 | static char *oprofid = "LoongsonPerf"; | 43 | static char *oprofid = "LoongsonPerf"; |
| 51 | static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id); | 44 | static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id); |
| 52 | /* Compute all of the registers in preparation for enabling profiling. */ | ||
| 53 | 45 | ||
| 54 | static void loongson2_reg_setup(struct op_counter_config *cfg) | 46 | static void loongson2_reg_setup(struct op_counter_config *cfg) |
| 55 | { | 47 | { |
| @@ -57,41 +49,38 @@ static void loongson2_reg_setup(struct op_counter_config *cfg) | |||
| 57 | 49 | ||
| 58 | reg.reset_counter1 = 0; | 50 | reg.reset_counter1 = 0; |
| 59 | reg.reset_counter2 = 0; | 51 | reg.reset_counter2 = 0; |
| 60 | /* Compute the performance counter ctrl word. */ | 52 | |
| 61 | /* For now count kernel and user mode */ | 53 | /* |
| 54 | * Compute the performance counter ctrl word. | ||
| 55 | * For now, count kernel and user mode. | ||
| 56 | */ | ||
| 62 | if (cfg[0].enabled) { | 57 | if (cfg[0].enabled) { |
| 63 | ctrl |= LOONGSON2_COUNTER1_EVENT(cfg[0].event); | 58 | ctrl |= LOONGSON2_PERFCTRL_EVENT(0, cfg[0].event); |
| 64 | reg.reset_counter1 = 0x80000000ULL - cfg[0].count; | 59 | reg.reset_counter1 = 0x80000000ULL - cfg[0].count; |
| 65 | } | 60 | } |
| 66 | 61 | ||
| 67 | if (cfg[1].enabled) { | 62 | if (cfg[1].enabled) { |
| 68 | ctrl |= LOONGSON2_COUNTER2_EVENT(cfg[1].event); | 63 | ctrl |= LOONGSON2_PERFCTRL_EVENT(1, cfg[1].event); |
| 69 | reg.reset_counter2 = (0x80000000ULL - cfg[1].count); | 64 | reg.reset_counter2 = 0x80000000ULL - cfg[1].count; |
| 70 | } | 65 | } |
| 71 | 66 | ||
| 72 | if (cfg[0].enabled || cfg[1].enabled) { | 67 | if (cfg[0].enabled || cfg[1].enabled) { |
| 73 | ctrl |= LOONGSON2_PERFCNT_EXL | LOONGSON2_PERFCNT_INT_EN; | 68 | ctrl |= LOONGSON2_PERFCTRL_EXL | LOONGSON2_PERFCTRL_ENABLE; |
| 74 | if (cfg[0].kernel || cfg[1].kernel) | 69 | if (cfg[0].kernel || cfg[1].kernel) |
| 75 | ctrl |= LOONGSON2_PERFCNT_KERNEL; | 70 | ctrl |= LOONGSON2_PERFCTRL_KERNEL; |
| 76 | if (cfg[0].user || cfg[1].user) | 71 | if (cfg[0].user || cfg[1].user) |
| 77 | ctrl |= LOONGSON2_PERFCNT_USER; | 72 | ctrl |= LOONGSON2_PERFCTRL_USER; |
| 78 | } | 73 | } |
| 79 | 74 | ||
| 80 | reg.ctrl = ctrl; | 75 | reg.ctrl = ctrl; |
| 81 | 76 | ||
| 82 | reg.cnt1_enabled = cfg[0].enabled; | 77 | reg.cnt1_enabled = cfg[0].enabled; |
| 83 | reg.cnt2_enabled = cfg[1].enabled; | 78 | reg.cnt2_enabled = cfg[1].enabled; |
| 84 | |||
| 85 | } | 79 | } |
| 86 | 80 | ||
| 87 | /* Program all of the registers in preparation for enabling profiling. */ | ||
| 88 | |||
| 89 | static void loongson2_cpu_setup(void *args) | 81 | static void loongson2_cpu_setup(void *args) |
| 90 | { | 82 | { |
| 91 | uint64_t perfcount; | 83 | write_c0_perfcnt((reg.reset_counter2 << 32) | reg.reset_counter1); |
| 92 | |||
| 93 | perfcount = (reg.reset_counter2 << 32) | reg.reset_counter1; | ||
| 94 | write_c0_perfcnt(perfcount); | ||
| 95 | } | 84 | } |
| 96 | 85 | ||
| 97 | static void loongson2_cpu_start(void *args) | 86 | static void loongson2_cpu_start(void *args) |
| @@ -114,15 +103,8 @@ static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id) | |||
| 114 | struct pt_regs *regs = get_irq_regs(); | 103 | struct pt_regs *regs = get_irq_regs(); |
| 115 | int enabled; | 104 | int enabled; |
| 116 | 105 | ||
| 117 | /* | ||
| 118 | * LOONGSON2 defines two 32-bit performance counters. | ||
| 119 | * To avoid a race updating the registers we need to stop the counters | ||
| 120 | * while we're messing with | ||
| 121 | * them ... | ||
| 122 | */ | ||
| 123 | |||
| 124 | /* Check whether the irq belongs to me */ | 106 | /* Check whether the irq belongs to me */ |
| 125 | enabled = read_c0_perfctrl() & LOONGSON2_PERFCNT_INT_EN; | 107 | enabled = read_c0_perfctrl() & LOONGSON2_PERFCTRL_ENABLE; |
| 126 | if (!enabled) | 108 | if (!enabled) |
| 127 | return IRQ_NONE; | 109 | return IRQ_NONE; |
| 128 | enabled = reg.cnt1_enabled | reg.cnt2_enabled; | 110 | enabled = reg.cnt1_enabled | reg.cnt2_enabled; |
diff --git a/arch/mips/powertv/asic/prealloc-calliope.c b/arch/mips/powertv/asic/prealloc-calliope.c index cd5b76a1c951..3fc5d46687a9 100644 --- a/arch/mips/powertv/asic/prealloc-calliope.c +++ b/arch/mips/powertv/asic/prealloc-calliope.c | |||
| @@ -22,7 +22,9 @@ | |||
| 22 | */ | 22 | */ |
| 23 | 23 | ||
| 24 | #include <linux/init.h> | 24 | #include <linux/init.h> |
| 25 | #include <linux/ioport.h> | ||
| 25 | #include <asm/mach-powertv/asic.h> | 26 | #include <asm/mach-powertv/asic.h> |
| 27 | #include "prealloc.h" | ||
| 26 | 28 | ||
| 27 | /* | 29 | /* |
| 28 | * NON_DVR_CAPABLE CALLIOPE RESOURCES | 30 | * NON_DVR_CAPABLE CALLIOPE RESOURCES |
| @@ -32,432 +34,234 @@ struct resource non_dvr_calliope_resources[] __initdata = | |||
| 32 | /* | 34 | /* |
| 33 | * VIDEO / LX1 | 35 | * VIDEO / LX1 |
| 34 | */ | 36 | */ |
| 35 | { | 37 | /* Delta-Mu 1 image (2MiB) */ |
| 36 | .name = "ST231aImage", /* Delta-Mu 1 image and ram */ | 38 | PREALLOC_NORMAL("ST231aImage", 0x24000000, 0x24200000-1, |
| 37 | .start = 0x24000000, | 39 | IORESOURCE_MEM) |
| 38 | .end = 0x24200000 - 1, /*2MiB */ | 40 | /* Delta-Mu 1 monitor (8KiB) */ |
| 39 | .flags = IORESOURCE_MEM, | 41 | PREALLOC_NORMAL("ST231aMonitor", 0x24200000, 0x24202000-1, |
| 40 | }, | 42 | IORESOURCE_MEM) |
| 41 | { | 43 | /* Delta-Mu 1 RAM (~36.9MiB (32MiB - (2MiB + 8KiB))) */ |
| 42 | .name = "ST231aMonitor", /*8KiB block ST231a monitor */ | 44 | PREALLOC_NORMAL("MediaMemory1", 0x24202000, 0x26700000-1, |
| 43 | .start = 0x24200000, | 45 | IORESOURCE_MEM) |
| 44 | .end = 0x24202000 - 1, | 46 | |
| 45 | .flags = IORESOURCE_MEM, | ||
| 46 | }, | ||
| 47 | { | ||
| 48 | .name = "MediaMemory1", | ||
| 49 | .start = 0x24202000, | ||
| 50 | .end = 0x26700000 - 1, /*~36.9MiB (32MiB - (2MiB + 8KiB)) */ | ||
| 51 | .flags = IORESOURCE_MEM, | ||
| 52 | }, | ||
| 53 | /* | 47 | /* |
| 54 | * Sysaudio Driver | 48 | * Sysaudio Driver |
| 55 | */ | 49 | */ |
| 56 | { | 50 | /* DSP code and data images (1MiB) */ |
| 57 | .name = "DSP_Image_Buff", | 51 | PREALLOC_NORMAL("DSP_Image_Buff", 0x00000000, 0x00100000-1, |
| 58 | .start = 0x00000000, | 52 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 59 | .end = 0x000FFFFF, | 53 | /* ADSC CPU PCM buffer (40KiB) */ |
| 60 | .flags = IORESOURCE_MEM, | 54 | PREALLOC_NORMAL("ADSC_CPU_PCM_Buff", 0x00000000, 0x0000A000-1, |
| 61 | }, | 55 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 62 | { | 56 | /* ADSC AUX buffer (128KiB) */ |
| 63 | .name = "ADSC_CPU_PCM_Buff", | 57 | PREALLOC_NORMAL("ADSC_AUX_Buff", 0x00000000, 0x00020000-1, |
| 64 | .start = 0x00000000, | 58 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 65 | .end = 0x00009FFF, | 59 | /* ADSC Main buffer (128KiB) */ |
| 66 | .flags = IORESOURCE_MEM, | 60 | PREALLOC_NORMAL("ADSC_Main_Buff", 0x00000000, 0x00020000-1, |
| 67 | }, | 61 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 68 | { | 62 | |
| 69 | .name = "ADSC_AUX_Buff", | ||
| 70 | .start = 0x00000000, | ||
| 71 | .end = 0x00003FFF, | ||
| 72 | .flags = IORESOURCE_MEM, | ||
| 73 | }, | ||
| 74 | { | ||
| 75 | .name = "ADSC_Main_Buff", | ||
| 76 | .start = 0x00000000, | ||
| 77 | .end = 0x00003FFF, | ||
| 78 | .flags = IORESOURCE_MEM, | ||
| 79 | }, | ||
| 80 | /* | 63 | /* |
| 81 | * STAVEM driver/STAPI | 64 | * STAVEM driver/STAPI |
| 82 | */ | 65 | */ |
| 83 | { | 66 | /* 6MiB */ |
| 84 | .name = "AVMEMPartition0", | 67 | PREALLOC_NORMAL("AVMEMPartition0", 0x00000000, 0x00600000-1, |
| 85 | .start = 0x00000000, | 68 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 86 | .end = 0x00600000 - 1, /* 6 MB total */ | 69 | |
| 87 | .flags = IORESOURCE_MEM, | ||
| 88 | }, | ||
| 89 | /* | 70 | /* |
| 90 | * DOCSIS Subsystem | 71 | * DOCSIS Subsystem |
| 91 | */ | 72 | */ |
| 92 | { | 73 | /* 7MiB */ |
| 93 | .name = "Docsis", | 74 | PREALLOC_DOCSIS("Docsis", 0x27500000, 0x27c00000-1, IORESOURCE_MEM) |
| 94 | .start = 0x22000000, | 75 | |
| 95 | .end = 0x22700000 - 1, | ||
| 96 | .flags = IORESOURCE_MEM, | ||
| 97 | }, | ||
| 98 | /* | 76 | /* |
| 99 | * GHW HAL Driver | 77 | * GHW HAL Driver |
| 100 | */ | 78 | */ |
| 101 | { | 79 | /* PowerTV Graphics Heap (14MiB) */ |
| 102 | .name = "GraphicsHeap", | 80 | PREALLOC_NORMAL("GraphicsHeap", 0x26700000, 0x26700000+(14*1048576)-1, |
| 103 | .start = 0x22700000, | 81 | IORESOURCE_MEM) |
| 104 | .end = 0x23500000 - 1, /* 14 MB total */ | 82 | |
| 105 | .flags = IORESOURCE_MEM, | ||
| 106 | }, | ||
| 107 | /* | 83 | /* |
| 108 | * multi com buffer area | 84 | * multi com buffer area |
| 109 | */ | 85 | */ |
| 110 | { | 86 | /* 128KiB */ |
| 111 | .name = "MulticomSHM", | 87 | PREALLOC_NORMAL("MulticomSHM", 0x23700000, 0x23720000-1, |
| 112 | .start = 0x23700000, | 88 | IORESOURCE_MEM) |
| 113 | .end = 0x23720000 - 1, | 89 | |
| 114 | .flags = IORESOURCE_MEM, | ||
| 115 | }, | ||
| 116 | /* | 90 | /* |
| 117 | * DMA Ring buffer (don't need recording buffers) | 91 | * DMA Ring buffer (don't need recording buffers) |
| 118 | */ | 92 | */ |
| 119 | { | 93 | /* 680KiB */ |
| 120 | .name = "BMM_Buffer", | 94 | PREALLOC_NORMAL("BMM_Buffer", 0x00000000, 0x000AA000-1, |
| 121 | .start = 0x00000000, | 95 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 122 | .end = 0x000AA000 - 1, | 96 | |
| 123 | .flags = IORESOURCE_MEM, | ||
| 124 | }, | ||
| 125 | /* | 97 | /* |
| 126 | * Display bins buffer for unit0 | 98 | * Display bins buffer for unit0 |
| 127 | */ | 99 | */ |
| 128 | { | 100 | /* 4KiB */ |
| 129 | .name = "DisplayBins0", | 101 | PREALLOC_NORMAL("DisplayBins0", 0x00000000, 0x00001000-1, |
| 130 | .start = 0x00000000, | 102 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 131 | .end = 0x00000FFF, /* 4 KB total */ | 103 | |
| 132 | .flags = IORESOURCE_MEM, | ||
| 133 | }, | ||
| 134 | /* | 104 | /* |
| 135 | * | ||
| 136 | * AVFS: player HAL memory | 105 | * AVFS: player HAL memory |
| 137 | * | ||
| 138 | * | ||
| 139 | */ | 106 | */ |
| 140 | { | 107 | /* 945K * 3 for playback */ |
| 141 | .name = "AvfsDmaMem", | 108 | PREALLOC_NORMAL("AvfsDmaMem", 0x00000000, 0x002c4c00-1, |
| 142 | .start = 0x00000000, | 109 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 143 | .end = 0x002c4c00 - 1, /* 945K * 3 for playback */ | 110 | |
| 144 | .flags = IORESOURCE_MEM, | ||
| 145 | }, | ||
| 146 | /* | 111 | /* |
| 147 | * PMEM | 112 | * PMEM |
| 148 | */ | 113 | */ |
| 149 | { | 114 | /* Persistent memory for diagnostics (64KiB) */ |
| 150 | .name = "DiagPersistentMemory", | 115 | PREALLOC_PMEM("DiagPersistentMemory", 0x00000000, 0x10000-1, |
| 151 | .start = 0x00000000, | 116 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 152 | .end = 0x10000 - 1, | 117 | |
| 153 | .flags = IORESOURCE_MEM, | ||
| 154 | }, | ||
| 155 | /* | 118 | /* |
| 156 | * Smartcard | 119 | * Smartcard |
| 157 | */ | 120 | */ |
| 158 | { | 121 | /* Read and write buffers for Internal/External cards (10KiB) */ |
| 159 | .name = "SmartCardInfo", | 122 | PREALLOC_NORMAL("SmartCardInfo", 0x00000000, 0x2800-1, |
| 160 | .start = 0x00000000, | 123 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 161 | .end = 0x2800 - 1, | 124 | |
| 162 | .flags = IORESOURCE_MEM, | ||
| 163 | }, | ||
| 164 | /* | 125 | /* |
| 165 | * NAND Flash | 126 | * NAND Flash |
| 166 | */ | 127 | */ |
| 167 | { | 128 | /* 10KiB */ |
| 168 | .name = "NandFlash", | 129 | PREALLOC_NORMAL("NandFlash", NAND_FLASH_BASE, NAND_FLASH_BASE+0x400-1, |
| 169 | .start = NAND_FLASH_BASE, | 130 | IORESOURCE_MEM) |
| 170 | .end = NAND_FLASH_BASE + 0x400 - 1, | 131 | |
| 171 | .flags = IORESOURCE_IO, | ||
| 172 | }, | ||
| 173 | /* | 132 | /* |
| 174 | * Synopsys GMAC Memory Region | 133 | * Synopsys GMAC Memory Region |
| 175 | */ | 134 | */ |
| 176 | { | 135 | /* 64KiB */ |
| 177 | .name = "GMAC", | 136 | PREALLOC_NORMAL("GMAC", 0x00000000, 0x00010000-1, |
| 178 | .start = 0x00000000, | 137 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 179 | .end = 0x00010000 - 1, | 138 | |
| 180 | .flags = IORESOURCE_MEM, | ||
| 181 | }, | ||
| 182 | /* | 139 | /* |
| 183 | * Add other resources here | 140 | * TFTPBuffer |
| 184 | * | 141 | * |
| 142 | * This buffer is used in some minimal configurations (e.g. two-way | ||
| 143 | * loader) for storing software images | ||
| 185 | */ | 144 | */ |
| 186 | { }, | 145 | PREALLOC_TFTP("TFTPBuffer", 0x00000000, MEBIBYTE(80)-1, |
| 187 | }; | 146 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 188 | 147 | ||
| 189 | struct resource non_dvr_vz_calliope_resources[] __initdata = | ||
| 190 | { | ||
| 191 | /* | 148 | /* |
| 192 | * VIDEO / LX1 | 149 | * Add other resources here |
| 193 | */ | ||
| 194 | { | ||
| 195 | .name = "ST231aImage", /* Delta-Mu 1 image and ram */ | ||
| 196 | .start = 0x24000000, | ||
| 197 | .end = 0x24200000 - 1, /*2 Meg */ | ||
| 198 | .flags = IORESOURCE_MEM, | ||
| 199 | }, | ||
| 200 | { | ||
| 201 | .name = "ST231aMonitor", /* 8k block ST231a monitor */ | ||
| 202 | .start = 0x24200000, | ||
| 203 | .end = 0x24202000 - 1, | ||
| 204 | .flags = IORESOURCE_MEM, | ||
| 205 | }, | ||
| 206 | { | ||
| 207 | .name = "MediaMemory1", | ||
| 208 | .start = 0x22202000, | ||
| 209 | .end = 0x22C20B85 - 1, /* 10.12 Meg */ | ||
| 210 | .flags = IORESOURCE_MEM, | ||
| 211 | }, | ||
| 212 | /* | ||
| 213 | * Sysaudio Driver | ||
| 214 | */ | ||
| 215 | { | ||
| 216 | .name = "DSP_Image_Buff", | ||
| 217 | .start = 0x00000000, | ||
| 218 | .end = 0x000FFFFF, | ||
| 219 | .flags = IORESOURCE_MEM, | ||
| 220 | }, | ||
| 221 | { | ||
| 222 | .name = "ADSC_CPU_PCM_Buff", | ||
| 223 | .start = 0x00000000, | ||
| 224 | .end = 0x00009FFF, | ||
| 225 | .flags = IORESOURCE_MEM, | ||
| 226 | }, | ||
| 227 | { | ||
| 228 | .name = "ADSC_AUX_Buff", | ||
| 229 | .start = 0x00000000, | ||
| 230 | .end = 0x00003FFF, | ||
| 231 | .flags = IORESOURCE_MEM, | ||
| 232 | }, | ||
| 233 | { | ||
| 234 | .name = "ADSC_Main_Buff", | ||
| 235 | .start = 0x00000000, | ||
| 236 | .end = 0x00003FFF, | ||
| 237 | .flags = IORESOURCE_MEM, | ||
| 238 | }, | ||
| 239 | /* | ||
| 240 | * STAVEM driver/STAPI | ||
| 241 | */ | ||
| 242 | { | ||
| 243 | .name = "AVMEMPartition0", | ||
| 244 | .start = 0x20300000, | ||
| 245 | .end = 0x20620000-1, /*3.125 MB total */ | ||
| 246 | .flags = IORESOURCE_MEM, | ||
| 247 | }, | ||
| 248 | /* | ||
| 249 | * GHW HAL Driver | ||
| 250 | */ | ||
| 251 | { | ||
| 252 | .name = "GraphicsHeap", | ||
| 253 | .start = 0x20100000, | ||
| 254 | .end = 0x20300000 - 1, | ||
| 255 | .flags = IORESOURCE_MEM, | ||
| 256 | }, | ||
| 257 | /* | ||
| 258 | * multi com buffer area | ||
| 259 | */ | ||
| 260 | { | ||
| 261 | .name = "MulticomSHM", | ||
| 262 | .start = 0x23900000, | ||
| 263 | .end = 0x23920000 - 1, | ||
| 264 | .flags = IORESOURCE_MEM, | ||
| 265 | }, | ||
| 266 | /* | ||
| 267 | * DMA Ring buffer | ||
| 268 | */ | ||
| 269 | { | ||
| 270 | .name = "BMM_Buffer", | ||
| 271 | .start = 0x00000000, | ||
| 272 | .end = 0x000AA000 - 1, | ||
| 273 | .flags = IORESOURCE_MEM, | ||
| 274 | }, | ||
| 275 | /* | ||
| 276 | * Display bins buffer for unit0 | ||
| 277 | */ | ||
| 278 | { | ||
| 279 | .name = "DisplayBins0", | ||
| 280 | .start = 0x00000000, | ||
| 281 | .end = 0x00000FFF, | ||
| 282 | .flags = IORESOURCE_MEM, | ||
| 283 | }, | ||
| 284 | /* | ||
| 285 | * PMEM | ||
| 286 | */ | ||
| 287 | { | ||
| 288 | .name = "DiagPersistentMemory", | ||
| 289 | .start = 0x00000000, | ||
| 290 | .end = 0x10000 - 1, | ||
| 291 | .flags = IORESOURCE_MEM, | ||
| 292 | }, | ||
| 293 | /* | ||
| 294 | * Smartcard | ||
| 295 | */ | ||
| 296 | { | ||
| 297 | .name = "SmartCardInfo", | ||
| 298 | .start = 0x00000000, | ||
| 299 | .end = 0x2800 - 1, | ||
| 300 | .flags = IORESOURCE_MEM, | ||
| 301 | }, | ||
| 302 | /* | ||
| 303 | * NAND Flash | ||
| 304 | */ | 150 | */ |
| 305 | { | 151 | |
| 306 | .name = "NandFlash", | ||
| 307 | .start = NAND_FLASH_BASE, | ||
| 308 | .end = NAND_FLASH_BASE+0x400 - 1, | ||
| 309 | .flags = IORESOURCE_IO, | ||
| 310 | }, | ||
| 311 | /* | 152 | /* |
| 312 | * Synopsys GMAC Memory Region | 153 | * End of Resource marker |
| 313 | */ | 154 | */ |
| 314 | { | 155 | { |
| 315 | .name = "GMAC", | 156 | .flags = 0, |
| 316 | .start = 0x00000000, | ||
| 317 | .end = 0x00010000 - 1, | ||
| 318 | .flags = IORESOURCE_MEM, | ||
| 319 | }, | 157 | }, |
| 320 | /* | ||
| 321 | * Add other resources here | ||
| 322 | */ | ||
| 323 | { }, | ||
| 324 | }; | 158 | }; |
| 325 | 159 | ||
| 160 | |||
| 326 | struct resource non_dvr_vze_calliope_resources[] __initdata = | 161 | struct resource non_dvr_vze_calliope_resources[] __initdata = |
| 327 | { | 162 | { |
| 328 | /* | 163 | /* |
| 329 | * VIDEO / LX1 | 164 | * VIDEO / LX1 |
| 330 | */ | 165 | */ |
| 331 | { | 166 | /* Delta-Mu 1 image (2MiB) */ |
| 332 | .name = "ST231aImage", /* Delta-Mu 1 image and ram */ | 167 | PREALLOC_NORMAL("ST231aImage", 0x22000000, 0x22200000-1, |
| 333 | .start = 0x22000000, | 168 | IORESOURCE_MEM) |
| 334 | .end = 0x22200000 - 1, /*2 Meg */ | 169 | /* Delta-Mu 1 monitor (8KiB) */ |
| 335 | .flags = IORESOURCE_MEM, | 170 | PREALLOC_NORMAL("ST231aMonitor", 0x22200000, 0x22202000-1, |
| 336 | }, | 171 | IORESOURCE_MEM) |
| 337 | { | 172 | /* Delta-Mu 1 RAM (10.12MiB) */ |
| 338 | .name = "ST231aMonitor", /* 8k block ST231a monitor */ | 173 | PREALLOC_NORMAL("MediaMemory1", 0x22202000, 0x22C20B85-1, |
| 339 | .start = 0x22200000, | 174 | IORESOURCE_MEM) |
| 340 | .end = 0x22202000 - 1, | 175 | |
| 341 | .flags = IORESOURCE_MEM, | ||
| 342 | }, | ||
| 343 | { | ||
| 344 | .name = "MediaMemory1", | ||
| 345 | .start = 0x22202000, | ||
| 346 | .end = 0x22C20B85 - 1, /* 10.12 Meg */ | ||
| 347 | .flags = IORESOURCE_MEM, | ||
| 348 | }, | ||
| 349 | /* | 176 | /* |
| 350 | * Sysaudio Driver | 177 | * Sysaudio Driver |
| 351 | */ | 178 | */ |
| 352 | { | 179 | /* DSP code and data images (1MiB) */ |
| 353 | .name = "DSP_Image_Buff", | 180 | PREALLOC_NORMAL("DSP_Image_Buff", 0x00000000, 0x00100000-1, |
| 354 | .start = 0x00000000, | 181 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 355 | .end = 0x000FFFFF, | 182 | /* ADSC CPU PCM buffer (40KiB) */ |
| 356 | .flags = IORESOURCE_MEM, | 183 | PREALLOC_NORMAL("ADSC_CPU_PCM_Buff", 0x00000000, 0x0000A000-1, |
| 357 | }, | 184 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 358 | { | 185 | /* ADSC AUX buffer (16KiB) */ |
| 359 | .name = "ADSC_CPU_PCM_Buff", | 186 | PREALLOC_NORMAL("ADSC_AUX_Buff", 0x00000000, 0x00004000-1, |
| 360 | .start = 0x00000000, | 187 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 361 | .end = 0x00009FFF, | 188 | /* ADSC Main buffer (16KiB) */ |
| 362 | .flags = IORESOURCE_MEM, | 189 | PREALLOC_NORMAL("ADSC_Main_Buff", 0x00000000, 0x00004000-1, |
| 363 | }, | 190 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 364 | { | 191 | |
| 365 | .name = "ADSC_AUX_Buff", | ||
| 366 | .start = 0x00000000, | ||
| 367 | .end = 0x00003FFF, | ||
| 368 | .flags = IORESOURCE_MEM, | ||
| 369 | }, | ||
| 370 | { | ||
| 371 | .name = "ADSC_Main_Buff", | ||
| 372 | .start = 0x00000000, | ||
| 373 | .end = 0x00003FFF, | ||
| 374 | .flags = IORESOURCE_MEM, | ||
| 375 | }, | ||
| 376 | /* | 192 | /* |
| 377 | * STAVEM driver/STAPI | 193 | * STAVEM driver/STAPI |
| 378 | */ | 194 | */ |
| 379 | { | 195 | /* 3.125MiB */ |
| 380 | .name = "AVMEMPartition0", | 196 | PREALLOC_NORMAL("AVMEMPartition0", 0x20396000, 0x206B6000-1, |
| 381 | .start = 0x20396000, | 197 | IORESOURCE_MEM) |
| 382 | .end = 0x206B6000 - 1, /* 3.125 MB total */ | 198 | |
| 383 | .flags = IORESOURCE_MEM, | ||
| 384 | }, | ||
| 385 | /* | 199 | /* |
| 386 | * GHW HAL Driver | 200 | * GHW HAL Driver |
| 387 | */ | 201 | */ |
| 388 | { | 202 | /* PowerTV Graphics Heap (2.59MiB) */ |
| 389 | .name = "GraphicsHeap", | 203 | PREALLOC_NORMAL("GraphicsHeap", 0x20100000, 0x20396000-1, |
| 390 | .start = 0x20100000, | 204 | IORESOURCE_MEM) |
| 391 | .end = 0x20396000 - 1, | 205 | |
| 392 | .flags = IORESOURCE_MEM, | ||
| 393 | }, | ||
| 394 | /* | 206 | /* |
| 395 | * multi com buffer area | 207 | * multi com buffer area |
| 396 | */ | 208 | */ |
| 397 | { | 209 | /* 128KiB */ |
| 398 | .name = "MulticomSHM", | 210 | PREALLOC_NORMAL("MulticomSHM", 0x206B6000, 0x206D6000-1, |
| 399 | .start = 0x206B6000, | 211 | IORESOURCE_MEM) |
| 400 | .end = 0x206D6000 - 1, | 212 | |
| 401 | .flags = IORESOURCE_MEM, | ||
| 402 | }, | ||
| 403 | /* | 213 | /* |
| 404 | * DMA Ring buffer | 214 | * DMA Ring buffer (don't need recording buffers) |
| 405 | */ | 215 | */ |
| 406 | { | 216 | /* 680KiB */ |
| 407 | .name = "BMM_Buffer", | 217 | PREALLOC_NORMAL("BMM_Buffer", 0x00000000, 0x000AA000-1, |
| 408 | .start = 0x00000000, | 218 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 409 | .end = 0x000AA000 - 1, | 219 | |
| 410 | .flags = IORESOURCE_MEM, | ||
| 411 | }, | ||
| 412 | /* | 220 | /* |
| 413 | * Display bins buffer for unit0 | 221 | * Display bins buffer for unit0 |
| 414 | */ | 222 | */ |
| 415 | { | 223 | /* 4KiB */ |
| 416 | .name = "DisplayBins0", | 224 | PREALLOC_NORMAL("DisplayBins0", 0x00000000, 0x00001000-1, |
| 417 | .start = 0x00000000, | 225 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 418 | .end = 0x00000FFF, | 226 | |
| 419 | .flags = IORESOURCE_MEM, | ||
| 420 | }, | ||
| 421 | /* | 227 | /* |
| 422 | * PMEM | 228 | * PMEM |
| 423 | */ | 229 | */ |
| 424 | { | 230 | /* Persistent memory for diagnostics (64KiB) */ |
| 425 | .name = "DiagPersistentMemory", | 231 | PREALLOC_PMEM("DiagPersistentMemory", 0x00000000, 0x10000-1, |
| 426 | .start = 0x00000000, | 232 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 427 | .end = 0x10000 - 1, | 233 | |
| 428 | .flags = IORESOURCE_MEM, | ||
| 429 | }, | ||
| 430 | /* | 234 | /* |
| 431 | * Smartcard | 235 | * Smartcard |
| 432 | */ | 236 | */ |
| 433 | { | 237 | /* Read and write buffers for Internal/External cards (10KiB) */ |
| 434 | .name = "SmartCardInfo", | 238 | PREALLOC_NORMAL("SmartCardInfo", 0x00000000, 0x2800-1, |
| 435 | .start = 0x00000000, | 239 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 436 | .end = 0x2800 - 1, | 240 | |
| 437 | .flags = IORESOURCE_MEM, | ||
| 438 | }, | ||
| 439 | /* | 241 | /* |
| 440 | * NAND Flash | 242 | * NAND Flash |
| 441 | */ | 243 | */ |
| 442 | { | 244 | /* 10KiB */ |
| 443 | .name = "NandFlash", | 245 | PREALLOC_NORMAL("NandFlash", NAND_FLASH_BASE, NAND_FLASH_BASE+0x400-1, |
| 444 | .start = NAND_FLASH_BASE, | 246 | IORESOURCE_MEM) |
| 445 | .end = NAND_FLASH_BASE+0x400 - 1, | 247 | |
| 446 | .flags = IORESOURCE_MEM, | ||
| 447 | }, | ||
| 448 | /* | 248 | /* |
| 449 | * Synopsys GMAC Memory Region | 249 | * Synopsys GMAC Memory Region |
| 450 | */ | 250 | */ |
| 451 | { | 251 | /* 64KiB */ |
| 452 | .name = "GMAC", | 252 | PREALLOC_NORMAL("GMAC", 0x00000000, 0x00010000-1, |
| 453 | .start = 0x00000000, | 253 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 454 | .end = 0x00010000 - 1, | 254 | |
| 455 | .flags = IORESOURCE_MEM, | ||
| 456 | }, | ||
| 457 | /* | 255 | /* |
| 458 | * Add other resources here | 256 | * Add other resources here |
| 459 | */ | 257 | */ |
| 460 | { }, | 258 | |
| 259 | /* | ||
| 260 | * End of Resource marker | ||
| 261 | */ | ||
| 262 | { | ||
| 263 | .flags = 0, | ||
| 264 | }, | ||
| 461 | }; | 265 | }; |
| 462 | 266 | ||
| 463 | struct resource non_dvr_vzf_calliope_resources[] __initdata = | 267 | struct resource non_dvr_vzf_calliope_resources[] __initdata = |
| @@ -465,156 +269,117 @@ struct resource non_dvr_vzf_calliope_resources[] __initdata = | |||
| 465 | /* | 269 | /* |
| 466 | * VIDEO / LX1 | 270 | * VIDEO / LX1 |
| 467 | */ | 271 | */ |
| 468 | { | 272 | /* Delta-Mu 1 image (2MiB) */ |
| 469 | .name = "ST231aImage", /*Delta-Mu 1 image and ram */ | 273 | PREALLOC_NORMAL("ST231aImage", 0x24000000, 0x24200000-1, |
| 470 | .start = 0x24000000, | 274 | IORESOURCE_MEM) |
| 471 | .end = 0x24200000 - 1, /*2MiB */ | 275 | /* Delta-Mu 1 monitor (8KiB) */ |
| 472 | .flags = IORESOURCE_MEM, | 276 | PREALLOC_NORMAL("ST231aMonitor", 0x24200000, 0x24202000-1, |
| 473 | }, | 277 | IORESOURCE_MEM) |
| 474 | { | 278 | /* Delta-Mu 1 RAM (~19.4 (21.5MiB - (2MiB + 8KiB))) */ |
| 475 | .name = "ST231aMonitor", /*8KiB block ST231a monitor */ | 279 | PREALLOC_NORMAL("MediaMemory1", 0x24202000, 0x25580000-1, |
| 476 | .start = 0x24200000, | 280 | IORESOURCE_MEM) |
| 477 | .end = 0x24202000 - 1, | 281 | |
| 478 | .flags = IORESOURCE_MEM, | ||
| 479 | }, | ||
| 480 | { | ||
| 481 | .name = "MediaMemory1", | ||
| 482 | .start = 0x24202000, | ||
| 483 | /* ~19.4 (21.5MiB - (2MiB + 8KiB)) */ | ||
| 484 | .end = 0x25580000 - 1, | ||
| 485 | .flags = IORESOURCE_MEM, | ||
| 486 | }, | ||
| 487 | /* | 282 | /* |
| 488 | * Sysaudio Driver | 283 | * Sysaudio Driver |
| 489 | */ | 284 | */ |
| 490 | { | 285 | /* DSP code and data images (1MiB) */ |
| 491 | .name = "DSP_Image_Buff", | 286 | PREALLOC_NORMAL("DSP_Image_Buff", 0x00000000, 0x00100000-1, |
| 492 | .start = 0x00000000, | 287 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 493 | .end = 0x000FFFFF, | 288 | /* ADSC CPU PCM buffer (40KiB) */ |
| 494 | .flags = IORESOURCE_MEM, | 289 | PREALLOC_NORMAL("ADSC_CPU_PCM_Buff", 0x00000000, 0x0000A000-1, |
| 495 | }, | 290 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 496 | { | 291 | /* ADSC AUX buffer (128KiB) */ |
| 497 | .name = "ADSC_CPU_PCM_Buff", | 292 | PREALLOC_NORMAL("ADSC_AUX_Buff", 0x00000000, 0x00020000-1, |
| 498 | .start = 0x00000000, | 293 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 499 | .end = 0x00009FFF, | 294 | /* ADSC Main buffer (128KiB) */ |
| 500 | .flags = IORESOURCE_MEM, | 295 | PREALLOC_NORMAL("ADSC_Main_Buff", 0x00000000, 0x00020000-1, |
| 501 | }, | 296 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 502 | { | 297 | |
| 503 | .name = "ADSC_AUX_Buff", | ||
| 504 | .start = 0x00000000, | ||
| 505 | .end = 0x00003FFF, | ||
| 506 | .flags = IORESOURCE_MEM, | ||
| 507 | }, | ||
| 508 | { | ||
| 509 | .name = "ADSC_Main_Buff", | ||
| 510 | .start = 0x00000000, | ||
| 511 | .end = 0x00003FFF, | ||
| 512 | .flags = IORESOURCE_MEM, | ||
| 513 | }, | ||
| 514 | /* | 298 | /* |
| 515 | * STAVEM driver/STAPI | 299 | * STAVEM driver/STAPI |
| 516 | */ | 300 | */ |
| 517 | { | 301 | /* 4.5MiB */ |
| 518 | .name = "AVMEMPartition0", | 302 | PREALLOC_NORMAL("AVMEMPartition0", 0x00000000, 0x00480000-1, |
| 519 | .start = 0x00000000, | 303 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 520 | .end = 0x00480000 - 1, /* 4.5 MB total */ | 304 | |
| 521 | .flags = IORESOURCE_MEM, | ||
| 522 | }, | ||
| 523 | /* | 305 | /* |
| 524 | * GHW HAL Driver | 306 | * GHW HAL Driver |
| 525 | */ | 307 | */ |
| 526 | { | 308 | /* PowerTV Graphics Heap (14MiB) */ |
| 527 | .name = "GraphicsHeap", | 309 | PREALLOC_NORMAL("GraphicsHeap", 0x25600000, 0x25600000+(14*1048576)-1, |
| 528 | .start = 0x22700000, | 310 | IORESOURCE_MEM) |
| 529 | .end = 0x23500000 - 1, /* 14 MB total */ | 311 | |
| 530 | .flags = IORESOURCE_MEM, | ||
| 531 | }, | ||
| 532 | /* | 312 | /* |
| 533 | * multi com buffer area | 313 | * multi com buffer area |
| 534 | */ | 314 | */ |
| 535 | { | 315 | /* 128KiB */ |
| 536 | .name = "MulticomSHM", | 316 | PREALLOC_NORMAL("MulticomSHM", 0x23700000, 0x23720000-1, |
| 537 | .start = 0x23700000, | 317 | IORESOURCE_MEM) |
| 538 | .end = 0x23720000 - 1, | 318 | |
| 539 | .flags = IORESOURCE_MEM, | ||
| 540 | }, | ||
| 541 | /* | 319 | /* |
| 542 | * DMA Ring buffer (don't need recording buffers) | 320 | * DMA Ring buffer (don't need recording buffers) |
| 543 | */ | 321 | */ |
| 544 | { | 322 | /* 680KiB */ |
| 545 | .name = "BMM_Buffer", | 323 | PREALLOC_NORMAL("BMM_Buffer", 0x00000000, 0x000AA000-1, |
| 546 | .start = 0x00000000, | 324 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 547 | .end = 0x000AA000 - 1, | 325 | |
| 548 | .flags = IORESOURCE_MEM, | ||
| 549 | }, | ||
| 550 | /* | 326 | /* |
| 551 | * Display bins buffer for unit0 | 327 | * Display bins buffer for unit0 |
| 552 | */ | 328 | */ |
| 553 | { | 329 | /* 4KiB */ |
| 554 | .name = "DisplayBins0", | 330 | PREALLOC_NORMAL("DisplayBins0", 0x00000000, 0x00001000-1, |
| 555 | .start = 0x00000000, | 331 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 556 | .end = 0x00000FFF, /* 4 KB total */ | 332 | |
| 557 | .flags = IORESOURCE_MEM, | ||
| 558 | }, | ||
| 559 | /* | 333 | /* |
| 560 | * Display bins buffer for unit1 | 334 | * Display bins buffer for unit1 |
| 561 | */ | 335 | */ |
| 562 | { | 336 | /* 4KiB */ |
| 563 | .name = "DisplayBins1", | 337 | PREALLOC_NORMAL("DisplayBins1", 0x00000000, 0x00001000-1, |
| 564 | .start = 0x00000000, | 338 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 565 | .end = 0x00000FFF, /* 4 KB total */ | 339 | |
| 566 | .flags = IORESOURCE_MEM, | ||
| 567 | }, | ||
| 568 | /* | 340 | /* |
| 569 | * | ||
| 570 | * AVFS: player HAL memory | 341 | * AVFS: player HAL memory |
| 571 | * | ||
| 572 | * | ||
| 573 | */ | 342 | */ |
| 574 | { | 343 | /* 945K * 3 for playback */ |
| 575 | .name = "AvfsDmaMem", | 344 | PREALLOC_NORMAL("AvfsDmaMem", 0x00000000, 0x002c4c00-1, |
| 576 | .start = 0x00000000, | 345 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 577 | .end = 0x002c4c00 - 1, /* 945K * 3 for playback */ | 346 | |
| 578 | .flags = IORESOURCE_MEM, | ||
| 579 | }, | ||
| 580 | /* | 347 | /* |
| 581 | * PMEM | 348 | * PMEM |
| 582 | */ | 349 | */ |
| 583 | { | 350 | /* Persistent memory for diagnostics (64KiB) */ |
| 584 | .name = "DiagPersistentMemory", | 351 | PREALLOC_PMEM("DiagPersistentMemory", 0x00000000, 0x10000-1, |
| 585 | .start = 0x00000000, | 352 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 586 | .end = 0x10000 - 1, | 353 | |
| 587 | .flags = IORESOURCE_MEM, | ||
| 588 | }, | ||
| 589 | /* | 354 | /* |
| 590 | * Smartcard | 355 | * Smartcard |
| 591 | */ | 356 | */ |
| 592 | { | 357 | /* Read and write buffers for Internal/External cards (10KiB) */ |
| 593 | .name = "SmartCardInfo", | 358 | PREALLOC_NORMAL("SmartCardInfo", 0x00000000, 0x2800-1, |
| 594 | .start = 0x00000000, | 359 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 595 | .end = 0x2800 - 1, | 360 | |
| 596 | .flags = IORESOURCE_MEM, | ||
| 597 | }, | ||
| 598 | /* | 361 | /* |
| 599 | * NAND Flash | 362 | * NAND Flash |
| 600 | */ | 363 | */ |
| 601 | { | 364 | /* 10KiB */ |
| 602 | .name = "NandFlash", | 365 | PREALLOC_NORMAL("NandFlash", NAND_FLASH_BASE, NAND_FLASH_BASE+0x400-1, |
| 603 | .start = NAND_FLASH_BASE, | 366 | IORESOURCE_MEM) |
| 604 | .end = NAND_FLASH_BASE + 0x400 - 1, | 367 | |
| 605 | .flags = IORESOURCE_MEM, | ||
| 606 | }, | ||
| 607 | /* | 368 | /* |
| 608 | * Synopsys GMAC Memory Region | 369 | * Synopsys GMAC Memory Region |
| 609 | */ | 370 | */ |
| 610 | { | 371 | /* 64KiB */ |
| 611 | .name = "GMAC", | 372 | PREALLOC_NORMAL("GMAC", 0x00000000, 0x00010000-1, |
| 612 | .start = 0x00000000, | 373 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 613 | .end = 0x00010000 - 1, | 374 | |
| 614 | .flags = IORESOURCE_MEM, | ||
| 615 | }, | ||
| 616 | /* | 375 | /* |
| 617 | * Add other resources here | 376 | * Add other resources here |
| 618 | */ | 377 | */ |
| 619 | { }, | 378 | |
| 379 | /* | ||
| 380 | * End of Resource marker | ||
| 381 | */ | ||
| 382 | { | ||
| 383 | .flags = 0, | ||
| 384 | }, | ||
| 620 | }; | 385 | }; |
diff --git a/arch/mips/powertv/asic/prealloc-cronus.c b/arch/mips/powertv/asic/prealloc-cronus.c index 45a5c3ea718c..c532b50521ec 100644 --- a/arch/mips/powertv/asic/prealloc-cronus.c +++ b/arch/mips/powertv/asic/prealloc-cronus.c | |||
| @@ -22,7 +22,9 @@ | |||
| 22 | */ | 22 | */ |
| 23 | 23 | ||
| 24 | #include <linux/init.h> | 24 | #include <linux/init.h> |
| 25 | #include <linux/ioport.h> | ||
| 25 | #include <asm/mach-powertv/asic.h> | 26 | #include <asm/mach-powertv/asic.h> |
| 27 | #include "prealloc.h" | ||
| 26 | 28 | ||
| 27 | /* | 29 | /* |
| 28 | * DVR_CAPABLE CRONUS RESOURCES | 30 | * DVR_CAPABLE CRONUS RESOURCES |
| @@ -30,305 +32,161 @@ | |||
| 30 | struct resource dvr_cronus_resources[] __initdata = | 32 | struct resource dvr_cronus_resources[] __initdata = |
| 31 | { | 33 | { |
| 32 | /* | 34 | /* |
| 33 | * | ||
| 34 | * VIDEO1 / LX1 | 35 | * VIDEO1 / LX1 |
| 35 | * | ||
| 36 | */ | 36 | */ |
| 37 | { | 37 | /* Delta-Mu 1 image (2MiB) */ |
| 38 | .name = "ST231aImage", /* Delta-Mu 1 image and ram */ | 38 | PREALLOC_NORMAL("ST231aImage", 0x24000000, 0x24200000-1, |
| 39 | .start = 0x24000000, | 39 | IORESOURCE_MEM) |
| 40 | .end = 0x241FFFFF, /* 2MiB */ | 40 | /* Delta-Mu 1 monitor (8KiB) */ |
| 41 | .flags = IORESOURCE_MEM, | 41 | PREALLOC_NORMAL("ST231aMonitor", 0x24200000, 0x24202000-1, |
| 42 | }, | 42 | IORESOURCE_MEM) |
| 43 | { | 43 | /* Delta-Mu 1 RAM (~29.9MiB (32MiB - (2MiB + 8KiB))) */ |
| 44 | .name = "ST231aMonitor", /* 8KiB block ST231a monitor */ | 44 | PREALLOC_NORMAL("MediaMemory1", 0x24202000, 0x26000000-1, |
| 45 | .start = 0x24200000, | 45 | IORESOURCE_MEM) |
| 46 | .end = 0x24201FFF, | 46 | |
| 47 | .flags = IORESOURCE_MEM, | ||
| 48 | }, | ||
| 49 | { | ||
| 50 | .name = "MediaMemory1", | ||
| 51 | .start = 0x24202000, | ||
| 52 | .end = 0x25FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */ | ||
| 53 | .flags = IORESOURCE_MEM, | ||
| 54 | }, | ||
| 55 | /* | 47 | /* |
| 56 | * | ||
| 57 | * VIDEO2 / LX2 | 48 | * VIDEO2 / LX2 |
| 58 | * | ||
| 59 | */ | 49 | */ |
| 60 | { | 50 | /* Delta-Mu 2 image (2MiB) */ |
| 61 | .name = "ST231bImage", /* Delta-Mu 2 image and ram */ | 51 | PREALLOC_NORMAL("ST231bImage", 0x60000000, 0x60200000-1, |
| 62 | .start = 0x60000000, | 52 | IORESOURCE_MEM) |
| 63 | .end = 0x601FFFFF, /* 2MiB */ | 53 | /* Delta-Mu 2 monitor (8KiB) */ |
| 64 | .flags = IORESOURCE_IO, | 54 | PREALLOC_NORMAL("ST231bMonitor", 0x60200000, 0x60202000-1, |
| 65 | }, | 55 | IORESOURCE_MEM) |
| 66 | { | 56 | /* Delta-Mu 2 RAM (~29.9MiB (32MiB - (2MiB + 8KiB))) */ |
| 67 | .name = "ST231bMonitor", /* 8KiB block ST231b monitor */ | 57 | PREALLOC_NORMAL("MediaMemory2", 0x60202000, 0x62000000-1, |
| 68 | .start = 0x60200000, | 58 | IORESOURCE_MEM) |
| 69 | .end = 0x60201FFF, | 59 | |
| 70 | .flags = IORESOURCE_IO, | ||
| 71 | }, | ||
| 72 | { | ||
| 73 | .name = "MediaMemory2", | ||
| 74 | .start = 0x60202000, | ||
| 75 | .end = 0x61FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */ | ||
| 76 | .flags = IORESOURCE_IO, | ||
| 77 | }, | ||
| 78 | /* | 60 | /* |
| 79 | * | ||
| 80 | * Sysaudio Driver | 61 | * Sysaudio Driver |
| 81 | * | ||
| 82 | * This driver requires: | ||
| 83 | * | ||
| 84 | * Arbitrary Based Buffers: | ||
| 85 | * DSP_Image_Buff - DSP code and data images (1MB) | ||
| 86 | * ADSC_CPU_PCM_Buff - ADSC CPU PCM buffer (40KB) | ||
| 87 | * ADSC_AUX_Buff - ADSC AUX buffer (16KB) | ||
| 88 | * ADSC_Main_Buff - ADSC Main buffer (16KB) | ||
| 89 | * | ||
| 90 | */ | 62 | */ |
| 91 | { | 63 | /* DSP code and data images (1MiB) */ |
| 92 | .name = "DSP_Image_Buff", | 64 | PREALLOC_NORMAL("DSP_Image_Buff", 0x00000000, 0x00100000-1, |
| 93 | .start = 0x00000000, | 65 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 94 | .end = 0x000FFFFF, | 66 | /* ADSC CPU PCM buffer (40KiB) */ |
| 95 | .flags = IORESOURCE_MEM, | 67 | PREALLOC_NORMAL("ADSC_CPU_PCM_Buff", 0x00000000, 0x0000A000-1, |
| 96 | }, | 68 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 97 | { | 69 | /* ADSC AUX buffer (128KiB) */ |
| 98 | .name = "ADSC_CPU_PCM_Buff", | 70 | PREALLOC_NORMAL("ADSC_AUX_Buff", 0x00000000, 0x00020000-1, |
| 99 | .start = 0x00000000, | 71 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 100 | .end = 0x00009FFF, | 72 | /* ADSC Main buffer (128KiB) */ |
| 101 | .flags = IORESOURCE_MEM, | 73 | PREALLOC_NORMAL("ADSC_Main_Buff", 0x00000000, 0x00020000-1, |
| 102 | }, | 74 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 103 | { | 75 | |
| 104 | .name = "ADSC_AUX_Buff", | ||
| 105 | .start = 0x00000000, | ||
| 106 | .end = 0x00003FFF, | ||
| 107 | .flags = IORESOURCE_MEM, | ||
| 108 | }, | ||
| 109 | { | ||
| 110 | .name = "ADSC_Main_Buff", | ||
| 111 | .start = 0x00000000, | ||
| 112 | .end = 0x00003FFF, | ||
| 113 | .flags = IORESOURCE_MEM, | ||
| 114 | }, | ||
| 115 | /* | 76 | /* |
| 116 | * | ||
| 117 | * STAVEM driver/STAPI | 77 | * STAVEM driver/STAPI |
| 118 | * | 78 | * |
| 119 | * This driver requires: | ||
| 120 | * | ||
| 121 | * Arbitrary Based Buffers: | ||
| 122 | * This memory area is used for allocating buffers for Video decoding | 79 | * This memory area is used for allocating buffers for Video decoding |
| 123 | * purposes. Allocation/De-allocation within this buffer is managed | 80 | * purposes. Allocation/De-allocation within this buffer is managed |
| 124 | * by the STAVMEM driver of the STAPI. They could be Decimated | 81 | * by the STAVMEM driver of the STAPI. They could be Decimated |
| 125 | * Picture Buffers, Intermediate Buffers, as deemed necessary for | 82 | * Picture Buffers, Intermediate Buffers, as deemed necessary for |
| 126 | * video decoding purposes, for any video decoders on Zeus. | 83 | * video decoding purposes, for any video decoders on Zeus. |
| 127 | * | ||
| 128 | */ | 84 | */ |
| 129 | { | 85 | /* 12MiB */ |
| 130 | .name = "AVMEMPartition0", | 86 | PREALLOC_NORMAL("AVMEMPartition0", 0x00000000, 0x00c00000-1, |
| 131 | .start = 0x63580000, | 87 | IORESOURCE_MEM) |
| 132 | .end = 0x64180000 - 1, /* 12 MB total */ | 88 | |
| 133 | .flags = IORESOURCE_IO, | ||
| 134 | }, | ||
| 135 | /* | 89 | /* |
| 136 | * | ||
| 137 | * DOCSIS Subsystem | 90 | * DOCSIS Subsystem |
| 138 | * | ||
| 139 | * This driver requires: | ||
| 140 | * | ||
| 141 | * Arbitrary Based Buffers: | ||
| 142 | * Docsis - | ||
| 143 | * | ||
| 144 | */ | 91 | */ |
| 145 | { | 92 | /* 7MiB */ |
| 146 | .name = "Docsis", | 93 | PREALLOC_DOCSIS("Docsis", 0x67500000, 0x67c00000-1, IORESOURCE_MEM) |
| 147 | .start = 0x62000000, | 94 | |
| 148 | .end = 0x62700000 - 1, /* 7 MB total */ | ||
| 149 | .flags = IORESOURCE_IO, | ||
| 150 | }, | ||
| 151 | /* | 95 | /* |
| 152 | * | ||
| 153 | * GHW HAL Driver | 96 | * GHW HAL Driver |
| 154 | * | ||
| 155 | * This driver requires: | ||
| 156 | * | ||
| 157 | * Arbitrary Based Buffers: | ||
| 158 | * GraphicsHeap - PowerTV Graphics Heap | ||
| 159 | * | ||
| 160 | */ | 97 | */ |
| 161 | { | 98 | /* PowerTV Graphics Heap (14MiB) */ |
| 162 | .name = "GraphicsHeap", | 99 | PREALLOC_NORMAL("GraphicsHeap", 0x62700000, 0x63500000-1, |
| 163 | .start = 0x62700000, | 100 | IORESOURCE_MEM) |
| 164 | .end = 0x63500000 - 1, /* 14 MB total */ | 101 | |
| 165 | .flags = IORESOURCE_IO, | ||
| 166 | }, | ||
| 167 | /* | 102 | /* |
| 168 | * | ||
| 169 | * multi com buffer area | 103 | * multi com buffer area |
| 170 | * | ||
| 171 | * This driver requires: | ||
| 172 | * | ||
| 173 | * Arbitrary Based Buffers: | ||
| 174 | * Docsis - | ||
| 175 | * | ||
| 176 | */ | 104 | */ |
| 177 | { | 105 | /* 128KiB */ |
| 178 | .name = "MulticomSHM", | 106 | PREALLOC_NORMAL("MulticomSHM", 0x26000000, 0x26020000-1, |
| 179 | .start = 0x26000000, | 107 | IORESOURCE_MEM) |
| 180 | .end = 0x26020000 - 1, | 108 | |
| 181 | .flags = IORESOURCE_MEM, | ||
| 182 | }, | ||
| 183 | /* | 109 | /* |
| 184 | * | ||
| 185 | * DMA Ring buffer | 110 | * DMA Ring buffer |
| 186 | * | ||
| 187 | * This driver requires: | ||
| 188 | * | ||
| 189 | * Arbitrary Based Buffers: | ||
| 190 | * Docsis - | ||
| 191 | * | ||
| 192 | */ | 111 | */ |
| 193 | { | 112 | PREALLOC_NORMAL("BMM_Buffer", 0x00000000, 0x002EA000-1, |
| 194 | .name = "BMM_Buffer", | 113 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 195 | .start = 0x00000000, | 114 | |
| 196 | .end = 0x00280000 - 1, | ||
| 197 | .flags = IORESOURCE_MEM, | ||
| 198 | }, | ||
| 199 | /* | 115 | /* |
| 200 | * | ||
| 201 | * Display bins buffer for unit0 | 116 | * Display bins buffer for unit0 |
| 202 | * | ||
| 203 | * This driver requires: | ||
| 204 | * | ||
| 205 | * Arbitrary Based Buffers: | ||
| 206 | * Display Bins for unit0 | ||
| 207 | * | ||
| 208 | */ | 117 | */ |
| 209 | { | 118 | /* 4KiB */ |
| 210 | .name = "DisplayBins0", | 119 | PREALLOC_NORMAL("DisplayBins0", 0x00000000, 0x00001000-1, |
| 211 | .start = 0x00000000, | 120 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 212 | .end = 0x00000FFF, /* 4 KB total */ | 121 | |
| 213 | .flags = IORESOURCE_MEM, | ||
| 214 | }, | ||
| 215 | /* | 122 | /* |
| 216 | * | 123 | * Display bins buffer for unit1 |
| 217 | * Display bins buffer | ||
| 218 | * | ||
| 219 | * This driver requires: | ||
| 220 | * | ||
| 221 | * Arbitrary Based Buffers: | ||
| 222 | * Display Bins for unit1 | ||
| 223 | * | ||
| 224 | */ | 124 | */ |
| 225 | { | 125 | /* 4KiB */ |
| 226 | .name = "DisplayBins1", | 126 | PREALLOC_NORMAL("DisplayBins1", 0x00000000, 0x00001000-1, |
| 227 | .start = 0x64AD4000, | 127 | IORESOURCE_MEM) |
| 228 | .end = 0x64AD5000 - 1, /* 4 KB total */ | 128 | |
| 229 | .flags = IORESOURCE_IO, | ||
| 230 | }, | ||
| 231 | /* | 129 | /* |
| 232 | * | ||
| 233 | * ITFS | 130 | * ITFS |
| 234 | * | ||
| 235 | * This driver requires: | ||
| 236 | * | ||
| 237 | * Arbitrary Based Buffers: | ||
| 238 | * Docsis - | ||
| 239 | * | ||
| 240 | */ | 131 | */ |
| 241 | { | 132 | /* 815,104 bytes each for 2 ITFS partitions. */ |
| 242 | .name = "ITFS", | 133 | PREALLOC_NORMAL("ITFS", 0x00000000, 0x0018E000-1, IORESOURCE_MEM) |
| 243 | .start = 0x64180000, | 134 | |
| 244 | /* 815,104 bytes each for 2 ITFS partitions. */ | ||
| 245 | .end = 0x6430DFFF, | ||
| 246 | .flags = IORESOURCE_IO, | ||
| 247 | }, | ||
| 248 | /* | 135 | /* |
| 249 | * | ||
| 250 | * AVFS | 136 | * AVFS |
| 251 | * | ||
| 252 | * This driver requires: | ||
| 253 | * | ||
| 254 | * Arbitrary Based Buffers: | ||
| 255 | * Docsis - | ||
| 256 | * | ||
| 257 | */ | 137 | */ |
| 258 | { | 138 | /* (945K * 8) = (128K * 3) 5 playbacks / 3 server */ |
| 259 | .name = "AvfsDmaMem", | 139 | PREALLOC_NORMAL("AvfsDmaMem", 0x00000000, 0x007c2000-1, |
| 260 | .start = 0x6430E000, | 140 | IORESOURCE_MEM) |
| 261 | /* (945K * 8) = (128K *3) 5 playbacks / 3 server */ | 141 | |
| 262 | .end = 0x64AD0000 - 1, | 142 | /* 4KiB */ |
| 263 | .flags = IORESOURCE_IO, | 143 | PREALLOC_NORMAL("AvfsFileSys", 0x00000000, 0x00001000-1, |
| 264 | }, | 144 | IORESOURCE_MEM) |
| 265 | { | 145 | |
| 266 | .name = "AvfsFileSys", | ||
| 267 | .start = 0x64AD0000, | ||
| 268 | .end = 0x64AD1000 - 1, /* 4K */ | ||
| 269 | .flags = IORESOURCE_IO, | ||
| 270 | }, | ||
| 271 | /* | 146 | /* |
| 272 | * | ||
| 273 | * PMEM | 147 | * PMEM |
| 274 | * | ||
| 275 | * This driver requires: | ||
| 276 | * | ||
| 277 | * Arbitrary Based Buffers: | ||
| 278 | * Persistent memory for diagnostics. | ||
| 279 | * | ||
| 280 | */ | 148 | */ |
| 281 | { | 149 | /* Persistent memory for diagnostics (64KiB) */ |
| 282 | .name = "DiagPersistentMemory", | 150 | PREALLOC_PMEM("DiagPersistentMemory", 0x00000000, 0x10000-1, |
| 283 | .start = 0x00000000, | 151 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 284 | .end = 0x10000 - 1, | 152 | |
| 285 | .flags = IORESOURCE_MEM, | ||
| 286 | }, | ||
| 287 | /* | 153 | /* |
| 288 | * | ||
| 289 | * Smartcard | 154 | * Smartcard |
| 290 | * | ||
| 291 | * This driver requires: | ||
| 292 | * | ||
| 293 | * Arbitrary Based Buffers: | ||
| 294 | * Read and write buffers for Internal/External cards | ||
| 295 | * | ||
| 296 | */ | 155 | */ |
| 297 | { | 156 | /* Read and write buffers for Internal/External cards (10KiB) */ |
| 298 | .name = "SmartCardInfo", | 157 | PREALLOC_NORMAL("SmartCardInfo", 0x00000000, 0x2800-1, |
| 299 | .start = 0x64AD1000, | 158 | IORESOURCE_MEM) |
| 300 | .end = 0x64AD3800 - 1, | 159 | |
| 301 | .flags = IORESOURCE_IO, | ||
| 302 | }, | ||
| 303 | /* | 160 | /* |
| 304 | * | ||
| 305 | * KAVNET | 161 | * KAVNET |
| 306 | * NP Reset Vector - must be of the form xxCxxxxx | ||
| 307 | * NP Image - must be video bank 1 | ||
| 308 | * NP IPC - must be video bank 2 | ||
| 309 | */ | 162 | */ |
| 310 | { | 163 | /* NP Reset Vector - must be of the form xxCxxxxx (4KiB) */ |
| 311 | .name = "NP_Reset_Vector", | 164 | PREALLOC_NORMAL("NP_Reset_Vector", 0x27c00000, 0x27c01000-1, |
| 312 | .start = 0x27c00000, | 165 | IORESOURCE_MEM) |
| 313 | .end = 0x27c01000 - 1, | 166 | /* NP Image - must be video bank 1 (320KiB) */ |
| 314 | .flags = IORESOURCE_MEM, | 167 | PREALLOC_NORMAL("NP_Image", 0x27020000, 0x27070000-1, IORESOURCE_MEM) |
| 315 | }, | 168 | /* NP IPC - must be video bank 2 (512KiB) */ |
| 316 | { | 169 | PREALLOC_NORMAL("NP_IPC", 0x63500000, 0x63580000-1, IORESOURCE_MEM) |
| 317 | .name = "NP_Image", | 170 | |
| 318 | .start = 0x27020000, | 171 | /* |
| 319 | .end = 0x27060000 - 1, | 172 | * TFTPBuffer |
| 320 | .flags = IORESOURCE_MEM, | 173 | * |
| 321 | }, | 174 | * This buffer is used in some minimal configurations (e.g. two-way |
| 322 | { | 175 | * loader) for storing software images |
| 323 | .name = "NP_IPC", | 176 | */ |
| 324 | .start = 0x63500000, | 177 | PREALLOC_TFTP("TFTPBuffer", 0x00000000, MEBIBYTE(80)-1, |
| 325 | .end = 0x63580000 - 1, | 178 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 326 | .flags = IORESOURCE_IO, | 179 | |
| 327 | }, | ||
| 328 | /* | 180 | /* |
| 329 | * Add other resources here | 181 | * Add other resources here |
| 330 | */ | 182 | */ |
| 331 | { }, | 183 | |
| 184 | /* | ||
| 185 | * End of Resource marker | ||
| 186 | */ | ||
| 187 | { | ||
| 188 | .flags = 0, | ||
| 189 | }, | ||
| 332 | }; | 190 | }; |
| 333 | 191 | ||
| 334 | /* | 192 | /* |
| @@ -337,272 +195,146 @@ struct resource dvr_cronus_resources[] __initdata = | |||
| 337 | struct resource non_dvr_cronus_resources[] __initdata = | 195 | struct resource non_dvr_cronus_resources[] __initdata = |
| 338 | { | 196 | { |
| 339 | /* | 197 | /* |
| 340 | * | ||
| 341 | * VIDEO1 / LX1 | 198 | * VIDEO1 / LX1 |
| 342 | * | ||
| 343 | */ | 199 | */ |
| 344 | { | 200 | /* Delta-Mu 1 image (2MiB) */ |
| 345 | .name = "ST231aImage", /* Delta-Mu 1 image and ram */ | 201 | PREALLOC_NORMAL("ST231aImage", 0x24000000, 0x24200000-1, |
| 346 | .start = 0x24000000, | 202 | IORESOURCE_MEM) |
| 347 | .end = 0x241FFFFF, /* 2MiB */ | 203 | /* Delta-Mu 1 monitor (8KiB) */ |
| 348 | .flags = IORESOURCE_MEM, | 204 | PREALLOC_NORMAL("ST231aMonitor", 0x24200000, 0x24202000-1, |
| 349 | }, | 205 | IORESOURCE_MEM) |
| 350 | { | 206 | /* Delta-Mu 1 RAM (~29.9MiB (32MiB - (2MiB + 8KiB))) */ |
| 351 | .name = "ST231aMonitor", /* 8KiB block ST231a monitor */ | 207 | PREALLOC_NORMAL("MediaMemory1", 0x24202000, 0x26000000-1, |
| 352 | .start = 0x24200000, | 208 | IORESOURCE_MEM) |
| 353 | .end = 0x24201FFF, | 209 | |
| 354 | .flags = IORESOURCE_MEM, | ||
| 355 | }, | ||
| 356 | { | ||
| 357 | .name = "MediaMemory1", | ||
| 358 | .start = 0x24202000, | ||
| 359 | .end = 0x25FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */ | ||
| 360 | .flags = IORESOURCE_MEM, | ||
| 361 | }, | ||
| 362 | /* | 210 | /* |
| 363 | * | ||
| 364 | * VIDEO2 / LX2 | 211 | * VIDEO2 / LX2 |
| 365 | * | ||
| 366 | */ | 212 | */ |
| 367 | { | 213 | /* Delta-Mu 2 image (2MiB) */ |
| 368 | .name = "ST231bImage", /* Delta-Mu 2 image and ram */ | 214 | PREALLOC_NORMAL("ST231bImage", 0x60000000, 0x60200000-1, |
| 369 | .start = 0x60000000, | 215 | IORESOURCE_MEM) |
| 370 | .end = 0x601FFFFF, /* 2MiB */ | 216 | /* Delta-Mu 2 monitor (8KiB) */ |
| 371 | .flags = IORESOURCE_IO, | 217 | PREALLOC_NORMAL("ST231bMonitor", 0x60200000, 0x60202000-1, |
| 372 | }, | 218 | IORESOURCE_MEM) |
| 373 | { | 219 | /* Delta-Mu 2 RAM (~29.9MiB (32MiB - (2MiB + 8KiB))) */ |
| 374 | .name = "ST231bMonitor", /* 8KiB block ST231b monitor */ | 220 | PREALLOC_NORMAL("MediaMemory2", 0x60202000, 0x62000000-1, |
| 375 | .start = 0x60200000, | 221 | IORESOURCE_MEM) |
| 376 | .end = 0x60201FFF, | 222 | |
| 377 | .flags = IORESOURCE_IO, | ||
| 378 | }, | ||
| 379 | { | ||
| 380 | .name = "MediaMemory2", | ||
| 381 | .start = 0x60202000, | ||
| 382 | .end = 0x61FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */ | ||
| 383 | .flags = IORESOURCE_IO, | ||
| 384 | }, | ||
| 385 | /* | 223 | /* |
| 386 | * | ||
| 387 | * Sysaudio Driver | 224 | * Sysaudio Driver |
| 388 | * | ||
| 389 | * This driver requires: | ||
| 390 | * | ||
| 391 | * Arbitrary Based Buffers: | ||
| 392 | * DSP_Image_Buff - DSP code and data images (1MB) | ||
| 393 | * ADSC_CPU_PCM_Buff - ADSC CPU PCM buffer (40KB) | ||
| 394 | * ADSC_AUX_Buff - ADSC AUX buffer (16KB) | ||
| 395 | * ADSC_Main_Buff - ADSC Main buffer (16KB) | ||
| 396 | * | ||
| 397 | */ | 225 | */ |
| 398 | { | 226 | /* DSP code and data images (1MiB) */ |
| 399 | .name = "DSP_Image_Buff", | 227 | PREALLOC_NORMAL("DSP_Image_Buff", 0x00000000, 0x00100000-1, |
| 400 | .start = 0x00000000, | 228 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 401 | .end = 0x000FFFFF, | 229 | /* ADSC CPU PCM buffer (40KiB) */ |
| 402 | .flags = IORESOURCE_MEM, | 230 | PREALLOC_NORMAL("ADSC_CPU_PCM_Buff", 0x00000000, 0x0000A000-1, |
| 403 | }, | 231 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 404 | { | 232 | /* ADSC AUX buffer (128KiB) */ |
| 405 | .name = "ADSC_CPU_PCM_Buff", | 233 | PREALLOC_NORMAL("ADSC_AUX_Buff", 0x00000000, 0x00020000-1, |
| 406 | .start = 0x00000000, | 234 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 407 | .end = 0x00009FFF, | 235 | /* ADSC Main buffer (128KiB) */ |
| 408 | .flags = IORESOURCE_MEM, | 236 | PREALLOC_NORMAL("ADSC_Main_Buff", 0x00000000, 0x00020000-1, |
| 409 | }, | 237 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 410 | { | 238 | |
| 411 | .name = "ADSC_AUX_Buff", | ||
| 412 | .start = 0x00000000, | ||
| 413 | .end = 0x00003FFF, | ||
| 414 | .flags = IORESOURCE_MEM, | ||
| 415 | }, | ||
| 416 | { | ||
| 417 | .name = "ADSC_Main_Buff", | ||
| 418 | .start = 0x00000000, | ||
| 419 | .end = 0x00003FFF, | ||
| 420 | .flags = IORESOURCE_MEM, | ||
| 421 | }, | ||
| 422 | /* | 239 | /* |
| 423 | * | ||
| 424 | * STAVEM driver/STAPI | 240 | * STAVEM driver/STAPI |
| 425 | * | 241 | * |
| 426 | * This driver requires: | ||
| 427 | * | ||
| 428 | * Arbitrary Based Buffers: | ||
| 429 | * This memory area is used for allocating buffers for Video decoding | 242 | * This memory area is used for allocating buffers for Video decoding |
| 430 | * purposes. Allocation/De-allocation within this buffer is managed | 243 | * purposes. Allocation/De-allocation within this buffer is managed |
| 431 | * by the STAVMEM driver of the STAPI. They could be Decimated | 244 | * by the STAVMEM driver of the STAPI. They could be Decimated |
| 432 | * Picture Buffers, Intermediate Buffers, as deemed necessary for | 245 | * Picture Buffers, Intermediate Buffers, as deemed necessary for |
| 433 | * video decoding purposes, for any video decoders on Zeus. | 246 | * video decoding purposes, for any video decoders on Zeus. |
| 434 | * | ||
| 435 | */ | 247 | */ |
| 436 | { | 248 | /* 12MiB */ |
| 437 | .name = "AVMEMPartition0", | 249 | PREALLOC_NORMAL("AVMEMPartition0", 0x00000000, 0x00c00000-1, |
| 438 | .start = 0x63580000, | 250 | IORESOURCE_MEM) |
| 439 | .end = 0x64180000 - 1, /* 12 MB total */ | 251 | |
| 440 | .flags = IORESOURCE_IO, | ||
| 441 | }, | ||
| 442 | /* | 252 | /* |
| 443 | * | ||
| 444 | * DOCSIS Subsystem | 253 | * DOCSIS Subsystem |
| 445 | * | ||
| 446 | * This driver requires: | ||
| 447 | * | ||
| 448 | * Arbitrary Based Buffers: | ||
| 449 | * Docsis - | ||
| 450 | * | ||
| 451 | */ | 254 | */ |
| 452 | { | 255 | /* 7MiB */ |
| 453 | .name = "Docsis", | 256 | PREALLOC_DOCSIS("Docsis", 0x67500000, 0x67c00000-1, IORESOURCE_MEM) |
| 454 | .start = 0x62000000, | 257 | |
| 455 | .end = 0x62700000 - 1, /* 7 MB total */ | ||
| 456 | .flags = IORESOURCE_IO, | ||
| 457 | }, | ||
| 458 | /* | 258 | /* |
| 459 | * | ||
| 460 | * GHW HAL Driver | 259 | * GHW HAL Driver |
| 461 | * | ||
| 462 | * This driver requires: | ||
| 463 | * | ||
| 464 | * Arbitrary Based Buffers: | ||
| 465 | * GraphicsHeap - PowerTV Graphics Heap | ||
| 466 | * | ||
| 467 | */ | 260 | */ |
| 468 | { | 261 | /* PowerTV Graphics Heap (14MiB) */ |
| 469 | .name = "GraphicsHeap", | 262 | PREALLOC_NORMAL("GraphicsHeap", 0x62700000, 0x63500000-1, |
| 470 | .start = 0x62700000, | 263 | IORESOURCE_MEM) |
| 471 | .end = 0x63500000 - 1, /* 14 MB total */ | 264 | |
| 472 | .flags = IORESOURCE_IO, | ||
| 473 | }, | ||
| 474 | /* | 265 | /* |
| 475 | * | ||
| 476 | * multi com buffer area | 266 | * multi com buffer area |
| 477 | * | ||
| 478 | * This driver requires: | ||
| 479 | * | ||
| 480 | * Arbitrary Based Buffers: | ||
| 481 | * Docsis - | ||
| 482 | * | ||
| 483 | */ | 267 | */ |
| 484 | { | 268 | /* 128KiB */ |
| 485 | .name = "MulticomSHM", | 269 | PREALLOC_NORMAL("MulticomSHM", 0x26000000, 0x26020000-1, |
| 486 | .start = 0x26000000, | 270 | IORESOURCE_MEM) |
| 487 | .end = 0x26020000 - 1, | 271 | |
| 488 | .flags = IORESOURCE_MEM, | ||
| 489 | }, | ||
| 490 | /* | 272 | /* |
| 491 | * | 273 | * DMA Ring buffer (don't need recording buffers) |
| 492 | * DMA Ring buffer | ||
| 493 | * | ||
| 494 | * This driver requires: | ||
| 495 | * | ||
| 496 | * Arbitrary Based Buffers: | ||
| 497 | * Docsis - | ||
| 498 | * | ||
| 499 | */ | 274 | */ |
| 500 | { | 275 | /* 680KiB */ |
| 501 | .name = "BMM_Buffer", | 276 | PREALLOC_NORMAL("BMM_Buffer", 0x00000000, 0x000AA000-1, |
| 502 | .start = 0x00000000, | 277 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 503 | .end = 0x000AA000 - 1, | 278 | |
| 504 | .flags = IORESOURCE_MEM, | ||
| 505 | }, | ||
| 506 | /* | 279 | /* |
| 507 | * | ||
| 508 | * Display bins buffer for unit0 | 280 | * Display bins buffer for unit0 |
| 509 | * | ||
| 510 | * This driver requires: | ||
| 511 | * | ||
| 512 | * Arbitrary Based Buffers: | ||
| 513 | * Display Bins for unit0 | ||
| 514 | * | ||
| 515 | */ | 281 | */ |
| 516 | { | 282 | /* 4KiB */ |
| 517 | .name = "DisplayBins0", | 283 | PREALLOC_NORMAL("DisplayBins0", 0x00000000, 0x00001000-1, |
| 518 | .start = 0x00000000, | 284 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 519 | .end = 0x00000FFF, /* 4 KB total */ | 285 | |
| 520 | .flags = IORESOURCE_MEM, | ||
| 521 | }, | ||
| 522 | /* | 286 | /* |
| 523 | * | 287 | * Display bins buffer for unit1 |
| 524 | * Display bins buffer | ||
| 525 | * | ||
| 526 | * This driver requires: | ||
| 527 | * | ||
| 528 | * Arbitrary Based Buffers: | ||
| 529 | * Display Bins for unit1 | ||
| 530 | * | ||
| 531 | */ | 288 | */ |
| 532 | { | 289 | /* 4KiB */ |
| 533 | .name = "DisplayBins1", | 290 | PREALLOC_NORMAL("DisplayBins1", 0x00000000, 0x00001000-1, |
| 534 | .start = 0x64AD4000, | 291 | IORESOURCE_MEM) |
| 535 | .end = 0x64AD5000 - 1, /* 4 KB total */ | 292 | |
| 536 | .flags = IORESOURCE_IO, | ||
| 537 | }, | ||
| 538 | /* | 293 | /* |
| 539 | * | ||
| 540 | * AVFS: player HAL memory | 294 | * AVFS: player HAL memory |
| 541 | * | ||
| 542 | * | ||
| 543 | */ | 295 | */ |
| 544 | { | 296 | /* 945K * 3 for playback */ |
| 545 | .name = "AvfsDmaMem", | 297 | PREALLOC_NORMAL("AvfsDmaMem", 0x00000000, 0x002c4c00-1, IORESOURCE_MEM) |
| 546 | .start = 0x6430E000, | 298 | |
| 547 | .end = 0x645D2C00 - 1, /* 945K * 3 for playback */ | ||
| 548 | .flags = IORESOURCE_IO, | ||
| 549 | }, | ||
| 550 | /* | 299 | /* |
| 551 | * | ||
| 552 | * PMEM | 300 | * PMEM |
| 553 | * | ||
| 554 | * This driver requires: | ||
| 555 | * | ||
| 556 | * Arbitrary Based Buffers: | ||
| 557 | * Persistent memory for diagnostics. | ||
| 558 | * | ||
| 559 | */ | 301 | */ |
| 560 | { | 302 | /* Persistent memory for diagnostics (64KiB) */ |
| 561 | .name = "DiagPersistentMemory", | 303 | PREALLOC_PMEM("DiagPersistentMemory", 0x00000000, 0x10000-1, |
| 562 | .start = 0x00000000, | 304 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 563 | .end = 0x10000 - 1, | 305 | |
| 564 | .flags = IORESOURCE_MEM, | ||
| 565 | }, | ||
| 566 | /* | 306 | /* |
| 567 | * | ||
| 568 | * Smartcard | 307 | * Smartcard |
| 569 | * | ||
| 570 | * This driver requires: | ||
| 571 | * | ||
| 572 | * Arbitrary Based Buffers: | ||
| 573 | * Read and write buffers for Internal/External cards | ||
| 574 | * | ||
| 575 | */ | 308 | */ |
| 576 | { | 309 | /* Read and write buffers for Internal/External cards (10KiB) */ |
| 577 | .name = "SmartCardInfo", | 310 | PREALLOC_NORMAL("SmartCardInfo", 0x00000000, 0x2800-1, IORESOURCE_MEM) |
| 578 | .start = 0x64AD1000, | 311 | |
| 579 | .end = 0x64AD3800 - 1, | ||
| 580 | .flags = IORESOURCE_IO, | ||
| 581 | }, | ||
| 582 | /* | 312 | /* |
| 583 | * | ||
| 584 | * KAVNET | 313 | * KAVNET |
| 585 | * NP Reset Vector - must be of the form xxCxxxxx | 314 | */ |
| 586 | * NP Image - must be video bank 1 | 315 | /* NP Reset Vector - must be of the form xxCxxxxx (4KiB) */ |
| 587 | * NP IPC - must be video bank 2 | 316 | PREALLOC_NORMAL("NP_Reset_Vector", 0x27c00000, 0x27c01000-1, |
| 317 | IORESOURCE_MEM) | ||
| 318 | /* NP Image - must be video bank 1 (320KiB) */ | ||
| 319 | PREALLOC_NORMAL("NP_Image", 0x27020000, 0x27070000-1, IORESOURCE_MEM) | ||
| 320 | /* NP IPC - must be video bank 2 (512KiB) */ | ||
| 321 | PREALLOC_NORMAL("NP_IPC", 0x63500000, 0x63580000-1, IORESOURCE_MEM) | ||
| 322 | |||
| 323 | /* | ||
| 324 | * NAND Flash | ||
| 325 | */ | ||
| 326 | /* 10KiB */ | ||
| 327 | PREALLOC_NORMAL("NandFlash", NAND_FLASH_BASE, NAND_FLASH_BASE+0x400-1, | ||
| 328 | IORESOURCE_MEM) | ||
| 329 | |||
| 330 | /* | ||
| 331 | * Add other resources here | ||
| 332 | */ | ||
| 333 | |||
| 334 | /* | ||
| 335 | * End of Resource marker | ||
| 588 | */ | 336 | */ |
| 589 | { | 337 | { |
| 590 | .name = "NP_Reset_Vector", | 338 | .flags = 0, |
| 591 | .start = 0x27c00000, | ||
| 592 | .end = 0x27c01000 - 1, | ||
| 593 | .flags = IORESOURCE_MEM, | ||
| 594 | }, | ||
| 595 | { | ||
| 596 | .name = "NP_Image", | ||
| 597 | .start = 0x27020000, | ||
| 598 | .end = 0x27060000 - 1, | ||
| 599 | .flags = IORESOURCE_MEM, | ||
| 600 | }, | ||
| 601 | { | ||
| 602 | .name = "NP_IPC", | ||
| 603 | .start = 0x63500000, | ||
| 604 | .end = 0x63580000 - 1, | ||
| 605 | .flags = IORESOURCE_IO, | ||
| 606 | }, | 339 | }, |
| 607 | { }, | ||
| 608 | }; | 340 | }; |
diff --git a/arch/mips/powertv/asic/prealloc-cronuslite.c b/arch/mips/powertv/asic/prealloc-cronuslite.c index 23a905613c04..b5537e49e7f5 100644 --- a/arch/mips/powertv/asic/prealloc-cronuslite.c +++ b/arch/mips/powertv/asic/prealloc-cronuslite.c | |||
| @@ -22,7 +22,9 @@ | |||
| 22 | */ | 22 | */ |
| 23 | 23 | ||
| 24 | #include <linux/init.h> | 24 | #include <linux/init.h> |
| 25 | #include <linux/ioport.h> | ||
| 25 | #include <asm/mach-powertv/asic.h> | 26 | #include <asm/mach-powertv/asic.h> |
| 27 | #include "prealloc.h" | ||
| 26 | 28 | ||
| 27 | /* | 29 | /* |
| 28 | * NON_DVR_CAPABLE CRONUSLITE RESOURCES | 30 | * NON_DVR_CAPABLE CRONUSLITE RESOURCES |
| @@ -30,261 +32,143 @@ | |||
| 30 | struct resource non_dvr_cronuslite_resources[] __initdata = | 32 | struct resource non_dvr_cronuslite_resources[] __initdata = |
| 31 | { | 33 | { |
| 32 | /* | 34 | /* |
| 33 | * | ||
| 34 | * VIDEO2 / LX2 | 35 | * VIDEO2 / LX2 |
| 35 | * | ||
| 36 | */ | 36 | */ |
| 37 | { | 37 | /* Delta-Mu 1 image (2MiB) */ |
| 38 | .name = "ST231aImage", /* Delta-Mu 2 image and ram */ | 38 | PREALLOC_NORMAL("ST231aImage", 0x60000000, 0x60200000-1, |
| 39 | .start = 0x60000000, | 39 | IORESOURCE_MEM) |
| 40 | .end = 0x601FFFFF, /* 2MiB */ | 40 | /* Delta-Mu 1 monitor (8KiB) */ |
| 41 | .flags = IORESOURCE_IO, | 41 | PREALLOC_NORMAL("ST231aMonitor", 0x60200000, 0x60202000-1, |
| 42 | }, | 42 | IORESOURCE_MEM) |
| 43 | { | 43 | /* Delta-Mu 1 RAM (~29.9MiB (32MiB - (2MiB + 8KiB))) */ |
| 44 | .name = "ST231aMonitor", /* 8KiB block ST231b monitor */ | 44 | PREALLOC_NORMAL("MediaMemory1", 0x60202000, 0x62000000-1, |
| 45 | .start = 0x60200000, | 45 | IORESOURCE_MEM) |
| 46 | .end = 0x60201FFF, | 46 | |
| 47 | .flags = IORESOURCE_IO, | ||
| 48 | }, | ||
| 49 | { | ||
| 50 | .name = "MediaMemory1", | ||
| 51 | .start = 0x60202000, | ||
| 52 | .end = 0x61FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */ | ||
| 53 | .flags = IORESOURCE_IO, | ||
| 54 | }, | ||
| 55 | /* | 47 | /* |
| 56 | * | ||
| 57 | * Sysaudio Driver | 48 | * Sysaudio Driver |
| 58 | * | ||
| 59 | * This driver requires: | ||
| 60 | * | ||
| 61 | * Arbitrary Based Buffers: | ||
| 62 | * DSP_Image_Buff - DSP code and data images (1MB) | ||
| 63 | * ADSC_CPU_PCM_Buff - ADSC CPU PCM buffer (40KB) | ||
| 64 | * ADSC_AUX_Buff - ADSC AUX buffer (16KB) | ||
| 65 | * ADSC_Main_Buff - ADSC Main buffer (16KB) | ||
| 66 | * | ||
| 67 | */ | 49 | */ |
| 68 | { | 50 | /* DSP code and data images (1MiB) */ |
| 69 | .name = "DSP_Image_Buff", | 51 | PREALLOC_NORMAL("DSP_Image_Buff", 0x00000000, 0x00100000-1, |
| 70 | .start = 0x00000000, | 52 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 71 | .end = 0x000FFFFF, | 53 | /* ADSC CPU PCM buffer (40KiB) */ |
| 72 | .flags = IORESOURCE_MEM, | 54 | PREALLOC_NORMAL("ADSC_CPU_PCM_Buff", 0x00000000, 0x0000A000-1, |
| 73 | }, | 55 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 74 | { | 56 | /* ADSC AUX buffer (128KiB) */ |
| 75 | .name = "ADSC_CPU_PCM_Buff", | 57 | PREALLOC_NORMAL("ADSC_AUX_Buff", 0x00000000, 0x00020000-1, |
| 76 | .start = 0x00000000, | 58 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 77 | .end = 0x00009FFF, | 59 | /* ADSC Main buffer (128KiB) */ |
| 78 | .flags = IORESOURCE_MEM, | 60 | PREALLOC_NORMAL("ADSC_Main_Buff", 0x00000000, 0x00020000-1, |
| 79 | }, | 61 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 80 | { | 62 | |
| 81 | .name = "ADSC_AUX_Buff", | ||
| 82 | .start = 0x00000000, | ||
| 83 | .end = 0x00003FFF, | ||
| 84 | .flags = IORESOURCE_MEM, | ||
| 85 | }, | ||
| 86 | { | ||
| 87 | .name = "ADSC_Main_Buff", | ||
| 88 | .start = 0x00000000, | ||
| 89 | .end = 0x00003FFF, | ||
| 90 | .flags = IORESOURCE_MEM, | ||
| 91 | }, | ||
| 92 | /* | 63 | /* |
| 93 | * | ||
| 94 | * STAVEM driver/STAPI | 64 | * STAVEM driver/STAPI |
| 95 | * | 65 | * |
| 96 | * This driver requires: | ||
| 97 | * | ||
| 98 | * Arbitrary Based Buffers: | ||
| 99 | * This memory area is used for allocating buffers for Video decoding | 66 | * This memory area is used for allocating buffers for Video decoding |
| 100 | * purposes. Allocation/De-allocation within this buffer is managed | 67 | * purposes. Allocation/De-allocation within this buffer is managed |
| 101 | * by the STAVMEM driver of the STAPI. They could be Decimated | 68 | * by the STAVMEM driver of the STAPI. They could be Decimated |
| 102 | * Picture Buffers, Intermediate Buffers, as deemed necessary for | 69 | * Picture Buffers, Intermediate Buffers, as deemed necessary for |
| 103 | * video decoding purposes, for any video decoders on Zeus. | 70 | * video decoding purposes, for any video decoders on Zeus. |
| 104 | * | ||
| 105 | */ | 71 | */ |
| 106 | { | 72 | /* 6MiB */ |
| 107 | .name = "AVMEMPartition0", | 73 | PREALLOC_NORMAL("AVMEMPartition0", 0x00000000, 0x00600000-1, |
| 108 | .start = 0x63580000, | 74 | IORESOURCE_MEM) |
| 109 | .end = 0x63B80000 - 1, /* 6 MB total */ | 75 | |
| 110 | .flags = IORESOURCE_IO, | ||
| 111 | }, | ||
| 112 | /* | 76 | /* |
| 113 | * | ||
| 114 | * DOCSIS Subsystem | 77 | * DOCSIS Subsystem |
| 115 | * | ||
| 116 | * This driver requires: | ||
| 117 | * | ||
| 118 | * Arbitrary Based Buffers: | ||
| 119 | * Docsis - | ||
| 120 | * | ||
| 121 | */ | 78 | */ |
| 122 | { | 79 | /* 7MiB */ |
| 123 | .name = "Docsis", | 80 | PREALLOC_DOCSIS("Docsis", 0x67500000, 0x67c00000-1, IORESOURCE_MEM) |
| 124 | .start = 0x62000000, | 81 | |
| 125 | .end = 0x62700000 - 1, /* 7 MB total */ | ||
| 126 | .flags = IORESOURCE_IO, | ||
| 127 | }, | ||
| 128 | /* | 82 | /* |
| 129 | * | ||
| 130 | * GHW HAL Driver | 83 | * GHW HAL Driver |
| 131 | * | ||
| 132 | * This driver requires: | ||
| 133 | * | ||
| 134 | * Arbitrary Based Buffers: | ||
| 135 | * GraphicsHeap - PowerTV Graphics Heap | ||
| 136 | * | ||
| 137 | */ | 84 | */ |
| 138 | { | 85 | /* PowerTV Graphics Heap (14MiB) */ |
| 139 | .name = "GraphicsHeap", | 86 | PREALLOC_NORMAL("GraphicsHeap", 0x62700000, 0x63500000-1, |
| 140 | .start = 0x62700000, | 87 | IORESOURCE_MEM) |
| 141 | .end = 0x63500000 - 1, /* 14 MB total */ | 88 | |
| 142 | .flags = IORESOURCE_IO, | ||
| 143 | }, | ||
| 144 | /* | 89 | /* |
| 145 | * | ||
| 146 | * multi com buffer area | 90 | * multi com buffer area |
| 147 | * | ||
| 148 | * This driver requires: | ||
| 149 | * | ||
| 150 | * Arbitrary Based Buffers: | ||
| 151 | * Docsis - | ||
| 152 | * | ||
| 153 | */ | 91 | */ |
| 154 | { | 92 | /* 128KiB */ |
| 155 | .name = "MulticomSHM", | 93 | PREALLOC_NORMAL("MulticomSHM", 0x26000000, 0x26020000-1, |
| 156 | .start = 0x26000000, | 94 | IORESOURCE_MEM) |
| 157 | .end = 0x26020000 - 1, | 95 | |
| 158 | .flags = IORESOURCE_MEM, | ||
| 159 | }, | ||
| 160 | /* | 96 | /* |
| 161 | * | 97 | * DMA Ring buffer (don't need recording buffers) |
| 162 | * DMA Ring buffer | ||
| 163 | * | ||
| 164 | * This driver requires: | ||
| 165 | * | ||
| 166 | * Arbitrary Based Buffers: | ||
| 167 | * Docsis - | ||
| 168 | * | ||
| 169 | */ | 98 | */ |
| 170 | { | 99 | /* 680KiB */ |
| 171 | .name = "BMM_Buffer", | 100 | PREALLOC_NORMAL("BMM_Buffer", 0x00000000, 0x000AA000-1, |
| 172 | .start = 0x00000000, | 101 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 173 | .end = 0x000AA000 - 1, | 102 | |
| 174 | .flags = IORESOURCE_MEM, | ||
| 175 | }, | ||
| 176 | /* | 103 | /* |
| 177 | * | ||
| 178 | * Display bins buffer for unit0 | 104 | * Display bins buffer for unit0 |
| 179 | * | ||
| 180 | * This driver requires: | ||
| 181 | * | ||
| 182 | * Arbitrary Based Buffers: | ||
| 183 | * Display Bins for unit0 | ||
| 184 | * | ||
| 185 | */ | 105 | */ |
| 186 | { | 106 | /* 4KiB */ |
| 187 | .name = "DisplayBins0", | 107 | PREALLOC_NORMAL("DisplayBins0", 0x00000000, 0x00001000-1, |
| 188 | .start = 0x00000000, | 108 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 189 | .end = 0x00000FFF, /* 4 KB total */ | 109 | |
| 190 | .flags = IORESOURCE_MEM, | ||
| 191 | }, | ||
| 192 | /* | 110 | /* |
| 193 | * | 111 | * Display bins buffer for unit1 |
| 194 | * Display bins buffer | ||
| 195 | * | ||
| 196 | * This driver requires: | ||
| 197 | * | ||
| 198 | * Arbitrary Based Buffers: | ||
| 199 | * Display Bins for unit1 | ||
| 200 | * | ||
| 201 | */ | 112 | */ |
| 202 | { | 113 | /* 4KiB */ |
| 203 | .name = "DisplayBins1", | 114 | PREALLOC_NORMAL("DisplayBins1", 0x00000000, 0x00001000-1, |
| 204 | .start = 0x63B83000, | 115 | IORESOURCE_MEM) |
| 205 | .end = 0x63B84000 - 1, /* 4 KB total */ | 116 | |
| 206 | .flags = IORESOURCE_IO, | ||
| 207 | }, | ||
| 208 | /* | 117 | /* |
| 209 | * | ||
| 210 | * AVFS: player HAL memory | 118 | * AVFS: player HAL memory |
| 211 | * | ||
| 212 | * | ||
| 213 | */ | 119 | */ |
| 214 | { | 120 | /* 945K * 3 for playback */ |
| 215 | .name = "AvfsDmaMem", | 121 | PREALLOC_NORMAL("AvfsDmaMem", 0x00000000, 0x002c4c00-1, |
| 216 | .start = 0x63B84000, | 122 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 217 | .end = 0x63E48C00 - 1, /* 945K * 3 for playback */ | 123 | |
| 218 | .flags = IORESOURCE_IO, | ||
| 219 | }, | ||
| 220 | /* | 124 | /* |
| 221 | * | ||
| 222 | * PMEM | 125 | * PMEM |
| 223 | * | ||
| 224 | * This driver requires: | ||
| 225 | * | ||
| 226 | * Arbitrary Based Buffers: | ||
| 227 | * Persistent memory for diagnostics. | ||
| 228 | * | ||
| 229 | */ | 126 | */ |
| 230 | { | 127 | /* Persistent memory for diagnostics (64KiB) */ |
| 231 | .name = "DiagPersistentMemory", | 128 | PREALLOC_PMEM("DiagPersistentMemory", 0x00000000, 0x10000-1, |
| 232 | .start = 0x00000000, | 129 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 233 | .end = 0x10000 - 1, | 130 | |
| 234 | .flags = IORESOURCE_MEM, | ||
| 235 | }, | ||
| 236 | /* | 131 | /* |
| 237 | * | ||
| 238 | * Smartcard | 132 | * Smartcard |
| 239 | * | ||
| 240 | * This driver requires: | ||
| 241 | * | ||
| 242 | * Arbitrary Based Buffers: | ||
| 243 | * Read and write buffers for Internal/External cards | ||
| 244 | * | ||
| 245 | */ | 133 | */ |
| 246 | { | 134 | /* Read and write buffers for Internal/External cards (10KiB) */ |
| 247 | .name = "SmartCardInfo", | 135 | PREALLOC_NORMAL("SmartCardInfo", 0x00000000, 0x2800-1, IORESOURCE_MEM) |
| 248 | .start = 0x63B80000, | 136 | |
| 249 | .end = 0x63B82800 - 1, | ||
| 250 | .flags = IORESOURCE_IO, | ||
| 251 | }, | ||
| 252 | /* | 137 | /* |
| 253 | * | ||
| 254 | * KAVNET | 138 | * KAVNET |
| 255 | * NP Reset Vector - must be of the form xxCxxxxx | ||
| 256 | * NP Image - must be video bank 1 | ||
| 257 | * NP IPC - must be video bank 2 | ||
| 258 | */ | 139 | */ |
| 259 | { | 140 | /* NP Reset Vector - must be of the form xxCxxxxx (4KiB) */ |
| 260 | .name = "NP_Reset_Vector", | 141 | PREALLOC_NORMAL("NP_Reset_Vector", 0x27c00000, 0x27c01000-1, |
| 261 | .start = 0x27c00000, | 142 | IORESOURCE_MEM) |
| 262 | .end = 0x27c01000 - 1, | 143 | /* NP Image - must be video bank 1 (320KiB) */ |
| 263 | .flags = IORESOURCE_MEM, | 144 | PREALLOC_NORMAL("NP_Image", 0x27020000, 0x27070000-1, IORESOURCE_MEM) |
| 264 | }, | 145 | /* NP IPC - must be video bank 2 (512KiB) */ |
| 265 | { | 146 | PREALLOC_NORMAL("NP_IPC", 0x63500000, 0x63580000-1, IORESOURCE_MEM) |
| 266 | .name = "NP_Image", | 147 | |
| 267 | .start = 0x27020000, | ||
| 268 | .end = 0x27060000 - 1, | ||
| 269 | .flags = IORESOURCE_MEM, | ||
| 270 | }, | ||
| 271 | { | ||
| 272 | .name = "NP_IPC", | ||
| 273 | .start = 0x63500000, | ||
| 274 | .end = 0x63580000 - 1, | ||
| 275 | .flags = IORESOURCE_IO, | ||
| 276 | }, | ||
| 277 | /* | 148 | /* |
| 278 | * NAND Flash | 149 | * NAND Flash |
| 279 | */ | 150 | */ |
| 280 | { | 151 | /* 10KiB */ |
| 281 | .name = "NandFlash", | 152 | PREALLOC_NORMAL("NandFlash", NAND_FLASH_BASE, NAND_FLASH_BASE+0x400-1, |
| 282 | .start = NAND_FLASH_BASE, | 153 | IORESOURCE_MEM) |
| 283 | .end = NAND_FLASH_BASE + 0x400 - 1, | 154 | |
| 284 | .flags = IORESOURCE_IO, | 155 | /* |
| 285 | }, | 156 | * TFTPBuffer |
| 157 | * | ||
| 158 | * This buffer is used in some minimal configurations (e.g. two-way | ||
| 159 | * loader) for storing software images | ||
| 160 | */ | ||
| 161 | PREALLOC_TFTP("TFTPBuffer", 0x00000000, MEBIBYTE(80)-1, | ||
| 162 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) | ||
| 163 | |||
| 286 | /* | 164 | /* |
| 287 | * Add other resources here | 165 | * Add other resources here |
| 288 | */ | 166 | */ |
| 289 | { }, | 167 | |
| 168 | /* | ||
| 169 | * End of Resource marker | ||
| 170 | */ | ||
| 171 | { | ||
| 172 | .flags = 0, | ||
| 173 | }, | ||
| 290 | }; | 174 | }; |
diff --git a/arch/mips/powertv/asic/prealloc-zeus.c b/arch/mips/powertv/asic/prealloc-zeus.c index 018d4514dbe3..96480a2395c0 100644 --- a/arch/mips/powertv/asic/prealloc-zeus.c +++ b/arch/mips/powertv/asic/prealloc-zeus.c | |||
| @@ -22,7 +22,9 @@ | |||
| 22 | */ | 22 | */ |
| 23 | 23 | ||
| 24 | #include <linux/init.h> | 24 | #include <linux/init.h> |
| 25 | #include <linux/ioport.h> | ||
| 25 | #include <asm/mach-powertv/asic.h> | 26 | #include <asm/mach-powertv/asic.h> |
| 27 | #include "prealloc.h" | ||
| 26 | 28 | ||
| 27 | /* | 29 | /* |
| 28 | * DVR_CAPABLE RESOURCES | 30 | * DVR_CAPABLE RESOURCES |
| @@ -30,280 +32,151 @@ | |||
| 30 | struct resource dvr_zeus_resources[] __initdata = | 32 | struct resource dvr_zeus_resources[] __initdata = |
| 31 | { | 33 | { |
| 32 | /* | 34 | /* |
| 33 | * | ||
| 34 | * VIDEO1 / LX1 | 35 | * VIDEO1 / LX1 |
| 35 | * | ||
| 36 | */ | 36 | */ |
| 37 | { | 37 | /* Delta-Mu 1 image (2MiB) */ |
| 38 | .name = "ST231aImage", /* Delta-Mu 1 image and ram */ | 38 | PREALLOC_NORMAL("ST231aImage", 0x20000000, 0x20200000-1, |
| 39 | .start = 0x20000000, | 39 | IORESOURCE_MEM) |
| 40 | .end = 0x201FFFFF, /* 2MiB */ | 40 | /* Delta-Mu 1 monitor (8KiB) */ |
| 41 | .flags = IORESOURCE_IO, | 41 | PREALLOC_NORMAL("ST231aMonitor", 0x20200000, 0x20202000-1, |
| 42 | }, | 42 | IORESOURCE_MEM) |
| 43 | { | 43 | /* Delta-Mu 1 RAM (~29.9MiB (32MiB - (2MiB + 8KiB))) */ |
| 44 | .name = "ST231aMonitor", /* 8KiB block ST231a monitor */ | 44 | PREALLOC_NORMAL("MediaMemory1", 0x20202000, 0x22000000-1, |
| 45 | .start = 0x20200000, | 45 | IORESOURCE_MEM) |
| 46 | .end = 0x20201FFF, | 46 | |
| 47 | .flags = IORESOURCE_IO, | ||
| 48 | }, | ||
| 49 | { | ||
| 50 | .name = "MediaMemory1", | ||
| 51 | .start = 0x20202000, | ||
| 52 | .end = 0x21FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */ | ||
| 53 | .flags = IORESOURCE_IO, | ||
| 54 | }, | ||
| 55 | /* | 47 | /* |
| 56 | * | ||
| 57 | * VIDEO2 / LX2 | 48 | * VIDEO2 / LX2 |
| 58 | * | ||
| 59 | */ | 49 | */ |
| 60 | { | 50 | /* Delta-Mu 2 image (2MiB) */ |
| 61 | .name = "ST231bImage", /* Delta-Mu 2 image and ram */ | 51 | PREALLOC_NORMAL("ST231bImage", 0x30000000, 0x30200000-1, |
| 62 | .start = 0x30000000, | 52 | IORESOURCE_MEM) |
| 63 | .end = 0x301FFFFF, /* 2MiB */ | 53 | /* Delta-Mu 2 monitor (8KiB) */ |
| 64 | .flags = IORESOURCE_IO, | 54 | PREALLOC_NORMAL("ST231bMonitor", 0x30200000, 0x30202000-1, |
| 65 | }, | 55 | IORESOURCE_MEM) |
| 66 | { | 56 | /* Delta-Mu 2 RAM (~29.9MiB (32MiB - (2MiB + 8KiB))) */ |
| 67 | .name = "ST231bMonitor", /* 8KiB block ST231b monitor */ | 57 | PREALLOC_NORMAL("MediaMemory2", 0x30202000, 0x32000000-1, |
| 68 | .start = 0x30200000, | 58 | IORESOURCE_MEM) |
| 69 | .end = 0x30201FFF, | 59 | |
| 70 | .flags = IORESOURCE_IO, | ||
| 71 | }, | ||
| 72 | { | ||
| 73 | .name = "MediaMemory2", | ||
| 74 | .start = 0x30202000, | ||
| 75 | .end = 0x31FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */ | ||
| 76 | .flags = IORESOURCE_IO, | ||
| 77 | }, | ||
| 78 | /* | 60 | /* |
| 79 | * | ||
| 80 | * Sysaudio Driver | 61 | * Sysaudio Driver |
| 81 | * | ||
| 82 | * This driver requires: | ||
| 83 | * | ||
| 84 | * Arbitrary Based Buffers: | ||
| 85 | * DSP_Image_Buff - DSP code and data images (1MB) | ||
| 86 | * ADSC_CPU_PCM_Buff - ADSC CPU PCM buffer (40KB) | ||
| 87 | * ADSC_AUX_Buff - ADSC AUX buffer (16KB) | ||
| 88 | * ADSC_Main_Buff - ADSC Main buffer (16KB) | ||
| 89 | * | ||
| 90 | */ | 62 | */ |
| 91 | { | 63 | /* DSP code and data images (1MiB) */ |
| 92 | .name = "DSP_Image_Buff", | 64 | PREALLOC_NORMAL("DSP_Image_Buff", 0x00000000, 0x00100000-1, |
| 93 | .start = 0x00000000, | 65 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 94 | .end = 0x000FFFFF, | 66 | /* ADSC CPU PCM buffer (40KiB) */ |
| 95 | .flags = IORESOURCE_MEM, | 67 | PREALLOC_NORMAL("ADSC_CPU_PCM_Buff", 0x00000000, 0x0000A000-1, |
| 96 | }, | 68 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 97 | { | 69 | /* ADSC AUX buffer (16KiB) */ |
| 98 | .name = "ADSC_CPU_PCM_Buff", | 70 | PREALLOC_NORMAL("ADSC_AUX_Buff", 0x00000000, 0x00004000-1, |
| 99 | .start = 0x00000000, | 71 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 100 | .end = 0x00009FFF, | 72 | /* ADSC Main buffer (16KiB) */ |
| 101 | .flags = IORESOURCE_MEM, | 73 | PREALLOC_NORMAL("ADSC_Main_Buff", 0x00000000, 0x00004000-1, |
| 102 | }, | 74 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 103 | { | 75 | |
| 104 | .name = "ADSC_AUX_Buff", | ||
| 105 | .start = 0x00000000, | ||
| 106 | .end = 0x00003FFF, | ||
| 107 | .flags = IORESOURCE_MEM, | ||
| 108 | }, | ||
| 109 | { | ||
| 110 | .name = "ADSC_Main_Buff", | ||
| 111 | .start = 0x00000000, | ||
| 112 | .end = 0x00003FFF, | ||
| 113 | .flags = IORESOURCE_MEM, | ||
| 114 | }, | ||
| 115 | /* | 76 | /* |
| 116 | * | ||
| 117 | * STAVEM driver/STAPI | 77 | * STAVEM driver/STAPI |
| 118 | * | 78 | * |
| 119 | * This driver requires: | ||
| 120 | * | ||
| 121 | * Arbitrary Based Buffers: | ||
| 122 | * This memory area is used for allocating buffers for Video decoding | 79 | * This memory area is used for allocating buffers for Video decoding |
| 123 | * purposes. Allocation/De-allocation within this buffer is managed | 80 | * purposes. Allocation/De-allocation within this buffer is managed |
| 124 | * by the STAVMEM driver of the STAPI. They could be Decimated | 81 | * by the STAVMEM driver of the STAPI. They could be Decimated |
| 125 | * Picture Buffers, Intermediate Buffers, as deemed necessary for | 82 | * Picture Buffers, Intermediate Buffers, as deemed necessary for |
| 126 | * video decoding purposes, for any video decoders on Zeus. | 83 | * video decoding purposes, for any video decoders on Zeus. |
| 127 | * | ||
| 128 | */ | 84 | */ |
| 129 | { | 85 | /* 12MiB */ |
| 130 | .name = "AVMEMPartition0", | 86 | PREALLOC_NORMAL("AVMEMPartition0", 0x00000000, 0x00c00000-1, |
| 131 | .start = 0x00000000, | 87 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 132 | .end = 0x00c00000 - 1, /* 12 MB total */ | 88 | |
| 133 | .flags = IORESOURCE_MEM, | ||
| 134 | }, | ||
| 135 | /* | 89 | /* |
| 136 | * | ||
| 137 | * DOCSIS Subsystem | 90 | * DOCSIS Subsystem |
| 138 | * | ||
| 139 | * This driver requires: | ||
| 140 | * | ||
| 141 | * Arbitrary Based Buffers: | ||
| 142 | * Docsis - | ||
| 143 | * | ||
| 144 | */ | 91 | */ |
| 145 | { | 92 | /* 7MiB */ |
| 146 | .name = "Docsis", | 93 | PREALLOC_DOCSIS("Docsis", 0x40100000, 0x40800000-1, IORESOURCE_MEM) |
| 147 | .start = 0x40100000, | 94 | |
| 148 | .end = 0x407fffff, | ||
| 149 | .flags = IORESOURCE_MEM, | ||
| 150 | }, | ||
| 151 | /* | 95 | /* |
| 152 | * | ||
| 153 | * GHW HAL Driver | 96 | * GHW HAL Driver |
| 154 | * | ||
| 155 | * This driver requires: | ||
| 156 | * | ||
| 157 | * Arbitrary Based Buffers: | ||
| 158 | * GraphicsHeap - PowerTV Graphics Heap | ||
| 159 | * | ||
| 160 | */ | 97 | */ |
| 161 | { | 98 | /* PowerTV Graphics Heap (14MiB) */ |
| 162 | .name = "GraphicsHeap", | 99 | PREALLOC_NORMAL("GraphicsHeap", 0x46900000, 0x47700000-1, |
| 163 | .start = 0x46900000, | 100 | IORESOURCE_MEM) |
| 164 | .end = 0x47700000 - 1, /* 14 MB total */ | 101 | |
| 165 | .flags = IORESOURCE_MEM, | ||
| 166 | }, | ||
| 167 | /* | 102 | /* |
| 168 | * | ||
| 169 | * multi com buffer area | 103 | * multi com buffer area |
| 170 | * | ||
| 171 | * This driver requires: | ||
| 172 | * | ||
| 173 | * Arbitrary Based Buffers: | ||
| 174 | * Docsis - | ||
| 175 | * | ||
| 176 | */ | 104 | */ |
| 177 | { | 105 | /* 128KiB */ |
| 178 | .name = "MulticomSHM", | 106 | PREALLOC_NORMAL("MulticomSHM", 0x47900000, 0x47920000-1, |
| 179 | .start = 0x47900000, | 107 | IORESOURCE_MEM) |
| 180 | .end = 0x47920000 - 1, | 108 | |
| 181 | .flags = IORESOURCE_MEM, | ||
| 182 | }, | ||
| 183 | /* | 109 | /* |
| 184 | * | ||
| 185 | * DMA Ring buffer | 110 | * DMA Ring buffer |
| 186 | * | ||
| 187 | * This driver requires: | ||
| 188 | * | ||
| 189 | * Arbitrary Based Buffers: | ||
| 190 | * Docsis - | ||
| 191 | * | ||
| 192 | */ | 111 | */ |
| 193 | { | 112 | /* 2.5MiB */ |
| 194 | .name = "BMM_Buffer", | 113 | PREALLOC_NORMAL("BMM_Buffer", 0x00000000, 0x00280000-1, |
| 195 | .start = 0x00000000, | 114 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 196 | .end = 0x00280000 - 1, | 115 | |
| 197 | .flags = IORESOURCE_MEM, | ||
| 198 | }, | ||
| 199 | /* | 116 | /* |
| 200 | * | ||
| 201 | * Display bins buffer for unit0 | 117 | * Display bins buffer for unit0 |
| 202 | * | ||
| 203 | * This driver requires: | ||
| 204 | * | ||
| 205 | * Arbitrary Based Buffers: | ||
| 206 | * Display Bins for unit0 | ||
| 207 | * | ||
| 208 | */ | 118 | */ |
| 209 | { | 119 | /* 4KiB */ |
| 210 | .name = "DisplayBins0", | 120 | PREALLOC_NORMAL("DisplayBins0", 0x00000000, 0x00001000-1, |
| 211 | .start = 0x00000000, | 121 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 212 | .end = 0x00000FFF, /* 4 KB total */ | 122 | |
| 213 | .flags = IORESOURCE_MEM, | ||
| 214 | }, | ||
| 215 | /* | 123 | /* |
| 216 | * | 124 | * Display bins buffer for unit1 |
| 217 | * Display bins buffer | ||
| 218 | * | ||
| 219 | * This driver requires: | ||
| 220 | * | ||
| 221 | * Arbitrary Based Buffers: | ||
| 222 | * Display Bins for unit1 | ||
| 223 | * | ||
| 224 | */ | 125 | */ |
| 225 | { | 126 | /* 4KiB */ |
| 226 | .name = "DisplayBins1", | 127 | PREALLOC_NORMAL("DisplayBins1", 0x00000000, 0x00001000-1, |
| 227 | .start = 0x00000000, | 128 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 228 | .end = 0x00000FFF, /* 4 KB total */ | 129 | |
| 229 | .flags = IORESOURCE_MEM, | ||
| 230 | }, | ||
| 231 | /* | 130 | /* |
| 232 | * | ||
| 233 | * ITFS | 131 | * ITFS |
| 234 | * | ||
| 235 | * This driver requires: | ||
| 236 | * | ||
| 237 | * Arbitrary Based Buffers: | ||
| 238 | * Docsis - | ||
| 239 | * | ||
| 240 | */ | 132 | */ |
| 241 | { | 133 | /* 815,104 bytes each for 2 ITFS partitions. */ |
| 242 | .name = "ITFS", | 134 | PREALLOC_NORMAL("ITFS", 0x00000000, 0x0018E000-1, |
| 243 | .start = 0x00000000, | 135 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 244 | /* 815,104 bytes each for 2 ITFS partitions. */ | 136 | |
| 245 | .end = 0x0018DFFF, | ||
| 246 | .flags = IORESOURCE_MEM, | ||
| 247 | }, | ||
| 248 | /* | 137 | /* |
| 249 | * | ||
| 250 | * AVFS | 138 | * AVFS |
| 251 | * | ||
| 252 | * This driver requires: | ||
| 253 | * | ||
| 254 | * Arbitrary Based Buffers: | ||
| 255 | * Docsis - | ||
| 256 | * | ||
| 257 | */ | 139 | */ |
| 258 | { | 140 | /* (945K * 8) = (128K * 3) 5 playbacks / 3 server */ |
| 259 | .name = "AvfsDmaMem", | 141 | PREALLOC_NORMAL("AvfsDmaMem", 0x00000000, 0x007c2000-1, |
| 260 | .start = 0x00000000, | 142 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 261 | /* (945K * 8) = (128K * 3) 5 playbacks / 3 server */ | 143 | /* 4KiB */ |
| 262 | .end = 0x007c2000 - 1, | 144 | PREALLOC_NORMAL("AvfsFileSys", 0x00000000, 0x00001000-1, |
| 263 | .flags = IORESOURCE_MEM, | 145 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 264 | }, | 146 | |
| 265 | { | ||
| 266 | .name = "AvfsFileSys", | ||
| 267 | .start = 0x00000000, | ||
| 268 | .end = 0x00001000 - 1, /* 4K */ | ||
| 269 | .flags = IORESOURCE_MEM, | ||
| 270 | }, | ||
| 271 | /* | 147 | /* |
| 272 | * | ||
| 273 | * PMEM | 148 | * PMEM |
| 274 | * | ||
| 275 | * This driver requires: | ||
| 276 | * | ||
| 277 | * Arbitrary Based Buffers: | ||
| 278 | * Persistent memory for diagnostics. | ||
| 279 | * | ||
| 280 | */ | 149 | */ |
| 281 | { | 150 | /* Persistent memory for diagnostics (64KiB) */ |
| 282 | .name = "DiagPersistentMemory", | 151 | PREALLOC_PMEM("DiagPersistentMemory", 0x00000000, 0x10000-1, |
| 283 | .start = 0x00000000, | 152 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 284 | .end = 0x10000 - 1, | 153 | |
| 285 | .flags = IORESOURCE_MEM, | ||
| 286 | }, | ||
| 287 | /* | 154 | /* |
| 288 | * | ||
| 289 | * Smartcard | 155 | * Smartcard |
| 156 | */ | ||
| 157 | /* Read and write buffers for Internal/External cards (10KiB) */ | ||
| 158 | PREALLOC_NORMAL("SmartCardInfo", 0x00000000, 0x2800-1, | ||
| 159 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) | ||
| 160 | |||
| 161 | /* | ||
| 162 | * TFTPBuffer | ||
| 290 | * | 163 | * |
| 291 | * This driver requires: | 164 | * This buffer is used in some minimal configurations (e.g. two-way |
| 292 | * | 165 | * loader) for storing software images |
| 293 | * Arbitrary Based Buffers: | ||
| 294 | * Read and write buffers for Internal/External cards | ||
| 295 | * | ||
| 296 | */ | 166 | */ |
| 297 | { | 167 | PREALLOC_TFTP("TFTPBuffer", 0x00000000, MEBIBYTE(80)-1, |
| 298 | .name = "SmartCardInfo", | 168 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 299 | .start = 0x00000000, | 169 | |
| 300 | .end = 0x2800 - 1, | ||
| 301 | .flags = IORESOURCE_MEM, | ||
| 302 | }, | ||
| 303 | /* | 170 | /* |
| 304 | * Add other resources here | 171 | * Add other resources here |
| 305 | */ | 172 | */ |
| 306 | { }, | 173 | |
| 174 | /* | ||
| 175 | * End of Resource marker | ||
| 176 | */ | ||
| 177 | { | ||
| 178 | .flags = 0, | ||
| 179 | }, | ||
| 307 | }; | 180 | }; |
| 308 | 181 | ||
| 309 | /* | 182 | /* |
| @@ -314,146 +187,118 @@ struct resource non_dvr_zeus_resources[] __initdata = | |||
| 314 | /* | 187 | /* |
| 315 | * VIDEO1 / LX1 | 188 | * VIDEO1 / LX1 |
| 316 | */ | 189 | */ |
| 317 | { | 190 | /* Delta-Mu 1 image (2MiB) */ |
| 318 | .name = "ST231aImage", /* Delta-Mu 1 image and ram */ | 191 | PREALLOC_NORMAL("ST231aImage", 0x20000000, 0x20200000-1, |
| 319 | .start = 0x20000000, | 192 | IORESOURCE_MEM) |
| 320 | .end = 0x201FFFFF, /* 2MiB */ | 193 | /* Delta-Mu 1 monitor (8KiB) */ |
| 321 | .flags = IORESOURCE_IO, | 194 | PREALLOC_NORMAL("ST231aMonitor", 0x20200000, 0x20202000-1, |
| 322 | }, | 195 | IORESOURCE_MEM) |
| 323 | { | 196 | /* Delta-Mu 1 RAM (~29.9MiB (32MiB - (2MiB + 8KiB))) */ |
| 324 | .name = "ST231aMonitor", /* 8KiB block ST231a monitor */ | 197 | PREALLOC_NORMAL("MediaMemory1", 0x20202000, 0x22000000-1, |
| 325 | .start = 0x20200000, | 198 | IORESOURCE_MEM) |
| 326 | .end = 0x20201FFF, | 199 | |
| 327 | .flags = IORESOURCE_IO, | ||
| 328 | }, | ||
| 329 | { | ||
| 330 | .name = "MediaMemory1", | ||
| 331 | .start = 0x20202000, | ||
| 332 | .end = 0x21FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */ | ||
| 333 | .flags = IORESOURCE_IO, | ||
| 334 | }, | ||
| 335 | /* | 200 | /* |
| 336 | * Sysaudio Driver | 201 | * Sysaudio Driver |
| 337 | */ | 202 | */ |
| 338 | { | 203 | /* DSP code and data images (1MiB) */ |
| 339 | .name = "DSP_Image_Buff", | 204 | PREALLOC_NORMAL("DSP_Image_Buff", 0x00000000, 0x00100000-1, |
| 340 | .start = 0x00000000, | 205 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 341 | .end = 0x000FFFFF, | 206 | /* ADSC CPU PCM buffer (40KiB) */ |
| 342 | .flags = IORESOURCE_MEM, | 207 | PREALLOC_NORMAL("ADSC_CPU_PCM_Buff", 0x00000000, 0x0000A000-1, |
| 343 | }, | 208 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 344 | { | 209 | /* ADSC AUX buffer (16KiB) */ |
| 345 | .name = "ADSC_CPU_PCM_Buff", | 210 | PREALLOC_NORMAL("ADSC_AUX_Buff", 0x00000000, 0x00004000-1, |
| 346 | .start = 0x00000000, | 211 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 347 | .end = 0x00009FFF, | 212 | /* ADSC Main buffer (16KiB) */ |
| 348 | .flags = IORESOURCE_MEM, | 213 | PREALLOC_NORMAL("ADSC_Main_Buff", 0x00000000, 0x00004000-1, |
| 349 | }, | 214 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 350 | { | 215 | |
| 351 | .name = "ADSC_AUX_Buff", | ||
| 352 | .start = 0x00000000, | ||
| 353 | .end = 0x00003FFF, | ||
| 354 | .flags = IORESOURCE_MEM, | ||
| 355 | }, | ||
| 356 | { | ||
| 357 | .name = "ADSC_Main_Buff", | ||
| 358 | .start = 0x00000000, | ||
| 359 | .end = 0x00003FFF, | ||
| 360 | .flags = IORESOURCE_MEM, | ||
| 361 | }, | ||
| 362 | /* | 216 | /* |
| 363 | * STAVEM driver/STAPI | 217 | * STAVEM driver/STAPI |
| 364 | */ | 218 | */ |
| 365 | { | 219 | /* 6MiB */ |
| 366 | .name = "AVMEMPartition0", | 220 | PREALLOC_NORMAL("AVMEMPartition0", 0x00000000, 0x00600000-1, |
| 367 | .start = 0x00000000, | 221 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 368 | .end = 0x00600000 - 1, /* 6 MB total */ | 222 | |
| 369 | .flags = IORESOURCE_MEM, | ||
| 370 | }, | ||
| 371 | /* | 223 | /* |
| 372 | * DOCSIS Subsystem | 224 | * DOCSIS Subsystem |
| 373 | */ | 225 | */ |
| 374 | { | 226 | /* 7MiB */ |
| 375 | .name = "Docsis", | 227 | PREALLOC_DOCSIS("Docsis", 0x40100000, 0x40800000-1, IORESOURCE_MEM) |
| 376 | .start = 0x40100000, | 228 | |
| 377 | .end = 0x407fffff, | ||
| 378 | .flags = IORESOURCE_MEM, | ||
| 379 | }, | ||
| 380 | /* | 229 | /* |
| 381 | * GHW HAL Driver | 230 | * GHW HAL Driver |
| 382 | */ | 231 | */ |
| 383 | { | 232 | /* PowerTV Graphics Heap (14MiB) */ |
| 384 | .name = "GraphicsHeap", | 233 | PREALLOC_NORMAL("GraphicsHeap", 0x46900000, 0x47700000-1, |
| 385 | .start = 0x46900000, | 234 | IORESOURCE_MEM) |
| 386 | .end = 0x47700000 - 1, /* 14 MB total */ | 235 | |
| 387 | .flags = IORESOURCE_MEM, | ||
| 388 | }, | ||
| 389 | /* | 236 | /* |
| 390 | * multi com buffer area | 237 | * multi com buffer area |
| 391 | */ | 238 | */ |
| 392 | { | 239 | /* 128KiB */ |
| 393 | .name = "MulticomSHM", | 240 | PREALLOC_NORMAL("MulticomSHM", 0x47900000, 0x47920000-1, |
| 394 | .start = 0x47900000, | 241 | IORESOURCE_MEM) |
| 395 | .end = 0x47920000 - 1, | 242 | |
| 396 | .flags = IORESOURCE_MEM, | ||
| 397 | }, | ||
| 398 | /* | 243 | /* |
| 399 | * DMA Ring buffer | 244 | * DMA Ring buffer |
| 400 | */ | 245 | */ |
| 401 | { | 246 | /* 2.5MiB */ |
| 402 | .name = "BMM_Buffer", | 247 | PREALLOC_NORMAL("BMM_Buffer", 0x00000000, 0x00280000-1, |
| 403 | .start = 0x00000000, | 248 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 404 | .end = 0x00280000 - 1, | 249 | |
| 405 | .flags = IORESOURCE_MEM, | ||
| 406 | }, | ||
| 407 | /* | 250 | /* |
| 408 | * Display bins buffer for unit0 | 251 | * Display bins buffer for unit0 |
| 409 | */ | 252 | */ |
| 410 | { | 253 | /* 4KiB */ |
| 411 | .name = "DisplayBins0", | 254 | PREALLOC_NORMAL("DisplayBins0", 0x00000000, 0x00001000-1, |
| 412 | .start = 0x00000000, | 255 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 413 | .end = 0x00000FFF, /* 4 KB total */ | 256 | |
| 414 | .flags = IORESOURCE_MEM, | ||
| 415 | }, | ||
| 416 | /* | 257 | /* |
| 417 | * | ||
| 418 | * AVFS: player HAL memory | 258 | * AVFS: player HAL memory |
| 419 | * | ||
| 420 | * | ||
| 421 | */ | 259 | */ |
| 422 | { | 260 | /* 945K * 3 for playback */ |
| 423 | .name = "AvfsDmaMem", | 261 | PREALLOC_NORMAL("AvfsDmaMem", 0x00000000, 0x002c4c00-1, |
| 424 | .start = 0x00000000, | 262 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 425 | .end = 0x002c4c00 - 1, /* 945K * 3 for playback */ | 263 | |
| 426 | .flags = IORESOURCE_MEM, | ||
| 427 | }, | ||
| 428 | /* | 264 | /* |
| 429 | * PMEM | 265 | * PMEM |
| 430 | */ | 266 | */ |
| 431 | { | 267 | /* Persistent memory for diagnostics (64KiB) */ |
| 432 | .name = "DiagPersistentMemory", | 268 | PREALLOC_PMEM("DiagPersistentMemory", 0x00000000, 0x10000-1, |
| 433 | .start = 0x00000000, | 269 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 434 | .end = 0x10000 - 1, | 270 | |
| 435 | .flags = IORESOURCE_MEM, | ||
| 436 | }, | ||
| 437 | /* | 271 | /* |
| 438 | * Smartcard | 272 | * Smartcard |
| 439 | */ | 273 | */ |
| 440 | { | 274 | /* Read and write buffers for Internal/External cards (10KiB) */ |
| 441 | .name = "SmartCardInfo", | 275 | PREALLOC_NORMAL("SmartCardInfo", 0x00000000, 0x2800-1, |
| 442 | .start = 0x00000000, | 276 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) |
| 443 | .end = 0x2800 - 1, | 277 | |
| 444 | .flags = IORESOURCE_MEM, | ||
| 445 | }, | ||
| 446 | /* | 278 | /* |
| 447 | * NAND Flash | 279 | * NAND Flash |
| 448 | */ | 280 | */ |
| 449 | { | 281 | /* 10KiB */ |
| 450 | .name = "NandFlash", | 282 | PREALLOC_NORMAL("NandFlash", NAND_FLASH_BASE, NAND_FLASH_BASE+0x400-1, |
| 451 | .start = NAND_FLASH_BASE, | 283 | IORESOURCE_MEM) |
| 452 | .end = NAND_FLASH_BASE + 0x400 - 1, | 284 | |
| 453 | .flags = IORESOURCE_IO, | 285 | /* |
| 454 | }, | 286 | * TFTPBuffer |
| 287 | * | ||
| 288 | * This buffer is used in some minimal configurations (e.g. two-way | ||
| 289 | * loader) for storing software images | ||
| 290 | */ | ||
| 291 | PREALLOC_TFTP("TFTPBuffer", 0x00000000, MEBIBYTE(80)-1, | ||
| 292 | (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) | ||
| 293 | |||
| 455 | /* | 294 | /* |
| 456 | * Add other resources here | 295 | * Add other resources here |
| 457 | */ | 296 | */ |
| 458 | { }, | 297 | |
| 298 | /* | ||
| 299 | * End of Resource marker | ||
| 300 | */ | ||
| 301 | { | ||
| 302 | .flags = 0, | ||
| 303 | }, | ||
| 459 | }; | 304 | }; |
diff --git a/arch/mips/powertv/asic/prealloc.h b/arch/mips/powertv/asic/prealloc.h new file mode 100644 index 000000000000..8e682df17856 --- /dev/null +++ b/arch/mips/powertv/asic/prealloc.h | |||
| @@ -0,0 +1,70 @@ | |||
| 1 | /* | ||
| 2 | * Definitions for memory preallocations | ||
| 3 | * | ||
| 4 | * Copyright (C) 2005-2009 Scientific-Atlanta, Inc. | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License as published by | ||
| 8 | * the Free Software Foundation; either version 2 of the License, or | ||
| 9 | * (at your option) any later version. | ||
| 10 | * | ||
| 11 | * This program is distributed in the hope that it will be useful, | ||
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 14 | * GNU General Public License for more details. | ||
| 15 | * | ||
| 16 | * You should have received a copy of the GNU General Public License | ||
| 17 | * along with this program; if not, write to the Free Software | ||
| 18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
| 19 | */ | ||
| 20 | |||
| 21 | #ifndef _ARCH_MIPS_POWERTV_ASIC_PREALLOC_H | ||
| 22 | #define _ARCH_MIPS_POWERTV_ASIC_PREALLOC_H | ||
| 23 | |||
| 24 | #define KIBIBYTE(n) ((n) * 1024) /* Number of kibibytes */ | ||
| 25 | #define MEBIBYTE(n) ((n) * KIBIBYTE(1024)) /* Number of mebibytes */ | ||
| 26 | |||
| 27 | /* "struct resource" array element definition */ | ||
| 28 | #define PREALLOC(NAME, START, END, FLAGS) { \ | ||
| 29 | .name = (NAME), \ | ||
| 30 | .start = (START), \ | ||
| 31 | .end = (END), \ | ||
| 32 | .flags = (FLAGS) \ | ||
| 33 | }, | ||
| 34 | |||
| 35 | /* Individual resources in the preallocated resource arrays are defined using | ||
| 36 | * macros. These macros are conditionally defined based on their | ||
| 37 | * corresponding kernel configuration flag: | ||
| 38 | * - CONFIG_PREALLOC_NORMAL: preallocate resources for a normal settop box | ||
| 39 | * - CONFIG_PREALLOC_TFTP: preallocate the TFTP download resource | ||
| 40 | * - CONFIG_PREALLOC_DOCSIS: preallocate the DOCSIS resource | ||
| 41 | * - CONFIG_PREALLOC_PMEM: reserve space for persistent memory | ||
| 42 | */ | ||
| 43 | #ifdef CONFIG_PREALLOC_NORMAL | ||
| 44 | #define PREALLOC_NORMAL(name, start, end, flags) \ | ||
| 45 | PREALLOC(name, start, end, flags) | ||
| 46 | #else | ||
| 47 | #define PREALLOC_NORMAL(name, start, end, flags) | ||
| 48 | #endif | ||
| 49 | |||
| 50 | #ifdef CONFIG_PREALLOC_TFTP | ||
| 51 | #define PREALLOC_TFTP(name, start, end, flags) \ | ||
| 52 | PREALLOC(name, start, end, flags) | ||
| 53 | #else | ||
| 54 | #define PREALLOC_TFTP(name, start, end, flags) | ||
| 55 | #endif | ||
| 56 | |||
| 57 | #ifdef CONFIG_PREALLOC_DOCSIS | ||
| 58 | #define PREALLOC_DOCSIS(name, start, end, flags) \ | ||
| 59 | PREALLOC(name, start, end, flags) | ||
| 60 | #else | ||
| 61 | #define PREALLOC_DOCSIS(name, start, end, flags) | ||
| 62 | #endif | ||
| 63 | |||
| 64 | #ifdef CONFIG_PREALLOC_PMEM | ||
| 65 | #define PREALLOC_PMEM(name, start, end, flags) \ | ||
| 66 | PREALLOC(name, start, end, flags) | ||
| 67 | #else | ||
| 68 | #define PREALLOC_PMEM(name, start, end, flags) | ||
| 69 | #endif | ||
| 70 | #endif | ||
diff --git a/arch/mn10300/include/asm/atomic.h b/arch/mn10300/include/asm/atomic.h index e41222d6c2fd..f0cc1f84a72f 100644 --- a/arch/mn10300/include/asm/atomic.h +++ b/arch/mn10300/include/asm/atomic.h | |||
| @@ -1,157 +1 @@ | |||
| 1 | /* MN10300 Atomic counter operations | #include <asm-generic/atomic.h> | |
| 2 | * | ||
| 3 | * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved. | ||
| 4 | * Written by David Howells (dhowells@redhat.com) | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or | ||
| 7 | * modify it under the terms of the GNU General Public Licence | ||
| 8 | * as published by the Free Software Foundation; either version | ||
| 9 | * 2 of the Licence, or (at your option) any later version. | ||
| 10 | */ | ||
| 11 | #ifndef _ASM_ATOMIC_H | ||
| 12 | #define _ASM_ATOMIC_H | ||
| 13 | |||
| 14 | #ifdef CONFIG_SMP | ||
| 15 | #error not SMP safe | ||
| 16 | #endif | ||
| 17 | |||
| 18 | /* | ||
| 19 | * Atomic operations that C can't guarantee us. Useful for | ||
| 20 | * resource counting etc.. | ||
| 21 | */ | ||
| 22 | |||
| 23 | #define ATOMIC_INIT(i) { (i) } | ||
| 24 | |||
| 25 | #ifdef __KERNEL__ | ||
| 26 | |||
| 27 | /** | ||
| 28 | * atomic_read - read atomic variable | ||
| 29 | * @v: pointer of type atomic_t | ||
| 30 | * | ||
| 31 | * Atomically reads the value of @v. Note that the guaranteed | ||
| 32 | * useful range of an atomic_t is only 24 bits. | ||
| 33 | */ | ||
| 34 | #define atomic_read(v) (*(volatile int *)&(v)->counter) | ||
| 35 | |||
| 36 | /** | ||
| 37 | * atomic_set - set atomic variable | ||
| 38 | * @v: pointer of type atomic_t | ||
| 39 | * @i: required value | ||
| 40 | * | ||
| 41 | * Atomically sets the value of @v to @i. Note that the guaranteed | ||
| 42 | * useful range of an atomic_t is only 24 bits. | ||
| 43 | */ | ||
| 44 | #define atomic_set(v, i) (((v)->counter) = (i)) | ||
| 45 | |||
| 46 | #include <asm/system.h> | ||
| 47 | |||
| 48 | /** | ||
| 49 | * atomic_add_return - add integer to atomic variable | ||
| 50 | * @i: integer value to add | ||
| 51 | * @v: pointer of type atomic_t | ||
| 52 | * | ||
| 53 | * Atomically adds @i to @v and returns the result | ||
| 54 | * Note that the guaranteed useful range of an atomic_t is only 24 bits. | ||
| 55 | */ | ||
| 56 | static inline int atomic_add_return(int i, atomic_t *v) | ||
| 57 | { | ||
| 58 | unsigned long flags; | ||
| 59 | int temp; | ||
| 60 | |||
| 61 | local_irq_save(flags); | ||
| 62 | temp = v->counter; | ||
| 63 | temp += i; | ||
| 64 | v->counter = temp; | ||
| 65 | local_irq_restore(flags); | ||
| 66 | |||
| 67 | return temp; | ||
| 68 | } | ||
| 69 | |||
| 70 | /** | ||
| 71 | * atomic_sub_return - subtract integer from atomic variable | ||
| 72 | * @i: integer value to subtract | ||
| 73 | * @v: pointer of type atomic_t | ||
| 74 | * | ||
| 75 | * Atomically subtracts @i from @v and returns the result | ||
| 76 | * Note that the guaranteed useful range of an atomic_t is only 24 bits. | ||
| 77 | */ | ||
| 78 | static inline int atomic_sub_return(int i, atomic_t *v) | ||
| 79 | { | ||
| 80 | unsigned long flags; | ||
| 81 | int temp; | ||
| 82 | |||
| 83 | local_irq_save(flags); | ||
| 84 | temp = v->counter; | ||
| 85 | temp -= i; | ||
| 86 | v->counter = temp; | ||
| 87 | local_irq_restore(flags); | ||
| 88 | |||
| 89 | return temp; | ||
| 90 | } | ||
| 91 | |||
| 92 | static inline int atomic_add_negative(int i, atomic_t *v) | ||
| 93 | { | ||
| 94 | return atomic_add_return(i, v) < 0; | ||
| 95 | } | ||
| 96 | |||
| 97 | static inline void atomic_add(int i, atomic_t *v) | ||
| 98 | { | ||
| 99 | atomic_add_return(i, v); | ||
| 100 | } | ||
| 101 | |||
| 102 | static inline void atomic_sub(int i, atomic_t *v) | ||
| 103 | { | ||
| 104 | atomic_sub_return(i, v); | ||
| 105 | } | ||
| 106 | |||
| 107 | static inline void atomic_inc(atomic_t *v) | ||
| 108 | { | ||
| 109 | atomic_add_return(1, v); | ||
| 110 | } | ||
| 111 | |||
| 112 | static inline void atomic_dec(atomic_t *v) | ||
| 113 | { | ||
| 114 | atomic_sub_return(1, v); | ||
| 115 | } | ||
| 116 | |||
| 117 | #define atomic_dec_return(v) atomic_sub_return(1, (v)) | ||
| 118 | #define atomic_inc_return(v) atomic_add_return(1, (v)) | ||
| 119 | |||
| 120 | #define atomic_sub_and_test(i, v) (atomic_sub_return((i), (v)) == 0) | ||
| 121 | #define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0) | ||
| 122 | #define atomic_inc_and_test(v) (atomic_add_return(1, (v)) == 0) | ||
| 123 | |||
| 124 | #define atomic_add_unless(v, a, u) \ | ||
| 125 | ({ \ | ||
| 126 | int c, old; \ | ||
| 127 | c = atomic_read(v); \ | ||
| 128 | while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \ | ||
| 129 | c = old; \ | ||
| 130 | c != (u); \ | ||
| 131 | }) | ||
| 132 | |||
| 133 | #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) | ||
| 134 | |||
| 135 | static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr) | ||
| 136 | { | ||
| 137 | unsigned long flags; | ||
| 138 | |||
| 139 | mask = ~mask; | ||
| 140 | local_irq_save(flags); | ||
| 141 | *addr &= mask; | ||
| 142 | local_irq_restore(flags); | ||
| 143 | } | ||
| 144 | |||
| 145 | #define atomic_xchg(ptr, v) (xchg(&(ptr)->counter, (v))) | ||
| 146 | #define atomic_cmpxchg(v, old, new) (cmpxchg(&((v)->counter), (old), (new))) | ||
| 147 | |||
| 148 | /* Atomic operations are already serializing on MN10300??? */ | ||
| 149 | #define smp_mb__before_atomic_dec() barrier() | ||
| 150 | #define smp_mb__after_atomic_dec() barrier() | ||
| 151 | #define smp_mb__before_atomic_inc() barrier() | ||
| 152 | #define smp_mb__after_atomic_inc() barrier() | ||
| 153 | |||
| 154 | #include <asm-generic/atomic-long.h> | ||
| 155 | |||
| 156 | #endif /* __KERNEL__ */ | ||
| 157 | #endif /* _ASM_ATOMIC_H */ | ||
diff --git a/arch/mn10300/include/asm/cache.h b/arch/mn10300/include/asm/cache.h index e03cfa2e997e..6e2fe28dde4e 100644 --- a/arch/mn10300/include/asm/cache.h +++ b/arch/mn10300/include/asm/cache.h | |||
| @@ -21,6 +21,8 @@ | |||
| 21 | #define L1_CACHE_DISPARITY L1_CACHE_NENTRIES * L1_CACHE_BYTES | 21 | #define L1_CACHE_DISPARITY L1_CACHE_NENTRIES * L1_CACHE_BYTES |
| 22 | #endif | 22 | #endif |
| 23 | 23 | ||
| 24 | #define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES | ||
| 25 | |||
| 24 | /* data cache purge registers | 26 | /* data cache purge registers |
| 25 | * - read from the register to unconditionally purge that cache line | 27 | * - read from the register to unconditionally purge that cache line |
| 26 | * - write address & 0xffffff00 to conditionally purge that cache line | 28 | * - write address & 0xffffff00 to conditionally purge that cache line |
diff --git a/arch/mn10300/include/asm/scatterlist.h b/arch/mn10300/include/asm/scatterlist.h index 67535901b9ff..7bd00b9e030d 100644 --- a/arch/mn10300/include/asm/scatterlist.h +++ b/arch/mn10300/include/asm/scatterlist.h | |||
| @@ -11,45 +11,8 @@ | |||
| 11 | #ifndef _ASM_SCATTERLIST_H | 11 | #ifndef _ASM_SCATTERLIST_H |
| 12 | #define _ASM_SCATTERLIST_H | 12 | #define _ASM_SCATTERLIST_H |
| 13 | 13 | ||
| 14 | #include <asm/types.h> | 14 | #include <asm-generic/scatterlist.h> |
| 15 | |||
| 16 | /* | ||
| 17 | * Drivers must set either ->address or (preferred) page and ->offset | ||
| 18 | * to indicate where data must be transferred to/from. | ||
| 19 | * | ||
| 20 | * Using page is recommended since it handles highmem data as well as | ||
| 21 | * low mem. ->address is restricted to data which has a virtual mapping, and | ||
| 22 | * it will go away in the future. Updating to page can be automated very | ||
| 23 | * easily -- something like | ||
| 24 | * | ||
| 25 | * sg->address = some_ptr; | ||
| 26 | * | ||
| 27 | * can be rewritten as | ||
| 28 | * | ||
| 29 | * sg_set_page(virt_to_page(some_ptr)); | ||
| 30 | * sg->offset = (unsigned long) some_ptr & ~PAGE_MASK; | ||
| 31 | * | ||
| 32 | * and that's it. There's no excuse for not highmem enabling YOUR driver. /jens | ||
| 33 | */ | ||
| 34 | struct scatterlist { | ||
| 35 | #ifdef CONFIG_DEBUG_SG | ||
| 36 | unsigned long sg_magic; | ||
| 37 | #endif | ||
| 38 | unsigned long page_link; | ||
| 39 | unsigned int offset; /* for highmem, page offset */ | ||
| 40 | dma_addr_t dma_address; | ||
| 41 | unsigned int length; | ||
| 42 | }; | ||
| 43 | 15 | ||
| 44 | #define ISA_DMA_THRESHOLD (0x00ffffff) | 16 | #define ISA_DMA_THRESHOLD (0x00ffffff) |
| 45 | 17 | ||
| 46 | /* | ||
| 47 | * These macros should be used after a pci_map_sg call has been done | ||
| 48 | * to get bus addresses of each of the SG entries and their lengths. | ||
| 49 | * You should only work with the number of sg entries pci_map_sg | ||
| 50 | * returns. | ||
| 51 | */ | ||
| 52 | #define sg_dma_address(sg) ((sg)->dma_address) | ||
| 53 | #define sg_dma_len(sg) ((sg)->length) | ||
| 54 | |||
| 55 | #endif /* _ASM_SCATTERLIST_H */ | 18 | #endif /* _ASM_SCATTERLIST_H */ |
diff --git a/arch/mn10300/mm/fault.c b/arch/mn10300/mm/fault.c index 53bb17d0f068..81f153fa51b4 100644 --- a/arch/mn10300/mm/fault.c +++ b/arch/mn10300/mm/fault.c | |||
| @@ -338,11 +338,10 @@ no_context: | |||
| 338 | */ | 338 | */ |
| 339 | out_of_memory: | 339 | out_of_memory: |
| 340 | up_read(&mm->mmap_sem); | 340 | up_read(&mm->mmap_sem); |
| 341 | monitor_signal(regs); | 341 | if ((fault_code & MMUFCR_xFC_ACCESS) != MMUFCR_xFC_ACCESS_USR) |
| 342 | printk(KERN_ALERT "VM: killing process %s\n", tsk->comm); | 342 | goto no_context; |
| 343 | if ((fault_code & MMUFCR_xFC_ACCESS) == MMUFCR_xFC_ACCESS_USR) | 343 | pagefault_out_of_memory(); |
| 344 | do_exit(SIGKILL); | 344 | return; |
| 345 | goto no_context; | ||
| 346 | 345 | ||
| 347 | do_sigbus: | 346 | do_sigbus: |
| 348 | up_read(&mm->mmap_sem); | 347 | up_read(&mm->mmap_sem); |
diff --git a/arch/mn10300/unit-asb2305/pci-asb2305.c b/arch/mn10300/unit-asb2305/pci-asb2305.c index d6119b879a98..45b40ac6c464 100644 --- a/arch/mn10300/unit-asb2305/pci-asb2305.c +++ b/arch/mn10300/unit-asb2305/pci-asb2305.c | |||
| @@ -117,6 +117,7 @@ static void __init pcibios_allocate_bus_resources(struct list_head *bus_list) | |||
| 117 | * Invalidate the resource to prevent | 117 | * Invalidate the resource to prevent |
| 118 | * child resource allocations in this | 118 | * child resource allocations in this |
| 119 | * range. */ | 119 | * range. */ |
| 120 | r->start = r->end = 0; | ||
| 120 | r->flags = 0; | 121 | r->flags = 0; |
| 121 | } | 122 | } |
| 122 | } | 123 | } |
diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig index 9c4da3d63bfb..05a366a5c4d5 100644 --- a/arch/parisc/Kconfig +++ b/arch/parisc/Kconfig | |||
| @@ -98,6 +98,9 @@ config STACKTRACE_SUPPORT | |||
| 98 | config NEED_DMA_MAP_STATE | 98 | config NEED_DMA_MAP_STATE |
| 99 | def_bool y | 99 | def_bool y |
| 100 | 100 | ||
| 101 | config NEED_SG_DMA_LENGTH | ||
| 102 | def_bool y | ||
| 103 | |||
| 101 | config ISA_DMA_API | 104 | config ISA_DMA_API |
| 102 | bool | 105 | bool |
| 103 | 106 | ||
diff --git a/arch/parisc/include/asm/bug.h b/arch/parisc/include/asm/bug.h index 75e46c557a16..72cfdb0cfdd1 100644 --- a/arch/parisc/include/asm/bug.h +++ b/arch/parisc/include/asm/bug.h | |||
| @@ -44,7 +44,7 @@ | |||
| 44 | #endif | 44 | #endif |
| 45 | 45 | ||
| 46 | #ifdef CONFIG_DEBUG_BUGVERBOSE | 46 | #ifdef CONFIG_DEBUG_BUGVERBOSE |
| 47 | #define __WARN() \ | 47 | #define __WARN_TAINT(taint) \ |
| 48 | do { \ | 48 | do { \ |
| 49 | asm volatile("\n" \ | 49 | asm volatile("\n" \ |
| 50 | "1:\t" PARISC_BUG_BREAK_ASM "\n" \ | 50 | "1:\t" PARISC_BUG_BREAK_ASM "\n" \ |
| @@ -54,11 +54,11 @@ | |||
| 54 | "\t.org 2b+%c3\n" \ | 54 | "\t.org 2b+%c3\n" \ |
| 55 | "\t.popsection" \ | 55 | "\t.popsection" \ |
| 56 | : : "i" (__FILE__), "i" (__LINE__), \ | 56 | : : "i" (__FILE__), "i" (__LINE__), \ |
| 57 | "i" (BUGFLAG_WARNING), \ | 57 | "i" (BUGFLAG_TAINT(taint)), \ |
| 58 | "i" (sizeof(struct bug_entry)) ); \ | 58 | "i" (sizeof(struct bug_entry)) ); \ |
| 59 | } while(0) | 59 | } while(0) |
| 60 | #else | 60 | #else |
| 61 | #define __WARN() \ | 61 | #define __WARN_TAINT(taint) \ |
| 62 | do { \ | 62 | do { \ |
| 63 | asm volatile("\n" \ | 63 | asm volatile("\n" \ |
| 64 | "1:\t" PARISC_BUG_BREAK_ASM "\n" \ | 64 | "1:\t" PARISC_BUG_BREAK_ASM "\n" \ |
| @@ -67,7 +67,7 @@ | |||
| 67 | "\t.short %c0\n" \ | 67 | "\t.short %c0\n" \ |
| 68 | "\t.org 2b+%c1\n" \ | 68 | "\t.org 2b+%c1\n" \ |
| 69 | "\t.popsection" \ | 69 | "\t.popsection" \ |
| 70 | : : "i" (BUGFLAG_WARNING), \ | 70 | : : "i" (BUGFLAG_TAINT(taint)), \ |
| 71 | "i" (sizeof(struct bug_entry)) ); \ | 71 | "i" (sizeof(struct bug_entry)) ); \ |
| 72 | } while(0) | 72 | } while(0) |
| 73 | #endif | 73 | #endif |
diff --git a/arch/parisc/include/asm/cache.h b/arch/parisc/include/asm/cache.h index 32c2cca74345..45effe6978fa 100644 --- a/arch/parisc/include/asm/cache.h +++ b/arch/parisc/include/asm/cache.h | |||
| @@ -28,7 +28,7 @@ | |||
| 28 | 28 | ||
| 29 | #define SMP_CACHE_BYTES L1_CACHE_BYTES | 29 | #define SMP_CACHE_BYTES L1_CACHE_BYTES |
| 30 | 30 | ||
| 31 | #define __read_mostly __attribute__((__section__(".data.read_mostly"))) | 31 | #define __read_mostly __attribute__((__section__(".data..read_mostly"))) |
| 32 | 32 | ||
| 33 | void parisc_cache_init(void); /* initializes cache-flushing */ | 33 | void parisc_cache_init(void); /* initializes cache-flushing */ |
| 34 | void disable_sr_hashing_asm(int); /* low level support for above */ | 34 | void disable_sr_hashing_asm(int); /* low level support for above */ |
diff --git a/arch/parisc/include/asm/cacheflush.h b/arch/parisc/include/asm/cacheflush.h index 477277739da5..4556d820128a 100644 --- a/arch/parisc/include/asm/cacheflush.h +++ b/arch/parisc/include/asm/cacheflush.h | |||
| @@ -2,6 +2,7 @@ | |||
| 2 | #define _PARISC_CACHEFLUSH_H | 2 | #define _PARISC_CACHEFLUSH_H |
| 3 | 3 | ||
| 4 | #include <linux/mm.h> | 4 | #include <linux/mm.h> |
| 5 | #include <linux/uaccess.h> | ||
| 5 | 6 | ||
| 6 | /* The usual comment is "Caches aren't brain-dead on the <architecture>". | 7 | /* The usual comment is "Caches aren't brain-dead on the <architecture>". |
| 7 | * Unfortunately, that doesn't apply to PA-RISC. */ | 8 | * Unfortunately, that doesn't apply to PA-RISC. */ |
| @@ -125,11 +126,20 @@ static inline void *kmap(struct page *page) | |||
| 125 | 126 | ||
| 126 | #define kunmap(page) kunmap_parisc(page_address(page)) | 127 | #define kunmap(page) kunmap_parisc(page_address(page)) |
| 127 | 128 | ||
| 128 | #define kmap_atomic(page, idx) page_address(page) | 129 | static inline void *kmap_atomic(struct page *page, enum km_type idx) |
| 130 | { | ||
| 131 | pagefault_disable(); | ||
| 132 | return page_address(page); | ||
| 133 | } | ||
| 129 | 134 | ||
| 130 | #define kunmap_atomic(addr, idx) kunmap_parisc(addr) | 135 | static inline void kunmap_atomic(void *addr, enum km_type idx) |
| 136 | { | ||
| 137 | kunmap_parisc(addr); | ||
| 138 | pagefault_enable(); | ||
| 139 | } | ||
| 131 | 140 | ||
| 132 | #define kmap_atomic_pfn(pfn, idx) page_address(pfn_to_page(pfn)) | 141 | #define kmap_atomic_prot(page, idx, prot) kmap_atomic(page, idx) |
| 142 | #define kmap_atomic_pfn(pfn, idx) kmap_atomic(pfn_to_page(pfn), (idx)) | ||
| 133 | #define kmap_atomic_to_page(ptr) virt_to_page(ptr) | 143 | #define kmap_atomic_to_page(ptr) virt_to_page(ptr) |
| 134 | #endif | 144 | #endif |
| 135 | 145 | ||
diff --git a/arch/parisc/include/asm/scatterlist.h b/arch/parisc/include/asm/scatterlist.h index 62269b31ebf4..2c3b79b54b28 100644 --- a/arch/parisc/include/asm/scatterlist.h +++ b/arch/parisc/include/asm/scatterlist.h | |||
| @@ -3,25 +3,9 @@ | |||
| 3 | 3 | ||
| 4 | #include <asm/page.h> | 4 | #include <asm/page.h> |
| 5 | #include <asm/types.h> | 5 | #include <asm/types.h> |
| 6 | 6 | #include <asm-generic/scatterlist.h> | |
| 7 | struct scatterlist { | ||
| 8 | #ifdef CONFIG_DEBUG_SG | ||
| 9 | unsigned long sg_magic; | ||
| 10 | #endif | ||
| 11 | unsigned long page_link; | ||
| 12 | unsigned int offset; | ||
| 13 | |||
| 14 | unsigned int length; | ||
| 15 | |||
| 16 | /* an IOVA can be 64-bits on some PA-Risc platforms. */ | ||
| 17 | dma_addr_t iova; /* I/O Virtual Address */ | ||
| 18 | __u32 iova_length; /* bytes mapped */ | ||
| 19 | }; | ||
| 20 | |||
| 21 | #define sg_virt_addr(sg) ((unsigned long)sg_virt(sg)) | ||
| 22 | #define sg_dma_address(sg) ((sg)->iova) | ||
| 23 | #define sg_dma_len(sg) ((sg)->iova_length) | ||
| 24 | 7 | ||
| 25 | #define ISA_DMA_THRESHOLD (~0UL) | 8 | #define ISA_DMA_THRESHOLD (~0UL) |
| 9 | #define sg_virt_addr(sg) ((unsigned long)sg_virt(sg)) | ||
| 26 | 10 | ||
| 27 | #endif /* _ASM_PARISC_SCATTERLIST_H */ | 11 | #endif /* _ASM_PARISC_SCATTERLIST_H */ |
diff --git a/arch/parisc/include/asm/system.h b/arch/parisc/include/asm/system.h index 4653c77bf9d1..2ab4af58ecb9 100644 --- a/arch/parisc/include/asm/system.h +++ b/arch/parisc/include/asm/system.h | |||
| @@ -174,7 +174,7 @@ static inline void set_eiem(unsigned long val) | |||
| 174 | }) | 174 | }) |
| 175 | 175 | ||
| 176 | #ifdef CONFIG_SMP | 176 | #ifdef CONFIG_SMP |
| 177 | # define __lock_aligned __attribute__((__section__(".data.lock_aligned"))) | 177 | # define __lock_aligned __attribute__((__section__(".data..lock_aligned"))) |
| 178 | #endif | 178 | #endif |
| 179 | 179 | ||
| 180 | #define arch_align_stack(x) (x) | 180 | #define arch_align_stack(x) (x) |
diff --git a/arch/parisc/kernel/asm-offsets.c b/arch/parisc/kernel/asm-offsets.c index ec787b411e9a..dcd55103a4bb 100644 --- a/arch/parisc/kernel/asm-offsets.c +++ b/arch/parisc/kernel/asm-offsets.c | |||
| @@ -45,8 +45,12 @@ | |||
| 45 | #else | 45 | #else |
| 46 | #define FRAME_SIZE 64 | 46 | #define FRAME_SIZE 64 |
| 47 | #endif | 47 | #endif |
| 48 | #define FRAME_ALIGN 64 | ||
| 48 | 49 | ||
| 49 | #define align(x,y) (((x)+FRAME_SIZE+(y)-1) - (((x)+(y)-1)%(y))) | 50 | /* Add FRAME_SIZE to the size x and align it to y. All definitions |
| 51 | * that use align_frame will include space for a frame. | ||
| 52 | */ | ||
| 53 | #define align_frame(x,y) (((x)+FRAME_SIZE+(y)-1) - (((x)+(y)-1)%(y))) | ||
| 50 | 54 | ||
| 51 | int main(void) | 55 | int main(void) |
| 52 | { | 56 | { |
| @@ -146,7 +150,8 @@ int main(void) | |||
| 146 | DEFINE(TASK_PT_IOR, offsetof(struct task_struct, thread.regs.ior)); | 150 | DEFINE(TASK_PT_IOR, offsetof(struct task_struct, thread.regs.ior)); |
| 147 | BLANK(); | 151 | BLANK(); |
| 148 | DEFINE(TASK_SZ, sizeof(struct task_struct)); | 152 | DEFINE(TASK_SZ, sizeof(struct task_struct)); |
| 149 | DEFINE(TASK_SZ_ALGN, align(sizeof(struct task_struct), 64)); | 153 | /* TASK_SZ_ALGN includes space for a stack frame. */ |
| 154 | DEFINE(TASK_SZ_ALGN, align_frame(sizeof(struct task_struct), FRAME_ALIGN)); | ||
| 150 | BLANK(); | 155 | BLANK(); |
| 151 | DEFINE(PT_PSW, offsetof(struct pt_regs, gr[ 0])); | 156 | DEFINE(PT_PSW, offsetof(struct pt_regs, gr[ 0])); |
| 152 | DEFINE(PT_GR1, offsetof(struct pt_regs, gr[ 1])); | 157 | DEFINE(PT_GR1, offsetof(struct pt_regs, gr[ 1])); |
| @@ -233,7 +238,8 @@ int main(void) | |||
| 233 | DEFINE(PT_ISR, offsetof(struct pt_regs, isr)); | 238 | DEFINE(PT_ISR, offsetof(struct pt_regs, isr)); |
| 234 | DEFINE(PT_IOR, offsetof(struct pt_regs, ior)); | 239 | DEFINE(PT_IOR, offsetof(struct pt_regs, ior)); |
| 235 | DEFINE(PT_SIZE, sizeof(struct pt_regs)); | 240 | DEFINE(PT_SIZE, sizeof(struct pt_regs)); |
| 236 | DEFINE(PT_SZ_ALGN, align(sizeof(struct pt_regs), 64)); | 241 | /* PT_SZ_ALGN includes space for a stack frame. */ |
| 242 | DEFINE(PT_SZ_ALGN, align_frame(sizeof(struct pt_regs), FRAME_ALIGN)); | ||
| 237 | BLANK(); | 243 | BLANK(); |
| 238 | DEFINE(TI_TASK, offsetof(struct thread_info, task)); | 244 | DEFINE(TI_TASK, offsetof(struct thread_info, task)); |
| 239 | DEFINE(TI_EXEC_DOMAIN, offsetof(struct thread_info, exec_domain)); | 245 | DEFINE(TI_EXEC_DOMAIN, offsetof(struct thread_info, exec_domain)); |
| @@ -242,7 +248,8 @@ int main(void) | |||
| 242 | DEFINE(TI_SEGMENT, offsetof(struct thread_info, addr_limit)); | 248 | DEFINE(TI_SEGMENT, offsetof(struct thread_info, addr_limit)); |
| 243 | DEFINE(TI_PRE_COUNT, offsetof(struct thread_info, preempt_count)); | 249 | DEFINE(TI_PRE_COUNT, offsetof(struct thread_info, preempt_count)); |
| 244 | DEFINE(THREAD_SZ, sizeof(struct thread_info)); | 250 | DEFINE(THREAD_SZ, sizeof(struct thread_info)); |
| 245 | DEFINE(THREAD_SZ_ALGN, align(sizeof(struct thread_info), 64)); | 251 | /* THREAD_SZ_ALGN includes space for a stack frame. */ |
| 252 | DEFINE(THREAD_SZ_ALGN, align_frame(sizeof(struct thread_info), FRAME_ALIGN)); | ||
| 246 | BLANK(); | 253 | BLANK(); |
| 247 | DEFINE(ICACHE_BASE, offsetof(struct pdc_cache_info, ic_base)); | 254 | DEFINE(ICACHE_BASE, offsetof(struct pdc_cache_info, ic_base)); |
| 248 | DEFINE(ICACHE_STRIDE, offsetof(struct pdc_cache_info, ic_stride)); | 255 | DEFINE(ICACHE_STRIDE, offsetof(struct pdc_cache_info, ic_stride)); |
diff --git a/arch/parisc/kernel/entry.S b/arch/parisc/kernel/entry.S index 3a44f7f704fa..6337adef30f6 100644 --- a/arch/parisc/kernel/entry.S +++ b/arch/parisc/kernel/entry.S | |||
| @@ -364,32 +364,6 @@ | |||
| 364 | .align 32 | 364 | .align 32 |
| 365 | .endm | 365 | .endm |
| 366 | 366 | ||
| 367 | /* The following are simple 32 vs 64 bit instruction | ||
| 368 | * abstractions for the macros */ | ||
| 369 | .macro EXTR reg1,start,length,reg2 | ||
| 370 | #ifdef CONFIG_64BIT | ||
| 371 | extrd,u \reg1,32+(\start),\length,\reg2 | ||
| 372 | #else | ||
| 373 | extrw,u \reg1,\start,\length,\reg2 | ||
| 374 | #endif | ||
| 375 | .endm | ||
| 376 | |||
| 377 | .macro DEP reg1,start,length,reg2 | ||
| 378 | #ifdef CONFIG_64BIT | ||
| 379 | depd \reg1,32+(\start),\length,\reg2 | ||
| 380 | #else | ||
| 381 | depw \reg1,\start,\length,\reg2 | ||
| 382 | #endif | ||
| 383 | .endm | ||
| 384 | |||
| 385 | .macro DEPI val,start,length,reg | ||
| 386 | #ifdef CONFIG_64BIT | ||
| 387 | depdi \val,32+(\start),\length,\reg | ||
| 388 | #else | ||
| 389 | depwi \val,\start,\length,\reg | ||
| 390 | #endif | ||
| 391 | .endm | ||
| 392 | |||
| 393 | /* In LP64, the space contains part of the upper 32 bits of the | 367 | /* In LP64, the space contains part of the upper 32 bits of the |
| 394 | * fault. We have to extract this and place it in the va, | 368 | * fault. We have to extract this and place it in the va, |
| 395 | * zeroing the corresponding bits in the space register */ | 369 | * zeroing the corresponding bits in the space register */ |
| @@ -442,19 +416,19 @@ | |||
| 442 | */ | 416 | */ |
| 443 | .macro L2_ptep pmd,pte,index,va,fault | 417 | .macro L2_ptep pmd,pte,index,va,fault |
| 444 | #if PT_NLEVELS == 3 | 418 | #if PT_NLEVELS == 3 |
| 445 | EXTR \va,31-ASM_PMD_SHIFT,ASM_BITS_PER_PMD,\index | 419 | extru \va,31-ASM_PMD_SHIFT,ASM_BITS_PER_PMD,\index |
| 446 | #else | 420 | #else |
| 447 | EXTR \va,31-ASM_PGDIR_SHIFT,ASM_BITS_PER_PGD,\index | 421 | extru \va,31-ASM_PGDIR_SHIFT,ASM_BITS_PER_PGD,\index |
| 448 | #endif | 422 | #endif |
| 449 | DEP %r0,31,PAGE_SHIFT,\pmd /* clear offset */ | 423 | dep %r0,31,PAGE_SHIFT,\pmd /* clear offset */ |
| 450 | copy %r0,\pte | 424 | copy %r0,\pte |
| 451 | ldw,s \index(\pmd),\pmd | 425 | ldw,s \index(\pmd),\pmd |
| 452 | bb,>=,n \pmd,_PxD_PRESENT_BIT,\fault | 426 | bb,>=,n \pmd,_PxD_PRESENT_BIT,\fault |
| 453 | DEP %r0,31,PxD_FLAG_SHIFT,\pmd /* clear flags */ | 427 | dep %r0,31,PxD_FLAG_SHIFT,\pmd /* clear flags */ |
| 454 | copy \pmd,%r9 | 428 | copy \pmd,%r9 |
| 455 | SHLREG %r9,PxD_VALUE_SHIFT,\pmd | 429 | SHLREG %r9,PxD_VALUE_SHIFT,\pmd |
| 456 | EXTR \va,31-PAGE_SHIFT,ASM_BITS_PER_PTE,\index | 430 | extru \va,31-PAGE_SHIFT,ASM_BITS_PER_PTE,\index |
| 457 | DEP %r0,31,PAGE_SHIFT,\pmd /* clear offset */ | 431 | dep %r0,31,PAGE_SHIFT,\pmd /* clear offset */ |
| 458 | shladd \index,BITS_PER_PTE_ENTRY,\pmd,\pmd | 432 | shladd \index,BITS_PER_PTE_ENTRY,\pmd,\pmd |
| 459 | LDREG %r0(\pmd),\pte /* pmd is now pte */ | 433 | LDREG %r0(\pmd),\pte /* pmd is now pte */ |
| 460 | bb,>=,n \pte,_PAGE_PRESENT_BIT,\fault | 434 | bb,>=,n \pte,_PAGE_PRESENT_BIT,\fault |
| @@ -605,7 +579,7 @@ | |||
| 605 | depdi 0,31,32,\tmp | 579 | depdi 0,31,32,\tmp |
| 606 | #endif | 580 | #endif |
| 607 | copy \va,\tmp1 | 581 | copy \va,\tmp1 |
| 608 | DEPI 0,31,23,\tmp1 | 582 | depi 0,31,23,\tmp1 |
| 609 | cmpb,COND(<>),n \tmp,\tmp1,\fault | 583 | cmpb,COND(<>),n \tmp,\tmp1,\fault |
| 610 | ldi (_PAGE_DIRTY|_PAGE_WRITE|_PAGE_READ),\prot | 584 | ldi (_PAGE_DIRTY|_PAGE_WRITE|_PAGE_READ),\prot |
| 611 | depd,z \prot,8,7,\prot | 585 | depd,z \prot,8,7,\prot |
| @@ -997,13 +971,6 @@ intr_restore: | |||
| 997 | 971 | ||
| 998 | rfi | 972 | rfi |
| 999 | nop | 973 | nop |
| 1000 | nop | ||
| 1001 | nop | ||
| 1002 | nop | ||
| 1003 | nop | ||
| 1004 | nop | ||
| 1005 | nop | ||
| 1006 | nop | ||
| 1007 | 974 | ||
| 1008 | #ifndef CONFIG_PREEMPT | 975 | #ifndef CONFIG_PREEMPT |
| 1009 | # define intr_do_preempt intr_restore | 976 | # define intr_do_preempt intr_restore |
| @@ -2076,9 +2043,10 @@ syscall_restore: | |||
| 2076 | LDREG TASK_PT_GR31(%r1),%r31 /* restore syscall rp */ | 2043 | LDREG TASK_PT_GR31(%r1),%r31 /* restore syscall rp */ |
| 2077 | 2044 | ||
| 2078 | /* NOTE: We use rsm/ssm pair to make this operation atomic */ | 2045 | /* NOTE: We use rsm/ssm pair to make this operation atomic */ |
| 2046 | LDREG TASK_PT_GR30(%r1),%r1 /* Get user sp */ | ||
| 2079 | rsm PSW_SM_I, %r0 | 2047 | rsm PSW_SM_I, %r0 |
| 2080 | LDREG TASK_PT_GR30(%r1),%r30 /* restore user sp */ | 2048 | copy %r1,%r30 /* Restore user sp */ |
| 2081 | mfsp %sr3,%r1 /* Get users space id */ | 2049 | mfsp %sr3,%r1 /* Get user space id */ |
| 2082 | mtsp %r1,%sr7 /* Restore sr7 */ | 2050 | mtsp %r1,%sr7 /* Restore sr7 */ |
| 2083 | ssm PSW_SM_I, %r0 | 2051 | ssm PSW_SM_I, %r0 |
| 2084 | 2052 | ||
diff --git a/arch/parisc/kernel/head.S b/arch/parisc/kernel/head.S index 0e3d9f9b9e33..4dbdf0ed6fa0 100644 --- a/arch/parisc/kernel/head.S +++ b/arch/parisc/kernel/head.S | |||
| @@ -345,7 +345,7 @@ smp_slave_stext: | |||
| 345 | ENDPROC(stext) | 345 | ENDPROC(stext) |
| 346 | 346 | ||
| 347 | #ifndef CONFIG_64BIT | 347 | #ifndef CONFIG_64BIT |
| 348 | .section .data.read_mostly | 348 | .section .data..read_mostly |
| 349 | 349 | ||
| 350 | .align 4 | 350 | .align 4 |
| 351 | .export $global$,data | 351 | .export $global$,data |
diff --git a/arch/parisc/kernel/init_task.c b/arch/parisc/kernel/init_task.c index d020eae6525c..4a91e433416f 100644 --- a/arch/parisc/kernel/init_task.c +++ b/arch/parisc/kernel/init_task.c | |||
| @@ -53,11 +53,11 @@ union thread_union init_thread_union __init_task_data | |||
| 53 | * guarantee that global objects will be laid out in memory in the same order | 53 | * guarantee that global objects will be laid out in memory in the same order |
| 54 | * as the order of declaration, so put these in different sections and use | 54 | * as the order of declaration, so put these in different sections and use |
| 55 | * the linker script to order them. */ | 55 | * the linker script to order them. */ |
| 56 | pmd_t pmd0[PTRS_PER_PMD] __attribute__ ((__section__ (".data.vm0.pmd"), aligned(PAGE_SIZE))); | 56 | pmd_t pmd0[PTRS_PER_PMD] __attribute__ ((__section__ (".data..vm0.pmd"), aligned(PAGE_SIZE))); |
| 57 | #endif | 57 | #endif |
| 58 | 58 | ||
| 59 | pgd_t swapper_pg_dir[PTRS_PER_PGD] __attribute__ ((__section__ (".data.vm0.pgd"), aligned(PAGE_SIZE))); | 59 | pgd_t swapper_pg_dir[PTRS_PER_PGD] __attribute__ ((__section__ (".data..vm0.pgd"), aligned(PAGE_SIZE))); |
| 60 | pte_t pg0[PT_INITIAL * PTRS_PER_PTE] __attribute__ ((__section__ (".data.vm0.pte"), aligned(PAGE_SIZE))); | 60 | pte_t pg0[PT_INITIAL * PTRS_PER_PTE] __attribute__ ((__section__ (".data..vm0.pte"), aligned(PAGE_SIZE))); |
| 61 | 61 | ||
| 62 | /* | 62 | /* |
| 63 | * Initial task structure. | 63 | * Initial task structure. |
diff --git a/arch/parisc/kernel/syscall.S b/arch/parisc/kernel/syscall.S index f5f96021caa0..68e75ce838d6 100644 --- a/arch/parisc/kernel/syscall.S +++ b/arch/parisc/kernel/syscall.S | |||
| @@ -47,18 +47,17 @@ ENTRY(linux_gateway_page) | |||
| 47 | KILL_INSN | 47 | KILL_INSN |
| 48 | .endr | 48 | .endr |
| 49 | 49 | ||
| 50 | /* ADDRESS 0xb0 to 0xb4, lws uses 1 insns for entry */ | 50 | /* ADDRESS 0xb0 to 0xb8, lws uses two insns for entry */ |
| 51 | /* Light-weight-syscall entry must always be located at 0xb0 */ | 51 | /* Light-weight-syscall entry must always be located at 0xb0 */ |
| 52 | /* WARNING: Keep this number updated with table size changes */ | 52 | /* WARNING: Keep this number updated with table size changes */ |
| 53 | #define __NR_lws_entries (2) | 53 | #define __NR_lws_entries (2) |
| 54 | 54 | ||
| 55 | lws_entry: | 55 | lws_entry: |
| 56 | /* Unconditional branch to lws_start, located on the | 56 | gate lws_start, %r0 /* increase privilege */ |
| 57 | same gateway page */ | 57 | depi 3, 31, 2, %r31 /* Ensure we return into user mode. */ |
| 58 | b,n lws_start | ||
| 59 | 58 | ||
| 60 | /* Fill from 0xb4 to 0xe0 */ | 59 | /* Fill from 0xb8 to 0xe0 */ |
| 61 | .rept 11 | 60 | .rept 10 |
| 62 | KILL_INSN | 61 | KILL_INSN |
| 63 | .endr | 62 | .endr |
| 64 | 63 | ||
| @@ -423,9 +422,6 @@ tracesys_sigexit: | |||
| 423 | 422 | ||
| 424 | *********************************************************/ | 423 | *********************************************************/ |
| 425 | lws_start: | 424 | lws_start: |
| 426 | /* Gate and ensure we return to userspace */ | ||
| 427 | gate .+8, %r0 | ||
| 428 | depi 3, 31, 2, %r31 /* Ensure we return to userspace */ | ||
| 429 | 425 | ||
| 430 | #ifdef CONFIG_64BIT | 426 | #ifdef CONFIG_64BIT |
| 431 | /* FIXME: If we are a 64-bit kernel just | 427 | /* FIXME: If we are a 64-bit kernel just |
| @@ -442,7 +438,7 @@ lws_start: | |||
| 442 | #endif | 438 | #endif |
| 443 | 439 | ||
| 444 | /* Is the lws entry number valid? */ | 440 | /* Is the lws entry number valid? */ |
| 445 | comiclr,>>= __NR_lws_entries, %r20, %r0 | 441 | comiclr,>> __NR_lws_entries, %r20, %r0 |
| 446 | b,n lws_exit_nosys | 442 | b,n lws_exit_nosys |
| 447 | 443 | ||
| 448 | /* WARNING: Trashing sr2 and sr3 */ | 444 | /* WARNING: Trashing sr2 and sr3 */ |
| @@ -473,7 +469,7 @@ lws_exit: | |||
| 473 | /* now reset the lowest bit of sp if it was set */ | 469 | /* now reset the lowest bit of sp if it was set */ |
| 474 | xor %r30,%r1,%r30 | 470 | xor %r30,%r1,%r30 |
| 475 | #endif | 471 | #endif |
| 476 | be,n 0(%sr3, %r31) | 472 | be,n 0(%sr7, %r31) |
| 477 | 473 | ||
| 478 | 474 | ||
| 479 | 475 | ||
| @@ -529,7 +525,6 @@ lws_compare_and_swap32: | |||
| 529 | #endif | 525 | #endif |
| 530 | 526 | ||
| 531 | lws_compare_and_swap: | 527 | lws_compare_and_swap: |
| 532 | #ifdef CONFIG_SMP | ||
| 533 | /* Load start of lock table */ | 528 | /* Load start of lock table */ |
| 534 | ldil L%lws_lock_start, %r20 | 529 | ldil L%lws_lock_start, %r20 |
| 535 | ldo R%lws_lock_start(%r20), %r28 | 530 | ldo R%lws_lock_start(%r20), %r28 |
| @@ -572,8 +567,6 @@ cas_wouldblock: | |||
| 572 | ldo 2(%r0), %r28 /* 2nd case */ | 567 | ldo 2(%r0), %r28 /* 2nd case */ |
| 573 | b lws_exit /* Contended... */ | 568 | b lws_exit /* Contended... */ |
| 574 | ldo -EAGAIN(%r0), %r21 /* Spin in userspace */ | 569 | ldo -EAGAIN(%r0), %r21 /* Spin in userspace */ |
| 575 | #endif | ||
| 576 | /* CONFIG_SMP */ | ||
| 577 | 570 | ||
| 578 | /* | 571 | /* |
| 579 | prev = *addr; | 572 | prev = *addr; |
| @@ -601,13 +594,11 @@ cas_action: | |||
| 601 | 1: ldw 0(%sr3,%r26), %r28 | 594 | 1: ldw 0(%sr3,%r26), %r28 |
| 602 | sub,<> %r28, %r25, %r0 | 595 | sub,<> %r28, %r25, %r0 |
| 603 | 2: stw %r24, 0(%sr3,%r26) | 596 | 2: stw %r24, 0(%sr3,%r26) |
| 604 | #ifdef CONFIG_SMP | ||
| 605 | /* Free lock */ | 597 | /* Free lock */ |
| 606 | stw %r20, 0(%sr2,%r20) | 598 | stw %r20, 0(%sr2,%r20) |
| 607 | # if ENABLE_LWS_DEBUG | 599 | #if ENABLE_LWS_DEBUG |
| 608 | /* Clear thread register indicator */ | 600 | /* Clear thread register indicator */ |
| 609 | stw %r0, 4(%sr2,%r20) | 601 | stw %r0, 4(%sr2,%r20) |
| 610 | # endif | ||
| 611 | #endif | 602 | #endif |
| 612 | /* Return to userspace, set no error */ | 603 | /* Return to userspace, set no error */ |
| 613 | b lws_exit | 604 | b lws_exit |
| @@ -615,12 +606,10 @@ cas_action: | |||
| 615 | 606 | ||
| 616 | 3: | 607 | 3: |
| 617 | /* Error occured on load or store */ | 608 | /* Error occured on load or store */ |
| 618 | #ifdef CONFIG_SMP | ||
| 619 | /* Free lock */ | 609 | /* Free lock */ |
| 620 | stw %r20, 0(%sr2,%r20) | 610 | stw %r20, 0(%sr2,%r20) |
| 621 | # if ENABLE_LWS_DEBUG | 611 | #if ENABLE_LWS_DEBUG |
| 622 | stw %r0, 4(%sr2,%r20) | 612 | stw %r0, 4(%sr2,%r20) |
| 623 | # endif | ||
| 624 | #endif | 613 | #endif |
| 625 | b lws_exit | 614 | b lws_exit |
| 626 | ldo -EFAULT(%r0),%r21 /* set errno */ | 615 | ldo -EFAULT(%r0),%r21 /* set errno */ |
| @@ -672,7 +661,6 @@ ENTRY(sys_call_table64) | |||
| 672 | END(sys_call_table64) | 661 | END(sys_call_table64) |
| 673 | #endif | 662 | #endif |
| 674 | 663 | ||
| 675 | #ifdef CONFIG_SMP | ||
| 676 | /* | 664 | /* |
| 677 | All light-weight-syscall atomic operations | 665 | All light-weight-syscall atomic operations |
| 678 | will use this set of locks | 666 | will use this set of locks |
| @@ -694,8 +682,6 @@ ENTRY(lws_lock_start) | |||
| 694 | .endr | 682 | .endr |
| 695 | END(lws_lock_start) | 683 | END(lws_lock_start) |
| 696 | .previous | 684 | .previous |
| 697 | #endif | ||
| 698 | /* CONFIG_SMP for lws_lock_start */ | ||
| 699 | 685 | ||
| 700 | .end | 686 | .end |
| 701 | 687 | ||
diff --git a/arch/parisc/kernel/vmlinux.lds.S b/arch/parisc/kernel/vmlinux.lds.S index 9dab4a4e09f7..d64a6bbec2aa 100644 --- a/arch/parisc/kernel/vmlinux.lds.S +++ b/arch/parisc/kernel/vmlinux.lds.S | |||
| @@ -94,8 +94,8 @@ SECTIONS | |||
| 94 | 94 | ||
| 95 | /* PA-RISC locks requires 16-byte alignment */ | 95 | /* PA-RISC locks requires 16-byte alignment */ |
| 96 | . = ALIGN(16); | 96 | . = ALIGN(16); |
| 97 | .data.lock_aligned : { | 97 | .data..lock_aligned : { |
| 98 | *(.data.lock_aligned) | 98 | *(.data..lock_aligned) |
| 99 | } | 99 | } |
| 100 | 100 | ||
| 101 | /* End of data section */ | 101 | /* End of data section */ |
| @@ -105,10 +105,10 @@ SECTIONS | |||
| 105 | __bss_start = .; | 105 | __bss_start = .; |
| 106 | /* page table entries need to be PAGE_SIZE aligned */ | 106 | /* page table entries need to be PAGE_SIZE aligned */ |
| 107 | . = ALIGN(PAGE_SIZE); | 107 | . = ALIGN(PAGE_SIZE); |
| 108 | .data.vmpages : { | 108 | .data..vmpages : { |
| 109 | *(.data.vm0.pmd) | 109 | *(.data..vm0.pmd) |
| 110 | *(.data.vm0.pgd) | 110 | *(.data..vm0.pgd) |
| 111 | *(.data.vm0.pte) | 111 | *(.data..vm0.pte) |
| 112 | } | 112 | } |
| 113 | .bss : { | 113 | .bss : { |
| 114 | *(.bss) | 114 | *(.bss) |
diff --git a/arch/parisc/math-emu/decode_exc.c b/arch/parisc/math-emu/decode_exc.c index 3ca1c6149218..27a7492ddb0d 100644 --- a/arch/parisc/math-emu/decode_exc.c +++ b/arch/parisc/math-emu/decode_exc.c | |||
| @@ -342,6 +342,7 @@ decode_fpu(unsigned int Fpu_register[], unsigned int trap_counts[]) | |||
| 342 | return SIGNALCODE(SIGFPE, FPE_FLTINV); | 342 | return SIGNALCODE(SIGFPE, FPE_FLTINV); |
| 343 | case DIVISIONBYZEROEXCEPTION: | 343 | case DIVISIONBYZEROEXCEPTION: |
| 344 | update_trap_counts(Fpu_register, aflags, bflags, trap_counts); | 344 | update_trap_counts(Fpu_register, aflags, bflags, trap_counts); |
| 345 | Clear_excp_register(exception_index); | ||
| 345 | return SIGNALCODE(SIGFPE, FPE_FLTDIV); | 346 | return SIGNALCODE(SIGFPE, FPE_FLTDIV); |
| 346 | case INEXACTEXCEPTION: | 347 | case INEXACTEXCEPTION: |
| 347 | update_trap_counts(Fpu_register, aflags, bflags, trap_counts); | 348 | update_trap_counts(Fpu_register, aflags, bflags, trap_counts); |
diff --git a/arch/parisc/mm/fault.c b/arch/parisc/mm/fault.c index c6afbfc95770..18162ce4261e 100644 --- a/arch/parisc/mm/fault.c +++ b/arch/parisc/mm/fault.c | |||
| @@ -264,8 +264,7 @@ no_context: | |||
| 264 | 264 | ||
| 265 | out_of_memory: | 265 | out_of_memory: |
| 266 | up_read(&mm->mmap_sem); | 266 | up_read(&mm->mmap_sem); |
| 267 | printk(KERN_CRIT "VM: killing process %s\n", current->comm); | 267 | if (!user_mode(regs)) |
| 268 | if (user_mode(regs)) | 268 | goto no_context; |
| 269 | do_group_exit(SIGKILL); | 269 | pagefault_out_of_memory(); |
| 270 | goto no_context; | ||
| 271 | } | 270 | } |
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index c4c4549c22bb..328774bd41ee 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig | |||
| @@ -351,7 +351,7 @@ config ARCH_ENABLE_MEMORY_HOTREMOVE | |||
| 351 | 351 | ||
| 352 | config KEXEC | 352 | config KEXEC |
| 353 | bool "kexec system call (EXPERIMENTAL)" | 353 | bool "kexec system call (EXPERIMENTAL)" |
| 354 | depends on PPC_BOOK3S && EXPERIMENTAL | 354 | depends on (PPC_BOOK3S || (FSL_BOOKE && !SMP)) && EXPERIMENTAL |
| 355 | help | 355 | help |
| 356 | kexec is a system call that implements the ability to shutdown your | 356 | kexec is a system call that implements the ability to shutdown your |
| 357 | current kernel, and to start another kernel. It is like a reboot | 357 | current kernel, and to start another kernel. It is like a reboot |
| @@ -663,6 +663,9 @@ config ZONE_DMA | |||
| 663 | config NEED_DMA_MAP_STATE | 663 | config NEED_DMA_MAP_STATE |
| 664 | def_bool (PPC64 || NOT_COHERENT_CACHE) | 664 | def_bool (PPC64 || NOT_COHERENT_CACHE) |
| 665 | 665 | ||
| 666 | config NEED_SG_DMA_LENGTH | ||
| 667 | def_bool y | ||
| 668 | |||
| 666 | config GENERIC_ISA_DMA | 669 | config GENERIC_ISA_DMA |
| 667 | bool | 670 | bool |
| 668 | depends on PPC64 || POWER4 || 6xx && !CPM2 | 671 | depends on PPC64 || POWER4 || 6xx && !CPM2 |
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile index 1a54a3b3a3fa..42dcd3f4ad7b 100644 --- a/arch/powerpc/Makefile +++ b/arch/powerpc/Makefile | |||
| @@ -112,6 +112,11 @@ KBUILD_CFLAGS += $(call cc-option,-mspe=no) | |||
| 112 | # kernel considerably. | 112 | # kernel considerably. |
| 113 | KBUILD_CFLAGS += $(call cc-option,-funit-at-a-time) | 113 | KBUILD_CFLAGS += $(call cc-option,-funit-at-a-time) |
| 114 | 114 | ||
| 115 | # FIXME: the module load should be taught about the additional relocs | ||
| 116 | # generated by this. | ||
| 117 | # revert to pre-gcc-4.4 behaviour of .eh_frame | ||
| 118 | KBUILD_CFLAGS += $(call cc-option,-fno-dwarf2-cfi-asm) | ||
| 119 | |||
| 115 | # Never use string load/store instructions as they are | 120 | # Never use string load/store instructions as they are |
| 116 | # often slow when they are implemented at all | 121 | # often slow when they are implemented at all |
| 117 | KBUILD_CFLAGS += -mno-string | 122 | KBUILD_CFLAGS += -mno-string |
diff --git a/arch/powerpc/boot/4xx.c b/arch/powerpc/boot/4xx.c index 27db8938827a..9d3bd4c45a24 100644 --- a/arch/powerpc/boot/4xx.c +++ b/arch/powerpc/boot/4xx.c | |||
| @@ -519,7 +519,7 @@ void ibm440ep_fixup_clocks(unsigned int sys_clk, | |||
| 519 | { | 519 | { |
| 520 | unsigned int plb_clk = __ibm440eplike_fixup_clocks(sys_clk, tmr_clk, 0); | 520 | unsigned int plb_clk = __ibm440eplike_fixup_clocks(sys_clk, tmr_clk, 0); |
| 521 | 521 | ||
| 522 | /* serial clocks beed fixup based on int/ext */ | 522 | /* serial clocks need fixup based on int/ext */ |
| 523 | eplike_fixup_uart_clk(0, "/plb/opb/serial@ef600300", ser_clk, plb_clk); | 523 | eplike_fixup_uart_clk(0, "/plb/opb/serial@ef600300", ser_clk, plb_clk); |
| 524 | eplike_fixup_uart_clk(1, "/plb/opb/serial@ef600400", ser_clk, plb_clk); | 524 | eplike_fixup_uart_clk(1, "/plb/opb/serial@ef600400", ser_clk, plb_clk); |
| 525 | eplike_fixup_uart_clk(2, "/plb/opb/serial@ef600500", ser_clk, plb_clk); | 525 | eplike_fixup_uart_clk(2, "/plb/opb/serial@ef600500", ser_clk, plb_clk); |
| @@ -532,7 +532,7 @@ void ibm440gx_fixup_clocks(unsigned int sys_clk, | |||
| 532 | { | 532 | { |
| 533 | unsigned int plb_clk = __ibm440eplike_fixup_clocks(sys_clk, tmr_clk, 1); | 533 | unsigned int plb_clk = __ibm440eplike_fixup_clocks(sys_clk, tmr_clk, 1); |
| 534 | 534 | ||
| 535 | /* serial clocks beed fixup based on int/ext */ | 535 | /* serial clocks need fixup based on int/ext */ |
| 536 | eplike_fixup_uart_clk(0, "/plb/opb/serial@40000200", ser_clk, plb_clk); | 536 | eplike_fixup_uart_clk(0, "/plb/opb/serial@40000200", ser_clk, plb_clk); |
| 537 | eplike_fixup_uart_clk(1, "/plb/opb/serial@40000300", ser_clk, plb_clk); | 537 | eplike_fixup_uart_clk(1, "/plb/opb/serial@40000300", ser_clk, plb_clk); |
| 538 | } | 538 | } |
| @@ -543,10 +543,10 @@ void ibm440spe_fixup_clocks(unsigned int sys_clk, | |||
| 543 | { | 543 | { |
| 544 | unsigned int plb_clk = __ibm440eplike_fixup_clocks(sys_clk, tmr_clk, 1); | 544 | unsigned int plb_clk = __ibm440eplike_fixup_clocks(sys_clk, tmr_clk, 1); |
| 545 | 545 | ||
| 546 | /* serial clocks beed fixup based on int/ext */ | 546 | /* serial clocks need fixup based on int/ext */ |
| 547 | eplike_fixup_uart_clk(0, "/plb/opb/serial@10000200", ser_clk, plb_clk); | 547 | eplike_fixup_uart_clk(0, "/plb/opb/serial@f0000200", ser_clk, plb_clk); |
| 548 | eplike_fixup_uart_clk(1, "/plb/opb/serial@10000300", ser_clk, plb_clk); | 548 | eplike_fixup_uart_clk(1, "/plb/opb/serial@f0000300", ser_clk, plb_clk); |
| 549 | eplike_fixup_uart_clk(2, "/plb/opb/serial@10000600", ser_clk, plb_clk); | 549 | eplike_fixup_uart_clk(2, "/plb/opb/serial@f0000600", ser_clk, plb_clk); |
| 550 | } | 550 | } |
| 551 | 551 | ||
| 552 | void ibm405gp_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk) | 552 | void ibm405gp_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk) |
diff --git a/arch/powerpc/boot/dts/icon.dts b/arch/powerpc/boot/dts/icon.dts new file mode 100644 index 000000000000..abcd0caeccae --- /dev/null +++ b/arch/powerpc/boot/dts/icon.dts | |||
| @@ -0,0 +1,447 @@ | |||
| 1 | /* | ||
| 2 | * Device Tree Source for Mosaix Technologies, Inc. ICON board | ||
| 3 | * | ||
| 4 | * Copyright 2010 DENX Software Engineering, Stefan Roese <sr@denx.de> | ||
| 5 | * | ||
| 6 | * This file is licensed under the terms of the GNU General Public | ||
| 7 | * License version 2. This program is licensed "as is" without | ||
| 8 | * any warranty of any kind, whether express or implied. | ||
| 9 | */ | ||
| 10 | |||
| 11 | /dts-v1/; | ||
| 12 | |||
| 13 | / { | ||
| 14 | #address-cells = <2>; | ||
| 15 | #size-cells = <2>; | ||
| 16 | model = "mosaixtech,icon"; | ||
| 17 | compatible = "mosaixtech,icon"; | ||
| 18 | dcr-parent = <&{/cpus/cpu@0}>; | ||
| 19 | |||
| 20 | aliases { | ||
| 21 | ethernet0 = &EMAC0; | ||
| 22 | serial0 = &UART0; | ||
| 23 | serial1 = &UART1; | ||
| 24 | serial2 = &UART2; | ||
| 25 | }; | ||
| 26 | |||
| 27 | cpus { | ||
| 28 | #address-cells = <1>; | ||
| 29 | #size-cells = <0>; | ||
| 30 | |||
| 31 | cpu@0 { | ||
| 32 | device_type = "cpu"; | ||
| 33 | model = "PowerPC,440SPe"; | ||
| 34 | reg = <0x00000000>; | ||
| 35 | clock-frequency = <0>; /* Filled in by U-Boot */ | ||
| 36 | timebase-frequency = <0>; /* Filled in by U-Boot */ | ||
| 37 | i-cache-line-size = <32>; | ||
| 38 | d-cache-line-size = <32>; | ||
| 39 | i-cache-size = <32768>; | ||
| 40 | d-cache-size = <32768>; | ||
| 41 | dcr-controller; | ||
| 42 | dcr-access-method = "native"; | ||
| 43 | reset-type = <2>; /* Use chip-reset */ | ||
| 44 | }; | ||
| 45 | }; | ||
| 46 | |||
| 47 | memory { | ||
| 48 | device_type = "memory"; | ||
| 49 | reg = <0x0 0x00000000 0x0 0x00000000>; /* Filled in by U-Boot */ | ||
| 50 | }; | ||
| 51 | |||
| 52 | UIC0: interrupt-controller0 { | ||
| 53 | compatible = "ibm,uic-440spe","ibm,uic"; | ||
| 54 | interrupt-controller; | ||
| 55 | cell-index = <0>; | ||
| 56 | dcr-reg = <0x0c0 0x009>; | ||
| 57 | #address-cells = <0>; | ||
| 58 | #size-cells = <0>; | ||
| 59 | #interrupt-cells = <2>; | ||
| 60 | }; | ||
| 61 | |||
| 62 | UIC1: interrupt-controller1 { | ||
| 63 | compatible = "ibm,uic-440spe","ibm,uic"; | ||
| 64 | interrupt-controller; | ||
| 65 | cell-index = <1>; | ||
| 66 | dcr-reg = <0x0d0 0x009>; | ||
| 67 | #address-cells = <0>; | ||
| 68 | #size-cells = <0>; | ||
| 69 | #interrupt-cells = <2>; | ||
| 70 | interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ | ||
| 71 | interrupt-parent = <&UIC0>; | ||
| 72 | }; | ||
| 73 | |||
| 74 | UIC2: interrupt-controller2 { | ||
| 75 | compatible = "ibm,uic-440spe","ibm,uic"; | ||
| 76 | interrupt-controller; | ||
| 77 | cell-index = <2>; | ||
| 78 | dcr-reg = <0x0e0 0x009>; | ||
| 79 | #address-cells = <0>; | ||
| 80 | #size-cells = <0>; | ||
| 81 | #interrupt-cells = <2>; | ||
| 82 | interrupts = <0xa 0x4 0xb 0x4>; /* cascade */ | ||
| 83 | interrupt-parent = <&UIC0>; | ||
| 84 | }; | ||
| 85 | |||
| 86 | UIC3: interrupt-controller3 { | ||
| 87 | compatible = "ibm,uic-440spe","ibm,uic"; | ||
| 88 | interrupt-controller; | ||
| 89 | cell-index = <3>; | ||
| 90 | dcr-reg = <0x0f0 0x009>; | ||
| 91 | #address-cells = <0>; | ||
| 92 | #size-cells = <0>; | ||
| 93 | #interrupt-cells = <2>; | ||
| 94 | interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ | ||
| 95 | interrupt-parent = <&UIC0>; | ||
| 96 | }; | ||
| 97 | |||
| 98 | SDR0: sdr { | ||
| 99 | compatible = "ibm,sdr-440spe"; | ||
| 100 | dcr-reg = <0x00e 0x002>; | ||
| 101 | }; | ||
| 102 | |||
| 103 | CPR0: cpr { | ||
| 104 | compatible = "ibm,cpr-440spe"; | ||
| 105 | dcr-reg = <0x00c 0x002>; | ||
| 106 | }; | ||
| 107 | |||
| 108 | MQ0: mq { | ||
| 109 | compatible = "ibm,mq-440spe"; | ||
| 110 | dcr-reg = <0x040 0x020>; | ||
| 111 | }; | ||
| 112 | |||
| 113 | plb { | ||
| 114 | compatible = "ibm,plb-440spe", "ibm,plb-440gp", "ibm,plb4"; | ||
| 115 | #address-cells = <2>; | ||
| 116 | #size-cells = <1>; | ||
| 117 | /* addr-child addr-parent size */ | ||
| 118 | ranges = <0x4 0x00100000 0x4 0x00100000 0x00001000 | ||
| 119 | 0x4 0x00200000 0x4 0x00200000 0x00000400 | ||
| 120 | 0x4 0xe0000000 0x4 0xe0000000 0x20000000 | ||
| 121 | 0xc 0x00000000 0xc 0x00000000 0x20000000 | ||
| 122 | 0xd 0x00000000 0xd 0x00000000 0x80000000 | ||
| 123 | 0xd 0x80000000 0xd 0x80000000 0x80000000 | ||
| 124 | 0xe 0x00000000 0xe 0x00000000 0x80000000 | ||
| 125 | 0xe 0x80000000 0xe 0x80000000 0x80000000 | ||
| 126 | 0xf 0x00000000 0xf 0x00000000 0x80000000 | ||
| 127 | 0xf 0x80000000 0xf 0x80000000 0x80000000>; | ||
| 128 | clock-frequency = <0>; /* Filled in by U-Boot */ | ||
| 129 | |||
| 130 | SDRAM0: sdram { | ||
| 131 | compatible = "ibm,sdram-440spe", "ibm,sdram-405gp"; | ||
| 132 | dcr-reg = <0x010 0x002>; | ||
| 133 | }; | ||
| 134 | |||
| 135 | MAL0: mcmal { | ||
| 136 | compatible = "ibm,mcmal-440spe", "ibm,mcmal2"; | ||
| 137 | dcr-reg = <0x180 0x062>; | ||
| 138 | num-tx-chans = <2>; | ||
| 139 | num-rx-chans = <1>; | ||
| 140 | interrupt-parent = <&MAL0>; | ||
| 141 | interrupts = <0x0 0x1 0x2 0x3 0x4>; | ||
| 142 | #interrupt-cells = <1>; | ||
| 143 | #address-cells = <0>; | ||
| 144 | #size-cells = <0>; | ||
| 145 | interrupt-map = </*TXEOB*/ 0x0 &UIC1 0x6 0x4 | ||
| 146 | /*RXEOB*/ 0x1 &UIC1 0x7 0x4 | ||
| 147 | /*SERR*/ 0x2 &UIC1 0x1 0x4 | ||
| 148 | /*TXDE*/ 0x3 &UIC1 0x2 0x4 | ||
| 149 | /*RXDE*/ 0x4 &UIC1 0x3 0x4>; | ||
| 150 | }; | ||
| 151 | |||
| 152 | POB0: opb { | ||
| 153 | compatible = "ibm,opb-440spe", "ibm,opb-440gp", "ibm,opb"; | ||
| 154 | #address-cells = <1>; | ||
| 155 | #size-cells = <1>; | ||
| 156 | ranges = <0xe0000000 0x00000004 0xe0000000 0x20000000>; | ||
| 157 | clock-frequency = <0>; /* Filled in by U-Boot */ | ||
| 158 | |||
| 159 | EBC0: ebc { | ||
| 160 | compatible = "ibm,ebc-440spe", "ibm,ebc-440gp", "ibm,ebc"; | ||
| 161 | dcr-reg = <0x012 0x002>; | ||
| 162 | #address-cells = <2>; | ||
| 163 | #size-cells = <1>; | ||
| 164 | clock-frequency = <0>; /* Filled in by U-Boot */ | ||
| 165 | /* ranges property is supplied by U-Boot */ | ||
| 166 | interrupts = <0x5 0x1>; | ||
| 167 | interrupt-parent = <&UIC1>; | ||
| 168 | |||
| 169 | nor_flash@0,0 { | ||
| 170 | compatible = "cfi-flash"; | ||
| 171 | bank-width = <2>; | ||
| 172 | reg = <0x00000000 0x00000000 0x01000000>; | ||
| 173 | #address-cells = <1>; | ||
| 174 | #size-cells = <1>; | ||
| 175 | partition@0 { | ||
| 176 | label = "kernel"; | ||
| 177 | reg = <0x00000000 0x001e0000>; | ||
| 178 | }; | ||
| 179 | partition@1e0000 { | ||
| 180 | label = "dtb"; | ||
| 181 | reg = <0x001e0000 0x00020000>; | ||
| 182 | }; | ||
| 183 | partition@200000 { | ||
| 184 | label = "root"; | ||
| 185 | reg = <0x00200000 0x00200000>; | ||
| 186 | }; | ||
| 187 | partition@400000 { | ||
| 188 | label = "user"; | ||
| 189 | reg = <0x00400000 0x00b60000>; | ||
| 190 | }; | ||
| 191 | partition@f60000 { | ||
| 192 | label = "env"; | ||
| 193 | reg = <0x00f60000 0x00040000>; | ||
| 194 | }; | ||
| 195 | partition@fa0000 { | ||
| 196 | label = "u-boot"; | ||
| 197 | reg = <0x00fa0000 0x00060000>; | ||
| 198 | }; | ||
| 199 | }; | ||
| 200 | |||
| 201 | SysACE_CompactFlash: sysace@1,0 { | ||
| 202 | compatible = "xlnx,sysace"; | ||
| 203 | interrupt-parent = <&UIC2>; | ||
| 204 | interrupts = <24 0x4>; | ||
| 205 | reg = <0x00000001 0x00000000 0x10000>; | ||
| 206 | }; | ||
| 207 | }; | ||
| 208 | |||
| 209 | UART0: serial@f0000200 { | ||
| 210 | device_type = "serial"; | ||
| 211 | compatible = "ns16550"; | ||
| 212 | reg = <0xf0000200 0x00000008>; | ||
| 213 | virtual-reg = <0xa0000200>; | ||
| 214 | clock-frequency = <0>; /* Filled in by U-Boot */ | ||
| 215 | current-speed = <115200>; | ||
| 216 | interrupt-parent = <&UIC0>; | ||
| 217 | interrupts = <0x0 0x4>; | ||
| 218 | }; | ||
| 219 | |||
| 220 | UART1: serial@f0000300 { | ||
| 221 | device_type = "serial"; | ||
| 222 | compatible = "ns16550"; | ||
| 223 | reg = <0xf0000300 0x00000008>; | ||
| 224 | virtual-reg = <0xa0000300>; | ||
| 225 | clock-frequency = <0>; | ||
| 226 | current-speed = <0>; | ||
| 227 | interrupt-parent = <&UIC0>; | ||
| 228 | interrupts = <0x1 0x4>; | ||
| 229 | }; | ||
| 230 | |||
| 231 | |||
| 232 | UART2: serial@f0000600 { | ||
| 233 | device_type = "serial"; | ||
| 234 | compatible = "ns16550"; | ||
| 235 | reg = <0xf0000600 0x00000008>; | ||
| 236 | virtual-reg = <0xa0000600>; | ||
| 237 | clock-frequency = <0>; | ||
| 238 | current-speed = <0>; | ||
| 239 | interrupt-parent = <&UIC1>; | ||
| 240 | interrupts = <0x5 0x4>; | ||
| 241 | }; | ||
| 242 | |||
| 243 | IIC0: i2c@f0000400 { | ||
| 244 | compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic"; | ||
| 245 | reg = <0xf0000400 0x00000014>; | ||
| 246 | interrupt-parent = <&UIC0>; | ||
| 247 | interrupts = <0x2 0x4>; | ||
| 248 | }; | ||
| 249 | |||
| 250 | IIC1: i2c@f0000500 { | ||
| 251 | compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic"; | ||
| 252 | reg = <0xf0000500 0x00000014>; | ||
| 253 | interrupt-parent = <&UIC0>; | ||
| 254 | interrupts = <0x3 0x4>; | ||
| 255 | #address-cells = <1>; | ||
| 256 | #size-cells = <0>; | ||
| 257 | |||
| 258 | rtc@68 { | ||
| 259 | compatible = "stm,m41t00"; | ||
| 260 | reg = <0x68>; | ||
| 261 | }; | ||
| 262 | }; | ||
| 263 | |||
| 264 | EMAC0: ethernet@f0000800 { | ||
| 265 | linux,network-index = <0x0>; | ||
| 266 | device_type = "network"; | ||
| 267 | compatible = "ibm,emac-440spe", "ibm,emac4"; | ||
| 268 | interrupt-parent = <&UIC1>; | ||
| 269 | interrupts = <0x1c 0x4 0x1d 0x4>; | ||
| 270 | reg = <0xf0000800 0x00000074>; | ||
| 271 | local-mac-address = [000000000000]; | ||
| 272 | mal-device = <&MAL0>; | ||
| 273 | mal-tx-channel = <0>; | ||
| 274 | mal-rx-channel = <0>; | ||
| 275 | cell-index = <0>; | ||
| 276 | max-frame-size = <9000>; | ||
| 277 | rx-fifo-size = <4096>; | ||
| 278 | tx-fifo-size = <2048>; | ||
| 279 | phy-mode = "gmii"; | ||
| 280 | phy-map = <0x00000000>; | ||
| 281 | has-inverted-stacr-oc; | ||
| 282 | has-new-stacr-staopc; | ||
| 283 | }; | ||
| 284 | }; | ||
| 285 | |||
| 286 | PCIX0: pci@c0ec00000 { | ||
| 287 | device_type = "pci"; | ||
| 288 | #interrupt-cells = <1>; | ||
| 289 | #size-cells = <2>; | ||
| 290 | #address-cells = <3>; | ||
| 291 | compatible = "ibm,plb-pcix-440spe", "ibm,plb-pcix"; | ||
| 292 | primary; | ||
| 293 | large-inbound-windows; | ||
| 294 | enable-msi-hole; | ||
| 295 | reg = <0x0000000c 0x0ec00000 0x00000008 /* Config space access */ | ||
| 296 | 0x00000000 0x00000000 0x00000000 /* no IACK cycles */ | ||
| 297 | 0x0000000c 0x0ed00000 0x00000004 /* Special cycles */ | ||
| 298 | 0x0000000c 0x0ec80000 0x00000100 /* Internal registers */ | ||
| 299 | 0x0000000c 0x0ec80100 0x000000fc>; /* Internal messaging registers */ | ||
| 300 | |||
| 301 | /* Outbound ranges, one memory and one IO, | ||
| 302 | * later cannot be changed | ||
| 303 | */ | ||
| 304 | ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000 | ||
| 305 | 0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>; | ||
| 306 | |||
| 307 | /* Inbound 4GB range starting at 0 */ | ||
| 308 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>; | ||
| 309 | |||
| 310 | /* This drives busses 0 to 0xf */ | ||
| 311 | bus-range = <0x0 0xf>; | ||
| 312 | |||
| 313 | /* PCI-X interrupt (SM502) is routed to extIRQ10 (UIC1, 19) */ | ||
| 314 | interrupt-map-mask = <0x0 0x0 0x0 0x0>; | ||
| 315 | interrupt-map = <0x0 0x0 0x0 0x0 &UIC1 19 0x8>; | ||
| 316 | }; | ||
| 317 | |||
| 318 | PCIE0: pciex@d00000000 { | ||
| 319 | device_type = "pci"; | ||
| 320 | #interrupt-cells = <1>; | ||
| 321 | #size-cells = <2>; | ||
| 322 | #address-cells = <3>; | ||
| 323 | compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; | ||
| 324 | primary; | ||
| 325 | port = <0x0>; /* port number */ | ||
| 326 | reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */ | ||
| 327 | 0x0000000c 0x10000000 0x00001000>; /* Registers */ | ||
| 328 | dcr-reg = <0x100 0x020>; | ||
| 329 | sdr-base = <0x300>; | ||
| 330 | |||
| 331 | /* Outbound ranges, one memory and one IO, | ||
| 332 | * later cannot be changed | ||
| 333 | */ | ||
| 334 | ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000 | ||
| 335 | 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>; | ||
| 336 | |||
| 337 | /* Inbound 4GB range starting at 0 */ | ||
| 338 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>; | ||
| 339 | |||
| 340 | /* This drives busses 0x10 to 0x1f */ | ||
| 341 | bus-range = <0x10 0x1f>; | ||
| 342 | |||
| 343 | /* Legacy interrupts (note the weird polarity, the bridge seems | ||
| 344 | * to invert PCIe legacy interrupts). | ||
| 345 | * We are de-swizzling here because the numbers are actually for | ||
| 346 | * port of the root complex virtual P2P bridge. But I want | ||
| 347 | * to avoid putting a node for it in the tree, so the numbers | ||
| 348 | * below are basically de-swizzled numbers. | ||
| 349 | * The real slot is on idsel 0, so the swizzling is 1:1 | ||
| 350 | */ | ||
| 351 | interrupt-map-mask = <0x0 0x0 0x0 0x7>; | ||
| 352 | interrupt-map = < | ||
| 353 | 0x0 0x0 0x0 0x1 &UIC3 0x0 0x4 /* swizzled int A */ | ||
| 354 | 0x0 0x0 0x0 0x2 &UIC3 0x1 0x4 /* swizzled int B */ | ||
| 355 | 0x0 0x0 0x0 0x3 &UIC3 0x2 0x4 /* swizzled int C */ | ||
| 356 | 0x0 0x0 0x0 0x4 &UIC3 0x3 0x4 /* swizzled int D */>; | ||
| 357 | }; | ||
| 358 | |||
| 359 | PCIE1: pciex@d20000000 { | ||
| 360 | device_type = "pci"; | ||
| 361 | #interrupt-cells = <1>; | ||
| 362 | #size-cells = <2>; | ||
| 363 | #address-cells = <3>; | ||
| 364 | compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; | ||
| 365 | primary; | ||
| 366 | port = <0x1>; /* port number */ | ||
| 367 | reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */ | ||
| 368 | 0x0000000c 0x10001000 0x00001000>; /* Registers */ | ||
| 369 | dcr-reg = <0x120 0x020>; | ||
| 370 | sdr-base = <0x340>; | ||
| 371 | |||
| 372 | /* Outbound ranges, one memory and one IO, | ||
| 373 | * later cannot be changed | ||
| 374 | */ | ||
| 375 | ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000 | ||
| 376 | 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>; | ||
| 377 | |||
| 378 | /* Inbound 4GB range starting at 0 */ | ||
| 379 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>; | ||
| 380 | |||
| 381 | /* This drives busses 0x20 to 0x2f */ | ||
| 382 | bus-range = <0x20 0x2f>; | ||
| 383 | |||
| 384 | /* Legacy interrupts (note the weird polarity, the bridge seems | ||
| 385 | * to invert PCIe legacy interrupts). | ||
| 386 | * We are de-swizzling here because the numbers are actually for | ||
| 387 | * port of the root complex virtual P2P bridge. But I want | ||
| 388 | * to avoid putting a node for it in the tree, so the numbers | ||
| 389 | * below are basically de-swizzled numbers. | ||
| 390 | * The real slot is on idsel 0, so the swizzling is 1:1 | ||
| 391 | */ | ||
| 392 | interrupt-map-mask = <0x0 0x0 0x0 0x7>; | ||
| 393 | interrupt-map = < | ||
| 394 | 0x0 0x0 0x0 0x1 &UIC3 0x4 0x4 /* swizzled int A */ | ||
| 395 | 0x0 0x0 0x0 0x2 &UIC3 0x5 0x4 /* swizzled int B */ | ||
| 396 | 0x0 0x0 0x0 0x3 &UIC3 0x6 0x4 /* swizzled int C */ | ||
| 397 | 0x0 0x0 0x0 0x4 &UIC3 0x7 0x4 /* swizzled int D */>; | ||
| 398 | }; | ||
| 399 | |||
| 400 | I2O: i2o@400100000 { | ||
| 401 | compatible = "ibm,i2o-440spe"; | ||
| 402 | reg = <0x00000004 0x00100000 0x100>; | ||
| 403 | dcr-reg = <0x060 0x020>; | ||
| 404 | }; | ||
| 405 | |||
| 406 | DMA0: dma0@400100100 { | ||
| 407 | compatible = "ibm,dma-440spe"; | ||
| 408 | cell-index = <0>; | ||
| 409 | reg = <0x00000004 0x00100100 0x100>; | ||
| 410 | dcr-reg = <0x060 0x020>; | ||
| 411 | interrupt-parent = <&DMA0>; | ||
| 412 | interrupts = <0 1>; | ||
| 413 | #interrupt-cells = <1>; | ||
| 414 | #address-cells = <0>; | ||
| 415 | #size-cells = <0>; | ||
| 416 | interrupt-map = < | ||
| 417 | 0 &UIC0 0x14 4 | ||
| 418 | 1 &UIC1 0x16 4>; | ||
| 419 | }; | ||
| 420 | |||
| 421 | DMA1: dma1@400100200 { | ||
| 422 | compatible = "ibm,dma-440spe"; | ||
| 423 | cell-index = <1>; | ||
| 424 | reg = <0x00000004 0x00100200 0x100>; | ||
| 425 | dcr-reg = <0x060 0x020>; | ||
| 426 | interrupt-parent = <&DMA1>; | ||
| 427 | interrupts = <0 1>; | ||
| 428 | #interrupt-cells = <1>; | ||
| 429 | #address-cells = <0>; | ||
| 430 | #size-cells = <0>; | ||
| 431 | interrupt-map = < | ||
| 432 | 0 &UIC0 0x16 4 | ||
| 433 | 1 &UIC1 0x16 4>; | ||
| 434 | }; | ||
| 435 | |||
| 436 | xor-accel@400200000 { | ||
| 437 | compatible = "amcc,xor-accelerator"; | ||
| 438 | reg = <0x00000004 0x00200000 0x400>; | ||
| 439 | interrupt-parent = <&UIC1>; | ||
| 440 | interrupts = <0x1f 4>; | ||
| 441 | }; | ||
| 442 | }; | ||
| 443 | |||
| 444 | chosen { | ||
| 445 | linux,stdout-path = "/plb/opb/serial@f0000200"; | ||
| 446 | }; | ||
| 447 | }; | ||
diff --git a/arch/powerpc/boot/dts/katmai.dts b/arch/powerpc/boot/dts/katmai.dts index 8cf2c0c88c05..7c3be5e45748 100644 --- a/arch/powerpc/boot/dts/katmai.dts +++ b/arch/powerpc/boot/dts/katmai.dts | |||
| @@ -44,6 +44,7 @@ | |||
| 44 | d-cache-size = <32768>; | 44 | d-cache-size = <32768>; |
| 45 | dcr-controller; | 45 | dcr-controller; |
| 46 | dcr-access-method = "native"; | 46 | dcr-access-method = "native"; |
| 47 | reset-type = <2>; /* Use chip-reset */ | ||
| 47 | }; | 48 | }; |
| 48 | }; | 49 | }; |
| 49 | 50 | ||
diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts b/arch/powerpc/boot/dts/mpc8548cds.dts index 4173af387c63..0f5262452682 100644 --- a/arch/powerpc/boot/dts/mpc8548cds.dts +++ b/arch/powerpc/boot/dts/mpc8548cds.dts | |||
| @@ -20,10 +20,8 @@ | |||
| 20 | aliases { | 20 | aliases { |
| 21 | ethernet0 = &enet0; | 21 | ethernet0 = &enet0; |
| 22 | ethernet1 = &enet1; | 22 | ethernet1 = &enet1; |
| 23 | /* | ||
| 24 | ethernet2 = &enet2; | 23 | ethernet2 = &enet2; |
| 25 | ethernet3 = &enet3; | 24 | ethernet3 = &enet3; |
| 26 | */ | ||
| 27 | serial0 = &serial0; | 25 | serial0 = &serial0; |
| 28 | serial1 = &serial1; | 26 | serial1 = &serial1; |
| 29 | pci0 = &pci0; | 27 | pci0 = &pci0; |
| @@ -254,7 +252,6 @@ | |||
| 254 | }; | 252 | }; |
| 255 | }; | 253 | }; |
| 256 | 254 | ||
| 257 | /* eTSEC 3/4 are currently broken | ||
| 258 | enet2: ethernet@26000 { | 255 | enet2: ethernet@26000 { |
| 259 | #address-cells = <1>; | 256 | #address-cells = <1>; |
| 260 | #size-cells = <1>; | 257 | #size-cells = <1>; |
| @@ -310,7 +307,6 @@ | |||
| 310 | }; | 307 | }; |
| 311 | }; | 308 | }; |
| 312 | }; | 309 | }; |
| 313 | */ | ||
| 314 | 310 | ||
| 315 | serial0: serial@4500 { | 311 | serial0: serial@4500 { |
| 316 | cell-index = <0>; | 312 | cell-index = <0>; |
diff --git a/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts b/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts index 5bd1011fde96..3375c2ab0c32 100644 --- a/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts +++ b/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts | |||
| @@ -215,6 +215,18 @@ | |||
| 215 | clock-frequency = <0>; | 215 | clock-frequency = <0>; |
| 216 | }; | 216 | }; |
| 217 | 217 | ||
| 218 | msi@41600 { | ||
| 219 | compatible = "fsl,mpc8572-msi", "fsl,mpic-msi"; | ||
| 220 | reg = <0x41600 0x80>; | ||
| 221 | msi-available-ranges = <0 0x80>; | ||
| 222 | interrupts = < | ||
| 223 | 0xe0 0 | ||
| 224 | 0xe1 0 | ||
| 225 | 0xe2 0 | ||
| 226 | 0xe3 0>; | ||
| 227 | interrupt-parent = <&mpic>; | ||
| 228 | }; | ||
| 229 | |||
| 218 | global-utilities@e0000 { //global utilities block | 230 | global-utilities@e0000 { //global utilities block |
| 219 | compatible = "fsl,mpc8572-guts"; | 231 | compatible = "fsl,mpc8572-guts"; |
| 220 | reg = <0xe0000 0x1000>; | 232 | reg = <0xe0000 0x1000>; |
| @@ -243,8 +255,7 @@ | |||
| 243 | protected-sources = < | 255 | protected-sources = < |
| 244 | 31 32 33 37 38 39 /* enet2 enet3 */ | 256 | 31 32 33 37 38 39 /* enet2 enet3 */ |
| 245 | 76 77 78 79 26 42 /* dma2 pci2 serial*/ | 257 | 76 77 78 79 26 42 /* dma2 pci2 serial*/ |
| 246 | 0xe0 0xe1 0xe2 0xe3 /* msi */ | 258 | 0xe4 0xe5 0xe6 0xe7 /* msi */ |
| 247 | 0xe4 0xe5 0xe6 0xe7 | ||
| 248 | >; | 259 | >; |
| 249 | }; | 260 | }; |
| 250 | }; | 261 | }; |
diff --git a/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts b/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts index 0efc3456e297..e7b477f6a3fe 100644 --- a/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts +++ b/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts | |||
| @@ -154,12 +154,8 @@ | |||
| 154 | msi@41600 { | 154 | msi@41600 { |
| 155 | compatible = "fsl,mpc8572-msi", "fsl,mpic-msi"; | 155 | compatible = "fsl,mpc8572-msi", "fsl,mpic-msi"; |
| 156 | reg = <0x41600 0x80>; | 156 | reg = <0x41600 0x80>; |
| 157 | msi-available-ranges = <0 0x100>; | 157 | msi-available-ranges = <0x80 0x80>; |
| 158 | interrupts = < | 158 | interrupts = < |
| 159 | 0xe0 0 | ||
| 160 | 0xe1 0 | ||
| 161 | 0xe2 0 | ||
| 162 | 0xe3 0 | ||
| 163 | 0xe4 0 | 159 | 0xe4 0 |
| 164 | 0xe5 0 | 160 | 0xe5 0 |
| 165 | 0xe6 0 | 161 | 0xe6 0 |
| @@ -190,6 +186,7 @@ | |||
| 190 | 0x1 0x2 0x3 0x4 /* pci slot */ | 186 | 0x1 0x2 0x3 0x4 /* pci slot */ |
| 191 | 0x9 0xa 0xb 0xc /* usb */ | 187 | 0x9 0xa 0xb 0xc /* usb */ |
| 192 | 0x6 0x7 0xe 0x5 /* Audio elgacy SATA */ | 188 | 0x6 0x7 0xe 0x5 /* Audio elgacy SATA */ |
| 189 | 0xe0 0xe1 0xe2 0xe3 /* msi */ | ||
| 193 | >; | 190 | >; |
| 194 | }; | 191 | }; |
| 195 | }; | 192 | }; |
diff --git a/arch/powerpc/boot/dts/p1021mds.dts b/arch/powerpc/boot/dts/p1021mds.dts new file mode 100644 index 000000000000..7fad2df25981 --- /dev/null +++ b/arch/powerpc/boot/dts/p1021mds.dts | |||
| @@ -0,0 +1,698 @@ | |||
| 1 | /* | ||
| 2 | * P1021 MDS Device Tree Source | ||
| 3 | * | ||
| 4 | * Copyright 2010 Freescale Semiconductor Inc. | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify it | ||
| 7 | * under the terms of the GNU General Public License as published by the | ||
| 8 | * Free Software Foundation; either version 2 of the License, or (at your | ||
| 9 | * option) any later version. | ||
| 10 | */ | ||
| 11 | |||
| 12 | /dts-v1/; | ||
| 13 | / { | ||
| 14 | model = "fsl,P1021"; | ||
| 15 | compatible = "fsl,P1021MDS"; | ||
| 16 | #address-cells = <2>; | ||
| 17 | #size-cells = <2>; | ||
| 18 | |||
| 19 | aliases { | ||
| 20 | serial0 = &serial0; | ||
| 21 | serial1 = &serial1; | ||
| 22 | ethernet0 = &enet0; | ||
| 23 | ethernet1 = &enet1; | ||
| 24 | ethernet2 = &enet2; | ||
| 25 | ethernet3 = &enet3; | ||
| 26 | ethernet4 = &enet4; | ||
| 27 | pci0 = &pci0; | ||
| 28 | pci1 = &pci1; | ||
| 29 | }; | ||
| 30 | |||
| 31 | cpus { | ||
| 32 | #address-cells = <1>; | ||
| 33 | #size-cells = <0>; | ||
| 34 | |||
| 35 | PowerPC,P1021@0 { | ||
| 36 | device_type = "cpu"; | ||
| 37 | reg = <0x0>; | ||
| 38 | next-level-cache = <&L2>; | ||
| 39 | }; | ||
| 40 | |||
| 41 | PowerPC,P1021@1 { | ||
| 42 | device_type = "cpu"; | ||
| 43 | reg = <0x1>; | ||
| 44 | next-level-cache = <&L2>; | ||
| 45 | }; | ||
| 46 | }; | ||
| 47 | |||
| 48 | memory { | ||
| 49 | device_type = "memory"; | ||
| 50 | }; | ||
| 51 | |||
| 52 | localbus@ffe05000 { | ||
| 53 | #address-cells = <2>; | ||
| 54 | #size-cells = <1>; | ||
| 55 | compatible = "fsl,p1021-elbc", "fsl,elbc", "simple-bus"; | ||
| 56 | reg = <0 0xffe05000 0 0x1000>; | ||
| 57 | interrupts = <19 2>; | ||
| 58 | interrupt-parent = <&mpic>; | ||
| 59 | |||
| 60 | /* NAND Flash, BCSR, PMC0/1*/ | ||
| 61 | ranges = <0x0 0x0 0x0 0xfc000000 0x02000000 | ||
| 62 | 0x1 0x0 0x0 0xf8000000 0x00008000 | ||
| 63 | 0x2 0x0 0x0 0xf8010000 0x00020000 | ||
| 64 | 0x3 0x0 0x0 0xf8020000 0x00020000>; | ||
| 65 | |||
| 66 | nand@0,0 { | ||
| 67 | #address-cells = <1>; | ||
| 68 | #size-cells = <1>; | ||
| 69 | compatible = "fsl,p1021-fcm-nand", | ||
| 70 | "fsl,elbc-fcm-nand"; | ||
| 71 | reg = <0x0 0x0 0x40000>; | ||
| 72 | |||
| 73 | partition@0 { | ||
| 74 | /* This location must not be altered */ | ||
| 75 | /* 1MB for u-boot Bootloader Image */ | ||
| 76 | reg = <0x0 0x00100000>; | ||
| 77 | label = "NAND (RO) U-Boot Image"; | ||
| 78 | read-only; | ||
| 79 | }; | ||
| 80 | |||
| 81 | partition@100000 { | ||
| 82 | /* 1MB for DTB Image */ | ||
| 83 | reg = <0x00100000 0x00100000>; | ||
| 84 | label = "NAND (RO) DTB Image"; | ||
| 85 | read-only; | ||
| 86 | }; | ||
| 87 | |||
| 88 | partition@200000 { | ||
| 89 | /* 4MB for Linux Kernel Image */ | ||
| 90 | reg = <0x00200000 0x00400000>; | ||
| 91 | label = "NAND (RO) Linux Kernel Image"; | ||
| 92 | read-only; | ||
| 93 | }; | ||
| 94 | |||
| 95 | partition@600000 { | ||
| 96 | /* 5MB for Compressed Root file System Image */ | ||
| 97 | reg = <0x00600000 0x00500000>; | ||
| 98 | label = "NAND (RO) Compressed RFS Image"; | ||
| 99 | read-only; | ||
| 100 | }; | ||
| 101 | |||
| 102 | partition@b00000 { | ||
| 103 | /* 6MB for JFFS2 based Root file System */ | ||
| 104 | reg = <0x00a00000 0x00600000>; | ||
| 105 | label = "NAND (RW) JFFS2 Root File System"; | ||
| 106 | }; | ||
| 107 | |||
| 108 | partition@1100000 { | ||
| 109 | /* 14MB for JFFS2 based Root file System */ | ||
| 110 | reg = <0x01100000 0x00e00000>; | ||
| 111 | label = "NAND (RW) Writable User area"; | ||
| 112 | }; | ||
| 113 | |||
| 114 | partition@1f00000 { | ||
| 115 | /* 1MB for microcode */ | ||
| 116 | reg = <0x01f00000 0x00100000>; | ||
| 117 | label = "NAND (RO) QE Ucode"; | ||
| 118 | read-only; | ||
| 119 | }; | ||
| 120 | }; | ||
| 121 | |||
| 122 | bcsr@1,0 { | ||
| 123 | #address-cells = <1>; | ||
| 124 | #size-cells = <1>; | ||
| 125 | compatible = "fsl,p1021mds-bcsr"; | ||
| 126 | reg = <1 0 0x8000>; | ||
| 127 | ranges = <0 1 0 0x8000>; | ||
| 128 | }; | ||
| 129 | |||
| 130 | pib@2,0 { | ||
| 131 | compatible = "fsl,p1021mds-pib"; | ||
| 132 | reg = <2 0 0x10000>; | ||
| 133 | }; | ||
| 134 | |||
| 135 | pib@3,0 { | ||
| 136 | compatible = "fsl,p1021mds-pib"; | ||
| 137 | reg = <3 0 0x10000>; | ||
| 138 | }; | ||
| 139 | }; | ||
| 140 | |||
| 141 | soc@ffe00000 { | ||
| 142 | |||
| 143 | #address-cells = <1>; | ||
| 144 | #size-cells = <1>; | ||
| 145 | device_type = "soc"; | ||
| 146 | compatible = "fsl,p1021-immr", "simple-bus"; | ||
| 147 | ranges = <0x0 0x0 0xffe00000 0x100000>; | ||
| 148 | bus-frequency = <0>; // Filled out by uboot. | ||
| 149 | |||
| 150 | ecm-law@0 { | ||
| 151 | compatible = "fsl,ecm-law"; | ||
| 152 | reg = <0x0 0x1000>; | ||
| 153 | fsl,num-laws = <12>; | ||
| 154 | }; | ||
| 155 | |||
| 156 | ecm@1000 { | ||
| 157 | compatible = "fsl,p1021-ecm", "fsl,ecm"; | ||
| 158 | reg = <0x1000 0x1000>; | ||
| 159 | interrupts = <16 2>; | ||
| 160 | interrupt-parent = <&mpic>; | ||
| 161 | }; | ||
| 162 | |||
| 163 | memory-controller@2000 { | ||
| 164 | compatible = "fsl,p1021-memory-controller"; | ||
| 165 | reg = <0x2000 0x1000>; | ||
| 166 | interrupt-parent = <&mpic>; | ||
| 167 | interrupts = <16 2>; | ||
| 168 | }; | ||
| 169 | |||
| 170 | i2c@3000 { | ||
| 171 | #address-cells = <1>; | ||
| 172 | #size-cells = <0>; | ||
| 173 | cell-index = <0>; | ||
| 174 | compatible = "fsl-i2c"; | ||
| 175 | reg = <0x3000 0x100>; | ||
| 176 | interrupts = <43 2>; | ||
| 177 | interrupt-parent = <&mpic>; | ||
| 178 | dfsrr; | ||
| 179 | rtc@68 { | ||
| 180 | compatible = "dallas,ds1374"; | ||
| 181 | reg = <0x68>; | ||
| 182 | }; | ||
| 183 | }; | ||
| 184 | |||
| 185 | i2c@3100 { | ||
| 186 | #address-cells = <1>; | ||
| 187 | #size-cells = <0>; | ||
| 188 | cell-index = <1>; | ||
| 189 | compatible = "fsl-i2c"; | ||
| 190 | reg = <0x3100 0x100>; | ||
| 191 | interrupts = <43 2>; | ||
| 192 | interrupt-parent = <&mpic>; | ||
| 193 | dfsrr; | ||
| 194 | }; | ||
| 195 | |||
| 196 | serial0: serial@4500 { | ||
| 197 | cell-index = <0>; | ||
| 198 | device_type = "serial"; | ||
| 199 | compatible = "ns16550"; | ||
| 200 | reg = <0x4500 0x100>; | ||
| 201 | clock-frequency = <0>; | ||
| 202 | interrupts = <42 2>; | ||
| 203 | interrupt-parent = <&mpic>; | ||
| 204 | }; | ||
| 205 | |||
| 206 | serial1: serial@4600 { | ||
| 207 | cell-index = <1>; | ||
| 208 | device_type = "serial"; | ||
| 209 | compatible = "ns16550"; | ||
| 210 | reg = <0x4600 0x100>; | ||
| 211 | clock-frequency = <0>; | ||
| 212 | interrupts = <42 2>; | ||
| 213 | interrupt-parent = <&mpic>; | ||
| 214 | }; | ||
| 215 | |||
| 216 | spi@7000 { | ||
| 217 | cell-index = <0>; | ||
| 218 | #address-cells = <1>; | ||
| 219 | #size-cells = <0>; | ||
| 220 | compatible = "fsl,espi"; | ||
| 221 | reg = <0x7000 0x1000>; | ||
| 222 | interrupts = <59 0x2>; | ||
| 223 | interrupt-parent = <&mpic>; | ||
| 224 | espi,num-ss-bits = <4>; | ||
| 225 | mode = "cpu"; | ||
| 226 | |||
| 227 | fsl_m25p80@0 { | ||
| 228 | #address-cells = <1>; | ||
| 229 | #size-cells = <1>; | ||
| 230 | compatible = "fsl,espi-flash"; | ||
| 231 | reg = <0>; | ||
| 232 | linux,modalias = "fsl_m25p80"; | ||
| 233 | spi-max-frequency = <40000000>; /* input clock */ | ||
| 234 | partition@u-boot { | ||
| 235 | label = "u-boot-spi"; | ||
| 236 | reg = <0x00000000 0x00100000>; | ||
| 237 | read-only; | ||
| 238 | }; | ||
| 239 | partition@kernel { | ||
| 240 | label = "kernel-spi"; | ||
| 241 | reg = <0x00100000 0x00500000>; | ||
| 242 | read-only; | ||
| 243 | }; | ||
| 244 | partition@dtb { | ||
| 245 | label = "dtb-spi"; | ||
| 246 | reg = <0x00600000 0x00100000>; | ||
| 247 | read-only; | ||
| 248 | }; | ||
| 249 | partition@fs { | ||
| 250 | label = "file system-spi"; | ||
| 251 | reg = <0x00700000 0x00900000>; | ||
| 252 | }; | ||
| 253 | }; | ||
| 254 | }; | ||
| 255 | |||
| 256 | gpio: gpio-controller@f000 { | ||
| 257 | #gpio-cells = <2>; | ||
| 258 | compatible = "fsl,mpc8572-gpio"; | ||
| 259 | reg = <0xf000 0x100>; | ||
| 260 | interrupts = <47 0x2>; | ||
| 261 | interrupt-parent = <&mpic>; | ||
| 262 | gpio-controller; | ||
| 263 | }; | ||
| 264 | |||
| 265 | L2: l2-cache-controller@20000 { | ||
| 266 | compatible = "fsl,p1021-l2-cache-controller"; | ||
| 267 | reg = <0x20000 0x1000>; | ||
| 268 | cache-line-size = <32>; // 32 bytes | ||
| 269 | cache-size = <0x40000>; // L2,256K | ||
| 270 | interrupt-parent = <&mpic>; | ||
| 271 | interrupts = <16 2>; | ||
| 272 | }; | ||
| 273 | |||
| 274 | dma@21300 { | ||
| 275 | #address-cells = <1>; | ||
| 276 | #size-cells = <1>; | ||
| 277 | compatible = "fsl,eloplus-dma"; | ||
| 278 | reg = <0x21300 0x4>; | ||
| 279 | ranges = <0x0 0x21100 0x200>; | ||
| 280 | cell-index = <0>; | ||
| 281 | dma-channel@0 { | ||
| 282 | compatible = "fsl,eloplus-dma-channel"; | ||
| 283 | reg = <0x0 0x80>; | ||
| 284 | cell-index = <0>; | ||
| 285 | interrupt-parent = <&mpic>; | ||
| 286 | interrupts = <20 2>; | ||
| 287 | }; | ||
| 288 | dma-channel@80 { | ||
| 289 | compatible = "fsl,eloplus-dma-channel"; | ||
| 290 | reg = <0x80 0x80>; | ||
| 291 | cell-index = <1>; | ||
| 292 | interrupt-parent = <&mpic>; | ||
| 293 | interrupts = <21 2>; | ||
| 294 | }; | ||
| 295 | dma-channel@100 { | ||
| 296 | compatible = "fsl,eloplus-dma-channel"; | ||
| 297 | reg = <0x100 0x80>; | ||
| 298 | cell-index = <2>; | ||
| 299 | interrupt-parent = <&mpic>; | ||
| 300 | interrupts = <22 2>; | ||
| 301 | }; | ||
| 302 | dma-channel@180 { | ||
| 303 | compatible = "fsl,eloplus-dma-channel"; | ||
| 304 | reg = <0x180 0x80>; | ||
| 305 | cell-index = <3>; | ||
| 306 | interrupt-parent = <&mpic>; | ||
| 307 | interrupts = <23 2>; | ||
| 308 | }; | ||
| 309 | }; | ||
| 310 | |||
| 311 | usb@22000 { | ||
| 312 | #address-cells = <1>; | ||
| 313 | #size-cells = <0>; | ||
| 314 | compatible = "fsl-usb2-dr"; | ||
| 315 | reg = <0x22000 0x1000>; | ||
| 316 | interrupt-parent = <&mpic>; | ||
| 317 | interrupts = <28 0x2>; | ||
| 318 | phy_type = "ulpi"; | ||
| 319 | }; | ||
| 320 | |||
| 321 | mdio@24000 { | ||
| 322 | #address-cells = <1>; | ||
| 323 | #size-cells = <0>; | ||
| 324 | compatible = "fsl,etsec2-mdio"; | ||
| 325 | reg = <0x24000 0x1000 0xb0030 0x4>; | ||
| 326 | |||
| 327 | phy0: ethernet-phy@0 { | ||
| 328 | interrupt-parent = <&mpic>; | ||
| 329 | interrupts = <1 1>; | ||
| 330 | reg = <0x0>; | ||
| 331 | }; | ||
| 332 | phy1: ethernet-phy@1 { | ||
| 333 | interrupt-parent = <&mpic>; | ||
| 334 | interrupts = <2 1>; | ||
| 335 | reg = <0x1>; | ||
| 336 | }; | ||
| 337 | phy4: ethernet-phy@4 { | ||
| 338 | interrupt-parent = <&mpic>; | ||
| 339 | reg = <0x4>; | ||
| 340 | }; | ||
| 341 | }; | ||
| 342 | |||
| 343 | mdio@25000 { | ||
| 344 | #address-cells = <1>; | ||
| 345 | #size-cells = <0>; | ||
| 346 | compatible = "fsl,etsec2-tbi"; | ||
| 347 | reg = <0x25000 0x1000 0xb1030 0x4>; | ||
| 348 | tbi0: tbi-phy@11 { | ||
| 349 | reg = <0x11>; | ||
| 350 | device_type = "tbi-phy"; | ||
| 351 | }; | ||
| 352 | }; | ||
| 353 | |||
| 354 | enet0: ethernet@B0000 { | ||
| 355 | #address-cells = <1>; | ||
| 356 | #size-cells = <1>; | ||
| 357 | cell-index = <0>; | ||
| 358 | device_type = "network"; | ||
| 359 | model = "eTSEC"; | ||
| 360 | compatible = "fsl,etsec2"; | ||
| 361 | fsl,num_rx_queues = <0x8>; | ||
| 362 | fsl,num_tx_queues = <0x8>; | ||
| 363 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
| 364 | interrupt-parent = <&mpic>; | ||
| 365 | phy-handle = <&phy0>; | ||
| 366 | phy-connection-type = "rgmii-id"; | ||
| 367 | queue-group@0{ | ||
| 368 | #address-cells = <1>; | ||
| 369 | #size-cells = <1>; | ||
| 370 | reg = <0xB0000 0x1000>; | ||
| 371 | interrupts = <29 2 30 2 34 2>; | ||
| 372 | }; | ||
| 373 | queue-group@1{ | ||
| 374 | #address-cells = <1>; | ||
| 375 | #size-cells = <1>; | ||
| 376 | reg = <0xB4000 0x1000>; | ||
| 377 | interrupts = <17 2 18 2 24 2>; | ||
| 378 | }; | ||
| 379 | }; | ||
| 380 | |||
| 381 | enet1: ethernet@B1000 { | ||
| 382 | #address-cells = <1>; | ||
| 383 | #size-cells = <1>; | ||
| 384 | cell-index = <0>; | ||
| 385 | device_type = "network"; | ||
| 386 | model = "eTSEC"; | ||
| 387 | compatible = "fsl,etsec2"; | ||
| 388 | fsl,num_rx_queues = <0x8>; | ||
| 389 | fsl,num_tx_queues = <0x8>; | ||
| 390 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
| 391 | interrupt-parent = <&mpic>; | ||
| 392 | phy-handle = <&phy4>; | ||
| 393 | tbi-handle = <&tbi0>; | ||
| 394 | phy-connection-type = "sgmii"; | ||
| 395 | queue-group@0{ | ||
| 396 | #address-cells = <1>; | ||
| 397 | #size-cells = <1>; | ||
| 398 | reg = <0xB1000 0x1000>; | ||
| 399 | interrupts = <35 2 36 2 40 2>; | ||
| 400 | }; | ||
| 401 | queue-group@1{ | ||
| 402 | #address-cells = <1>; | ||
| 403 | #size-cells = <1>; | ||
| 404 | reg = <0xB5000 0x1000>; | ||
| 405 | interrupts = <51 2 52 2 67 2>; | ||
| 406 | }; | ||
| 407 | }; | ||
| 408 | |||
| 409 | enet2: ethernet@B2000 { | ||
| 410 | #address-cells = <1>; | ||
| 411 | #size-cells = <1>; | ||
| 412 | cell-index = <0>; | ||
| 413 | device_type = "network"; | ||
| 414 | model = "eTSEC"; | ||
| 415 | compatible = "fsl,etsec2"; | ||
| 416 | fsl,num_rx_queues = <0x8>; | ||
| 417 | fsl,num_tx_queues = <0x8>; | ||
| 418 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
| 419 | interrupt-parent = <&mpic>; | ||
| 420 | phy-handle = <&phy1>; | ||
| 421 | phy-connection-type = "rgmii-id"; | ||
| 422 | queue-group@0{ | ||
| 423 | #address-cells = <1>; | ||
| 424 | #size-cells = <1>; | ||
| 425 | reg = <0xB2000 0x1000>; | ||
| 426 | interrupts = <31 2 32 2 33 2>; | ||
| 427 | }; | ||
| 428 | queue-group@1{ | ||
| 429 | #address-cells = <1>; | ||
| 430 | #size-cells = <1>; | ||
| 431 | reg = <0xB6000 0x1000>; | ||
| 432 | interrupts = <25 2 26 2 27 2>; | ||
| 433 | }; | ||
| 434 | }; | ||
| 435 | |||
| 436 | sdhci@2e000 { | ||
| 437 | compatible = "fsl,p1021-esdhc", "fsl,esdhc"; | ||
| 438 | reg = <0x2e000 0x1000>; | ||
| 439 | interrupts = <72 0x2>; | ||
| 440 | interrupt-parent = <&mpic>; | ||
| 441 | /* Filled in by U-Boot */ | ||
| 442 | clock-frequency = <0>; | ||
| 443 | }; | ||
| 444 | |||
| 445 | crypto@30000 { | ||
| 446 | compatible = "fsl,sec3.3", "fsl,sec3.1", | ||
| 447 | "fsl,sec3.0", "fsl,sec2.4", | ||
| 448 | "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0"; | ||
| 449 | reg = <0x30000 0x10000>; | ||
| 450 | interrupts = <45 2 58 2>; | ||
| 451 | interrupt-parent = <&mpic>; | ||
| 452 | fsl,num-channels = <4>; | ||
| 453 | fsl,channel-fifo-len = <24>; | ||
| 454 | fsl,exec-units-mask = <0x97c>; | ||
| 455 | fsl,descriptor-types-mask = <0x3a30abf>; | ||
| 456 | }; | ||
| 457 | |||
| 458 | mpic: pic@40000 { | ||
| 459 | interrupt-controller; | ||
| 460 | #address-cells = <0>; | ||
| 461 | #interrupt-cells = <2>; | ||
| 462 | reg = <0x40000 0x40000>; | ||
| 463 | compatible = "chrp,open-pic"; | ||
| 464 | device_type = "open-pic"; | ||
| 465 | }; | ||
| 466 | |||
| 467 | msi@41600 { | ||
| 468 | compatible = "fsl,p1021-msi", "fsl,mpic-msi"; | ||
| 469 | reg = <0x41600 0x80>; | ||
| 470 | msi-available-ranges = <0 0x100>; | ||
| 471 | interrupts = < | ||
| 472 | 0xe0 0 | ||
| 473 | 0xe1 0 | ||
| 474 | 0xe2 0 | ||
| 475 | 0xe3 0 | ||
| 476 | 0xe4 0 | ||
| 477 | 0xe5 0 | ||
| 478 | 0xe6 0 | ||
| 479 | 0xe7 0>; | ||
| 480 | interrupt-parent = <&mpic>; | ||
| 481 | }; | ||
| 482 | |||
| 483 | global-utilities@e0000 { //global utilities block | ||
| 484 | compatible = "fsl,p1021-guts"; | ||
| 485 | reg = <0xe0000 0x1000>; | ||
| 486 | fsl,has-rstcr; | ||
| 487 | }; | ||
| 488 | |||
| 489 | par_io@e0100 { | ||
| 490 | #address-cells = <1>; | ||
| 491 | #size-cells = <1>; | ||
| 492 | reg = <0xe0100 0x60>; | ||
| 493 | ranges = <0x0 0xe0100 0x60>; | ||
| 494 | device_type = "par_io"; | ||
| 495 | num-ports = <3>; | ||
| 496 | pio1: ucc_pin@01 { | ||
| 497 | pio-map = < | ||
| 498 | /* port pin dir open_drain assignment has_irq */ | ||
| 499 | 0x1 0x13 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */ | ||
| 500 | 0x1 0x14 0x3 0x0 0x1 0x0 /* QE_MUX_MDIO */ | ||
| 501 | 0x0 0x17 0x2 0x0 0x2 0x0 /* CLK12 */ | ||
| 502 | 0x0 0x18 0x2 0x0 0x1 0x0 /* CLK9 | ||
| 503 | */ | ||
| 504 | 0x0 0x7 0x1 0x0 0x2 0x0 /* ENET1_TXD0_SER1_TXD0 */ | ||
| 505 | 0x0 0x9 0x1 0x0 0x2 0x0 /* ENET1_TXD1_SER1_TXD1 */ | ||
| 506 | 0x0 0xb 0x1 0x0 0x2 0x0 /* ENET1_TXD2_SER1_TXD2 */ | ||
| 507 | 0x0 0xc 0x1 0x0 0x2 0x0 /* ENET1_TXD3_SER1_TXD3 */ | ||
| 508 | 0x0 0x6 0x2 0x0 0x2 0x0 /* ENET1_RXD0_SER1_RXD0 */ | ||
| 509 | 0x0 0xa 0x2 0x0 0x2 0x0 /* ENET1_RXD1_SER1_RXD1 */ | ||
| 510 | 0x0 0xe 0x2 0x0 0x2 0x0 /* ENET1_RXD2_SER1_RXD2 */ | ||
| 511 | 0x0 0xf 0x2 0x0 0x2 0x0 /* ENET1_RXD3_SER1_RXD3 */ | ||
| 512 | 0x0 0x5 0x1 0x0 0x2 0x0 /* ENET1_TX_EN_SER1_RTS_B */ | ||
| 513 | 0x0 0xd 0x1 0x0 0x2 0x0 /* ENET1_TX_ER */ | ||
| 514 | 0x0 0x4 0x2 0x0 0x2 0x0 /* ENET1_RX_DV_SER1_CTS_B */ | ||
| 515 | 0x0 0x8 0x2 0x0 0x2 0x0 /* ENET1_RX_ER_SER1_CD_B */ | ||
| 516 | 0x0 0x11 0x2 0x0 0x2 0x0 /* ENET1_CRS */ | ||
| 517 | 0x0 0x10 0x2 0x0 0x2 0x0>; /* ENET1_COL */ | ||
| 518 | }; | ||
| 519 | |||
| 520 | pio2: ucc_pin@02 { | ||
| 521 | pio-map = < | ||
| 522 | /* port pin dir open_drain assignment has_irq */ | ||
| 523 | 0x1 0x13 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */ | ||
| 524 | 0x1 0x14 0x3 0x0 0x1 0x0 /* QE_MUX_MDIO */ | ||
| 525 | 0x1 0xb 0x2 0x0 0x1 0x0 /* CLK13 */ | ||
| 526 | 0x1 0x7 0x1 0x0 0x2 0x0 /* ENET5_TXD0_SER5_TXD0 */ | ||
| 527 | 0x1 0xa 0x1 0x0 0x2 0x0 /* ENET5_TXD1_SER5_TXD1 */ | ||
| 528 | 0x1 0x6 0x2 0x0 0x2 0x0 /* ENET5_RXD0_SER5_RXD0 */ | ||
| 529 | 0x1 0x9 0x2 0x0 0x2 0x0 /* ENET5_RXD1_SER5_RXD1 */ | ||
| 530 | 0x1 0x5 0x1 0x0 0x2 0x0 /* ENET5_TX_EN_SER5_RTS_B */ | ||
| 531 | 0x1 0x4 0x2 0x0 0x2 0x0 /* ENET5_RX_DV_SER5_CTS_B */ | ||
| 532 | 0x1 0x8 0x2 0x0 0x2 0x0>; /* ENET5_RX_ER_SER5_CD_B */ | ||
| 533 | }; | ||
| 534 | }; | ||
| 535 | }; | ||
| 536 | |||
| 537 | pci0: pcie@ffe09000 { | ||
| 538 | compatible = "fsl,mpc8548-pcie"; | ||
| 539 | device_type = "pci"; | ||
| 540 | #interrupt-cells = <1>; | ||
| 541 | #size-cells = <2>; | ||
| 542 | #address-cells = <3>; | ||
| 543 | reg = <0 0xffe09000 0 0x1000>; | ||
| 544 | bus-range = <0 255>; | ||
| 545 | ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 | ||
| 546 | 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; | ||
| 547 | clock-frequency = <33333333>; | ||
| 548 | interrupt-parent = <&mpic>; | ||
| 549 | interrupts = <16 2>; | ||
| 550 | interrupt-map-mask = <0xf800 0 0 7>; | ||
| 551 | interrupt-map = < | ||
| 552 | /* IDSEL 0x0 */ | ||
| 553 | 0000 0 0 1 &mpic 4 1 | ||
| 554 | 0000 0 0 2 &mpic 5 1 | ||
| 555 | 0000 0 0 3 &mpic 6 1 | ||
| 556 | 0000 0 0 4 &mpic 7 1 | ||
| 557 | >; | ||
| 558 | pcie@0 { | ||
| 559 | reg = <0x0 0x0 0x0 0x0 0x0>; | ||
| 560 | #size-cells = <2>; | ||
| 561 | #address-cells = <3>; | ||
| 562 | device_type = "pci"; | ||
| 563 | ranges = <0x2000000 0x0 0xa0000000 | ||
| 564 | 0x2000000 0x0 0xa0000000 | ||
| 565 | 0x0 0x20000000 | ||
| 566 | |||
| 567 | 0x1000000 0x0 0x0 | ||
| 568 | 0x1000000 0x0 0x0 | ||
| 569 | 0x0 0x100000>; | ||
| 570 | }; | ||
| 571 | }; | ||
| 572 | |||
| 573 | pci1: pcie@ffe0a000 { | ||
| 574 | compatible = "fsl,mpc8548-pcie"; | ||
| 575 | device_type = "pci"; | ||
| 576 | #interrupt-cells = <1>; | ||
| 577 | #size-cells = <2>; | ||
| 578 | #address-cells = <3>; | ||
| 579 | reg = <0 0xffe0a000 0 0x1000>; | ||
| 580 | bus-range = <0 255>; | ||
| 581 | ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000 | ||
| 582 | 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>; | ||
| 583 | clock-frequency = <33333333>; | ||
| 584 | interrupt-parent = <&mpic>; | ||
| 585 | interrupts = <16 2>; | ||
| 586 | interrupt-map-mask = <0xf800 0 0 7>; | ||
| 587 | interrupt-map = < | ||
| 588 | /* IDSEL 0x0 */ | ||
| 589 | 0000 0 0 1 &mpic 0 1 | ||
| 590 | 0000 0 0 2 &mpic 1 1 | ||
| 591 | 0000 0 0 3 &mpic 2 1 | ||
| 592 | 0000 0 0 4 &mpic 3 1 | ||
| 593 | >; | ||
| 594 | pcie@0 { | ||
| 595 | reg = <0x0 0x0 0x0 0x0 0x0>; | ||
| 596 | #size-cells = <2>; | ||
| 597 | #address-cells = <3>; | ||
| 598 | device_type = "pci"; | ||
| 599 | ranges = <0x2000000 0x0 0xc0000000 | ||
| 600 | 0x2000000 0x0 0xc0000000 | ||
| 601 | 0x0 0x20000000 | ||
| 602 | |||
| 603 | 0x1000000 0x0 0x0 | ||
| 604 | 0x1000000 0x0 0x0 | ||
| 605 | 0x0 0x100000>; | ||
| 606 | }; | ||
| 607 | }; | ||
| 608 | |||
| 609 | qe@ffe80000 { | ||
| 610 | #address-cells = <1>; | ||
| 611 | #size-cells = <1>; | ||
| 612 | device_type = "qe"; | ||
| 613 | compatible = "fsl,qe"; | ||
| 614 | ranges = <0x0 0x0 0xffe80000 0x40000>; | ||
| 615 | reg = <0 0xffe80000 0 0x480>; | ||
| 616 | brg-frequency = <0>; | ||
| 617 | bus-frequency = <0>; | ||
| 618 | fsl,qe-num-riscs = <1>; | ||
| 619 | fsl,qe-num-snums = <28>; | ||
| 620 | |||
| 621 | qeic: interrupt-controller@80 { | ||
| 622 | interrupt-controller; | ||
| 623 | compatible = "fsl,qe-ic"; | ||
| 624 | #address-cells = <0>; | ||
| 625 | #interrupt-cells = <1>; | ||
| 626 | reg = <0x80 0x80>; | ||
| 627 | interrupts = <63 2 60 2>; //high:47 low:44 | ||
| 628 | interrupt-parent = <&mpic>; | ||
| 629 | }; | ||
| 630 | |||
| 631 | enet3: ucc@2000 { | ||
| 632 | device_type = "network"; | ||
| 633 | compatible = "ucc_geth"; | ||
| 634 | cell-index = <1>; | ||
| 635 | reg = <0x2000 0x200>; | ||
| 636 | interrupts = <32>; | ||
| 637 | interrupt-parent = <&qeic>; | ||
| 638 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
| 639 | rx-clock-name = "clk12"; | ||
| 640 | tx-clock-name = "clk9"; | ||
| 641 | pio-handle = <&pio1>; | ||
| 642 | phy-handle = <&qe_phy0>; | ||
| 643 | phy-connection-type = "mii"; | ||
| 644 | }; | ||
| 645 | |||
| 646 | mdio@2120 { | ||
| 647 | #address-cells = <1>; | ||
| 648 | #size-cells = <0>; | ||
| 649 | reg = <0x2120 0x18>; | ||
| 650 | compatible = "fsl,ucc-mdio"; | ||
| 651 | |||
| 652 | qe_phy0: ethernet-phy@0 { | ||
| 653 | interrupt-parent = <&mpic>; | ||
| 654 | interrupts = <4 1>; | ||
| 655 | reg = <0x0>; | ||
| 656 | device_type = "ethernet-phy"; | ||
| 657 | }; | ||
| 658 | qe_phy1: ethernet-phy@03 { | ||
| 659 | interrupt-parent = <&mpic>; | ||
| 660 | interrupts = <5 1>; | ||
| 661 | reg = <0x3>; | ||
| 662 | device_type = "ethernet-phy"; | ||
| 663 | }; | ||
| 664 | tbi-phy@11 { | ||
| 665 | reg = <0x11>; | ||
| 666 | device_type = "tbi-phy"; | ||
| 667 | }; | ||
| 668 | }; | ||
| 669 | |||
| 670 | enet4: ucc@2400 { | ||
| 671 | device_type = "network"; | ||
| 672 | compatible = "ucc_geth"; | ||
| 673 | cell-index = <5>; | ||
| 674 | reg = <0x2400 0x200>; | ||
| 675 | interrupts = <40>; | ||
| 676 | interrupt-parent = <&qeic>; | ||
| 677 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
| 678 | rx-clock-name = "none"; | ||
| 679 | tx-clock-name = "clk13"; | ||
| 680 | pio-handle = <&pio2>; | ||
| 681 | phy-handle = <&qe_phy1>; | ||
| 682 | phy-connection-type = "rmii"; | ||
| 683 | }; | ||
| 684 | |||
| 685 | muram@10000 { | ||
| 686 | #address-cells = <1>; | ||
| 687 | #size-cells = <1>; | ||
| 688 | compatible = "fsl,qe-muram", "fsl,cpm-muram"; | ||
| 689 | ranges = <0x0 0x10000 0x6000>; | ||
| 690 | |||
| 691 | data-only@0 { | ||
| 692 | compatible = "fsl,qe-muram-data", | ||
| 693 | "fsl,cpm-muram-data"; | ||
| 694 | reg = <0x0 0x6000>; | ||
| 695 | }; | ||
| 696 | }; | ||
| 697 | }; | ||
| 698 | }; | ||
diff --git a/arch/powerpc/boot/dts/redwood.dts b/arch/powerpc/boot/dts/redwood.dts index d2af32e2bf7a..81636c01d906 100644 --- a/arch/powerpc/boot/dts/redwood.dts +++ b/arch/powerpc/boot/dts/redwood.dts | |||
| @@ -234,10 +234,132 @@ | |||
| 234 | has-inverted-stacr-oc; | 234 | has-inverted-stacr-oc; |
| 235 | has-new-stacr-staopc; | 235 | has-new-stacr-staopc; |
| 236 | }; | 236 | }; |
| 237 | }; | ||
| 238 | PCIE0: pciex@d00000000 { | ||
| 239 | device_type = "pci"; | ||
| 240 | #interrupt-cells = <1>; | ||
| 241 | #size-cells = <2>; | ||
| 242 | #address-cells = <3>; | ||
| 243 | compatible = "ibm,plb-pciex-460sx", "ibm,plb-pciex"; | ||
| 244 | primary; | ||
| 245 | port = <0x0>; /* port number */ | ||
| 246 | reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */ | ||
| 247 | 0x0000000c 0x10000000 0x00001000>; /* Registers */ | ||
| 248 | dcr-reg = <0x100 0x020>; | ||
| 249 | sdr-base = <0x300>; | ||
| 250 | |||
| 251 | /* Outbound ranges, one memory and one IO, | ||
| 252 | * later cannot be changed | ||
| 253 | */ | ||
| 254 | ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000 | ||
| 255 | 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>; | ||
| 256 | |||
| 257 | /* Inbound 2GB range starting at 0 */ | ||
| 258 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; | ||
| 237 | 259 | ||
| 260 | /* This drives busses 10 to 0x1f */ | ||
| 261 | bus-range = <0x10 0x1f>; | ||
| 262 | |||
| 263 | /* Legacy interrupts (note the weird polarity, the bridge seems | ||
| 264 | * to invert PCIe legacy interrupts). | ||
| 265 | * We are de-swizzling here because the numbers are actually for | ||
| 266 | * port of the root complex virtual P2P bridge. But I want | ||
| 267 | * to avoid putting a node for it in the tree, so the numbers | ||
| 268 | * below are basically de-swizzled numbers. | ||
| 269 | * The real slot is on idsel 0, so the swizzling is 1:1 | ||
| 270 | */ | ||
| 271 | interrupt-map-mask = <0x0 0x0 0x0 0x7>; | ||
| 272 | interrupt-map = < | ||
| 273 | 0x0 0x0 0x0 0x1 &UIC3 0x0 0x4 /* swizzled int A */ | ||
| 274 | 0x0 0x0 0x0 0x2 &UIC3 0x1 0x4 /* swizzled int B */ | ||
| 275 | 0x0 0x0 0x0 0x3 &UIC3 0x2 0x4 /* swizzled int C */ | ||
| 276 | 0x0 0x0 0x0 0x4 &UIC3 0x3 0x4 /* swizzled int D */>; | ||
| 277 | }; | ||
| 278 | |||
| 279 | PCIE1: pciex@d20000000 { | ||
| 280 | device_type = "pci"; | ||
| 281 | #interrupt-cells = <1>; | ||
| 282 | #size-cells = <2>; | ||
| 283 | #address-cells = <3>; | ||
| 284 | compatible = "ibm,plb-pciex-460sx", "ibm,plb-pciex"; | ||
| 285 | primary; | ||
| 286 | port = <0x1>; /* port number */ | ||
| 287 | reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */ | ||
| 288 | 0x0000000c 0x10001000 0x00001000>; /* Registers */ | ||
| 289 | dcr-reg = <0x120 0x020>; | ||
| 290 | sdr-base = <0x340>; | ||
| 291 | |||
| 292 | /* Outbound ranges, one memory and one IO, | ||
| 293 | * later cannot be changed | ||
| 294 | */ | ||
| 295 | ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000 | ||
| 296 | 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>; | ||
| 297 | |||
| 298 | /* Inbound 2GB range starting at 0 */ | ||
| 299 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; | ||
| 300 | |||
| 301 | /* This drives busses 10 to 0x1f */ | ||
| 302 | bus-range = <0x20 0x2f>; | ||
| 303 | |||
| 304 | /* Legacy interrupts (note the weird polarity, the bridge seems | ||
| 305 | * to invert PCIe legacy interrupts). | ||
| 306 | * We are de-swizzling here because the numbers are actually for | ||
| 307 | * port of the root complex virtual P2P bridge. But I want | ||
| 308 | * to avoid putting a node for it in the tree, so the numbers | ||
| 309 | * below are basically de-swizzled numbers. | ||
| 310 | * The real slot is on idsel 0, so the swizzling is 1:1 | ||
| 311 | */ | ||
| 312 | interrupt-map-mask = <0x0 0x0 0x0 0x7>; | ||
| 313 | interrupt-map = < | ||
| 314 | 0x0 0x0 0x0 0x1 &UIC3 0x4 0x4 /* swizzled int A */ | ||
| 315 | 0x0 0x0 0x0 0x2 &UIC3 0x5 0x4 /* swizzled int B */ | ||
| 316 | 0x0 0x0 0x0 0x3 &UIC3 0x6 0x4 /* swizzled int C */ | ||
| 317 | 0x0 0x0 0x0 0x4 &UIC3 0x7 0x4 /* swizzled int D */>; | ||
| 318 | }; | ||
| 319 | |||
| 320 | PCIE2: pciex@d40000000 { | ||
| 321 | device_type = "pci"; | ||
| 322 | #interrupt-cells = <1>; | ||
| 323 | #size-cells = <2>; | ||
| 324 | #address-cells = <3>; | ||
| 325 | compatible = "ibm,plb-pciex-460sx", "ibm,plb-pciex"; | ||
| 326 | primary; | ||
| 327 | port = <0x2>; /* port number */ | ||
| 328 | reg = <0x0000000d 0x40000000 0x20000000 /* Config space access */ | ||
| 329 | 0x0000000c 0x10002000 0x00001000>; /* Registers */ | ||
| 330 | dcr-reg = <0x140 0x020>; | ||
| 331 | sdr-base = <0x370>; | ||
| 332 | |||
| 333 | /* Outbound ranges, one memory and one IO, | ||
| 334 | * later cannot be changed | ||
| 335 | */ | ||
| 336 | ranges = <0x02000000 0x00000000 0x80000000 0x0000000f 0x00000000 0x00000000 0x80000000 | ||
| 337 | 0x01000000 0x00000000 0x00000000 0x0000000f 0x80020000 0x00000000 0x00010000>; | ||
| 338 | |||
| 339 | /* Inbound 2GB range starting at 0 */ | ||
| 340 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; | ||
| 341 | |||
| 342 | /* This drives busses 10 to 0x1f */ | ||
| 343 | bus-range = <0x30 0x3f>; | ||
| 344 | |||
| 345 | /* Legacy interrupts (note the weird polarity, the bridge seems | ||
| 346 | * to invert PCIe legacy interrupts). | ||
| 347 | * We are de-swizzling here because the numbers are actually for | ||
| 348 | * port of the root complex virtual P2P bridge. But I want | ||
| 349 | * to avoid putting a node for it in the tree, so the numbers | ||
| 350 | * below are basically de-swizzled numbers. | ||
| 351 | * The real slot is on idsel 0, so the swizzling is 1:1 | ||
| 352 | */ | ||
| 353 | interrupt-map-mask = <0x0 0x0 0x0 0x7>; | ||
| 354 | interrupt-map = < | ||
| 355 | 0x0 0x0 0x0 0x1 &UIC3 0x8 0x4 /* swizzled int A */ | ||
| 356 | 0x0 0x0 0x0 0x2 &UIC3 0x9 0x4 /* swizzled int B */ | ||
| 357 | 0x0 0x0 0x0 0x3 &UIC3 0xa 0x4 /* swizzled int C */ | ||
| 358 | 0x0 0x0 0x0 0x4 &UIC3 0xb 0x4 /* swizzled int D */>; | ||
| 238 | }; | 359 | }; |
| 239 | 360 | ||
| 240 | }; | 361 | }; |
| 362 | |||
| 241 | chosen { | 363 | chosen { |
| 242 | linux,stdout-path = "/plb/opb/serial@ef600200"; | 364 | linux,stdout-path = "/plb/opb/serial@ef600200"; |
| 243 | }; | 365 | }; |
diff --git a/arch/powerpc/configs/44x/icon_defconfig b/arch/powerpc/configs/44x/icon_defconfig new file mode 100644 index 000000000000..277f88c2750f --- /dev/null +++ b/arch/powerpc/configs/44x/icon_defconfig | |||
| @@ -0,0 +1,1451 @@ | |||
| 1 | # | ||
| 2 | # Automatically generated make config: don't edit | ||
| 3 | # Linux kernel version: 2.6.34-rc7 | ||
| 4 | # Fri May 21 17:40:22 2010 | ||
| 5 | # | ||
| 6 | # CONFIG_PPC64 is not set | ||
| 7 | |||
| 8 | # | ||
| 9 | # Processor support | ||
| 10 | # | ||
| 11 | # CONFIG_PPC_BOOK3S_32 is not set | ||
| 12 | # CONFIG_PPC_85xx is not set | ||
| 13 | # CONFIG_PPC_8xx is not set | ||
| 14 | # CONFIG_40x is not set | ||
| 15 | CONFIG_44x=y | ||
| 16 | # CONFIG_E200 is not set | ||
| 17 | CONFIG_4xx=y | ||
| 18 | CONFIG_BOOKE=y | ||
| 19 | CONFIG_PTE_64BIT=y | ||
| 20 | CONFIG_PHYS_64BIT=y | ||
| 21 | CONFIG_PPC_MMU_NOHASH=y | ||
| 22 | CONFIG_PPC_MMU_NOHASH_32=y | ||
| 23 | # CONFIG_PPC_MM_SLICES is not set | ||
| 24 | CONFIG_NOT_COHERENT_CACHE=y | ||
| 25 | CONFIG_PPC32=y | ||
| 26 | CONFIG_WORD_SIZE=32 | ||
| 27 | CONFIG_ARCH_PHYS_ADDR_T_64BIT=y | ||
| 28 | CONFIG_MMU=y | ||
| 29 | CONFIG_GENERIC_CMOS_UPDATE=y | ||
| 30 | CONFIG_GENERIC_TIME=y | ||
| 31 | CONFIG_GENERIC_TIME_VSYSCALL=y | ||
| 32 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
| 33 | CONFIG_GENERIC_HARDIRQS=y | ||
| 34 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
| 35 | # CONFIG_HAVE_SETUP_PER_CPU_AREA is not set | ||
| 36 | # CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK is not set | ||
| 37 | CONFIG_IRQ_PER_CPU=y | ||
| 38 | CONFIG_NR_IRQS=512 | ||
| 39 | CONFIG_STACKTRACE_SUPPORT=y | ||
| 40 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | ||
| 41 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
| 42 | CONFIG_LOCKDEP_SUPPORT=y | ||
| 43 | CONFIG_RWSEM_XCHGADD_ALGORITHM=y | ||
| 44 | CONFIG_ARCH_HAS_ILOG2_U32=y | ||
| 45 | CONFIG_GENERIC_HWEIGHT=y | ||
| 46 | CONFIG_GENERIC_FIND_NEXT_BIT=y | ||
| 47 | # CONFIG_ARCH_NO_VIRT_TO_BUS is not set | ||
| 48 | CONFIG_PPC=y | ||
| 49 | CONFIG_EARLY_PRINTK=y | ||
| 50 | CONFIG_GENERIC_NVRAM=y | ||
| 51 | CONFIG_SCHED_OMIT_FRAME_POINTER=y | ||
| 52 | CONFIG_ARCH_MAY_HAVE_PC_FDC=y | ||
| 53 | CONFIG_PPC_OF=y | ||
| 54 | CONFIG_OF=y | ||
| 55 | CONFIG_PPC_UDBG_16550=y | ||
| 56 | # CONFIG_GENERIC_TBSYNC is not set | ||
| 57 | CONFIG_AUDIT_ARCH=y | ||
| 58 | CONFIG_GENERIC_BUG=y | ||
| 59 | CONFIG_DTC=y | ||
| 60 | # CONFIG_DEFAULT_UIMAGE is not set | ||
| 61 | CONFIG_ARCH_HIBERNATION_POSSIBLE=y | ||
| 62 | CONFIG_PPC_DCR_NATIVE=y | ||
| 63 | # CONFIG_PPC_DCR_MMIO is not set | ||
| 64 | CONFIG_PPC_DCR=y | ||
| 65 | CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y | ||
| 66 | CONFIG_PPC_ADV_DEBUG_REGS=y | ||
| 67 | CONFIG_PPC_ADV_DEBUG_IACS=4 | ||
| 68 | CONFIG_PPC_ADV_DEBUG_DACS=2 | ||
| 69 | CONFIG_PPC_ADV_DEBUG_DVCS=2 | ||
| 70 | CONFIG_PPC_ADV_DEBUG_DAC_RANGE=y | ||
| 71 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
| 72 | CONFIG_CONSTRUCTORS=y | ||
| 73 | |||
| 74 | # | ||
| 75 | # General setup | ||
| 76 | # | ||
| 77 | CONFIG_EXPERIMENTAL=y | ||
| 78 | CONFIG_BROKEN_ON_SMP=y | ||
| 79 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
| 80 | CONFIG_LOCALVERSION="" | ||
| 81 | CONFIG_LOCALVERSION_AUTO=y | ||
| 82 | CONFIG_SWAP=y | ||
| 83 | CONFIG_SYSVIPC=y | ||
| 84 | CONFIG_SYSVIPC_SYSCTL=y | ||
| 85 | CONFIG_POSIX_MQUEUE=y | ||
| 86 | CONFIG_POSIX_MQUEUE_SYSCTL=y | ||
| 87 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
| 88 | # CONFIG_TASKSTATS is not set | ||
| 89 | # CONFIG_AUDIT is not set | ||
| 90 | |||
| 91 | # | ||
| 92 | # RCU Subsystem | ||
| 93 | # | ||
| 94 | CONFIG_TREE_RCU=y | ||
| 95 | # CONFIG_TREE_PREEMPT_RCU is not set | ||
| 96 | # CONFIG_TINY_RCU is not set | ||
| 97 | # CONFIG_RCU_TRACE is not set | ||
| 98 | CONFIG_RCU_FANOUT=32 | ||
| 99 | # CONFIG_RCU_FANOUT_EXACT is not set | ||
| 100 | # CONFIG_TREE_RCU_TRACE is not set | ||
| 101 | # CONFIG_IKCONFIG is not set | ||
| 102 | CONFIG_LOG_BUF_SHIFT=14 | ||
| 103 | # CONFIG_CGROUPS is not set | ||
| 104 | CONFIG_SYSFS_DEPRECATED=y | ||
| 105 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
| 106 | # CONFIG_RELAY is not set | ||
| 107 | # CONFIG_NAMESPACES is not set | ||
| 108 | CONFIG_BLK_DEV_INITRD=y | ||
| 109 | CONFIG_INITRAMFS_SOURCE="" | ||
| 110 | CONFIG_RD_GZIP=y | ||
| 111 | # CONFIG_RD_BZIP2 is not set | ||
| 112 | # CONFIG_RD_LZMA is not set | ||
| 113 | # CONFIG_RD_LZO is not set | ||
| 114 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
| 115 | CONFIG_SYSCTL=y | ||
| 116 | CONFIG_ANON_INODES=y | ||
| 117 | CONFIG_EMBEDDED=y | ||
| 118 | CONFIG_SYSCTL_SYSCALL=y | ||
| 119 | CONFIG_KALLSYMS=y | ||
| 120 | # CONFIG_KALLSYMS_ALL is not set | ||
| 121 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | ||
| 122 | CONFIG_HOTPLUG=y | ||
| 123 | CONFIG_PRINTK=y | ||
| 124 | # CONFIG_LOGBUFFER is not set | ||
| 125 | CONFIG_BUG=y | ||
| 126 | CONFIG_ELF_CORE=y | ||
| 127 | CONFIG_BASE_FULL=y | ||
| 128 | CONFIG_FUTEX=y | ||
| 129 | CONFIG_EPOLL=y | ||
| 130 | CONFIG_SIGNALFD=y | ||
| 131 | CONFIG_TIMERFD=y | ||
| 132 | CONFIG_EVENTFD=y | ||
| 133 | CONFIG_SHMEM=y | ||
| 134 | CONFIG_AIO=y | ||
| 135 | CONFIG_HAVE_PERF_EVENTS=y | ||
| 136 | |||
| 137 | # | ||
| 138 | # Kernel Performance Events And Counters | ||
| 139 | # | ||
| 140 | # CONFIG_PERF_EVENTS is not set | ||
| 141 | # CONFIG_PERF_COUNTERS is not set | ||
| 142 | CONFIG_VM_EVENT_COUNTERS=y | ||
| 143 | CONFIG_PCI_QUIRKS=y | ||
| 144 | CONFIG_SLUB_DEBUG=y | ||
| 145 | CONFIG_COMPAT_BRK=y | ||
| 146 | # CONFIG_SLAB is not set | ||
| 147 | CONFIG_SLUB=y | ||
| 148 | # CONFIG_SLOB is not set | ||
| 149 | # CONFIG_PROFILING is not set | ||
| 150 | CONFIG_HAVE_OPROFILE=y | ||
| 151 | # CONFIG_KPROBES is not set | ||
| 152 | CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y | ||
| 153 | CONFIG_HAVE_IOREMAP_PROT=y | ||
| 154 | CONFIG_HAVE_KPROBES=y | ||
| 155 | CONFIG_HAVE_KRETPROBES=y | ||
| 156 | CONFIG_HAVE_ARCH_TRACEHOOK=y | ||
| 157 | CONFIG_HAVE_DMA_ATTRS=y | ||
| 158 | CONFIG_HAVE_DMA_API_DEBUG=y | ||
| 159 | |||
| 160 | # | ||
| 161 | # GCOV-based kernel profiling | ||
| 162 | # | ||
| 163 | # CONFIG_SLOW_WORK is not set | ||
| 164 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set | ||
| 165 | CONFIG_SLABINFO=y | ||
| 166 | CONFIG_RT_MUTEXES=y | ||
| 167 | CONFIG_BASE_SMALL=0 | ||
| 168 | CONFIG_MODULES=y | ||
| 169 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
| 170 | CONFIG_MODULE_UNLOAD=y | ||
| 171 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
| 172 | # CONFIG_MODVERSIONS is not set | ||
| 173 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
| 174 | CONFIG_BLOCK=y | ||
| 175 | CONFIG_LBDAF=y | ||
| 176 | # CONFIG_BLK_DEV_BSG is not set | ||
| 177 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
| 178 | |||
| 179 | # | ||
| 180 | # IO Schedulers | ||
| 181 | # | ||
| 182 | CONFIG_IOSCHED_NOOP=y | ||
| 183 | CONFIG_IOSCHED_DEADLINE=y | ||
| 184 | CONFIG_IOSCHED_CFQ=y | ||
| 185 | # CONFIG_DEFAULT_DEADLINE is not set | ||
| 186 | CONFIG_DEFAULT_CFQ=y | ||
| 187 | # CONFIG_DEFAULT_NOOP is not set | ||
| 188 | CONFIG_DEFAULT_IOSCHED="cfq" | ||
| 189 | # CONFIG_INLINE_SPIN_TRYLOCK is not set | ||
| 190 | # CONFIG_INLINE_SPIN_TRYLOCK_BH is not set | ||
| 191 | # CONFIG_INLINE_SPIN_LOCK is not set | ||
| 192 | # CONFIG_INLINE_SPIN_LOCK_BH is not set | ||
| 193 | # CONFIG_INLINE_SPIN_LOCK_IRQ is not set | ||
| 194 | # CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set | ||
| 195 | CONFIG_INLINE_SPIN_UNLOCK=y | ||
| 196 | # CONFIG_INLINE_SPIN_UNLOCK_BH is not set | ||
| 197 | CONFIG_INLINE_SPIN_UNLOCK_IRQ=y | ||
| 198 | # CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set | ||
| 199 | # CONFIG_INLINE_READ_TRYLOCK is not set | ||
| 200 | # CONFIG_INLINE_READ_LOCK is not set | ||
| 201 | # CONFIG_INLINE_READ_LOCK_BH is not set | ||
| 202 | # CONFIG_INLINE_READ_LOCK_IRQ is not set | ||
| 203 | # CONFIG_INLINE_READ_LOCK_IRQSAVE is not set | ||
| 204 | CONFIG_INLINE_READ_UNLOCK=y | ||
| 205 | # CONFIG_INLINE_READ_UNLOCK_BH is not set | ||
| 206 | CONFIG_INLINE_READ_UNLOCK_IRQ=y | ||
| 207 | # CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set | ||
| 208 | # CONFIG_INLINE_WRITE_TRYLOCK is not set | ||
| 209 | # CONFIG_INLINE_WRITE_LOCK is not set | ||
| 210 | # CONFIG_INLINE_WRITE_LOCK_BH is not set | ||
| 211 | # CONFIG_INLINE_WRITE_LOCK_IRQ is not set | ||
| 212 | # CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set | ||
| 213 | CONFIG_INLINE_WRITE_UNLOCK=y | ||
| 214 | # CONFIG_INLINE_WRITE_UNLOCK_BH is not set | ||
| 215 | CONFIG_INLINE_WRITE_UNLOCK_IRQ=y | ||
| 216 | # CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set | ||
| 217 | # CONFIG_MUTEX_SPIN_ON_OWNER is not set | ||
| 218 | # CONFIG_FREEZER is not set | ||
| 219 | CONFIG_PPC4xx_PCI_EXPRESS=y | ||
| 220 | |||
| 221 | # | ||
| 222 | # Platform support | ||
| 223 | # | ||
| 224 | # CONFIG_PPC_CELL is not set | ||
| 225 | # CONFIG_PPC_CELL_NATIVE is not set | ||
| 226 | # CONFIG_PQ2ADS is not set | ||
| 227 | # CONFIG_BAMBOO is not set | ||
| 228 | # CONFIG_EBONY is not set | ||
| 229 | # CONFIG_SAM440EP is not set | ||
| 230 | # CONFIG_SEQUOIA is not set | ||
| 231 | # CONFIG_TAISHAN is not set | ||
| 232 | # CONFIG_KATMAI is not set | ||
| 233 | # CONFIG_RAINIER is not set | ||
| 234 | # CONFIG_WARP is not set | ||
| 235 | # CONFIG_ARCHES is not set | ||
| 236 | # CONFIG_CANYONLANDS is not set | ||
| 237 | # CONFIG_GLACIER is not set | ||
| 238 | # CONFIG_REDWOOD is not set | ||
| 239 | # CONFIG_EIGER is not set | ||
| 240 | # CONFIG_YOSEMITE is not set | ||
| 241 | CONFIG_ICON=y | ||
| 242 | # CONFIG_XILINX_VIRTEX440_GENERIC_BOARD is not set | ||
| 243 | CONFIG_PPC44x_SIMPLE=y | ||
| 244 | # CONFIG_PPC4xx_GPIO is not set | ||
| 245 | CONFIG_440SPe=y | ||
| 246 | CONFIG_STDBINUTILS=y | ||
| 247 | # CONFIG_IPIC is not set | ||
| 248 | # CONFIG_MPIC is not set | ||
| 249 | # CONFIG_MPIC_WEIRD is not set | ||
| 250 | # CONFIG_PPC_I8259 is not set | ||
| 251 | # CONFIG_PPC_RTAS is not set | ||
| 252 | # CONFIG_MMIO_NVRAM is not set | ||
| 253 | # CONFIG_PPC_MPC106 is not set | ||
| 254 | # CONFIG_PPC_970_NAP is not set | ||
| 255 | # CONFIG_PPC_INDIRECT_IO is not set | ||
| 256 | # CONFIG_GENERIC_IOMAP is not set | ||
| 257 | # CONFIG_CPU_FREQ is not set | ||
| 258 | # CONFIG_FSL_ULI1575 is not set | ||
| 259 | # CONFIG_SIMPLE_GPIO is not set | ||
| 260 | |||
| 261 | # | ||
| 262 | # Kernel options | ||
| 263 | # | ||
| 264 | CONFIG_HIGHMEM=y | ||
| 265 | # CONFIG_NO_HZ is not set | ||
| 266 | # CONFIG_HIGH_RES_TIMERS is not set | ||
| 267 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
| 268 | # CONFIG_HZ_100 is not set | ||
| 269 | CONFIG_HZ_250=y | ||
| 270 | # CONFIG_HZ_300 is not set | ||
| 271 | # CONFIG_HZ_1000 is not set | ||
| 272 | CONFIG_HZ=250 | ||
| 273 | # CONFIG_SCHED_HRTICK is not set | ||
| 274 | CONFIG_PREEMPT_NONE=y | ||
| 275 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
| 276 | # CONFIG_PREEMPT is not set | ||
| 277 | CONFIG_BINFMT_ELF=y | ||
| 278 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
| 279 | # CONFIG_HAVE_AOUT is not set | ||
| 280 | # CONFIG_BINFMT_MISC is not set | ||
| 281 | # CONFIG_MATH_EMULATION is not set | ||
| 282 | # CONFIG_IOMMU_HELPER is not set | ||
| 283 | # CONFIG_SWIOTLB is not set | ||
| 284 | CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y | ||
| 285 | CONFIG_ARCH_HAS_WALK_MEMORY=y | ||
| 286 | CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y | ||
| 287 | CONFIG_SPARSE_IRQ=y | ||
| 288 | CONFIG_MAX_ACTIVE_REGIONS=32 | ||
| 289 | CONFIG_ARCH_FLATMEM_ENABLE=y | ||
| 290 | CONFIG_ARCH_POPULATES_NODE_MAP=y | ||
| 291 | CONFIG_SELECT_MEMORY_MODEL=y | ||
| 292 | CONFIG_FLATMEM_MANUAL=y | ||
| 293 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
| 294 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
| 295 | CONFIG_FLATMEM=y | ||
| 296 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
| 297 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
| 298 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
| 299 | CONFIG_MIGRATION=y | ||
| 300 | CONFIG_PHYS_ADDR_T_64BIT=y | ||
| 301 | CONFIG_ZONE_DMA_FLAG=1 | ||
| 302 | CONFIG_BOUNCE=y | ||
| 303 | CONFIG_VIRT_TO_BUS=y | ||
| 304 | # CONFIG_KSM is not set | ||
| 305 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | ||
| 306 | CONFIG_PPC_4K_PAGES=y | ||
| 307 | # CONFIG_PPC_16K_PAGES is not set | ||
| 308 | # CONFIG_PPC_64K_PAGES is not set | ||
| 309 | # CONFIG_PPC_256K_PAGES is not set | ||
| 310 | CONFIG_FORCE_MAX_ZONEORDER=11 | ||
| 311 | CONFIG_PROC_DEVICETREE=y | ||
| 312 | CONFIG_CMDLINE_BOOL=y | ||
| 313 | CONFIG_CMDLINE="" | ||
| 314 | CONFIG_EXTRA_TARGETS="" | ||
| 315 | # CONFIG_ARCH_HAS_NMI_WATCHDOG is not set | ||
| 316 | CONFIG_SECCOMP=y | ||
| 317 | CONFIG_ISA_DMA_API=y | ||
| 318 | |||
| 319 | # | ||
| 320 | # Bus options | ||
| 321 | # | ||
| 322 | CONFIG_ZONE_DMA=y | ||
| 323 | CONFIG_NEED_DMA_MAP_STATE=y | ||
| 324 | CONFIG_PPC_INDIRECT_PCI=y | ||
| 325 | CONFIG_4xx_SOC=y | ||
| 326 | CONFIG_PPC_PCI_CHOICE=y | ||
| 327 | CONFIG_PCI=y | ||
| 328 | CONFIG_PCI_DOMAINS=y | ||
| 329 | CONFIG_PCI_SYSCALL=y | ||
| 330 | CONFIG_PCIEPORTBUS=y | ||
| 331 | CONFIG_PCIEAER=y | ||
| 332 | # CONFIG_PCIE_ECRC is not set | ||
| 333 | # CONFIG_PCIEAER_INJECT is not set | ||
| 334 | # CONFIG_PCIEASPM is not set | ||
| 335 | CONFIG_ARCH_SUPPORTS_MSI=y | ||
| 336 | # CONFIG_PCI_MSI is not set | ||
| 337 | # CONFIG_PCI_DEBUG is not set | ||
| 338 | # CONFIG_PCI_STUB is not set | ||
| 339 | # CONFIG_PCI_IOV is not set | ||
| 340 | # CONFIG_PCCARD is not set | ||
| 341 | # CONFIG_HOTPLUG_PCI is not set | ||
| 342 | # CONFIG_HAS_RAPIDIO is not set | ||
| 343 | |||
| 344 | # | ||
| 345 | # Advanced setup | ||
| 346 | # | ||
| 347 | # CONFIG_ADVANCED_OPTIONS is not set | ||
| 348 | |||
| 349 | # | ||
| 350 | # Default settings for advanced configuration options are used | ||
| 351 | # | ||
| 352 | CONFIG_LOWMEM_SIZE=0x30000000 | ||
| 353 | CONFIG_PAGE_OFFSET=0xc0000000 | ||
| 354 | CONFIG_KERNEL_START=0xc0000000 | ||
| 355 | CONFIG_PHYSICAL_START=0x00000000 | ||
| 356 | CONFIG_TASK_SIZE=0xc0000000 | ||
| 357 | CONFIG_CONSISTENT_SIZE=0x00200000 | ||
| 358 | CONFIG_NET=y | ||
| 359 | |||
| 360 | # | ||
| 361 | # Networking options | ||
| 362 | # | ||
| 363 | CONFIG_PACKET=y | ||
| 364 | CONFIG_UNIX=y | ||
| 365 | # CONFIG_NET_KEY is not set | ||
| 366 | CONFIG_INET=y | ||
| 367 | # CONFIG_IP_MULTICAST is not set | ||
| 368 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
| 369 | CONFIG_IP_FIB_HASH=y | ||
| 370 | CONFIG_IP_PNP=y | ||
| 371 | CONFIG_IP_PNP_DHCP=y | ||
| 372 | CONFIG_IP_PNP_BOOTP=y | ||
| 373 | # CONFIG_IP_PNP_RARP is not set | ||
| 374 | # CONFIG_NET_IPIP is not set | ||
| 375 | # CONFIG_NET_IPGRE is not set | ||
| 376 | # CONFIG_ARPD is not set | ||
| 377 | # CONFIG_SYN_COOKIES is not set | ||
| 378 | # CONFIG_INET_AH is not set | ||
| 379 | # CONFIG_INET_ESP is not set | ||
| 380 | # CONFIG_INET_IPCOMP is not set | ||
| 381 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
| 382 | # CONFIG_INET_TUNNEL is not set | ||
| 383 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | ||
| 384 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | ||
| 385 | # CONFIG_INET_XFRM_MODE_BEET is not set | ||
| 386 | # CONFIG_INET_LRO is not set | ||
| 387 | CONFIG_INET_DIAG=y | ||
| 388 | CONFIG_INET_TCP_DIAG=y | ||
| 389 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
| 390 | CONFIG_TCP_CONG_CUBIC=y | ||
| 391 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
| 392 | # CONFIG_TCP_MD5SIG is not set | ||
| 393 | # CONFIG_IPV6 is not set | ||
| 394 | # CONFIG_NETWORK_SECMARK is not set | ||
| 395 | # CONFIG_NETFILTER is not set | ||
| 396 | # CONFIG_IP_DCCP is not set | ||
| 397 | # CONFIG_IP_SCTP is not set | ||
| 398 | # CONFIG_RDS is not set | ||
| 399 | # CONFIG_TIPC is not set | ||
| 400 | # CONFIG_ATM is not set | ||
| 401 | # CONFIG_BRIDGE is not set | ||
| 402 | # CONFIG_NET_DSA is not set | ||
| 403 | # CONFIG_VLAN_8021Q is not set | ||
| 404 | # CONFIG_DECNET is not set | ||
| 405 | # CONFIG_LLC2 is not set | ||
| 406 | # CONFIG_IPX is not set | ||
| 407 | # CONFIG_ATALK is not set | ||
| 408 | # CONFIG_X25 is not set | ||
| 409 | # CONFIG_LAPB is not set | ||
| 410 | # CONFIG_ECONET is not set | ||
| 411 | # CONFIG_WAN_ROUTER is not set | ||
| 412 | # CONFIG_PHONET is not set | ||
| 413 | # CONFIG_IEEE802154 is not set | ||
| 414 | # CONFIG_NET_SCHED is not set | ||
| 415 | # CONFIG_DCB is not set | ||
| 416 | |||
| 417 | # | ||
| 418 | # Network testing | ||
| 419 | # | ||
| 420 | # CONFIG_NET_PKTGEN is not set | ||
| 421 | # CONFIG_HAMRADIO is not set | ||
| 422 | # CONFIG_CAN is not set | ||
| 423 | # CONFIG_IRDA is not set | ||
| 424 | # CONFIG_BT is not set | ||
| 425 | # CONFIG_AF_RXRPC is not set | ||
| 426 | CONFIG_WIRELESS=y | ||
| 427 | # CONFIG_CFG80211 is not set | ||
| 428 | # CONFIG_LIB80211 is not set | ||
| 429 | |||
| 430 | # | ||
| 431 | # CFG80211 needs to be enabled for MAC80211 | ||
| 432 | # | ||
| 433 | # CONFIG_WIMAX is not set | ||
| 434 | # CONFIG_RFKILL is not set | ||
| 435 | # CONFIG_NET_9P is not set | ||
| 436 | |||
| 437 | # | ||
| 438 | # Device Drivers | ||
| 439 | # | ||
| 440 | |||
| 441 | # | ||
| 442 | # Generic Driver Options | ||
| 443 | # | ||
| 444 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
| 445 | # CONFIG_DEVTMPFS is not set | ||
| 446 | CONFIG_STANDALONE=y | ||
| 447 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
| 448 | CONFIG_FW_LOADER=y | ||
| 449 | CONFIG_FIRMWARE_IN_KERNEL=y | ||
| 450 | CONFIG_EXTRA_FIRMWARE="" | ||
| 451 | # CONFIG_DEBUG_DRIVER is not set | ||
| 452 | # CONFIG_DEBUG_DEVRES is not set | ||
| 453 | # CONFIG_SYS_HYPERVISOR is not set | ||
| 454 | CONFIG_CONNECTOR=y | ||
| 455 | CONFIG_PROC_EVENTS=y | ||
| 456 | CONFIG_MTD=y | ||
| 457 | # CONFIG_MTD_DEBUG is not set | ||
| 458 | # CONFIG_MTD_TESTS is not set | ||
| 459 | # CONFIG_MTD_CONCAT is not set | ||
| 460 | CONFIG_MTD_PARTITIONS=y | ||
| 461 | # CONFIG_MTD_REDBOOT_PARTS is not set | ||
| 462 | CONFIG_MTD_CMDLINE_PARTS=y | ||
| 463 | CONFIG_MTD_OF_PARTS=y | ||
| 464 | # CONFIG_MTD_AR7_PARTS is not set | ||
| 465 | |||
| 466 | # | ||
| 467 | # User Modules And Translation Layers | ||
| 468 | # | ||
| 469 | CONFIG_MTD_CHAR=y | ||
| 470 | CONFIG_MTD_BLKDEVS=y | ||
| 471 | CONFIG_MTD_BLOCK=y | ||
| 472 | # CONFIG_FTL is not set | ||
| 473 | # CONFIG_NFTL is not set | ||
| 474 | # CONFIG_INFTL is not set | ||
| 475 | # CONFIG_RFD_FTL is not set | ||
| 476 | # CONFIG_SSFDC is not set | ||
| 477 | # CONFIG_MTD_OOPS is not set | ||
| 478 | |||
| 479 | # | ||
| 480 | # RAM/ROM/Flash chip drivers | ||
| 481 | # | ||
| 482 | CONFIG_MTD_CFI=y | ||
| 483 | # CONFIG_MTD_JEDECPROBE is not set | ||
| 484 | CONFIG_MTD_GEN_PROBE=y | ||
| 485 | # CONFIG_MTD_CFI_ADV_OPTIONS is not set | ||
| 486 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
| 487 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
| 488 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
| 489 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
| 490 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
| 491 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
| 492 | CONFIG_MTD_CFI_I1=y | ||
| 493 | CONFIG_MTD_CFI_I2=y | ||
| 494 | # CONFIG_MTD_CFI_I4 is not set | ||
| 495 | # CONFIG_MTD_CFI_I8 is not set | ||
| 496 | # CONFIG_MTD_CFI_INTELEXT is not set | ||
| 497 | CONFIG_MTD_CFI_AMDSTD=y | ||
| 498 | # CONFIG_MTD_CFI_STAA is not set | ||
| 499 | CONFIG_MTD_CFI_UTIL=y | ||
| 500 | # CONFIG_MTD_RAM is not set | ||
| 501 | # CONFIG_MTD_ROM is not set | ||
| 502 | # CONFIG_MTD_ABSENT is not set | ||
| 503 | |||
| 504 | # | ||
| 505 | # Mapping drivers for chip access | ||
| 506 | # | ||
| 507 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
| 508 | # CONFIG_MTD_PHYSMAP is not set | ||
| 509 | CONFIG_MTD_PHYSMAP_OF=y | ||
| 510 | # CONFIG_MTD_INTEL_VR_NOR is not set | ||
| 511 | # CONFIG_MTD_PLATRAM is not set | ||
| 512 | |||
| 513 | # | ||
| 514 | # Self-contained MTD device drivers | ||
| 515 | # | ||
| 516 | # CONFIG_MTD_PMC551 is not set | ||
| 517 | # CONFIG_MTD_SLRAM is not set | ||
| 518 | # CONFIG_MTD_PHRAM is not set | ||
| 519 | # CONFIG_MTD_MTDRAM is not set | ||
| 520 | # CONFIG_MTD_BLOCK2MTD is not set | ||
| 521 | |||
| 522 | # | ||
| 523 | # Disk-On-Chip Device Drivers | ||
| 524 | # | ||
| 525 | # CONFIG_MTD_DOC2000 is not set | ||
| 526 | # CONFIG_MTD_DOC2001 is not set | ||
| 527 | # CONFIG_MTD_DOC2001PLUS is not set | ||
| 528 | # CONFIG_MTD_NAND is not set | ||
| 529 | # CONFIG_MTD_ONENAND is not set | ||
| 530 | |||
| 531 | # | ||
| 532 | # LPDDR flash memory drivers | ||
| 533 | # | ||
| 534 | # CONFIG_MTD_LPDDR is not set | ||
| 535 | |||
| 536 | # | ||
| 537 | # UBI - Unsorted block images | ||
| 538 | # | ||
| 539 | # CONFIG_MTD_UBI is not set | ||
| 540 | CONFIG_OF_FLATTREE=y | ||
| 541 | CONFIG_OF_DYNAMIC=y | ||
| 542 | CONFIG_OF_DEVICE=y | ||
| 543 | CONFIG_OF_I2C=y | ||
| 544 | # CONFIG_PARPORT is not set | ||
| 545 | CONFIG_BLK_DEV=y | ||
| 546 | # CONFIG_BLK_DEV_FD is not set | ||
| 547 | # CONFIG_BLK_CPQ_DA is not set | ||
| 548 | # CONFIG_BLK_CPQ_CISS_DA is not set | ||
| 549 | # CONFIG_BLK_DEV_DAC960 is not set | ||
| 550 | # CONFIG_BLK_DEV_UMEM is not set | ||
| 551 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
| 552 | # CONFIG_BLK_DEV_LOOP is not set | ||
| 553 | # CONFIG_BLK_DEV_DRBD is not set | ||
| 554 | # CONFIG_BLK_DEV_NBD is not set | ||
| 555 | # CONFIG_BLK_DEV_SX8 is not set | ||
| 556 | CONFIG_BLK_DEV_RAM=y | ||
| 557 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
| 558 | CONFIG_BLK_DEV_RAM_SIZE=35000 | ||
| 559 | # CONFIG_BLK_DEV_XIP is not set | ||
| 560 | # CONFIG_CDROM_PKTCDVD is not set | ||
| 561 | # CONFIG_ATA_OVER_ETH is not set | ||
| 562 | CONFIG_XILINX_SYSACE=y | ||
| 563 | # CONFIG_BLK_DEV_HD is not set | ||
| 564 | # CONFIG_MISC_DEVICES is not set | ||
| 565 | CONFIG_HAVE_IDE=y | ||
| 566 | # CONFIG_IDE is not set | ||
| 567 | |||
| 568 | # | ||
| 569 | # SCSI device support | ||
| 570 | # | ||
| 571 | CONFIG_SCSI_MOD=y | ||
| 572 | # CONFIG_RAID_ATTRS is not set | ||
| 573 | CONFIG_SCSI=y | ||
| 574 | CONFIG_SCSI_DMA=y | ||
| 575 | # CONFIG_SCSI_TGT is not set | ||
| 576 | # CONFIG_SCSI_NETLINK is not set | ||
| 577 | CONFIG_SCSI_PROC_FS=y | ||
| 578 | |||
| 579 | # | ||
| 580 | # SCSI support type (disk, tape, CD-ROM) | ||
| 581 | # | ||
| 582 | CONFIG_BLK_DEV_SD=y | ||
| 583 | # CONFIG_CHR_DEV_ST is not set | ||
| 584 | # CONFIG_CHR_DEV_OSST is not set | ||
| 585 | # CONFIG_BLK_DEV_SR is not set | ||
| 586 | # CONFIG_CHR_DEV_SG is not set | ||
| 587 | # CONFIG_CHR_DEV_SCH is not set | ||
| 588 | # CONFIG_SCSI_MULTI_LUN is not set | ||
| 589 | CONFIG_SCSI_CONSTANTS=y | ||
| 590 | CONFIG_SCSI_LOGGING=y | ||
| 591 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
| 592 | CONFIG_SCSI_WAIT_SCAN=m | ||
| 593 | |||
| 594 | # | ||
| 595 | # SCSI Transports | ||
| 596 | # | ||
| 597 | # CONFIG_SCSI_SPI_ATTRS is not set | ||
| 598 | # CONFIG_SCSI_FC_ATTRS is not set | ||
| 599 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
| 600 | CONFIG_SCSI_SAS_ATTRS=y | ||
| 601 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
| 602 | # CONFIG_SCSI_SRP_ATTRS is not set | ||
| 603 | # CONFIG_SCSI_LOWLEVEL is not set | ||
| 604 | # CONFIG_SCSI_DH is not set | ||
| 605 | # CONFIG_SCSI_OSD_INITIATOR is not set | ||
| 606 | # CONFIG_ATA is not set | ||
| 607 | # CONFIG_MD is not set | ||
| 608 | CONFIG_FUSION=y | ||
| 609 | # CONFIG_FUSION_SPI is not set | ||
| 610 | # CONFIG_FUSION_FC is not set | ||
| 611 | CONFIG_FUSION_SAS=y | ||
| 612 | CONFIG_FUSION_MAX_SGE=128 | ||
| 613 | CONFIG_FUSION_CTL=y | ||
| 614 | CONFIG_FUSION_LOGGING=y | ||
| 615 | |||
| 616 | # | ||
| 617 | # IEEE 1394 (FireWire) support | ||
| 618 | # | ||
| 619 | |||
| 620 | # | ||
| 621 | # You can enable one or both FireWire driver stacks. | ||
| 622 | # | ||
| 623 | |||
| 624 | # | ||
| 625 | # The newer stack is recommended. | ||
| 626 | # | ||
| 627 | # CONFIG_FIREWIRE is not set | ||
| 628 | # CONFIG_IEEE1394 is not set | ||
| 629 | # CONFIG_I2O is not set | ||
| 630 | # CONFIG_MACINTOSH_DRIVERS is not set | ||
| 631 | CONFIG_NETDEVICES=y | ||
| 632 | # CONFIG_DUMMY is not set | ||
| 633 | # CONFIG_BONDING is not set | ||
| 634 | # CONFIG_MACVLAN is not set | ||
| 635 | # CONFIG_EQUALIZER is not set | ||
| 636 | # CONFIG_TUN is not set | ||
| 637 | # CONFIG_VETH is not set | ||
| 638 | # CONFIG_ARCNET is not set | ||
| 639 | # CONFIG_PHYLIB is not set | ||
| 640 | CONFIG_NET_ETHERNET=y | ||
| 641 | # CONFIG_MII is not set | ||
| 642 | # CONFIG_HAPPYMEAL is not set | ||
| 643 | # CONFIG_SUNGEM is not set | ||
| 644 | # CONFIG_CASSINI is not set | ||
| 645 | # CONFIG_NET_VENDOR_3COM is not set | ||
| 646 | # CONFIG_ETHOC is not set | ||
| 647 | # CONFIG_DNET is not set | ||
| 648 | # CONFIG_NET_TULIP is not set | ||
| 649 | # CONFIG_HP100 is not set | ||
| 650 | CONFIG_IBM_NEW_EMAC=y | ||
| 651 | CONFIG_IBM_NEW_EMAC_RXB=128 | ||
| 652 | CONFIG_IBM_NEW_EMAC_TXB=64 | ||
| 653 | CONFIG_IBM_NEW_EMAC_POLL_WEIGHT=32 | ||
| 654 | CONFIG_IBM_NEW_EMAC_RX_COPY_THRESHOLD=256 | ||
| 655 | CONFIG_IBM_NEW_EMAC_RX_SKB_HEADROOM=0 | ||
| 656 | # CONFIG_IBM_NEW_EMAC_DEBUG is not set | ||
| 657 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
| 658 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
| 659 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
| 660 | CONFIG_IBM_NEW_EMAC_EMAC4=y | ||
| 661 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
| 662 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
| 663 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
| 664 | # CONFIG_NET_PCI is not set | ||
| 665 | # CONFIG_B44 is not set | ||
| 666 | # CONFIG_KS8842 is not set | ||
| 667 | # CONFIG_KS8851_MLL is not set | ||
| 668 | # CONFIG_ATL2 is not set | ||
| 669 | # CONFIG_XILINX_EMACLITE is not set | ||
| 670 | # CONFIG_NETDEV_1000 is not set | ||
| 671 | # CONFIG_NETDEV_10000 is not set | ||
| 672 | # CONFIG_TR is not set | ||
| 673 | # CONFIG_WLAN is not set | ||
| 674 | |||
| 675 | # | ||
| 676 | # Enable WiMAX (Networking options) to see the WiMAX drivers | ||
| 677 | # | ||
| 678 | # CONFIG_WAN is not set | ||
| 679 | # CONFIG_FDDI is not set | ||
| 680 | # CONFIG_HIPPI is not set | ||
| 681 | # CONFIG_PPP is not set | ||
| 682 | # CONFIG_SLIP is not set | ||
| 683 | # CONFIG_NET_FC is not set | ||
| 684 | # CONFIG_NETCONSOLE is not set | ||
| 685 | # CONFIG_NETPOLL is not set | ||
| 686 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
| 687 | # CONFIG_VMXNET3 is not set | ||
| 688 | # CONFIG_ISDN is not set | ||
| 689 | # CONFIG_PHONE is not set | ||
| 690 | |||
| 691 | # | ||
| 692 | # Input device support | ||
| 693 | # | ||
| 694 | CONFIG_INPUT=y | ||
| 695 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
| 696 | # CONFIG_INPUT_POLLDEV is not set | ||
| 697 | # CONFIG_INPUT_SPARSEKMAP is not set | ||
| 698 | |||
| 699 | # | ||
| 700 | # Userland interfaces | ||
| 701 | # | ||
| 702 | CONFIG_INPUT_MOUSEDEV=y | ||
| 703 | CONFIG_INPUT_MOUSEDEV_PSAUX=y | ||
| 704 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=640 | ||
| 705 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=480 | ||
| 706 | # CONFIG_INPUT_JOYDEV is not set | ||
| 707 | # CONFIG_INPUT_EVDEV is not set | ||
| 708 | # CONFIG_INPUT_EVBUG is not set | ||
| 709 | |||
| 710 | # | ||
| 711 | # Input Device Drivers | ||
| 712 | # | ||
| 713 | CONFIG_INPUT_KEYBOARD=y | ||
| 714 | # CONFIG_KEYBOARD_ADP5588 is not set | ||
| 715 | CONFIG_KEYBOARD_ATKBD=y | ||
| 716 | # CONFIG_QT2160 is not set | ||
| 717 | # CONFIG_KEYBOARD_LKKBD is not set | ||
| 718 | # CONFIG_KEYBOARD_MAX7359 is not set | ||
| 719 | # CONFIG_KEYBOARD_NEWTON is not set | ||
| 720 | # CONFIG_KEYBOARD_OPENCORES is not set | ||
| 721 | # CONFIG_KEYBOARD_STOWAWAY is not set | ||
| 722 | # CONFIG_KEYBOARD_SUNKBD is not set | ||
| 723 | # CONFIG_KEYBOARD_XTKBD is not set | ||
| 724 | CONFIG_INPUT_MOUSE=y | ||
| 725 | CONFIG_MOUSE_PS2=y | ||
| 726 | # CONFIG_MOUSE_PS2_ALPS is not set | ||
| 727 | # CONFIG_MOUSE_PS2_LOGIPS2PP is not set | ||
| 728 | # CONFIG_MOUSE_PS2_SYNAPTICS is not set | ||
| 729 | # CONFIG_MOUSE_PS2_TRACKPOINT is not set | ||
| 730 | # CONFIG_MOUSE_PS2_ELANTECH is not set | ||
| 731 | # CONFIG_MOUSE_PS2_SENTELIC is not set | ||
| 732 | # CONFIG_MOUSE_PS2_TOUCHKIT is not set | ||
| 733 | # CONFIG_MOUSE_SERIAL is not set | ||
| 734 | # CONFIG_MOUSE_VSXXXAA is not set | ||
| 735 | # CONFIG_MOUSE_SYNAPTICS_I2C is not set | ||
| 736 | # CONFIG_INPUT_JOYSTICK is not set | ||
| 737 | # CONFIG_INPUT_TABLET is not set | ||
| 738 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
| 739 | # CONFIG_INPUT_MISC is not set | ||
| 740 | |||
| 741 | # | ||
| 742 | # Hardware I/O ports | ||
| 743 | # | ||
| 744 | CONFIG_SERIO=y | ||
| 745 | CONFIG_SERIO_I8042=y | ||
| 746 | CONFIG_SERIO_SERPORT=y | ||
| 747 | # CONFIG_SERIO_PCIPS2 is not set | ||
| 748 | CONFIG_SERIO_LIBPS2=y | ||
| 749 | # CONFIG_SERIO_RAW is not set | ||
| 750 | # CONFIG_SERIO_XILINX_XPS_PS2 is not set | ||
| 751 | # CONFIG_SERIO_ALTERA_PS2 is not set | ||
| 752 | # CONFIG_GAMEPORT is not set | ||
| 753 | |||
| 754 | # | ||
| 755 | # Character devices | ||
| 756 | # | ||
| 757 | CONFIG_VT=y | ||
| 758 | CONFIG_CONSOLE_TRANSLATIONS=y | ||
| 759 | CONFIG_VT_CONSOLE=y | ||
| 760 | CONFIG_HW_CONSOLE=y | ||
| 761 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
| 762 | CONFIG_DEVKMEM=y | ||
| 763 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
| 764 | # CONFIG_NOZOMI is not set | ||
| 765 | |||
| 766 | # | ||
| 767 | # Serial drivers | ||
| 768 | # | ||
| 769 | CONFIG_SERIAL_8250=y | ||
| 770 | CONFIG_SERIAL_8250_CONSOLE=y | ||
| 771 | # CONFIG_SERIAL_8250_PCI is not set | ||
| 772 | CONFIG_SERIAL_8250_NR_UARTS=4 | ||
| 773 | CONFIG_SERIAL_8250_RUNTIME_UARTS=4 | ||
| 774 | CONFIG_SERIAL_8250_EXTENDED=y | ||
| 775 | # CONFIG_SERIAL_8250_MANY_PORTS is not set | ||
| 776 | CONFIG_SERIAL_8250_SHARE_IRQ=y | ||
| 777 | # CONFIG_SERIAL_8250_DETECT_IRQ is not set | ||
| 778 | # CONFIG_SERIAL_8250_RSA is not set | ||
| 779 | |||
| 780 | # | ||
| 781 | # Non-8250 serial port support | ||
| 782 | # | ||
| 783 | # CONFIG_SERIAL_UARTLITE is not set | ||
| 784 | CONFIG_SERIAL_CORE=y | ||
| 785 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
| 786 | # CONFIG_SERIAL_JSM is not set | ||
| 787 | CONFIG_SERIAL_OF_PLATFORM=y | ||
| 788 | # CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL is not set | ||
| 789 | # CONFIG_SERIAL_TIMBERDALE is not set | ||
| 790 | # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set | ||
| 791 | CONFIG_UNIX98_PTYS=y | ||
| 792 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
| 793 | CONFIG_LEGACY_PTYS=y | ||
| 794 | CONFIG_LEGACY_PTY_COUNT=256 | ||
| 795 | # CONFIG_HVC_UDBG is not set | ||
| 796 | # CONFIG_IPMI_HANDLER is not set | ||
| 797 | # CONFIG_HW_RANDOM is not set | ||
| 798 | # CONFIG_NVRAM is not set | ||
| 799 | # CONFIG_R3964 is not set | ||
| 800 | # CONFIG_APPLICOM is not set | ||
| 801 | # CONFIG_RAW_DRIVER is not set | ||
| 802 | # CONFIG_BOOTCOUNT is not set | ||
| 803 | # CONFIG_DISPLAY_PDSP1880 is not set | ||
| 804 | # CONFIG_MUCMC52_IO is not set | ||
| 805 | # CONFIG_UC101_IO is not set | ||
| 806 | # CONFIG_SRAM is not set | ||
| 807 | # CONFIG_TCG_TPM is not set | ||
| 808 | CONFIG_DEVPORT=y | ||
| 809 | CONFIG_I2C=y | ||
| 810 | CONFIG_I2C_BOARDINFO=y | ||
| 811 | CONFIG_I2C_COMPAT=y | ||
| 812 | CONFIG_I2C_CHARDEV=y | ||
| 813 | CONFIG_I2C_HELPER_AUTO=y | ||
| 814 | |||
| 815 | # | ||
| 816 | # I2C Hardware Bus support | ||
| 817 | # | ||
| 818 | |||
| 819 | # | ||
| 820 | # PC SMBus host controller drivers | ||
| 821 | # | ||
| 822 | # CONFIG_I2C_ALI1535 is not set | ||
| 823 | # CONFIG_I2C_ALI1563 is not set | ||
| 824 | # CONFIG_I2C_ALI15X3 is not set | ||
| 825 | # CONFIG_I2C_AMD756 is not set | ||
| 826 | # CONFIG_I2C_AMD8111 is not set | ||
| 827 | # CONFIG_I2C_I801 is not set | ||
| 828 | # CONFIG_I2C_ISCH is not set | ||
| 829 | # CONFIG_I2C_PIIX4 is not set | ||
| 830 | # CONFIG_I2C_NFORCE2 is not set | ||
| 831 | # CONFIG_I2C_SIS5595 is not set | ||
| 832 | # CONFIG_I2C_SIS630 is not set | ||
| 833 | # CONFIG_I2C_SIS96X is not set | ||
| 834 | # CONFIG_I2C_VIA is not set | ||
| 835 | # CONFIG_I2C_VIAPRO is not set | ||
| 836 | |||
| 837 | # | ||
| 838 | # I2C system bus drivers (mostly embedded / system-on-chip) | ||
| 839 | # | ||
| 840 | CONFIG_I2C_IBM_IIC=y | ||
| 841 | # CONFIG_I2C_MPC is not set | ||
| 842 | # CONFIG_I2C_OCORES is not set | ||
| 843 | # CONFIG_I2C_SIMTEC is not set | ||
| 844 | # CONFIG_I2C_XILINX is not set | ||
| 845 | |||
| 846 | # | ||
| 847 | # External I2C/SMBus adapter drivers | ||
| 848 | # | ||
| 849 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
| 850 | # CONFIG_I2C_TAOS_EVM is not set | ||
| 851 | |||
| 852 | # | ||
| 853 | # Other I2C/SMBus bus drivers | ||
| 854 | # | ||
| 855 | # CONFIG_I2C_PCA_PLATFORM is not set | ||
| 856 | # CONFIG_I2C_STUB is not set | ||
| 857 | # CONFIG_I2C_DEBUG_CORE is not set | ||
| 858 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
| 859 | # CONFIG_I2C_DEBUG_BUS is not set | ||
| 860 | # CONFIG_SPI is not set | ||
| 861 | |||
| 862 | # | ||
| 863 | # PPS support | ||
| 864 | # | ||
| 865 | # CONFIG_PPS is not set | ||
| 866 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | ||
| 867 | # CONFIG_GPIOLIB is not set | ||
| 868 | # CONFIG_W1 is not set | ||
| 869 | # CONFIG_POWER_SUPPLY is not set | ||
| 870 | # CONFIG_HWMON is not set | ||
| 871 | # CONFIG_THERMAL is not set | ||
| 872 | # CONFIG_WATCHDOG is not set | ||
| 873 | CONFIG_SSB_POSSIBLE=y | ||
| 874 | |||
| 875 | # | ||
| 876 | # Sonics Silicon Backplane | ||
| 877 | # | ||
| 878 | # CONFIG_SSB is not set | ||
| 879 | |||
| 880 | # | ||
| 881 | # Multifunction device drivers | ||
| 882 | # | ||
| 883 | # CONFIG_MFD_CORE is not set | ||
| 884 | # CONFIG_MFD_88PM860X is not set | ||
| 885 | CONFIG_MFD_SM501=y | ||
| 886 | # CONFIG_HTC_PASIC3 is not set | ||
| 887 | # CONFIG_TWL4030_CORE is not set | ||
| 888 | # CONFIG_MFD_TMIO is not set | ||
| 889 | # CONFIG_PMIC_DA903X is not set | ||
| 890 | # CONFIG_PMIC_ADP5520 is not set | ||
| 891 | # CONFIG_MFD_MAX8925 is not set | ||
| 892 | # CONFIG_MFD_WM8400 is not set | ||
| 893 | # CONFIG_MFD_WM831X is not set | ||
| 894 | # CONFIG_MFD_WM8350_I2C is not set | ||
| 895 | # CONFIG_MFD_WM8994 is not set | ||
| 896 | # CONFIG_MFD_PCF50633 is not set | ||
| 897 | # CONFIG_AB3100_CORE is not set | ||
| 898 | # CONFIG_LPC_SCH is not set | ||
| 899 | # CONFIG_REGULATOR is not set | ||
| 900 | # CONFIG_MEDIA_SUPPORT is not set | ||
| 901 | |||
| 902 | # | ||
| 903 | # Graphics support | ||
| 904 | # | ||
| 905 | # CONFIG_AGP is not set | ||
| 906 | CONFIG_VGA_ARB=y | ||
| 907 | CONFIG_VGA_ARB_MAX_GPUS=16 | ||
| 908 | # CONFIG_DRM is not set | ||
| 909 | # CONFIG_VGASTATE is not set | ||
| 910 | CONFIG_VIDEO_OUTPUT_CONTROL=m | ||
| 911 | CONFIG_FB=y | ||
| 912 | # CONFIG_FIRMWARE_EDID is not set | ||
| 913 | # CONFIG_FB_DDC is not set | ||
| 914 | # CONFIG_FB_BOOT_VESA_SUPPORT is not set | ||
| 915 | CONFIG_FB_CFB_FILLRECT=y | ||
| 916 | CONFIG_FB_CFB_COPYAREA=y | ||
| 917 | CONFIG_FB_CFB_IMAGEBLIT=y | ||
| 918 | # CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set | ||
| 919 | # CONFIG_FB_SYS_FILLRECT is not set | ||
| 920 | # CONFIG_FB_SYS_COPYAREA is not set | ||
| 921 | # CONFIG_FB_SYS_IMAGEBLIT is not set | ||
| 922 | # CONFIG_FB_FOREIGN_ENDIAN is not set | ||
| 923 | # CONFIG_FB_SYS_FOPS is not set | ||
| 924 | # CONFIG_FB_SVGALIB is not set | ||
| 925 | # CONFIG_FB_MACMODES is not set | ||
| 926 | # CONFIG_FB_BACKLIGHT is not set | ||
| 927 | # CONFIG_FB_MODE_HELPERS is not set | ||
| 928 | # CONFIG_FB_TILEBLITTING is not set | ||
| 929 | |||
| 930 | # | ||
| 931 | # Frame buffer hardware drivers | ||
| 932 | # | ||
| 933 | # CONFIG_FB_CIRRUS is not set | ||
| 934 | # CONFIG_FB_PM2 is not set | ||
| 935 | # CONFIG_FB_CYBER2000 is not set | ||
| 936 | # CONFIG_FB_OF is not set | ||
| 937 | # CONFIG_FB_CT65550 is not set | ||
| 938 | # CONFIG_FB_ASILIANT is not set | ||
| 939 | # CONFIG_FB_IMSTT is not set | ||
| 940 | # CONFIG_FB_VGA16 is not set | ||
| 941 | # CONFIG_FB_UVESA is not set | ||
| 942 | # CONFIG_FB_S1D13XXX is not set | ||
| 943 | # CONFIG_FB_NVIDIA is not set | ||
| 944 | # CONFIG_FB_RIVA is not set | ||
| 945 | # CONFIG_FB_MATROX is not set | ||
| 946 | # CONFIG_FB_RADEON is not set | ||
| 947 | # CONFIG_FB_ATY128 is not set | ||
| 948 | # CONFIG_FB_ATY is not set | ||
| 949 | # CONFIG_FB_S3 is not set | ||
| 950 | # CONFIG_FB_SAVAGE is not set | ||
| 951 | # CONFIG_FB_SIS is not set | ||
| 952 | # CONFIG_FB_VIA is not set | ||
| 953 | # CONFIG_FB_NEOMAGIC is not set | ||
| 954 | # CONFIG_FB_KYRO is not set | ||
| 955 | # CONFIG_FB_3DFX is not set | ||
| 956 | # CONFIG_FB_VOODOO1 is not set | ||
| 957 | # CONFIG_FB_VT8623 is not set | ||
| 958 | # CONFIG_FB_TRIDENT is not set | ||
| 959 | # CONFIG_FB_ARK is not set | ||
| 960 | # CONFIG_FB_PM3 is not set | ||
| 961 | # CONFIG_FB_CARMINE is not set | ||
| 962 | CONFIG_FB_SM501=y | ||
| 963 | # CONFIG_FB_IBM_GXT4500 is not set | ||
| 964 | # CONFIG_FB_VIRTUAL is not set | ||
| 965 | # CONFIG_FB_METRONOME is not set | ||
| 966 | # CONFIG_FB_MB862XX is not set | ||
| 967 | # CONFIG_FB_BROADSHEET is not set | ||
| 968 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
| 969 | |||
| 970 | # | ||
| 971 | # Display device support | ||
| 972 | # | ||
| 973 | # CONFIG_DISPLAY_SUPPORT is not set | ||
| 974 | |||
| 975 | # | ||
| 976 | # Console display driver support | ||
| 977 | # | ||
| 978 | CONFIG_DUMMY_CONSOLE=y | ||
| 979 | CONFIG_FRAMEBUFFER_CONSOLE=y | ||
| 980 | # CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set | ||
| 981 | # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set | ||
| 982 | # CONFIG_FONTS is not set | ||
| 983 | CONFIG_FONT_8x8=y | ||
| 984 | CONFIG_FONT_8x16=y | ||
| 985 | CONFIG_LOGO=y | ||
| 986 | # CONFIG_LOGO_LINUX_MONO is not set | ||
| 987 | # CONFIG_LOGO_LINUX_VGA16 is not set | ||
| 988 | CONFIG_LOGO_LINUX_CLUT224=y | ||
| 989 | # CONFIG_SOUND is not set | ||
| 990 | CONFIG_HID_SUPPORT=y | ||
| 991 | CONFIG_HID=y | ||
| 992 | # CONFIG_HIDRAW is not set | ||
| 993 | # CONFIG_HID_PID is not set | ||
| 994 | |||
| 995 | # | ||
| 996 | # Special HID drivers | ||
| 997 | # | ||
| 998 | # CONFIG_USB_SUPPORT is not set | ||
| 999 | # CONFIG_UWB is not set | ||
| 1000 | # CONFIG_MMC is not set | ||
| 1001 | # CONFIG_MEMSTICK is not set | ||
| 1002 | # CONFIG_NEW_LEDS is not set | ||
| 1003 | # CONFIG_ACCESSIBILITY is not set | ||
| 1004 | # CONFIG_INFINIBAND is not set | ||
| 1005 | # CONFIG_EDAC is not set | ||
| 1006 | CONFIG_RTC_LIB=y | ||
| 1007 | CONFIG_RTC_CLASS=y | ||
| 1008 | CONFIG_RTC_HCTOSYS=y | ||
| 1009 | CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | ||
| 1010 | # CONFIG_RTC_DEBUG is not set | ||
| 1011 | |||
| 1012 | # | ||
| 1013 | # RTC interfaces | ||
| 1014 | # | ||
| 1015 | CONFIG_RTC_INTF_SYSFS=y | ||
| 1016 | CONFIG_RTC_INTF_PROC=y | ||
| 1017 | CONFIG_RTC_INTF_DEV=y | ||
| 1018 | # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
| 1019 | # CONFIG_RTC_DRV_TEST is not set | ||
| 1020 | |||
| 1021 | # | ||
| 1022 | # I2C RTC drivers | ||
| 1023 | # | ||
| 1024 | CONFIG_RTC_DRV_DS1307=y | ||
| 1025 | # CONFIG_RTC_DRV_DS1374 is not set | ||
| 1026 | # CONFIG_RTC_DRV_DS1672 is not set | ||
| 1027 | # CONFIG_RTC_DRV_MAX6900 is not set | ||
| 1028 | # CONFIG_RTC_DRV_RS5C372 is not set | ||
| 1029 | # CONFIG_RTC_DRV_ISL1208 is not set | ||
| 1030 | # CONFIG_RTC_DRV_X1205 is not set | ||
| 1031 | # CONFIG_RTC_DRV_PCF8563 is not set | ||
| 1032 | # CONFIG_RTC_DRV_PCF8583 is not set | ||
| 1033 | # CONFIG_RTC_DRV_M41T80 is not set | ||
| 1034 | # CONFIG_RTC_DRV_BQ32K is not set | ||
| 1035 | # CONFIG_RTC_DRV_S35390A is not set | ||
| 1036 | # CONFIG_RTC_DRV_FM3130 is not set | ||
| 1037 | # CONFIG_RTC_DRV_RX8581 is not set | ||
| 1038 | # CONFIG_RTC_DRV_RX8025 is not set | ||
| 1039 | |||
| 1040 | # | ||
| 1041 | # SPI RTC drivers | ||
| 1042 | # | ||
| 1043 | |||
| 1044 | # | ||
| 1045 | # Platform RTC drivers | ||
| 1046 | # | ||
| 1047 | # CONFIG_RTC_DRV_CMOS is not set | ||
| 1048 | # CONFIG_RTC_DRV_DS1286 is not set | ||
| 1049 | # CONFIG_RTC_DRV_DS1511 is not set | ||
| 1050 | # CONFIG_RTC_DRV_DS1553 is not set | ||
| 1051 | # CONFIG_RTC_DRV_DS1742 is not set | ||
| 1052 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
| 1053 | # CONFIG_RTC_DRV_M48T86 is not set | ||
| 1054 | # CONFIG_RTC_DRV_M48T35 is not set | ||
| 1055 | # CONFIG_RTC_DRV_M48T59 is not set | ||
| 1056 | # CONFIG_RTC_DRV_MSM6242 is not set | ||
| 1057 | # CONFIG_RTC_DRV_BQ4802 is not set | ||
| 1058 | # CONFIG_RTC_DRV_RP5C01 is not set | ||
| 1059 | # CONFIG_RTC_DRV_V3020 is not set | ||
| 1060 | |||
| 1061 | # | ||
| 1062 | # on-CPU RTC drivers | ||
| 1063 | # | ||
| 1064 | # CONFIG_RTC_DRV_GENERIC is not set | ||
| 1065 | # CONFIG_DMADEVICES is not set | ||
| 1066 | # CONFIG_AUXDISPLAY is not set | ||
| 1067 | # CONFIG_UIO is not set | ||
| 1068 | |||
| 1069 | # | ||
| 1070 | # TI VLYNQ | ||
| 1071 | # | ||
| 1072 | # CONFIG_STAGING is not set | ||
| 1073 | |||
| 1074 | # | ||
| 1075 | # File systems | ||
| 1076 | # | ||
| 1077 | CONFIG_EXT2_FS=y | ||
| 1078 | # CONFIG_EXT2_FS_XATTR is not set | ||
| 1079 | # CONFIG_EXT2_FS_XIP is not set | ||
| 1080 | CONFIG_EXT3_FS=y | ||
| 1081 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 1082 | CONFIG_EXT3_FS_XATTR=y | ||
| 1083 | # CONFIG_EXT3_FS_POSIX_ACL is not set | ||
| 1084 | # CONFIG_EXT3_FS_SECURITY is not set | ||
| 1085 | # CONFIG_EXT4_FS is not set | ||
| 1086 | CONFIG_JBD=y | ||
| 1087 | CONFIG_FS_MBCACHE=y | ||
| 1088 | # CONFIG_REISERFS_FS is not set | ||
| 1089 | # CONFIG_JFS_FS is not set | ||
| 1090 | # CONFIG_FS_POSIX_ACL is not set | ||
| 1091 | # CONFIG_XFS_FS is not set | ||
| 1092 | # CONFIG_GFS2_FS is not set | ||
| 1093 | # CONFIG_OCFS2_FS is not set | ||
| 1094 | # CONFIG_BTRFS_FS is not set | ||
| 1095 | # CONFIG_NILFS2_FS is not set | ||
| 1096 | CONFIG_FILE_LOCKING=y | ||
| 1097 | CONFIG_FSNOTIFY=y | ||
| 1098 | CONFIG_DNOTIFY=y | ||
| 1099 | CONFIG_INOTIFY=y | ||
| 1100 | CONFIG_INOTIFY_USER=y | ||
| 1101 | # CONFIG_QUOTA is not set | ||
| 1102 | # CONFIG_AUTOFS_FS is not set | ||
| 1103 | # CONFIG_AUTOFS4_FS is not set | ||
| 1104 | # CONFIG_FUSE_FS is not set | ||
| 1105 | |||
| 1106 | # | ||
| 1107 | # Caches | ||
| 1108 | # | ||
| 1109 | # CONFIG_FSCACHE is not set | ||
| 1110 | |||
| 1111 | # | ||
| 1112 | # CD-ROM/DVD Filesystems | ||
| 1113 | # | ||
| 1114 | # CONFIG_ISO9660_FS is not set | ||
| 1115 | # CONFIG_UDF_FS is not set | ||
| 1116 | |||
| 1117 | # | ||
| 1118 | # DOS/FAT/NT Filesystems | ||
| 1119 | # | ||
| 1120 | CONFIG_FAT_FS=y | ||
| 1121 | # CONFIG_MSDOS_FS is not set | ||
| 1122 | CONFIG_VFAT_FS=y | ||
| 1123 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
| 1124 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
| 1125 | # CONFIG_NTFS_FS is not set | ||
| 1126 | |||
| 1127 | # | ||
| 1128 | # Pseudo filesystems | ||
| 1129 | # | ||
| 1130 | CONFIG_PROC_FS=y | ||
| 1131 | CONFIG_PROC_KCORE=y | ||
| 1132 | CONFIG_PROC_SYSCTL=y | ||
| 1133 | CONFIG_PROC_PAGE_MONITOR=y | ||
| 1134 | CONFIG_SYSFS=y | ||
| 1135 | CONFIG_TMPFS=y | ||
| 1136 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
| 1137 | # CONFIG_HUGETLB_PAGE is not set | ||
| 1138 | # CONFIG_CONFIGFS_FS is not set | ||
| 1139 | CONFIG_MISC_FILESYSTEMS=y | ||
| 1140 | # CONFIG_ADFS_FS is not set | ||
| 1141 | # CONFIG_AFFS_FS is not set | ||
| 1142 | # CONFIG_HFS_FS is not set | ||
| 1143 | # CONFIG_HFSPLUS_FS is not set | ||
| 1144 | # CONFIG_BEFS_FS is not set | ||
| 1145 | # CONFIG_BFS_FS is not set | ||
| 1146 | # CONFIG_EFS_FS is not set | ||
| 1147 | # CONFIG_JFFS2_FS is not set | ||
| 1148 | # CONFIG_YAFFS_FS is not set | ||
| 1149 | # CONFIG_LOGFS is not set | ||
| 1150 | CONFIG_CRAMFS=y | ||
| 1151 | # CONFIG_SQUASHFS is not set | ||
| 1152 | # CONFIG_VXFS_FS is not set | ||
| 1153 | # CONFIG_MINIX_FS is not set | ||
| 1154 | # CONFIG_OMFS_FS is not set | ||
| 1155 | # CONFIG_HPFS_FS is not set | ||
| 1156 | # CONFIG_QNX4FS_FS is not set | ||
| 1157 | # CONFIG_ROMFS_FS is not set | ||
| 1158 | # CONFIG_SYSV_FS is not set | ||
| 1159 | # CONFIG_UFS_FS is not set | ||
| 1160 | CONFIG_NETWORK_FILESYSTEMS=y | ||
| 1161 | CONFIG_NFS_FS=y | ||
| 1162 | CONFIG_NFS_V3=y | ||
| 1163 | # CONFIG_NFS_V3_ACL is not set | ||
| 1164 | # CONFIG_NFS_V4 is not set | ||
| 1165 | CONFIG_ROOT_NFS=y | ||
| 1166 | # CONFIG_NFSD is not set | ||
| 1167 | CONFIG_LOCKD=y | ||
| 1168 | CONFIG_LOCKD_V4=y | ||
| 1169 | CONFIG_NFS_COMMON=y | ||
| 1170 | CONFIG_SUNRPC=y | ||
| 1171 | # CONFIG_RPCSEC_GSS_KRB5 is not set | ||
| 1172 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
| 1173 | # CONFIG_SMB_FS is not set | ||
| 1174 | # CONFIG_CEPH_FS is not set | ||
| 1175 | # CONFIG_CIFS is not set | ||
| 1176 | # CONFIG_NCP_FS is not set | ||
| 1177 | # CONFIG_CODA_FS is not set | ||
| 1178 | # CONFIG_AFS_FS is not set | ||
| 1179 | |||
| 1180 | # | ||
| 1181 | # Partition Types | ||
| 1182 | # | ||
| 1183 | # CONFIG_PARTITION_ADVANCED is not set | ||
| 1184 | CONFIG_MSDOS_PARTITION=y | ||
| 1185 | CONFIG_NLS=y | ||
| 1186 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
| 1187 | CONFIG_NLS_CODEPAGE_437=y | ||
| 1188 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
| 1189 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
| 1190 | CONFIG_NLS_CODEPAGE_850=y | ||
| 1191 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
| 1192 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
| 1193 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
| 1194 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
| 1195 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
| 1196 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
| 1197 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
| 1198 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
| 1199 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
| 1200 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
| 1201 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
| 1202 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
| 1203 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
| 1204 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
| 1205 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
| 1206 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
| 1207 | # CONFIG_NLS_ISO8859_8 is not set | ||
| 1208 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
| 1209 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
| 1210 | # CONFIG_NLS_ASCII is not set | ||
| 1211 | CONFIG_NLS_ISO8859_1=y | ||
| 1212 | # CONFIG_NLS_ISO8859_2 is not set | ||
| 1213 | # CONFIG_NLS_ISO8859_3 is not set | ||
| 1214 | # CONFIG_NLS_ISO8859_4 is not set | ||
| 1215 | # CONFIG_NLS_ISO8859_5 is not set | ||
| 1216 | # CONFIG_NLS_ISO8859_6 is not set | ||
| 1217 | # CONFIG_NLS_ISO8859_7 is not set | ||
| 1218 | # CONFIG_NLS_ISO8859_9 is not set | ||
| 1219 | # CONFIG_NLS_ISO8859_13 is not set | ||
| 1220 | # CONFIG_NLS_ISO8859_14 is not set | ||
| 1221 | CONFIG_NLS_ISO8859_15=y | ||
| 1222 | # CONFIG_NLS_KOI8_R is not set | ||
| 1223 | # CONFIG_NLS_KOI8_U is not set | ||
| 1224 | # CONFIG_NLS_UTF8 is not set | ||
| 1225 | # CONFIG_DLM is not set | ||
| 1226 | # CONFIG_BINARY_PRINTF is not set | ||
| 1227 | |||
| 1228 | # | ||
| 1229 | # Library routines | ||
| 1230 | # | ||
| 1231 | CONFIG_BITREVERSE=y | ||
| 1232 | CONFIG_GENERIC_FIND_LAST_BIT=y | ||
| 1233 | # CONFIG_CRC_CCITT is not set | ||
| 1234 | # CONFIG_CRC16 is not set | ||
| 1235 | # CONFIG_CRC_T10DIF is not set | ||
| 1236 | # CONFIG_CRC_ITU_T is not set | ||
| 1237 | CONFIG_CRC32=y | ||
| 1238 | # CONFIG_CRC7 is not set | ||
| 1239 | # CONFIG_LIBCRC32C is not set | ||
| 1240 | CONFIG_ZLIB_INFLATE=y | ||
| 1241 | CONFIG_DECOMPRESS_GZIP=y | ||
| 1242 | CONFIG_HAS_IOMEM=y | ||
| 1243 | CONFIG_HAS_IOPORT=y | ||
| 1244 | CONFIG_HAS_DMA=y | ||
| 1245 | CONFIG_HAVE_LMB=y | ||
| 1246 | CONFIG_NLATTR=y | ||
| 1247 | CONFIG_GENERIC_ATOMIC64=y | ||
| 1248 | |||
| 1249 | # | ||
| 1250 | # Kernel hacking | ||
| 1251 | # | ||
| 1252 | # CONFIG_PRINTK_TIME is not set | ||
| 1253 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
| 1254 | CONFIG_ENABLE_MUST_CHECK=y | ||
| 1255 | CONFIG_FRAME_WARN=1024 | ||
| 1256 | CONFIG_MAGIC_SYSRQ=y | ||
| 1257 | # CONFIG_STRIP_ASM_SYMS is not set | ||
| 1258 | # CONFIG_UNUSED_SYMBOLS is not set | ||
| 1259 | # CONFIG_DEBUG_FS is not set | ||
| 1260 | # CONFIG_HEADERS_CHECK is not set | ||
| 1261 | CONFIG_DEBUG_KERNEL=y | ||
| 1262 | # CONFIG_DEBUG_SHIRQ is not set | ||
| 1263 | CONFIG_DETECT_SOFTLOCKUP=y | ||
| 1264 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | ||
| 1265 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | ||
| 1266 | CONFIG_DETECT_HUNG_TASK=y | ||
| 1267 | # CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set | ||
| 1268 | CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 | ||
| 1269 | CONFIG_SCHED_DEBUG=y | ||
| 1270 | # CONFIG_SCHEDSTATS is not set | ||
| 1271 | # CONFIG_TIMER_STATS is not set | ||
| 1272 | # CONFIG_DEBUG_OBJECTS is not set | ||
| 1273 | # CONFIG_SLUB_DEBUG_ON is not set | ||
| 1274 | # CONFIG_SLUB_STATS is not set | ||
| 1275 | # CONFIG_DEBUG_KMEMLEAK is not set | ||
| 1276 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
| 1277 | # CONFIG_RT_MUTEX_TESTER is not set | ||
| 1278 | # CONFIG_DEBUG_SPINLOCK is not set | ||
| 1279 | # CONFIG_DEBUG_MUTEXES is not set | ||
| 1280 | # CONFIG_DEBUG_LOCK_ALLOC is not set | ||
| 1281 | # CONFIG_PROVE_LOCKING is not set | ||
| 1282 | # CONFIG_LOCK_STAT is not set | ||
| 1283 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
| 1284 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
| 1285 | # CONFIG_DEBUG_KOBJECT is not set | ||
| 1286 | # CONFIG_DEBUG_HIGHMEM is not set | ||
| 1287 | # CONFIG_DEBUG_BUGVERBOSE is not set | ||
| 1288 | # CONFIG_DEBUG_INFO is not set | ||
| 1289 | # CONFIG_DEBUG_VM is not set | ||
| 1290 | # CONFIG_DEBUG_WRITECOUNT is not set | ||
| 1291 | # CONFIG_DEBUG_MEMORY_INIT is not set | ||
| 1292 | # CONFIG_DEBUG_LIST is not set | ||
| 1293 | # CONFIG_DEBUG_SG is not set | ||
| 1294 | # CONFIG_DEBUG_NOTIFIERS is not set | ||
| 1295 | # CONFIG_DEBUG_CREDENTIALS is not set | ||
| 1296 | # CONFIG_RCU_TORTURE_TEST is not set | ||
| 1297 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
| 1298 | # CONFIG_BACKTRACE_SELF_TEST is not set | ||
| 1299 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | ||
| 1300 | # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set | ||
| 1301 | # CONFIG_FAULT_INJECTION is not set | ||
| 1302 | # CONFIG_LATENCYTOP is not set | ||
| 1303 | CONFIG_SYSCTL_SYSCALL_CHECK=y | ||
| 1304 | # CONFIG_DEBUG_PAGEALLOC is not set | ||
| 1305 | CONFIG_HAVE_FUNCTION_TRACER=y | ||
| 1306 | CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y | ||
| 1307 | CONFIG_HAVE_DYNAMIC_FTRACE=y | ||
| 1308 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y | ||
| 1309 | CONFIG_TRACING_SUPPORT=y | ||
| 1310 | CONFIG_FTRACE=y | ||
| 1311 | # CONFIG_FUNCTION_TRACER is not set | ||
| 1312 | # CONFIG_IRQSOFF_TRACER is not set | ||
| 1313 | # CONFIG_SCHED_TRACER is not set | ||
| 1314 | # CONFIG_ENABLE_DEFAULT_TRACERS is not set | ||
| 1315 | # CONFIG_BOOT_TRACER is not set | ||
| 1316 | CONFIG_BRANCH_PROFILE_NONE=y | ||
| 1317 | # CONFIG_PROFILE_ANNOTATED_BRANCHES is not set | ||
| 1318 | # CONFIG_PROFILE_ALL_BRANCHES is not set | ||
| 1319 | # CONFIG_STACK_TRACER is not set | ||
| 1320 | # CONFIG_KMEMTRACE is not set | ||
| 1321 | # CONFIG_WORKQUEUE_TRACER is not set | ||
| 1322 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
| 1323 | # CONFIG_DMA_API_DEBUG is not set | ||
| 1324 | # CONFIG_SAMPLES is not set | ||
| 1325 | CONFIG_HAVE_ARCH_KGDB=y | ||
| 1326 | # CONFIG_KGDB is not set | ||
| 1327 | # CONFIG_PPC_DISABLE_WERROR is not set | ||
| 1328 | CONFIG_PPC_WERROR=y | ||
| 1329 | CONFIG_PRINT_STACK_DEPTH=64 | ||
| 1330 | # CONFIG_DEBUG_STACKOVERFLOW is not set | ||
| 1331 | # CONFIG_DEBUG_STACK_USAGE is not set | ||
| 1332 | # CONFIG_CODE_PATCHING_SELFTEST is not set | ||
| 1333 | # CONFIG_FTR_FIXUP_SELFTEST is not set | ||
| 1334 | # CONFIG_MSI_BITMAP_SELFTEST is not set | ||
| 1335 | # CONFIG_XMON is not set | ||
| 1336 | # CONFIG_IRQSTACKS is not set | ||
| 1337 | # CONFIG_BDI_SWITCH is not set | ||
| 1338 | # CONFIG_PPC_EARLY_DEBUG is not set | ||
| 1339 | |||
| 1340 | # | ||
| 1341 | # Security options | ||
| 1342 | # | ||
| 1343 | # CONFIG_KEYS is not set | ||
| 1344 | # CONFIG_SECURITY is not set | ||
| 1345 | # CONFIG_SECURITYFS is not set | ||
| 1346 | # CONFIG_DEFAULT_SECURITY_SELINUX is not set | ||
| 1347 | # CONFIG_DEFAULT_SECURITY_SMACK is not set | ||
| 1348 | # CONFIG_DEFAULT_SECURITY_TOMOYO is not set | ||
| 1349 | CONFIG_DEFAULT_SECURITY_DAC=y | ||
| 1350 | CONFIG_DEFAULT_SECURITY="" | ||
| 1351 | CONFIG_CRYPTO=y | ||
| 1352 | |||
| 1353 | # | ||
| 1354 | # Crypto core or helper | ||
| 1355 | # | ||
| 1356 | CONFIG_CRYPTO_ALGAPI=y | ||
| 1357 | CONFIG_CRYPTO_ALGAPI2=y | ||
| 1358 | CONFIG_CRYPTO_AEAD2=y | ||
| 1359 | CONFIG_CRYPTO_BLKCIPHER=y | ||
| 1360 | CONFIG_CRYPTO_BLKCIPHER2=y | ||
| 1361 | CONFIG_CRYPTO_HASH=y | ||
| 1362 | CONFIG_CRYPTO_HASH2=y | ||
| 1363 | CONFIG_CRYPTO_RNG2=y | ||
| 1364 | CONFIG_CRYPTO_PCOMP=y | ||
| 1365 | CONFIG_CRYPTO_MANAGER=y | ||
| 1366 | CONFIG_CRYPTO_MANAGER2=y | ||
| 1367 | # CONFIG_CRYPTO_GF128MUL is not set | ||
| 1368 | # CONFIG_CRYPTO_NULL is not set | ||
| 1369 | CONFIG_CRYPTO_WORKQUEUE=y | ||
| 1370 | # CONFIG_CRYPTO_CRYPTD is not set | ||
| 1371 | # CONFIG_CRYPTO_AUTHENC is not set | ||
| 1372 | # CONFIG_CRYPTO_TEST is not set | ||
| 1373 | |||
| 1374 | # | ||
| 1375 | # Authenticated Encryption with Associated Data | ||
| 1376 | # | ||
| 1377 | # CONFIG_CRYPTO_CCM is not set | ||
| 1378 | # CONFIG_CRYPTO_GCM is not set | ||
| 1379 | # CONFIG_CRYPTO_SEQIV is not set | ||
| 1380 | |||
| 1381 | # | ||
| 1382 | # Block modes | ||
| 1383 | # | ||
| 1384 | CONFIG_CRYPTO_CBC=y | ||
| 1385 | # CONFIG_CRYPTO_CTR is not set | ||
| 1386 | # CONFIG_CRYPTO_CTS is not set | ||
| 1387 | CONFIG_CRYPTO_ECB=y | ||
| 1388 | # CONFIG_CRYPTO_LRW is not set | ||
| 1389 | CONFIG_CRYPTO_PCBC=y | ||
| 1390 | # CONFIG_CRYPTO_XTS is not set | ||
| 1391 | |||
| 1392 | # | ||
| 1393 | # Hash modes | ||
| 1394 | # | ||
| 1395 | # CONFIG_CRYPTO_HMAC is not set | ||
| 1396 | # CONFIG_CRYPTO_XCBC is not set | ||
| 1397 | # CONFIG_CRYPTO_VMAC is not set | ||
| 1398 | |||
| 1399 | # | ||
| 1400 | # Digest | ||
| 1401 | # | ||
| 1402 | # CONFIG_CRYPTO_CRC32C is not set | ||
| 1403 | # CONFIG_CRYPTO_GHASH is not set | ||
| 1404 | # CONFIG_CRYPTO_MD4 is not set | ||
| 1405 | CONFIG_CRYPTO_MD5=y | ||
| 1406 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
| 1407 | # CONFIG_CRYPTO_RMD128 is not set | ||
| 1408 | # CONFIG_CRYPTO_RMD160 is not set | ||
| 1409 | # CONFIG_CRYPTO_RMD256 is not set | ||
| 1410 | # CONFIG_CRYPTO_RMD320 is not set | ||
| 1411 | # CONFIG_CRYPTO_SHA1 is not set | ||
| 1412 | # CONFIG_CRYPTO_SHA256 is not set | ||
| 1413 | # CONFIG_CRYPTO_SHA512 is not set | ||
| 1414 | # CONFIG_CRYPTO_TGR192 is not set | ||
| 1415 | # CONFIG_CRYPTO_WP512 is not set | ||
| 1416 | |||
| 1417 | # | ||
| 1418 | # Ciphers | ||
| 1419 | # | ||
| 1420 | # CONFIG_CRYPTO_AES is not set | ||
| 1421 | # CONFIG_CRYPTO_ANUBIS is not set | ||
| 1422 | # CONFIG_CRYPTO_ARC4 is not set | ||
| 1423 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
| 1424 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
| 1425 | # CONFIG_CRYPTO_CAST5 is not set | ||
| 1426 | # CONFIG_CRYPTO_CAST6 is not set | ||
| 1427 | CONFIG_CRYPTO_DES=y | ||
| 1428 | # CONFIG_CRYPTO_FCRYPT is not set | ||
| 1429 | # CONFIG_CRYPTO_KHAZAD is not set | ||
| 1430 | # CONFIG_CRYPTO_SALSA20 is not set | ||
| 1431 | # CONFIG_CRYPTO_SEED is not set | ||
| 1432 | # CONFIG_CRYPTO_SERPENT is not set | ||
| 1433 | # CONFIG_CRYPTO_TEA is not set | ||
| 1434 | # CONFIG_CRYPTO_TWOFISH is not set | ||
| 1435 | |||
| 1436 | # | ||
| 1437 | # Compression | ||
| 1438 | # | ||
| 1439 | # CONFIG_CRYPTO_DEFLATE is not set | ||
| 1440 | # CONFIG_CRYPTO_ZLIB is not set | ||
| 1441 | # CONFIG_CRYPTO_LZO is not set | ||
| 1442 | |||
| 1443 | # | ||
| 1444 | # Random Number Generation | ||
| 1445 | # | ||
| 1446 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
| 1447 | CONFIG_CRYPTO_HW=y | ||
| 1448 | # CONFIG_CRYPTO_DEV_HIFN_795X is not set | ||
| 1449 | # CONFIG_CRYPTO_DEV_PPC4XX is not set | ||
| 1450 | # CONFIG_PPC_CLOCK is not set | ||
| 1451 | # CONFIG_VIRTUALIZATION is not set | ||
diff --git a/arch/powerpc/include/asm/asm-compat.h b/arch/powerpc/include/asm/asm-compat.h index a9b91ed3d4b9..2048a6aeea91 100644 --- a/arch/powerpc/include/asm/asm-compat.h +++ b/arch/powerpc/include/asm/asm-compat.h | |||
| @@ -21,6 +21,7 @@ | |||
| 21 | /* operations for longs and pointers */ | 21 | /* operations for longs and pointers */ |
| 22 | #define PPC_LL stringify_in_c(ld) | 22 | #define PPC_LL stringify_in_c(ld) |
| 23 | #define PPC_STL stringify_in_c(std) | 23 | #define PPC_STL stringify_in_c(std) |
| 24 | #define PPC_STLU stringify_in_c(stdu) | ||
| 24 | #define PPC_LCMPI stringify_in_c(cmpdi) | 25 | #define PPC_LCMPI stringify_in_c(cmpdi) |
| 25 | #define PPC_LONG stringify_in_c(.llong) | 26 | #define PPC_LONG stringify_in_c(.llong) |
| 26 | #define PPC_LONG_ALIGN stringify_in_c(.balign 8) | 27 | #define PPC_LONG_ALIGN stringify_in_c(.balign 8) |
| @@ -44,6 +45,7 @@ | |||
| 44 | /* operations for longs and pointers */ | 45 | /* operations for longs and pointers */ |
| 45 | #define PPC_LL stringify_in_c(lwz) | 46 | #define PPC_LL stringify_in_c(lwz) |
| 46 | #define PPC_STL stringify_in_c(stw) | 47 | #define PPC_STL stringify_in_c(stw) |
| 48 | #define PPC_STLU stringify_in_c(stwu) | ||
| 47 | #define PPC_LCMPI stringify_in_c(cmpwi) | 49 | #define PPC_LCMPI stringify_in_c(cmpwi) |
| 48 | #define PPC_LONG stringify_in_c(.long) | 50 | #define PPC_LONG stringify_in_c(.long) |
| 49 | #define PPC_LONG_ALIGN stringify_in_c(.balign 4) | 51 | #define PPC_LONG_ALIGN stringify_in_c(.balign 4) |
diff --git a/arch/powerpc/include/asm/bug.h b/arch/powerpc/include/asm/bug.h index 2c15212e1700..065c590c991d 100644 --- a/arch/powerpc/include/asm/bug.h +++ b/arch/powerpc/include/asm/bug.h | |||
| @@ -85,12 +85,12 @@ | |||
| 85 | } \ | 85 | } \ |
| 86 | } while (0) | 86 | } while (0) |
| 87 | 87 | ||
| 88 | #define __WARN() do { \ | 88 | #define __WARN_TAINT(taint) do { \ |
| 89 | __asm__ __volatile__( \ | 89 | __asm__ __volatile__( \ |
| 90 | "1: twi 31,0,0\n" \ | 90 | "1: twi 31,0,0\n" \ |
| 91 | _EMIT_BUG_ENTRY \ | 91 | _EMIT_BUG_ENTRY \ |
| 92 | : : "i" (__FILE__), "i" (__LINE__), \ | 92 | : : "i" (__FILE__), "i" (__LINE__), \ |
| 93 | "i" (BUGFLAG_WARNING), \ | 93 | "i" (BUGFLAG_TAINT(taint)), \ |
| 94 | "i" (sizeof(struct bug_entry))); \ | 94 | "i" (sizeof(struct bug_entry))); \ |
| 95 | } while (0) | 95 | } while (0) |
| 96 | 96 | ||
| @@ -104,7 +104,7 @@ | |||
| 104 | "1: "PPC_TLNEI" %4,0\n" \ | 104 | "1: "PPC_TLNEI" %4,0\n" \ |
| 105 | _EMIT_BUG_ENTRY \ | 105 | _EMIT_BUG_ENTRY \ |
| 106 | : : "i" (__FILE__), "i" (__LINE__), \ | 106 | : : "i" (__FILE__), "i" (__LINE__), \ |
| 107 | "i" (BUGFLAG_WARNING), \ | 107 | "i" (BUGFLAG_TAINT(TAINT_WARN)), \ |
| 108 | "i" (sizeof(struct bug_entry)), \ | 108 | "i" (sizeof(struct bug_entry)), \ |
| 109 | "r" (__ret_warn_on)); \ | 109 | "r" (__ret_warn_on)); \ |
| 110 | } \ | 110 | } \ |
diff --git a/arch/powerpc/include/asm/cache.h b/arch/powerpc/include/asm/cache.h index 725634fc18c6..4b509411ad8a 100644 --- a/arch/powerpc/include/asm/cache.h +++ b/arch/powerpc/include/asm/cache.h | |||
| @@ -42,7 +42,7 @@ extern struct ppc64_caches ppc64_caches; | |||
| 42 | #endif /* __powerpc64__ && ! __ASSEMBLY__ */ | 42 | #endif /* __powerpc64__ && ! __ASSEMBLY__ */ |
| 43 | 43 | ||
| 44 | #if !defined(__ASSEMBLY__) | 44 | #if !defined(__ASSEMBLY__) |
| 45 | #define __read_mostly __attribute__((__section__(".data.read_mostly"))) | 45 | #define __read_mostly __attribute__((__section__(".data..read_mostly"))) |
| 46 | #endif | 46 | #endif |
| 47 | 47 | ||
| 48 | #endif /* __KERNEL__ */ | 48 | #endif /* __KERNEL__ */ |
diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h index e3cba4e1eb34..b0b21134f61a 100644 --- a/arch/powerpc/include/asm/cputable.h +++ b/arch/powerpc/include/asm/cputable.h | |||
| @@ -70,6 +70,7 @@ struct pt_regs; | |||
| 70 | extern int machine_check_generic(struct pt_regs *regs); | 70 | extern int machine_check_generic(struct pt_regs *regs); |
| 71 | extern int machine_check_4xx(struct pt_regs *regs); | 71 | extern int machine_check_4xx(struct pt_regs *regs); |
| 72 | extern int machine_check_440A(struct pt_regs *regs); | 72 | extern int machine_check_440A(struct pt_regs *regs); |
| 73 | extern int machine_check_e500mc(struct pt_regs *regs); | ||
| 73 | extern int machine_check_e500(struct pt_regs *regs); | 74 | extern int machine_check_e500(struct pt_regs *regs); |
| 74 | extern int machine_check_e200(struct pt_regs *regs); | 75 | extern int machine_check_e200(struct pt_regs *regs); |
| 75 | extern int machine_check_47x(struct pt_regs *regs); | 76 | extern int machine_check_47x(struct pt_regs *regs); |
diff --git a/arch/powerpc/include/asm/device.h b/arch/powerpc/include/asm/device.h index 6d94d27ed850..a3954e4fcbe2 100644 --- a/arch/powerpc/include/asm/device.h +++ b/arch/powerpc/include/asm/device.h | |||
| @@ -10,9 +10,6 @@ struct dma_map_ops; | |||
| 10 | struct device_node; | 10 | struct device_node; |
| 11 | 11 | ||
| 12 | struct dev_archdata { | 12 | struct dev_archdata { |
| 13 | /* Optional pointer to an OF device node */ | ||
| 14 | struct device_node *of_node; | ||
| 15 | |||
| 16 | /* DMA operations on that device */ | 13 | /* DMA operations on that device */ |
| 17 | struct dma_map_ops *dma_ops; | 14 | struct dma_map_ops *dma_ops; |
| 18 | 15 | ||
| @@ -30,19 +27,8 @@ struct dev_archdata { | |||
| 30 | #endif | 27 | #endif |
| 31 | }; | 28 | }; |
| 32 | 29 | ||
| 33 | static inline void dev_archdata_set_node(struct dev_archdata *ad, | ||
| 34 | struct device_node *np) | ||
| 35 | { | ||
| 36 | ad->of_node = np; | ||
| 37 | } | ||
| 38 | |||
| 39 | static inline struct device_node * | ||
| 40 | dev_archdata_get_node(const struct dev_archdata *ad) | ||
| 41 | { | ||
| 42 | return ad->of_node; | ||
| 43 | } | ||
| 44 | |||
| 45 | struct pdev_archdata { | 30 | struct pdev_archdata { |
| 31 | u64 dma_mask; | ||
| 46 | }; | 32 | }; |
| 47 | 33 | ||
| 48 | #endif /* _ASM_POWERPC_DEVICE_H */ | 34 | #endif /* _ASM_POWERPC_DEVICE_H */ |
diff --git a/arch/powerpc/include/asm/kexec.h b/arch/powerpc/include/asm/kexec.h index a6ca6da1430b..2a9cd74a841e 100644 --- a/arch/powerpc/include/asm/kexec.h +++ b/arch/powerpc/include/asm/kexec.h | |||
| @@ -2,6 +2,18 @@ | |||
| 2 | #define _ASM_POWERPC_KEXEC_H | 2 | #define _ASM_POWERPC_KEXEC_H |
| 3 | #ifdef __KERNEL__ | 3 | #ifdef __KERNEL__ |
| 4 | 4 | ||
| 5 | #ifdef CONFIG_FSL_BOOKE | ||
| 6 | |||
| 7 | /* | ||
| 8 | * On FSL-BookE we setup a 1:1 mapping which covers the first 2GiB of memory | ||
| 9 | * and therefore we can only deal with memory within this range | ||
| 10 | */ | ||
| 11 | #define KEXEC_SOURCE_MEMORY_LIMIT (2 * 1024 * 1024 * 1024UL) | ||
| 12 | #define KEXEC_DESTINATION_MEMORY_LIMIT (2 * 1024 * 1024 * 1024UL) | ||
| 13 | #define KEXEC_CONTROL_MEMORY_LIMIT (2 * 1024 * 1024 * 1024UL) | ||
| 14 | |||
| 15 | #else | ||
| 16 | |||
| 5 | /* | 17 | /* |
| 6 | * Maximum page that is mapped directly into kernel memory. | 18 | * Maximum page that is mapped directly into kernel memory. |
| 7 | * XXX: Since we copy virt we can use any page we allocate | 19 | * XXX: Since we copy virt we can use any page we allocate |
| @@ -21,6 +33,7 @@ | |||
| 21 | /* TASK_SIZE, probably left over from use_mm ?? */ | 33 | /* TASK_SIZE, probably left over from use_mm ?? */ |
| 22 | #define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE | 34 | #define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE |
| 23 | #endif | 35 | #endif |
| 36 | #endif | ||
| 24 | 37 | ||
| 25 | #define KEXEC_CONTROL_PAGE_SIZE 4096 | 38 | #define KEXEC_CONTROL_PAGE_SIZE 4096 |
| 26 | 39 | ||
diff --git a/arch/powerpc/include/asm/kvm.h b/arch/powerpc/include/asm/kvm.h index 81f3b0b5601e..6c5547d82bbe 100644 --- a/arch/powerpc/include/asm/kvm.h +++ b/arch/powerpc/include/asm/kvm.h | |||
| @@ -77,4 +77,14 @@ struct kvm_debug_exit_arch { | |||
| 77 | struct kvm_guest_debug_arch { | 77 | struct kvm_guest_debug_arch { |
| 78 | }; | 78 | }; |
| 79 | 79 | ||
| 80 | #define KVM_REG_MASK 0x001f | ||
| 81 | #define KVM_REG_EXT_MASK 0xffe0 | ||
| 82 | #define KVM_REG_GPR 0x0000 | ||
| 83 | #define KVM_REG_FPR 0x0020 | ||
| 84 | #define KVM_REG_QPR 0x0040 | ||
| 85 | #define KVM_REG_FQPR 0x0060 | ||
| 86 | |||
| 87 | #define KVM_INTERRUPT_SET -1U | ||
| 88 | #define KVM_INTERRUPT_UNSET -2U | ||
| 89 | |||
| 80 | #endif /* __LINUX_KVM_POWERPC_H */ | 90 | #endif /* __LINUX_KVM_POWERPC_H */ |
diff --git a/arch/powerpc/include/asm/kvm_asm.h b/arch/powerpc/include/asm/kvm_asm.h index aadf2dd6f84e..c5ea4cda34b3 100644 --- a/arch/powerpc/include/asm/kvm_asm.h +++ b/arch/powerpc/include/asm/kvm_asm.h | |||
| @@ -88,6 +88,8 @@ | |||
| 88 | 88 | ||
| 89 | #define BOOK3S_HFLAG_DCBZ32 0x1 | 89 | #define BOOK3S_HFLAG_DCBZ32 0x1 |
| 90 | #define BOOK3S_HFLAG_SLB 0x2 | 90 | #define BOOK3S_HFLAG_SLB 0x2 |
| 91 | #define BOOK3S_HFLAG_PAIRED_SINGLE 0x4 | ||
| 92 | #define BOOK3S_HFLAG_NATIVE_PS 0x8 | ||
| 91 | 93 | ||
| 92 | #define RESUME_FLAG_NV (1<<0) /* Reload guest nonvolatile state? */ | 94 | #define RESUME_FLAG_NV (1<<0) /* Reload guest nonvolatile state? */ |
| 93 | #define RESUME_FLAG_HOST (1<<1) /* Resume host? */ | 95 | #define RESUME_FLAG_HOST (1<<1) /* Resume host? */ |
diff --git a/arch/powerpc/include/asm/kvm_book3s.h b/arch/powerpc/include/asm/kvm_book3s.h index db7db0a96967..6f74d93725a0 100644 --- a/arch/powerpc/include/asm/kvm_book3s.h +++ b/arch/powerpc/include/asm/kvm_book3s.h | |||
| @@ -22,46 +22,47 @@ | |||
| 22 | 22 | ||
| 23 | #include <linux/types.h> | 23 | #include <linux/types.h> |
| 24 | #include <linux/kvm_host.h> | 24 | #include <linux/kvm_host.h> |
| 25 | #include <asm/kvm_book3s_64_asm.h> | 25 | #include <asm/kvm_book3s_asm.h> |
| 26 | 26 | ||
| 27 | struct kvmppc_slb { | 27 | struct kvmppc_slb { |
| 28 | u64 esid; | 28 | u64 esid; |
| 29 | u64 vsid; | 29 | u64 vsid; |
| 30 | u64 orige; | 30 | u64 orige; |
| 31 | u64 origv; | 31 | u64 origv; |
| 32 | bool valid; | 32 | bool valid : 1; |
| 33 | bool Ks; | 33 | bool Ks : 1; |
| 34 | bool Kp; | 34 | bool Kp : 1; |
| 35 | bool nx; | 35 | bool nx : 1; |
| 36 | bool large; /* PTEs are 16MB */ | 36 | bool large : 1; /* PTEs are 16MB */ |
| 37 | bool tb; /* 1TB segment */ | 37 | bool tb : 1; /* 1TB segment */ |
| 38 | bool class; | 38 | bool class : 1; |
| 39 | }; | 39 | }; |
| 40 | 40 | ||
| 41 | struct kvmppc_sr { | 41 | struct kvmppc_sr { |
| 42 | u32 raw; | 42 | u32 raw; |
| 43 | u32 vsid; | 43 | u32 vsid; |
| 44 | bool Ks; | 44 | bool Ks : 1; |
| 45 | bool Kp; | 45 | bool Kp : 1; |
| 46 | bool nx; | 46 | bool nx : 1; |
| 47 | bool valid : 1; | ||
| 47 | }; | 48 | }; |
| 48 | 49 | ||
| 49 | struct kvmppc_bat { | 50 | struct kvmppc_bat { |
| 50 | u64 raw; | 51 | u64 raw; |
| 51 | u32 bepi; | 52 | u32 bepi; |
| 52 | u32 bepi_mask; | 53 | u32 bepi_mask; |
| 53 | bool vs; | ||
| 54 | bool vp; | ||
| 55 | u32 brpn; | 54 | u32 brpn; |
| 56 | u8 wimg; | 55 | u8 wimg; |
| 57 | u8 pp; | 56 | u8 pp; |
| 57 | bool vs : 1; | ||
| 58 | bool vp : 1; | ||
| 58 | }; | 59 | }; |
| 59 | 60 | ||
| 60 | struct kvmppc_sid_map { | 61 | struct kvmppc_sid_map { |
| 61 | u64 guest_vsid; | 62 | u64 guest_vsid; |
| 62 | u64 guest_esid; | 63 | u64 guest_esid; |
| 63 | u64 host_vsid; | 64 | u64 host_vsid; |
| 64 | bool valid; | 65 | bool valid : 1; |
| 65 | }; | 66 | }; |
| 66 | 67 | ||
| 67 | #define SID_MAP_BITS 9 | 68 | #define SID_MAP_BITS 9 |
| @@ -70,7 +71,7 @@ struct kvmppc_sid_map { | |||
| 70 | 71 | ||
| 71 | struct kvmppc_vcpu_book3s { | 72 | struct kvmppc_vcpu_book3s { |
| 72 | struct kvm_vcpu vcpu; | 73 | struct kvm_vcpu vcpu; |
| 73 | struct kvmppc_book3s_shadow_vcpu shadow_vcpu; | 74 | struct kvmppc_book3s_shadow_vcpu *shadow_vcpu; |
| 74 | struct kvmppc_sid_map sid_map[SID_MAP_NUM]; | 75 | struct kvmppc_sid_map sid_map[SID_MAP_NUM]; |
| 75 | struct kvmppc_slb slb[64]; | 76 | struct kvmppc_slb slb[64]; |
| 76 | struct { | 77 | struct { |
| @@ -82,9 +83,10 @@ struct kvmppc_vcpu_book3s { | |||
| 82 | struct kvmppc_bat ibat[8]; | 83 | struct kvmppc_bat ibat[8]; |
| 83 | struct kvmppc_bat dbat[8]; | 84 | struct kvmppc_bat dbat[8]; |
| 84 | u64 hid[6]; | 85 | u64 hid[6]; |
| 86 | u64 gqr[8]; | ||
| 85 | int slb_nr; | 87 | int slb_nr; |
| 88 | u32 dsisr; | ||
| 86 | u64 sdr1; | 89 | u64 sdr1; |
| 87 | u64 dsisr; | ||
| 88 | u64 hior; | 90 | u64 hior; |
| 89 | u64 msr_mask; | 91 | u64 msr_mask; |
| 90 | u64 vsid_first; | 92 | u64 vsid_first; |
| @@ -98,15 +100,15 @@ struct kvmppc_vcpu_book3s { | |||
| 98 | #define CONTEXT_GUEST 1 | 100 | #define CONTEXT_GUEST 1 |
| 99 | #define CONTEXT_GUEST_END 2 | 101 | #define CONTEXT_GUEST_END 2 |
| 100 | 102 | ||
| 101 | #define VSID_REAL 0xfffffffffff00000 | 103 | #define VSID_REAL 0x1fffffffffc00000ULL |
| 102 | #define VSID_REAL_DR 0xffffffffffe00000 | 104 | #define VSID_BAT 0x1fffffffffb00000ULL |
| 103 | #define VSID_REAL_IR 0xffffffffffd00000 | 105 | #define VSID_REAL_DR 0x2000000000000000ULL |
| 104 | #define VSID_BAT 0xffffffffffc00000 | 106 | #define VSID_REAL_IR 0x4000000000000000ULL |
| 105 | #define VSID_PR 0x8000000000000000 | 107 | #define VSID_PR 0x8000000000000000ULL |
| 106 | 108 | ||
| 107 | extern void kvmppc_mmu_pte_flush(struct kvm_vcpu *vcpu, u64 ea, u64 ea_mask); | 109 | extern void kvmppc_mmu_pte_flush(struct kvm_vcpu *vcpu, ulong ea, ulong ea_mask); |
| 108 | extern void kvmppc_mmu_pte_vflush(struct kvm_vcpu *vcpu, u64 vp, u64 vp_mask); | 110 | extern void kvmppc_mmu_pte_vflush(struct kvm_vcpu *vcpu, u64 vp, u64 vp_mask); |
| 109 | extern void kvmppc_mmu_pte_pflush(struct kvm_vcpu *vcpu, u64 pa_start, u64 pa_end); | 111 | extern void kvmppc_mmu_pte_pflush(struct kvm_vcpu *vcpu, ulong pa_start, ulong pa_end); |
| 110 | extern void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 new_msr); | 112 | extern void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 new_msr); |
| 111 | extern void kvmppc_mmu_book3s_64_init(struct kvm_vcpu *vcpu); | 113 | extern void kvmppc_mmu_book3s_64_init(struct kvm_vcpu *vcpu); |
| 112 | extern void kvmppc_mmu_book3s_32_init(struct kvm_vcpu *vcpu); | 114 | extern void kvmppc_mmu_book3s_32_init(struct kvm_vcpu *vcpu); |
| @@ -114,11 +116,13 @@ extern int kvmppc_mmu_map_page(struct kvm_vcpu *vcpu, struct kvmppc_pte *pte); | |||
| 114 | extern int kvmppc_mmu_map_segment(struct kvm_vcpu *vcpu, ulong eaddr); | 116 | extern int kvmppc_mmu_map_segment(struct kvm_vcpu *vcpu, ulong eaddr); |
| 115 | extern void kvmppc_mmu_flush_segments(struct kvm_vcpu *vcpu); | 117 | extern void kvmppc_mmu_flush_segments(struct kvm_vcpu *vcpu); |
| 116 | extern struct kvmppc_pte *kvmppc_mmu_find_pte(struct kvm_vcpu *vcpu, u64 ea, bool data); | 118 | extern struct kvmppc_pte *kvmppc_mmu_find_pte(struct kvm_vcpu *vcpu, u64 ea, bool data); |
| 117 | extern int kvmppc_ld(struct kvm_vcpu *vcpu, ulong eaddr, int size, void *ptr, bool data); | 119 | extern int kvmppc_ld(struct kvm_vcpu *vcpu, ulong *eaddr, int size, void *ptr, bool data); |
| 118 | extern int kvmppc_st(struct kvm_vcpu *vcpu, ulong eaddr, int size, void *ptr); | 120 | extern int kvmppc_st(struct kvm_vcpu *vcpu, ulong *eaddr, int size, void *ptr, bool data); |
| 119 | extern void kvmppc_book3s_queue_irqprio(struct kvm_vcpu *vcpu, unsigned int vec); | 121 | extern void kvmppc_book3s_queue_irqprio(struct kvm_vcpu *vcpu, unsigned int vec); |
| 120 | extern void kvmppc_set_bat(struct kvm_vcpu *vcpu, struct kvmppc_bat *bat, | 122 | extern void kvmppc_set_bat(struct kvm_vcpu *vcpu, struct kvmppc_bat *bat, |
| 121 | bool upper, u32 val); | 123 | bool upper, u32 val); |
| 124 | extern void kvmppc_giveup_ext(struct kvm_vcpu *vcpu, ulong msr); | ||
| 125 | extern int kvmppc_emulate_paired_single(struct kvm_run *run, struct kvm_vcpu *vcpu); | ||
| 122 | 126 | ||
| 123 | extern u32 kvmppc_trampoline_lowmem; | 127 | extern u32 kvmppc_trampoline_lowmem; |
| 124 | extern u32 kvmppc_trampoline_enter; | 128 | extern u32 kvmppc_trampoline_enter; |
| @@ -126,6 +130,8 @@ extern void kvmppc_rmcall(ulong srr0, ulong srr1); | |||
| 126 | extern void kvmppc_load_up_fpu(void); | 130 | extern void kvmppc_load_up_fpu(void); |
| 127 | extern void kvmppc_load_up_altivec(void); | 131 | extern void kvmppc_load_up_altivec(void); |
| 128 | extern void kvmppc_load_up_vsx(void); | 132 | extern void kvmppc_load_up_vsx(void); |
| 133 | extern u32 kvmppc_alignment_dsisr(struct kvm_vcpu *vcpu, unsigned int inst); | ||
| 134 | extern ulong kvmppc_alignment_dar(struct kvm_vcpu *vcpu, unsigned int inst); | ||
| 129 | 135 | ||
| 130 | static inline struct kvmppc_vcpu_book3s *to_book3s(struct kvm_vcpu *vcpu) | 136 | static inline struct kvmppc_vcpu_book3s *to_book3s(struct kvm_vcpu *vcpu) |
| 131 | { | 137 | { |
| @@ -140,7 +146,108 @@ static inline ulong dsisr(void) | |||
| 140 | } | 146 | } |
| 141 | 147 | ||
| 142 | extern void kvm_return_point(void); | 148 | extern void kvm_return_point(void); |
| 149 | static inline struct kvmppc_book3s_shadow_vcpu *to_svcpu(struct kvm_vcpu *vcpu); | ||
| 150 | |||
| 151 | static inline void kvmppc_set_gpr(struct kvm_vcpu *vcpu, int num, ulong val) | ||
| 152 | { | ||
| 153 | if ( num < 14 ) { | ||
| 154 | to_svcpu(vcpu)->gpr[num] = val; | ||
| 155 | to_book3s(vcpu)->shadow_vcpu->gpr[num] = val; | ||
| 156 | } else | ||
| 157 | vcpu->arch.gpr[num] = val; | ||
| 158 | } | ||
| 159 | |||
| 160 | static inline ulong kvmppc_get_gpr(struct kvm_vcpu *vcpu, int num) | ||
| 161 | { | ||
| 162 | if ( num < 14 ) | ||
| 163 | return to_svcpu(vcpu)->gpr[num]; | ||
| 164 | else | ||
| 165 | return vcpu->arch.gpr[num]; | ||
| 166 | } | ||
| 167 | |||
| 168 | static inline void kvmppc_set_cr(struct kvm_vcpu *vcpu, u32 val) | ||
| 169 | { | ||
| 170 | to_svcpu(vcpu)->cr = val; | ||
| 171 | to_book3s(vcpu)->shadow_vcpu->cr = val; | ||
| 172 | } | ||
| 173 | |||
| 174 | static inline u32 kvmppc_get_cr(struct kvm_vcpu *vcpu) | ||
| 175 | { | ||
| 176 | return to_svcpu(vcpu)->cr; | ||
| 177 | } | ||
| 178 | |||
| 179 | static inline void kvmppc_set_xer(struct kvm_vcpu *vcpu, u32 val) | ||
| 180 | { | ||
| 181 | to_svcpu(vcpu)->xer = val; | ||
| 182 | to_book3s(vcpu)->shadow_vcpu->xer = val; | ||
| 183 | } | ||
| 184 | |||
| 185 | static inline u32 kvmppc_get_xer(struct kvm_vcpu *vcpu) | ||
| 186 | { | ||
| 187 | return to_svcpu(vcpu)->xer; | ||
| 188 | } | ||
| 189 | |||
| 190 | static inline void kvmppc_set_ctr(struct kvm_vcpu *vcpu, ulong val) | ||
| 191 | { | ||
| 192 | to_svcpu(vcpu)->ctr = val; | ||
| 193 | } | ||
| 194 | |||
| 195 | static inline ulong kvmppc_get_ctr(struct kvm_vcpu *vcpu) | ||
| 196 | { | ||
| 197 | return to_svcpu(vcpu)->ctr; | ||
| 198 | } | ||
| 199 | |||
| 200 | static inline void kvmppc_set_lr(struct kvm_vcpu *vcpu, ulong val) | ||
| 201 | { | ||
| 202 | to_svcpu(vcpu)->lr = val; | ||
| 203 | } | ||
| 204 | |||
| 205 | static inline ulong kvmppc_get_lr(struct kvm_vcpu *vcpu) | ||
| 206 | { | ||
| 207 | return to_svcpu(vcpu)->lr; | ||
| 208 | } | ||
| 209 | |||
| 210 | static inline void kvmppc_set_pc(struct kvm_vcpu *vcpu, ulong val) | ||
| 211 | { | ||
| 212 | to_svcpu(vcpu)->pc = val; | ||
| 213 | } | ||
| 214 | |||
| 215 | static inline ulong kvmppc_get_pc(struct kvm_vcpu *vcpu) | ||
| 216 | { | ||
| 217 | return to_svcpu(vcpu)->pc; | ||
| 218 | } | ||
| 219 | |||
| 220 | static inline u32 kvmppc_get_last_inst(struct kvm_vcpu *vcpu) | ||
| 221 | { | ||
| 222 | ulong pc = kvmppc_get_pc(vcpu); | ||
| 223 | struct kvmppc_book3s_shadow_vcpu *svcpu = to_svcpu(vcpu); | ||
| 224 | |||
| 225 | /* Load the instruction manually if it failed to do so in the | ||
| 226 | * exit path */ | ||
| 227 | if (svcpu->last_inst == KVM_INST_FETCH_FAILED) | ||
| 228 | kvmppc_ld(vcpu, &pc, sizeof(u32), &svcpu->last_inst, false); | ||
| 229 | |||
| 230 | return svcpu->last_inst; | ||
| 231 | } | ||
| 232 | |||
| 233 | static inline ulong kvmppc_get_fault_dar(struct kvm_vcpu *vcpu) | ||
| 234 | { | ||
| 235 | return to_svcpu(vcpu)->fault_dar; | ||
| 236 | } | ||
| 237 | |||
| 238 | /* Magic register values loaded into r3 and r4 before the 'sc' assembly | ||
| 239 | * instruction for the OSI hypercalls */ | ||
| 240 | #define OSI_SC_MAGIC_R3 0x113724FA | ||
| 241 | #define OSI_SC_MAGIC_R4 0x77810F9B | ||
| 143 | 242 | ||
| 144 | #define INS_DCBZ 0x7c0007ec | 243 | #define INS_DCBZ 0x7c0007ec |
| 145 | 244 | ||
| 245 | /* Also add subarch specific defines */ | ||
| 246 | |||
| 247 | #ifdef CONFIG_PPC_BOOK3S_32 | ||
| 248 | #include <asm/kvm_book3s_32.h> | ||
| 249 | #else | ||
| 250 | #include <asm/kvm_book3s_64.h> | ||
| 251 | #endif | ||
| 252 | |||
| 146 | #endif /* __ASM_KVM_BOOK3S_H__ */ | 253 | #endif /* __ASM_KVM_BOOK3S_H__ */ |
diff --git a/arch/powerpc/include/asm/kvm_book3s_32.h b/arch/powerpc/include/asm/kvm_book3s_32.h new file mode 100644 index 000000000000..de604db135f5 --- /dev/null +++ b/arch/powerpc/include/asm/kvm_book3s_32.h | |||
| @@ -0,0 +1,42 @@ | |||
| 1 | /* | ||
| 2 | * This program is free software; you can redistribute it and/or modify | ||
| 3 | * it under the terms of the GNU General Public License, version 2, as | ||
| 4 | * published by the Free Software Foundation. | ||
| 5 | * | ||
| 6 | * This program is distributed in the hope that it will be useful, | ||
| 7 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 8 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 9 | * GNU General Public License for more details. | ||
| 10 | * | ||
| 11 | * You should have received a copy of the GNU General Public License | ||
| 12 | * along with this program; if not, write to the Free Software | ||
| 13 | * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. | ||
| 14 | * | ||
| 15 | * Copyright SUSE Linux Products GmbH 2010 | ||
| 16 | * | ||
| 17 | * Authors: Alexander Graf <agraf@suse.de> | ||
| 18 | */ | ||
| 19 | |||
| 20 | #ifndef __ASM_KVM_BOOK3S_32_H__ | ||
| 21 | #define __ASM_KVM_BOOK3S_32_H__ | ||
| 22 | |||
| 23 | static inline struct kvmppc_book3s_shadow_vcpu *to_svcpu(struct kvm_vcpu *vcpu) | ||
| 24 | { | ||
| 25 | return to_book3s(vcpu)->shadow_vcpu; | ||
| 26 | } | ||
| 27 | |||
| 28 | #define PTE_SIZE 12 | ||
| 29 | #define VSID_ALL 0 | ||
| 30 | #define SR_INVALID 0x00000001 /* VSID 1 should always be unused */ | ||
| 31 | #define SR_KP 0x20000000 | ||
| 32 | #define PTE_V 0x80000000 | ||
| 33 | #define PTE_SEC 0x00000040 | ||
| 34 | #define PTE_M 0x00000010 | ||
| 35 | #define PTE_R 0x00000100 | ||
| 36 | #define PTE_C 0x00000080 | ||
| 37 | |||
| 38 | #define SID_SHIFT 28 | ||
| 39 | #define ESID_MASK 0xf0000000 | ||
| 40 | #define VSID_MASK 0x00fffffff0000000ULL | ||
| 41 | |||
| 42 | #endif /* __ASM_KVM_BOOK3S_32_H__ */ | ||
diff --git a/arch/powerpc/include/asm/kvm_book3s_64.h b/arch/powerpc/include/asm/kvm_book3s_64.h new file mode 100644 index 000000000000..4cadd612d575 --- /dev/null +++ b/arch/powerpc/include/asm/kvm_book3s_64.h | |||
| @@ -0,0 +1,28 @@ | |||
| 1 | /* | ||
| 2 | * This program is free software; you can redistribute it and/or modify | ||
| 3 | * it under the terms of the GNU General Public License, version 2, as | ||
| 4 | * published by the Free Software Foundation. | ||
| 5 | * | ||
| 6 | * This program is distributed in the hope that it will be useful, | ||
| 7 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 8 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 9 | * GNU General Public License for more details. | ||
| 10 | * | ||
| 11 | * You should have received a copy of the GNU General Public License | ||
| 12 | * along with this program; if not, write to the Free Software | ||
| 13 | * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. | ||
| 14 | * | ||
| 15 | * Copyright SUSE Linux Products GmbH 2010 | ||
| 16 | * | ||
| 17 | * Authors: Alexander Graf <agraf@suse.de> | ||
| 18 | */ | ||
| 19 | |||
| 20 | #ifndef __ASM_KVM_BOOK3S_64_H__ | ||
| 21 | #define __ASM_KVM_BOOK3S_64_H__ | ||
| 22 | |||
| 23 | static inline struct kvmppc_book3s_shadow_vcpu *to_svcpu(struct kvm_vcpu *vcpu) | ||
| 24 | { | ||
| 25 | return &get_paca()->shadow_vcpu; | ||
| 26 | } | ||
| 27 | |||
| 28 | #endif /* __ASM_KVM_BOOK3S_64_H__ */ | ||
diff --git a/arch/powerpc/include/asm/kvm_book3s_64_asm.h b/arch/powerpc/include/asm/kvm_book3s_asm.h index 183461b48407..36fdb3aff30b 100644 --- a/arch/powerpc/include/asm/kvm_book3s_64_asm.h +++ b/arch/powerpc/include/asm/kvm_book3s_asm.h | |||
| @@ -22,7 +22,7 @@ | |||
| 22 | 22 | ||
| 23 | #ifdef __ASSEMBLY__ | 23 | #ifdef __ASSEMBLY__ |
| 24 | 24 | ||
| 25 | #ifdef CONFIG_KVM_BOOK3S_64_HANDLER | 25 | #ifdef CONFIG_KVM_BOOK3S_HANDLER |
| 26 | 26 | ||
| 27 | #include <asm/kvm_asm.h> | 27 | #include <asm/kvm_asm.h> |
| 28 | 28 | ||
| @@ -55,7 +55,7 @@ kvmppc_resume_\intno: | |||
| 55 | .macro DO_KVM intno | 55 | .macro DO_KVM intno |
| 56 | .endm | 56 | .endm |
| 57 | 57 | ||
| 58 | #endif /* CONFIG_KVM_BOOK3S_64_HANDLER */ | 58 | #endif /* CONFIG_KVM_BOOK3S_HANDLER */ |
| 59 | 59 | ||
| 60 | #else /*__ASSEMBLY__ */ | 60 | #else /*__ASSEMBLY__ */ |
| 61 | 61 | ||
| @@ -63,12 +63,33 @@ struct kvmppc_book3s_shadow_vcpu { | |||
| 63 | ulong gpr[14]; | 63 | ulong gpr[14]; |
| 64 | u32 cr; | 64 | u32 cr; |
| 65 | u32 xer; | 65 | u32 xer; |
| 66 | |||
| 67 | u32 fault_dsisr; | ||
| 68 | u32 last_inst; | ||
| 69 | ulong ctr; | ||
| 70 | ulong lr; | ||
| 71 | ulong pc; | ||
| 72 | ulong shadow_srr1; | ||
| 73 | ulong fault_dar; | ||
| 74 | |||
| 66 | ulong host_r1; | 75 | ulong host_r1; |
| 67 | ulong host_r2; | 76 | ulong host_r2; |
| 68 | ulong handler; | 77 | ulong handler; |
| 69 | ulong scratch0; | 78 | ulong scratch0; |
| 70 | ulong scratch1; | 79 | ulong scratch1; |
| 71 | ulong vmhandler; | 80 | ulong vmhandler; |
| 81 | u8 in_guest; | ||
| 82 | |||
| 83 | #ifdef CONFIG_PPC_BOOK3S_32 | ||
| 84 | u32 sr[16]; /* Guest SRs */ | ||
| 85 | #endif | ||
| 86 | #ifdef CONFIG_PPC_BOOK3S_64 | ||
| 87 | u8 slb_max; /* highest used guest slb entry */ | ||
| 88 | struct { | ||
| 89 | u64 esid; | ||
| 90 | u64 vsid; | ||
| 91 | } slb[64]; /* guest SLB */ | ||
| 92 | #endif | ||
| 72 | }; | 93 | }; |
| 73 | 94 | ||
| 74 | #endif /*__ASSEMBLY__ */ | 95 | #endif /*__ASSEMBLY__ */ |
diff --git a/arch/powerpc/include/asm/kvm_booke.h b/arch/powerpc/include/asm/kvm_booke.h new file mode 100644 index 000000000000..9c9ba3d59b1b --- /dev/null +++ b/arch/powerpc/include/asm/kvm_booke.h | |||
| @@ -0,0 +1,96 @@ | |||
| 1 | /* | ||
| 2 | * This program is free software; you can redistribute it and/or modify | ||
| 3 | * it under the terms of the GNU General Public License, version 2, as | ||
| 4 | * published by the Free Software Foundation. | ||
| 5 | * | ||
| 6 | * This program is distributed in the hope that it will be useful, | ||
| 7 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 8 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 9 | * GNU General Public License for more details. | ||
| 10 | * | ||
| 11 | * You should have received a copy of the GNU General Public License | ||
| 12 | * along with this program; if not, write to the Free Software | ||
| 13 | * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. | ||
| 14 | * | ||
| 15 | * Copyright SUSE Linux Products GmbH 2010 | ||
| 16 | * | ||
| 17 | * Authors: Alexander Graf <agraf@suse.de> | ||
| 18 | */ | ||
| 19 | |||
| 20 | #ifndef __ASM_KVM_BOOKE_H__ | ||
| 21 | #define __ASM_KVM_BOOKE_H__ | ||
| 22 | |||
| 23 | #include <linux/types.h> | ||
| 24 | #include <linux/kvm_host.h> | ||
| 25 | |||
| 26 | static inline void kvmppc_set_gpr(struct kvm_vcpu *vcpu, int num, ulong val) | ||
| 27 | { | ||
| 28 | vcpu->arch.gpr[num] = val; | ||
| 29 | } | ||
| 30 | |||
| 31 | static inline ulong kvmppc_get_gpr(struct kvm_vcpu *vcpu, int num) | ||
| 32 | { | ||
| 33 | return vcpu->arch.gpr[num]; | ||
| 34 | } | ||
| 35 | |||
| 36 | static inline void kvmppc_set_cr(struct kvm_vcpu *vcpu, u32 val) | ||
| 37 | { | ||
| 38 | vcpu->arch.cr = val; | ||
| 39 | } | ||
| 40 | |||
| 41 | static inline u32 kvmppc_get_cr(struct kvm_vcpu *vcpu) | ||
| 42 | { | ||
| 43 | return vcpu->arch.cr; | ||
| 44 | } | ||
| 45 | |||
| 46 | static inline void kvmppc_set_xer(struct kvm_vcpu *vcpu, u32 val) | ||
| 47 | { | ||
| 48 | vcpu->arch.xer = val; | ||
| 49 | } | ||
| 50 | |||
| 51 | static inline u32 kvmppc_get_xer(struct kvm_vcpu *vcpu) | ||
| 52 | { | ||
| 53 | return vcpu->arch.xer; | ||
| 54 | } | ||
| 55 | |||
| 56 | static inline u32 kvmppc_get_last_inst(struct kvm_vcpu *vcpu) | ||
| 57 | { | ||
| 58 | return vcpu->arch.last_inst; | ||
| 59 | } | ||
| 60 | |||
| 61 | static inline void kvmppc_set_ctr(struct kvm_vcpu *vcpu, ulong val) | ||
| 62 | { | ||
| 63 | vcpu->arch.ctr = val; | ||
| 64 | } | ||
| 65 | |||
| 66 | static inline ulong kvmppc_get_ctr(struct kvm_vcpu *vcpu) | ||
| 67 | { | ||
| 68 | return vcpu->arch.ctr; | ||
| 69 | } | ||
| 70 | |||
| 71 | static inline void kvmppc_set_lr(struct kvm_vcpu *vcpu, ulong val) | ||
| 72 | { | ||
| 73 | vcpu->arch.lr = val; | ||
| 74 | } | ||
| 75 | |||
| 76 | static inline ulong kvmppc_get_lr(struct kvm_vcpu *vcpu) | ||
| 77 | { | ||
| 78 | return vcpu->arch.lr; | ||
| 79 | } | ||
| 80 | |||
| 81 | static inline void kvmppc_set_pc(struct kvm_vcpu *vcpu, ulong val) | ||
| 82 | { | ||
| 83 | vcpu->arch.pc = val; | ||
| 84 | } | ||
| 85 | |||
| 86 | static inline ulong kvmppc_get_pc(struct kvm_vcpu *vcpu) | ||
| 87 | { | ||
| 88 | return vcpu->arch.pc; | ||
| 89 | } | ||
| 90 | |||
| 91 | static inline ulong kvmppc_get_fault_dar(struct kvm_vcpu *vcpu) | ||
| 92 | { | ||
| 93 | return vcpu->arch.fault_dear; | ||
| 94 | } | ||
| 95 | |||
| 96 | #endif /* __ASM_KVM_BOOKE_H__ */ | ||
diff --git a/arch/powerpc/include/asm/kvm_fpu.h b/arch/powerpc/include/asm/kvm_fpu.h new file mode 100644 index 000000000000..94f05de9ad04 --- /dev/null +++ b/arch/powerpc/include/asm/kvm_fpu.h | |||
| @@ -0,0 +1,85 @@ | |||
| 1 | /* | ||
| 2 | * This program is free software; you can redistribute it and/or modify | ||
| 3 | * it under the terms of the GNU General Public License, version 2, as | ||
| 4 | * published by the Free Software Foundation. | ||
| 5 | * | ||
| 6 | * This program is distributed in the hope that it will be useful, | ||
| 7 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 8 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 9 | * GNU General Public License for more details. | ||
| 10 | * | ||
| 11 | * You should have received a copy of the GNU General Public License | ||
| 12 | * along with this program; if not, write to the Free Software | ||
| 13 | * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. | ||
| 14 | * | ||
| 15 | * Copyright Novell Inc. 2010 | ||
| 16 | * | ||
| 17 | * Authors: Alexander Graf <agraf@suse.de> | ||
| 18 | */ | ||
| 19 | |||
| 20 | #ifndef __ASM_KVM_FPU_H__ | ||
| 21 | #define __ASM_KVM_FPU_H__ | ||
| 22 | |||
| 23 | #include <linux/types.h> | ||
| 24 | |||
| 25 | extern void fps_fres(struct thread_struct *t, u32 *dst, u32 *src1); | ||
| 26 | extern void fps_frsqrte(struct thread_struct *t, u32 *dst, u32 *src1); | ||
| 27 | extern void fps_fsqrts(struct thread_struct *t, u32 *dst, u32 *src1); | ||
| 28 | |||
| 29 | extern void fps_fadds(struct thread_struct *t, u32 *dst, u32 *src1, u32 *src2); | ||
| 30 | extern void fps_fdivs(struct thread_struct *t, u32 *dst, u32 *src1, u32 *src2); | ||
| 31 | extern void fps_fmuls(struct thread_struct *t, u32 *dst, u32 *src1, u32 *src2); | ||
| 32 | extern void fps_fsubs(struct thread_struct *t, u32 *dst, u32 *src1, u32 *src2); | ||
| 33 | |||
| 34 | extern void fps_fmadds(struct thread_struct *t, u32 *dst, u32 *src1, u32 *src2, | ||
| 35 | u32 *src3); | ||
| 36 | extern void fps_fmsubs(struct thread_struct *t, u32 *dst, u32 *src1, u32 *src2, | ||
| 37 | u32 *src3); | ||
| 38 | extern void fps_fnmadds(struct thread_struct *t, u32 *dst, u32 *src1, u32 *src2, | ||
| 39 | u32 *src3); | ||
| 40 | extern void fps_fnmsubs(struct thread_struct *t, u32 *dst, u32 *src1, u32 *src2, | ||
| 41 | u32 *src3); | ||
| 42 | extern void fps_fsel(struct thread_struct *t, u32 *dst, u32 *src1, u32 *src2, | ||
| 43 | u32 *src3); | ||
| 44 | |||
| 45 | #define FPD_ONE_IN(name) extern void fpd_ ## name(u64 *fpscr, u32 *cr, \ | ||
| 46 | u64 *dst, u64 *src1); | ||
| 47 | #define FPD_TWO_IN(name) extern void fpd_ ## name(u64 *fpscr, u32 *cr, \ | ||
| 48 | u64 *dst, u64 *src1, u64 *src2); | ||
| 49 | #define FPD_THREE_IN(name) extern void fpd_ ## name(u64 *fpscr, u32 *cr, \ | ||
| 50 | u64 *dst, u64 *src1, u64 *src2, u64 *src3); | ||
| 51 | |||
| 52 | extern void fpd_fcmpu(u64 *fpscr, u32 *cr, u64 *src1, u64 *src2); | ||
| 53 | extern void fpd_fcmpo(u64 *fpscr, u32 *cr, u64 *src1, u64 *src2); | ||
| 54 | |||
| 55 | FPD_ONE_IN(fsqrts) | ||
| 56 | FPD_ONE_IN(frsqrtes) | ||
| 57 | FPD_ONE_IN(fres) | ||
| 58 | FPD_ONE_IN(frsp) | ||
| 59 | FPD_ONE_IN(fctiw) | ||
| 60 | FPD_ONE_IN(fctiwz) | ||
| 61 | FPD_ONE_IN(fsqrt) | ||
| 62 | FPD_ONE_IN(fre) | ||
| 63 | FPD_ONE_IN(frsqrte) | ||
| 64 | FPD_ONE_IN(fneg) | ||
| 65 | FPD_ONE_IN(fabs) | ||
| 66 | FPD_TWO_IN(fadds) | ||
| 67 | FPD_TWO_IN(fsubs) | ||
| 68 | FPD_TWO_IN(fdivs) | ||
| 69 | FPD_TWO_IN(fmuls) | ||
| 70 | FPD_TWO_IN(fcpsgn) | ||
| 71 | FPD_TWO_IN(fdiv) | ||
| 72 | FPD_TWO_IN(fadd) | ||
| 73 | FPD_TWO_IN(fmul) | ||
| 74 | FPD_TWO_IN(fsub) | ||
| 75 | FPD_THREE_IN(fmsubs) | ||
| 76 | FPD_THREE_IN(fmadds) | ||
| 77 | FPD_THREE_IN(fnmsubs) | ||
| 78 | FPD_THREE_IN(fnmadds) | ||
| 79 | FPD_THREE_IN(fsel) | ||
| 80 | FPD_THREE_IN(fmsub) | ||
| 81 | FPD_THREE_IN(fmadd) | ||
| 82 | FPD_THREE_IN(fnmsub) | ||
| 83 | FPD_THREE_IN(fnmadd) | ||
| 84 | |||
| 85 | #endif | ||
diff --git a/arch/powerpc/include/asm/kvm_host.h b/arch/powerpc/include/asm/kvm_host.h index 5e5bae7e152f..0c9ad869decd 100644 --- a/arch/powerpc/include/asm/kvm_host.h +++ b/arch/powerpc/include/asm/kvm_host.h | |||
| @@ -66,7 +66,7 @@ struct kvm_vcpu_stat { | |||
| 66 | u32 dec_exits; | 66 | u32 dec_exits; |
| 67 | u32 ext_intr_exits; | 67 | u32 ext_intr_exits; |
| 68 | u32 halt_wakeup; | 68 | u32 halt_wakeup; |
| 69 | #ifdef CONFIG_PPC64 | 69 | #ifdef CONFIG_PPC_BOOK3S |
| 70 | u32 pf_storage; | 70 | u32 pf_storage; |
| 71 | u32 pf_instruc; | 71 | u32 pf_instruc; |
| 72 | u32 sp_storage; | 72 | u32 sp_storage; |
| @@ -124,12 +124,12 @@ struct kvm_arch { | |||
| 124 | }; | 124 | }; |
| 125 | 125 | ||
| 126 | struct kvmppc_pte { | 126 | struct kvmppc_pte { |
| 127 | u64 eaddr; | 127 | ulong eaddr; |
| 128 | u64 vpage; | 128 | u64 vpage; |
| 129 | u64 raddr; | 129 | ulong raddr; |
| 130 | bool may_read; | 130 | bool may_read : 1; |
| 131 | bool may_write; | 131 | bool may_write : 1; |
| 132 | bool may_execute; | 132 | bool may_execute : 1; |
| 133 | }; | 133 | }; |
| 134 | 134 | ||
| 135 | struct kvmppc_mmu { | 135 | struct kvmppc_mmu { |
| @@ -145,7 +145,7 @@ struct kvmppc_mmu { | |||
| 145 | int (*xlate)(struct kvm_vcpu *vcpu, gva_t eaddr, struct kvmppc_pte *pte, bool data); | 145 | int (*xlate)(struct kvm_vcpu *vcpu, gva_t eaddr, struct kvmppc_pte *pte, bool data); |
| 146 | void (*reset_msr)(struct kvm_vcpu *vcpu); | 146 | void (*reset_msr)(struct kvm_vcpu *vcpu); |
| 147 | void (*tlbie)(struct kvm_vcpu *vcpu, ulong addr, bool large); | 147 | void (*tlbie)(struct kvm_vcpu *vcpu, ulong addr, bool large); |
| 148 | int (*esid_to_vsid)(struct kvm_vcpu *vcpu, u64 esid, u64 *vsid); | 148 | int (*esid_to_vsid)(struct kvm_vcpu *vcpu, ulong esid, u64 *vsid); |
| 149 | u64 (*ea_to_vp)(struct kvm_vcpu *vcpu, gva_t eaddr, bool data); | 149 | u64 (*ea_to_vp)(struct kvm_vcpu *vcpu, gva_t eaddr, bool data); |
| 150 | bool (*is_dcbz32)(struct kvm_vcpu *vcpu); | 150 | bool (*is_dcbz32)(struct kvm_vcpu *vcpu); |
| 151 | }; | 151 | }; |
| @@ -160,7 +160,7 @@ struct hpte_cache { | |||
| 160 | struct kvm_vcpu_arch { | 160 | struct kvm_vcpu_arch { |
| 161 | ulong host_stack; | 161 | ulong host_stack; |
| 162 | u32 host_pid; | 162 | u32 host_pid; |
| 163 | #ifdef CONFIG_PPC64 | 163 | #ifdef CONFIG_PPC_BOOK3S |
| 164 | ulong host_msr; | 164 | ulong host_msr; |
| 165 | ulong host_r2; | 165 | ulong host_r2; |
| 166 | void *host_retip; | 166 | void *host_retip; |
| @@ -175,7 +175,7 @@ struct kvm_vcpu_arch { | |||
| 175 | ulong gpr[32]; | 175 | ulong gpr[32]; |
| 176 | 176 | ||
| 177 | u64 fpr[32]; | 177 | u64 fpr[32]; |
| 178 | u32 fpscr; | 178 | u64 fpscr; |
| 179 | 179 | ||
| 180 | #ifdef CONFIG_ALTIVEC | 180 | #ifdef CONFIG_ALTIVEC |
| 181 | vector128 vr[32]; | 181 | vector128 vr[32]; |
| @@ -186,19 +186,23 @@ struct kvm_vcpu_arch { | |||
| 186 | u64 vsr[32]; | 186 | u64 vsr[32]; |
| 187 | #endif | 187 | #endif |
| 188 | 188 | ||
| 189 | #ifdef CONFIG_PPC_BOOK3S | ||
| 190 | /* For Gekko paired singles */ | ||
| 191 | u32 qpr[32]; | ||
| 192 | #endif | ||
| 193 | |||
| 194 | #ifdef CONFIG_BOOKE | ||
| 189 | ulong pc; | 195 | ulong pc; |
| 190 | ulong ctr; | 196 | ulong ctr; |
| 191 | ulong lr; | 197 | ulong lr; |
| 192 | 198 | ||
| 193 | #ifdef CONFIG_BOOKE | ||
| 194 | ulong xer; | 199 | ulong xer; |
| 195 | u32 cr; | 200 | u32 cr; |
| 196 | #endif | 201 | #endif |
| 197 | 202 | ||
| 198 | ulong msr; | 203 | ulong msr; |
| 199 | #ifdef CONFIG_PPC64 | 204 | #ifdef CONFIG_PPC_BOOK3S |
| 200 | ulong shadow_msr; | 205 | ulong shadow_msr; |
| 201 | ulong shadow_srr1; | ||
| 202 | ulong hflags; | 206 | ulong hflags; |
| 203 | ulong guest_owned_ext; | 207 | ulong guest_owned_ext; |
| 204 | #endif | 208 | #endif |
| @@ -253,20 +257,22 @@ struct kvm_vcpu_arch { | |||
| 253 | struct dentry *debugfs_exit_timing; | 257 | struct dentry *debugfs_exit_timing; |
| 254 | #endif | 258 | #endif |
| 255 | 259 | ||
| 260 | #ifdef CONFIG_BOOKE | ||
| 256 | u32 last_inst; | 261 | u32 last_inst; |
| 257 | #ifdef CONFIG_PPC64 | ||
| 258 | ulong fault_dsisr; | ||
| 259 | #endif | ||
| 260 | ulong fault_dear; | 262 | ulong fault_dear; |
| 261 | ulong fault_esr; | 263 | ulong fault_esr; |
| 262 | ulong queued_dear; | 264 | ulong queued_dear; |
| 263 | ulong queued_esr; | 265 | ulong queued_esr; |
| 266 | #endif | ||
| 264 | gpa_t paddr_accessed; | 267 | gpa_t paddr_accessed; |
| 265 | 268 | ||
| 266 | u8 io_gpr; /* GPR used as IO source/target */ | 269 | u8 io_gpr; /* GPR used as IO source/target */ |
| 267 | u8 mmio_is_bigendian; | 270 | u8 mmio_is_bigendian; |
| 271 | u8 mmio_sign_extend; | ||
| 268 | u8 dcr_needed; | 272 | u8 dcr_needed; |
| 269 | u8 dcr_is_write; | 273 | u8 dcr_is_write; |
| 274 | u8 osi_needed; | ||
| 275 | u8 osi_enabled; | ||
| 270 | 276 | ||
| 271 | u32 cpr0_cfgaddr; /* holds the last set cpr0_cfgaddr */ | 277 | u32 cpr0_cfgaddr; /* holds the last set cpr0_cfgaddr */ |
| 272 | 278 | ||
| @@ -275,7 +281,7 @@ struct kvm_vcpu_arch { | |||
| 275 | u64 dec_jiffies; | 281 | u64 dec_jiffies; |
| 276 | unsigned long pending_exceptions; | 282 | unsigned long pending_exceptions; |
| 277 | 283 | ||
| 278 | #ifdef CONFIG_PPC64 | 284 | #ifdef CONFIG_PPC_BOOK3S |
| 279 | struct hpte_cache hpte_cache[HPTEG_CACHE_NUM]; | 285 | struct hpte_cache hpte_cache[HPTEG_CACHE_NUM]; |
| 280 | int hpte_cache_offset; | 286 | int hpte_cache_offset; |
| 281 | #endif | 287 | #endif |
diff --git a/arch/powerpc/include/asm/kvm_ppc.h b/arch/powerpc/include/asm/kvm_ppc.h index e2642829e435..18d139ec2d22 100644 --- a/arch/powerpc/include/asm/kvm_ppc.h +++ b/arch/powerpc/include/asm/kvm_ppc.h | |||
| @@ -30,6 +30,8 @@ | |||
| 30 | #include <linux/kvm_host.h> | 30 | #include <linux/kvm_host.h> |
| 31 | #ifdef CONFIG_PPC_BOOK3S | 31 | #ifdef CONFIG_PPC_BOOK3S |
| 32 | #include <asm/kvm_book3s.h> | 32 | #include <asm/kvm_book3s.h> |
| 33 | #else | ||
| 34 | #include <asm/kvm_booke.h> | ||
| 33 | #endif | 35 | #endif |
| 34 | 36 | ||
| 35 | enum emulation_result { | 37 | enum emulation_result { |
| @@ -37,6 +39,7 @@ enum emulation_result { | |||
| 37 | EMULATE_DO_MMIO, /* kvm_run filled with MMIO request */ | 39 | EMULATE_DO_MMIO, /* kvm_run filled with MMIO request */ |
| 38 | EMULATE_DO_DCR, /* kvm_run filled with DCR request */ | 40 | EMULATE_DO_DCR, /* kvm_run filled with DCR request */ |
| 39 | EMULATE_FAIL, /* can't emulate this instruction */ | 41 | EMULATE_FAIL, /* can't emulate this instruction */ |
| 42 | EMULATE_AGAIN, /* something went wrong. go again */ | ||
| 40 | }; | 43 | }; |
| 41 | 44 | ||
| 42 | extern int __kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu); | 45 | extern int __kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu); |
| @@ -48,8 +51,11 @@ extern void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu); | |||
| 48 | extern int kvmppc_handle_load(struct kvm_run *run, struct kvm_vcpu *vcpu, | 51 | extern int kvmppc_handle_load(struct kvm_run *run, struct kvm_vcpu *vcpu, |
| 49 | unsigned int rt, unsigned int bytes, | 52 | unsigned int rt, unsigned int bytes, |
| 50 | int is_bigendian); | 53 | int is_bigendian); |
| 54 | extern int kvmppc_handle_loads(struct kvm_run *run, struct kvm_vcpu *vcpu, | ||
| 55 | unsigned int rt, unsigned int bytes, | ||
| 56 | int is_bigendian); | ||
| 51 | extern int kvmppc_handle_store(struct kvm_run *run, struct kvm_vcpu *vcpu, | 57 | extern int kvmppc_handle_store(struct kvm_run *run, struct kvm_vcpu *vcpu, |
| 52 | u32 val, unsigned int bytes, int is_bigendian); | 58 | u64 val, unsigned int bytes, int is_bigendian); |
| 53 | 59 | ||
| 54 | extern int kvmppc_emulate_instruction(struct kvm_run *run, | 60 | extern int kvmppc_emulate_instruction(struct kvm_run *run, |
| 55 | struct kvm_vcpu *vcpu); | 61 | struct kvm_vcpu *vcpu); |
| @@ -63,6 +69,7 @@ extern void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 gvaddr, gpa_t gpaddr, | |||
| 63 | extern void kvmppc_mmu_priv_switch(struct kvm_vcpu *vcpu, int usermode); | 69 | extern void kvmppc_mmu_priv_switch(struct kvm_vcpu *vcpu, int usermode); |
| 64 | extern void kvmppc_mmu_switch_pid(struct kvm_vcpu *vcpu, u32 pid); | 70 | extern void kvmppc_mmu_switch_pid(struct kvm_vcpu *vcpu, u32 pid); |
| 65 | extern void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu); | 71 | extern void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu); |
| 72 | extern int kvmppc_mmu_init(struct kvm_vcpu *vcpu); | ||
| 66 | extern int kvmppc_mmu_dtlb_index(struct kvm_vcpu *vcpu, gva_t eaddr); | 73 | extern int kvmppc_mmu_dtlb_index(struct kvm_vcpu *vcpu, gva_t eaddr); |
| 67 | extern int kvmppc_mmu_itlb_index(struct kvm_vcpu *vcpu, gva_t eaddr); | 74 | extern int kvmppc_mmu_itlb_index(struct kvm_vcpu *vcpu, gva_t eaddr); |
| 68 | extern gpa_t kvmppc_mmu_xlate(struct kvm_vcpu *vcpu, unsigned int gtlb_index, | 75 | extern gpa_t kvmppc_mmu_xlate(struct kvm_vcpu *vcpu, unsigned int gtlb_index, |
| @@ -88,6 +95,8 @@ extern void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu); | |||
| 88 | extern void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu); | 95 | extern void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu); |
| 89 | extern void kvmppc_core_queue_external(struct kvm_vcpu *vcpu, | 96 | extern void kvmppc_core_queue_external(struct kvm_vcpu *vcpu, |
| 90 | struct kvm_interrupt *irq); | 97 | struct kvm_interrupt *irq); |
| 98 | extern void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu, | ||
| 99 | struct kvm_interrupt *irq); | ||
| 91 | 100 | ||
| 92 | extern int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu, | 101 | extern int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu, |
| 93 | unsigned int op, int *advance); | 102 | unsigned int op, int *advance); |
| @@ -99,81 +108,37 @@ extern void kvmppc_booke_exit(void); | |||
| 99 | 108 | ||
| 100 | extern void kvmppc_core_destroy_mmu(struct kvm_vcpu *vcpu); | 109 | extern void kvmppc_core_destroy_mmu(struct kvm_vcpu *vcpu); |
| 101 | 110 | ||
| 102 | #ifdef CONFIG_PPC_BOOK3S | 111 | /* |
| 103 | 112 | * Cuts out inst bits with ordering according to spec. | |
| 104 | /* We assume we're always acting on the current vcpu */ | 113 | * That means the leftmost bit is zero. All given bits are included. |
| 105 | 114 | */ | |
| 106 | static inline void kvmppc_set_gpr(struct kvm_vcpu *vcpu, int num, ulong val) | 115 | static inline u32 kvmppc_get_field(u64 inst, int msb, int lsb) |
| 107 | { | ||
| 108 | if ( num < 14 ) { | ||
| 109 | get_paca()->shadow_vcpu.gpr[num] = val; | ||
| 110 | to_book3s(vcpu)->shadow_vcpu.gpr[num] = val; | ||
| 111 | } else | ||
| 112 | vcpu->arch.gpr[num] = val; | ||
| 113 | } | ||
| 114 | |||
| 115 | static inline ulong kvmppc_get_gpr(struct kvm_vcpu *vcpu, int num) | ||
| 116 | { | ||
| 117 | if ( num < 14 ) | ||
| 118 | return get_paca()->shadow_vcpu.gpr[num]; | ||
| 119 | else | ||
| 120 | return vcpu->arch.gpr[num]; | ||
| 121 | } | ||
| 122 | |||
| 123 | static inline void kvmppc_set_cr(struct kvm_vcpu *vcpu, u32 val) | ||
| 124 | { | ||
| 125 | get_paca()->shadow_vcpu.cr = val; | ||
| 126 | to_book3s(vcpu)->shadow_vcpu.cr = val; | ||
| 127 | } | ||
| 128 | |||
| 129 | static inline u32 kvmppc_get_cr(struct kvm_vcpu *vcpu) | ||
| 130 | { | ||
| 131 | return get_paca()->shadow_vcpu.cr; | ||
| 132 | } | ||
| 133 | |||
| 134 | static inline void kvmppc_set_xer(struct kvm_vcpu *vcpu, u32 val) | ||
| 135 | { | ||
| 136 | get_paca()->shadow_vcpu.xer = val; | ||
| 137 | to_book3s(vcpu)->shadow_vcpu.xer = val; | ||
| 138 | } | ||
| 139 | |||
| 140 | static inline u32 kvmppc_get_xer(struct kvm_vcpu *vcpu) | ||
| 141 | { | 116 | { |
| 142 | return get_paca()->shadow_vcpu.xer; | 117 | u32 r; |
| 143 | } | 118 | u32 mask; |
| 144 | 119 | ||
| 145 | #else | 120 | BUG_ON(msb > lsb); |
| 146 | 121 | ||
| 147 | static inline void kvmppc_set_gpr(struct kvm_vcpu *vcpu, int num, ulong val) | 122 | mask = (1 << (lsb - msb + 1)) - 1; |
| 148 | { | 123 | r = (inst >> (63 - lsb)) & mask; |
| 149 | vcpu->arch.gpr[num] = val; | ||
| 150 | } | ||
| 151 | 124 | ||
| 152 | static inline ulong kvmppc_get_gpr(struct kvm_vcpu *vcpu, int num) | 125 | return r; |
| 153 | { | ||
| 154 | return vcpu->arch.gpr[num]; | ||
| 155 | } | 126 | } |
| 156 | 127 | ||
| 157 | static inline void kvmppc_set_cr(struct kvm_vcpu *vcpu, u32 val) | 128 | /* |
| 129 | * Replaces inst bits with ordering according to spec. | ||
| 130 | */ | ||
| 131 | static inline u32 kvmppc_set_field(u64 inst, int msb, int lsb, int value) | ||
| 158 | { | 132 | { |
| 159 | vcpu->arch.cr = val; | 133 | u32 r; |
| 160 | } | 134 | u32 mask; |
| 161 | 135 | ||
| 162 | static inline u32 kvmppc_get_cr(struct kvm_vcpu *vcpu) | 136 | BUG_ON(msb > lsb); |
| 163 | { | ||
| 164 | return vcpu->arch.cr; | ||
| 165 | } | ||
| 166 | 137 | ||
| 167 | static inline void kvmppc_set_xer(struct kvm_vcpu *vcpu, u32 val) | 138 | mask = ((1 << (lsb - msb + 1)) - 1) << (63 - lsb); |
| 168 | { | 139 | r = (inst & ~mask) | ((value << (63 - lsb)) & mask); |
| 169 | vcpu->arch.xer = val; | ||
| 170 | } | ||
| 171 | 140 | ||
| 172 | static inline u32 kvmppc_get_xer(struct kvm_vcpu *vcpu) | 141 | return r; |
| 173 | { | ||
| 174 | return vcpu->arch.xer; | ||
| 175 | } | 142 | } |
| 176 | 143 | ||
| 177 | #endif | ||
| 178 | |||
| 179 | #endif /* __POWERPC_KVM_PPC_H__ */ | 144 | #endif /* __POWERPC_KVM_PPC_H__ */ |
diff --git a/arch/powerpc/include/asm/macio.h b/arch/powerpc/include/asm/macio.h index a062c57696d0..675e159b5ef4 100644 --- a/arch/powerpc/include/asm/macio.h +++ b/arch/powerpc/include/asm/macio.h | |||
| @@ -108,7 +108,7 @@ static inline void* macio_get_drvdata(struct macio_dev *dev) | |||
| 108 | 108 | ||
| 109 | static inline struct device_node *macio_get_of_node(struct macio_dev *mdev) | 109 | static inline struct device_node *macio_get_of_node(struct macio_dev *mdev) |
| 110 | { | 110 | { |
| 111 | return mdev->ofdev.node; | 111 | return mdev->ofdev.dev.of_node; |
| 112 | } | 112 | } |
| 113 | 113 | ||
| 114 | #ifdef CONFIG_PCI | 114 | #ifdef CONFIG_PCI |
| @@ -123,10 +123,6 @@ static inline struct pci_dev *macio_get_pci_dev(struct macio_dev *mdev) | |||
| 123 | */ | 123 | */ |
| 124 | struct macio_driver | 124 | struct macio_driver |
| 125 | { | 125 | { |
| 126 | char *name; | ||
| 127 | struct of_device_id *match_table; | ||
| 128 | struct module *owner; | ||
| 129 | |||
| 130 | int (*probe)(struct macio_dev* dev, const struct of_device_id *match); | 126 | int (*probe)(struct macio_dev* dev, const struct of_device_id *match); |
| 131 | int (*remove)(struct macio_dev* dev); | 127 | int (*remove)(struct macio_dev* dev); |
| 132 | 128 | ||
diff --git a/arch/powerpc/include/asm/mmu_context.h b/arch/powerpc/include/asm/mmu_context.h index 26383e0778aa..81fb41289d6c 100644 --- a/arch/powerpc/include/asm/mmu_context.h +++ b/arch/powerpc/include/asm/mmu_context.h | |||
| @@ -27,6 +27,8 @@ extern int __init_new_context(void); | |||
| 27 | extern void __destroy_context(int context_id); | 27 | extern void __destroy_context(int context_id); |
| 28 | static inline void mmu_context_init(void) { } | 28 | static inline void mmu_context_init(void) { } |
| 29 | #else | 29 | #else |
| 30 | extern unsigned long __init_new_context(void); | ||
| 31 | extern void __destroy_context(unsigned long context_id); | ||
| 30 | extern void mmu_context_init(void); | 32 | extern void mmu_context_init(void); |
| 31 | #endif | 33 | #endif |
| 32 | 34 | ||
diff --git a/arch/powerpc/include/asm/mpc52xx_psc.h b/arch/powerpc/include/asm/mpc52xx_psc.h index 42561f4f032d..ecc4fc69ac13 100644 --- a/arch/powerpc/include/asm/mpc52xx_psc.h +++ b/arch/powerpc/include/asm/mpc52xx_psc.h | |||
| @@ -248,6 +248,7 @@ struct mpc52xx_psc_fifo { | |||
| 248 | u16 tflwfptr; /* PSC + 0x9e */ | 248 | u16 tflwfptr; /* PSC + 0x9e */ |
| 249 | }; | 249 | }; |
| 250 | 250 | ||
| 251 | #define MPC512x_PSC_FIFO_EOF 0x100 | ||
| 251 | #define MPC512x_PSC_FIFO_RESET_SLICE 0x80 | 252 | #define MPC512x_PSC_FIFO_RESET_SLICE 0x80 |
| 252 | #define MPC512x_PSC_FIFO_ENABLE_SLICE 0x01 | 253 | #define MPC512x_PSC_FIFO_ENABLE_SLICE 0x01 |
| 253 | #define MPC512x_PSC_FIFO_ENABLE_DMA 0x04 | 254 | #define MPC512x_PSC_FIFO_ENABLE_DMA 0x04 |
diff --git a/arch/powerpc/include/asm/of_device.h b/arch/powerpc/include/asm/of_device.h index a64debf177dc..444e97e2982e 100644 --- a/arch/powerpc/include/asm/of_device.h +++ b/arch/powerpc/include/asm/of_device.h | |||
| @@ -12,9 +12,8 @@ | |||
| 12 | */ | 12 | */ |
| 13 | struct of_device | 13 | struct of_device |
| 14 | { | 14 | { |
| 15 | struct device_node *node; /* to be obsoleted */ | ||
| 16 | u64 dma_mask; /* DMA mask */ | ||
| 17 | struct device dev; /* Generic device interface */ | 15 | struct device dev; /* Generic device interface */ |
| 16 | struct pdev_archdata archdata; | ||
| 18 | }; | 17 | }; |
| 19 | 18 | ||
| 20 | extern struct of_device *of_device_alloc(struct device_node *np, | 19 | extern struct of_device *of_device_alloc(struct device_node *np, |
diff --git a/arch/powerpc/include/asm/paca.h b/arch/powerpc/include/asm/paca.h index 971dfa4815f0..8ce7963ad41d 100644 --- a/arch/powerpc/include/asm/paca.h +++ b/arch/powerpc/include/asm/paca.h | |||
| @@ -23,7 +23,7 @@ | |||
| 23 | #include <asm/page.h> | 23 | #include <asm/page.h> |
| 24 | #include <asm/exception-64e.h> | 24 | #include <asm/exception-64e.h> |
| 25 | #ifdef CONFIG_KVM_BOOK3S_64_HANDLER | 25 | #ifdef CONFIG_KVM_BOOK3S_64_HANDLER |
| 26 | #include <asm/kvm_book3s_64_asm.h> | 26 | #include <asm/kvm_book3s_asm.h> |
| 27 | #endif | 27 | #endif |
| 28 | 28 | ||
| 29 | register struct paca_struct *local_paca asm("r13"); | 29 | register struct paca_struct *local_paca asm("r13"); |
| @@ -137,15 +137,9 @@ struct paca_struct { | |||
| 137 | u64 startpurr; /* PURR/TB value snapshot */ | 137 | u64 startpurr; /* PURR/TB value snapshot */ |
| 138 | u64 startspurr; /* SPURR value snapshot */ | 138 | u64 startspurr; /* SPURR value snapshot */ |
| 139 | 139 | ||
| 140 | #ifdef CONFIG_KVM_BOOK3S_64_HANDLER | 140 | #ifdef CONFIG_KVM_BOOK3S_HANDLER |
| 141 | struct { | ||
| 142 | u64 esid; | ||
| 143 | u64 vsid; | ||
| 144 | } kvm_slb[64]; /* guest SLB */ | ||
| 145 | /* We use this to store guest state in */ | 141 | /* We use this to store guest state in */ |
| 146 | struct kvmppc_book3s_shadow_vcpu shadow_vcpu; | 142 | struct kvmppc_book3s_shadow_vcpu shadow_vcpu; |
| 147 | u8 kvm_slb_max; /* highest used guest slb entry */ | ||
| 148 | u8 kvm_in_guest; /* are we inside the guest? */ | ||
| 149 | #endif | 143 | #endif |
| 150 | }; | 144 | }; |
| 151 | 145 | ||
diff --git a/arch/powerpc/include/asm/page_64.h b/arch/powerpc/include/asm/page_64.h index bfc4e027e2ad..358ff14ea25e 100644 --- a/arch/powerpc/include/asm/page_64.h +++ b/arch/powerpc/include/asm/page_64.h | |||
| @@ -162,14 +162,6 @@ do { \ | |||
| 162 | 162 | ||
| 163 | #endif /* !CONFIG_HUGETLB_PAGE */ | 163 | #endif /* !CONFIG_HUGETLB_PAGE */ |
| 164 | 164 | ||
| 165 | #ifdef MODULE | ||
| 166 | #define __page_aligned __attribute__((__aligned__(PAGE_SIZE))) | ||
| 167 | #else | ||
| 168 | #define __page_aligned \ | ||
| 169 | __attribute__((__aligned__(PAGE_SIZE), \ | ||
| 170 | __section__(".data.page_aligned"))) | ||
| 171 | #endif | ||
| 172 | |||
| 173 | #define VM_DATA_DEFAULT_FLAGS \ | 165 | #define VM_DATA_DEFAULT_FLAGS \ |
| 174 | (test_thread_flag(TIF_32BIT) ? \ | 166 | (test_thread_flag(TIF_32BIT) ? \ |
| 175 | VM_DATA_DEFAULT_FLAGS32 : VM_DATA_DEFAULT_FLAGS64) | 167 | VM_DATA_DEFAULT_FLAGS32 : VM_DATA_DEFAULT_FLAGS64) |
diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h index 221ba6240464..7492fe8ad6e4 100644 --- a/arch/powerpc/include/asm/processor.h +++ b/arch/powerpc/include/asm/processor.h | |||
| @@ -229,6 +229,9 @@ struct thread_struct { | |||
| 229 | unsigned long spefscr; /* SPE & eFP status */ | 229 | unsigned long spefscr; /* SPE & eFP status */ |
| 230 | int used_spe; /* set if process has used spe */ | 230 | int used_spe; /* set if process has used spe */ |
| 231 | #endif /* CONFIG_SPE */ | 231 | #endif /* CONFIG_SPE */ |
| 232 | #ifdef CONFIG_KVM_BOOK3S_32_HANDLER | ||
| 233 | void* kvm_shadow_vcpu; /* KVM internal data */ | ||
| 234 | #endif /* CONFIG_KVM_BOOK3S_32_HANDLER */ | ||
| 232 | }; | 235 | }; |
| 233 | 236 | ||
| 234 | #define ARCH_MIN_TASKALIGN 16 | 237 | #define ARCH_MIN_TASKALIGN 16 |
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h index b68f025924a8..d62fdf4e504b 100644 --- a/arch/powerpc/include/asm/reg.h +++ b/arch/powerpc/include/asm/reg.h | |||
| @@ -293,10 +293,12 @@ | |||
| 293 | #define HID1_ABE (1<<10) /* 7450 Address Broadcast Enable */ | 293 | #define HID1_ABE (1<<10) /* 7450 Address Broadcast Enable */ |
| 294 | #define HID1_PS (1<<16) /* 750FX PLL selection */ | 294 | #define HID1_PS (1<<16) /* 750FX PLL selection */ |
| 295 | #define SPRN_HID2 0x3F8 /* Hardware Implementation Register 2 */ | 295 | #define SPRN_HID2 0x3F8 /* Hardware Implementation Register 2 */ |
| 296 | #define SPRN_HID2_GEKKO 0x398 /* Gekko HID2 Register */ | ||
| 296 | #define SPRN_IABR 0x3F2 /* Instruction Address Breakpoint Register */ | 297 | #define SPRN_IABR 0x3F2 /* Instruction Address Breakpoint Register */ |
| 297 | #define SPRN_IABR2 0x3FA /* 83xx */ | 298 | #define SPRN_IABR2 0x3FA /* 83xx */ |
| 298 | #define SPRN_IBCR 0x135 /* 83xx Insn Breakpoint Control Reg */ | 299 | #define SPRN_IBCR 0x135 /* 83xx Insn Breakpoint Control Reg */ |
| 299 | #define SPRN_HID4 0x3F4 /* 970 HID4 */ | 300 | #define SPRN_HID4 0x3F4 /* 970 HID4 */ |
| 301 | #define SPRN_HID4_GEKKO 0x3F3 /* Gekko HID4 */ | ||
| 300 | #define SPRN_HID5 0x3F6 /* 970 HID5 */ | 302 | #define SPRN_HID5 0x3F6 /* 970 HID5 */ |
| 301 | #define SPRN_HID6 0x3F9 /* BE HID 6 */ | 303 | #define SPRN_HID6 0x3F9 /* BE HID 6 */ |
| 302 | #define HID6_LB (0x0F<<12) /* Concurrent Large Page Modes */ | 304 | #define HID6_LB (0x0F<<12) /* Concurrent Large Page Modes */ |
| @@ -465,6 +467,14 @@ | |||
| 465 | #define SPRN_VRSAVE 0x100 /* Vector Register Save Register */ | 467 | #define SPRN_VRSAVE 0x100 /* Vector Register Save Register */ |
| 466 | #define SPRN_XER 0x001 /* Fixed Point Exception Register */ | 468 | #define SPRN_XER 0x001 /* Fixed Point Exception Register */ |
| 467 | 469 | ||
| 470 | #define SPRN_MMCR0_GEKKO 0x3B8 /* Gekko Monitor Mode Control Register 0 */ | ||
| 471 | #define SPRN_MMCR1_GEKKO 0x3BC /* Gekko Monitor Mode Control Register 1 */ | ||
| 472 | #define SPRN_PMC1_GEKKO 0x3B9 /* Gekko Performance Monitor Control 1 */ | ||
| 473 | #define SPRN_PMC2_GEKKO 0x3BA /* Gekko Performance Monitor Control 2 */ | ||
| 474 | #define SPRN_PMC3_GEKKO 0x3BD /* Gekko Performance Monitor Control 3 */ | ||
| 475 | #define SPRN_PMC4_GEKKO 0x3BE /* Gekko Performance Monitor Control 4 */ | ||
| 476 | #define SPRN_WPAR_GEKKO 0x399 /* Gekko Write Pipe Address Register */ | ||
| 477 | |||
| 468 | #define SPRN_SCOMC 0x114 /* SCOM Access Control */ | 478 | #define SPRN_SCOMC 0x114 /* SCOM Access Control */ |
| 469 | #define SPRN_SCOMD 0x115 /* SCOM Access DATA */ | 479 | #define SPRN_SCOMD 0x115 /* SCOM Access DATA */ |
| 470 | 480 | ||
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h index 5304a37ba425..2360317179a9 100644 --- a/arch/powerpc/include/asm/reg_booke.h +++ b/arch/powerpc/include/asm/reg_booke.h | |||
| @@ -4,6 +4,12 @@ | |||
| 4 | * are not true Book E PowerPCs, they borrowed a number of features | 4 | * are not true Book E PowerPCs, they borrowed a number of features |
| 5 | * before Book E was finalized, and are included here as well. Unfortunatly, | 5 | * before Book E was finalized, and are included here as well. Unfortunatly, |
| 6 | * they sometimes used different locations than true Book E CPUs did. | 6 | * they sometimes used different locations than true Book E CPUs did. |
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or | ||
| 9 | * modify it under the terms of the GNU General Public License version 2 | ||
| 10 | * as published by the Free Software Foundation. | ||
| 11 | * | ||
| 12 | * Copyright 2009-2010 Freescale Semiconductor, Inc. | ||
| 7 | */ | 13 | */ |
| 8 | #ifdef __KERNEL__ | 14 | #ifdef __KERNEL__ |
| 9 | #ifndef __ASM_POWERPC_REG_BOOKE_H__ | 15 | #ifndef __ASM_POWERPC_REG_BOOKE_H__ |
| @@ -88,6 +94,7 @@ | |||
| 88 | #define SPRN_IVOR35 0x213 /* Interrupt Vector Offset Register 35 */ | 94 | #define SPRN_IVOR35 0x213 /* Interrupt Vector Offset Register 35 */ |
| 89 | #define SPRN_IVOR36 0x214 /* Interrupt Vector Offset Register 36 */ | 95 | #define SPRN_IVOR36 0x214 /* Interrupt Vector Offset Register 36 */ |
| 90 | #define SPRN_IVOR37 0x215 /* Interrupt Vector Offset Register 37 */ | 96 | #define SPRN_IVOR37 0x215 /* Interrupt Vector Offset Register 37 */ |
| 97 | #define SPRN_MCARU 0x239 /* Machine Check Address Register Upper */ | ||
| 91 | #define SPRN_MCSRR0 0x23A /* Machine Check Save and Restore Register 0 */ | 98 | #define SPRN_MCSRR0 0x23A /* Machine Check Save and Restore Register 0 */ |
| 92 | #define SPRN_MCSRR1 0x23B /* Machine Check Save and Restore Register 1 */ | 99 | #define SPRN_MCSRR1 0x23B /* Machine Check Save and Restore Register 1 */ |
| 93 | #define SPRN_MCSR 0x23C /* Machine Check Status Register */ | 100 | #define SPRN_MCSR 0x23C /* Machine Check Status Register */ |
| @@ -196,8 +203,11 @@ | |||
| 196 | #define PPC47x_MCSR_IPR 0x00400000 /* Imprecise Machine Check Exception */ | 203 | #define PPC47x_MCSR_IPR 0x00400000 /* Imprecise Machine Check Exception */ |
| 197 | 204 | ||
| 198 | #ifdef CONFIG_E500 | 205 | #ifdef CONFIG_E500 |
| 206 | /* All e500 */ | ||
| 199 | #define MCSR_MCP 0x80000000UL /* Machine Check Input Pin */ | 207 | #define MCSR_MCP 0x80000000UL /* Machine Check Input Pin */ |
| 200 | #define MCSR_ICPERR 0x40000000UL /* I-Cache Parity Error */ | 208 | #define MCSR_ICPERR 0x40000000UL /* I-Cache Parity Error */ |
| 209 | |||
| 210 | /* e500v1/v2 */ | ||
| 201 | #define MCSR_DCP_PERR 0x20000000UL /* D-Cache Push Parity Error */ | 211 | #define MCSR_DCP_PERR 0x20000000UL /* D-Cache Push Parity Error */ |
| 202 | #define MCSR_DCPERR 0x10000000UL /* D-Cache Parity Error */ | 212 | #define MCSR_DCPERR 0x10000000UL /* D-Cache Parity Error */ |
| 203 | #define MCSR_BUS_IAERR 0x00000080UL /* Instruction Address Error */ | 213 | #define MCSR_BUS_IAERR 0x00000080UL /* Instruction Address Error */ |
| @@ -209,12 +219,20 @@ | |||
| 209 | #define MCSR_BUS_IPERR 0x00000002UL /* Instruction parity Error */ | 219 | #define MCSR_BUS_IPERR 0x00000002UL /* Instruction parity Error */ |
| 210 | #define MCSR_BUS_RPERR 0x00000001UL /* Read parity Error */ | 220 | #define MCSR_BUS_RPERR 0x00000001UL /* Read parity Error */ |
| 211 | 221 | ||
| 212 | /* e500 parts may set unused bits in MCSR; mask these off */ | 222 | /* e500mc */ |
| 213 | #define MCSR_MASK (MCSR_MCP | MCSR_ICPERR | MCSR_DCP_PERR | \ | 223 | #define MCSR_DCPERR_MC 0x20000000UL /* D-Cache Parity Error */ |
| 214 | MCSR_DCPERR | MCSR_BUS_IAERR | MCSR_BUS_RAERR | \ | 224 | #define MCSR_L2MMU_MHIT 0x04000000UL /* Hit on multiple TLB entries */ |
| 215 | MCSR_BUS_WAERR | MCSR_BUS_IBERR | MCSR_BUS_RBERR | \ | 225 | #define MCSR_NMI 0x00100000UL /* Non-Maskable Interrupt */ |
| 216 | MCSR_BUS_WBERR | MCSR_BUS_IPERR | MCSR_BUS_RPERR) | 226 | #define MCSR_MAV 0x00080000UL /* MCAR address valid */ |
| 227 | #define MCSR_MEA 0x00040000UL /* MCAR is effective address */ | ||
| 228 | #define MCSR_IF 0x00010000UL /* Instruction Fetch */ | ||
| 229 | #define MCSR_LD 0x00008000UL /* Load */ | ||
| 230 | #define MCSR_ST 0x00004000UL /* Store */ | ||
| 231 | #define MCSR_LDG 0x00002000UL /* Guarded Load */ | ||
| 232 | #define MCSR_TLBSYNC 0x00000002UL /* Multiple tlbsyncs detected */ | ||
| 233 | #define MCSR_BSL2_ERR 0x00000001UL /* Backside L2 cache error */ | ||
| 217 | #endif | 234 | #endif |
| 235 | |||
| 218 | #ifdef CONFIG_E200 | 236 | #ifdef CONFIG_E200 |
| 219 | #define MCSR_MCP 0x80000000UL /* Machine Check Input Pin */ | 237 | #define MCSR_MCP 0x80000000UL /* Machine Check Input Pin */ |
| 220 | #define MCSR_CP_PERR 0x20000000UL /* Cache Push Parity Error */ | 238 | #define MCSR_CP_PERR 0x20000000UL /* Cache Push Parity Error */ |
| @@ -225,11 +243,6 @@ | |||
| 225 | #define MCSR_BUS_DRERR 0x00000008UL /* Read Bus Error on data load */ | 243 | #define MCSR_BUS_DRERR 0x00000008UL /* Read Bus Error on data load */ |
| 226 | #define MCSR_BUS_WRERR 0x00000004UL /* Write Bus Error on buffered | 244 | #define MCSR_BUS_WRERR 0x00000004UL /* Write Bus Error on buffered |
| 227 | store or cache line push */ | 245 | store or cache line push */ |
| 228 | |||
| 229 | /* e200 parts may set unused bits in MCSR; mask these off */ | ||
| 230 | #define MCSR_MASK (MCSR_MCP | MCSR_CP_PERR | MCSR_CPERR | \ | ||
| 231 | MCSR_EXCP_ERR | MCSR_BUS_IRERR | MCSR_BUS_DRERR | \ | ||
| 232 | MCSR_BUS_WRERR) | ||
| 233 | #endif | 246 | #endif |
| 234 | 247 | ||
| 235 | /* Bit definitions for the DBSR. */ | 248 | /* Bit definitions for the DBSR. */ |
diff --git a/arch/powerpc/include/asm/scatterlist.h b/arch/powerpc/include/asm/scatterlist.h index 912bf597870f..34cc78fd0ef4 100644 --- a/arch/powerpc/include/asm/scatterlist.h +++ b/arch/powerpc/include/asm/scatterlist.h | |||
| @@ -9,38 +9,12 @@ | |||
| 9 | * 2 of the License, or (at your option) any later version. | 9 | * 2 of the License, or (at your option) any later version. |
| 10 | */ | 10 | */ |
| 11 | 11 | ||
| 12 | #ifdef __KERNEL__ | ||
| 13 | #include <linux/types.h> | ||
| 14 | #include <asm/dma.h> | 12 | #include <asm/dma.h> |
| 15 | 13 | #include <asm-generic/scatterlist.h> | |
| 16 | struct scatterlist { | ||
| 17 | #ifdef CONFIG_DEBUG_SG | ||
| 18 | unsigned long sg_magic; | ||
| 19 | #endif | ||
| 20 | unsigned long page_link; | ||
| 21 | unsigned int offset; | ||
| 22 | unsigned int length; | ||
| 23 | |||
| 24 | /* For TCE or SWIOTLB support */ | ||
| 25 | dma_addr_t dma_address; | ||
| 26 | u32 dma_length; | ||
| 27 | }; | ||
| 28 | |||
| 29 | /* | ||
| 30 | * These macros should be used after a dma_map_sg call has been done | ||
| 31 | * to get bus addresses of each of the SG entries and their lengths. | ||
| 32 | * You should only work with the number of sg entries pci_map_sg | ||
| 33 | * returns, or alternatively stop on the first sg_dma_len(sg) which | ||
| 34 | * is 0. | ||
| 35 | */ | ||
| 36 | #define sg_dma_address(sg) ((sg)->dma_address) | ||
| 37 | #define sg_dma_len(sg) ((sg)->dma_length) | ||
| 38 | 14 | ||
| 39 | #ifdef __powerpc64__ | 15 | #ifdef __powerpc64__ |
| 40 | #define ISA_DMA_THRESHOLD (~0UL) | 16 | #define ISA_DMA_THRESHOLD (~0UL) |
| 41 | #endif | 17 | #endif |
| 42 | |||
| 43 | #define ARCH_HAS_SG_CHAIN | 18 | #define ARCH_HAS_SG_CHAIN |
| 44 | 19 | ||
| 45 | #endif /* __KERNEL__ */ | ||
| 46 | #endif /* _ASM_POWERPC_SCATTERLIST_H */ | 20 | #endif /* _ASM_POWERPC_SCATTERLIST_H */ |
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile index 877326320e74..58d0572de6f9 100644 --- a/arch/powerpc/kernel/Makefile +++ b/arch/powerpc/kernel/Makefile | |||
| @@ -57,8 +57,12 @@ obj-$(CONFIG_CRASH_DUMP) += crash_dump.o | |||
| 57 | obj-$(CONFIG_E500) += idle_e500.o | 57 | obj-$(CONFIG_E500) += idle_e500.o |
| 58 | obj-$(CONFIG_6xx) += idle_6xx.o l2cr_6xx.o cpu_setup_6xx.o | 58 | obj-$(CONFIG_6xx) += idle_6xx.o l2cr_6xx.o cpu_setup_6xx.o |
| 59 | obj-$(CONFIG_TAU) += tau_6xx.o | 59 | obj-$(CONFIG_TAU) += tau_6xx.o |
| 60 | obj-$(CONFIG_HIBERNATION) += swsusp.o suspend.o \ | 60 | obj-$(CONFIG_HIBERNATION) += swsusp.o suspend.o |
| 61 | swsusp_$(CONFIG_WORD_SIZE).o | 61 | ifeq ($(CONFIG_FSL_BOOKE),y) |
| 62 | obj-$(CONFIG_HIBERNATION) += swsusp_booke.o | ||
| 63 | else | ||
| 64 | obj-$(CONFIG_HIBERNATION) += swsusp_$(CONFIG_WORD_SIZE).o | ||
| 65 | endif | ||
| 62 | obj64-$(CONFIG_HIBERNATION) += swsusp_asm64.o | 66 | obj64-$(CONFIG_HIBERNATION) += swsusp_asm64.o |
| 63 | obj-$(CONFIG_MODULES) += module.o module_$(CONFIG_WORD_SIZE).o | 67 | obj-$(CONFIG_MODULES) += module.o module_$(CONFIG_WORD_SIZE).o |
| 64 | obj-$(CONFIG_44x) += cpu_setup_44x.o | 68 | obj-$(CONFIG_44x) += cpu_setup_44x.o |
diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c index 28a686fb269c..496cc5b3984f 100644 --- a/arch/powerpc/kernel/asm-offsets.c +++ b/arch/powerpc/kernel/asm-offsets.c | |||
| @@ -50,6 +50,9 @@ | |||
| 50 | #endif | 50 | #endif |
| 51 | #ifdef CONFIG_KVM | 51 | #ifdef CONFIG_KVM |
| 52 | #include <linux/kvm_host.h> | 52 | #include <linux/kvm_host.h> |
| 53 | #ifndef CONFIG_BOOKE | ||
| 54 | #include <asm/kvm_book3s.h> | ||
| 55 | #endif | ||
| 53 | #endif | 56 | #endif |
| 54 | 57 | ||
| 55 | #ifdef CONFIG_PPC32 | 58 | #ifdef CONFIG_PPC32 |
| @@ -105,6 +108,9 @@ int main(void) | |||
| 105 | DEFINE(THREAD_USED_SPE, offsetof(struct thread_struct, used_spe)); | 108 | DEFINE(THREAD_USED_SPE, offsetof(struct thread_struct, used_spe)); |
| 106 | #endif /* CONFIG_SPE */ | 109 | #endif /* CONFIG_SPE */ |
| 107 | #endif /* CONFIG_PPC64 */ | 110 | #endif /* CONFIG_PPC64 */ |
| 111 | #ifdef CONFIG_KVM_BOOK3S_32_HANDLER | ||
| 112 | DEFINE(THREAD_KVM_SVCPU, offsetof(struct thread_struct, kvm_shadow_vcpu)); | ||
| 113 | #endif | ||
| 108 | 114 | ||
| 109 | DEFINE(TI_FLAGS, offsetof(struct thread_info, flags)); | 115 | DEFINE(TI_FLAGS, offsetof(struct thread_info, flags)); |
| 110 | DEFINE(TI_LOCAL_FLAGS, offsetof(struct thread_info, local_flags)); | 116 | DEFINE(TI_LOCAL_FLAGS, offsetof(struct thread_info, local_flags)); |
| @@ -191,33 +197,9 @@ int main(void) | |||
| 191 | DEFINE(PACA_DATA_OFFSET, offsetof(struct paca_struct, data_offset)); | 197 | DEFINE(PACA_DATA_OFFSET, offsetof(struct paca_struct, data_offset)); |
| 192 | DEFINE(PACA_TRAP_SAVE, offsetof(struct paca_struct, trap_save)); | 198 | DEFINE(PACA_TRAP_SAVE, offsetof(struct paca_struct, trap_save)); |
| 193 | #ifdef CONFIG_KVM_BOOK3S_64_HANDLER | 199 | #ifdef CONFIG_KVM_BOOK3S_64_HANDLER |
| 194 | DEFINE(PACA_KVM_IN_GUEST, offsetof(struct paca_struct, kvm_in_guest)); | 200 | DEFINE(PACA_KVM_SVCPU, offsetof(struct paca_struct, shadow_vcpu)); |
| 195 | DEFINE(PACA_KVM_SLB, offsetof(struct paca_struct, kvm_slb)); | 201 | DEFINE(SVCPU_SLB, offsetof(struct kvmppc_book3s_shadow_vcpu, slb)); |
| 196 | DEFINE(PACA_KVM_SLB_MAX, offsetof(struct paca_struct, kvm_slb_max)); | 202 | DEFINE(SVCPU_SLB_MAX, offsetof(struct kvmppc_book3s_shadow_vcpu, slb_max)); |
| 197 | DEFINE(PACA_KVM_CR, offsetof(struct paca_struct, shadow_vcpu.cr)); | ||
| 198 | DEFINE(PACA_KVM_XER, offsetof(struct paca_struct, shadow_vcpu.xer)); | ||
| 199 | DEFINE(PACA_KVM_R0, offsetof(struct paca_struct, shadow_vcpu.gpr[0])); | ||
| 200 | DEFINE(PACA_KVM_R1, offsetof(struct paca_struct, shadow_vcpu.gpr[1])); | ||
| 201 | DEFINE(PACA_KVM_R2, offsetof(struct paca_struct, shadow_vcpu.gpr[2])); | ||
| 202 | DEFINE(PACA_KVM_R3, offsetof(struct paca_struct, shadow_vcpu.gpr[3])); | ||
| 203 | DEFINE(PACA_KVM_R4, offsetof(struct paca_struct, shadow_vcpu.gpr[4])); | ||
| 204 | DEFINE(PACA_KVM_R5, offsetof(struct paca_struct, shadow_vcpu.gpr[5])); | ||
| 205 | DEFINE(PACA_KVM_R6, offsetof(struct paca_struct, shadow_vcpu.gpr[6])); | ||
| 206 | DEFINE(PACA_KVM_R7, offsetof(struct paca_struct, shadow_vcpu.gpr[7])); | ||
| 207 | DEFINE(PACA_KVM_R8, offsetof(struct paca_struct, shadow_vcpu.gpr[8])); | ||
| 208 | DEFINE(PACA_KVM_R9, offsetof(struct paca_struct, shadow_vcpu.gpr[9])); | ||
| 209 | DEFINE(PACA_KVM_R10, offsetof(struct paca_struct, shadow_vcpu.gpr[10])); | ||
| 210 | DEFINE(PACA_KVM_R11, offsetof(struct paca_struct, shadow_vcpu.gpr[11])); | ||
| 211 | DEFINE(PACA_KVM_R12, offsetof(struct paca_struct, shadow_vcpu.gpr[12])); | ||
| 212 | DEFINE(PACA_KVM_R13, offsetof(struct paca_struct, shadow_vcpu.gpr[13])); | ||
| 213 | DEFINE(PACA_KVM_HOST_R1, offsetof(struct paca_struct, shadow_vcpu.host_r1)); | ||
| 214 | DEFINE(PACA_KVM_HOST_R2, offsetof(struct paca_struct, shadow_vcpu.host_r2)); | ||
| 215 | DEFINE(PACA_KVM_VMHANDLER, offsetof(struct paca_struct, | ||
| 216 | shadow_vcpu.vmhandler)); | ||
| 217 | DEFINE(PACA_KVM_SCRATCH0, offsetof(struct paca_struct, | ||
| 218 | shadow_vcpu.scratch0)); | ||
| 219 | DEFINE(PACA_KVM_SCRATCH1, offsetof(struct paca_struct, | ||
| 220 | shadow_vcpu.scratch1)); | ||
| 221 | #endif | 203 | #endif |
| 222 | #endif /* CONFIG_PPC64 */ | 204 | #endif /* CONFIG_PPC64 */ |
| 223 | 205 | ||
| @@ -228,8 +210,8 @@ int main(void) | |||
| 228 | /* Interrupt register frame */ | 210 | /* Interrupt register frame */ |
| 229 | DEFINE(STACK_FRAME_OVERHEAD, STACK_FRAME_OVERHEAD); | 211 | DEFINE(STACK_FRAME_OVERHEAD, STACK_FRAME_OVERHEAD); |
| 230 | DEFINE(INT_FRAME_SIZE, STACK_INT_FRAME_SIZE); | 212 | DEFINE(INT_FRAME_SIZE, STACK_INT_FRAME_SIZE); |
| 231 | #ifdef CONFIG_PPC64 | ||
| 232 | DEFINE(SWITCH_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs)); | 213 | DEFINE(SWITCH_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs)); |
| 214 | #ifdef CONFIG_PPC64 | ||
| 233 | /* Create extra stack space for SRR0 and SRR1 when calling prom/rtas. */ | 215 | /* Create extra stack space for SRR0 and SRR1 when calling prom/rtas. */ |
| 234 | DEFINE(PROM_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16); | 216 | DEFINE(PROM_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16); |
| 235 | DEFINE(RTAS_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16); | 217 | DEFINE(RTAS_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16); |
| @@ -412,9 +394,6 @@ int main(void) | |||
| 412 | DEFINE(VCPU_HOST_STACK, offsetof(struct kvm_vcpu, arch.host_stack)); | 394 | DEFINE(VCPU_HOST_STACK, offsetof(struct kvm_vcpu, arch.host_stack)); |
| 413 | DEFINE(VCPU_HOST_PID, offsetof(struct kvm_vcpu, arch.host_pid)); | 395 | DEFINE(VCPU_HOST_PID, offsetof(struct kvm_vcpu, arch.host_pid)); |
| 414 | DEFINE(VCPU_GPRS, offsetof(struct kvm_vcpu, arch.gpr)); | 396 | DEFINE(VCPU_GPRS, offsetof(struct kvm_vcpu, arch.gpr)); |
| 415 | DEFINE(VCPU_LR, offsetof(struct kvm_vcpu, arch.lr)); | ||
| 416 | DEFINE(VCPU_CTR, offsetof(struct kvm_vcpu, arch.ctr)); | ||
| 417 | DEFINE(VCPU_PC, offsetof(struct kvm_vcpu, arch.pc)); | ||
| 418 | DEFINE(VCPU_MSR, offsetof(struct kvm_vcpu, arch.msr)); | 397 | DEFINE(VCPU_MSR, offsetof(struct kvm_vcpu, arch.msr)); |
| 419 | DEFINE(VCPU_SPRG4, offsetof(struct kvm_vcpu, arch.sprg4)); | 398 | DEFINE(VCPU_SPRG4, offsetof(struct kvm_vcpu, arch.sprg4)); |
| 420 | DEFINE(VCPU_SPRG5, offsetof(struct kvm_vcpu, arch.sprg5)); | 399 | DEFINE(VCPU_SPRG5, offsetof(struct kvm_vcpu, arch.sprg5)); |
| @@ -422,27 +401,68 @@ int main(void) | |||
| 422 | DEFINE(VCPU_SPRG7, offsetof(struct kvm_vcpu, arch.sprg7)); | 401 | DEFINE(VCPU_SPRG7, offsetof(struct kvm_vcpu, arch.sprg7)); |
| 423 | DEFINE(VCPU_SHADOW_PID, offsetof(struct kvm_vcpu, arch.shadow_pid)); | 402 | DEFINE(VCPU_SHADOW_PID, offsetof(struct kvm_vcpu, arch.shadow_pid)); |
| 424 | 403 | ||
| 425 | DEFINE(VCPU_LAST_INST, offsetof(struct kvm_vcpu, arch.last_inst)); | 404 | /* book3s */ |
| 426 | DEFINE(VCPU_FAULT_DEAR, offsetof(struct kvm_vcpu, arch.fault_dear)); | 405 | #ifdef CONFIG_PPC_BOOK3S |
| 427 | DEFINE(VCPU_FAULT_ESR, offsetof(struct kvm_vcpu, arch.fault_esr)); | ||
| 428 | |||
| 429 | /* book3s_64 */ | ||
| 430 | #ifdef CONFIG_PPC64 | ||
| 431 | DEFINE(VCPU_FAULT_DSISR, offsetof(struct kvm_vcpu, arch.fault_dsisr)); | ||
| 432 | DEFINE(VCPU_HOST_RETIP, offsetof(struct kvm_vcpu, arch.host_retip)); | 406 | DEFINE(VCPU_HOST_RETIP, offsetof(struct kvm_vcpu, arch.host_retip)); |
| 433 | DEFINE(VCPU_HOST_R2, offsetof(struct kvm_vcpu, arch.host_r2)); | ||
| 434 | DEFINE(VCPU_HOST_MSR, offsetof(struct kvm_vcpu, arch.host_msr)); | 407 | DEFINE(VCPU_HOST_MSR, offsetof(struct kvm_vcpu, arch.host_msr)); |
| 435 | DEFINE(VCPU_SHADOW_MSR, offsetof(struct kvm_vcpu, arch.shadow_msr)); | 408 | DEFINE(VCPU_SHADOW_MSR, offsetof(struct kvm_vcpu, arch.shadow_msr)); |
| 436 | DEFINE(VCPU_SHADOW_SRR1, offsetof(struct kvm_vcpu, arch.shadow_srr1)); | ||
| 437 | DEFINE(VCPU_TRAMPOLINE_LOWMEM, offsetof(struct kvm_vcpu, arch.trampoline_lowmem)); | 409 | DEFINE(VCPU_TRAMPOLINE_LOWMEM, offsetof(struct kvm_vcpu, arch.trampoline_lowmem)); |
| 438 | DEFINE(VCPU_TRAMPOLINE_ENTER, offsetof(struct kvm_vcpu, arch.trampoline_enter)); | 410 | DEFINE(VCPU_TRAMPOLINE_ENTER, offsetof(struct kvm_vcpu, arch.trampoline_enter)); |
| 439 | DEFINE(VCPU_HIGHMEM_HANDLER, offsetof(struct kvm_vcpu, arch.highmem_handler)); | 411 | DEFINE(VCPU_HIGHMEM_HANDLER, offsetof(struct kvm_vcpu, arch.highmem_handler)); |
| 440 | DEFINE(VCPU_RMCALL, offsetof(struct kvm_vcpu, arch.rmcall)); | 412 | DEFINE(VCPU_RMCALL, offsetof(struct kvm_vcpu, arch.rmcall)); |
| 441 | DEFINE(VCPU_HFLAGS, offsetof(struct kvm_vcpu, arch.hflags)); | 413 | DEFINE(VCPU_HFLAGS, offsetof(struct kvm_vcpu, arch.hflags)); |
| 414 | DEFINE(VCPU_SVCPU, offsetof(struct kvmppc_vcpu_book3s, shadow_vcpu) - | ||
| 415 | offsetof(struct kvmppc_vcpu_book3s, vcpu)); | ||
| 416 | DEFINE(SVCPU_CR, offsetof(struct kvmppc_book3s_shadow_vcpu, cr)); | ||
| 417 | DEFINE(SVCPU_XER, offsetof(struct kvmppc_book3s_shadow_vcpu, xer)); | ||
| 418 | DEFINE(SVCPU_CTR, offsetof(struct kvmppc_book3s_shadow_vcpu, ctr)); | ||
| 419 | DEFINE(SVCPU_LR, offsetof(struct kvmppc_book3s_shadow_vcpu, lr)); | ||
| 420 | DEFINE(SVCPU_PC, offsetof(struct kvmppc_book3s_shadow_vcpu, pc)); | ||
| 421 | DEFINE(SVCPU_R0, offsetof(struct kvmppc_book3s_shadow_vcpu, gpr[0])); | ||
| 422 | DEFINE(SVCPU_R1, offsetof(struct kvmppc_book3s_shadow_vcpu, gpr[1])); | ||
| 423 | DEFINE(SVCPU_R2, offsetof(struct kvmppc_book3s_shadow_vcpu, gpr[2])); | ||
| 424 | DEFINE(SVCPU_R3, offsetof(struct kvmppc_book3s_shadow_vcpu, gpr[3])); | ||
| 425 | DEFINE(SVCPU_R4, offsetof(struct kvmppc_book3s_shadow_vcpu, gpr[4])); | ||
| 426 | DEFINE(SVCPU_R5, offsetof(struct kvmppc_book3s_shadow_vcpu, gpr[5])); | ||
| 427 | DEFINE(SVCPU_R6, offsetof(struct kvmppc_book3s_shadow_vcpu, gpr[6])); | ||
| 428 | DEFINE(SVCPU_R7, offsetof(struct kvmppc_book3s_shadow_vcpu, gpr[7])); | ||
| 429 | DEFINE(SVCPU_R8, offsetof(struct kvmppc_book3s_shadow_vcpu, gpr[8])); | ||
| 430 | DEFINE(SVCPU_R9, offsetof(struct kvmppc_book3s_shadow_vcpu, gpr[9])); | ||
| 431 | DEFINE(SVCPU_R10, offsetof(struct kvmppc_book3s_shadow_vcpu, gpr[10])); | ||
| 432 | DEFINE(SVCPU_R11, offsetof(struct kvmppc_book3s_shadow_vcpu, gpr[11])); | ||
| 433 | DEFINE(SVCPU_R12, offsetof(struct kvmppc_book3s_shadow_vcpu, gpr[12])); | ||
| 434 | DEFINE(SVCPU_R13, offsetof(struct kvmppc_book3s_shadow_vcpu, gpr[13])); | ||
| 435 | DEFINE(SVCPU_HOST_R1, offsetof(struct kvmppc_book3s_shadow_vcpu, host_r1)); | ||
| 436 | DEFINE(SVCPU_HOST_R2, offsetof(struct kvmppc_book3s_shadow_vcpu, host_r2)); | ||
| 437 | DEFINE(SVCPU_VMHANDLER, offsetof(struct kvmppc_book3s_shadow_vcpu, | ||
| 438 | vmhandler)); | ||
| 439 | DEFINE(SVCPU_SCRATCH0, offsetof(struct kvmppc_book3s_shadow_vcpu, | ||
| 440 | scratch0)); | ||
| 441 | DEFINE(SVCPU_SCRATCH1, offsetof(struct kvmppc_book3s_shadow_vcpu, | ||
| 442 | scratch1)); | ||
| 443 | DEFINE(SVCPU_IN_GUEST, offsetof(struct kvmppc_book3s_shadow_vcpu, | ||
| 444 | in_guest)); | ||
| 445 | DEFINE(SVCPU_FAULT_DSISR, offsetof(struct kvmppc_book3s_shadow_vcpu, | ||
| 446 | fault_dsisr)); | ||
| 447 | DEFINE(SVCPU_FAULT_DAR, offsetof(struct kvmppc_book3s_shadow_vcpu, | ||
| 448 | fault_dar)); | ||
| 449 | DEFINE(SVCPU_LAST_INST, offsetof(struct kvmppc_book3s_shadow_vcpu, | ||
| 450 | last_inst)); | ||
| 451 | DEFINE(SVCPU_SHADOW_SRR1, offsetof(struct kvmppc_book3s_shadow_vcpu, | ||
| 452 | shadow_srr1)); | ||
| 453 | #ifdef CONFIG_PPC_BOOK3S_32 | ||
| 454 | DEFINE(SVCPU_SR, offsetof(struct kvmppc_book3s_shadow_vcpu, sr)); | ||
| 455 | #endif | ||
| 442 | #else | 456 | #else |
| 443 | DEFINE(VCPU_CR, offsetof(struct kvm_vcpu, arch.cr)); | 457 | DEFINE(VCPU_CR, offsetof(struct kvm_vcpu, arch.cr)); |
| 444 | DEFINE(VCPU_XER, offsetof(struct kvm_vcpu, arch.xer)); | 458 | DEFINE(VCPU_XER, offsetof(struct kvm_vcpu, arch.xer)); |
| 445 | #endif /* CONFIG_PPC64 */ | 459 | DEFINE(VCPU_LR, offsetof(struct kvm_vcpu, arch.lr)); |
| 460 | DEFINE(VCPU_CTR, offsetof(struct kvm_vcpu, arch.ctr)); | ||
| 461 | DEFINE(VCPU_PC, offsetof(struct kvm_vcpu, arch.pc)); | ||
| 462 | DEFINE(VCPU_LAST_INST, offsetof(struct kvm_vcpu, arch.last_inst)); | ||
| 463 | DEFINE(VCPU_FAULT_DEAR, offsetof(struct kvm_vcpu, arch.fault_dear)); | ||
| 464 | DEFINE(VCPU_FAULT_ESR, offsetof(struct kvm_vcpu, arch.fault_esr)); | ||
| 465 | #endif /* CONFIG_PPC_BOOK3S */ | ||
| 446 | #endif | 466 | #endif |
| 447 | #ifdef CONFIG_44x | 467 | #ifdef CONFIG_44x |
| 448 | DEFINE(PGD_T_LOG2, PGD_T_LOG2); | 468 | DEFINE(PGD_T_LOG2, PGD_T_LOG2); |
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c index 9556be903e96..87aa0f3c6047 100644 --- a/arch/powerpc/kernel/cputable.c +++ b/arch/powerpc/kernel/cputable.c | |||
| @@ -1840,7 +1840,7 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
| 1840 | .oprofile_cpu_type = "ppc/e500mc", | 1840 | .oprofile_cpu_type = "ppc/e500mc", |
| 1841 | .oprofile_type = PPC_OPROFILE_FSL_EMB, | 1841 | .oprofile_type = PPC_OPROFILE_FSL_EMB, |
| 1842 | .cpu_setup = __setup_cpu_e500mc, | 1842 | .cpu_setup = __setup_cpu_e500mc, |
| 1843 | .machine_check = machine_check_e500, | 1843 | .machine_check = machine_check_e500mc, |
| 1844 | .platform = "ppce500mc", | 1844 | .platform = "ppce500mc", |
| 1845 | }, | 1845 | }, |
| 1846 | { /* default match */ | 1846 | { /* default match */ |
diff --git a/arch/powerpc/kernel/crash.c b/arch/powerpc/kernel/crash.c index 8c066d6a8e4b..b46f2e09bd81 100644 --- a/arch/powerpc/kernel/crash.c +++ b/arch/powerpc/kernel/crash.c | |||
| @@ -163,6 +163,7 @@ static void crash_kexec_prepare_cpus(int cpu) | |||
| 163 | } | 163 | } |
| 164 | 164 | ||
| 165 | /* wait for all the CPUs to hit real mode but timeout if they don't come in */ | 165 | /* wait for all the CPUs to hit real mode but timeout if they don't come in */ |
| 166 | #ifdef CONFIG_PPC_STD_MMU_64 | ||
| 166 | static void crash_kexec_wait_realmode(int cpu) | 167 | static void crash_kexec_wait_realmode(int cpu) |
| 167 | { | 168 | { |
| 168 | unsigned int msecs; | 169 | unsigned int msecs; |
| @@ -187,6 +188,7 @@ static void crash_kexec_wait_realmode(int cpu) | |||
| 187 | } | 188 | } |
| 188 | mb(); | 189 | mb(); |
| 189 | } | 190 | } |
| 191 | #endif | ||
| 190 | 192 | ||
| 191 | /* | 193 | /* |
| 192 | * This function will be called by secondary cpus or by kexec cpu | 194 | * This function will be called by secondary cpus or by kexec cpu |
| @@ -445,7 +447,9 @@ void default_machine_crash_shutdown(struct pt_regs *regs) | |||
| 445 | crash_kexec_prepare_cpus(crashing_cpu); | 447 | crash_kexec_prepare_cpus(crashing_cpu); |
| 446 | cpu_set(crashing_cpu, cpus_in_crash); | 448 | cpu_set(crashing_cpu, cpus_in_crash); |
| 447 | crash_kexec_stop_spus(); | 449 | crash_kexec_stop_spus(); |
| 450 | #ifdef CONFIG_PPC_STD_MMU_64 | ||
| 448 | crash_kexec_wait_realmode(crashing_cpu); | 451 | crash_kexec_wait_realmode(crashing_cpu); |
| 452 | #endif | ||
| 449 | if (ppc_md.kexec_cpu_down) | 453 | if (ppc_md.kexec_cpu_down) |
| 450 | ppc_md.kexec_cpu_down(1, 0); | 454 | ppc_md.kexec_cpu_down(1, 0); |
| 451 | } | 455 | } |
diff --git a/arch/powerpc/kernel/dma-swiotlb.c b/arch/powerpc/kernel/dma-swiotlb.c index 4ff4da2c238b..e7fe218b8697 100644 --- a/arch/powerpc/kernel/dma-swiotlb.c +++ b/arch/powerpc/kernel/dma-swiotlb.c | |||
| @@ -39,8 +39,8 @@ struct dma_map_ops swiotlb_dma_ops = { | |||
| 39 | .dma_supported = swiotlb_dma_supported, | 39 | .dma_supported = swiotlb_dma_supported, |
| 40 | .map_page = swiotlb_map_page, | 40 | .map_page = swiotlb_map_page, |
| 41 | .unmap_page = swiotlb_unmap_page, | 41 | .unmap_page = swiotlb_unmap_page, |
| 42 | .sync_single_range_for_cpu = swiotlb_sync_single_range_for_cpu, | 42 | .sync_single_for_cpu = swiotlb_sync_single_for_cpu, |
| 43 | .sync_single_range_for_device = swiotlb_sync_single_range_for_device, | 43 | .sync_single_for_device = swiotlb_sync_single_for_device, |
| 44 | .sync_sg_for_cpu = swiotlb_sync_sg_for_cpu, | 44 | .sync_sg_for_cpu = swiotlb_sync_sg_for_cpu, |
| 45 | .sync_sg_for_device = swiotlb_sync_sg_for_device, | 45 | .sync_sg_for_device = swiotlb_sync_sg_for_device, |
| 46 | .mapping_error = swiotlb_dma_mapping_error, | 46 | .mapping_error = swiotlb_dma_mapping_error, |
diff --git a/arch/powerpc/kernel/dma.c b/arch/powerpc/kernel/dma.c index 6c1df5757cd6..8d1de6f31d5a 100644 --- a/arch/powerpc/kernel/dma.c +++ b/arch/powerpc/kernel/dma.c | |||
| @@ -127,11 +127,11 @@ static inline void dma_direct_sync_sg(struct device *dev, | |||
| 127 | __dma_sync_page(sg_page(sg), sg->offset, sg->length, direction); | 127 | __dma_sync_page(sg_page(sg), sg->offset, sg->length, direction); |
| 128 | } | 128 | } |
| 129 | 129 | ||
| 130 | static inline void dma_direct_sync_single_range(struct device *dev, | 130 | static inline void dma_direct_sync_single(struct device *dev, |
| 131 | dma_addr_t dma_handle, unsigned long offset, size_t size, | 131 | dma_addr_t dma_handle, size_t size, |
| 132 | enum dma_data_direction direction) | 132 | enum dma_data_direction direction) |
| 133 | { | 133 | { |
| 134 | __dma_sync(bus_to_virt(dma_handle+offset), size, direction); | 134 | __dma_sync(bus_to_virt(dma_handle), size, direction); |
| 135 | } | 135 | } |
| 136 | #endif | 136 | #endif |
| 137 | 137 | ||
| @@ -144,8 +144,8 @@ struct dma_map_ops dma_direct_ops = { | |||
| 144 | .map_page = dma_direct_map_page, | 144 | .map_page = dma_direct_map_page, |
| 145 | .unmap_page = dma_direct_unmap_page, | 145 | .unmap_page = dma_direct_unmap_page, |
| 146 | #ifdef CONFIG_NOT_COHERENT_CACHE | 146 | #ifdef CONFIG_NOT_COHERENT_CACHE |
| 147 | .sync_single_range_for_cpu = dma_direct_sync_single_range, | 147 | .sync_single_for_cpu = dma_direct_sync_single, |
| 148 | .sync_single_range_for_device = dma_direct_sync_single_range, | 148 | .sync_single_for_device = dma_direct_sync_single, |
| 149 | .sync_sg_for_cpu = dma_direct_sync_sg, | 149 | .sync_sg_for_cpu = dma_direct_sync_sg, |
| 150 | .sync_sg_for_device = dma_direct_sync_sg, | 150 | .sync_sg_for_device = dma_direct_sync_sg, |
| 151 | #endif | 151 | #endif |
diff --git a/arch/powerpc/kernel/fsl_booke_entry_mapping.S b/arch/powerpc/kernel/fsl_booke_entry_mapping.S new file mode 100644 index 000000000000..beb4d78a2304 --- /dev/null +++ b/arch/powerpc/kernel/fsl_booke_entry_mapping.S | |||
| @@ -0,0 +1,237 @@ | |||
| 1 | |||
| 2 | /* 1. Find the index of the entry we're executing in */ | ||
| 3 | bl invstr /* Find our address */ | ||
| 4 | invstr: mflr r6 /* Make it accessible */ | ||
| 5 | mfmsr r7 | ||
| 6 | rlwinm r4,r7,27,31,31 /* extract MSR[IS] */ | ||
| 7 | mfspr r7, SPRN_PID0 | ||
| 8 | slwi r7,r7,16 | ||
| 9 | or r7,r7,r4 | ||
| 10 | mtspr SPRN_MAS6,r7 | ||
| 11 | tlbsx 0,r6 /* search MSR[IS], SPID=PID0 */ | ||
| 12 | mfspr r7,SPRN_MAS1 | ||
| 13 | andis. r7,r7,MAS1_VALID@h | ||
| 14 | bne match_TLB | ||
| 15 | |||
| 16 | mfspr r7,SPRN_MMUCFG | ||
| 17 | rlwinm r7,r7,21,28,31 /* extract MMUCFG[NPIDS] */ | ||
| 18 | cmpwi r7,3 | ||
| 19 | bne match_TLB /* skip if NPIDS != 3 */ | ||
| 20 | |||
| 21 | mfspr r7,SPRN_PID1 | ||
| 22 | slwi r7,r7,16 | ||
| 23 | or r7,r7,r4 | ||
| 24 | mtspr SPRN_MAS6,r7 | ||
| 25 | tlbsx 0,r6 /* search MSR[IS], SPID=PID1 */ | ||
| 26 | mfspr r7,SPRN_MAS1 | ||
| 27 | andis. r7,r7,MAS1_VALID@h | ||
| 28 | bne match_TLB | ||
| 29 | mfspr r7, SPRN_PID2 | ||
| 30 | slwi r7,r7,16 | ||
| 31 | or r7,r7,r4 | ||
| 32 | mtspr SPRN_MAS6,r7 | ||
| 33 | tlbsx 0,r6 /* Fall through, we had to match */ | ||
| 34 | |||
| 35 | match_TLB: | ||
| 36 | mfspr r7,SPRN_MAS0 | ||
| 37 | rlwinm r3,r7,16,20,31 /* Extract MAS0(Entry) */ | ||
| 38 | |||
| 39 | mfspr r7,SPRN_MAS1 /* Insure IPROT set */ | ||
| 40 | oris r7,r7,MAS1_IPROT@h | ||
| 41 | mtspr SPRN_MAS1,r7 | ||
| 42 | tlbwe | ||
| 43 | |||
| 44 | /* 2. Invalidate all entries except the entry we're executing in */ | ||
| 45 | mfspr r9,SPRN_TLB1CFG | ||
| 46 | andi. r9,r9,0xfff | ||
| 47 | li r6,0 /* Set Entry counter to 0 */ | ||
| 48 | 1: lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */ | ||
| 49 | rlwimi r7,r6,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r6) */ | ||
| 50 | mtspr SPRN_MAS0,r7 | ||
| 51 | tlbre | ||
| 52 | mfspr r7,SPRN_MAS1 | ||
| 53 | rlwinm r7,r7,0,2,31 /* Clear MAS1 Valid and IPROT */ | ||
| 54 | cmpw r3,r6 | ||
| 55 | beq skpinv /* Dont update the current execution TLB */ | ||
| 56 | mtspr SPRN_MAS1,r7 | ||
| 57 | tlbwe | ||
| 58 | isync | ||
| 59 | skpinv: addi r6,r6,1 /* Increment */ | ||
| 60 | cmpw r6,r9 /* Are we done? */ | ||
| 61 | bne 1b /* If not, repeat */ | ||
| 62 | |||
| 63 | /* Invalidate TLB0 */ | ||
| 64 | li r6,0x04 | ||
| 65 | tlbivax 0,r6 | ||
| 66 | TLBSYNC | ||
| 67 | /* Invalidate TLB1 */ | ||
| 68 | li r6,0x0c | ||
| 69 | tlbivax 0,r6 | ||
| 70 | TLBSYNC | ||
| 71 | |||
| 72 | /* 3. Setup a temp mapping and jump to it */ | ||
| 73 | andi. r5, r3, 0x1 /* Find an entry not used and is non-zero */ | ||
| 74 | addi r5, r5, 0x1 | ||
| 75 | lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */ | ||
| 76 | rlwimi r7,r3,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r3) */ | ||
| 77 | mtspr SPRN_MAS0,r7 | ||
| 78 | tlbre | ||
| 79 | |||
| 80 | /* grab and fixup the RPN */ | ||
| 81 | mfspr r6,SPRN_MAS1 /* extract MAS1[SIZE] */ | ||
| 82 | rlwinm r6,r6,25,27,31 | ||
| 83 | li r8,-1 | ||
| 84 | addi r6,r6,10 | ||
| 85 | slw r6,r8,r6 /* convert to mask */ | ||
| 86 | |||
| 87 | bl 1f /* Find our address */ | ||
| 88 | 1: mflr r7 | ||
| 89 | |||
| 90 | mfspr r8,SPRN_MAS3 | ||
| 91 | #ifdef CONFIG_PHYS_64BIT | ||
| 92 | mfspr r23,SPRN_MAS7 | ||
| 93 | #endif | ||
| 94 | and r8,r6,r8 | ||
| 95 | subfic r9,r6,-4096 | ||
| 96 | and r9,r9,r7 | ||
| 97 | |||
| 98 | or r25,r8,r9 | ||
| 99 | ori r8,r25,(MAS3_SX|MAS3_SW|MAS3_SR) | ||
| 100 | |||
| 101 | /* Just modify the entry ID and EPN for the temp mapping */ | ||
| 102 | lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */ | ||
| 103 | rlwimi r7,r5,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r5) */ | ||
| 104 | mtspr SPRN_MAS0,r7 | ||
| 105 | xori r6,r4,1 /* Setup TMP mapping in the other Address space */ | ||
| 106 | slwi r6,r6,12 | ||
| 107 | oris r6,r6,(MAS1_VALID|MAS1_IPROT)@h | ||
| 108 | ori r6,r6,(MAS1_TSIZE(BOOK3E_PAGESZ_4K))@l | ||
| 109 | mtspr SPRN_MAS1,r6 | ||
| 110 | mfspr r6,SPRN_MAS2 | ||
| 111 | li r7,0 /* temp EPN = 0 */ | ||
| 112 | rlwimi r7,r6,0,20,31 | ||
| 113 | mtspr SPRN_MAS2,r7 | ||
| 114 | mtspr SPRN_MAS3,r8 | ||
| 115 | tlbwe | ||
| 116 | |||
| 117 | xori r6,r4,1 | ||
| 118 | slwi r6,r6,5 /* setup new context with other address space */ | ||
| 119 | bl 1f /* Find our address */ | ||
| 120 | 1: mflr r9 | ||
| 121 | rlwimi r7,r9,0,20,31 | ||
| 122 | addi r7,r7,(2f - 1b) | ||
| 123 | mtspr SPRN_SRR0,r7 | ||
| 124 | mtspr SPRN_SRR1,r6 | ||
| 125 | rfi | ||
| 126 | 2: | ||
| 127 | /* 4. Clear out PIDs & Search info */ | ||
| 128 | li r6,0 | ||
| 129 | mtspr SPRN_MAS6,r6 | ||
| 130 | mtspr SPRN_PID0,r6 | ||
| 131 | |||
| 132 | mfspr r7,SPRN_MMUCFG | ||
| 133 | rlwinm r7,r7,21,28,31 /* extract MMUCFG[NPIDS] */ | ||
| 134 | cmpwi r7,3 | ||
| 135 | bne 2f /* skip if NPIDS != 3 */ | ||
| 136 | |||
| 137 | mtspr SPRN_PID1,r6 | ||
| 138 | mtspr SPRN_PID2,r6 | ||
| 139 | |||
| 140 | /* 5. Invalidate mapping we started in */ | ||
| 141 | 2: | ||
| 142 | lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */ | ||
| 143 | rlwimi r7,r3,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r3) */ | ||
| 144 | mtspr SPRN_MAS0,r7 | ||
| 145 | tlbre | ||
| 146 | mfspr r6,SPRN_MAS1 | ||
| 147 | rlwinm r6,r6,0,2,0 /* clear IPROT */ | ||
| 148 | mtspr SPRN_MAS1,r6 | ||
| 149 | tlbwe | ||
| 150 | /* Invalidate TLB1 */ | ||
| 151 | li r9,0x0c | ||
| 152 | tlbivax 0,r9 | ||
| 153 | TLBSYNC | ||
| 154 | |||
| 155 | /* The mapping only needs to be cache-coherent on SMP */ | ||
| 156 | #ifdef CONFIG_SMP | ||
| 157 | #define M_IF_SMP MAS2_M | ||
| 158 | #else | ||
| 159 | #define M_IF_SMP 0 | ||
| 160 | #endif | ||
| 161 | |||
| 162 | #if defined(ENTRY_MAPPING_BOOT_SETUP) | ||
| 163 | |||
| 164 | /* 6. Setup KERNELBASE mapping in TLB1[0] */ | ||
| 165 | lis r6,0x1000 /* Set MAS0(TLBSEL) = TLB1(1), ESEL = 0 */ | ||
| 166 | mtspr SPRN_MAS0,r6 | ||
| 167 | lis r6,(MAS1_VALID|MAS1_IPROT)@h | ||
| 168 | ori r6,r6,(MAS1_TSIZE(BOOK3E_PAGESZ_64M))@l | ||
| 169 | mtspr SPRN_MAS1,r6 | ||
| 170 | lis r6,MAS2_VAL(PAGE_OFFSET, BOOK3E_PAGESZ_64M, M_IF_SMP)@h | ||
| 171 | ori r6,r6,MAS2_VAL(PAGE_OFFSET, BOOK3E_PAGESZ_64M, M_IF_SMP)@l | ||
| 172 | mtspr SPRN_MAS2,r6 | ||
| 173 | mtspr SPRN_MAS3,r8 | ||
| 174 | tlbwe | ||
| 175 | |||
| 176 | /* 7. Jump to KERNELBASE mapping */ | ||
| 177 | lis r6,(KERNELBASE & ~0xfff)@h | ||
| 178 | ori r6,r6,(KERNELBASE & ~0xfff)@l | ||
| 179 | |||
| 180 | #elif defined(ENTRY_MAPPING_KEXEC_SETUP) | ||
| 181 | /* | ||
| 182 | * 6. Setup a 1:1 mapping in TLB1. Esel 0 is unsued, 1 or 2 contains the tmp | ||
| 183 | * mapping so we start at 3. We setup 8 mappings, each 256MiB in size. This | ||
| 184 | * will cover the first 2GiB of memory. | ||
| 185 | */ | ||
| 186 | |||
| 187 | lis r10, (MAS1_VALID|MAS1_IPROT)@h | ||
| 188 | ori r10,r10, (MAS1_TSIZE(BOOK3E_PAGESZ_256M))@l | ||
| 189 | li r11, 0 | ||
| 190 | li r0, 8 | ||
| 191 | mtctr r0 | ||
| 192 | |||
| 193 | next_tlb_setup: | ||
| 194 | addi r0, r11, 3 | ||
| 195 | rlwinm r0, r0, 16, 4, 15 // Compute esel | ||
| 196 | rlwinm r9, r11, 28, 0, 3 // Compute [ER]PN | ||
| 197 | oris r0, r0, (MAS0_TLBSEL(1))@h | ||
| 198 | mtspr SPRN_MAS0,r0 | ||
| 199 | mtspr SPRN_MAS1,r10 | ||
| 200 | mtspr SPRN_MAS2,r9 | ||
| 201 | ori r9, r9, (MAS3_SX|MAS3_SW|MAS3_SR) | ||
| 202 | mtspr SPRN_MAS3,r9 | ||
| 203 | tlbwe | ||
| 204 | addi r11, r11, 1 | ||
| 205 | bdnz+ next_tlb_setup | ||
| 206 | |||
| 207 | /* 7. Jump to our 1:1 mapping */ | ||
| 208 | li r6, 0 | ||
| 209 | |||
| 210 | #else | ||
| 211 | #error You need to specify the mapping or not use this at all. | ||
| 212 | #endif | ||
| 213 | |||
| 214 | lis r7,MSR_KERNEL@h | ||
| 215 | ori r7,r7,MSR_KERNEL@l | ||
| 216 | bl 1f /* Find our address */ | ||
| 217 | 1: mflr r9 | ||
| 218 | rlwimi r6,r9,0,20,31 | ||
| 219 | addi r6,r6,(2f - 1b) | ||
| 220 | add r6, r6, r25 | ||
| 221 | mtspr SPRN_SRR0,r6 | ||
| 222 | mtspr SPRN_SRR1,r7 | ||
| 223 | rfi /* start execution out of TLB1[0] entry */ | ||
| 224 | |||
| 225 | /* 8. Clear out the temp mapping */ | ||
| 226 | 2: lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */ | ||
| 227 | rlwimi r7,r5,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r5) */ | ||
| 228 | mtspr SPRN_MAS0,r7 | ||
| 229 | tlbre | ||
| 230 | mfspr r8,SPRN_MAS1 | ||
| 231 | rlwinm r8,r8,0,2,0 /* clear IPROT */ | ||
| 232 | mtspr SPRN_MAS1,r8 | ||
| 233 | tlbwe | ||
| 234 | /* Invalidate TLB1 */ | ||
| 235 | li r9,0x0c | ||
| 236 | tlbivax 0,r9 | ||
| 237 | TLBSYNC | ||
diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S index e025e89fe93e..98c4b29a56f4 100644 --- a/arch/powerpc/kernel/head_32.S +++ b/arch/powerpc/kernel/head_32.S | |||
| @@ -33,6 +33,7 @@ | |||
| 33 | #include <asm/asm-offsets.h> | 33 | #include <asm/asm-offsets.h> |
| 34 | #include <asm/ptrace.h> | 34 | #include <asm/ptrace.h> |
| 35 | #include <asm/bug.h> | 35 | #include <asm/bug.h> |
| 36 | #include <asm/kvm_book3s_asm.h> | ||
| 36 | 37 | ||
| 37 | /* 601 only have IBAT; cr0.eq is set on 601 when using this macro */ | 38 | /* 601 only have IBAT; cr0.eq is set on 601 when using this macro */ |
| 38 | #define LOAD_BAT(n, reg, RA, RB) \ | 39 | #define LOAD_BAT(n, reg, RA, RB) \ |
| @@ -303,6 +304,7 @@ __secondary_hold_acknowledge: | |||
| 303 | */ | 304 | */ |
| 304 | #define EXCEPTION(n, label, hdlr, xfer) \ | 305 | #define EXCEPTION(n, label, hdlr, xfer) \ |
| 305 | . = n; \ | 306 | . = n; \ |
| 307 | DO_KVM n; \ | ||
| 306 | label: \ | 308 | label: \ |
| 307 | EXCEPTION_PROLOG; \ | 309 | EXCEPTION_PROLOG; \ |
| 308 | addi r3,r1,STACK_FRAME_OVERHEAD; \ | 310 | addi r3,r1,STACK_FRAME_OVERHEAD; \ |
| @@ -358,6 +360,7 @@ i##n: \ | |||
| 358 | * -- paulus. | 360 | * -- paulus. |
| 359 | */ | 361 | */ |
| 360 | . = 0x200 | 362 | . = 0x200 |
| 363 | DO_KVM 0x200 | ||
| 361 | mtspr SPRN_SPRG_SCRATCH0,r10 | 364 | mtspr SPRN_SPRG_SCRATCH0,r10 |
| 362 | mtspr SPRN_SPRG_SCRATCH1,r11 | 365 | mtspr SPRN_SPRG_SCRATCH1,r11 |
| 363 | mfcr r10 | 366 | mfcr r10 |
| @@ -381,6 +384,7 @@ i##n: \ | |||
| 381 | 384 | ||
| 382 | /* Data access exception. */ | 385 | /* Data access exception. */ |
| 383 | . = 0x300 | 386 | . = 0x300 |
| 387 | DO_KVM 0x300 | ||
| 384 | DataAccess: | 388 | DataAccess: |
| 385 | EXCEPTION_PROLOG | 389 | EXCEPTION_PROLOG |
| 386 | mfspr r10,SPRN_DSISR | 390 | mfspr r10,SPRN_DSISR |
| @@ -397,6 +401,7 @@ DataAccess: | |||
| 397 | 401 | ||
| 398 | /* Instruction access exception. */ | 402 | /* Instruction access exception. */ |
| 399 | . = 0x400 | 403 | . = 0x400 |
| 404 | DO_KVM 0x400 | ||
| 400 | InstructionAccess: | 405 | InstructionAccess: |
| 401 | EXCEPTION_PROLOG | 406 | EXCEPTION_PROLOG |
| 402 | andis. r0,r9,0x4000 /* no pte found? */ | 407 | andis. r0,r9,0x4000 /* no pte found? */ |
| @@ -413,6 +418,7 @@ InstructionAccess: | |||
| 413 | 418 | ||
| 414 | /* Alignment exception */ | 419 | /* Alignment exception */ |
| 415 | . = 0x600 | 420 | . = 0x600 |
| 421 | DO_KVM 0x600 | ||
| 416 | Alignment: | 422 | Alignment: |
| 417 | EXCEPTION_PROLOG | 423 | EXCEPTION_PROLOG |
| 418 | mfspr r4,SPRN_DAR | 424 | mfspr r4,SPRN_DAR |
| @@ -427,6 +433,7 @@ Alignment: | |||
| 427 | 433 | ||
| 428 | /* Floating-point unavailable */ | 434 | /* Floating-point unavailable */ |
| 429 | . = 0x800 | 435 | . = 0x800 |
| 436 | DO_KVM 0x800 | ||
| 430 | FPUnavailable: | 437 | FPUnavailable: |
| 431 | BEGIN_FTR_SECTION | 438 | BEGIN_FTR_SECTION |
| 432 | /* | 439 | /* |
| @@ -450,6 +457,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_FPU_UNAVAILABLE) | |||
| 450 | 457 | ||
| 451 | /* System call */ | 458 | /* System call */ |
| 452 | . = 0xc00 | 459 | . = 0xc00 |
| 460 | DO_KVM 0xc00 | ||
| 453 | SystemCall: | 461 | SystemCall: |
| 454 | EXCEPTION_PROLOG | 462 | EXCEPTION_PROLOG |
| 455 | EXC_XFER_EE_LITE(0xc00, DoSyscall) | 463 | EXC_XFER_EE_LITE(0xc00, DoSyscall) |
| @@ -467,9 +475,11 @@ SystemCall: | |||
| 467 | * by executing an altivec instruction. | 475 | * by executing an altivec instruction. |
| 468 | */ | 476 | */ |
| 469 | . = 0xf00 | 477 | . = 0xf00 |
| 478 | DO_KVM 0xf00 | ||
| 470 | b PerformanceMonitor | 479 | b PerformanceMonitor |
| 471 | 480 | ||
| 472 | . = 0xf20 | 481 | . = 0xf20 |
| 482 | DO_KVM 0xf20 | ||
| 473 | b AltiVecUnavailable | 483 | b AltiVecUnavailable |
| 474 | 484 | ||
| 475 | /* | 485 | /* |
| @@ -882,6 +892,10 @@ __secondary_start: | |||
| 882 | RFI | 892 | RFI |
| 883 | #endif /* CONFIG_SMP */ | 893 | #endif /* CONFIG_SMP */ |
| 884 | 894 | ||
| 895 | #ifdef CONFIG_KVM_BOOK3S_HANDLER | ||
| 896 | #include "../kvm/book3s_rmhandlers.S" | ||
| 897 | #endif | ||
| 898 | |||
| 885 | /* | 899 | /* |
| 886 | * Those generic dummy functions are kept for CPUs not | 900 | * Those generic dummy functions are kept for CPUs not |
| 887 | * included in CONFIG_6xx | 901 | * included in CONFIG_6xx |
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S index bed9a29ee383..844a44b64472 100644 --- a/arch/powerpc/kernel/head_64.S +++ b/arch/powerpc/kernel/head_64.S | |||
| @@ -37,7 +37,7 @@ | |||
| 37 | #include <asm/firmware.h> | 37 | #include <asm/firmware.h> |
| 38 | #include <asm/page_64.h> | 38 | #include <asm/page_64.h> |
| 39 | #include <asm/irqflags.h> | 39 | #include <asm/irqflags.h> |
| 40 | #include <asm/kvm_book3s_64_asm.h> | 40 | #include <asm/kvm_book3s_asm.h> |
| 41 | 41 | ||
| 42 | /* The physical memory is layed out such that the secondary processor | 42 | /* The physical memory is layed out such that the secondary processor |
| 43 | * spin code sits at 0x0000...0x00ff. On server, the vectors follow | 43 | * spin code sits at 0x0000...0x00ff. On server, the vectors follow |
| @@ -169,7 +169,7 @@ exception_marker: | |||
| 169 | /* KVM trampoline code needs to be close to the interrupt handlers */ | 169 | /* KVM trampoline code needs to be close to the interrupt handlers */ |
| 170 | 170 | ||
| 171 | #ifdef CONFIG_KVM_BOOK3S_64_HANDLER | 171 | #ifdef CONFIG_KVM_BOOK3S_64_HANDLER |
| 172 | #include "../kvm/book3s_64_rmhandlers.S" | 172 | #include "../kvm/book3s_rmhandlers.S" |
| 173 | #endif | 173 | #endif |
| 174 | 174 | ||
| 175 | _GLOBAL(generic_secondary_thread_init) | 175 | _GLOBAL(generic_secondary_thread_init) |
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S index edd4a57fd29e..4faeba247854 100644 --- a/arch/powerpc/kernel/head_fsl_booke.S +++ b/arch/powerpc/kernel/head_fsl_booke.S | |||
| @@ -94,204 +94,10 @@ _ENTRY(_start); | |||
| 94 | */ | 94 | */ |
| 95 | 95 | ||
| 96 | _ENTRY(__early_start) | 96 | _ENTRY(__early_start) |
| 97 | /* 1. Find the index of the entry we're executing in */ | ||
| 98 | bl invstr /* Find our address */ | ||
| 99 | invstr: mflr r6 /* Make it accessible */ | ||
| 100 | mfmsr r7 | ||
| 101 | rlwinm r4,r7,27,31,31 /* extract MSR[IS] */ | ||
| 102 | mfspr r7, SPRN_PID0 | ||
| 103 | slwi r7,r7,16 | ||
| 104 | or r7,r7,r4 | ||
| 105 | mtspr SPRN_MAS6,r7 | ||
| 106 | tlbsx 0,r6 /* search MSR[IS], SPID=PID0 */ | ||
| 107 | mfspr r7,SPRN_MAS1 | ||
| 108 | andis. r7,r7,MAS1_VALID@h | ||
| 109 | bne match_TLB | ||
| 110 | |||
| 111 | mfspr r7,SPRN_MMUCFG | ||
| 112 | rlwinm r7,r7,21,28,31 /* extract MMUCFG[NPIDS] */ | ||
| 113 | cmpwi r7,3 | ||
| 114 | bne match_TLB /* skip if NPIDS != 3 */ | ||
| 115 | |||
| 116 | mfspr r7,SPRN_PID1 | ||
| 117 | slwi r7,r7,16 | ||
| 118 | or r7,r7,r4 | ||
| 119 | mtspr SPRN_MAS6,r7 | ||
| 120 | tlbsx 0,r6 /* search MSR[IS], SPID=PID1 */ | ||
| 121 | mfspr r7,SPRN_MAS1 | ||
| 122 | andis. r7,r7,MAS1_VALID@h | ||
| 123 | bne match_TLB | ||
| 124 | mfspr r7, SPRN_PID2 | ||
| 125 | slwi r7,r7,16 | ||
| 126 | or r7,r7,r4 | ||
| 127 | mtspr SPRN_MAS6,r7 | ||
| 128 | tlbsx 0,r6 /* Fall through, we had to match */ | ||
| 129 | |||
| 130 | match_TLB: | ||
| 131 | mfspr r7,SPRN_MAS0 | ||
| 132 | rlwinm r3,r7,16,20,31 /* Extract MAS0(Entry) */ | ||
| 133 | |||
| 134 | mfspr r7,SPRN_MAS1 /* Insure IPROT set */ | ||
| 135 | oris r7,r7,MAS1_IPROT@h | ||
| 136 | mtspr SPRN_MAS1,r7 | ||
| 137 | tlbwe | ||
| 138 | |||
| 139 | /* 2. Invalidate all entries except the entry we're executing in */ | ||
| 140 | mfspr r9,SPRN_TLB1CFG | ||
| 141 | andi. r9,r9,0xfff | ||
| 142 | li r6,0 /* Set Entry counter to 0 */ | ||
| 143 | 1: lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */ | ||
| 144 | rlwimi r7,r6,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r6) */ | ||
| 145 | mtspr SPRN_MAS0,r7 | ||
| 146 | tlbre | ||
| 147 | mfspr r7,SPRN_MAS1 | ||
| 148 | rlwinm r7,r7,0,2,31 /* Clear MAS1 Valid and IPROT */ | ||
| 149 | cmpw r3,r6 | ||
| 150 | beq skpinv /* Dont update the current execution TLB */ | ||
| 151 | mtspr SPRN_MAS1,r7 | ||
| 152 | tlbwe | ||
| 153 | isync | ||
| 154 | skpinv: addi r6,r6,1 /* Increment */ | ||
| 155 | cmpw r6,r9 /* Are we done? */ | ||
| 156 | bne 1b /* If not, repeat */ | ||
| 157 | |||
| 158 | /* Invalidate TLB0 */ | ||
| 159 | li r6,0x04 | ||
| 160 | tlbivax 0,r6 | ||
| 161 | TLBSYNC | ||
| 162 | /* Invalidate TLB1 */ | ||
| 163 | li r6,0x0c | ||
| 164 | tlbivax 0,r6 | ||
| 165 | TLBSYNC | ||
| 166 | |||
| 167 | /* 3. Setup a temp mapping and jump to it */ | ||
| 168 | andi. r5, r3, 0x1 /* Find an entry not used and is non-zero */ | ||
| 169 | addi r5, r5, 0x1 | ||
| 170 | lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */ | ||
| 171 | rlwimi r7,r3,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r3) */ | ||
| 172 | mtspr SPRN_MAS0,r7 | ||
| 173 | tlbre | ||
| 174 | |||
| 175 | /* grab and fixup the RPN */ | ||
| 176 | mfspr r6,SPRN_MAS1 /* extract MAS1[SIZE] */ | ||
| 177 | rlwinm r6,r6,25,27,31 | ||
| 178 | li r8,-1 | ||
| 179 | addi r6,r6,10 | ||
| 180 | slw r6,r8,r6 /* convert to mask */ | ||
| 181 | |||
| 182 | bl 1f /* Find our address */ | ||
| 183 | 1: mflr r7 | ||
| 184 | |||
| 185 | mfspr r8,SPRN_MAS3 | ||
| 186 | #ifdef CONFIG_PHYS_64BIT | ||
| 187 | mfspr r23,SPRN_MAS7 | ||
| 188 | #endif | ||
| 189 | and r8,r6,r8 | ||
| 190 | subfic r9,r6,-4096 | ||
| 191 | and r9,r9,r7 | ||
| 192 | |||
| 193 | or r25,r8,r9 | ||
| 194 | ori r8,r25,(MAS3_SX|MAS3_SW|MAS3_SR) | ||
| 195 | |||
| 196 | /* Just modify the entry ID and EPN for the temp mapping */ | ||
| 197 | lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */ | ||
| 198 | rlwimi r7,r5,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r5) */ | ||
| 199 | mtspr SPRN_MAS0,r7 | ||
| 200 | xori r6,r4,1 /* Setup TMP mapping in the other Address space */ | ||
| 201 | slwi r6,r6,12 | ||
| 202 | oris r6,r6,(MAS1_VALID|MAS1_IPROT)@h | ||
| 203 | ori r6,r6,(MAS1_TSIZE(BOOK3E_PAGESZ_4K))@l | ||
| 204 | mtspr SPRN_MAS1,r6 | ||
| 205 | mfspr r6,SPRN_MAS2 | ||
| 206 | li r7,0 /* temp EPN = 0 */ | ||
| 207 | rlwimi r7,r6,0,20,31 | ||
| 208 | mtspr SPRN_MAS2,r7 | ||
| 209 | mtspr SPRN_MAS3,r8 | ||
| 210 | tlbwe | ||
| 211 | |||
| 212 | xori r6,r4,1 | ||
| 213 | slwi r6,r6,5 /* setup new context with other address space */ | ||
| 214 | bl 1f /* Find our address */ | ||
| 215 | 1: mflr r9 | ||
| 216 | rlwimi r7,r9,0,20,31 | ||
| 217 | addi r7,r7,(2f - 1b) | ||
| 218 | mtspr SPRN_SRR0,r7 | ||
| 219 | mtspr SPRN_SRR1,r6 | ||
| 220 | rfi | ||
| 221 | 2: | ||
| 222 | /* 4. Clear out PIDs & Search info */ | ||
| 223 | li r6,0 | ||
| 224 | mtspr SPRN_MAS6,r6 | ||
| 225 | mtspr SPRN_PID0,r6 | ||
| 226 | |||
| 227 | mfspr r7,SPRN_MMUCFG | ||
| 228 | rlwinm r7,r7,21,28,31 /* extract MMUCFG[NPIDS] */ | ||
| 229 | cmpwi r7,3 | ||
| 230 | bne 2f /* skip if NPIDS != 3 */ | ||
| 231 | 97 | ||
| 232 | mtspr SPRN_PID1,r6 | 98 | #define ENTRY_MAPPING_BOOT_SETUP |
| 233 | mtspr SPRN_PID2,r6 | 99 | #include "fsl_booke_entry_mapping.S" |
| 234 | 100 | #undef ENTRY_MAPPING_BOOT_SETUP | |
| 235 | /* 5. Invalidate mapping we started in */ | ||
| 236 | 2: | ||
| 237 | lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */ | ||
| 238 | rlwimi r7,r3,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r3) */ | ||
| 239 | mtspr SPRN_MAS0,r7 | ||
| 240 | tlbre | ||
| 241 | mfspr r6,SPRN_MAS1 | ||
| 242 | rlwinm r6,r6,0,2,0 /* clear IPROT */ | ||
| 243 | mtspr SPRN_MAS1,r6 | ||
| 244 | tlbwe | ||
| 245 | /* Invalidate TLB1 */ | ||
| 246 | li r9,0x0c | ||
| 247 | tlbivax 0,r9 | ||
| 248 | TLBSYNC | ||
| 249 | |||
| 250 | /* The mapping only needs to be cache-coherent on SMP */ | ||
| 251 | #ifdef CONFIG_SMP | ||
| 252 | #define M_IF_SMP MAS2_M | ||
| 253 | #else | ||
| 254 | #define M_IF_SMP 0 | ||
| 255 | #endif | ||
| 256 | |||
| 257 | /* 6. Setup KERNELBASE mapping in TLB1[0] */ | ||
| 258 | lis r6,0x1000 /* Set MAS0(TLBSEL) = TLB1(1), ESEL = 0 */ | ||
| 259 | mtspr SPRN_MAS0,r6 | ||
| 260 | lis r6,(MAS1_VALID|MAS1_IPROT)@h | ||
| 261 | ori r6,r6,(MAS1_TSIZE(BOOK3E_PAGESZ_64M))@l | ||
| 262 | mtspr SPRN_MAS1,r6 | ||
| 263 | lis r6,MAS2_VAL(PAGE_OFFSET, BOOK3E_PAGESZ_64M, M_IF_SMP)@h | ||
| 264 | ori r6,r6,MAS2_VAL(PAGE_OFFSET, BOOK3E_PAGESZ_64M, M_IF_SMP)@l | ||
| 265 | mtspr SPRN_MAS2,r6 | ||
| 266 | mtspr SPRN_MAS3,r8 | ||
| 267 | tlbwe | ||
| 268 | |||
| 269 | /* 7. Jump to KERNELBASE mapping */ | ||
| 270 | lis r6,(KERNELBASE & ~0xfff)@h | ||
| 271 | ori r6,r6,(KERNELBASE & ~0xfff)@l | ||
| 272 | lis r7,MSR_KERNEL@h | ||
| 273 | ori r7,r7,MSR_KERNEL@l | ||
| 274 | bl 1f /* Find our address */ | ||
| 275 | 1: mflr r9 | ||
| 276 | rlwimi r6,r9,0,20,31 | ||
| 277 | addi r6,r6,(2f - 1b) | ||
| 278 | mtspr SPRN_SRR0,r6 | ||
| 279 | mtspr SPRN_SRR1,r7 | ||
| 280 | rfi /* start execution out of TLB1[0] entry */ | ||
| 281 | |||
| 282 | /* 8. Clear out the temp mapping */ | ||
| 283 | 2: lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */ | ||
| 284 | rlwimi r7,r5,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r5) */ | ||
| 285 | mtspr SPRN_MAS0,r7 | ||
| 286 | tlbre | ||
| 287 | mfspr r8,SPRN_MAS1 | ||
| 288 | rlwinm r8,r8,0,2,0 /* clear IPROT */ | ||
| 289 | mtspr SPRN_MAS1,r8 | ||
| 290 | tlbwe | ||
| 291 | /* Invalidate TLB1 */ | ||
| 292 | li r9,0x0c | ||
| 293 | tlbivax 0,r9 | ||
| 294 | TLBSYNC | ||
| 295 | 101 | ||
| 296 | /* Establish the interrupt vector offsets */ | 102 | /* Establish the interrupt vector offsets */ |
| 297 | SET_IVOR(0, CriticalInput); | 103 | SET_IVOR(0, CriticalInput); |
diff --git a/arch/powerpc/kernel/ibmebus.c b/arch/powerpc/kernel/ibmebus.c index 71cf280da184..21266abfbda6 100644 --- a/arch/powerpc/kernel/ibmebus.c +++ b/arch/powerpc/kernel/ibmebus.c | |||
| @@ -140,14 +140,14 @@ static struct dma_map_ops ibmebus_dma_ops = { | |||
| 140 | 140 | ||
| 141 | static int ibmebus_match_path(struct device *dev, void *data) | 141 | static int ibmebus_match_path(struct device *dev, void *data) |
| 142 | { | 142 | { |
| 143 | struct device_node *dn = to_of_device(dev)->node; | 143 | struct device_node *dn = to_of_device(dev)->dev.of_node; |
| 144 | return (dn->full_name && | 144 | return (dn->full_name && |
| 145 | (strcasecmp((char *)data, dn->full_name) == 0)); | 145 | (strcasecmp((char *)data, dn->full_name) == 0)); |
| 146 | } | 146 | } |
| 147 | 147 | ||
| 148 | static int ibmebus_match_node(struct device *dev, void *data) | 148 | static int ibmebus_match_node(struct device *dev, void *data) |
| 149 | { | 149 | { |
| 150 | return to_of_device(dev)->node == data; | 150 | return to_of_device(dev)->dev.of_node == data; |
| 151 | } | 151 | } |
| 152 | 152 | ||
| 153 | static int ibmebus_create_device(struct device_node *dn) | 153 | static int ibmebus_create_device(struct device_node *dn) |
| @@ -202,7 +202,7 @@ static int ibmebus_create_devices(const struct of_device_id *matches) | |||
| 202 | int ibmebus_register_driver(struct of_platform_driver *drv) | 202 | int ibmebus_register_driver(struct of_platform_driver *drv) |
| 203 | { | 203 | { |
| 204 | /* If the driver uses devices that ibmebus doesn't know, add them */ | 204 | /* If the driver uses devices that ibmebus doesn't know, add them */ |
| 205 | ibmebus_create_devices(drv->match_table); | 205 | ibmebus_create_devices(drv->driver.of_match_table); |
| 206 | 206 | ||
| 207 | return of_register_driver(drv, &ibmebus_bus_type); | 207 | return of_register_driver(drv, &ibmebus_bus_type); |
| 208 | } | 208 | } |
diff --git a/arch/powerpc/kernel/kprobes.c b/arch/powerpc/kernel/kprobes.c index c533525ca56a..bc47352deb1f 100644 --- a/arch/powerpc/kernel/kprobes.c +++ b/arch/powerpc/kernel/kprobes.c | |||
| @@ -378,17 +378,6 @@ static int __kprobes trampoline_probe_handler(struct kprobe *p, | |||
| 378 | * single-stepped a copy of the instruction. The address of this | 378 | * single-stepped a copy of the instruction. The address of this |
| 379 | * copy is p->ainsn.insn. | 379 | * copy is p->ainsn.insn. |
| 380 | */ | 380 | */ |
| 381 | static void __kprobes resume_execution(struct kprobe *p, struct pt_regs *regs) | ||
| 382 | { | ||
| 383 | int ret; | ||
| 384 | unsigned int insn = *p->ainsn.insn; | ||
| 385 | |||
| 386 | regs->nip = (unsigned long)p->addr; | ||
| 387 | ret = emulate_step(regs, insn); | ||
| 388 | if (ret == 0) | ||
| 389 | regs->nip = (unsigned long)p->addr + 4; | ||
| 390 | } | ||
| 391 | |||
| 392 | static int __kprobes post_kprobe_handler(struct pt_regs *regs) | 381 | static int __kprobes post_kprobe_handler(struct pt_regs *regs) |
| 393 | { | 382 | { |
| 394 | struct kprobe *cur = kprobe_running(); | 383 | struct kprobe *cur = kprobe_running(); |
| @@ -406,7 +395,8 @@ static int __kprobes post_kprobe_handler(struct pt_regs *regs) | |||
| 406 | cur->post_handler(cur, regs, 0); | 395 | cur->post_handler(cur, regs, 0); |
| 407 | } | 396 | } |
| 408 | 397 | ||
| 409 | resume_execution(cur, regs); | 398 | /* Adjust nip to after the single-stepped instruction */ |
| 399 | regs->nip = (unsigned long)cur->addr + 4; | ||
| 410 | regs->msr |= kcb->kprobe_saved_msr; | 400 | regs->msr |= kcb->kprobe_saved_msr; |
| 411 | 401 | ||
| 412 | /*Restore back the original saved kprobes variables and continue. */ | 402 | /*Restore back the original saved kprobes variables and continue. */ |
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S index 8043d1b73cf0..dc66d52dcff5 100644 --- a/arch/powerpc/kernel/misc_32.S +++ b/arch/powerpc/kernel/misc_32.S | |||
| @@ -711,6 +711,22 @@ relocate_new_kernel: | |||
| 711 | /* r4 = reboot_code_buffer */ | 711 | /* r4 = reboot_code_buffer */ |
| 712 | /* r5 = start_address */ | 712 | /* r5 = start_address */ |
| 713 | 713 | ||
| 714 | #ifdef CONFIG_FSL_BOOKE | ||
| 715 | |||
| 716 | mr r29, r3 | ||
| 717 | mr r30, r4 | ||
| 718 | mr r31, r5 | ||
| 719 | |||
| 720 | #define ENTRY_MAPPING_KEXEC_SETUP | ||
| 721 | #include "fsl_booke_entry_mapping.S" | ||
| 722 | #undef ENTRY_MAPPING_KEXEC_SETUP | ||
| 723 | |||
| 724 | mr r3, r29 | ||
| 725 | mr r4, r30 | ||
| 726 | mr r5, r31 | ||
| 727 | |||
| 728 | li r0, 0 | ||
| 729 | #else | ||
| 714 | li r0, 0 | 730 | li r0, 0 |
| 715 | 731 | ||
| 716 | /* | 732 | /* |
| @@ -727,6 +743,7 @@ relocate_new_kernel: | |||
| 727 | rfi | 743 | rfi |
| 728 | 744 | ||
| 729 | 1: | 745 | 1: |
| 746 | #endif | ||
| 730 | /* from this point address translation is turned off */ | 747 | /* from this point address translation is turned off */ |
| 731 | /* and interrupts are disabled */ | 748 | /* and interrupts are disabled */ |
| 732 | 749 | ||
diff --git a/arch/powerpc/kernel/of_device.c b/arch/powerpc/kernel/of_device.c index a359cb08e900..df78e0236a02 100644 --- a/arch/powerpc/kernel/of_device.c +++ b/arch/powerpc/kernel/of_device.c | |||
| @@ -13,7 +13,7 @@ | |||
| 13 | static void of_device_make_bus_id(struct of_device *dev) | 13 | static void of_device_make_bus_id(struct of_device *dev) |
| 14 | { | 14 | { |
| 15 | static atomic_t bus_no_reg_magic; | 15 | static atomic_t bus_no_reg_magic; |
| 16 | struct device_node *node = dev->node; | 16 | struct device_node *node = dev->dev.of_node; |
| 17 | const u32 *reg; | 17 | const u32 *reg; |
| 18 | u64 addr; | 18 | u64 addr; |
| 19 | int magic; | 19 | int magic; |
| @@ -69,11 +69,10 @@ struct of_device *of_device_alloc(struct device_node *np, | |||
| 69 | if (!dev) | 69 | if (!dev) |
| 70 | return NULL; | 70 | return NULL; |
| 71 | 71 | ||
| 72 | dev->node = of_node_get(np); | 72 | dev->dev.of_node = of_node_get(np); |
| 73 | dev->dev.dma_mask = &dev->dma_mask; | 73 | dev->dev.dma_mask = &dev->archdata.dma_mask; |
| 74 | dev->dev.parent = parent; | 74 | dev->dev.parent = parent; |
| 75 | dev->dev.release = of_release_dev; | 75 | dev->dev.release = of_release_dev; |
| 76 | dev->dev.archdata.of_node = np; | ||
| 77 | 76 | ||
| 78 | if (bus_id) | 77 | if (bus_id) |
| 79 | dev_set_name(&dev->dev, "%s", bus_id); | 78 | dev_set_name(&dev->dev, "%s", bus_id); |
| @@ -95,17 +94,17 @@ int of_device_uevent(struct device *dev, struct kobj_uevent_env *env) | |||
| 95 | 94 | ||
| 96 | ofdev = to_of_device(dev); | 95 | ofdev = to_of_device(dev); |
| 97 | 96 | ||
| 98 | if (add_uevent_var(env, "OF_NAME=%s", ofdev->node->name)) | 97 | if (add_uevent_var(env, "OF_NAME=%s", ofdev->dev.of_node->name)) |
| 99 | return -ENOMEM; | 98 | return -ENOMEM; |
| 100 | 99 | ||
| 101 | if (add_uevent_var(env, "OF_TYPE=%s", ofdev->node->type)) | 100 | if (add_uevent_var(env, "OF_TYPE=%s", ofdev->dev.of_node->type)) |
| 102 | return -ENOMEM; | 101 | return -ENOMEM; |
| 103 | 102 | ||
| 104 | /* Since the compatible field can contain pretty much anything | 103 | /* Since the compatible field can contain pretty much anything |
| 105 | * it's not really legal to split it out with commas. We split it | 104 | * it's not really legal to split it out with commas. We split it |
| 106 | * up using a number of environment variables instead. */ | 105 | * up using a number of environment variables instead. */ |
| 107 | 106 | ||
| 108 | compat = of_get_property(ofdev->node, "compatible", &cplen); | 107 | compat = of_get_property(ofdev->dev.of_node, "compatible", &cplen); |
| 109 | while (compat && *compat && cplen > 0) { | 108 | while (compat && *compat && cplen > 0) { |
| 110 | if (add_uevent_var(env, "OF_COMPATIBLE_%d=%s", seen, compat)) | 109 | if (add_uevent_var(env, "OF_COMPATIBLE_%d=%s", seen, compat)) |
| 111 | return -ENOMEM; | 110 | return -ENOMEM; |
diff --git a/arch/powerpc/kernel/of_platform.c b/arch/powerpc/kernel/of_platform.c index 6c1dfc3ff8bc..487a98851ba6 100644 --- a/arch/powerpc/kernel/of_platform.c +++ b/arch/powerpc/kernel/of_platform.c | |||
| @@ -74,7 +74,7 @@ struct of_device* of_platform_device_create(struct device_node *np, | |||
| 74 | if (!dev) | 74 | if (!dev) |
| 75 | return NULL; | 75 | return NULL; |
| 76 | 76 | ||
| 77 | dev->dma_mask = 0xffffffffUL; | 77 | dev->archdata.dma_mask = 0xffffffffUL; |
| 78 | dev->dev.coherent_dma_mask = DMA_BIT_MASK(32); | 78 | dev->dev.coherent_dma_mask = DMA_BIT_MASK(32); |
| 79 | 79 | ||
| 80 | dev->dev.bus = &of_platform_bus_type; | 80 | dev->dev.bus = &of_platform_bus_type; |
| @@ -195,7 +195,7 @@ EXPORT_SYMBOL(of_platform_bus_probe); | |||
| 195 | 195 | ||
| 196 | static int of_dev_node_match(struct device *dev, void *data) | 196 | static int of_dev_node_match(struct device *dev, void *data) |
| 197 | { | 197 | { |
| 198 | return to_of_device(dev)->node == data; | 198 | return to_of_device(dev)->dev.of_node == data; |
| 199 | } | 199 | } |
| 200 | 200 | ||
| 201 | struct of_device *of_find_device_by_node(struct device_node *np) | 201 | struct of_device *of_find_device_by_node(struct device_node *np) |
| @@ -213,7 +213,7 @@ EXPORT_SYMBOL(of_find_device_by_node); | |||
| 213 | static int of_dev_phandle_match(struct device *dev, void *data) | 213 | static int of_dev_phandle_match(struct device *dev, void *data) |
| 214 | { | 214 | { |
| 215 | phandle *ph = data; | 215 | phandle *ph = data; |
| 216 | return to_of_device(dev)->node->phandle == *ph; | 216 | return to_of_device(dev)->dev.of_node->phandle == *ph; |
| 217 | } | 217 | } |
| 218 | 218 | ||
| 219 | struct of_device *of_find_device_by_phandle(phandle ph) | 219 | struct of_device *of_find_device_by_phandle(phandle ph) |
| @@ -246,10 +246,10 @@ static int __devinit of_pci_phb_probe(struct of_device *dev, | |||
| 246 | if (ppc_md.pci_setup_phb == NULL) | 246 | if (ppc_md.pci_setup_phb == NULL) |
| 247 | return -ENODEV; | 247 | return -ENODEV; |
| 248 | 248 | ||
| 249 | printk(KERN_INFO "Setting up PCI bus %s\n", dev->node->full_name); | 249 | pr_info("Setting up PCI bus %s\n", dev->dev.of_node->full_name); |
| 250 | 250 | ||
| 251 | /* Alloc and setup PHB data structure */ | 251 | /* Alloc and setup PHB data structure */ |
| 252 | phb = pcibios_alloc_controller(dev->node); | 252 | phb = pcibios_alloc_controller(dev->dev.of_node); |
| 253 | if (!phb) | 253 | if (!phb) |
| 254 | return -ENODEV; | 254 | return -ENODEV; |
| 255 | 255 | ||
| @@ -263,19 +263,19 @@ static int __devinit of_pci_phb_probe(struct of_device *dev, | |||
| 263 | } | 263 | } |
| 264 | 264 | ||
| 265 | /* Process "ranges" property */ | 265 | /* Process "ranges" property */ |
| 266 | pci_process_bridge_OF_ranges(phb, dev->node, 0); | 266 | pci_process_bridge_OF_ranges(phb, dev->dev.of_node, 0); |
| 267 | 267 | ||
| 268 | /* Init pci_dn data structures */ | 268 | /* Init pci_dn data structures */ |
| 269 | pci_devs_phb_init_dynamic(phb); | 269 | pci_devs_phb_init_dynamic(phb); |
| 270 | 270 | ||
| 271 | /* Register devices with EEH */ | 271 | /* Register devices with EEH */ |
| 272 | #ifdef CONFIG_EEH | 272 | #ifdef CONFIG_EEH |
| 273 | if (dev->node->child) | 273 | if (dev->dev.of_node->child) |
| 274 | eeh_add_device_tree_early(dev->node); | 274 | eeh_add_device_tree_early(dev->dev.of_node); |
| 275 | #endif /* CONFIG_EEH */ | 275 | #endif /* CONFIG_EEH */ |
| 276 | 276 | ||
| 277 | /* Scan the bus */ | 277 | /* Scan the bus */ |
| 278 | pcibios_scan_phb(phb, dev->node); | 278 | pcibios_scan_phb(phb, dev->dev.of_node); |
| 279 | if (phb->bus == NULL) | 279 | if (phb->bus == NULL) |
| 280 | return -ENXIO; | 280 | return -ENXIO; |
| 281 | 281 | ||
| @@ -306,10 +306,11 @@ static struct of_device_id of_pci_phb_ids[] = { | |||
| 306 | }; | 306 | }; |
| 307 | 307 | ||
| 308 | static struct of_platform_driver of_pci_phb_driver = { | 308 | static struct of_platform_driver of_pci_phb_driver = { |
| 309 | .match_table = of_pci_phb_ids, | ||
| 310 | .probe = of_pci_phb_probe, | 309 | .probe = of_pci_phb_probe, |
| 311 | .driver = { | 310 | .driver = { |
| 312 | .name = "of-pci", | 311 | .name = "of-pci", |
| 312 | .owner = THIS_MODULE, | ||
| 313 | .of_match_table = of_pci_phb_ids, | ||
| 313 | }, | 314 | }, |
| 314 | }; | 315 | }; |
| 315 | 316 | ||
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c index 0c0567e58409..5b38f6ae2b29 100644 --- a/arch/powerpc/kernel/pci-common.c +++ b/arch/powerpc/kernel/pci-common.c | |||
| @@ -1097,8 +1097,8 @@ void __devinit pcibios_setup_bus_devices(struct pci_bus *bus) | |||
| 1097 | if (dev->is_added) | 1097 | if (dev->is_added) |
| 1098 | continue; | 1098 | continue; |
| 1099 | 1099 | ||
| 1100 | /* Setup OF node pointer in archdata */ | 1100 | /* Setup OF node pointer in the device */ |
| 1101 | sd->of_node = pci_device_to_OF_node(dev); | 1101 | dev->dev.of_node = pci_device_to_OF_node(dev); |
| 1102 | 1102 | ||
| 1103 | /* Fixup NUMA node as it may not be setup yet by the generic | 1103 | /* Fixup NUMA node as it may not be setup yet by the generic |
| 1104 | * code and is needed by the DMA init | 1104 | * code and is needed by the DMA init |
| @@ -1309,6 +1309,7 @@ void pcibios_allocate_bus_resources(struct pci_bus *bus) | |||
| 1309 | printk(KERN_WARNING "PCI: Cannot allocate resource region " | 1309 | printk(KERN_WARNING "PCI: Cannot allocate resource region " |
| 1310 | "%d of PCI bridge %d, will remap\n", i, bus->number); | 1310 | "%d of PCI bridge %d, will remap\n", i, bus->number); |
| 1311 | clear_resource: | 1311 | clear_resource: |
| 1312 | res->start = res->end = 0; | ||
| 1312 | res->flags = 0; | 1313 | res->flags = 0; |
| 1313 | } | 1314 | } |
| 1314 | 1315 | ||
diff --git a/arch/powerpc/kernel/ppc_ksyms.c b/arch/powerpc/kernel/ppc_ksyms.c index ab3e392ac63c..3b4dcc82a4c1 100644 --- a/arch/powerpc/kernel/ppc_ksyms.c +++ b/arch/powerpc/kernel/ppc_ksyms.c | |||
| @@ -101,6 +101,10 @@ EXPORT_SYMBOL(pci_dram_offset); | |||
| 101 | EXPORT_SYMBOL(start_thread); | 101 | EXPORT_SYMBOL(start_thread); |
| 102 | EXPORT_SYMBOL(kernel_thread); | 102 | EXPORT_SYMBOL(kernel_thread); |
| 103 | 103 | ||
| 104 | #ifdef CONFIG_PPC_FPU | ||
| 105 | EXPORT_SYMBOL_GPL(cvt_df); | ||
| 106 | EXPORT_SYMBOL_GPL(cvt_fd); | ||
| 107 | #endif | ||
| 104 | EXPORT_SYMBOL(giveup_fpu); | 108 | EXPORT_SYMBOL(giveup_fpu); |
| 105 | #ifdef CONFIG_ALTIVEC | 109 | #ifdef CONFIG_ALTIVEC |
| 106 | EXPORT_SYMBOL(giveup_altivec); | 110 | EXPORT_SYMBOL(giveup_altivec); |
diff --git a/arch/powerpc/kernel/swsusp_booke.S b/arch/powerpc/kernel/swsusp_booke.S new file mode 100644 index 000000000000..11a39307dd71 --- /dev/null +++ b/arch/powerpc/kernel/swsusp_booke.S | |||
| @@ -0,0 +1,193 @@ | |||
| 1 | /* | ||
| 2 | * Based on swsusp_32.S, modified for FSL BookE by | ||
| 3 | * Anton Vorontsov <avorontsov@ru.mvista.com> | ||
| 4 | * Copyright (c) 2009-2010 MontaVista Software, LLC. | ||
| 5 | */ | ||
| 6 | |||
| 7 | #include <linux/threads.h> | ||
| 8 | #include <asm/processor.h> | ||
| 9 | #include <asm/page.h> | ||
| 10 | #include <asm/cputable.h> | ||
| 11 | #include <asm/thread_info.h> | ||
| 12 | #include <asm/ppc_asm.h> | ||
| 13 | #include <asm/asm-offsets.h> | ||
| 14 | #include <asm/mmu.h> | ||
| 15 | |||
| 16 | /* | ||
| 17 | * Structure for storing CPU registers on the save area. | ||
| 18 | */ | ||
| 19 | #define SL_SP 0 | ||
| 20 | #define SL_PC 4 | ||
| 21 | #define SL_MSR 8 | ||
| 22 | #define SL_TCR 0xc | ||
| 23 | #define SL_SPRG0 0x10 | ||
| 24 | #define SL_SPRG1 0x14 | ||
| 25 | #define SL_SPRG2 0x18 | ||
| 26 | #define SL_SPRG3 0x1c | ||
| 27 | #define SL_SPRG4 0x20 | ||
| 28 | #define SL_SPRG5 0x24 | ||
| 29 | #define SL_SPRG6 0x28 | ||
| 30 | #define SL_SPRG7 0x2c | ||
| 31 | #define SL_TBU 0x30 | ||
| 32 | #define SL_TBL 0x34 | ||
| 33 | #define SL_R2 0x38 | ||
| 34 | #define SL_CR 0x3c | ||
| 35 | #define SL_LR 0x40 | ||
| 36 | #define SL_R12 0x44 /* r12 to r31 */ | ||
| 37 | #define SL_SIZE (SL_R12 + 80) | ||
| 38 | |||
| 39 | .section .data | ||
| 40 | .align 5 | ||
| 41 | |||
| 42 | _GLOBAL(swsusp_save_area) | ||
| 43 | .space SL_SIZE | ||
| 44 | |||
| 45 | |||
| 46 | .section .text | ||
| 47 | .align 5 | ||
| 48 | |||
| 49 | _GLOBAL(swsusp_arch_suspend) | ||
| 50 | lis r11,swsusp_save_area@h | ||
| 51 | ori r11,r11,swsusp_save_area@l | ||
| 52 | |||
| 53 | mflr r0 | ||
| 54 | stw r0,SL_LR(r11) | ||
| 55 | mfcr r0 | ||
| 56 | stw r0,SL_CR(r11) | ||
| 57 | stw r1,SL_SP(r11) | ||
| 58 | stw r2,SL_R2(r11) | ||
| 59 | stmw r12,SL_R12(r11) | ||
| 60 | |||
| 61 | /* Save MSR & TCR */ | ||
| 62 | mfmsr r4 | ||
| 63 | stw r4,SL_MSR(r11) | ||
| 64 | mfspr r4,SPRN_TCR | ||
| 65 | stw r4,SL_TCR(r11) | ||
| 66 | |||
| 67 | /* Get a stable timebase and save it */ | ||
| 68 | 1: mfspr r4,SPRN_TBRU | ||
| 69 | stw r4,SL_TBU(r11) | ||
| 70 | mfspr r5,SPRN_TBRL | ||
| 71 | stw r5,SL_TBL(r11) | ||
| 72 | mfspr r3,SPRN_TBRU | ||
| 73 | cmpw r3,r4 | ||
| 74 | bne 1b | ||
| 75 | |||
| 76 | /* Save SPRGs */ | ||
| 77 | mfsprg r4,0 | ||
| 78 | stw r4,SL_SPRG0(r11) | ||
| 79 | mfsprg r4,1 | ||
| 80 | stw r4,SL_SPRG1(r11) | ||
| 81 | mfsprg r4,2 | ||
| 82 | stw r4,SL_SPRG2(r11) | ||
| 83 | mfsprg r4,3 | ||
| 84 | stw r4,SL_SPRG3(r11) | ||
| 85 | mfsprg r4,4 | ||
| 86 | stw r4,SL_SPRG4(r11) | ||
| 87 | mfsprg r4,5 | ||
| 88 | stw r4,SL_SPRG5(r11) | ||
| 89 | mfsprg r4,6 | ||
| 90 | stw r4,SL_SPRG6(r11) | ||
| 91 | mfsprg r4,7 | ||
| 92 | stw r4,SL_SPRG7(r11) | ||
| 93 | |||
| 94 | /* Call the low level suspend stuff (we should probably have made | ||
| 95 | * a stackframe... | ||
| 96 | */ | ||
| 97 | bl swsusp_save | ||
| 98 | |||
| 99 | /* Restore LR from the save area */ | ||
| 100 | lis r11,swsusp_save_area@h | ||
| 101 | ori r11,r11,swsusp_save_area@l | ||
| 102 | lwz r0,SL_LR(r11) | ||
| 103 | mtlr r0 | ||
| 104 | |||
| 105 | blr | ||
| 106 | |||
| 107 | _GLOBAL(swsusp_arch_resume) | ||
| 108 | sync | ||
| 109 | |||
| 110 | /* Load ptr the list of pages to copy in r3 */ | ||
| 111 | lis r11,(restore_pblist)@h | ||
| 112 | ori r11,r11,restore_pblist@l | ||
| 113 | lwz r3,0(r11) | ||
| 114 | |||
| 115 | /* Copy the pages. This is a very basic implementation, to | ||
| 116 | * be replaced by something more cache efficient */ | ||
| 117 | 1: | ||
| 118 | li r0,256 | ||
| 119 | mtctr r0 | ||
| 120 | lwz r5,pbe_address(r3) /* source */ | ||
| 121 | lwz r6,pbe_orig_address(r3) /* destination */ | ||
| 122 | 2: | ||
| 123 | lwz r8,0(r5) | ||
| 124 | lwz r9,4(r5) | ||
| 125 | lwz r10,8(r5) | ||
| 126 | lwz r11,12(r5) | ||
| 127 | addi r5,r5,16 | ||
| 128 | stw r8,0(r6) | ||
| 129 | stw r9,4(r6) | ||
| 130 | stw r10,8(r6) | ||
| 131 | stw r11,12(r6) | ||
| 132 | addi r6,r6,16 | ||
| 133 | bdnz 2b | ||
| 134 | lwz r3,pbe_next(r3) | ||
| 135 | cmpwi 0,r3,0 | ||
| 136 | bne 1b | ||
| 137 | |||
| 138 | bl flush_dcache_L1 | ||
| 139 | bl flush_instruction_cache | ||
| 140 | |||
| 141 | lis r11,swsusp_save_area@h | ||
| 142 | ori r11,r11,swsusp_save_area@l | ||
| 143 | |||
| 144 | lwz r4,SL_SPRG0(r11) | ||
| 145 | mtsprg 0,r4 | ||
| 146 | lwz r4,SL_SPRG1(r11) | ||
| 147 | mtsprg 1,r4 | ||
| 148 | lwz r4,SL_SPRG2(r11) | ||
| 149 | mtsprg 2,r4 | ||
| 150 | lwz r4,SL_SPRG3(r11) | ||
| 151 | mtsprg 3,r4 | ||
| 152 | lwz r4,SL_SPRG4(r11) | ||
| 153 | mtsprg 4,r4 | ||
| 154 | lwz r4,SL_SPRG5(r11) | ||
| 155 | mtsprg 5,r4 | ||
| 156 | lwz r4,SL_SPRG6(r11) | ||
| 157 | mtsprg 6,r4 | ||
| 158 | lwz r4,SL_SPRG7(r11) | ||
| 159 | mtsprg 7,r4 | ||
| 160 | |||
| 161 | /* restore the MSR */ | ||
| 162 | lwz r3,SL_MSR(r11) | ||
| 163 | mtmsr r3 | ||
| 164 | |||
| 165 | /* Restore TB */ | ||
| 166 | li r3,0 | ||
| 167 | mtspr SPRN_TBWL,r3 | ||
| 168 | lwz r3,SL_TBU(r11) | ||
| 169 | lwz r4,SL_TBL(r11) | ||
| 170 | mtspr SPRN_TBWU,r3 | ||
| 171 | mtspr SPRN_TBWL,r4 | ||
| 172 | |||
| 173 | /* Restore TCR and clear any pending bits in TSR. */ | ||
| 174 | lwz r4,SL_TCR(r11) | ||
| 175 | mtspr SPRN_TCR,r4 | ||
| 176 | lis r4, (TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS)@h | ||
| 177 | mtspr SPRN_TSR,r4 | ||
| 178 | |||
| 179 | /* Kick decrementer */ | ||
| 180 | li r0,1 | ||
| 181 | mtdec r0 | ||
| 182 | |||
| 183 | /* Restore the callee-saved registers and return */ | ||
| 184 | lwz r0,SL_CR(r11) | ||
| 185 | mtcr r0 | ||
| 186 | lwz r2,SL_R2(r11) | ||
| 187 | lmw r12,SL_R12(r11) | ||
| 188 | lwz r1,SL_SP(r11) | ||
| 189 | lwz r0,SL_LR(r11) | ||
| 190 | mtlr r0 | ||
| 191 | |||
| 192 | li r3,0 | ||
| 193 | blr | ||
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c index 3031fc712ad0..25fc33984c2b 100644 --- a/arch/powerpc/kernel/traps.c +++ b/arch/powerpc/kernel/traps.c | |||
| @@ -1,5 +1,6 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | 2 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) |
| 3 | * Copyright 2007-2010 Freescale Semiconductor, Inc. | ||
| 3 | * | 4 | * |
| 4 | * This program is free software; you can redistribute it and/or | 5 | * This program is free software; you can redistribute it and/or |
| 5 | * modify it under the terms of the GNU General Public License | 6 | * modify it under the terms of the GNU General Public License |
| @@ -305,7 +306,7 @@ static inline int check_io_access(struct pt_regs *regs) | |||
| 305 | #ifndef CONFIG_FSL_BOOKE | 306 | #ifndef CONFIG_FSL_BOOKE |
| 306 | #define get_mc_reason(regs) ((regs)->dsisr) | 307 | #define get_mc_reason(regs) ((regs)->dsisr) |
| 307 | #else | 308 | #else |
| 308 | #define get_mc_reason(regs) (mfspr(SPRN_MCSR) & MCSR_MASK) | 309 | #define get_mc_reason(regs) (mfspr(SPRN_MCSR)) |
| 309 | #endif | 310 | #endif |
| 310 | #define REASON_FP ESR_FP | 311 | #define REASON_FP ESR_FP |
| 311 | #define REASON_ILLEGAL (ESR_PIL | ESR_PUO) | 312 | #define REASON_ILLEGAL (ESR_PIL | ESR_PUO) |
| @@ -421,6 +422,91 @@ int machine_check_47x(struct pt_regs *regs) | |||
| 421 | return 0; | 422 | return 0; |
| 422 | } | 423 | } |
| 423 | #elif defined(CONFIG_E500) | 424 | #elif defined(CONFIG_E500) |
| 425 | int machine_check_e500mc(struct pt_regs *regs) | ||
| 426 | { | ||
| 427 | unsigned long mcsr = mfspr(SPRN_MCSR); | ||
| 428 | unsigned long reason = mcsr; | ||
| 429 | int recoverable = 1; | ||
| 430 | |||
| 431 | printk("Machine check in kernel mode.\n"); | ||
| 432 | printk("Caused by (from MCSR=%lx): ", reason); | ||
| 433 | |||
| 434 | if (reason & MCSR_MCP) | ||
| 435 | printk("Machine Check Signal\n"); | ||
| 436 | |||
| 437 | if (reason & MCSR_ICPERR) { | ||
| 438 | printk("Instruction Cache Parity Error\n"); | ||
| 439 | |||
| 440 | /* | ||
| 441 | * This is recoverable by invalidating the i-cache. | ||
| 442 | */ | ||
| 443 | mtspr(SPRN_L1CSR1, mfspr(SPRN_L1CSR1) | L1CSR1_ICFI); | ||
| 444 | while (mfspr(SPRN_L1CSR1) & L1CSR1_ICFI) | ||
| 445 | ; | ||
| 446 | |||
| 447 | /* | ||
| 448 | * This will generally be accompanied by an instruction | ||
| 449 | * fetch error report -- only treat MCSR_IF as fatal | ||
| 450 | * if it wasn't due to an L1 parity error. | ||
| 451 | */ | ||
| 452 | reason &= ~MCSR_IF; | ||
| 453 | } | ||
| 454 | |||
| 455 | if (reason & MCSR_DCPERR_MC) { | ||
| 456 | printk("Data Cache Parity Error\n"); | ||
| 457 | recoverable = 0; | ||
| 458 | } | ||
| 459 | |||
| 460 | if (reason & MCSR_L2MMU_MHIT) { | ||
| 461 | printk("Hit on multiple TLB entries\n"); | ||
| 462 | recoverable = 0; | ||
| 463 | } | ||
| 464 | |||
| 465 | if (reason & MCSR_NMI) | ||
| 466 | printk("Non-maskable interrupt\n"); | ||
| 467 | |||
| 468 | if (reason & MCSR_IF) { | ||
| 469 | printk("Instruction Fetch Error Report\n"); | ||
| 470 | recoverable = 0; | ||
| 471 | } | ||
| 472 | |||
| 473 | if (reason & MCSR_LD) { | ||
| 474 | printk("Load Error Report\n"); | ||
| 475 | recoverable = 0; | ||
| 476 | } | ||
| 477 | |||
| 478 | if (reason & MCSR_ST) { | ||
| 479 | printk("Store Error Report\n"); | ||
| 480 | recoverable = 0; | ||
| 481 | } | ||
| 482 | |||
| 483 | if (reason & MCSR_LDG) { | ||
| 484 | printk("Guarded Load Error Report\n"); | ||
| 485 | recoverable = 0; | ||
| 486 | } | ||
| 487 | |||
| 488 | if (reason & MCSR_TLBSYNC) | ||
| 489 | printk("Simultaneous tlbsync operations\n"); | ||
| 490 | |||
| 491 | if (reason & MCSR_BSL2_ERR) { | ||
| 492 | printk("Level 2 Cache Error\n"); | ||
| 493 | recoverable = 0; | ||
| 494 | } | ||
| 495 | |||
| 496 | if (reason & MCSR_MAV) { | ||
| 497 | u64 addr; | ||
| 498 | |||
| 499 | addr = mfspr(SPRN_MCAR); | ||
| 500 | addr |= (u64)mfspr(SPRN_MCARU) << 32; | ||
| 501 | |||
| 502 | printk("Machine Check %s Address: %#llx\n", | ||
| 503 | reason & MCSR_MEA ? "Effective" : "Physical", addr); | ||
| 504 | } | ||
| 505 | |||
| 506 | mtspr(SPRN_MCSR, mcsr); | ||
| 507 | return mfspr(SPRN_MCSR) == 0 && recoverable; | ||
| 508 | } | ||
| 509 | |||
| 424 | int machine_check_e500(struct pt_regs *regs) | 510 | int machine_check_e500(struct pt_regs *regs) |
| 425 | { | 511 | { |
| 426 | unsigned long reason = get_mc_reason(regs); | 512 | unsigned long reason = get_mc_reason(regs); |
diff --git a/arch/powerpc/kernel/vio.c b/arch/powerpc/kernel/vio.c index 9ce7b62dc3a4..00b9436f7652 100644 --- a/arch/powerpc/kernel/vio.c +++ b/arch/powerpc/kernel/vio.c | |||
| @@ -707,7 +707,7 @@ static int vio_cmo_bus_probe(struct vio_dev *viodev) | |||
| 707 | * Check to see that device has a DMA window and configure | 707 | * Check to see that device has a DMA window and configure |
| 708 | * entitlement for the device. | 708 | * entitlement for the device. |
| 709 | */ | 709 | */ |
| 710 | if (of_get_property(viodev->dev.archdata.of_node, | 710 | if (of_get_property(viodev->dev.of_node, |
| 711 | "ibm,my-dma-window", NULL)) { | 711 | "ibm,my-dma-window", NULL)) { |
| 712 | /* Check that the driver is CMO enabled and get desired DMA */ | 712 | /* Check that the driver is CMO enabled and get desired DMA */ |
| 713 | if (!viodrv->get_desired_dma) { | 713 | if (!viodrv->get_desired_dma) { |
| @@ -1054,7 +1054,7 @@ static struct iommu_table *vio_build_iommu_table(struct vio_dev *dev) | |||
| 1054 | if (firmware_has_feature(FW_FEATURE_ISERIES)) | 1054 | if (firmware_has_feature(FW_FEATURE_ISERIES)) |
| 1055 | return vio_build_iommu_table_iseries(dev); | 1055 | return vio_build_iommu_table_iseries(dev); |
| 1056 | 1056 | ||
| 1057 | dma_window = of_get_property(dev->dev.archdata.of_node, | 1057 | dma_window = of_get_property(dev->dev.of_node, |
| 1058 | "ibm,my-dma-window", NULL); | 1058 | "ibm,my-dma-window", NULL); |
| 1059 | if (!dma_window) | 1059 | if (!dma_window) |
| 1060 | return NULL; | 1060 | return NULL; |
| @@ -1063,7 +1063,7 @@ static struct iommu_table *vio_build_iommu_table(struct vio_dev *dev) | |||
| 1063 | if (tbl == NULL) | 1063 | if (tbl == NULL) |
| 1064 | return NULL; | 1064 | return NULL; |
| 1065 | 1065 | ||
| 1066 | of_parse_dma_window(dev->dev.archdata.of_node, dma_window, | 1066 | of_parse_dma_window(dev->dev.of_node, dma_window, |
| 1067 | &tbl->it_index, &offset, &size); | 1067 | &tbl->it_index, &offset, &size); |
| 1068 | 1068 | ||
| 1069 | /* TCE table size - measured in tce entries */ | 1069 | /* TCE table size - measured in tce entries */ |
| @@ -1091,7 +1091,7 @@ static const struct vio_device_id *vio_match_device( | |||
| 1091 | { | 1091 | { |
| 1092 | while (ids->type[0] != '\0') { | 1092 | while (ids->type[0] != '\0') { |
| 1093 | if ((strncmp(dev->type, ids->type, strlen(ids->type)) == 0) && | 1093 | if ((strncmp(dev->type, ids->type, strlen(ids->type)) == 0) && |
| 1094 | of_device_is_compatible(dev->dev.archdata.of_node, | 1094 | of_device_is_compatible(dev->dev.of_node, |
| 1095 | ids->compat)) | 1095 | ids->compat)) |
| 1096 | return ids; | 1096 | return ids; |
| 1097 | ids++; | 1097 | ids++; |
| @@ -1184,7 +1184,7 @@ EXPORT_SYMBOL(vio_unregister_driver); | |||
| 1184 | static void __devinit vio_dev_release(struct device *dev) | 1184 | static void __devinit vio_dev_release(struct device *dev) |
| 1185 | { | 1185 | { |
| 1186 | /* XXX should free TCE table */ | 1186 | /* XXX should free TCE table */ |
| 1187 | of_node_put(dev->archdata.of_node); | 1187 | of_node_put(dev->of_node); |
| 1188 | kfree(to_vio_dev(dev)); | 1188 | kfree(to_vio_dev(dev)); |
| 1189 | } | 1189 | } |
| 1190 | 1190 | ||
| @@ -1235,7 +1235,7 @@ struct vio_dev *vio_register_device_node(struct device_node *of_node) | |||
| 1235 | if (unit_address != NULL) | 1235 | if (unit_address != NULL) |
| 1236 | viodev->unit_address = *unit_address; | 1236 | viodev->unit_address = *unit_address; |
| 1237 | } | 1237 | } |
| 1238 | viodev->dev.archdata.of_node = of_node_get(of_node); | 1238 | viodev->dev.of_node = of_node_get(of_node); |
| 1239 | 1239 | ||
| 1240 | if (firmware_has_feature(FW_FEATURE_CMO)) | 1240 | if (firmware_has_feature(FW_FEATURE_CMO)) |
| 1241 | vio_cmo_set_dma_ops(viodev); | 1241 | vio_cmo_set_dma_ops(viodev); |
| @@ -1320,7 +1320,7 @@ static ssize_t name_show(struct device *dev, | |||
| 1320 | static ssize_t devspec_show(struct device *dev, | 1320 | static ssize_t devspec_show(struct device *dev, |
| 1321 | struct device_attribute *attr, char *buf) | 1321 | struct device_attribute *attr, char *buf) |
| 1322 | { | 1322 | { |
| 1323 | struct device_node *of_node = dev->archdata.of_node; | 1323 | struct device_node *of_node = dev->of_node; |
| 1324 | 1324 | ||
| 1325 | return sprintf(buf, "%s\n", of_node ? of_node->full_name : "none"); | 1325 | return sprintf(buf, "%s\n", of_node ? of_node->full_name : "none"); |
| 1326 | } | 1326 | } |
| @@ -1332,7 +1332,7 @@ static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, | |||
| 1332 | struct device_node *dn; | 1332 | struct device_node *dn; |
| 1333 | const char *cp; | 1333 | const char *cp; |
| 1334 | 1334 | ||
| 1335 | dn = dev->archdata.of_node; | 1335 | dn = dev->of_node; |
| 1336 | if (!dn) | 1336 | if (!dn) |
| 1337 | return -ENODEV; | 1337 | return -ENODEV; |
| 1338 | cp = of_get_property(dn, "compatible", NULL); | 1338 | cp = of_get_property(dn, "compatible", NULL); |
| @@ -1370,7 +1370,7 @@ static int vio_hotplug(struct device *dev, struct kobj_uevent_env *env) | |||
| 1370 | struct device_node *dn; | 1370 | struct device_node *dn; |
| 1371 | const char *cp; | 1371 | const char *cp; |
| 1372 | 1372 | ||
| 1373 | dn = dev->archdata.of_node; | 1373 | dn = dev->of_node; |
| 1374 | if (!dn) | 1374 | if (!dn) |
| 1375 | return -ENODEV; | 1375 | return -ENODEV; |
| 1376 | cp = of_get_property(dn, "compatible", NULL); | 1376 | cp = of_get_property(dn, "compatible", NULL); |
| @@ -1402,7 +1402,7 @@ static struct bus_type vio_bus_type = { | |||
| 1402 | */ | 1402 | */ |
| 1403 | const void *vio_get_attribute(struct vio_dev *vdev, char *which, int *length) | 1403 | const void *vio_get_attribute(struct vio_dev *vdev, char *which, int *length) |
| 1404 | { | 1404 | { |
| 1405 | return of_get_property(vdev->dev.archdata.of_node, which, length); | 1405 | return of_get_property(vdev->dev.of_node, which, length); |
| 1406 | } | 1406 | } |
| 1407 | EXPORT_SYMBOL(vio_get_attribute); | 1407 | EXPORT_SYMBOL(vio_get_attribute); |
| 1408 | 1408 | ||
diff --git a/arch/powerpc/kernel/vmlinux.lds.S b/arch/powerpc/kernel/vmlinux.lds.S index dcd01c82e701..8a0deefac08d 100644 --- a/arch/powerpc/kernel/vmlinux.lds.S +++ b/arch/powerpc/kernel/vmlinux.lds.S | |||
| @@ -223,19 +223,17 @@ SECTIONS | |||
| 223 | #endif | 223 | #endif |
| 224 | 224 | ||
| 225 | /* The initial task and kernel stack */ | 225 | /* The initial task and kernel stack */ |
| 226 | .data.init_task : AT(ADDR(.data.init_task) - LOAD_OFFSET) { | 226 | INIT_TASK_DATA_SECTION(THREAD_SIZE) |
| 227 | INIT_TASK_DATA(THREAD_SIZE) | ||
| 228 | } | ||
| 229 | 227 | ||
| 230 | .data.page_aligned : AT(ADDR(.data.page_aligned) - LOAD_OFFSET) { | 228 | .data..page_aligned : AT(ADDR(.data..page_aligned) - LOAD_OFFSET) { |
| 231 | PAGE_ALIGNED_DATA(PAGE_SIZE) | 229 | PAGE_ALIGNED_DATA(PAGE_SIZE) |
| 232 | } | 230 | } |
| 233 | 231 | ||
| 234 | .data.cacheline_aligned : AT(ADDR(.data.cacheline_aligned) - LOAD_OFFSET) { | 232 | .data..cacheline_aligned : AT(ADDR(.data..cacheline_aligned) - LOAD_OFFSET) { |
| 235 | CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES) | 233 | CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES) |
| 236 | } | 234 | } |
| 237 | 235 | ||
| 238 | .data.read_mostly : AT(ADDR(.data.read_mostly) - LOAD_OFFSET) { | 236 | .data..read_mostly : AT(ADDR(.data..read_mostly) - LOAD_OFFSET) { |
| 239 | READ_MOSTLY_DATA(L1_CACHE_BYTES) | 237 | READ_MOSTLY_DATA(L1_CACHE_BYTES) |
| 240 | } | 238 | } |
| 241 | 239 | ||
diff --git a/arch/powerpc/kvm/44x.c b/arch/powerpc/kvm/44x.c index 689a57c2ac80..73c0a3f64ed1 100644 --- a/arch/powerpc/kvm/44x.c +++ b/arch/powerpc/kvm/44x.c | |||
| @@ -147,7 +147,7 @@ static int __init kvmppc_44x_init(void) | |||
| 147 | if (r) | 147 | if (r) |
| 148 | return r; | 148 | return r; |
| 149 | 149 | ||
| 150 | return kvm_init(NULL, sizeof(struct kvmppc_vcpu_44x), THIS_MODULE); | 150 | return kvm_init(NULL, sizeof(struct kvmppc_vcpu_44x), 0, THIS_MODULE); |
| 151 | } | 151 | } |
| 152 | 152 | ||
| 153 | static void __exit kvmppc_44x_exit(void) | 153 | static void __exit kvmppc_44x_exit(void) |
diff --git a/arch/powerpc/kvm/Kconfig b/arch/powerpc/kvm/Kconfig index 60624cc9f4d4..b7baff78f90c 100644 --- a/arch/powerpc/kvm/Kconfig +++ b/arch/powerpc/kvm/Kconfig | |||
| @@ -22,12 +22,34 @@ config KVM | |||
| 22 | select ANON_INODES | 22 | select ANON_INODES |
| 23 | select KVM_MMIO | 23 | select KVM_MMIO |
| 24 | 24 | ||
| 25 | config KVM_BOOK3S_HANDLER | ||
| 26 | bool | ||
| 27 | |||
| 28 | config KVM_BOOK3S_32_HANDLER | ||
| 29 | bool | ||
| 30 | select KVM_BOOK3S_HANDLER | ||
| 31 | |||
| 25 | config KVM_BOOK3S_64_HANDLER | 32 | config KVM_BOOK3S_64_HANDLER |
| 26 | bool | 33 | bool |
| 34 | select KVM_BOOK3S_HANDLER | ||
| 35 | |||
| 36 | config KVM_BOOK3S_32 | ||
| 37 | tristate "KVM support for PowerPC book3s_32 processors" | ||
| 38 | depends on EXPERIMENTAL && PPC_BOOK3S_32 && !SMP && !PTE_64BIT | ||
| 39 | select KVM | ||
| 40 | select KVM_BOOK3S_32_HANDLER | ||
| 41 | ---help--- | ||
| 42 | Support running unmodified book3s_32 guest kernels | ||
| 43 | in virtual machines on book3s_32 host processors. | ||
| 44 | |||
| 45 | This module provides access to the hardware capabilities through | ||
| 46 | a character device node named /dev/kvm. | ||
| 47 | |||
| 48 | If unsure, say N. | ||
| 27 | 49 | ||
| 28 | config KVM_BOOK3S_64 | 50 | config KVM_BOOK3S_64 |
| 29 | tristate "KVM support for PowerPC book3s_64 processors" | 51 | tristate "KVM support for PowerPC book3s_64 processors" |
| 30 | depends on EXPERIMENTAL && PPC64 | 52 | depends on EXPERIMENTAL && PPC_BOOK3S_64 |
| 31 | select KVM | 53 | select KVM |
| 32 | select KVM_BOOK3S_64_HANDLER | 54 | select KVM_BOOK3S_64_HANDLER |
| 33 | ---help--- | 55 | ---help--- |
diff --git a/arch/powerpc/kvm/Makefile b/arch/powerpc/kvm/Makefile index 56484d652377..ff436066bf77 100644 --- a/arch/powerpc/kvm/Makefile +++ b/arch/powerpc/kvm/Makefile | |||
| @@ -14,7 +14,7 @@ CFLAGS_emulate.o := -I. | |||
| 14 | 14 | ||
| 15 | common-objs-y += powerpc.o emulate.o | 15 | common-objs-y += powerpc.o emulate.o |
| 16 | obj-$(CONFIG_KVM_EXIT_TIMING) += timing.o | 16 | obj-$(CONFIG_KVM_EXIT_TIMING) += timing.o |
| 17 | obj-$(CONFIG_KVM_BOOK3S_64_HANDLER) += book3s_64_exports.o | 17 | obj-$(CONFIG_KVM_BOOK3S_HANDLER) += book3s_exports.o |
| 18 | 18 | ||
| 19 | AFLAGS_booke_interrupts.o := -I$(obj) | 19 | AFLAGS_booke_interrupts.o := -I$(obj) |
| 20 | 20 | ||
| @@ -40,17 +40,31 @@ kvm-objs-$(CONFIG_KVM_E500) := $(kvm-e500-objs) | |||
| 40 | 40 | ||
| 41 | kvm-book3s_64-objs := \ | 41 | kvm-book3s_64-objs := \ |
| 42 | $(common-objs-y) \ | 42 | $(common-objs-y) \ |
| 43 | fpu.o \ | ||
| 44 | book3s_paired_singles.o \ | ||
| 43 | book3s.o \ | 45 | book3s.o \ |
| 44 | book3s_64_emulate.o \ | 46 | book3s_emulate.o \ |
| 45 | book3s_64_interrupts.o \ | 47 | book3s_interrupts.o \ |
| 46 | book3s_64_mmu_host.o \ | 48 | book3s_64_mmu_host.o \ |
| 47 | book3s_64_mmu.o \ | 49 | book3s_64_mmu.o \ |
| 48 | book3s_32_mmu.o | 50 | book3s_32_mmu.o |
| 49 | kvm-objs-$(CONFIG_KVM_BOOK3S_64) := $(kvm-book3s_64-objs) | 51 | kvm-objs-$(CONFIG_KVM_BOOK3S_64) := $(kvm-book3s_64-objs) |
| 50 | 52 | ||
| 53 | kvm-book3s_32-objs := \ | ||
| 54 | $(common-objs-y) \ | ||
| 55 | fpu.o \ | ||
| 56 | book3s_paired_singles.o \ | ||
| 57 | book3s.o \ | ||
| 58 | book3s_emulate.o \ | ||
| 59 | book3s_interrupts.o \ | ||
| 60 | book3s_32_mmu_host.o \ | ||
| 61 | book3s_32_mmu.o | ||
| 62 | kvm-objs-$(CONFIG_KVM_BOOK3S_32) := $(kvm-book3s_32-objs) | ||
| 63 | |||
| 51 | kvm-objs := $(kvm-objs-m) $(kvm-objs-y) | 64 | kvm-objs := $(kvm-objs-m) $(kvm-objs-y) |
| 52 | 65 | ||
| 53 | obj-$(CONFIG_KVM_440) += kvm.o | 66 | obj-$(CONFIG_KVM_440) += kvm.o |
| 54 | obj-$(CONFIG_KVM_E500) += kvm.o | 67 | obj-$(CONFIG_KVM_E500) += kvm.o |
| 55 | obj-$(CONFIG_KVM_BOOK3S_64) += kvm.o | 68 | obj-$(CONFIG_KVM_BOOK3S_64) += kvm.o |
| 69 | obj-$(CONFIG_KVM_BOOK3S_32) += kvm.o | ||
| 56 | 70 | ||
diff --git a/arch/powerpc/kvm/book3s.c b/arch/powerpc/kvm/book3s.c index 604af29b71ed..b998abf1a63d 100644 --- a/arch/powerpc/kvm/book3s.c +++ b/arch/powerpc/kvm/book3s.c | |||
| @@ -16,6 +16,7 @@ | |||
| 16 | 16 | ||
| 17 | #include <linux/kvm_host.h> | 17 | #include <linux/kvm_host.h> |
| 18 | #include <linux/err.h> | 18 | #include <linux/err.h> |
| 19 | #include <linux/slab.h> | ||
| 19 | 20 | ||
| 20 | #include <asm/reg.h> | 21 | #include <asm/reg.h> |
| 21 | #include <asm/cputable.h> | 22 | #include <asm/cputable.h> |
| @@ -29,6 +30,7 @@ | |||
| 29 | #include <linux/gfp.h> | 30 | #include <linux/gfp.h> |
| 30 | #include <linux/sched.h> | 31 | #include <linux/sched.h> |
| 31 | #include <linux/vmalloc.h> | 32 | #include <linux/vmalloc.h> |
| 33 | #include <linux/highmem.h> | ||
| 32 | 34 | ||
| 33 | #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU | 35 | #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU |
| 34 | 36 | ||
| @@ -36,7 +38,15 @@ | |||
| 36 | /* #define EXIT_DEBUG_SIMPLE */ | 38 | /* #define EXIT_DEBUG_SIMPLE */ |
| 37 | /* #define DEBUG_EXT */ | 39 | /* #define DEBUG_EXT */ |
| 38 | 40 | ||
| 39 | static void kvmppc_giveup_ext(struct kvm_vcpu *vcpu, ulong msr); | 41 | static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr, |
| 42 | ulong msr); | ||
| 43 | |||
| 44 | /* Some compatibility defines */ | ||
| 45 | #ifdef CONFIG_PPC_BOOK3S_32 | ||
| 46 | #define MSR_USER32 MSR_USER | ||
| 47 | #define MSR_USER64 MSR_USER | ||
| 48 | #define HW_PAGE_SIZE PAGE_SIZE | ||
| 49 | #endif | ||
| 40 | 50 | ||
| 41 | struct kvm_stats_debugfs_item debugfs_entries[] = { | 51 | struct kvm_stats_debugfs_item debugfs_entries[] = { |
| 42 | { "exits", VCPU_STAT(sum_exits) }, | 52 | { "exits", VCPU_STAT(sum_exits) }, |
| @@ -69,18 +79,26 @@ void kvmppc_core_load_guest_debugstate(struct kvm_vcpu *vcpu) | |||
| 69 | 79 | ||
| 70 | void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu) | 80 | void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu) |
| 71 | { | 81 | { |
| 72 | memcpy(get_paca()->kvm_slb, to_book3s(vcpu)->slb_shadow, sizeof(get_paca()->kvm_slb)); | 82 | #ifdef CONFIG_PPC_BOOK3S_64 |
| 73 | memcpy(&get_paca()->shadow_vcpu, &to_book3s(vcpu)->shadow_vcpu, | 83 | memcpy(to_svcpu(vcpu)->slb, to_book3s(vcpu)->slb_shadow, sizeof(to_svcpu(vcpu)->slb)); |
| 84 | memcpy(&get_paca()->shadow_vcpu, to_book3s(vcpu)->shadow_vcpu, | ||
| 74 | sizeof(get_paca()->shadow_vcpu)); | 85 | sizeof(get_paca()->shadow_vcpu)); |
| 75 | get_paca()->kvm_slb_max = to_book3s(vcpu)->slb_shadow_max; | 86 | to_svcpu(vcpu)->slb_max = to_book3s(vcpu)->slb_shadow_max; |
| 87 | #endif | ||
| 88 | |||
| 89 | #ifdef CONFIG_PPC_BOOK3S_32 | ||
| 90 | current->thread.kvm_shadow_vcpu = to_book3s(vcpu)->shadow_vcpu; | ||
| 91 | #endif | ||
| 76 | } | 92 | } |
| 77 | 93 | ||
| 78 | void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu) | 94 | void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu) |
| 79 | { | 95 | { |
| 80 | memcpy(to_book3s(vcpu)->slb_shadow, get_paca()->kvm_slb, sizeof(get_paca()->kvm_slb)); | 96 | #ifdef CONFIG_PPC_BOOK3S_64 |
| 81 | memcpy(&to_book3s(vcpu)->shadow_vcpu, &get_paca()->shadow_vcpu, | 97 | memcpy(to_book3s(vcpu)->slb_shadow, to_svcpu(vcpu)->slb, sizeof(to_svcpu(vcpu)->slb)); |
| 98 | memcpy(to_book3s(vcpu)->shadow_vcpu, &get_paca()->shadow_vcpu, | ||
| 82 | sizeof(get_paca()->shadow_vcpu)); | 99 | sizeof(get_paca()->shadow_vcpu)); |
| 83 | to_book3s(vcpu)->slb_shadow_max = get_paca()->kvm_slb_max; | 100 | to_book3s(vcpu)->slb_shadow_max = to_svcpu(vcpu)->slb_max; |
| 101 | #endif | ||
| 84 | 102 | ||
| 85 | kvmppc_giveup_ext(vcpu, MSR_FP); | 103 | kvmppc_giveup_ext(vcpu, MSR_FP); |
| 86 | kvmppc_giveup_ext(vcpu, MSR_VEC); | 104 | kvmppc_giveup_ext(vcpu, MSR_VEC); |
| @@ -131,18 +149,22 @@ void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr) | |||
| 131 | } | 149 | } |
| 132 | } | 150 | } |
| 133 | 151 | ||
| 134 | if (((vcpu->arch.msr & (MSR_IR|MSR_DR)) != (old_msr & (MSR_IR|MSR_DR))) || | 152 | if ((vcpu->arch.msr & (MSR_PR|MSR_IR|MSR_DR)) != |
| 135 | (vcpu->arch.msr & MSR_PR) != (old_msr & MSR_PR)) { | 153 | (old_msr & (MSR_PR|MSR_IR|MSR_DR))) { |
| 136 | kvmppc_mmu_flush_segments(vcpu); | 154 | kvmppc_mmu_flush_segments(vcpu); |
| 137 | kvmppc_mmu_map_segment(vcpu, vcpu->arch.pc); | 155 | kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu)); |
| 138 | } | 156 | } |
| 157 | |||
| 158 | /* Preload FPU if it's enabled */ | ||
| 159 | if (vcpu->arch.msr & MSR_FP) | ||
| 160 | kvmppc_handle_ext(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, MSR_FP); | ||
| 139 | } | 161 | } |
| 140 | 162 | ||
| 141 | void kvmppc_inject_interrupt(struct kvm_vcpu *vcpu, int vec, u64 flags) | 163 | void kvmppc_inject_interrupt(struct kvm_vcpu *vcpu, int vec, u64 flags) |
| 142 | { | 164 | { |
| 143 | vcpu->arch.srr0 = vcpu->arch.pc; | 165 | vcpu->arch.srr0 = kvmppc_get_pc(vcpu); |
| 144 | vcpu->arch.srr1 = vcpu->arch.msr | flags; | 166 | vcpu->arch.srr1 = vcpu->arch.msr | flags; |
| 145 | vcpu->arch.pc = to_book3s(vcpu)->hior + vec; | 167 | kvmppc_set_pc(vcpu, to_book3s(vcpu)->hior + vec); |
| 146 | vcpu->arch.mmu.reset_msr(vcpu); | 168 | vcpu->arch.mmu.reset_msr(vcpu); |
| 147 | } | 169 | } |
| 148 | 170 | ||
| @@ -218,6 +240,12 @@ void kvmppc_core_queue_external(struct kvm_vcpu *vcpu, | |||
| 218 | kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL); | 240 | kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL); |
| 219 | } | 241 | } |
| 220 | 242 | ||
| 243 | void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu, | ||
| 244 | struct kvm_interrupt *irq) | ||
| 245 | { | ||
| 246 | kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL); | ||
| 247 | } | ||
| 248 | |||
| 221 | int kvmppc_book3s_irqprio_deliver(struct kvm_vcpu *vcpu, unsigned int priority) | 249 | int kvmppc_book3s_irqprio_deliver(struct kvm_vcpu *vcpu, unsigned int priority) |
| 222 | { | 250 | { |
| 223 | int deliver = 1; | 251 | int deliver = 1; |
| @@ -302,7 +330,7 @@ void kvmppc_core_deliver_interrupts(struct kvm_vcpu *vcpu) | |||
| 302 | printk(KERN_EMERG "KVM: Check pending: %lx\n", vcpu->arch.pending_exceptions); | 330 | printk(KERN_EMERG "KVM: Check pending: %lx\n", vcpu->arch.pending_exceptions); |
| 303 | #endif | 331 | #endif |
| 304 | priority = __ffs(*pending); | 332 | priority = __ffs(*pending); |
| 305 | while (priority <= (sizeof(unsigned int) * 8)) { | 333 | while (priority < BOOK3S_IRQPRIO_MAX) { |
| 306 | if (kvmppc_book3s_irqprio_deliver(vcpu, priority) && | 334 | if (kvmppc_book3s_irqprio_deliver(vcpu, priority) && |
| 307 | (priority != BOOK3S_IRQPRIO_DECREMENTER)) { | 335 | (priority != BOOK3S_IRQPRIO_DECREMENTER)) { |
| 308 | /* DEC interrupts get cleared by mtdec */ | 336 | /* DEC interrupts get cleared by mtdec */ |
| @@ -318,13 +346,18 @@ void kvmppc_core_deliver_interrupts(struct kvm_vcpu *vcpu) | |||
| 318 | 346 | ||
| 319 | void kvmppc_set_pvr(struct kvm_vcpu *vcpu, u32 pvr) | 347 | void kvmppc_set_pvr(struct kvm_vcpu *vcpu, u32 pvr) |
| 320 | { | 348 | { |
| 349 | u32 host_pvr; | ||
| 350 | |||
| 321 | vcpu->arch.hflags &= ~BOOK3S_HFLAG_SLB; | 351 | vcpu->arch.hflags &= ~BOOK3S_HFLAG_SLB; |
| 322 | vcpu->arch.pvr = pvr; | 352 | vcpu->arch.pvr = pvr; |
| 353 | #ifdef CONFIG_PPC_BOOK3S_64 | ||
| 323 | if ((pvr >= 0x330000) && (pvr < 0x70330000)) { | 354 | if ((pvr >= 0x330000) && (pvr < 0x70330000)) { |
| 324 | kvmppc_mmu_book3s_64_init(vcpu); | 355 | kvmppc_mmu_book3s_64_init(vcpu); |
| 325 | to_book3s(vcpu)->hior = 0xfff00000; | 356 | to_book3s(vcpu)->hior = 0xfff00000; |
| 326 | to_book3s(vcpu)->msr_mask = 0xffffffffffffffffULL; | 357 | to_book3s(vcpu)->msr_mask = 0xffffffffffffffffULL; |
| 327 | } else { | 358 | } else |
| 359 | #endif | ||
| 360 | { | ||
| 328 | kvmppc_mmu_book3s_32_init(vcpu); | 361 | kvmppc_mmu_book3s_32_init(vcpu); |
| 329 | to_book3s(vcpu)->hior = 0; | 362 | to_book3s(vcpu)->hior = 0; |
| 330 | to_book3s(vcpu)->msr_mask = 0xffffffffULL; | 363 | to_book3s(vcpu)->msr_mask = 0xffffffffULL; |
| @@ -337,6 +370,32 @@ void kvmppc_set_pvr(struct kvm_vcpu *vcpu, u32 pvr) | |||
| 337 | !strcmp(cur_cpu_spec->platform, "ppc970")) | 370 | !strcmp(cur_cpu_spec->platform, "ppc970")) |
| 338 | vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32; | 371 | vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32; |
| 339 | 372 | ||
| 373 | /* Cell performs badly if MSR_FEx are set. So let's hope nobody | ||
| 374 | really needs them in a VM on Cell and force disable them. */ | ||
| 375 | if (!strcmp(cur_cpu_spec->platform, "ppc-cell-be")) | ||
| 376 | to_book3s(vcpu)->msr_mask &= ~(MSR_FE0 | MSR_FE1); | ||
| 377 | |||
| 378 | #ifdef CONFIG_PPC_BOOK3S_32 | ||
| 379 | /* 32 bit Book3S always has 32 byte dcbz */ | ||
| 380 | vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32; | ||
| 381 | #endif | ||
| 382 | |||
| 383 | /* On some CPUs we can execute paired single operations natively */ | ||
| 384 | asm ( "mfpvr %0" : "=r"(host_pvr)); | ||
| 385 | switch (host_pvr) { | ||
| 386 | case 0x00080200: /* lonestar 2.0 */ | ||
| 387 | case 0x00088202: /* lonestar 2.2 */ | ||
| 388 | case 0x70000100: /* gekko 1.0 */ | ||
| 389 | case 0x00080100: /* gekko 2.0 */ | ||
| 390 | case 0x00083203: /* gekko 2.3a */ | ||
| 391 | case 0x00083213: /* gekko 2.3b */ | ||
| 392 | case 0x00083204: /* gekko 2.4 */ | ||
| 393 | case 0x00083214: /* gekko 2.4e (8SE) - retail HW2 */ | ||
| 394 | case 0x00087200: /* broadway */ | ||
| 395 | vcpu->arch.hflags |= BOOK3S_HFLAG_NATIVE_PS; | ||
| 396 | /* Enable HID2.PSE - in case we need it later */ | ||
| 397 | mtspr(SPRN_HID2_GEKKO, mfspr(SPRN_HID2_GEKKO) | (1 << 29)); | ||
| 398 | } | ||
| 340 | } | 399 | } |
| 341 | 400 | ||
| 342 | /* Book3s_32 CPUs always have 32 bytes cache line size, which Linux assumes. To | 401 | /* Book3s_32 CPUs always have 32 bytes cache line size, which Linux assumes. To |
| @@ -350,34 +409,29 @@ void kvmppc_set_pvr(struct kvm_vcpu *vcpu, u32 pvr) | |||
| 350 | */ | 409 | */ |
| 351 | static void kvmppc_patch_dcbz(struct kvm_vcpu *vcpu, struct kvmppc_pte *pte) | 410 | static void kvmppc_patch_dcbz(struct kvm_vcpu *vcpu, struct kvmppc_pte *pte) |
| 352 | { | 411 | { |
| 353 | bool touched = false; | 412 | struct page *hpage; |
| 354 | hva_t hpage; | 413 | u64 hpage_offset; |
| 355 | u32 *page; | 414 | u32 *page; |
| 356 | int i; | 415 | int i; |
| 357 | 416 | ||
| 358 | hpage = gfn_to_hva(vcpu->kvm, pte->raddr >> PAGE_SHIFT); | 417 | hpage = gfn_to_page(vcpu->kvm, pte->raddr >> PAGE_SHIFT); |
| 359 | if (kvm_is_error_hva(hpage)) | 418 | if (is_error_page(hpage)) |
| 360 | return; | 419 | return; |
| 361 | 420 | ||
| 362 | hpage |= pte->raddr & ~PAGE_MASK; | 421 | hpage_offset = pte->raddr & ~PAGE_MASK; |
| 363 | hpage &= ~0xFFFULL; | 422 | hpage_offset &= ~0xFFFULL; |
| 364 | 423 | hpage_offset /= 4; | |
| 365 | page = vmalloc(HW_PAGE_SIZE); | ||
| 366 | |||
| 367 | if (copy_from_user(page, (void __user *)hpage, HW_PAGE_SIZE)) | ||
| 368 | goto out; | ||
| 369 | 424 | ||
| 370 | for (i=0; i < HW_PAGE_SIZE / 4; i++) | 425 | get_page(hpage); |
| 371 | if ((page[i] & 0xff0007ff) == INS_DCBZ) { | 426 | page = kmap_atomic(hpage, KM_USER0); |
| 372 | page[i] &= 0xfffffff7; // reserved instruction, so we trap | ||
| 373 | touched = true; | ||
| 374 | } | ||
| 375 | 427 | ||
| 376 | if (touched) | 428 | /* patch dcbz into reserved instruction, so we trap */ |
| 377 | copy_to_user((void __user *)hpage, page, HW_PAGE_SIZE); | 429 | for (i=hpage_offset; i < hpage_offset + (HW_PAGE_SIZE / 4); i++) |
| 430 | if ((page[i] & 0xff0007ff) == INS_DCBZ) | ||
| 431 | page[i] &= 0xfffffff7; | ||
| 378 | 432 | ||
| 379 | out: | 433 | kunmap_atomic(page, KM_USER0); |
| 380 | vfree(page); | 434 | put_page(hpage); |
| 381 | } | 435 | } |
| 382 | 436 | ||
| 383 | static int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, bool data, | 437 | static int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, bool data, |
| @@ -391,15 +445,7 @@ static int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, bool data, | |||
| 391 | } else { | 445 | } else { |
| 392 | pte->eaddr = eaddr; | 446 | pte->eaddr = eaddr; |
| 393 | pte->raddr = eaddr & 0xffffffff; | 447 | pte->raddr = eaddr & 0xffffffff; |
| 394 | pte->vpage = eaddr >> 12; | 448 | pte->vpage = VSID_REAL | eaddr >> 12; |
| 395 | switch (vcpu->arch.msr & (MSR_DR|MSR_IR)) { | ||
| 396 | case 0: | ||
| 397 | pte->vpage |= VSID_REAL; | ||
| 398 | case MSR_DR: | ||
| 399 | pte->vpage |= VSID_REAL_DR; | ||
| 400 | case MSR_IR: | ||
| 401 | pte->vpage |= VSID_REAL_IR; | ||
| 402 | } | ||
| 403 | pte->may_read = true; | 449 | pte->may_read = true; |
| 404 | pte->may_write = true; | 450 | pte->may_write = true; |
| 405 | pte->may_execute = true; | 451 | pte->may_execute = true; |
| @@ -434,55 +480,55 @@ err: | |||
| 434 | return kvmppc_bad_hva(); | 480 | return kvmppc_bad_hva(); |
| 435 | } | 481 | } |
| 436 | 482 | ||
| 437 | int kvmppc_st(struct kvm_vcpu *vcpu, ulong eaddr, int size, void *ptr) | 483 | int kvmppc_st(struct kvm_vcpu *vcpu, ulong *eaddr, int size, void *ptr, |
| 484 | bool data) | ||
| 438 | { | 485 | { |
| 439 | struct kvmppc_pte pte; | 486 | struct kvmppc_pte pte; |
| 440 | hva_t hva = eaddr; | ||
| 441 | 487 | ||
| 442 | vcpu->stat.st++; | 488 | vcpu->stat.st++; |
| 443 | 489 | ||
| 444 | if (kvmppc_xlate(vcpu, eaddr, false, &pte)) | 490 | if (kvmppc_xlate(vcpu, *eaddr, data, &pte)) |
| 445 | goto err; | 491 | return -ENOENT; |
| 446 | 492 | ||
| 447 | hva = kvmppc_pte_to_hva(vcpu, &pte, false); | 493 | *eaddr = pte.raddr; |
| 448 | if (kvm_is_error_hva(hva)) | ||
| 449 | goto err; | ||
| 450 | 494 | ||
| 451 | if (copy_to_user((void __user *)hva, ptr, size)) { | 495 | if (!pte.may_write) |
| 452 | printk(KERN_INFO "kvmppc_st at 0x%lx failed\n", hva); | 496 | return -EPERM; |
| 453 | goto err; | ||
| 454 | } | ||
| 455 | 497 | ||
| 456 | return 0; | 498 | if (kvm_write_guest(vcpu->kvm, pte.raddr, ptr, size)) |
| 499 | return EMULATE_DO_MMIO; | ||
| 457 | 500 | ||
| 458 | err: | 501 | return EMULATE_DONE; |
| 459 | return -ENOENT; | ||
| 460 | } | 502 | } |
| 461 | 503 | ||
| 462 | int kvmppc_ld(struct kvm_vcpu *vcpu, ulong eaddr, int size, void *ptr, | 504 | int kvmppc_ld(struct kvm_vcpu *vcpu, ulong *eaddr, int size, void *ptr, |
| 463 | bool data) | 505 | bool data) |
| 464 | { | 506 | { |
| 465 | struct kvmppc_pte pte; | 507 | struct kvmppc_pte pte; |
| 466 | hva_t hva = eaddr; | 508 | hva_t hva = *eaddr; |
| 467 | 509 | ||
| 468 | vcpu->stat.ld++; | 510 | vcpu->stat.ld++; |
| 469 | 511 | ||
| 470 | if (kvmppc_xlate(vcpu, eaddr, data, &pte)) | 512 | if (kvmppc_xlate(vcpu, *eaddr, data, &pte)) |
| 471 | goto err; | 513 | goto nopte; |
| 514 | |||
| 515 | *eaddr = pte.raddr; | ||
| 472 | 516 | ||
| 473 | hva = kvmppc_pte_to_hva(vcpu, &pte, true); | 517 | hva = kvmppc_pte_to_hva(vcpu, &pte, true); |
| 474 | if (kvm_is_error_hva(hva)) | 518 | if (kvm_is_error_hva(hva)) |
| 475 | goto err; | 519 | goto mmio; |
| 476 | 520 | ||
| 477 | if (copy_from_user(ptr, (void __user *)hva, size)) { | 521 | if (copy_from_user(ptr, (void __user *)hva, size)) { |
| 478 | printk(KERN_INFO "kvmppc_ld at 0x%lx failed\n", hva); | 522 | printk(KERN_INFO "kvmppc_ld at 0x%lx failed\n", hva); |
| 479 | goto err; | 523 | goto mmio; |
| 480 | } | 524 | } |
| 481 | 525 | ||
| 482 | return 0; | 526 | return EMULATE_DONE; |
| 483 | 527 | ||
| 484 | err: | 528 | nopte: |
| 485 | return -ENOENT; | 529 | return -ENOENT; |
| 530 | mmio: | ||
| 531 | return EMULATE_DO_MMIO; | ||
| 486 | } | 532 | } |
| 487 | 533 | ||
| 488 | static int kvmppc_visible_gfn(struct kvm_vcpu *vcpu, gfn_t gfn) | 534 | static int kvmppc_visible_gfn(struct kvm_vcpu *vcpu, gfn_t gfn) |
| @@ -499,12 +545,11 @@ int kvmppc_handle_pagefault(struct kvm_run *run, struct kvm_vcpu *vcpu, | |||
| 499 | int page_found = 0; | 545 | int page_found = 0; |
| 500 | struct kvmppc_pte pte; | 546 | struct kvmppc_pte pte; |
| 501 | bool is_mmio = false; | 547 | bool is_mmio = false; |
| 548 | bool dr = (vcpu->arch.msr & MSR_DR) ? true : false; | ||
| 549 | bool ir = (vcpu->arch.msr & MSR_IR) ? true : false; | ||
| 550 | u64 vsid; | ||
| 502 | 551 | ||
| 503 | if ( vec == BOOK3S_INTERRUPT_DATA_STORAGE ) { | 552 | relocated = data ? dr : ir; |
| 504 | relocated = (vcpu->arch.msr & MSR_DR); | ||
| 505 | } else { | ||
| 506 | relocated = (vcpu->arch.msr & MSR_IR); | ||
| 507 | } | ||
| 508 | 553 | ||
| 509 | /* Resolve real address if translation turned on */ | 554 | /* Resolve real address if translation turned on */ |
| 510 | if (relocated) { | 555 | if (relocated) { |
| @@ -516,14 +561,25 @@ int kvmppc_handle_pagefault(struct kvm_run *run, struct kvm_vcpu *vcpu, | |||
| 516 | pte.raddr = eaddr & 0xffffffff; | 561 | pte.raddr = eaddr & 0xffffffff; |
| 517 | pte.eaddr = eaddr; | 562 | pte.eaddr = eaddr; |
| 518 | pte.vpage = eaddr >> 12; | 563 | pte.vpage = eaddr >> 12; |
| 519 | switch (vcpu->arch.msr & (MSR_DR|MSR_IR)) { | 564 | } |
| 520 | case 0: | 565 | |
| 521 | pte.vpage |= VSID_REAL; | 566 | switch (vcpu->arch.msr & (MSR_DR|MSR_IR)) { |
| 522 | case MSR_DR: | 567 | case 0: |
| 523 | pte.vpage |= VSID_REAL_DR; | 568 | pte.vpage |= ((u64)VSID_REAL << (SID_SHIFT - 12)); |
| 524 | case MSR_IR: | 569 | break; |
| 525 | pte.vpage |= VSID_REAL_IR; | 570 | case MSR_DR: |
| 526 | } | 571 | case MSR_IR: |
| 572 | vcpu->arch.mmu.esid_to_vsid(vcpu, eaddr >> SID_SHIFT, &vsid); | ||
| 573 | |||
| 574 | if ((vcpu->arch.msr & (MSR_DR|MSR_IR)) == MSR_DR) | ||
| 575 | pte.vpage |= ((u64)VSID_REAL_DR << (SID_SHIFT - 12)); | ||
| 576 | else | ||
| 577 | pte.vpage |= ((u64)VSID_REAL_IR << (SID_SHIFT - 12)); | ||
| 578 | pte.vpage |= vsid; | ||
| 579 | |||
| 580 | if (vsid == -1) | ||
| 581 | page_found = -EINVAL; | ||
| 582 | break; | ||
| 527 | } | 583 | } |
| 528 | 584 | ||
| 529 | if (vcpu->arch.mmu.is_dcbz32(vcpu) && | 585 | if (vcpu->arch.mmu.is_dcbz32(vcpu) && |
| @@ -538,20 +594,20 @@ int kvmppc_handle_pagefault(struct kvm_run *run, struct kvm_vcpu *vcpu, | |||
| 538 | 594 | ||
| 539 | if (page_found == -ENOENT) { | 595 | if (page_found == -ENOENT) { |
| 540 | /* Page not found in guest PTE entries */ | 596 | /* Page not found in guest PTE entries */ |
| 541 | vcpu->arch.dear = vcpu->arch.fault_dear; | 597 | vcpu->arch.dear = kvmppc_get_fault_dar(vcpu); |
| 542 | to_book3s(vcpu)->dsisr = vcpu->arch.fault_dsisr; | 598 | to_book3s(vcpu)->dsisr = to_svcpu(vcpu)->fault_dsisr; |
| 543 | vcpu->arch.msr |= (vcpu->arch.shadow_srr1 & 0x00000000f8000000ULL); | 599 | vcpu->arch.msr |= (to_svcpu(vcpu)->shadow_srr1 & 0x00000000f8000000ULL); |
| 544 | kvmppc_book3s_queue_irqprio(vcpu, vec); | 600 | kvmppc_book3s_queue_irqprio(vcpu, vec); |
| 545 | } else if (page_found == -EPERM) { | 601 | } else if (page_found == -EPERM) { |
| 546 | /* Storage protection */ | 602 | /* Storage protection */ |
| 547 | vcpu->arch.dear = vcpu->arch.fault_dear; | 603 | vcpu->arch.dear = kvmppc_get_fault_dar(vcpu); |
| 548 | to_book3s(vcpu)->dsisr = vcpu->arch.fault_dsisr & ~DSISR_NOHPTE; | 604 | to_book3s(vcpu)->dsisr = to_svcpu(vcpu)->fault_dsisr & ~DSISR_NOHPTE; |
| 549 | to_book3s(vcpu)->dsisr |= DSISR_PROTFAULT; | 605 | to_book3s(vcpu)->dsisr |= DSISR_PROTFAULT; |
| 550 | vcpu->arch.msr |= (vcpu->arch.shadow_srr1 & 0x00000000f8000000ULL); | 606 | vcpu->arch.msr |= (to_svcpu(vcpu)->shadow_srr1 & 0x00000000f8000000ULL); |
| 551 | kvmppc_book3s_queue_irqprio(vcpu, vec); | 607 | kvmppc_book3s_queue_irqprio(vcpu, vec); |
| 552 | } else if (page_found == -EINVAL) { | 608 | } else if (page_found == -EINVAL) { |
| 553 | /* Page not found in guest SLB */ | 609 | /* Page not found in guest SLB */ |
| 554 | vcpu->arch.dear = vcpu->arch.fault_dear; | 610 | vcpu->arch.dear = kvmppc_get_fault_dar(vcpu); |
| 555 | kvmppc_book3s_queue_irqprio(vcpu, vec + 0x80); | 611 | kvmppc_book3s_queue_irqprio(vcpu, vec + 0x80); |
| 556 | } else if (!is_mmio && | 612 | } else if (!is_mmio && |
| 557 | kvmppc_visible_gfn(vcpu, pte.raddr >> PAGE_SHIFT)) { | 613 | kvmppc_visible_gfn(vcpu, pte.raddr >> PAGE_SHIFT)) { |
| @@ -583,11 +639,13 @@ static inline int get_fpr_index(int i) | |||
| 583 | } | 639 | } |
| 584 | 640 | ||
| 585 | /* Give up external provider (FPU, Altivec, VSX) */ | 641 | /* Give up external provider (FPU, Altivec, VSX) */ |
| 586 | static void kvmppc_giveup_ext(struct kvm_vcpu *vcpu, ulong msr) | 642 | void kvmppc_giveup_ext(struct kvm_vcpu *vcpu, ulong msr) |
| 587 | { | 643 | { |
| 588 | struct thread_struct *t = ¤t->thread; | 644 | struct thread_struct *t = ¤t->thread; |
| 589 | u64 *vcpu_fpr = vcpu->arch.fpr; | 645 | u64 *vcpu_fpr = vcpu->arch.fpr; |
| 646 | #ifdef CONFIG_VSX | ||
| 590 | u64 *vcpu_vsx = vcpu->arch.vsr; | 647 | u64 *vcpu_vsx = vcpu->arch.vsr; |
| 648 | #endif | ||
| 591 | u64 *thread_fpr = (u64*)t->fpr; | 649 | u64 *thread_fpr = (u64*)t->fpr; |
| 592 | int i; | 650 | int i; |
| 593 | 651 | ||
| @@ -629,21 +687,65 @@ static void kvmppc_giveup_ext(struct kvm_vcpu *vcpu, ulong msr) | |||
| 629 | kvmppc_recalc_shadow_msr(vcpu); | 687 | kvmppc_recalc_shadow_msr(vcpu); |
| 630 | } | 688 | } |
| 631 | 689 | ||
| 690 | static int kvmppc_read_inst(struct kvm_vcpu *vcpu) | ||
| 691 | { | ||
| 692 | ulong srr0 = kvmppc_get_pc(vcpu); | ||
| 693 | u32 last_inst = kvmppc_get_last_inst(vcpu); | ||
| 694 | int ret; | ||
| 695 | |||
| 696 | ret = kvmppc_ld(vcpu, &srr0, sizeof(u32), &last_inst, false); | ||
| 697 | if (ret == -ENOENT) { | ||
| 698 | vcpu->arch.msr = kvmppc_set_field(vcpu->arch.msr, 33, 33, 1); | ||
| 699 | vcpu->arch.msr = kvmppc_set_field(vcpu->arch.msr, 34, 36, 0); | ||
| 700 | vcpu->arch.msr = kvmppc_set_field(vcpu->arch.msr, 42, 47, 0); | ||
| 701 | kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_INST_STORAGE); | ||
| 702 | return EMULATE_AGAIN; | ||
| 703 | } | ||
| 704 | |||
| 705 | return EMULATE_DONE; | ||
| 706 | } | ||
| 707 | |||
| 708 | static int kvmppc_check_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr) | ||
| 709 | { | ||
| 710 | |||
| 711 | /* Need to do paired single emulation? */ | ||
| 712 | if (!(vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE)) | ||
| 713 | return EMULATE_DONE; | ||
| 714 | |||
| 715 | /* Read out the instruction */ | ||
| 716 | if (kvmppc_read_inst(vcpu) == EMULATE_DONE) | ||
| 717 | /* Need to emulate */ | ||
| 718 | return EMULATE_FAIL; | ||
| 719 | |||
| 720 | return EMULATE_AGAIN; | ||
| 721 | } | ||
| 722 | |||
| 632 | /* Handle external providers (FPU, Altivec, VSX) */ | 723 | /* Handle external providers (FPU, Altivec, VSX) */ |
| 633 | static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr, | 724 | static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr, |
| 634 | ulong msr) | 725 | ulong msr) |
| 635 | { | 726 | { |
| 636 | struct thread_struct *t = ¤t->thread; | 727 | struct thread_struct *t = ¤t->thread; |
| 637 | u64 *vcpu_fpr = vcpu->arch.fpr; | 728 | u64 *vcpu_fpr = vcpu->arch.fpr; |
| 729 | #ifdef CONFIG_VSX | ||
| 638 | u64 *vcpu_vsx = vcpu->arch.vsr; | 730 | u64 *vcpu_vsx = vcpu->arch.vsr; |
| 731 | #endif | ||
| 639 | u64 *thread_fpr = (u64*)t->fpr; | 732 | u64 *thread_fpr = (u64*)t->fpr; |
| 640 | int i; | 733 | int i; |
| 641 | 734 | ||
| 735 | /* When we have paired singles, we emulate in software */ | ||
| 736 | if (vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE) | ||
| 737 | return RESUME_GUEST; | ||
| 738 | |||
| 642 | if (!(vcpu->arch.msr & msr)) { | 739 | if (!(vcpu->arch.msr & msr)) { |
| 643 | kvmppc_book3s_queue_irqprio(vcpu, exit_nr); | 740 | kvmppc_book3s_queue_irqprio(vcpu, exit_nr); |
| 644 | return RESUME_GUEST; | 741 | return RESUME_GUEST; |
| 645 | } | 742 | } |
| 646 | 743 | ||
| 744 | /* We already own the ext */ | ||
| 745 | if (vcpu->arch.guest_owned_ext & msr) { | ||
| 746 | return RESUME_GUEST; | ||
| 747 | } | ||
| 748 | |||
| 647 | #ifdef DEBUG_EXT | 749 | #ifdef DEBUG_EXT |
| 648 | printk(KERN_INFO "Loading up ext 0x%lx\n", msr); | 750 | printk(KERN_INFO "Loading up ext 0x%lx\n", msr); |
| 649 | #endif | 751 | #endif |
| @@ -696,21 +798,33 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu, | |||
| 696 | run->ready_for_interrupt_injection = 1; | 798 | run->ready_for_interrupt_injection = 1; |
| 697 | #ifdef EXIT_DEBUG | 799 | #ifdef EXIT_DEBUG |
| 698 | printk(KERN_EMERG "exit_nr=0x%x | pc=0x%lx | dar=0x%lx | dec=0x%x | msr=0x%lx\n", | 800 | printk(KERN_EMERG "exit_nr=0x%x | pc=0x%lx | dar=0x%lx | dec=0x%x | msr=0x%lx\n", |
| 699 | exit_nr, vcpu->arch.pc, vcpu->arch.fault_dear, | 801 | exit_nr, kvmppc_get_pc(vcpu), kvmppc_get_fault_dar(vcpu), |
| 700 | kvmppc_get_dec(vcpu), vcpu->arch.msr); | 802 | kvmppc_get_dec(vcpu), to_svcpu(vcpu)->shadow_srr1); |
| 701 | #elif defined (EXIT_DEBUG_SIMPLE) | 803 | #elif defined (EXIT_DEBUG_SIMPLE) |
| 702 | if ((exit_nr != 0x900) && (exit_nr != 0x500)) | 804 | if ((exit_nr != 0x900) && (exit_nr != 0x500)) |
| 703 | printk(KERN_EMERG "exit_nr=0x%x | pc=0x%lx | dar=0x%lx | msr=0x%lx\n", | 805 | printk(KERN_EMERG "exit_nr=0x%x | pc=0x%lx | dar=0x%lx | msr=0x%lx\n", |
| 704 | exit_nr, vcpu->arch.pc, vcpu->arch.fault_dear, | 806 | exit_nr, kvmppc_get_pc(vcpu), kvmppc_get_fault_dar(vcpu), |
| 705 | vcpu->arch.msr); | 807 | vcpu->arch.msr); |
| 706 | #endif | 808 | #endif |
| 707 | kvm_resched(vcpu); | 809 | kvm_resched(vcpu); |
| 708 | switch (exit_nr) { | 810 | switch (exit_nr) { |
| 709 | case BOOK3S_INTERRUPT_INST_STORAGE: | 811 | case BOOK3S_INTERRUPT_INST_STORAGE: |
| 710 | vcpu->stat.pf_instruc++; | 812 | vcpu->stat.pf_instruc++; |
| 813 | |||
| 814 | #ifdef CONFIG_PPC_BOOK3S_32 | ||
| 815 | /* We set segments as unused segments when invalidating them. So | ||
| 816 | * treat the respective fault as segment fault. */ | ||
| 817 | if (to_svcpu(vcpu)->sr[kvmppc_get_pc(vcpu) >> SID_SHIFT] | ||
| 818 | == SR_INVALID) { | ||
| 819 | kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu)); | ||
| 820 | r = RESUME_GUEST; | ||
| 821 | break; | ||
| 822 | } | ||
| 823 | #endif | ||
| 824 | |||
| 711 | /* only care about PTEG not found errors, but leave NX alone */ | 825 | /* only care about PTEG not found errors, but leave NX alone */ |
| 712 | if (vcpu->arch.shadow_srr1 & 0x40000000) { | 826 | if (to_svcpu(vcpu)->shadow_srr1 & 0x40000000) { |
| 713 | r = kvmppc_handle_pagefault(run, vcpu, vcpu->arch.pc, exit_nr); | 827 | r = kvmppc_handle_pagefault(run, vcpu, kvmppc_get_pc(vcpu), exit_nr); |
| 714 | vcpu->stat.sp_instruc++; | 828 | vcpu->stat.sp_instruc++; |
| 715 | } else if (vcpu->arch.mmu.is_dcbz32(vcpu) && | 829 | } else if (vcpu->arch.mmu.is_dcbz32(vcpu) && |
| 716 | (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) { | 830 | (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) { |
| @@ -719,37 +833,52 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu, | |||
| 719 | * so we can't use the NX bit inside the guest. Let's cross our fingers, | 833 | * so we can't use the NX bit inside the guest. Let's cross our fingers, |
| 720 | * that no guest that needs the dcbz hack does NX. | 834 | * that no guest that needs the dcbz hack does NX. |
| 721 | */ | 835 | */ |
| 722 | kvmppc_mmu_pte_flush(vcpu, vcpu->arch.pc, ~0xFFFULL); | 836 | kvmppc_mmu_pte_flush(vcpu, kvmppc_get_pc(vcpu), ~0xFFFUL); |
| 837 | r = RESUME_GUEST; | ||
| 723 | } else { | 838 | } else { |
| 724 | vcpu->arch.msr |= vcpu->arch.shadow_srr1 & 0x58000000; | 839 | vcpu->arch.msr |= to_svcpu(vcpu)->shadow_srr1 & 0x58000000; |
| 725 | kvmppc_book3s_queue_irqprio(vcpu, exit_nr); | 840 | kvmppc_book3s_queue_irqprio(vcpu, exit_nr); |
| 726 | kvmppc_mmu_pte_flush(vcpu, vcpu->arch.pc, ~0xFFFULL); | 841 | kvmppc_mmu_pte_flush(vcpu, kvmppc_get_pc(vcpu), ~0xFFFUL); |
| 727 | r = RESUME_GUEST; | 842 | r = RESUME_GUEST; |
| 728 | } | 843 | } |
| 729 | break; | 844 | break; |
| 730 | case BOOK3S_INTERRUPT_DATA_STORAGE: | 845 | case BOOK3S_INTERRUPT_DATA_STORAGE: |
| 846 | { | ||
| 847 | ulong dar = kvmppc_get_fault_dar(vcpu); | ||
| 731 | vcpu->stat.pf_storage++; | 848 | vcpu->stat.pf_storage++; |
| 849 | |||
| 850 | #ifdef CONFIG_PPC_BOOK3S_32 | ||
| 851 | /* We set segments as unused segments when invalidating them. So | ||
| 852 | * treat the respective fault as segment fault. */ | ||
| 853 | if ((to_svcpu(vcpu)->sr[dar >> SID_SHIFT]) == SR_INVALID) { | ||
| 854 | kvmppc_mmu_map_segment(vcpu, dar); | ||
| 855 | r = RESUME_GUEST; | ||
| 856 | break; | ||
| 857 | } | ||
| 858 | #endif | ||
| 859 | |||
| 732 | /* The only case we need to handle is missing shadow PTEs */ | 860 | /* The only case we need to handle is missing shadow PTEs */ |
| 733 | if (vcpu->arch.fault_dsisr & DSISR_NOHPTE) { | 861 | if (to_svcpu(vcpu)->fault_dsisr & DSISR_NOHPTE) { |
| 734 | r = kvmppc_handle_pagefault(run, vcpu, vcpu->arch.fault_dear, exit_nr); | 862 | r = kvmppc_handle_pagefault(run, vcpu, dar, exit_nr); |
| 735 | } else { | 863 | } else { |
| 736 | vcpu->arch.dear = vcpu->arch.fault_dear; | 864 | vcpu->arch.dear = dar; |
| 737 | to_book3s(vcpu)->dsisr = vcpu->arch.fault_dsisr; | 865 | to_book3s(vcpu)->dsisr = to_svcpu(vcpu)->fault_dsisr; |
| 738 | kvmppc_book3s_queue_irqprio(vcpu, exit_nr); | 866 | kvmppc_book3s_queue_irqprio(vcpu, exit_nr); |
| 739 | kvmppc_mmu_pte_flush(vcpu, vcpu->arch.dear, ~0xFFFULL); | 867 | kvmppc_mmu_pte_flush(vcpu, vcpu->arch.dear, ~0xFFFUL); |
| 740 | r = RESUME_GUEST; | 868 | r = RESUME_GUEST; |
| 741 | } | 869 | } |
| 742 | break; | 870 | break; |
| 871 | } | ||
| 743 | case BOOK3S_INTERRUPT_DATA_SEGMENT: | 872 | case BOOK3S_INTERRUPT_DATA_SEGMENT: |
| 744 | if (kvmppc_mmu_map_segment(vcpu, vcpu->arch.fault_dear) < 0) { | 873 | if (kvmppc_mmu_map_segment(vcpu, kvmppc_get_fault_dar(vcpu)) < 0) { |
| 745 | vcpu->arch.dear = vcpu->arch.fault_dear; | 874 | vcpu->arch.dear = kvmppc_get_fault_dar(vcpu); |
| 746 | kvmppc_book3s_queue_irqprio(vcpu, | 875 | kvmppc_book3s_queue_irqprio(vcpu, |
| 747 | BOOK3S_INTERRUPT_DATA_SEGMENT); | 876 | BOOK3S_INTERRUPT_DATA_SEGMENT); |
| 748 | } | 877 | } |
| 749 | r = RESUME_GUEST; | 878 | r = RESUME_GUEST; |
| 750 | break; | 879 | break; |
| 751 | case BOOK3S_INTERRUPT_INST_SEGMENT: | 880 | case BOOK3S_INTERRUPT_INST_SEGMENT: |
| 752 | if (kvmppc_mmu_map_segment(vcpu, vcpu->arch.pc) < 0) { | 881 | if (kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu)) < 0) { |
| 753 | kvmppc_book3s_queue_irqprio(vcpu, | 882 | kvmppc_book3s_queue_irqprio(vcpu, |
| 754 | BOOK3S_INTERRUPT_INST_SEGMENT); | 883 | BOOK3S_INTERRUPT_INST_SEGMENT); |
| 755 | } | 884 | } |
| @@ -764,18 +893,22 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu, | |||
| 764 | vcpu->stat.ext_intr_exits++; | 893 | vcpu->stat.ext_intr_exits++; |
| 765 | r = RESUME_GUEST; | 894 | r = RESUME_GUEST; |
| 766 | break; | 895 | break; |
| 896 | case BOOK3S_INTERRUPT_PERFMON: | ||
| 897 | r = RESUME_GUEST; | ||
| 898 | break; | ||
| 767 | case BOOK3S_INTERRUPT_PROGRAM: | 899 | case BOOK3S_INTERRUPT_PROGRAM: |
| 768 | { | 900 | { |
| 769 | enum emulation_result er; | 901 | enum emulation_result er; |
| 770 | ulong flags; | 902 | ulong flags; |
| 771 | 903 | ||
| 772 | flags = vcpu->arch.shadow_srr1 & 0x1f0000ull; | 904 | program_interrupt: |
| 905 | flags = to_svcpu(vcpu)->shadow_srr1 & 0x1f0000ull; | ||
| 773 | 906 | ||
| 774 | if (vcpu->arch.msr & MSR_PR) { | 907 | if (vcpu->arch.msr & MSR_PR) { |
| 775 | #ifdef EXIT_DEBUG | 908 | #ifdef EXIT_DEBUG |
| 776 | printk(KERN_INFO "Userspace triggered 0x700 exception at 0x%lx (0x%x)\n", vcpu->arch.pc, vcpu->arch.last_inst); | 909 | printk(KERN_INFO "Userspace triggered 0x700 exception at 0x%lx (0x%x)\n", kvmppc_get_pc(vcpu), kvmppc_get_last_inst(vcpu)); |
| 777 | #endif | 910 | #endif |
| 778 | if ((vcpu->arch.last_inst & 0xff0007ff) != | 911 | if ((kvmppc_get_last_inst(vcpu) & 0xff0007ff) != |
| 779 | (INS_DCBZ & 0xfffffff7)) { | 912 | (INS_DCBZ & 0xfffffff7)) { |
| 780 | kvmppc_core_queue_program(vcpu, flags); | 913 | kvmppc_core_queue_program(vcpu, flags); |
| 781 | r = RESUME_GUEST; | 914 | r = RESUME_GUEST; |
| @@ -789,33 +922,80 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu, | |||
| 789 | case EMULATE_DONE: | 922 | case EMULATE_DONE: |
| 790 | r = RESUME_GUEST_NV; | 923 | r = RESUME_GUEST_NV; |
| 791 | break; | 924 | break; |
| 925 | case EMULATE_AGAIN: | ||
| 926 | r = RESUME_GUEST; | ||
| 927 | break; | ||
| 792 | case EMULATE_FAIL: | 928 | case EMULATE_FAIL: |
| 793 | printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n", | 929 | printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n", |
| 794 | __func__, vcpu->arch.pc, vcpu->arch.last_inst); | 930 | __func__, kvmppc_get_pc(vcpu), kvmppc_get_last_inst(vcpu)); |
| 795 | kvmppc_core_queue_program(vcpu, flags); | 931 | kvmppc_core_queue_program(vcpu, flags); |
| 796 | r = RESUME_GUEST; | 932 | r = RESUME_GUEST; |
| 797 | break; | 933 | break; |
| 934 | case EMULATE_DO_MMIO: | ||
| 935 | run->exit_reason = KVM_EXIT_MMIO; | ||
| 936 | r = RESUME_HOST_NV; | ||
| 937 | break; | ||
| 798 | default: | 938 | default: |
| 799 | BUG(); | 939 | BUG(); |
| 800 | } | 940 | } |
| 801 | break; | 941 | break; |
| 802 | } | 942 | } |
| 803 | case BOOK3S_INTERRUPT_SYSCALL: | 943 | case BOOK3S_INTERRUPT_SYSCALL: |
| 804 | #ifdef EXIT_DEBUG | 944 | // XXX make user settable |
| 805 | printk(KERN_INFO "Syscall Nr %d\n", (int)kvmppc_get_gpr(vcpu, 0)); | 945 | if (vcpu->arch.osi_enabled && |
| 806 | #endif | 946 | (((u32)kvmppc_get_gpr(vcpu, 3)) == OSI_SC_MAGIC_R3) && |
| 807 | vcpu->stat.syscall_exits++; | 947 | (((u32)kvmppc_get_gpr(vcpu, 4)) == OSI_SC_MAGIC_R4)) { |
| 808 | kvmppc_book3s_queue_irqprio(vcpu, exit_nr); | 948 | u64 *gprs = run->osi.gprs; |
| 809 | r = RESUME_GUEST; | 949 | int i; |
| 950 | |||
| 951 | run->exit_reason = KVM_EXIT_OSI; | ||
| 952 | for (i = 0; i < 32; i++) | ||
| 953 | gprs[i] = kvmppc_get_gpr(vcpu, i); | ||
| 954 | vcpu->arch.osi_needed = 1; | ||
| 955 | r = RESUME_HOST_NV; | ||
| 956 | |||
| 957 | } else { | ||
| 958 | vcpu->stat.syscall_exits++; | ||
| 959 | kvmppc_book3s_queue_irqprio(vcpu, exit_nr); | ||
| 960 | r = RESUME_GUEST; | ||
| 961 | } | ||
| 810 | break; | 962 | break; |
| 811 | case BOOK3S_INTERRUPT_FP_UNAVAIL: | 963 | case BOOK3S_INTERRUPT_FP_UNAVAIL: |
| 812 | r = kvmppc_handle_ext(vcpu, exit_nr, MSR_FP); | ||
| 813 | break; | ||
| 814 | case BOOK3S_INTERRUPT_ALTIVEC: | 964 | case BOOK3S_INTERRUPT_ALTIVEC: |
| 815 | r = kvmppc_handle_ext(vcpu, exit_nr, MSR_VEC); | ||
| 816 | break; | ||
| 817 | case BOOK3S_INTERRUPT_VSX: | 965 | case BOOK3S_INTERRUPT_VSX: |
| 818 | r = kvmppc_handle_ext(vcpu, exit_nr, MSR_VSX); | 966 | { |
| 967 | int ext_msr = 0; | ||
| 968 | |||
| 969 | switch (exit_nr) { | ||
| 970 | case BOOK3S_INTERRUPT_FP_UNAVAIL: ext_msr = MSR_FP; break; | ||
| 971 | case BOOK3S_INTERRUPT_ALTIVEC: ext_msr = MSR_VEC; break; | ||
| 972 | case BOOK3S_INTERRUPT_VSX: ext_msr = MSR_VSX; break; | ||
| 973 | } | ||
| 974 | |||
| 975 | switch (kvmppc_check_ext(vcpu, exit_nr)) { | ||
| 976 | case EMULATE_DONE: | ||
| 977 | /* everything ok - let's enable the ext */ | ||
| 978 | r = kvmppc_handle_ext(vcpu, exit_nr, ext_msr); | ||
| 979 | break; | ||
| 980 | case EMULATE_FAIL: | ||
| 981 | /* we need to emulate this instruction */ | ||
| 982 | goto program_interrupt; | ||
| 983 | break; | ||
| 984 | default: | ||
| 985 | /* nothing to worry about - go again */ | ||
| 986 | break; | ||
| 987 | } | ||
| 988 | break; | ||
| 989 | } | ||
| 990 | case BOOK3S_INTERRUPT_ALIGNMENT: | ||
| 991 | if (kvmppc_read_inst(vcpu) == EMULATE_DONE) { | ||
| 992 | to_book3s(vcpu)->dsisr = kvmppc_alignment_dsisr(vcpu, | ||
| 993 | kvmppc_get_last_inst(vcpu)); | ||
| 994 | vcpu->arch.dear = kvmppc_alignment_dar(vcpu, | ||
| 995 | kvmppc_get_last_inst(vcpu)); | ||
| 996 | kvmppc_book3s_queue_irqprio(vcpu, exit_nr); | ||
| 997 | } | ||
| 998 | r = RESUME_GUEST; | ||
| 819 | break; | 999 | break; |
| 820 | case BOOK3S_INTERRUPT_MACHINE_CHECK: | 1000 | case BOOK3S_INTERRUPT_MACHINE_CHECK: |
| 821 | case BOOK3S_INTERRUPT_TRACE: | 1001 | case BOOK3S_INTERRUPT_TRACE: |
| @@ -825,7 +1005,7 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu, | |||
| 825 | default: | 1005 | default: |
| 826 | /* Ugh - bork here! What did we get? */ | 1006 | /* Ugh - bork here! What did we get? */ |
| 827 | printk(KERN_EMERG "exit_nr=0x%x | pc=0x%lx | msr=0x%lx\n", | 1007 | printk(KERN_EMERG "exit_nr=0x%x | pc=0x%lx | msr=0x%lx\n", |
| 828 | exit_nr, vcpu->arch.pc, vcpu->arch.shadow_srr1); | 1008 | exit_nr, kvmppc_get_pc(vcpu), to_svcpu(vcpu)->shadow_srr1); |
| 829 | r = RESUME_HOST; | 1009 | r = RESUME_HOST; |
| 830 | BUG(); | 1010 | BUG(); |
| 831 | break; | 1011 | break; |
| @@ -852,7 +1032,7 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu, | |||
| 852 | } | 1032 | } |
| 853 | 1033 | ||
| 854 | #ifdef EXIT_DEBUG | 1034 | #ifdef EXIT_DEBUG |
| 855 | printk(KERN_EMERG "KVM exit: vcpu=0x%p pc=0x%lx r=0x%x\n", vcpu, vcpu->arch.pc, r); | 1035 | printk(KERN_EMERG "KVM exit: vcpu=0x%p pc=0x%lx r=0x%x\n", vcpu, kvmppc_get_pc(vcpu), r); |
| 856 | #endif | 1036 | #endif |
| 857 | 1037 | ||
| 858 | return r; | 1038 | return r; |
| @@ -867,10 +1047,12 @@ int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) | |||
| 867 | { | 1047 | { |
| 868 | int i; | 1048 | int i; |
| 869 | 1049 | ||
| 870 | regs->pc = vcpu->arch.pc; | 1050 | vcpu_load(vcpu); |
| 1051 | |||
| 1052 | regs->pc = kvmppc_get_pc(vcpu); | ||
| 871 | regs->cr = kvmppc_get_cr(vcpu); | 1053 | regs->cr = kvmppc_get_cr(vcpu); |
| 872 | regs->ctr = vcpu->arch.ctr; | 1054 | regs->ctr = kvmppc_get_ctr(vcpu); |
| 873 | regs->lr = vcpu->arch.lr; | 1055 | regs->lr = kvmppc_get_lr(vcpu); |
| 874 | regs->xer = kvmppc_get_xer(vcpu); | 1056 | regs->xer = kvmppc_get_xer(vcpu); |
| 875 | regs->msr = vcpu->arch.msr; | 1057 | regs->msr = vcpu->arch.msr; |
| 876 | regs->srr0 = vcpu->arch.srr0; | 1058 | regs->srr0 = vcpu->arch.srr0; |
| @@ -887,6 +1069,8 @@ int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) | |||
| 887 | for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) | 1069 | for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) |
| 888 | regs->gpr[i] = kvmppc_get_gpr(vcpu, i); | 1070 | regs->gpr[i] = kvmppc_get_gpr(vcpu, i); |
| 889 | 1071 | ||
| 1072 | vcpu_put(vcpu); | ||
| 1073 | |||
| 890 | return 0; | 1074 | return 0; |
| 891 | } | 1075 | } |
| 892 | 1076 | ||
| @@ -894,10 +1078,12 @@ int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) | |||
| 894 | { | 1078 | { |
| 895 | int i; | 1079 | int i; |
| 896 | 1080 | ||
| 897 | vcpu->arch.pc = regs->pc; | 1081 | vcpu_load(vcpu); |
| 1082 | |||
| 1083 | kvmppc_set_pc(vcpu, regs->pc); | ||
| 898 | kvmppc_set_cr(vcpu, regs->cr); | 1084 | kvmppc_set_cr(vcpu, regs->cr); |
| 899 | vcpu->arch.ctr = regs->ctr; | 1085 | kvmppc_set_ctr(vcpu, regs->ctr); |
| 900 | vcpu->arch.lr = regs->lr; | 1086 | kvmppc_set_lr(vcpu, regs->lr); |
| 901 | kvmppc_set_xer(vcpu, regs->xer); | 1087 | kvmppc_set_xer(vcpu, regs->xer); |
| 902 | kvmppc_set_msr(vcpu, regs->msr); | 1088 | kvmppc_set_msr(vcpu, regs->msr); |
| 903 | vcpu->arch.srr0 = regs->srr0; | 1089 | vcpu->arch.srr0 = regs->srr0; |
| @@ -913,6 +1099,8 @@ int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) | |||
| 913 | for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) | 1099 | for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) |
| 914 | kvmppc_set_gpr(vcpu, i, regs->gpr[i]); | 1100 | kvmppc_set_gpr(vcpu, i, regs->gpr[i]); |
| 915 | 1101 | ||
| 1102 | vcpu_put(vcpu); | ||
| 1103 | |||
| 916 | return 0; | 1104 | return 0; |
| 917 | } | 1105 | } |
| 918 | 1106 | ||
| @@ -922,6 +1110,8 @@ int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, | |||
| 922 | struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu); | 1110 | struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu); |
| 923 | int i; | 1111 | int i; |
| 924 | 1112 | ||
| 1113 | vcpu_load(vcpu); | ||
| 1114 | |||
| 925 | sregs->pvr = vcpu->arch.pvr; | 1115 | sregs->pvr = vcpu->arch.pvr; |
| 926 | 1116 | ||
| 927 | sregs->u.s.sdr1 = to_book3s(vcpu)->sdr1; | 1117 | sregs->u.s.sdr1 = to_book3s(vcpu)->sdr1; |
| @@ -940,6 +1130,9 @@ int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, | |||
| 940 | sregs->u.s.ppc32.dbat[i] = vcpu3s->dbat[i].raw; | 1130 | sregs->u.s.ppc32.dbat[i] = vcpu3s->dbat[i].raw; |
| 941 | } | 1131 | } |
| 942 | } | 1132 | } |
| 1133 | |||
| 1134 | vcpu_put(vcpu); | ||
| 1135 | |||
| 943 | return 0; | 1136 | return 0; |
| 944 | } | 1137 | } |
| 945 | 1138 | ||
| @@ -949,6 +1142,8 @@ int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, | |||
| 949 | struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu); | 1142 | struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu); |
| 950 | int i; | 1143 | int i; |
| 951 | 1144 | ||
| 1145 | vcpu_load(vcpu); | ||
| 1146 | |||
| 952 | kvmppc_set_pvr(vcpu, sregs->pvr); | 1147 | kvmppc_set_pvr(vcpu, sregs->pvr); |
| 953 | 1148 | ||
| 954 | vcpu3s->sdr1 = sregs->u.s.sdr1; | 1149 | vcpu3s->sdr1 = sregs->u.s.sdr1; |
| @@ -975,6 +1170,9 @@ int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, | |||
| 975 | 1170 | ||
| 976 | /* Flush the MMU after messing with the segments */ | 1171 | /* Flush the MMU after messing with the segments */ |
| 977 | kvmppc_mmu_pte_flush(vcpu, 0, 0); | 1172 | kvmppc_mmu_pte_flush(vcpu, 0, 0); |
| 1173 | |||
| 1174 | vcpu_put(vcpu); | ||
| 1175 | |||
| 978 | return 0; | 1176 | return 0; |
| 979 | } | 1177 | } |
| 980 | 1178 | ||
| @@ -1042,24 +1240,33 @@ struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id) | |||
| 1042 | { | 1240 | { |
| 1043 | struct kvmppc_vcpu_book3s *vcpu_book3s; | 1241 | struct kvmppc_vcpu_book3s *vcpu_book3s; |
| 1044 | struct kvm_vcpu *vcpu; | 1242 | struct kvm_vcpu *vcpu; |
| 1045 | int err; | 1243 | int err = -ENOMEM; |
| 1046 | 1244 | ||
| 1047 | vcpu_book3s = (struct kvmppc_vcpu_book3s *)__get_free_pages( GFP_KERNEL | __GFP_ZERO, | 1245 | vcpu_book3s = vmalloc(sizeof(struct kvmppc_vcpu_book3s)); |
| 1048 | get_order(sizeof(struct kvmppc_vcpu_book3s))); | 1246 | if (!vcpu_book3s) |
| 1049 | if (!vcpu_book3s) { | ||
| 1050 | err = -ENOMEM; | ||
| 1051 | goto out; | 1247 | goto out; |
| 1052 | } | 1248 | |
| 1249 | memset(vcpu_book3s, 0, sizeof(struct kvmppc_vcpu_book3s)); | ||
| 1250 | |||
| 1251 | vcpu_book3s->shadow_vcpu = (struct kvmppc_book3s_shadow_vcpu *) | ||
| 1252 | kzalloc(sizeof(*vcpu_book3s->shadow_vcpu), GFP_KERNEL); | ||
| 1253 | if (!vcpu_book3s->shadow_vcpu) | ||
| 1254 | goto free_vcpu; | ||
| 1053 | 1255 | ||
| 1054 | vcpu = &vcpu_book3s->vcpu; | 1256 | vcpu = &vcpu_book3s->vcpu; |
| 1055 | err = kvm_vcpu_init(vcpu, kvm, id); | 1257 | err = kvm_vcpu_init(vcpu, kvm, id); |
| 1056 | if (err) | 1258 | if (err) |
| 1057 | goto free_vcpu; | 1259 | goto free_shadow_vcpu; |
| 1058 | 1260 | ||
| 1059 | vcpu->arch.host_retip = kvm_return_point; | 1261 | vcpu->arch.host_retip = kvm_return_point; |
| 1060 | vcpu->arch.host_msr = mfmsr(); | 1262 | vcpu->arch.host_msr = mfmsr(); |
| 1263 | #ifdef CONFIG_PPC_BOOK3S_64 | ||
| 1061 | /* default to book3s_64 (970fx) */ | 1264 | /* default to book3s_64 (970fx) */ |
| 1062 | vcpu->arch.pvr = 0x3C0301; | 1265 | vcpu->arch.pvr = 0x3C0301; |
| 1266 | #else | ||
| 1267 | /* default to book3s_32 (750) */ | ||
| 1268 | vcpu->arch.pvr = 0x84202; | ||
| 1269 | #endif | ||
| 1063 | kvmppc_set_pvr(vcpu, vcpu->arch.pvr); | 1270 | kvmppc_set_pvr(vcpu, vcpu->arch.pvr); |
| 1064 | vcpu_book3s->slb_nr = 64; | 1271 | vcpu_book3s->slb_nr = 64; |
| 1065 | 1272 | ||
| @@ -1067,23 +1274,24 @@ struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id) | |||
| 1067 | vcpu->arch.trampoline_lowmem = kvmppc_trampoline_lowmem; | 1274 | vcpu->arch.trampoline_lowmem = kvmppc_trampoline_lowmem; |
| 1068 | vcpu->arch.trampoline_enter = kvmppc_trampoline_enter; | 1275 | vcpu->arch.trampoline_enter = kvmppc_trampoline_enter; |
| 1069 | vcpu->arch.highmem_handler = (ulong)kvmppc_handler_highmem; | 1276 | vcpu->arch.highmem_handler = (ulong)kvmppc_handler_highmem; |
| 1277 | #ifdef CONFIG_PPC_BOOK3S_64 | ||
| 1070 | vcpu->arch.rmcall = *(ulong*)kvmppc_rmcall; | 1278 | vcpu->arch.rmcall = *(ulong*)kvmppc_rmcall; |
| 1279 | #else | ||
| 1280 | vcpu->arch.rmcall = (ulong)kvmppc_rmcall; | ||
| 1281 | #endif | ||
| 1071 | 1282 | ||
| 1072 | vcpu->arch.shadow_msr = MSR_USER64; | 1283 | vcpu->arch.shadow_msr = MSR_USER64; |
| 1073 | 1284 | ||
| 1074 | err = __init_new_context(); | 1285 | err = kvmppc_mmu_init(vcpu); |
| 1075 | if (err < 0) | 1286 | if (err < 0) |
| 1076 | goto free_vcpu; | 1287 | goto free_shadow_vcpu; |
| 1077 | vcpu_book3s->context_id = err; | ||
| 1078 | |||
| 1079 | vcpu_book3s->vsid_max = ((vcpu_book3s->context_id + 1) << USER_ESID_BITS) - 1; | ||
| 1080 | vcpu_book3s->vsid_first = vcpu_book3s->context_id << USER_ESID_BITS; | ||
| 1081 | vcpu_book3s->vsid_next = vcpu_book3s->vsid_first; | ||
| 1082 | 1288 | ||
| 1083 | return vcpu; | 1289 | return vcpu; |
| 1084 | 1290 | ||
| 1291 | free_shadow_vcpu: | ||
| 1292 | kfree(vcpu_book3s->shadow_vcpu); | ||
| 1085 | free_vcpu: | 1293 | free_vcpu: |
| 1086 | free_pages((long)vcpu_book3s, get_order(sizeof(struct kvmppc_vcpu_book3s))); | 1294 | vfree(vcpu_book3s); |
| 1087 | out: | 1295 | out: |
| 1088 | return ERR_PTR(err); | 1296 | return ERR_PTR(err); |
| 1089 | } | 1297 | } |
| @@ -1092,9 +1300,9 @@ void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu) | |||
| 1092 | { | 1300 | { |
| 1093 | struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu); | 1301 | struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu); |
| 1094 | 1302 | ||
| 1095 | __destroy_context(vcpu_book3s->context_id); | ||
| 1096 | kvm_vcpu_uninit(vcpu); | 1303 | kvm_vcpu_uninit(vcpu); |
| 1097 | free_pages((long)vcpu_book3s, get_order(sizeof(struct kvmppc_vcpu_book3s))); | 1304 | kfree(vcpu_book3s->shadow_vcpu); |
| 1305 | vfree(vcpu_book3s); | ||
| 1098 | } | 1306 | } |
| 1099 | 1307 | ||
| 1100 | extern int __kvmppc_vcpu_entry(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu); | 1308 | extern int __kvmppc_vcpu_entry(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu); |
| @@ -1102,8 +1310,12 @@ int __kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu) | |||
| 1102 | { | 1310 | { |
| 1103 | int ret; | 1311 | int ret; |
| 1104 | struct thread_struct ext_bkp; | 1312 | struct thread_struct ext_bkp; |
| 1313 | #ifdef CONFIG_ALTIVEC | ||
| 1105 | bool save_vec = current->thread.used_vr; | 1314 | bool save_vec = current->thread.used_vr; |
| 1315 | #endif | ||
| 1316 | #ifdef CONFIG_VSX | ||
| 1106 | bool save_vsx = current->thread.used_vsr; | 1317 | bool save_vsx = current->thread.used_vsr; |
| 1318 | #endif | ||
| 1107 | ulong ext_msr; | 1319 | ulong ext_msr; |
| 1108 | 1320 | ||
| 1109 | /* No need to go into the guest when all we do is going out */ | 1321 | /* No need to go into the guest when all we do is going out */ |
| @@ -1144,6 +1356,10 @@ int __kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu) | |||
| 1144 | /* XXX we get called with irq disabled - change that! */ | 1356 | /* XXX we get called with irq disabled - change that! */ |
| 1145 | local_irq_enable(); | 1357 | local_irq_enable(); |
| 1146 | 1358 | ||
| 1359 | /* Preload FPU if it's enabled */ | ||
| 1360 | if (vcpu->arch.msr & MSR_FP) | ||
| 1361 | kvmppc_handle_ext(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, MSR_FP); | ||
| 1362 | |||
| 1147 | ret = __kvmppc_vcpu_entry(kvm_run, vcpu); | 1363 | ret = __kvmppc_vcpu_entry(kvm_run, vcpu); |
| 1148 | 1364 | ||
| 1149 | local_irq_disable(); | 1365 | local_irq_disable(); |
| @@ -1179,7 +1395,8 @@ int __kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu) | |||
| 1179 | 1395 | ||
| 1180 | static int kvmppc_book3s_init(void) | 1396 | static int kvmppc_book3s_init(void) |
| 1181 | { | 1397 | { |
| 1182 | return kvm_init(NULL, sizeof(struct kvmppc_vcpu_book3s), THIS_MODULE); | 1398 | return kvm_init(NULL, sizeof(struct kvmppc_vcpu_book3s), 0, |
| 1399 | THIS_MODULE); | ||
| 1183 | } | 1400 | } |
| 1184 | 1401 | ||
| 1185 | static void kvmppc_book3s_exit(void) | 1402 | static void kvmppc_book3s_exit(void) |
diff --git a/arch/powerpc/kvm/book3s_32_mmu.c b/arch/powerpc/kvm/book3s_32_mmu.c index faf99f20d993..0b10503c8a4a 100644 --- a/arch/powerpc/kvm/book3s_32_mmu.c +++ b/arch/powerpc/kvm/book3s_32_mmu.c | |||
| @@ -37,7 +37,7 @@ | |||
| 37 | #define dprintk(X...) do { } while(0) | 37 | #define dprintk(X...) do { } while(0) |
| 38 | #endif | 38 | #endif |
| 39 | 39 | ||
| 40 | #ifdef DEBUG_PTE | 40 | #ifdef DEBUG_MMU_PTE |
| 41 | #define dprintk_pte(X...) printk(KERN_INFO X) | 41 | #define dprintk_pte(X...) printk(KERN_INFO X) |
| 42 | #else | 42 | #else |
| 43 | #define dprintk_pte(X...) do { } while(0) | 43 | #define dprintk_pte(X...) do { } while(0) |
| @@ -45,6 +45,9 @@ | |||
| 45 | 45 | ||
| 46 | #define PTEG_FLAG_ACCESSED 0x00000100 | 46 | #define PTEG_FLAG_ACCESSED 0x00000100 |
| 47 | #define PTEG_FLAG_DIRTY 0x00000080 | 47 | #define PTEG_FLAG_DIRTY 0x00000080 |
| 48 | #ifndef SID_SHIFT | ||
| 49 | #define SID_SHIFT 28 | ||
| 50 | #endif | ||
| 48 | 51 | ||
| 49 | static inline bool check_debug_ip(struct kvm_vcpu *vcpu) | 52 | static inline bool check_debug_ip(struct kvm_vcpu *vcpu) |
| 50 | { | 53 | { |
| @@ -57,6 +60,8 @@ static inline bool check_debug_ip(struct kvm_vcpu *vcpu) | |||
| 57 | 60 | ||
| 58 | static int kvmppc_mmu_book3s_32_xlate_bat(struct kvm_vcpu *vcpu, gva_t eaddr, | 61 | static int kvmppc_mmu_book3s_32_xlate_bat(struct kvm_vcpu *vcpu, gva_t eaddr, |
| 59 | struct kvmppc_pte *pte, bool data); | 62 | struct kvmppc_pte *pte, bool data); |
| 63 | static int kvmppc_mmu_book3s_32_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid, | ||
| 64 | u64 *vsid); | ||
| 60 | 65 | ||
| 61 | static struct kvmppc_sr *find_sr(struct kvmppc_vcpu_book3s *vcpu_book3s, gva_t eaddr) | 66 | static struct kvmppc_sr *find_sr(struct kvmppc_vcpu_book3s *vcpu_book3s, gva_t eaddr) |
| 62 | { | 67 | { |
| @@ -66,13 +71,14 @@ static struct kvmppc_sr *find_sr(struct kvmppc_vcpu_book3s *vcpu_book3s, gva_t e | |||
| 66 | static u64 kvmppc_mmu_book3s_32_ea_to_vp(struct kvm_vcpu *vcpu, gva_t eaddr, | 71 | static u64 kvmppc_mmu_book3s_32_ea_to_vp(struct kvm_vcpu *vcpu, gva_t eaddr, |
| 67 | bool data) | 72 | bool data) |
| 68 | { | 73 | { |
| 69 | struct kvmppc_sr *sre = find_sr(to_book3s(vcpu), eaddr); | 74 | u64 vsid; |
| 70 | struct kvmppc_pte pte; | 75 | struct kvmppc_pte pte; |
| 71 | 76 | ||
| 72 | if (!kvmppc_mmu_book3s_32_xlate_bat(vcpu, eaddr, &pte, data)) | 77 | if (!kvmppc_mmu_book3s_32_xlate_bat(vcpu, eaddr, &pte, data)) |
| 73 | return pte.vpage; | 78 | return pte.vpage; |
| 74 | 79 | ||
| 75 | return (((u64)eaddr >> 12) & 0xffff) | (((u64)sre->vsid) << 16); | 80 | kvmppc_mmu_book3s_32_esid_to_vsid(vcpu, eaddr >> SID_SHIFT, &vsid); |
| 81 | return (((u64)eaddr >> 12) & 0xffff) | (vsid << 16); | ||
| 76 | } | 82 | } |
| 77 | 83 | ||
| 78 | static void kvmppc_mmu_book3s_32_reset_msr(struct kvm_vcpu *vcpu) | 84 | static void kvmppc_mmu_book3s_32_reset_msr(struct kvm_vcpu *vcpu) |
| @@ -142,8 +148,13 @@ static int kvmppc_mmu_book3s_32_xlate_bat(struct kvm_vcpu *vcpu, gva_t eaddr, | |||
| 142 | bat->bepi_mask); | 148 | bat->bepi_mask); |
| 143 | } | 149 | } |
| 144 | if ((eaddr & bat->bepi_mask) == bat->bepi) { | 150 | if ((eaddr & bat->bepi_mask) == bat->bepi) { |
| 151 | u64 vsid; | ||
| 152 | kvmppc_mmu_book3s_32_esid_to_vsid(vcpu, | ||
| 153 | eaddr >> SID_SHIFT, &vsid); | ||
| 154 | vsid <<= 16; | ||
| 155 | pte->vpage = (((u64)eaddr >> 12) & 0xffff) | vsid; | ||
| 156 | |||
| 145 | pte->raddr = bat->brpn | (eaddr & ~bat->bepi_mask); | 157 | pte->raddr = bat->brpn | (eaddr & ~bat->bepi_mask); |
| 146 | pte->vpage = (eaddr >> 12) | VSID_BAT; | ||
| 147 | pte->may_read = bat->pp; | 158 | pte->may_read = bat->pp; |
| 148 | pte->may_write = bat->pp > 1; | 159 | pte->may_write = bat->pp > 1; |
| 149 | pte->may_execute = true; | 160 | pte->may_execute = true; |
| @@ -172,7 +183,7 @@ static int kvmppc_mmu_book3s_32_xlate_pte(struct kvm_vcpu *vcpu, gva_t eaddr, | |||
| 172 | struct kvmppc_sr *sre; | 183 | struct kvmppc_sr *sre; |
| 173 | hva_t ptegp; | 184 | hva_t ptegp; |
| 174 | u32 pteg[16]; | 185 | u32 pteg[16]; |
| 175 | u64 ptem = 0; | 186 | u32 ptem = 0; |
| 176 | int i; | 187 | int i; |
| 177 | int found = 0; | 188 | int found = 0; |
| 178 | 189 | ||
| @@ -302,6 +313,7 @@ static void kvmppc_mmu_book3s_32_mtsrin(struct kvm_vcpu *vcpu, u32 srnum, | |||
| 302 | /* And then put in the new SR */ | 313 | /* And then put in the new SR */ |
| 303 | sre->raw = value; | 314 | sre->raw = value; |
| 304 | sre->vsid = (value & 0x0fffffff); | 315 | sre->vsid = (value & 0x0fffffff); |
| 316 | sre->valid = (value & 0x80000000) ? false : true; | ||
| 305 | sre->Ks = (value & 0x40000000) ? true : false; | 317 | sre->Ks = (value & 0x40000000) ? true : false; |
| 306 | sre->Kp = (value & 0x20000000) ? true : false; | 318 | sre->Kp = (value & 0x20000000) ? true : false; |
| 307 | sre->nx = (value & 0x10000000) ? true : false; | 319 | sre->nx = (value & 0x10000000) ? true : false; |
| @@ -312,36 +324,48 @@ static void kvmppc_mmu_book3s_32_mtsrin(struct kvm_vcpu *vcpu, u32 srnum, | |||
| 312 | 324 | ||
| 313 | static void kvmppc_mmu_book3s_32_tlbie(struct kvm_vcpu *vcpu, ulong ea, bool large) | 325 | static void kvmppc_mmu_book3s_32_tlbie(struct kvm_vcpu *vcpu, ulong ea, bool large) |
| 314 | { | 326 | { |
| 315 | kvmppc_mmu_pte_flush(vcpu, ea, ~0xFFFULL); | 327 | kvmppc_mmu_pte_flush(vcpu, ea, 0x0FFFF000); |
| 316 | } | 328 | } |
| 317 | 329 | ||
| 318 | static int kvmppc_mmu_book3s_32_esid_to_vsid(struct kvm_vcpu *vcpu, u64 esid, | 330 | static int kvmppc_mmu_book3s_32_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid, |
| 319 | u64 *vsid) | 331 | u64 *vsid) |
| 320 | { | 332 | { |
| 333 | ulong ea = esid << SID_SHIFT; | ||
| 334 | struct kvmppc_sr *sr; | ||
| 335 | u64 gvsid = esid; | ||
| 336 | |||
| 337 | if (vcpu->arch.msr & (MSR_DR|MSR_IR)) { | ||
| 338 | sr = find_sr(to_book3s(vcpu), ea); | ||
| 339 | if (sr->valid) | ||
| 340 | gvsid = sr->vsid; | ||
| 341 | } | ||
| 342 | |||
| 321 | /* In case we only have one of MSR_IR or MSR_DR set, let's put | 343 | /* In case we only have one of MSR_IR or MSR_DR set, let's put |
| 322 | that in the real-mode context (and hope RM doesn't access | 344 | that in the real-mode context (and hope RM doesn't access |
| 323 | high memory) */ | 345 | high memory) */ |
| 324 | switch (vcpu->arch.msr & (MSR_DR|MSR_IR)) { | 346 | switch (vcpu->arch.msr & (MSR_DR|MSR_IR)) { |
| 325 | case 0: | 347 | case 0: |
| 326 | *vsid = (VSID_REAL >> 16) | esid; | 348 | *vsid = VSID_REAL | esid; |
| 327 | break; | 349 | break; |
| 328 | case MSR_IR: | 350 | case MSR_IR: |
| 329 | *vsid = (VSID_REAL_IR >> 16) | esid; | 351 | *vsid = VSID_REAL_IR | gvsid; |
| 330 | break; | 352 | break; |
| 331 | case MSR_DR: | 353 | case MSR_DR: |
| 332 | *vsid = (VSID_REAL_DR >> 16) | esid; | 354 | *vsid = VSID_REAL_DR | gvsid; |
| 333 | break; | 355 | break; |
| 334 | case MSR_DR|MSR_IR: | 356 | case MSR_DR|MSR_IR: |
| 335 | { | 357 | if (!sr->valid) |
| 336 | ulong ea; | 358 | return -1; |
| 337 | ea = esid << SID_SHIFT; | 359 | |
| 338 | *vsid = find_sr(to_book3s(vcpu), ea)->vsid; | 360 | *vsid = sr->vsid; |
| 339 | break; | 361 | break; |
| 340 | } | ||
| 341 | default: | 362 | default: |
| 342 | BUG(); | 363 | BUG(); |
| 343 | } | 364 | } |
| 344 | 365 | ||
| 366 | if (vcpu->arch.msr & MSR_PR) | ||
| 367 | *vsid |= VSID_PR; | ||
| 368 | |||
| 345 | return 0; | 369 | return 0; |
| 346 | } | 370 | } |
| 347 | 371 | ||
diff --git a/arch/powerpc/kvm/book3s_32_mmu_host.c b/arch/powerpc/kvm/book3s_32_mmu_host.c new file mode 100644 index 000000000000..0bb66005338f --- /dev/null +++ b/arch/powerpc/kvm/book3s_32_mmu_host.c | |||
| @@ -0,0 +1,483 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2010 SUSE Linux Products GmbH. All rights reserved. | ||
| 3 | * | ||
| 4 | * Authors: | ||
| 5 | * Alexander Graf <agraf@suse.de> | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License, version 2, as | ||
| 9 | * published by the Free Software Foundation. | ||
| 10 | * | ||
| 11 | * This program is distributed in the hope that it will be useful, | ||
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 14 | * GNU General Public License for more details. | ||
| 15 | * | ||
| 16 | * You should have received a copy of the GNU General Public License | ||
| 17 | * along with this program; if not, write to the Free Software | ||
| 18 | * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. | ||
| 19 | */ | ||
| 20 | |||
| 21 | #include <linux/kvm_host.h> | ||
| 22 | |||
| 23 | #include <asm/kvm_ppc.h> | ||
| 24 | #include <asm/kvm_book3s.h> | ||
| 25 | #include <asm/mmu-hash32.h> | ||
| 26 | #include <asm/machdep.h> | ||
| 27 | #include <asm/mmu_context.h> | ||
| 28 | #include <asm/hw_irq.h> | ||
| 29 | |||
| 30 | /* #define DEBUG_MMU */ | ||
| 31 | /* #define DEBUG_SR */ | ||
| 32 | |||
| 33 | #ifdef DEBUG_MMU | ||
| 34 | #define dprintk_mmu(a, ...) printk(KERN_INFO a, __VA_ARGS__) | ||
| 35 | #else | ||
| 36 | #define dprintk_mmu(a, ...) do { } while(0) | ||
| 37 | #endif | ||
| 38 | |||
| 39 | #ifdef DEBUG_SR | ||
| 40 | #define dprintk_sr(a, ...) printk(KERN_INFO a, __VA_ARGS__) | ||
| 41 | #else | ||
| 42 | #define dprintk_sr(a, ...) do { } while(0) | ||
| 43 | #endif | ||
| 44 | |||
| 45 | #if PAGE_SHIFT != 12 | ||
| 46 | #error Unknown page size | ||
| 47 | #endif | ||
| 48 | |||
| 49 | #ifdef CONFIG_SMP | ||
| 50 | #error XXX need to grab mmu_hash_lock | ||
| 51 | #endif | ||
| 52 | |||
| 53 | #ifdef CONFIG_PTE_64BIT | ||
| 54 | #error Only 32 bit pages are supported for now | ||
| 55 | #endif | ||
| 56 | |||
| 57 | static ulong htab; | ||
| 58 | static u32 htabmask; | ||
| 59 | |||
| 60 | static void invalidate_pte(struct kvm_vcpu *vcpu, struct hpte_cache *pte) | ||
| 61 | { | ||
| 62 | volatile u32 *pteg; | ||
| 63 | |||
| 64 | dprintk_mmu("KVM: Flushing SPTE: 0x%llx (0x%llx) -> 0x%llx\n", | ||
| 65 | pte->pte.eaddr, pte->pte.vpage, pte->host_va); | ||
| 66 | |||
| 67 | pteg = (u32*)pte->slot; | ||
| 68 | |||
| 69 | pteg[0] = 0; | ||
| 70 | asm volatile ("sync"); | ||
| 71 | asm volatile ("tlbie %0" : : "r" (pte->pte.eaddr) : "memory"); | ||
| 72 | asm volatile ("sync"); | ||
| 73 | asm volatile ("tlbsync"); | ||
| 74 | |||
| 75 | pte->host_va = 0; | ||
| 76 | |||
| 77 | if (pte->pte.may_write) | ||
| 78 | kvm_release_pfn_dirty(pte->pfn); | ||
| 79 | else | ||
| 80 | kvm_release_pfn_clean(pte->pfn); | ||
| 81 | } | ||
| 82 | |||
| 83 | void kvmppc_mmu_pte_flush(struct kvm_vcpu *vcpu, ulong guest_ea, ulong ea_mask) | ||
| 84 | { | ||
| 85 | int i; | ||
| 86 | |||
| 87 | dprintk_mmu("KVM: Flushing %d Shadow PTEs: 0x%x & 0x%x\n", | ||
| 88 | vcpu->arch.hpte_cache_offset, guest_ea, ea_mask); | ||
| 89 | BUG_ON(vcpu->arch.hpte_cache_offset > HPTEG_CACHE_NUM); | ||
| 90 | |||
| 91 | guest_ea &= ea_mask; | ||
| 92 | for (i = 0; i < vcpu->arch.hpte_cache_offset; i++) { | ||
| 93 | struct hpte_cache *pte; | ||
| 94 | |||
| 95 | pte = &vcpu->arch.hpte_cache[i]; | ||
| 96 | if (!pte->host_va) | ||
| 97 | continue; | ||
| 98 | |||
| 99 | if ((pte->pte.eaddr & ea_mask) == guest_ea) { | ||
| 100 | invalidate_pte(vcpu, pte); | ||
| 101 | } | ||
| 102 | } | ||
| 103 | |||
| 104 | /* Doing a complete flush -> start from scratch */ | ||
| 105 | if (!ea_mask) | ||
| 106 | vcpu->arch.hpte_cache_offset = 0; | ||
| 107 | } | ||
| 108 | |||
| 109 | void kvmppc_mmu_pte_vflush(struct kvm_vcpu *vcpu, u64 guest_vp, u64 vp_mask) | ||
| 110 | { | ||
| 111 | int i; | ||
| 112 | |||
| 113 | dprintk_mmu("KVM: Flushing %d Shadow vPTEs: 0x%llx & 0x%llx\n", | ||
| 114 | vcpu->arch.hpte_cache_offset, guest_vp, vp_mask); | ||
| 115 | BUG_ON(vcpu->arch.hpte_cache_offset > HPTEG_CACHE_NUM); | ||
| 116 | |||
| 117 | guest_vp &= vp_mask; | ||
| 118 | for (i = 0; i < vcpu->arch.hpte_cache_offset; i++) { | ||
| 119 | struct hpte_cache *pte; | ||
| 120 | |||
| 121 | pte = &vcpu->arch.hpte_cache[i]; | ||
| 122 | if (!pte->host_va) | ||
| 123 | continue; | ||
| 124 | |||
| 125 | if ((pte->pte.vpage & vp_mask) == guest_vp) { | ||
| 126 | invalidate_pte(vcpu, pte); | ||
| 127 | } | ||
| 128 | } | ||
| 129 | } | ||
| 130 | |||
| 131 | void kvmppc_mmu_pte_pflush(struct kvm_vcpu *vcpu, ulong pa_start, ulong pa_end) | ||
| 132 | { | ||
| 133 | int i; | ||
| 134 | |||
| 135 | dprintk_mmu("KVM: Flushing %d Shadow pPTEs: 0x%llx & 0x%llx\n", | ||
| 136 | vcpu->arch.hpte_cache_offset, pa_start, pa_end); | ||
| 137 | BUG_ON(vcpu->arch.hpte_cache_offset > HPTEG_CACHE_NUM); | ||
| 138 | |||
| 139 | for (i = 0; i < vcpu->arch.hpte_cache_offset; i++) { | ||
| 140 | struct hpte_cache *pte; | ||
| 141 | |||
| 142 | pte = &vcpu->arch.hpte_cache[i]; | ||
| 143 | if (!pte->host_va) | ||
| 144 | continue; | ||
| 145 | |||
| 146 | if ((pte->pte.raddr >= pa_start) && | ||
| 147 | (pte->pte.raddr < pa_end)) { | ||
| 148 | invalidate_pte(vcpu, pte); | ||
| 149 | } | ||
| 150 | } | ||
| 151 | } | ||
| 152 | |||
| 153 | struct kvmppc_pte *kvmppc_mmu_find_pte(struct kvm_vcpu *vcpu, u64 ea, bool data) | ||
| 154 | { | ||
| 155 | int i; | ||
| 156 | u64 guest_vp; | ||
| 157 | |||
| 158 | guest_vp = vcpu->arch.mmu.ea_to_vp(vcpu, ea, false); | ||
| 159 | for (i=0; i<vcpu->arch.hpte_cache_offset; i++) { | ||
| 160 | struct hpte_cache *pte; | ||
| 161 | |||
| 162 | pte = &vcpu->arch.hpte_cache[i]; | ||
| 163 | if (!pte->host_va) | ||
| 164 | continue; | ||
| 165 | |||
| 166 | if (pte->pte.vpage == guest_vp) | ||
| 167 | return &pte->pte; | ||
| 168 | } | ||
| 169 | |||
| 170 | return NULL; | ||
| 171 | } | ||
| 172 | |||
| 173 | static int kvmppc_mmu_hpte_cache_next(struct kvm_vcpu *vcpu) | ||
| 174 | { | ||
| 175 | if (vcpu->arch.hpte_cache_offset == HPTEG_CACHE_NUM) | ||
| 176 | kvmppc_mmu_pte_flush(vcpu, 0, 0); | ||
| 177 | |||
| 178 | return vcpu->arch.hpte_cache_offset++; | ||
| 179 | } | ||
| 180 | |||
| 181 | /* We keep 512 gvsid->hvsid entries, mapping the guest ones to the array using | ||
| 182 | * a hash, so we don't waste cycles on looping */ | ||
| 183 | static u16 kvmppc_sid_hash(struct kvm_vcpu *vcpu, u64 gvsid) | ||
| 184 | { | ||
| 185 | return (u16)(((gvsid >> (SID_MAP_BITS * 7)) & SID_MAP_MASK) ^ | ||
| 186 | ((gvsid >> (SID_MAP_BITS * 6)) & SID_MAP_MASK) ^ | ||
| 187 | ((gvsid >> (SID_MAP_BITS * 5)) & SID_MAP_MASK) ^ | ||
| 188 | ((gvsid >> (SID_MAP_BITS * 4)) & SID_MAP_MASK) ^ | ||
| 189 | ((gvsid >> (SID_MAP_BITS * 3)) & SID_MAP_MASK) ^ | ||
| 190 | ((gvsid >> (SID_MAP_BITS * 2)) & SID_MAP_MASK) ^ | ||
| 191 | ((gvsid >> (SID_MAP_BITS * 1)) & SID_MAP_MASK) ^ | ||
| 192 | ((gvsid >> (SID_MAP_BITS * 0)) & SID_MAP_MASK)); | ||
| 193 | } | ||
| 194 | |||
| 195 | |||
| 196 | static struct kvmppc_sid_map *find_sid_vsid(struct kvm_vcpu *vcpu, u64 gvsid) | ||
| 197 | { | ||
| 198 | struct kvmppc_sid_map *map; | ||
| 199 | u16 sid_map_mask; | ||
| 200 | |||
| 201 | if (vcpu->arch.msr & MSR_PR) | ||
| 202 | gvsid |= VSID_PR; | ||
| 203 | |||
| 204 | sid_map_mask = kvmppc_sid_hash(vcpu, gvsid); | ||
| 205 | map = &to_book3s(vcpu)->sid_map[sid_map_mask]; | ||
| 206 | if (map->guest_vsid == gvsid) { | ||
| 207 | dprintk_sr("SR: Searching 0x%llx -> 0x%llx\n", | ||
| 208 | gvsid, map->host_vsid); | ||
| 209 | return map; | ||
| 210 | } | ||
| 211 | |||
| 212 | map = &to_book3s(vcpu)->sid_map[SID_MAP_MASK - sid_map_mask]; | ||
| 213 | if (map->guest_vsid == gvsid) { | ||
| 214 | dprintk_sr("SR: Searching 0x%llx -> 0x%llx\n", | ||
| 215 | gvsid, map->host_vsid); | ||
| 216 | return map; | ||
| 217 | } | ||
| 218 | |||
| 219 | dprintk_sr("SR: Searching 0x%llx -> not found\n", gvsid); | ||
| 220 | return NULL; | ||
| 221 | } | ||
| 222 | |||
| 223 | static u32 *kvmppc_mmu_get_pteg(struct kvm_vcpu *vcpu, u32 vsid, u32 eaddr, | ||
| 224 | bool primary) | ||
| 225 | { | ||
| 226 | u32 page, hash; | ||
| 227 | ulong pteg = htab; | ||
| 228 | |||
| 229 | page = (eaddr & ~ESID_MASK) >> 12; | ||
| 230 | |||
| 231 | hash = ((vsid ^ page) << 6); | ||
| 232 | if (!primary) | ||
| 233 | hash = ~hash; | ||
| 234 | |||
| 235 | hash &= htabmask; | ||
| 236 | |||
| 237 | pteg |= hash; | ||
| 238 | |||
| 239 | dprintk_mmu("htab: %lx | hash: %x | htabmask: %x | pteg: %lx\n", | ||
| 240 | htab, hash, htabmask, pteg); | ||
| 241 | |||
| 242 | return (u32*)pteg; | ||
| 243 | } | ||
| 244 | |||
| 245 | extern char etext[]; | ||
| 246 | |||
| 247 | int kvmppc_mmu_map_page(struct kvm_vcpu *vcpu, struct kvmppc_pte *orig_pte) | ||
| 248 | { | ||
| 249 | pfn_t hpaddr; | ||
| 250 | u64 va; | ||
| 251 | u64 vsid; | ||
| 252 | struct kvmppc_sid_map *map; | ||
| 253 | volatile u32 *pteg; | ||
| 254 | u32 eaddr = orig_pte->eaddr; | ||
| 255 | u32 pteg0, pteg1; | ||
| 256 | register int rr = 0; | ||
| 257 | bool primary = false; | ||
| 258 | bool evict = false; | ||
| 259 | int hpte_id; | ||
| 260 | struct hpte_cache *pte; | ||
| 261 | |||
| 262 | /* Get host physical address for gpa */ | ||
| 263 | hpaddr = gfn_to_pfn(vcpu->kvm, orig_pte->raddr >> PAGE_SHIFT); | ||
| 264 | if (kvm_is_error_hva(hpaddr)) { | ||
| 265 | printk(KERN_INFO "Couldn't get guest page for gfn %lx!\n", | ||
| 266 | orig_pte->eaddr); | ||
| 267 | return -EINVAL; | ||
| 268 | } | ||
| 269 | hpaddr <<= PAGE_SHIFT; | ||
| 270 | |||
| 271 | /* and write the mapping ea -> hpa into the pt */ | ||
| 272 | vcpu->arch.mmu.esid_to_vsid(vcpu, orig_pte->eaddr >> SID_SHIFT, &vsid); | ||
| 273 | map = find_sid_vsid(vcpu, vsid); | ||
| 274 | if (!map) { | ||
| 275 | kvmppc_mmu_map_segment(vcpu, eaddr); | ||
| 276 | map = find_sid_vsid(vcpu, vsid); | ||
| 277 | } | ||
| 278 | BUG_ON(!map); | ||
| 279 | |||
| 280 | vsid = map->host_vsid; | ||
| 281 | va = (vsid << SID_SHIFT) | (eaddr & ~ESID_MASK); | ||
| 282 | |||
| 283 | next_pteg: | ||
| 284 | if (rr == 16) { | ||
| 285 | primary = !primary; | ||
| 286 | evict = true; | ||
| 287 | rr = 0; | ||
| 288 | } | ||
| 289 | |||
| 290 | pteg = kvmppc_mmu_get_pteg(vcpu, vsid, eaddr, primary); | ||
| 291 | |||
| 292 | /* not evicting yet */ | ||
| 293 | if (!evict && (pteg[rr] & PTE_V)) { | ||
| 294 | rr += 2; | ||
| 295 | goto next_pteg; | ||
| 296 | } | ||
| 297 | |||
| 298 | dprintk_mmu("KVM: old PTEG: %p (%d)\n", pteg, rr); | ||
| 299 | dprintk_mmu("KVM: %08x - %08x\n", pteg[0], pteg[1]); | ||
| 300 | dprintk_mmu("KVM: %08x - %08x\n", pteg[2], pteg[3]); | ||
| 301 | dprintk_mmu("KVM: %08x - %08x\n", pteg[4], pteg[5]); | ||
| 302 | dprintk_mmu("KVM: %08x - %08x\n", pteg[6], pteg[7]); | ||
| 303 | dprintk_mmu("KVM: %08x - %08x\n", pteg[8], pteg[9]); | ||
| 304 | dprintk_mmu("KVM: %08x - %08x\n", pteg[10], pteg[11]); | ||
| 305 | dprintk_mmu("KVM: %08x - %08x\n", pteg[12], pteg[13]); | ||
| 306 | dprintk_mmu("KVM: %08x - %08x\n", pteg[14], pteg[15]); | ||
| 307 | |||
| 308 | pteg0 = ((eaddr & 0x0fffffff) >> 22) | (vsid << 7) | PTE_V | | ||
| 309 | (primary ? 0 : PTE_SEC); | ||
| 310 | pteg1 = hpaddr | PTE_M | PTE_R | PTE_C; | ||
| 311 | |||
| 312 | if (orig_pte->may_write) { | ||
| 313 | pteg1 |= PP_RWRW; | ||
| 314 | mark_page_dirty(vcpu->kvm, orig_pte->raddr >> PAGE_SHIFT); | ||
| 315 | } else { | ||
| 316 | pteg1 |= PP_RWRX; | ||
| 317 | } | ||
| 318 | |||
| 319 | local_irq_disable(); | ||
| 320 | |||
| 321 | if (pteg[rr]) { | ||
| 322 | pteg[rr] = 0; | ||
| 323 | asm volatile ("sync"); | ||
| 324 | } | ||
| 325 | pteg[rr + 1] = pteg1; | ||
| 326 | pteg[rr] = pteg0; | ||
| 327 | asm volatile ("sync"); | ||
| 328 | |||
| 329 | local_irq_enable(); | ||
| 330 | |||
| 331 | dprintk_mmu("KVM: new PTEG: %p\n", pteg); | ||
| 332 | dprintk_mmu("KVM: %08x - %08x\n", pteg[0], pteg[1]); | ||
| 333 | dprintk_mmu("KVM: %08x - %08x\n", pteg[2], pteg[3]); | ||
| 334 | dprintk_mmu("KVM: %08x - %08x\n", pteg[4], pteg[5]); | ||
| 335 | dprintk_mmu("KVM: %08x - %08x\n", pteg[6], pteg[7]); | ||
| 336 | dprintk_mmu("KVM: %08x - %08x\n", pteg[8], pteg[9]); | ||
| 337 | dprintk_mmu("KVM: %08x - %08x\n", pteg[10], pteg[11]); | ||
| 338 | dprintk_mmu("KVM: %08x - %08x\n", pteg[12], pteg[13]); | ||
| 339 | dprintk_mmu("KVM: %08x - %08x\n", pteg[14], pteg[15]); | ||
| 340 | |||
| 341 | |||
| 342 | /* Now tell our Shadow PTE code about the new page */ | ||
| 343 | |||
| 344 | hpte_id = kvmppc_mmu_hpte_cache_next(vcpu); | ||
| 345 | pte = &vcpu->arch.hpte_cache[hpte_id]; | ||
| 346 | |||
| 347 | dprintk_mmu("KVM: %c%c Map 0x%llx: [%lx] 0x%llx (0x%llx) -> %lx\n", | ||
| 348 | orig_pte->may_write ? 'w' : '-', | ||
| 349 | orig_pte->may_execute ? 'x' : '-', | ||
| 350 | orig_pte->eaddr, (ulong)pteg, va, | ||
| 351 | orig_pte->vpage, hpaddr); | ||
| 352 | |||
| 353 | pte->slot = (ulong)&pteg[rr]; | ||
| 354 | pte->host_va = va; | ||
| 355 | pte->pte = *orig_pte; | ||
| 356 | pte->pfn = hpaddr >> PAGE_SHIFT; | ||
| 357 | |||
| 358 | return 0; | ||
| 359 | } | ||
| 360 | |||
| 361 | static struct kvmppc_sid_map *create_sid_map(struct kvm_vcpu *vcpu, u64 gvsid) | ||
| 362 | { | ||
| 363 | struct kvmppc_sid_map *map; | ||
| 364 | struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu); | ||
| 365 | u16 sid_map_mask; | ||
| 366 | static int backwards_map = 0; | ||
| 367 | |||
| 368 | if (vcpu->arch.msr & MSR_PR) | ||
| 369 | gvsid |= VSID_PR; | ||
| 370 | |||
| 371 | /* We might get collisions that trap in preceding order, so let's | ||
| 372 | map them differently */ | ||
| 373 | |||
| 374 | sid_map_mask = kvmppc_sid_hash(vcpu, gvsid); | ||
| 375 | if (backwards_map) | ||
| 376 | sid_map_mask = SID_MAP_MASK - sid_map_mask; | ||
| 377 | |||
| 378 | map = &to_book3s(vcpu)->sid_map[sid_map_mask]; | ||
| 379 | |||
| 380 | /* Make sure we're taking the other map next time */ | ||
| 381 | backwards_map = !backwards_map; | ||
| 382 | |||
| 383 | /* Uh-oh ... out of mappings. Let's flush! */ | ||
| 384 | if (vcpu_book3s->vsid_next >= vcpu_book3s->vsid_max) { | ||
| 385 | vcpu_book3s->vsid_next = vcpu_book3s->vsid_first; | ||
| 386 | memset(vcpu_book3s->sid_map, 0, | ||
| 387 | sizeof(struct kvmppc_sid_map) * SID_MAP_NUM); | ||
| 388 | kvmppc_mmu_pte_flush(vcpu, 0, 0); | ||
| 389 | kvmppc_mmu_flush_segments(vcpu); | ||
| 390 | } | ||
| 391 | map->host_vsid = vcpu_book3s->vsid_next; | ||
| 392 | |||
| 393 | /* Would have to be 111 to be completely aligned with the rest of | ||
| 394 | Linux, but that is just way too little space! */ | ||
| 395 | vcpu_book3s->vsid_next+=1; | ||
| 396 | |||
| 397 | map->guest_vsid = gvsid; | ||
| 398 | map->valid = true; | ||
| 399 | |||
| 400 | return map; | ||
| 401 | } | ||
| 402 | |||
| 403 | int kvmppc_mmu_map_segment(struct kvm_vcpu *vcpu, ulong eaddr) | ||
| 404 | { | ||
| 405 | u32 esid = eaddr >> SID_SHIFT; | ||
| 406 | u64 gvsid; | ||
| 407 | u32 sr; | ||
| 408 | struct kvmppc_sid_map *map; | ||
| 409 | struct kvmppc_book3s_shadow_vcpu *svcpu = to_svcpu(vcpu); | ||
| 410 | |||
| 411 | if (vcpu->arch.mmu.esid_to_vsid(vcpu, esid, &gvsid)) { | ||
| 412 | /* Invalidate an entry */ | ||
| 413 | svcpu->sr[esid] = SR_INVALID; | ||
| 414 | return -ENOENT; | ||
| 415 | } | ||
| 416 | |||
| 417 | map = find_sid_vsid(vcpu, gvsid); | ||
| 418 | if (!map) | ||
| 419 | map = create_sid_map(vcpu, gvsid); | ||
| 420 | |||
| 421 | map->guest_esid = esid; | ||
| 422 | sr = map->host_vsid | SR_KP; | ||
| 423 | svcpu->sr[esid] = sr; | ||
| 424 | |||
| 425 | dprintk_sr("MMU: mtsr %d, 0x%x\n", esid, sr); | ||
| 426 | |||
| 427 | return 0; | ||
| 428 | } | ||
| 429 | |||
| 430 | void kvmppc_mmu_flush_segments(struct kvm_vcpu *vcpu) | ||
| 431 | { | ||
| 432 | int i; | ||
| 433 | struct kvmppc_book3s_shadow_vcpu *svcpu = to_svcpu(vcpu); | ||
| 434 | |||
| 435 | dprintk_sr("MMU: flushing all segments (%d)\n", ARRAY_SIZE(svcpu->sr)); | ||
| 436 | for (i = 0; i < ARRAY_SIZE(svcpu->sr); i++) | ||
| 437 | svcpu->sr[i] = SR_INVALID; | ||
| 438 | } | ||
| 439 | |||
| 440 | void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu) | ||
| 441 | { | ||
| 442 | kvmppc_mmu_pte_flush(vcpu, 0, 0); | ||
| 443 | preempt_disable(); | ||
| 444 | __destroy_context(to_book3s(vcpu)->context_id); | ||
| 445 | preempt_enable(); | ||
| 446 | } | ||
| 447 | |||
| 448 | /* From mm/mmu_context_hash32.c */ | ||
| 449 | #define CTX_TO_VSID(ctx) (((ctx) * (897 * 16)) & 0xffffff) | ||
| 450 | |||
| 451 | int kvmppc_mmu_init(struct kvm_vcpu *vcpu) | ||
| 452 | { | ||
| 453 | struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu); | ||
| 454 | int err; | ||
| 455 | ulong sdr1; | ||
| 456 | |||
| 457 | err = __init_new_context(); | ||
| 458 | if (err < 0) | ||
| 459 | return -1; | ||
| 460 | vcpu3s->context_id = err; | ||
| 461 | |||
| 462 | vcpu3s->vsid_max = CTX_TO_VSID(vcpu3s->context_id + 1) - 1; | ||
| 463 | vcpu3s->vsid_first = CTX_TO_VSID(vcpu3s->context_id); | ||
| 464 | |||
| 465 | #if 0 /* XXX still doesn't guarantee uniqueness */ | ||
| 466 | /* We could collide with the Linux vsid space because the vsid | ||
| 467 | * wraps around at 24 bits. We're safe if we do our own space | ||
| 468 | * though, so let's always set the highest bit. */ | ||
| 469 | |||
| 470 | vcpu3s->vsid_max |= 0x00800000; | ||
| 471 | vcpu3s->vsid_first |= 0x00800000; | ||
| 472 | #endif | ||
| 473 | BUG_ON(vcpu3s->vsid_max < vcpu3s->vsid_first); | ||
| 474 | |||
| 475 | vcpu3s->vsid_next = vcpu3s->vsid_first; | ||
| 476 | |||
| 477 | /* Remember where the HTAB is */ | ||
| 478 | asm ( "mfsdr1 %0" : "=r"(sdr1) ); | ||
| 479 | htabmask = ((sdr1 & 0x1FF) << 16) | 0xFFC0; | ||
| 480 | htab = (ulong)__va(sdr1 & 0xffff0000); | ||
| 481 | |||
| 482 | return 0; | ||
| 483 | } | ||
diff --git a/arch/powerpc/kvm/book3s_32_sr.S b/arch/powerpc/kvm/book3s_32_sr.S new file mode 100644 index 000000000000..3608471ad2d8 --- /dev/null +++ b/arch/powerpc/kvm/book3s_32_sr.S | |||
| @@ -0,0 +1,143 @@ | |||
| 1 | /* | ||
| 2 | * This program is free software; you can redistribute it and/or modify | ||
| 3 | * it under the terms of the GNU General Public License, version 2, as | ||
| 4 | * published by the Free Software Foundation. | ||
| 5 | * | ||
| 6 | * This program is distributed in the hope that it will be useful, | ||
| 7 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 8 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 9 | * GNU General Public License for more details. | ||
| 10 | * | ||
| 11 | * You should have received a copy of the GNU General Public License | ||
| 12 | * along with this program; if not, write to the Free Software | ||
| 13 | * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. | ||
| 14 | * | ||
| 15 | * Copyright SUSE Linux Products GmbH 2009 | ||
| 16 | * | ||
| 17 | * Authors: Alexander Graf <agraf@suse.de> | ||
| 18 | */ | ||
| 19 | |||
| 20 | /****************************************************************************** | ||
| 21 | * * | ||
| 22 | * Entry code * | ||
| 23 | * * | ||
| 24 | *****************************************************************************/ | ||
| 25 | |||
| 26 | .macro LOAD_GUEST_SEGMENTS | ||
| 27 | |||
| 28 | /* Required state: | ||
| 29 | * | ||
| 30 | * MSR = ~IR|DR | ||
| 31 | * R1 = host R1 | ||
| 32 | * R2 = host R2 | ||
| 33 | * R3 = shadow vcpu | ||
| 34 | * all other volatile GPRS = free | ||
| 35 | * SVCPU[CR] = guest CR | ||
| 36 | * SVCPU[XER] = guest XER | ||
| 37 | * SVCPU[CTR] = guest CTR | ||
| 38 | * SVCPU[LR] = guest LR | ||
| 39 | */ | ||
| 40 | |||
| 41 | #define XCHG_SR(n) lwz r9, (SVCPU_SR+(n*4))(r3); \ | ||
| 42 | mtsr n, r9 | ||
| 43 | |||
| 44 | XCHG_SR(0) | ||
| 45 | XCHG_SR(1) | ||
| 46 | XCHG_SR(2) | ||
| 47 | XCHG_SR(3) | ||
| 48 | XCHG_SR(4) | ||
| 49 | XCHG_SR(5) | ||
| 50 | XCHG_SR(6) | ||
| 51 | XCHG_SR(7) | ||
| 52 | XCHG_SR(8) | ||
| 53 | XCHG_SR(9) | ||
| 54 | XCHG_SR(10) | ||
| 55 | XCHG_SR(11) | ||
| 56 | XCHG_SR(12) | ||
| 57 | XCHG_SR(13) | ||
| 58 | XCHG_SR(14) | ||
| 59 | XCHG_SR(15) | ||
| 60 | |||
| 61 | /* Clear BATs. */ | ||
| 62 | |||
| 63 | #define KVM_KILL_BAT(n, reg) \ | ||
| 64 | mtspr SPRN_IBAT##n##U,reg; \ | ||
| 65 | mtspr SPRN_IBAT##n##L,reg; \ | ||
| 66 | mtspr SPRN_DBAT##n##U,reg; \ | ||
| 67 | mtspr SPRN_DBAT##n##L,reg; \ | ||
| 68 | |||
| 69 | li r9, 0 | ||
| 70 | KVM_KILL_BAT(0, r9) | ||
| 71 | KVM_KILL_BAT(1, r9) | ||
| 72 | KVM_KILL_BAT(2, r9) | ||
| 73 | KVM_KILL_BAT(3, r9) | ||
| 74 | |||
| 75 | .endm | ||
| 76 | |||
| 77 | /****************************************************************************** | ||
| 78 | * * | ||
| 79 | * Exit code * | ||
| 80 | * * | ||
| 81 | *****************************************************************************/ | ||
| 82 | |||
| 83 | .macro LOAD_HOST_SEGMENTS | ||
| 84 | |||
| 85 | /* Register usage at this point: | ||
| 86 | * | ||
| 87 | * R1 = host R1 | ||
| 88 | * R2 = host R2 | ||
| 89 | * R12 = exit handler id | ||
| 90 | * R13 = shadow vcpu - SHADOW_VCPU_OFF | ||
| 91 | * SVCPU.* = guest * | ||
| 92 | * SVCPU[CR] = guest CR | ||
| 93 | * SVCPU[XER] = guest XER | ||
| 94 | * SVCPU[CTR] = guest CTR | ||
| 95 | * SVCPU[LR] = guest LR | ||
| 96 | * | ||
| 97 | */ | ||
| 98 | |||
| 99 | /* Restore BATs */ | ||
| 100 | |||
| 101 | /* We only overwrite the upper part, so we only restoree | ||
| 102 | the upper part. */ | ||
| 103 | #define KVM_LOAD_BAT(n, reg, RA, RB) \ | ||
| 104 | lwz RA,(n*16)+0(reg); \ | ||
| 105 | lwz RB,(n*16)+4(reg); \ | ||
| 106 | mtspr SPRN_IBAT##n##U,RA; \ | ||
| 107 | mtspr SPRN_IBAT##n##L,RB; \ | ||
| 108 | lwz RA,(n*16)+8(reg); \ | ||
| 109 | lwz RB,(n*16)+12(reg); \ | ||
| 110 | mtspr SPRN_DBAT##n##U,RA; \ | ||
| 111 | mtspr SPRN_DBAT##n##L,RB; \ | ||
| 112 | |||
| 113 | lis r9, BATS@ha | ||
| 114 | addi r9, r9, BATS@l | ||
| 115 | tophys(r9, r9) | ||
| 116 | KVM_LOAD_BAT(0, r9, r10, r11) | ||
| 117 | KVM_LOAD_BAT(1, r9, r10, r11) | ||
| 118 | KVM_LOAD_BAT(2, r9, r10, r11) | ||
| 119 | KVM_LOAD_BAT(3, r9, r10, r11) | ||
| 120 | |||
| 121 | /* Restore Segment Registers */ | ||
| 122 | |||
| 123 | /* 0xc - 0xf */ | ||
| 124 | |||
| 125 | li r0, 4 | ||
| 126 | mtctr r0 | ||
| 127 | LOAD_REG_IMMEDIATE(r3, 0x20000000 | (0x111 * 0xc)) | ||
| 128 | lis r4, 0xc000 | ||
| 129 | 3: mtsrin r3, r4 | ||
| 130 | addi r3, r3, 0x111 /* increment VSID */ | ||
| 131 | addis r4, r4, 0x1000 /* address of next segment */ | ||
| 132 | bdnz 3b | ||
| 133 | |||
| 134 | /* 0x0 - 0xb */ | ||
| 135 | |||
| 136 | /* 'current->mm' needs to be in r4 */ | ||
| 137 | tophys(r4, r2) | ||
| 138 | lwz r4, MM(r4) | ||
| 139 | tophys(r4, r4) | ||
| 140 | /* This only clobbers r0, r3, r4 and r5 */ | ||
| 141 | bl switch_mmu_context | ||
| 142 | |||
| 143 | .endm | ||
diff --git a/arch/powerpc/kvm/book3s_64_mmu.c b/arch/powerpc/kvm/book3s_64_mmu.c index 512dcff77554..4025ea26b3c1 100644 --- a/arch/powerpc/kvm/book3s_64_mmu.c +++ b/arch/powerpc/kvm/book3s_64_mmu.c | |||
| @@ -232,7 +232,7 @@ do_second: | |||
| 232 | } | 232 | } |
| 233 | 233 | ||
| 234 | dprintk("KVM MMU: Translated 0x%lx [0x%llx] -> 0x%llx " | 234 | dprintk("KVM MMU: Translated 0x%lx [0x%llx] -> 0x%llx " |
| 235 | "-> 0x%llx\n", | 235 | "-> 0x%lx\n", |
| 236 | eaddr, avpn, gpte->vpage, gpte->raddr); | 236 | eaddr, avpn, gpte->vpage, gpte->raddr); |
| 237 | found = true; | 237 | found = true; |
| 238 | break; | 238 | break; |
| @@ -383,7 +383,7 @@ static void kvmppc_mmu_book3s_64_slbia(struct kvm_vcpu *vcpu) | |||
| 383 | 383 | ||
| 384 | if (vcpu->arch.msr & MSR_IR) { | 384 | if (vcpu->arch.msr & MSR_IR) { |
| 385 | kvmppc_mmu_flush_segments(vcpu); | 385 | kvmppc_mmu_flush_segments(vcpu); |
| 386 | kvmppc_mmu_map_segment(vcpu, vcpu->arch.pc); | 386 | kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu)); |
| 387 | } | 387 | } |
| 388 | } | 388 | } |
| 389 | 389 | ||
| @@ -439,37 +439,43 @@ static void kvmppc_mmu_book3s_64_tlbie(struct kvm_vcpu *vcpu, ulong va, | |||
| 439 | kvmppc_mmu_pte_vflush(vcpu, va >> 12, mask); | 439 | kvmppc_mmu_pte_vflush(vcpu, va >> 12, mask); |
| 440 | } | 440 | } |
| 441 | 441 | ||
| 442 | static int kvmppc_mmu_book3s_64_esid_to_vsid(struct kvm_vcpu *vcpu, u64 esid, | 442 | static int kvmppc_mmu_book3s_64_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid, |
| 443 | u64 *vsid) | 443 | u64 *vsid) |
| 444 | { | 444 | { |
| 445 | ulong ea = esid << SID_SHIFT; | ||
| 446 | struct kvmppc_slb *slb; | ||
| 447 | u64 gvsid = esid; | ||
| 448 | |||
| 449 | if (vcpu->arch.msr & (MSR_DR|MSR_IR)) { | ||
| 450 | slb = kvmppc_mmu_book3s_64_find_slbe(to_book3s(vcpu), ea); | ||
| 451 | if (slb) | ||
| 452 | gvsid = slb->vsid; | ||
| 453 | } | ||
| 454 | |||
| 445 | switch (vcpu->arch.msr & (MSR_DR|MSR_IR)) { | 455 | switch (vcpu->arch.msr & (MSR_DR|MSR_IR)) { |
| 446 | case 0: | 456 | case 0: |
| 447 | *vsid = (VSID_REAL >> 16) | esid; | 457 | *vsid = VSID_REAL | esid; |
| 448 | break; | 458 | break; |
| 449 | case MSR_IR: | 459 | case MSR_IR: |
| 450 | *vsid = (VSID_REAL_IR >> 16) | esid; | 460 | *vsid = VSID_REAL_IR | gvsid; |
| 451 | break; | 461 | break; |
| 452 | case MSR_DR: | 462 | case MSR_DR: |
| 453 | *vsid = (VSID_REAL_DR >> 16) | esid; | 463 | *vsid = VSID_REAL_DR | gvsid; |
| 454 | break; | 464 | break; |
| 455 | case MSR_DR|MSR_IR: | 465 | case MSR_DR|MSR_IR: |
| 456 | { | 466 | if (!slb) |
| 457 | ulong ea; | ||
| 458 | struct kvmppc_slb *slb; | ||
| 459 | ea = esid << SID_SHIFT; | ||
| 460 | slb = kvmppc_mmu_book3s_64_find_slbe(to_book3s(vcpu), ea); | ||
| 461 | if (slb) | ||
| 462 | *vsid = slb->vsid; | ||
| 463 | else | ||
| 464 | return -ENOENT; | 467 | return -ENOENT; |
| 465 | 468 | ||
| 469 | *vsid = gvsid; | ||
| 466 | break; | 470 | break; |
| 467 | } | ||
| 468 | default: | 471 | default: |
| 469 | BUG(); | 472 | BUG(); |
| 470 | break; | 473 | break; |
| 471 | } | 474 | } |
| 472 | 475 | ||
| 476 | if (vcpu->arch.msr & MSR_PR) | ||
| 477 | *vsid |= VSID_PR; | ||
| 478 | |||
| 473 | return 0; | 479 | return 0; |
| 474 | } | 480 | } |
| 475 | 481 | ||
diff --git a/arch/powerpc/kvm/book3s_64_mmu_host.c b/arch/powerpc/kvm/book3s_64_mmu_host.c index f2899b297ffd..e4b5744977f6 100644 --- a/arch/powerpc/kvm/book3s_64_mmu_host.c +++ b/arch/powerpc/kvm/book3s_64_mmu_host.c | |||
| @@ -48,21 +48,25 @@ | |||
| 48 | 48 | ||
| 49 | static void invalidate_pte(struct hpte_cache *pte) | 49 | static void invalidate_pte(struct hpte_cache *pte) |
| 50 | { | 50 | { |
| 51 | dprintk_mmu("KVM: Flushing SPT %d: 0x%llx (0x%llx) -> 0x%llx\n", | 51 | dprintk_mmu("KVM: Flushing SPT: 0x%lx (0x%llx) -> 0x%llx\n", |
| 52 | i, pte->pte.eaddr, pte->pte.vpage, pte->host_va); | 52 | pte->pte.eaddr, pte->pte.vpage, pte->host_va); |
| 53 | 53 | ||
| 54 | ppc_md.hpte_invalidate(pte->slot, pte->host_va, | 54 | ppc_md.hpte_invalidate(pte->slot, pte->host_va, |
| 55 | MMU_PAGE_4K, MMU_SEGSIZE_256M, | 55 | MMU_PAGE_4K, MMU_SEGSIZE_256M, |
| 56 | false); | 56 | false); |
| 57 | pte->host_va = 0; | 57 | pte->host_va = 0; |
| 58 | kvm_release_pfn_dirty(pte->pfn); | 58 | |
| 59 | if (pte->pte.may_write) | ||
| 60 | kvm_release_pfn_dirty(pte->pfn); | ||
| 61 | else | ||
| 62 | kvm_release_pfn_clean(pte->pfn); | ||
| 59 | } | 63 | } |
| 60 | 64 | ||
| 61 | void kvmppc_mmu_pte_flush(struct kvm_vcpu *vcpu, u64 guest_ea, u64 ea_mask) | 65 | void kvmppc_mmu_pte_flush(struct kvm_vcpu *vcpu, ulong guest_ea, ulong ea_mask) |
| 62 | { | 66 | { |
| 63 | int i; | 67 | int i; |
| 64 | 68 | ||
| 65 | dprintk_mmu("KVM: Flushing %d Shadow PTEs: 0x%llx & 0x%llx\n", | 69 | dprintk_mmu("KVM: Flushing %d Shadow PTEs: 0x%lx & 0x%lx\n", |
| 66 | vcpu->arch.hpte_cache_offset, guest_ea, ea_mask); | 70 | vcpu->arch.hpte_cache_offset, guest_ea, ea_mask); |
| 67 | BUG_ON(vcpu->arch.hpte_cache_offset > HPTEG_CACHE_NUM); | 71 | BUG_ON(vcpu->arch.hpte_cache_offset > HPTEG_CACHE_NUM); |
| 68 | 72 | ||
| @@ -106,12 +110,12 @@ void kvmppc_mmu_pte_vflush(struct kvm_vcpu *vcpu, u64 guest_vp, u64 vp_mask) | |||
| 106 | } | 110 | } |
| 107 | } | 111 | } |
| 108 | 112 | ||
| 109 | void kvmppc_mmu_pte_pflush(struct kvm_vcpu *vcpu, u64 pa_start, u64 pa_end) | 113 | void kvmppc_mmu_pte_pflush(struct kvm_vcpu *vcpu, ulong pa_start, ulong pa_end) |
| 110 | { | 114 | { |
| 111 | int i; | 115 | int i; |
| 112 | 116 | ||
| 113 | dprintk_mmu("KVM: Flushing %d Shadow pPTEs: 0x%llx & 0x%llx\n", | 117 | dprintk_mmu("KVM: Flushing %d Shadow pPTEs: 0x%lx & 0x%lx\n", |
| 114 | vcpu->arch.hpte_cache_offset, guest_pa, pa_mask); | 118 | vcpu->arch.hpte_cache_offset, pa_start, pa_end); |
| 115 | BUG_ON(vcpu->arch.hpte_cache_offset > HPTEG_CACHE_NUM); | 119 | BUG_ON(vcpu->arch.hpte_cache_offset > HPTEG_CACHE_NUM); |
| 116 | 120 | ||
| 117 | for (i = 0; i < vcpu->arch.hpte_cache_offset; i++) { | 121 | for (i = 0; i < vcpu->arch.hpte_cache_offset; i++) { |
| @@ -182,7 +186,7 @@ static struct kvmppc_sid_map *find_sid_vsid(struct kvm_vcpu *vcpu, u64 gvsid) | |||
| 182 | sid_map_mask = kvmppc_sid_hash(vcpu, gvsid); | 186 | sid_map_mask = kvmppc_sid_hash(vcpu, gvsid); |
| 183 | map = &to_book3s(vcpu)->sid_map[sid_map_mask]; | 187 | map = &to_book3s(vcpu)->sid_map[sid_map_mask]; |
| 184 | if (map->guest_vsid == gvsid) { | 188 | if (map->guest_vsid == gvsid) { |
| 185 | dprintk_slb("SLB: Searching 0x%llx -> 0x%llx\n", | 189 | dprintk_slb("SLB: Searching: 0x%llx -> 0x%llx\n", |
| 186 | gvsid, map->host_vsid); | 190 | gvsid, map->host_vsid); |
| 187 | return map; | 191 | return map; |
| 188 | } | 192 | } |
| @@ -194,7 +198,8 @@ static struct kvmppc_sid_map *find_sid_vsid(struct kvm_vcpu *vcpu, u64 gvsid) | |||
| 194 | return map; | 198 | return map; |
| 195 | } | 199 | } |
| 196 | 200 | ||
| 197 | dprintk_slb("SLB: Searching 0x%llx -> not found\n", gvsid); | 201 | dprintk_slb("SLB: Searching %d/%d: 0x%llx -> not found\n", |
| 202 | sid_map_mask, SID_MAP_MASK - sid_map_mask, gvsid); | ||
| 198 | return NULL; | 203 | return NULL; |
| 199 | } | 204 | } |
| 200 | 205 | ||
| @@ -212,7 +217,7 @@ int kvmppc_mmu_map_page(struct kvm_vcpu *vcpu, struct kvmppc_pte *orig_pte) | |||
| 212 | /* Get host physical address for gpa */ | 217 | /* Get host physical address for gpa */ |
| 213 | hpaddr = gfn_to_pfn(vcpu->kvm, orig_pte->raddr >> PAGE_SHIFT); | 218 | hpaddr = gfn_to_pfn(vcpu->kvm, orig_pte->raddr >> PAGE_SHIFT); |
| 214 | if (kvm_is_error_hva(hpaddr)) { | 219 | if (kvm_is_error_hva(hpaddr)) { |
| 215 | printk(KERN_INFO "Couldn't get guest page for gfn %llx!\n", orig_pte->eaddr); | 220 | printk(KERN_INFO "Couldn't get guest page for gfn %lx!\n", orig_pte->eaddr); |
| 216 | return -EINVAL; | 221 | return -EINVAL; |
| 217 | } | 222 | } |
| 218 | hpaddr <<= PAGE_SHIFT; | 223 | hpaddr <<= PAGE_SHIFT; |
| @@ -227,10 +232,16 @@ int kvmppc_mmu_map_page(struct kvm_vcpu *vcpu, struct kvmppc_pte *orig_pte) | |||
| 227 | vcpu->arch.mmu.esid_to_vsid(vcpu, orig_pte->eaddr >> SID_SHIFT, &vsid); | 232 | vcpu->arch.mmu.esid_to_vsid(vcpu, orig_pte->eaddr >> SID_SHIFT, &vsid); |
| 228 | map = find_sid_vsid(vcpu, vsid); | 233 | map = find_sid_vsid(vcpu, vsid); |
| 229 | if (!map) { | 234 | if (!map) { |
| 230 | kvmppc_mmu_map_segment(vcpu, orig_pte->eaddr); | 235 | ret = kvmppc_mmu_map_segment(vcpu, orig_pte->eaddr); |
| 236 | WARN_ON(ret < 0); | ||
| 231 | map = find_sid_vsid(vcpu, vsid); | 237 | map = find_sid_vsid(vcpu, vsid); |
| 232 | } | 238 | } |
| 233 | BUG_ON(!map); | 239 | if (!map) { |
| 240 | printk(KERN_ERR "KVM: Segment map for 0x%llx (0x%lx) failed\n", | ||
| 241 | vsid, orig_pte->eaddr); | ||
| 242 | WARN_ON(true); | ||
| 243 | return -EINVAL; | ||
| 244 | } | ||
| 234 | 245 | ||
| 235 | vsid = map->host_vsid; | 246 | vsid = map->host_vsid; |
| 236 | va = hpt_va(orig_pte->eaddr, vsid, MMU_SEGSIZE_256M); | 247 | va = hpt_va(orig_pte->eaddr, vsid, MMU_SEGSIZE_256M); |
| @@ -257,26 +268,26 @@ map_again: | |||
| 257 | 268 | ||
| 258 | if (ret < 0) { | 269 | if (ret < 0) { |
| 259 | /* If we couldn't map a primary PTE, try a secondary */ | 270 | /* If we couldn't map a primary PTE, try a secondary */ |
| 260 | #ifdef USE_SECONDARY | ||
| 261 | hash = ~hash; | 271 | hash = ~hash; |
| 272 | vflags ^= HPTE_V_SECONDARY; | ||
| 262 | attempt++; | 273 | attempt++; |
| 263 | if (attempt % 2) | ||
| 264 | vflags = HPTE_V_SECONDARY; | ||
| 265 | else | ||
| 266 | vflags = 0; | ||
| 267 | #else | ||
| 268 | attempt = 2; | ||
| 269 | #endif | ||
| 270 | goto map_again; | 274 | goto map_again; |
| 271 | } else { | 275 | } else { |
| 272 | int hpte_id = kvmppc_mmu_hpte_cache_next(vcpu); | 276 | int hpte_id = kvmppc_mmu_hpte_cache_next(vcpu); |
| 273 | struct hpte_cache *pte = &vcpu->arch.hpte_cache[hpte_id]; | 277 | struct hpte_cache *pte = &vcpu->arch.hpte_cache[hpte_id]; |
| 274 | 278 | ||
| 275 | dprintk_mmu("KVM: %c%c Map 0x%llx: [%lx] 0x%lx (0x%llx) -> %lx\n", | 279 | dprintk_mmu("KVM: %c%c Map 0x%lx: [%lx] 0x%lx (0x%llx) -> %lx\n", |
| 276 | ((rflags & HPTE_R_PP) == 3) ? '-' : 'w', | 280 | ((rflags & HPTE_R_PP) == 3) ? '-' : 'w', |
| 277 | (rflags & HPTE_R_N) ? '-' : 'x', | 281 | (rflags & HPTE_R_N) ? '-' : 'x', |
| 278 | orig_pte->eaddr, hpteg, va, orig_pte->vpage, hpaddr); | 282 | orig_pte->eaddr, hpteg, va, orig_pte->vpage, hpaddr); |
| 279 | 283 | ||
| 284 | /* The ppc_md code may give us a secondary entry even though we | ||
| 285 | asked for a primary. Fix up. */ | ||
| 286 | if ((ret & _PTEIDX_SECONDARY) && !(vflags & HPTE_V_SECONDARY)) { | ||
| 287 | hash = ~hash; | ||
| 288 | hpteg = ((hash & htab_hash_mask) * HPTES_PER_GROUP); | ||
| 289 | } | ||
| 290 | |||
| 280 | pte->slot = hpteg + (ret & 7); | 291 | pte->slot = hpteg + (ret & 7); |
| 281 | pte->host_va = va; | 292 | pte->host_va = va; |
| 282 | pte->pte = *orig_pte; | 293 | pte->pte = *orig_pte; |
| @@ -321,6 +332,9 @@ static struct kvmppc_sid_map *create_sid_map(struct kvm_vcpu *vcpu, u64 gvsid) | |||
| 321 | map->guest_vsid = gvsid; | 332 | map->guest_vsid = gvsid; |
| 322 | map->valid = true; | 333 | map->valid = true; |
| 323 | 334 | ||
| 335 | dprintk_slb("SLB: New mapping at %d: 0x%llx -> 0x%llx\n", | ||
| 336 | sid_map_mask, gvsid, map->host_vsid); | ||
| 337 | |||
| 324 | return map; | 338 | return map; |
| 325 | } | 339 | } |
| 326 | 340 | ||
| @@ -331,14 +345,14 @@ static int kvmppc_mmu_next_segment(struct kvm_vcpu *vcpu, ulong esid) | |||
| 331 | int found_inval = -1; | 345 | int found_inval = -1; |
| 332 | int r; | 346 | int r; |
| 333 | 347 | ||
| 334 | if (!get_paca()->kvm_slb_max) | 348 | if (!to_svcpu(vcpu)->slb_max) |
| 335 | get_paca()->kvm_slb_max = 1; | 349 | to_svcpu(vcpu)->slb_max = 1; |
| 336 | 350 | ||
| 337 | /* Are we overwriting? */ | 351 | /* Are we overwriting? */ |
| 338 | for (i = 1; i < get_paca()->kvm_slb_max; i++) { | 352 | for (i = 1; i < to_svcpu(vcpu)->slb_max; i++) { |
| 339 | if (!(get_paca()->kvm_slb[i].esid & SLB_ESID_V)) | 353 | if (!(to_svcpu(vcpu)->slb[i].esid & SLB_ESID_V)) |
| 340 | found_inval = i; | 354 | found_inval = i; |
| 341 | else if ((get_paca()->kvm_slb[i].esid & ESID_MASK) == esid) | 355 | else if ((to_svcpu(vcpu)->slb[i].esid & ESID_MASK) == esid) |
| 342 | return i; | 356 | return i; |
| 343 | } | 357 | } |
| 344 | 358 | ||
| @@ -352,11 +366,11 @@ static int kvmppc_mmu_next_segment(struct kvm_vcpu *vcpu, ulong esid) | |||
| 352 | max_slb_size = mmu_slb_size; | 366 | max_slb_size = mmu_slb_size; |
| 353 | 367 | ||
| 354 | /* Overflowing -> purge */ | 368 | /* Overflowing -> purge */ |
| 355 | if ((get_paca()->kvm_slb_max) == max_slb_size) | 369 | if ((to_svcpu(vcpu)->slb_max) == max_slb_size) |
| 356 | kvmppc_mmu_flush_segments(vcpu); | 370 | kvmppc_mmu_flush_segments(vcpu); |
| 357 | 371 | ||
| 358 | r = get_paca()->kvm_slb_max; | 372 | r = to_svcpu(vcpu)->slb_max; |
| 359 | get_paca()->kvm_slb_max++; | 373 | to_svcpu(vcpu)->slb_max++; |
| 360 | 374 | ||
| 361 | return r; | 375 | return r; |
| 362 | } | 376 | } |
| @@ -374,7 +388,7 @@ int kvmppc_mmu_map_segment(struct kvm_vcpu *vcpu, ulong eaddr) | |||
| 374 | 388 | ||
| 375 | if (vcpu->arch.mmu.esid_to_vsid(vcpu, esid, &gvsid)) { | 389 | if (vcpu->arch.mmu.esid_to_vsid(vcpu, esid, &gvsid)) { |
| 376 | /* Invalidate an entry */ | 390 | /* Invalidate an entry */ |
| 377 | get_paca()->kvm_slb[slb_index].esid = 0; | 391 | to_svcpu(vcpu)->slb[slb_index].esid = 0; |
| 378 | return -ENOENT; | 392 | return -ENOENT; |
| 379 | } | 393 | } |
| 380 | 394 | ||
| @@ -388,8 +402,8 @@ int kvmppc_mmu_map_segment(struct kvm_vcpu *vcpu, ulong eaddr) | |||
| 388 | slb_vsid &= ~SLB_VSID_KP; | 402 | slb_vsid &= ~SLB_VSID_KP; |
| 389 | slb_esid |= slb_index; | 403 | slb_esid |= slb_index; |
| 390 | 404 | ||
| 391 | get_paca()->kvm_slb[slb_index].esid = slb_esid; | 405 | to_svcpu(vcpu)->slb[slb_index].esid = slb_esid; |
| 392 | get_paca()->kvm_slb[slb_index].vsid = slb_vsid; | 406 | to_svcpu(vcpu)->slb[slb_index].vsid = slb_vsid; |
| 393 | 407 | ||
| 394 | dprintk_slb("slbmte %#llx, %#llx\n", slb_vsid, slb_esid); | 408 | dprintk_slb("slbmte %#llx, %#llx\n", slb_vsid, slb_esid); |
| 395 | 409 | ||
| @@ -398,11 +412,29 @@ int kvmppc_mmu_map_segment(struct kvm_vcpu *vcpu, ulong eaddr) | |||
| 398 | 412 | ||
| 399 | void kvmppc_mmu_flush_segments(struct kvm_vcpu *vcpu) | 413 | void kvmppc_mmu_flush_segments(struct kvm_vcpu *vcpu) |
| 400 | { | 414 | { |
| 401 | get_paca()->kvm_slb_max = 1; | 415 | to_svcpu(vcpu)->slb_max = 1; |
| 402 | get_paca()->kvm_slb[0].esid = 0; | 416 | to_svcpu(vcpu)->slb[0].esid = 0; |
| 403 | } | 417 | } |
| 404 | 418 | ||
| 405 | void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu) | 419 | void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu) |
| 406 | { | 420 | { |
| 407 | kvmppc_mmu_pte_flush(vcpu, 0, 0); | 421 | kvmppc_mmu_pte_flush(vcpu, 0, 0); |
| 422 | __destroy_context(to_book3s(vcpu)->context_id); | ||
| 423 | } | ||
| 424 | |||
| 425 | int kvmppc_mmu_init(struct kvm_vcpu *vcpu) | ||
| 426 | { | ||
| 427 | struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu); | ||
| 428 | int err; | ||
| 429 | |||
| 430 | err = __init_new_context(); | ||
| 431 | if (err < 0) | ||
| 432 | return -1; | ||
| 433 | vcpu3s->context_id = err; | ||
| 434 | |||
| 435 | vcpu3s->vsid_max = ((vcpu3s->context_id + 1) << USER_ESID_BITS) - 1; | ||
| 436 | vcpu3s->vsid_first = vcpu3s->context_id << USER_ESID_BITS; | ||
| 437 | vcpu3s->vsid_next = vcpu3s->vsid_first; | ||
| 438 | |||
| 439 | return 0; | ||
| 408 | } | 440 | } |
diff --git a/arch/powerpc/kvm/book3s_64_slb.S b/arch/powerpc/kvm/book3s_64_slb.S index 35b762722187..04e7d3bbfe8b 100644 --- a/arch/powerpc/kvm/book3s_64_slb.S +++ b/arch/powerpc/kvm/book3s_64_slb.S | |||
| @@ -44,8 +44,7 @@ slb_exit_skip_ ## num: | |||
| 44 | * * | 44 | * * |
| 45 | *****************************************************************************/ | 45 | *****************************************************************************/ |
| 46 | 46 | ||
| 47 | .global kvmppc_handler_trampoline_enter | 47 | .macro LOAD_GUEST_SEGMENTS |
| 48 | kvmppc_handler_trampoline_enter: | ||
| 49 | 48 | ||
| 50 | /* Required state: | 49 | /* Required state: |
| 51 | * | 50 | * |
| @@ -53,20 +52,14 @@ kvmppc_handler_trampoline_enter: | |||
| 53 | * R13 = PACA | 52 | * R13 = PACA |
| 54 | * R1 = host R1 | 53 | * R1 = host R1 |
| 55 | * R2 = host R2 | 54 | * R2 = host R2 |
| 56 | * R9 = guest IP | 55 | * R3 = shadow vcpu |
| 57 | * R10 = guest MSR | 56 | * all other volatile GPRS = free |
| 58 | * all other GPRS = free | 57 | * SVCPU[CR] = guest CR |
| 59 | * PACA[KVM_CR] = guest CR | 58 | * SVCPU[XER] = guest XER |
| 60 | * PACA[KVM_XER] = guest XER | 59 | * SVCPU[CTR] = guest CTR |
| 60 | * SVCPU[LR] = guest LR | ||
| 61 | */ | 61 | */ |
| 62 | 62 | ||
| 63 | mtsrr0 r9 | ||
| 64 | mtsrr1 r10 | ||
| 65 | |||
| 66 | /* Activate guest mode, so faults get handled by KVM */ | ||
| 67 | li r11, KVM_GUEST_MODE_GUEST | ||
| 68 | stb r11, PACA_KVM_IN_GUEST(r13) | ||
| 69 | |||
| 70 | /* Remove LPAR shadow entries */ | 63 | /* Remove LPAR shadow entries */ |
| 71 | 64 | ||
| 72 | #if SLB_NUM_BOLTED == 3 | 65 | #if SLB_NUM_BOLTED == 3 |
| @@ -101,14 +94,14 @@ kvmppc_handler_trampoline_enter: | |||
| 101 | 94 | ||
| 102 | /* Fill SLB with our shadow */ | 95 | /* Fill SLB with our shadow */ |
| 103 | 96 | ||
| 104 | lbz r12, PACA_KVM_SLB_MAX(r13) | 97 | lbz r12, SVCPU_SLB_MAX(r3) |
| 105 | mulli r12, r12, 16 | 98 | mulli r12, r12, 16 |
| 106 | addi r12, r12, PACA_KVM_SLB | 99 | addi r12, r12, SVCPU_SLB |
| 107 | add r12, r12, r13 | 100 | add r12, r12, r3 |
| 108 | 101 | ||
| 109 | /* for (r11 = kvm_slb; r11 < kvm_slb + kvm_slb_size; r11+=slb_entry) */ | 102 | /* for (r11 = kvm_slb; r11 < kvm_slb + kvm_slb_size; r11+=slb_entry) */ |
| 110 | li r11, PACA_KVM_SLB | 103 | li r11, SVCPU_SLB |
| 111 | add r11, r11, r13 | 104 | add r11, r11, r3 |
| 112 | 105 | ||
| 113 | slb_loop_enter: | 106 | slb_loop_enter: |
| 114 | 107 | ||
| @@ -127,34 +120,7 @@ slb_loop_enter_skip: | |||
| 127 | 120 | ||
| 128 | slb_do_enter: | 121 | slb_do_enter: |
| 129 | 122 | ||
| 130 | /* Enter guest */ | 123 | .endm |
| 131 | |||
| 132 | ld r0, (PACA_KVM_R0)(r13) | ||
| 133 | ld r1, (PACA_KVM_R1)(r13) | ||
| 134 | ld r2, (PACA_KVM_R2)(r13) | ||
| 135 | ld r3, (PACA_KVM_R3)(r13) | ||
| 136 | ld r4, (PACA_KVM_R4)(r13) | ||
| 137 | ld r5, (PACA_KVM_R5)(r13) | ||
| 138 | ld r6, (PACA_KVM_R6)(r13) | ||
| 139 | ld r7, (PACA_KVM_R7)(r13) | ||
| 140 | ld r8, (PACA_KVM_R8)(r13) | ||
| 141 | ld r9, (PACA_KVM_R9)(r13) | ||
| 142 | ld r10, (PACA_KVM_R10)(r13) | ||
| 143 | ld r12, (PACA_KVM_R12)(r13) | ||
| 144 | |||
| 145 | lwz r11, (PACA_KVM_CR)(r13) | ||
| 146 | mtcr r11 | ||
| 147 | |||
| 148 | ld r11, (PACA_KVM_XER)(r13) | ||
| 149 | mtxer r11 | ||
| 150 | |||
| 151 | ld r11, (PACA_KVM_R11)(r13) | ||
| 152 | ld r13, (PACA_KVM_R13)(r13) | ||
| 153 | |||
| 154 | RFI | ||
| 155 | kvmppc_handler_trampoline_enter_end: | ||
| 156 | |||
| 157 | |||
| 158 | 124 | ||
| 159 | /****************************************************************************** | 125 | /****************************************************************************** |
| 160 | * * | 126 | * * |
| @@ -162,99 +128,22 @@ kvmppc_handler_trampoline_enter_end: | |||
| 162 | * * | 128 | * * |
| 163 | *****************************************************************************/ | 129 | *****************************************************************************/ |
| 164 | 130 | ||
| 165 | .global kvmppc_handler_trampoline_exit | 131 | .macro LOAD_HOST_SEGMENTS |
| 166 | kvmppc_handler_trampoline_exit: | ||
| 167 | 132 | ||
| 168 | /* Register usage at this point: | 133 | /* Register usage at this point: |
| 169 | * | 134 | * |
| 170 | * SPRG_SCRATCH0 = guest R13 | 135 | * R1 = host R1 |
| 171 | * R12 = exit handler id | 136 | * R2 = host R2 |
| 172 | * R13 = PACA | 137 | * R12 = exit handler id |
| 173 | * PACA.KVM.SCRATCH0 = guest R12 | 138 | * R13 = shadow vcpu - SHADOW_VCPU_OFF [=PACA on PPC64] |
| 174 | * PACA.KVM.SCRATCH1 = guest CR | 139 | * SVCPU.* = guest * |
| 140 | * SVCPU[CR] = guest CR | ||
| 141 | * SVCPU[XER] = guest XER | ||
| 142 | * SVCPU[CTR] = guest CTR | ||
| 143 | * SVCPU[LR] = guest LR | ||
| 175 | * | 144 | * |
| 176 | */ | 145 | */ |
| 177 | 146 | ||
| 178 | /* Save registers */ | ||
| 179 | |||
| 180 | std r0, PACA_KVM_R0(r13) | ||
| 181 | std r1, PACA_KVM_R1(r13) | ||
| 182 | std r2, PACA_KVM_R2(r13) | ||
| 183 | std r3, PACA_KVM_R3(r13) | ||
| 184 | std r4, PACA_KVM_R4(r13) | ||
| 185 | std r5, PACA_KVM_R5(r13) | ||
| 186 | std r6, PACA_KVM_R6(r13) | ||
| 187 | std r7, PACA_KVM_R7(r13) | ||
| 188 | std r8, PACA_KVM_R8(r13) | ||
| 189 | std r9, PACA_KVM_R9(r13) | ||
| 190 | std r10, PACA_KVM_R10(r13) | ||
| 191 | std r11, PACA_KVM_R11(r13) | ||
| 192 | |||
| 193 | /* Restore R1/R2 so we can handle faults */ | ||
| 194 | ld r1, PACA_KVM_HOST_R1(r13) | ||
| 195 | ld r2, PACA_KVM_HOST_R2(r13) | ||
| 196 | |||
| 197 | /* Save guest PC and MSR in GPRs */ | ||
| 198 | mfsrr0 r3 | ||
| 199 | mfsrr1 r4 | ||
| 200 | |||
| 201 | /* Get scratch'ed off registers */ | ||
| 202 | mfspr r9, SPRN_SPRG_SCRATCH0 | ||
| 203 | std r9, PACA_KVM_R13(r13) | ||
| 204 | |||
| 205 | ld r8, PACA_KVM_SCRATCH0(r13) | ||
| 206 | std r8, PACA_KVM_R12(r13) | ||
| 207 | |||
| 208 | lwz r7, PACA_KVM_SCRATCH1(r13) | ||
| 209 | stw r7, PACA_KVM_CR(r13) | ||
| 210 | |||
| 211 | /* Save more register state */ | ||
| 212 | |||
| 213 | mfxer r6 | ||
| 214 | stw r6, PACA_KVM_XER(r13) | ||
| 215 | |||
| 216 | mfdar r5 | ||
| 217 | mfdsisr r6 | ||
| 218 | |||
| 219 | /* | ||
| 220 | * In order for us to easily get the last instruction, | ||
| 221 | * we got the #vmexit at, we exploit the fact that the | ||
| 222 | * virtual layout is still the same here, so we can just | ||
| 223 | * ld from the guest's PC address | ||
| 224 | */ | ||
| 225 | |||
| 226 | /* We only load the last instruction when it's safe */ | ||
| 227 | cmpwi r12, BOOK3S_INTERRUPT_DATA_STORAGE | ||
| 228 | beq ld_last_inst | ||
| 229 | cmpwi r12, BOOK3S_INTERRUPT_PROGRAM | ||
| 230 | beq ld_last_inst | ||
| 231 | |||
| 232 | b no_ld_last_inst | ||
| 233 | |||
| 234 | ld_last_inst: | ||
| 235 | /* Save off the guest instruction we're at */ | ||
| 236 | |||
| 237 | /* Set guest mode to 'jump over instruction' so if lwz faults | ||
| 238 | * we'll just continue at the next IP. */ | ||
| 239 | li r9, KVM_GUEST_MODE_SKIP | ||
| 240 | stb r9, PACA_KVM_IN_GUEST(r13) | ||
| 241 | |||
| 242 | /* 1) enable paging for data */ | ||
| 243 | mfmsr r9 | ||
| 244 | ori r11, r9, MSR_DR /* Enable paging for data */ | ||
| 245 | mtmsr r11 | ||
| 246 | /* 2) fetch the instruction */ | ||
| 247 | li r0, KVM_INST_FETCH_FAILED /* In case lwz faults */ | ||
| 248 | lwz r0, 0(r3) | ||
| 249 | /* 3) disable paging again */ | ||
| 250 | mtmsr r9 | ||
| 251 | |||
| 252 | no_ld_last_inst: | ||
| 253 | |||
| 254 | /* Unset guest mode */ | ||
| 255 | li r9, KVM_GUEST_MODE_NONE | ||
| 256 | stb r9, PACA_KVM_IN_GUEST(r13) | ||
| 257 | |||
| 258 | /* Restore bolted entries from the shadow and fix it along the way */ | 147 | /* Restore bolted entries from the shadow and fix it along the way */ |
| 259 | 148 | ||
| 260 | /* We don't store anything in entry 0, so we don't need to take care of it */ | 149 | /* We don't store anything in entry 0, so we don't need to take care of it */ |
| @@ -275,28 +164,4 @@ no_ld_last_inst: | |||
| 275 | 164 | ||
| 276 | slb_do_exit: | 165 | slb_do_exit: |
| 277 | 166 | ||
| 278 | /* Register usage at this point: | 167 | .endm |
| 279 | * | ||
| 280 | * R0 = guest last inst | ||
| 281 | * R1 = host R1 | ||
| 282 | * R2 = host R2 | ||
| 283 | * R3 = guest PC | ||
| 284 | * R4 = guest MSR | ||
| 285 | * R5 = guest DAR | ||
| 286 | * R6 = guest DSISR | ||
| 287 | * R12 = exit handler id | ||
| 288 | * R13 = PACA | ||
| 289 | * PACA.KVM.* = guest * | ||
| 290 | * | ||
| 291 | */ | ||
| 292 | |||
| 293 | /* RFI into the highmem handler */ | ||
| 294 | mfmsr r7 | ||
| 295 | ori r7, r7, MSR_IR|MSR_DR|MSR_RI /* Enable paging */ | ||
| 296 | mtsrr1 r7 | ||
| 297 | ld r8, PACA_KVM_VMHANDLER(r13) /* Highmem handler address */ | ||
| 298 | mtsrr0 r8 | ||
| 299 | |||
| 300 | RFI | ||
| 301 | kvmppc_handler_trampoline_exit_end: | ||
| 302 | |||
diff --git a/arch/powerpc/kvm/book3s_64_emulate.c b/arch/powerpc/kvm/book3s_emulate.c index 2b0ee7e040c9..c85f906038ce 100644 --- a/arch/powerpc/kvm/book3s_64_emulate.c +++ b/arch/powerpc/kvm/book3s_emulate.c | |||
| @@ -28,13 +28,16 @@ | |||
| 28 | #define OP_31_XOP_MFMSR 83 | 28 | #define OP_31_XOP_MFMSR 83 |
| 29 | #define OP_31_XOP_MTMSR 146 | 29 | #define OP_31_XOP_MTMSR 146 |
| 30 | #define OP_31_XOP_MTMSRD 178 | 30 | #define OP_31_XOP_MTMSRD 178 |
| 31 | #define OP_31_XOP_MTSR 210 | ||
| 31 | #define OP_31_XOP_MTSRIN 242 | 32 | #define OP_31_XOP_MTSRIN 242 |
| 32 | #define OP_31_XOP_TLBIEL 274 | 33 | #define OP_31_XOP_TLBIEL 274 |
| 33 | #define OP_31_XOP_TLBIE 306 | 34 | #define OP_31_XOP_TLBIE 306 |
| 34 | #define OP_31_XOP_SLBMTE 402 | 35 | #define OP_31_XOP_SLBMTE 402 |
| 35 | #define OP_31_XOP_SLBIE 434 | 36 | #define OP_31_XOP_SLBIE 434 |
| 36 | #define OP_31_XOP_SLBIA 498 | 37 | #define OP_31_XOP_SLBIA 498 |
| 38 | #define OP_31_XOP_MFSR 595 | ||
| 37 | #define OP_31_XOP_MFSRIN 659 | 39 | #define OP_31_XOP_MFSRIN 659 |
| 40 | #define OP_31_XOP_DCBA 758 | ||
| 38 | #define OP_31_XOP_SLBMFEV 851 | 41 | #define OP_31_XOP_SLBMFEV 851 |
| 39 | #define OP_31_XOP_EIOIO 854 | 42 | #define OP_31_XOP_EIOIO 854 |
| 40 | #define OP_31_XOP_SLBMFEE 915 | 43 | #define OP_31_XOP_SLBMFEE 915 |
| @@ -42,6 +45,24 @@ | |||
| 42 | /* DCBZ is actually 1014, but we patch it to 1010 so we get a trap */ | 45 | /* DCBZ is actually 1014, but we patch it to 1010 so we get a trap */ |
| 43 | #define OP_31_XOP_DCBZ 1010 | 46 | #define OP_31_XOP_DCBZ 1010 |
| 44 | 47 | ||
| 48 | #define OP_LFS 48 | ||
| 49 | #define OP_LFD 50 | ||
| 50 | #define OP_STFS 52 | ||
| 51 | #define OP_STFD 54 | ||
| 52 | |||
| 53 | #define SPRN_GQR0 912 | ||
| 54 | #define SPRN_GQR1 913 | ||
| 55 | #define SPRN_GQR2 914 | ||
| 56 | #define SPRN_GQR3 915 | ||
| 57 | #define SPRN_GQR4 916 | ||
| 58 | #define SPRN_GQR5 917 | ||
| 59 | #define SPRN_GQR6 918 | ||
| 60 | #define SPRN_GQR7 919 | ||
| 61 | |||
| 62 | /* Book3S_32 defines mfsrin(v) - but that messes up our abstract | ||
| 63 | * function pointers, so let's just disable the define. */ | ||
| 64 | #undef mfsrin | ||
| 65 | |||
| 45 | int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu, | 66 | int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu, |
| 46 | unsigned int inst, int *advance) | 67 | unsigned int inst, int *advance) |
| 47 | { | 68 | { |
| @@ -52,7 +73,7 @@ int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu, | |||
| 52 | switch (get_xop(inst)) { | 73 | switch (get_xop(inst)) { |
| 53 | case OP_19_XOP_RFID: | 74 | case OP_19_XOP_RFID: |
| 54 | case OP_19_XOP_RFI: | 75 | case OP_19_XOP_RFI: |
| 55 | vcpu->arch.pc = vcpu->arch.srr0; | 76 | kvmppc_set_pc(vcpu, vcpu->arch.srr0); |
| 56 | kvmppc_set_msr(vcpu, vcpu->arch.srr1); | 77 | kvmppc_set_msr(vcpu, vcpu->arch.srr1); |
| 57 | *advance = 0; | 78 | *advance = 0; |
| 58 | break; | 79 | break; |
| @@ -80,6 +101,18 @@ int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu, | |||
| 80 | case OP_31_XOP_MTMSR: | 101 | case OP_31_XOP_MTMSR: |
| 81 | kvmppc_set_msr(vcpu, kvmppc_get_gpr(vcpu, get_rs(inst))); | 102 | kvmppc_set_msr(vcpu, kvmppc_get_gpr(vcpu, get_rs(inst))); |
| 82 | break; | 103 | break; |
| 104 | case OP_31_XOP_MFSR: | ||
| 105 | { | ||
| 106 | int srnum; | ||
| 107 | |||
| 108 | srnum = kvmppc_get_field(inst, 12 + 32, 15 + 32); | ||
| 109 | if (vcpu->arch.mmu.mfsrin) { | ||
| 110 | u32 sr; | ||
| 111 | sr = vcpu->arch.mmu.mfsrin(vcpu, srnum); | ||
| 112 | kvmppc_set_gpr(vcpu, get_rt(inst), sr); | ||
| 113 | } | ||
| 114 | break; | ||
| 115 | } | ||
| 83 | case OP_31_XOP_MFSRIN: | 116 | case OP_31_XOP_MFSRIN: |
| 84 | { | 117 | { |
| 85 | int srnum; | 118 | int srnum; |
| @@ -92,6 +125,11 @@ int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu, | |||
| 92 | } | 125 | } |
| 93 | break; | 126 | break; |
| 94 | } | 127 | } |
| 128 | case OP_31_XOP_MTSR: | ||
| 129 | vcpu->arch.mmu.mtsrin(vcpu, | ||
| 130 | (inst >> 16) & 0xf, | ||
| 131 | kvmppc_get_gpr(vcpu, get_rs(inst))); | ||
| 132 | break; | ||
| 95 | case OP_31_XOP_MTSRIN: | 133 | case OP_31_XOP_MTSRIN: |
| 96 | vcpu->arch.mmu.mtsrin(vcpu, | 134 | vcpu->arch.mmu.mtsrin(vcpu, |
| 97 | (kvmppc_get_gpr(vcpu, get_rb(inst)) >> 28) & 0xf, | 135 | (kvmppc_get_gpr(vcpu, get_rb(inst)) >> 28) & 0xf, |
| @@ -150,12 +188,17 @@ int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu, | |||
| 150 | kvmppc_set_gpr(vcpu, get_rt(inst), t); | 188 | kvmppc_set_gpr(vcpu, get_rt(inst), t); |
| 151 | } | 189 | } |
| 152 | break; | 190 | break; |
| 191 | case OP_31_XOP_DCBA: | ||
| 192 | /* Gets treated as NOP */ | ||
| 193 | break; | ||
| 153 | case OP_31_XOP_DCBZ: | 194 | case OP_31_XOP_DCBZ: |
| 154 | { | 195 | { |
| 155 | ulong rb = kvmppc_get_gpr(vcpu, get_rb(inst)); | 196 | ulong rb = kvmppc_get_gpr(vcpu, get_rb(inst)); |
| 156 | ulong ra = 0; | 197 | ulong ra = 0; |
| 157 | ulong addr; | 198 | ulong addr, vaddr; |
| 158 | u32 zeros[8] = { 0, 0, 0, 0, 0, 0, 0, 0 }; | 199 | u32 zeros[8] = { 0, 0, 0, 0, 0, 0, 0, 0 }; |
| 200 | u32 dsisr; | ||
| 201 | int r; | ||
| 159 | 202 | ||
| 160 | if (get_ra(inst)) | 203 | if (get_ra(inst)) |
| 161 | ra = kvmppc_get_gpr(vcpu, get_ra(inst)); | 204 | ra = kvmppc_get_gpr(vcpu, get_ra(inst)); |
| @@ -163,15 +206,25 @@ int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu, | |||
| 163 | addr = (ra + rb) & ~31ULL; | 206 | addr = (ra + rb) & ~31ULL; |
| 164 | if (!(vcpu->arch.msr & MSR_SF)) | 207 | if (!(vcpu->arch.msr & MSR_SF)) |
| 165 | addr &= 0xffffffff; | 208 | addr &= 0xffffffff; |
| 209 | vaddr = addr; | ||
| 210 | |||
| 211 | r = kvmppc_st(vcpu, &addr, 32, zeros, true); | ||
| 212 | if ((r == -ENOENT) || (r == -EPERM)) { | ||
| 213 | *advance = 0; | ||
| 214 | vcpu->arch.dear = vaddr; | ||
| 215 | to_svcpu(vcpu)->fault_dar = vaddr; | ||
| 216 | |||
| 217 | dsisr = DSISR_ISSTORE; | ||
| 218 | if (r == -ENOENT) | ||
| 219 | dsisr |= DSISR_NOHPTE; | ||
| 220 | else if (r == -EPERM) | ||
| 221 | dsisr |= DSISR_PROTFAULT; | ||
| 222 | |||
| 223 | to_book3s(vcpu)->dsisr = dsisr; | ||
| 224 | to_svcpu(vcpu)->fault_dsisr = dsisr; | ||
| 166 | 225 | ||
| 167 | if (kvmppc_st(vcpu, addr, 32, zeros)) { | ||
| 168 | vcpu->arch.dear = addr; | ||
| 169 | vcpu->arch.fault_dear = addr; | ||
| 170 | to_book3s(vcpu)->dsisr = DSISR_PROTFAULT | | ||
| 171 | DSISR_ISSTORE; | ||
| 172 | kvmppc_book3s_queue_irqprio(vcpu, | 226 | kvmppc_book3s_queue_irqprio(vcpu, |
| 173 | BOOK3S_INTERRUPT_DATA_STORAGE); | 227 | BOOK3S_INTERRUPT_DATA_STORAGE); |
| 174 | kvmppc_mmu_pte_flush(vcpu, addr, ~0xFFFULL); | ||
| 175 | } | 228 | } |
| 176 | 229 | ||
| 177 | break; | 230 | break; |
| @@ -184,6 +237,9 @@ int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu, | |||
| 184 | emulated = EMULATE_FAIL; | 237 | emulated = EMULATE_FAIL; |
| 185 | } | 238 | } |
| 186 | 239 | ||
| 240 | if (emulated == EMULATE_FAIL) | ||
| 241 | emulated = kvmppc_emulate_paired_single(run, vcpu); | ||
| 242 | |||
| 187 | return emulated; | 243 | return emulated; |
| 188 | } | 244 | } |
| 189 | 245 | ||
| @@ -207,6 +263,34 @@ void kvmppc_set_bat(struct kvm_vcpu *vcpu, struct kvmppc_bat *bat, bool upper, | |||
| 207 | } | 263 | } |
| 208 | } | 264 | } |
| 209 | 265 | ||
| 266 | static u32 kvmppc_read_bat(struct kvm_vcpu *vcpu, int sprn) | ||
| 267 | { | ||
| 268 | struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu); | ||
| 269 | struct kvmppc_bat *bat; | ||
| 270 | |||
| 271 | switch (sprn) { | ||
| 272 | case SPRN_IBAT0U ... SPRN_IBAT3L: | ||
| 273 | bat = &vcpu_book3s->ibat[(sprn - SPRN_IBAT0U) / 2]; | ||
| 274 | break; | ||
| 275 | case SPRN_IBAT4U ... SPRN_IBAT7L: | ||
| 276 | bat = &vcpu_book3s->ibat[4 + ((sprn - SPRN_IBAT4U) / 2)]; | ||
| 277 | break; | ||
| 278 | case SPRN_DBAT0U ... SPRN_DBAT3L: | ||
| 279 | bat = &vcpu_book3s->dbat[(sprn - SPRN_DBAT0U) / 2]; | ||
| 280 | break; | ||
| 281 | case SPRN_DBAT4U ... SPRN_DBAT7L: | ||
| 282 | bat = &vcpu_book3s->dbat[4 + ((sprn - SPRN_DBAT4U) / 2)]; | ||
| 283 | break; | ||
| 284 | default: | ||
| 285 | BUG(); | ||
| 286 | } | ||
| 287 | |||
| 288 | if (sprn % 2) | ||
| 289 | return bat->raw >> 32; | ||
| 290 | else | ||
| 291 | return bat->raw; | ||
| 292 | } | ||
| 293 | |||
| 210 | static void kvmppc_write_bat(struct kvm_vcpu *vcpu, int sprn, u32 val) | 294 | static void kvmppc_write_bat(struct kvm_vcpu *vcpu, int sprn, u32 val) |
| 211 | { | 295 | { |
| 212 | struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu); | 296 | struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu); |
| @@ -217,13 +301,13 @@ static void kvmppc_write_bat(struct kvm_vcpu *vcpu, int sprn, u32 val) | |||
| 217 | bat = &vcpu_book3s->ibat[(sprn - SPRN_IBAT0U) / 2]; | 301 | bat = &vcpu_book3s->ibat[(sprn - SPRN_IBAT0U) / 2]; |
| 218 | break; | 302 | break; |
| 219 | case SPRN_IBAT4U ... SPRN_IBAT7L: | 303 | case SPRN_IBAT4U ... SPRN_IBAT7L: |
| 220 | bat = &vcpu_book3s->ibat[(sprn - SPRN_IBAT4U) / 2]; | 304 | bat = &vcpu_book3s->ibat[4 + ((sprn - SPRN_IBAT4U) / 2)]; |
| 221 | break; | 305 | break; |
| 222 | case SPRN_DBAT0U ... SPRN_DBAT3L: | 306 | case SPRN_DBAT0U ... SPRN_DBAT3L: |
| 223 | bat = &vcpu_book3s->dbat[(sprn - SPRN_DBAT0U) / 2]; | 307 | bat = &vcpu_book3s->dbat[(sprn - SPRN_DBAT0U) / 2]; |
| 224 | break; | 308 | break; |
| 225 | case SPRN_DBAT4U ... SPRN_DBAT7L: | 309 | case SPRN_DBAT4U ... SPRN_DBAT7L: |
| 226 | bat = &vcpu_book3s->dbat[(sprn - SPRN_DBAT4U) / 2]; | 310 | bat = &vcpu_book3s->dbat[4 + ((sprn - SPRN_DBAT4U) / 2)]; |
| 227 | break; | 311 | break; |
| 228 | default: | 312 | default: |
| 229 | BUG(); | 313 | BUG(); |
| @@ -258,6 +342,7 @@ int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs) | |||
| 258 | /* BAT writes happen so rarely that we're ok to flush | 342 | /* BAT writes happen so rarely that we're ok to flush |
| 259 | * everything here */ | 343 | * everything here */ |
| 260 | kvmppc_mmu_pte_flush(vcpu, 0, 0); | 344 | kvmppc_mmu_pte_flush(vcpu, 0, 0); |
| 345 | kvmppc_mmu_flush_segments(vcpu); | ||
| 261 | break; | 346 | break; |
| 262 | case SPRN_HID0: | 347 | case SPRN_HID0: |
| 263 | to_book3s(vcpu)->hid[0] = spr_val; | 348 | to_book3s(vcpu)->hid[0] = spr_val; |
| @@ -268,7 +353,32 @@ int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs) | |||
| 268 | case SPRN_HID2: | 353 | case SPRN_HID2: |
| 269 | to_book3s(vcpu)->hid[2] = spr_val; | 354 | to_book3s(vcpu)->hid[2] = spr_val; |
| 270 | break; | 355 | break; |
| 356 | case SPRN_HID2_GEKKO: | ||
| 357 | to_book3s(vcpu)->hid[2] = spr_val; | ||
| 358 | /* HID2.PSE controls paired single on gekko */ | ||
| 359 | switch (vcpu->arch.pvr) { | ||
| 360 | case 0x00080200: /* lonestar 2.0 */ | ||
| 361 | case 0x00088202: /* lonestar 2.2 */ | ||
| 362 | case 0x70000100: /* gekko 1.0 */ | ||
| 363 | case 0x00080100: /* gekko 2.0 */ | ||
| 364 | case 0x00083203: /* gekko 2.3a */ | ||
| 365 | case 0x00083213: /* gekko 2.3b */ | ||
| 366 | case 0x00083204: /* gekko 2.4 */ | ||
| 367 | case 0x00083214: /* gekko 2.4e (8SE) - retail HW2 */ | ||
| 368 | case 0x00087200: /* broadway */ | ||
| 369 | if (vcpu->arch.hflags & BOOK3S_HFLAG_NATIVE_PS) { | ||
| 370 | /* Native paired singles */ | ||
| 371 | } else if (spr_val & (1 << 29)) { /* HID2.PSE */ | ||
| 372 | vcpu->arch.hflags |= BOOK3S_HFLAG_PAIRED_SINGLE; | ||
| 373 | kvmppc_giveup_ext(vcpu, MSR_FP); | ||
| 374 | } else { | ||
| 375 | vcpu->arch.hflags &= ~BOOK3S_HFLAG_PAIRED_SINGLE; | ||
| 376 | } | ||
| 377 | break; | ||
| 378 | } | ||
| 379 | break; | ||
| 271 | case SPRN_HID4: | 380 | case SPRN_HID4: |
| 381 | case SPRN_HID4_GEKKO: | ||
| 272 | to_book3s(vcpu)->hid[4] = spr_val; | 382 | to_book3s(vcpu)->hid[4] = spr_val; |
| 273 | break; | 383 | break; |
| 274 | case SPRN_HID5: | 384 | case SPRN_HID5: |
| @@ -278,12 +388,30 @@ int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs) | |||
| 278 | (mfmsr() & MSR_HV)) | 388 | (mfmsr() & MSR_HV)) |
| 279 | vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32; | 389 | vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32; |
| 280 | break; | 390 | break; |
| 391 | case SPRN_GQR0: | ||
| 392 | case SPRN_GQR1: | ||
| 393 | case SPRN_GQR2: | ||
| 394 | case SPRN_GQR3: | ||
| 395 | case SPRN_GQR4: | ||
| 396 | case SPRN_GQR5: | ||
| 397 | case SPRN_GQR6: | ||
| 398 | case SPRN_GQR7: | ||
| 399 | to_book3s(vcpu)->gqr[sprn - SPRN_GQR0] = spr_val; | ||
| 400 | break; | ||
| 281 | case SPRN_ICTC: | 401 | case SPRN_ICTC: |
| 282 | case SPRN_THRM1: | 402 | case SPRN_THRM1: |
| 283 | case SPRN_THRM2: | 403 | case SPRN_THRM2: |
| 284 | case SPRN_THRM3: | 404 | case SPRN_THRM3: |
| 285 | case SPRN_CTRLF: | 405 | case SPRN_CTRLF: |
| 286 | case SPRN_CTRLT: | 406 | case SPRN_CTRLT: |
| 407 | case SPRN_L2CR: | ||
| 408 | case SPRN_MMCR0_GEKKO: | ||
| 409 | case SPRN_MMCR1_GEKKO: | ||
| 410 | case SPRN_PMC1_GEKKO: | ||
| 411 | case SPRN_PMC2_GEKKO: | ||
| 412 | case SPRN_PMC3_GEKKO: | ||
| 413 | case SPRN_PMC4_GEKKO: | ||
| 414 | case SPRN_WPAR_GEKKO: | ||
| 287 | break; | 415 | break; |
| 288 | default: | 416 | default: |
| 289 | printk(KERN_INFO "KVM: invalid SPR write: %d\n", sprn); | 417 | printk(KERN_INFO "KVM: invalid SPR write: %d\n", sprn); |
| @@ -301,6 +429,12 @@ int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt) | |||
| 301 | int emulated = EMULATE_DONE; | 429 | int emulated = EMULATE_DONE; |
| 302 | 430 | ||
| 303 | switch (sprn) { | 431 | switch (sprn) { |
| 432 | case SPRN_IBAT0U ... SPRN_IBAT3L: | ||
| 433 | case SPRN_IBAT4U ... SPRN_IBAT7L: | ||
| 434 | case SPRN_DBAT0U ... SPRN_DBAT3L: | ||
| 435 | case SPRN_DBAT4U ... SPRN_DBAT7L: | ||
| 436 | kvmppc_set_gpr(vcpu, rt, kvmppc_read_bat(vcpu, sprn)); | ||
| 437 | break; | ||
| 304 | case SPRN_SDR1: | 438 | case SPRN_SDR1: |
| 305 | kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->sdr1); | 439 | kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->sdr1); |
| 306 | break; | 440 | break; |
| @@ -320,19 +454,40 @@ int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt) | |||
| 320 | kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[1]); | 454 | kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[1]); |
| 321 | break; | 455 | break; |
| 322 | case SPRN_HID2: | 456 | case SPRN_HID2: |
| 457 | case SPRN_HID2_GEKKO: | ||
| 323 | kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[2]); | 458 | kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[2]); |
| 324 | break; | 459 | break; |
| 325 | case SPRN_HID4: | 460 | case SPRN_HID4: |
| 461 | case SPRN_HID4_GEKKO: | ||
| 326 | kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[4]); | 462 | kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[4]); |
| 327 | break; | 463 | break; |
| 328 | case SPRN_HID5: | 464 | case SPRN_HID5: |
| 329 | kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[5]); | 465 | kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[5]); |
| 330 | break; | 466 | break; |
| 467 | case SPRN_GQR0: | ||
| 468 | case SPRN_GQR1: | ||
| 469 | case SPRN_GQR2: | ||
| 470 | case SPRN_GQR3: | ||
| 471 | case SPRN_GQR4: | ||
| 472 | case SPRN_GQR5: | ||
| 473 | case SPRN_GQR6: | ||
| 474 | case SPRN_GQR7: | ||
| 475 | kvmppc_set_gpr(vcpu, rt, | ||
| 476 | to_book3s(vcpu)->gqr[sprn - SPRN_GQR0]); | ||
| 477 | break; | ||
| 331 | case SPRN_THRM1: | 478 | case SPRN_THRM1: |
| 332 | case SPRN_THRM2: | 479 | case SPRN_THRM2: |
| 333 | case SPRN_THRM3: | 480 | case SPRN_THRM3: |
| 334 | case SPRN_CTRLF: | 481 | case SPRN_CTRLF: |
| 335 | case SPRN_CTRLT: | 482 | case SPRN_CTRLT: |
| 483 | case SPRN_L2CR: | ||
| 484 | case SPRN_MMCR0_GEKKO: | ||
| 485 | case SPRN_MMCR1_GEKKO: | ||
| 486 | case SPRN_PMC1_GEKKO: | ||
| 487 | case SPRN_PMC2_GEKKO: | ||
| 488 | case SPRN_PMC3_GEKKO: | ||
| 489 | case SPRN_PMC4_GEKKO: | ||
| 490 | case SPRN_WPAR_GEKKO: | ||
| 336 | kvmppc_set_gpr(vcpu, rt, 0); | 491 | kvmppc_set_gpr(vcpu, rt, 0); |
| 337 | break; | 492 | break; |
| 338 | default: | 493 | default: |
| @@ -346,3 +501,73 @@ int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt) | |||
| 346 | return emulated; | 501 | return emulated; |
| 347 | } | 502 | } |
| 348 | 503 | ||
| 504 | u32 kvmppc_alignment_dsisr(struct kvm_vcpu *vcpu, unsigned int inst) | ||
| 505 | { | ||
| 506 | u32 dsisr = 0; | ||
| 507 | |||
| 508 | /* | ||
| 509 | * This is what the spec says about DSISR bits (not mentioned = 0): | ||
| 510 | * | ||
| 511 | * 12:13 [DS] Set to bits 30:31 | ||
| 512 | * 15:16 [X] Set to bits 29:30 | ||
| 513 | * 17 [X] Set to bit 25 | ||
| 514 | * [D/DS] Set to bit 5 | ||
| 515 | * 18:21 [X] Set to bits 21:24 | ||
| 516 | * [D/DS] Set to bits 1:4 | ||
| 517 | * 22:26 Set to bits 6:10 (RT/RS/FRT/FRS) | ||
| 518 | * 27:31 Set to bits 11:15 (RA) | ||
| 519 | */ | ||
| 520 | |||
| 521 | switch (get_op(inst)) { | ||
| 522 | /* D-form */ | ||
| 523 | case OP_LFS: | ||
| 524 | case OP_LFD: | ||
| 525 | case OP_STFD: | ||
| 526 | case OP_STFS: | ||
| 527 | dsisr |= (inst >> 12) & 0x4000; /* bit 17 */ | ||
| 528 | dsisr |= (inst >> 17) & 0x3c00; /* bits 18:21 */ | ||
| 529 | break; | ||
| 530 | /* X-form */ | ||
| 531 | case 31: | ||
| 532 | dsisr |= (inst << 14) & 0x18000; /* bits 15:16 */ | ||
| 533 | dsisr |= (inst << 8) & 0x04000; /* bit 17 */ | ||
| 534 | dsisr |= (inst << 3) & 0x03c00; /* bits 18:21 */ | ||
| 535 | break; | ||
| 536 | default: | ||
| 537 | printk(KERN_INFO "KVM: Unaligned instruction 0x%x\n", inst); | ||
| 538 | break; | ||
| 539 | } | ||
| 540 | |||
| 541 | dsisr |= (inst >> 16) & 0x03ff; /* bits 22:31 */ | ||
| 542 | |||
| 543 | return dsisr; | ||
| 544 | } | ||
| 545 | |||
| 546 | ulong kvmppc_alignment_dar(struct kvm_vcpu *vcpu, unsigned int inst) | ||
| 547 | { | ||
| 548 | ulong dar = 0; | ||
| 549 | ulong ra; | ||
| 550 | |||
| 551 | switch (get_op(inst)) { | ||
| 552 | case OP_LFS: | ||
| 553 | case OP_LFD: | ||
| 554 | case OP_STFD: | ||
| 555 | case OP_STFS: | ||
| 556 | ra = get_ra(inst); | ||
| 557 | if (ra) | ||
| 558 | dar = kvmppc_get_gpr(vcpu, ra); | ||
| 559 | dar += (s32)((s16)inst); | ||
| 560 | break; | ||
| 561 | case 31: | ||
| 562 | ra = get_ra(inst); | ||
| 563 | if (ra) | ||
| 564 | dar = kvmppc_get_gpr(vcpu, ra); | ||
| 565 | dar += kvmppc_get_gpr(vcpu, get_rb(inst)); | ||
| 566 | break; | ||
| 567 | default: | ||
| 568 | printk(KERN_INFO "KVM: Unaligned instruction 0x%x\n", inst); | ||
| 569 | break; | ||
| 570 | } | ||
| 571 | |||
| 572 | return dar; | ||
| 573 | } | ||
diff --git a/arch/powerpc/kvm/book3s_64_exports.c b/arch/powerpc/kvm/book3s_exports.c index 1dd5a1ddfd0d..1dd5a1ddfd0d 100644 --- a/arch/powerpc/kvm/book3s_64_exports.c +++ b/arch/powerpc/kvm/book3s_exports.c | |||
diff --git a/arch/powerpc/kvm/book3s_64_interrupts.S b/arch/powerpc/kvm/book3s_interrupts.S index c1584d0cbce8..2f0bc928b08a 100644 --- a/arch/powerpc/kvm/book3s_64_interrupts.S +++ b/arch/powerpc/kvm/book3s_interrupts.S | |||
| @@ -24,36 +24,56 @@ | |||
| 24 | #include <asm/asm-offsets.h> | 24 | #include <asm/asm-offsets.h> |
| 25 | #include <asm/exception-64s.h> | 25 | #include <asm/exception-64s.h> |
| 26 | 26 | ||
| 27 | #define KVMPPC_HANDLE_EXIT .kvmppc_handle_exit | 27 | #if defined(CONFIG_PPC_BOOK3S_64) |
| 28 | #define ULONG_SIZE 8 | ||
| 29 | #define VCPU_GPR(n) (VCPU_GPRS + (n * ULONG_SIZE)) | ||
| 30 | 28 | ||
| 31 | .macro DISABLE_INTERRUPTS | 29 | #define ULONG_SIZE 8 |
| 32 | mfmsr r0 | 30 | #define FUNC(name) GLUE(.,name) |
| 33 | rldicl r0,r0,48,1 | ||
| 34 | rotldi r0,r0,16 | ||
| 35 | mtmsrd r0,1 | ||
| 36 | .endm | ||
| 37 | 31 | ||
| 32 | #define GET_SHADOW_VCPU(reg) \ | ||
| 33 | addi reg, r13, PACA_KVM_SVCPU | ||
| 34 | |||
| 35 | #define DISABLE_INTERRUPTS \ | ||
| 36 | mfmsr r0; \ | ||
| 37 | rldicl r0,r0,48,1; \ | ||
| 38 | rotldi r0,r0,16; \ | ||
| 39 | mtmsrd r0,1; \ | ||
| 40 | |||
| 41 | #elif defined(CONFIG_PPC_BOOK3S_32) | ||
| 42 | |||
| 43 | #define ULONG_SIZE 4 | ||
| 44 | #define FUNC(name) name | ||
| 45 | |||
| 46 | #define GET_SHADOW_VCPU(reg) \ | ||
| 47 | lwz reg, (THREAD + THREAD_KVM_SVCPU)(r2) | ||
| 48 | |||
| 49 | #define DISABLE_INTERRUPTS \ | ||
| 50 | mfmsr r0; \ | ||
| 51 | rlwinm r0,r0,0,17,15; \ | ||
| 52 | mtmsr r0; \ | ||
| 53 | |||
| 54 | #endif /* CONFIG_PPC_BOOK3S_XX */ | ||
| 55 | |||
| 56 | |||
| 57 | #define VCPU_GPR(n) (VCPU_GPRS + (n * ULONG_SIZE)) | ||
| 38 | #define VCPU_LOAD_NVGPRS(vcpu) \ | 58 | #define VCPU_LOAD_NVGPRS(vcpu) \ |
| 39 | ld r14, VCPU_GPR(r14)(vcpu); \ | 59 | PPC_LL r14, VCPU_GPR(r14)(vcpu); \ |
| 40 | ld r15, VCPU_GPR(r15)(vcpu); \ | 60 | PPC_LL r15, VCPU_GPR(r15)(vcpu); \ |
| 41 | ld r16, VCPU_GPR(r16)(vcpu); \ | 61 | PPC_LL r16, VCPU_GPR(r16)(vcpu); \ |
| 42 | ld r17, VCPU_GPR(r17)(vcpu); \ | 62 | PPC_LL r17, VCPU_GPR(r17)(vcpu); \ |
| 43 | ld r18, VCPU_GPR(r18)(vcpu); \ | 63 | PPC_LL r18, VCPU_GPR(r18)(vcpu); \ |
| 44 | ld r19, VCPU_GPR(r19)(vcpu); \ | 64 | PPC_LL r19, VCPU_GPR(r19)(vcpu); \ |
| 45 | ld r20, VCPU_GPR(r20)(vcpu); \ | 65 | PPC_LL r20, VCPU_GPR(r20)(vcpu); \ |
| 46 | ld r21, VCPU_GPR(r21)(vcpu); \ | 66 | PPC_LL r21, VCPU_GPR(r21)(vcpu); \ |
| 47 | ld r22, VCPU_GPR(r22)(vcpu); \ | 67 | PPC_LL r22, VCPU_GPR(r22)(vcpu); \ |
| 48 | ld r23, VCPU_GPR(r23)(vcpu); \ | 68 | PPC_LL r23, VCPU_GPR(r23)(vcpu); \ |
| 49 | ld r24, VCPU_GPR(r24)(vcpu); \ | 69 | PPC_LL r24, VCPU_GPR(r24)(vcpu); \ |
| 50 | ld r25, VCPU_GPR(r25)(vcpu); \ | 70 | PPC_LL r25, VCPU_GPR(r25)(vcpu); \ |
| 51 | ld r26, VCPU_GPR(r26)(vcpu); \ | 71 | PPC_LL r26, VCPU_GPR(r26)(vcpu); \ |
| 52 | ld r27, VCPU_GPR(r27)(vcpu); \ | 72 | PPC_LL r27, VCPU_GPR(r27)(vcpu); \ |
| 53 | ld r28, VCPU_GPR(r28)(vcpu); \ | 73 | PPC_LL r28, VCPU_GPR(r28)(vcpu); \ |
| 54 | ld r29, VCPU_GPR(r29)(vcpu); \ | 74 | PPC_LL r29, VCPU_GPR(r29)(vcpu); \ |
| 55 | ld r30, VCPU_GPR(r30)(vcpu); \ | 75 | PPC_LL r30, VCPU_GPR(r30)(vcpu); \ |
| 56 | ld r31, VCPU_GPR(r31)(vcpu); \ | 76 | PPC_LL r31, VCPU_GPR(r31)(vcpu); \ |
| 57 | 77 | ||
| 58 | /***************************************************************************** | 78 | /***************************************************************************** |
| 59 | * * | 79 | * * |
| @@ -69,11 +89,11 @@ _GLOBAL(__kvmppc_vcpu_entry) | |||
| 69 | 89 | ||
| 70 | kvm_start_entry: | 90 | kvm_start_entry: |
| 71 | /* Write correct stack frame */ | 91 | /* Write correct stack frame */ |
| 72 | mflr r0 | 92 | mflr r0 |
| 73 | std r0,16(r1) | 93 | PPC_STL r0,PPC_LR_STKOFF(r1) |
| 74 | 94 | ||
| 75 | /* Save host state to the stack */ | 95 | /* Save host state to the stack */ |
| 76 | stdu r1, -SWITCH_FRAME_SIZE(r1) | 96 | PPC_STLU r1, -SWITCH_FRAME_SIZE(r1) |
| 77 | 97 | ||
| 78 | /* Save r3 (kvm_run) and r4 (vcpu) */ | 98 | /* Save r3 (kvm_run) and r4 (vcpu) */ |
| 79 | SAVE_2GPRS(3, r1) | 99 | SAVE_2GPRS(3, r1) |
| @@ -82,33 +102,28 @@ kvm_start_entry: | |||
| 82 | SAVE_NVGPRS(r1) | 102 | SAVE_NVGPRS(r1) |
| 83 | 103 | ||
| 84 | /* Save LR */ | 104 | /* Save LR */ |
| 85 | std r0, _LINK(r1) | 105 | PPC_STL r0, _LINK(r1) |
| 86 | 106 | ||
| 87 | /* Load non-volatile guest state from the vcpu */ | 107 | /* Load non-volatile guest state from the vcpu */ |
| 88 | VCPU_LOAD_NVGPRS(r4) | 108 | VCPU_LOAD_NVGPRS(r4) |
| 89 | 109 | ||
| 110 | GET_SHADOW_VCPU(r5) | ||
| 111 | |||
| 90 | /* Save R1/R2 in the PACA */ | 112 | /* Save R1/R2 in the PACA */ |
| 91 | std r1, PACA_KVM_HOST_R1(r13) | 113 | PPC_STL r1, SVCPU_HOST_R1(r5) |
| 92 | std r2, PACA_KVM_HOST_R2(r13) | 114 | PPC_STL r2, SVCPU_HOST_R2(r5) |
| 93 | 115 | ||
| 94 | /* XXX swap in/out on load? */ | 116 | /* XXX swap in/out on load? */ |
| 95 | ld r3, VCPU_HIGHMEM_HANDLER(r4) | 117 | PPC_LL r3, VCPU_HIGHMEM_HANDLER(r4) |
| 96 | std r3, PACA_KVM_VMHANDLER(r13) | 118 | PPC_STL r3, SVCPU_VMHANDLER(r5) |
| 97 | 119 | ||
| 98 | kvm_start_lightweight: | 120 | kvm_start_lightweight: |
| 99 | 121 | ||
| 100 | ld r9, VCPU_PC(r4) /* r9 = vcpu->arch.pc */ | 122 | PPC_LL r10, VCPU_SHADOW_MSR(r4) /* r10 = vcpu->arch.shadow_msr */ |
| 101 | ld r10, VCPU_SHADOW_MSR(r4) /* r10 = vcpu->arch.shadow_msr */ | ||
| 102 | |||
| 103 | /* Load some guest state in the respective registers */ | ||
| 104 | ld r5, VCPU_CTR(r4) /* r5 = vcpu->arch.ctr */ | ||
| 105 | /* will be swapped in by rmcall */ | ||
| 106 | |||
| 107 | ld r3, VCPU_LR(r4) /* r3 = vcpu->arch.lr */ | ||
| 108 | mtlr r3 /* LR = r3 */ | ||
| 109 | 123 | ||
| 110 | DISABLE_INTERRUPTS | 124 | DISABLE_INTERRUPTS |
| 111 | 125 | ||
| 126 | #ifdef CONFIG_PPC_BOOK3S_64 | ||
| 112 | /* Some guests may need to have dcbz set to 32 byte length. | 127 | /* Some guests may need to have dcbz set to 32 byte length. |
| 113 | * | 128 | * |
| 114 | * Usually we ensure that by patching the guest's instructions | 129 | * Usually we ensure that by patching the guest's instructions |
| @@ -118,7 +133,7 @@ kvm_start_lightweight: | |||
| 118 | * because that's a lot faster. | 133 | * because that's a lot faster. |
| 119 | */ | 134 | */ |
| 120 | 135 | ||
| 121 | ld r3, VCPU_HFLAGS(r4) | 136 | PPC_LL r3, VCPU_HFLAGS(r4) |
| 122 | rldicl. r3, r3, 0, 63 /* CR = ((r3 & 1) == 0) */ | 137 | rldicl. r3, r3, 0, 63 /* CR = ((r3 & 1) == 0) */ |
| 123 | beq no_dcbz32_on | 138 | beq no_dcbz32_on |
| 124 | 139 | ||
| @@ -128,13 +143,15 @@ kvm_start_lightweight: | |||
| 128 | 143 | ||
| 129 | no_dcbz32_on: | 144 | no_dcbz32_on: |
| 130 | 145 | ||
| 131 | ld r6, VCPU_RMCALL(r4) | 146 | #endif /* CONFIG_PPC_BOOK3S_64 */ |
| 147 | |||
| 148 | PPC_LL r6, VCPU_RMCALL(r4) | ||
| 132 | mtctr r6 | 149 | mtctr r6 |
| 133 | 150 | ||
| 134 | ld r3, VCPU_TRAMPOLINE_ENTER(r4) | 151 | PPC_LL r3, VCPU_TRAMPOLINE_ENTER(r4) |
| 135 | LOAD_REG_IMMEDIATE(r4, MSR_KERNEL & ~(MSR_IR | MSR_DR)) | 152 | LOAD_REG_IMMEDIATE(r4, MSR_KERNEL & ~(MSR_IR | MSR_DR)) |
| 136 | 153 | ||
| 137 | /* Jump to SLB patching handlder and into our guest */ | 154 | /* Jump to segment patching handler and into our guest */ |
| 138 | bctr | 155 | bctr |
| 139 | 156 | ||
| 140 | /* | 157 | /* |
| @@ -149,31 +166,20 @@ kvmppc_handler_highmem: | |||
| 149 | /* | 166 | /* |
| 150 | * Register usage at this point: | 167 | * Register usage at this point: |
| 151 | * | 168 | * |
| 152 | * R0 = guest last inst | 169 | * R1 = host R1 |
| 153 | * R1 = host R1 | 170 | * R2 = host R2 |
| 154 | * R2 = host R2 | 171 | * R12 = exit handler id |
| 155 | * R3 = guest PC | 172 | * R13 = PACA |
| 156 | * R4 = guest MSR | 173 | * SVCPU.* = guest * |
| 157 | * R5 = guest DAR | ||
| 158 | * R6 = guest DSISR | ||
| 159 | * R13 = PACA | ||
| 160 | * PACA.KVM.* = guest * | ||
| 161 | * | 174 | * |
| 162 | */ | 175 | */ |
| 163 | 176 | ||
| 164 | /* R7 = vcpu */ | 177 | /* R7 = vcpu */ |
| 165 | ld r7, GPR4(r1) | 178 | PPC_LL r7, GPR4(r1) |
| 166 | 179 | ||
| 167 | /* Now save the guest state */ | 180 | #ifdef CONFIG_PPC_BOOK3S_64 |
| 168 | 181 | ||
| 169 | stw r0, VCPU_LAST_INST(r7) | 182 | PPC_LL r5, VCPU_HFLAGS(r7) |
| 170 | |||
| 171 | std r3, VCPU_PC(r7) | ||
| 172 | std r4, VCPU_SHADOW_SRR1(r7) | ||
| 173 | std r5, VCPU_FAULT_DEAR(r7) | ||
| 174 | std r6, VCPU_FAULT_DSISR(r7) | ||
| 175 | |||
| 176 | ld r5, VCPU_HFLAGS(r7) | ||
| 177 | rldicl. r5, r5, 0, 63 /* CR = ((r5 & 1) == 0) */ | 183 | rldicl. r5, r5, 0, 63 /* CR = ((r5 & 1) == 0) */ |
| 178 | beq no_dcbz32_off | 184 | beq no_dcbz32_off |
| 179 | 185 | ||
| @@ -184,35 +190,29 @@ kvmppc_handler_highmem: | |||
| 184 | 190 | ||
| 185 | no_dcbz32_off: | 191 | no_dcbz32_off: |
| 186 | 192 | ||
| 187 | std r14, VCPU_GPR(r14)(r7) | 193 | #endif /* CONFIG_PPC_BOOK3S_64 */ |
| 188 | std r15, VCPU_GPR(r15)(r7) | 194 | |
| 189 | std r16, VCPU_GPR(r16)(r7) | 195 | PPC_STL r14, VCPU_GPR(r14)(r7) |
| 190 | std r17, VCPU_GPR(r17)(r7) | 196 | PPC_STL r15, VCPU_GPR(r15)(r7) |
| 191 | std r18, VCPU_GPR(r18)(r7) | 197 | PPC_STL r16, VCPU_GPR(r16)(r7) |
| 192 | std r19, VCPU_GPR(r19)(r7) | 198 | PPC_STL r17, VCPU_GPR(r17)(r7) |
| 193 | std r20, VCPU_GPR(r20)(r7) | 199 | PPC_STL r18, VCPU_GPR(r18)(r7) |
| 194 | std r21, VCPU_GPR(r21)(r7) | 200 | PPC_STL r19, VCPU_GPR(r19)(r7) |
| 195 | std r22, VCPU_GPR(r22)(r7) | 201 | PPC_STL r20, VCPU_GPR(r20)(r7) |
| 196 | std r23, VCPU_GPR(r23)(r7) | 202 | PPC_STL r21, VCPU_GPR(r21)(r7) |
| 197 | std r24, VCPU_GPR(r24)(r7) | 203 | PPC_STL r22, VCPU_GPR(r22)(r7) |
| 198 | std r25, VCPU_GPR(r25)(r7) | 204 | PPC_STL r23, VCPU_GPR(r23)(r7) |
| 199 | std r26, VCPU_GPR(r26)(r7) | 205 | PPC_STL r24, VCPU_GPR(r24)(r7) |
| 200 | std r27, VCPU_GPR(r27)(r7) | 206 | PPC_STL r25, VCPU_GPR(r25)(r7) |
| 201 | std r28, VCPU_GPR(r28)(r7) | 207 | PPC_STL r26, VCPU_GPR(r26)(r7) |
| 202 | std r29, VCPU_GPR(r29)(r7) | 208 | PPC_STL r27, VCPU_GPR(r27)(r7) |
| 203 | std r30, VCPU_GPR(r30)(r7) | 209 | PPC_STL r28, VCPU_GPR(r28)(r7) |
| 204 | std r31, VCPU_GPR(r31)(r7) | 210 | PPC_STL r29, VCPU_GPR(r29)(r7) |
| 205 | 211 | PPC_STL r30, VCPU_GPR(r30)(r7) | |
| 206 | /* Save guest CTR */ | 212 | PPC_STL r31, VCPU_GPR(r31)(r7) |
| 207 | mfctr r5 | ||
| 208 | std r5, VCPU_CTR(r7) | ||
| 209 | |||
| 210 | /* Save guest LR */ | ||
| 211 | mflr r5 | ||
| 212 | std r5, VCPU_LR(r7) | ||
| 213 | 213 | ||
| 214 | /* Restore host msr -> SRR1 */ | 214 | /* Restore host msr -> SRR1 */ |
| 215 | ld r6, VCPU_HOST_MSR(r7) | 215 | PPC_LL r6, VCPU_HOST_MSR(r7) |
| 216 | 216 | ||
| 217 | /* | 217 | /* |
| 218 | * For some interrupts, we need to call the real Linux | 218 | * For some interrupts, we need to call the real Linux |
| @@ -228,9 +228,12 @@ no_dcbz32_off: | |||
| 228 | beq call_linux_handler | 228 | beq call_linux_handler |
| 229 | cmpwi r12, BOOK3S_INTERRUPT_DECREMENTER | 229 | cmpwi r12, BOOK3S_INTERRUPT_DECREMENTER |
| 230 | beq call_linux_handler | 230 | beq call_linux_handler |
| 231 | cmpwi r12, BOOK3S_INTERRUPT_PERFMON | ||
| 232 | beq call_linux_handler | ||
| 231 | 233 | ||
| 232 | /* Back to EE=1 */ | 234 | /* Back to EE=1 */ |
| 233 | mtmsr r6 | 235 | mtmsr r6 |
| 236 | sync | ||
| 234 | b kvm_return_point | 237 | b kvm_return_point |
| 235 | 238 | ||
| 236 | call_linux_handler: | 239 | call_linux_handler: |
| @@ -249,14 +252,14 @@ call_linux_handler: | |||
| 249 | */ | 252 | */ |
| 250 | 253 | ||
| 251 | /* Restore host IP -> SRR0 */ | 254 | /* Restore host IP -> SRR0 */ |
| 252 | ld r5, VCPU_HOST_RETIP(r7) | 255 | PPC_LL r5, VCPU_HOST_RETIP(r7) |
| 253 | 256 | ||
| 254 | /* XXX Better move to a safe function? | 257 | /* XXX Better move to a safe function? |
| 255 | * What if we get an HTAB flush in between mtsrr0 and mtsrr1? */ | 258 | * What if we get an HTAB flush in between mtsrr0 and mtsrr1? */ |
| 256 | 259 | ||
| 257 | mtlr r12 | 260 | mtlr r12 |
| 258 | 261 | ||
| 259 | ld r4, VCPU_TRAMPOLINE_LOWMEM(r7) | 262 | PPC_LL r4, VCPU_TRAMPOLINE_LOWMEM(r7) |
| 260 | mtsrr0 r4 | 263 | mtsrr0 r4 |
| 261 | LOAD_REG_IMMEDIATE(r3, MSR_KERNEL & ~(MSR_IR | MSR_DR)) | 264 | LOAD_REG_IMMEDIATE(r3, MSR_KERNEL & ~(MSR_IR | MSR_DR)) |
| 262 | mtsrr1 r3 | 265 | mtsrr1 r3 |
| @@ -274,7 +277,7 @@ kvm_return_point: | |||
| 274 | 277 | ||
| 275 | /* Restore r3 (kvm_run) and r4 (vcpu) */ | 278 | /* Restore r3 (kvm_run) and r4 (vcpu) */ |
| 276 | REST_2GPRS(3, r1) | 279 | REST_2GPRS(3, r1) |
| 277 | bl KVMPPC_HANDLE_EXIT | 280 | bl FUNC(kvmppc_handle_exit) |
| 278 | 281 | ||
| 279 | /* If RESUME_GUEST, get back in the loop */ | 282 | /* If RESUME_GUEST, get back in the loop */ |
| 280 | cmpwi r3, RESUME_GUEST | 283 | cmpwi r3, RESUME_GUEST |
| @@ -285,7 +288,7 @@ kvm_return_point: | |||
| 285 | 288 | ||
| 286 | kvm_exit_loop: | 289 | kvm_exit_loop: |
| 287 | 290 | ||
| 288 | ld r4, _LINK(r1) | 291 | PPC_LL r4, _LINK(r1) |
| 289 | mtlr r4 | 292 | mtlr r4 |
| 290 | 293 | ||
| 291 | /* Restore non-volatile host registers (r14 - r31) */ | 294 | /* Restore non-volatile host registers (r14 - r31) */ |
| @@ -296,8 +299,8 @@ kvm_exit_loop: | |||
| 296 | 299 | ||
| 297 | kvm_loop_heavyweight: | 300 | kvm_loop_heavyweight: |
| 298 | 301 | ||
| 299 | ld r4, _LINK(r1) | 302 | PPC_LL r4, _LINK(r1) |
| 300 | std r4, (16 + SWITCH_FRAME_SIZE)(r1) | 303 | PPC_STL r4, (PPC_LR_STKOFF + SWITCH_FRAME_SIZE)(r1) |
| 301 | 304 | ||
| 302 | /* Load vcpu and cpu_run */ | 305 | /* Load vcpu and cpu_run */ |
| 303 | REST_2GPRS(3, r1) | 306 | REST_2GPRS(3, r1) |
| @@ -315,4 +318,3 @@ kvm_loop_lightweight: | |||
| 315 | 318 | ||
| 316 | /* Jump back into the beginning of this function */ | 319 | /* Jump back into the beginning of this function */ |
| 317 | b kvm_start_lightweight | 320 | b kvm_start_lightweight |
| 318 | |||
diff --git a/arch/powerpc/kvm/book3s_paired_singles.c b/arch/powerpc/kvm/book3s_paired_singles.c new file mode 100644 index 000000000000..a9f66abafcb3 --- /dev/null +++ b/arch/powerpc/kvm/book3s_paired_singles.c | |||
| @@ -0,0 +1,1289 @@ | |||
| 1 | /* | ||
| 2 | * This program is free software; you can redistribute it and/or modify | ||
| 3 | * it under the terms of the GNU General Public License, version 2, as | ||
| 4 | * published by the Free Software Foundation. | ||
| 5 | * | ||
| 6 | * This program is distributed in the hope that it will be useful, | ||
| 7 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 8 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 9 | * GNU General Public License for more details. | ||
| 10 | * | ||
| 11 | * You should have received a copy of the GNU General Public License | ||
| 12 | * along with this program; if not, write to the Free Software | ||
| 13 | * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. | ||
| 14 | * | ||
| 15 | * Copyright Novell Inc 2010 | ||
| 16 | * | ||
| 17 | * Authors: Alexander Graf <agraf@suse.de> | ||
| 18 | */ | ||
| 19 | |||
| 20 | #include <asm/kvm.h> | ||
| 21 | #include <asm/kvm_ppc.h> | ||
| 22 | #include <asm/disassemble.h> | ||
| 23 | #include <asm/kvm_book3s.h> | ||
| 24 | #include <asm/kvm_fpu.h> | ||
| 25 | #include <asm/reg.h> | ||
| 26 | #include <asm/cacheflush.h> | ||
| 27 | #include <linux/vmalloc.h> | ||
| 28 | |||
| 29 | /* #define DEBUG */ | ||
| 30 | |||
| 31 | #ifdef DEBUG | ||
| 32 | #define dprintk printk | ||
| 33 | #else | ||
| 34 | #define dprintk(...) do { } while(0); | ||
| 35 | #endif | ||
| 36 | |||
| 37 | #define OP_LFS 48 | ||
| 38 | #define OP_LFSU 49 | ||
| 39 | #define OP_LFD 50 | ||
| 40 | #define OP_LFDU 51 | ||
| 41 | #define OP_STFS 52 | ||
| 42 | #define OP_STFSU 53 | ||
| 43 | #define OP_STFD 54 | ||
| 44 | #define OP_STFDU 55 | ||
| 45 | #define OP_PSQ_L 56 | ||
| 46 | #define OP_PSQ_LU 57 | ||
| 47 | #define OP_PSQ_ST 60 | ||
| 48 | #define OP_PSQ_STU 61 | ||
| 49 | |||
| 50 | #define OP_31_LFSX 535 | ||
| 51 | #define OP_31_LFSUX 567 | ||
| 52 | #define OP_31_LFDX 599 | ||
| 53 | #define OP_31_LFDUX 631 | ||
| 54 | #define OP_31_STFSX 663 | ||
| 55 | #define OP_31_STFSUX 695 | ||
| 56 | #define OP_31_STFX 727 | ||
| 57 | #define OP_31_STFUX 759 | ||
| 58 | #define OP_31_LWIZX 887 | ||
| 59 | #define OP_31_STFIWX 983 | ||
| 60 | |||
| 61 | #define OP_59_FADDS 21 | ||
| 62 | #define OP_59_FSUBS 20 | ||
| 63 | #define OP_59_FSQRTS 22 | ||
| 64 | #define OP_59_FDIVS 18 | ||
| 65 | #define OP_59_FRES 24 | ||
| 66 | #define OP_59_FMULS 25 | ||
| 67 | #define OP_59_FRSQRTES 26 | ||
| 68 | #define OP_59_FMSUBS 28 | ||
| 69 | #define OP_59_FMADDS 29 | ||
| 70 | #define OP_59_FNMSUBS 30 | ||
| 71 | #define OP_59_FNMADDS 31 | ||
| 72 | |||
| 73 | #define OP_63_FCMPU 0 | ||
| 74 | #define OP_63_FCPSGN 8 | ||
| 75 | #define OP_63_FRSP 12 | ||
| 76 | #define OP_63_FCTIW 14 | ||
| 77 | #define OP_63_FCTIWZ 15 | ||
| 78 | #define OP_63_FDIV 18 | ||
| 79 | #define OP_63_FADD 21 | ||
| 80 | #define OP_63_FSQRT 22 | ||
| 81 | #define OP_63_FSEL 23 | ||
| 82 | #define OP_63_FRE 24 | ||
| 83 | #define OP_63_FMUL 25 | ||
| 84 | #define OP_63_FRSQRTE 26 | ||
| 85 | #define OP_63_FMSUB 28 | ||
| 86 | #define OP_63_FMADD 29 | ||
| 87 | #define OP_63_FNMSUB 30 | ||
| 88 | #define OP_63_FNMADD 31 | ||
| 89 | #define OP_63_FCMPO 32 | ||
| 90 | #define OP_63_MTFSB1 38 // XXX | ||
| 91 | #define OP_63_FSUB 20 | ||
| 92 | #define OP_63_FNEG 40 | ||
| 93 | #define OP_63_MCRFS 64 | ||
| 94 | #define OP_63_MTFSB0 70 | ||
| 95 | #define OP_63_FMR 72 | ||
| 96 | #define OP_63_MTFSFI 134 | ||
| 97 | #define OP_63_FABS 264 | ||
| 98 | #define OP_63_MFFS 583 | ||
| 99 | #define OP_63_MTFSF 711 | ||
| 100 | |||
| 101 | #define OP_4X_PS_CMPU0 0 | ||
| 102 | #define OP_4X_PSQ_LX 6 | ||
| 103 | #define OP_4XW_PSQ_STX 7 | ||
| 104 | #define OP_4A_PS_SUM0 10 | ||
| 105 | #define OP_4A_PS_SUM1 11 | ||
| 106 | #define OP_4A_PS_MULS0 12 | ||
| 107 | #define OP_4A_PS_MULS1 13 | ||
| 108 | #define OP_4A_PS_MADDS0 14 | ||
| 109 | #define OP_4A_PS_MADDS1 15 | ||
| 110 | #define OP_4A_PS_DIV 18 | ||
| 111 | #define OP_4A_PS_SUB 20 | ||
| 112 | #define OP_4A_PS_ADD 21 | ||
| 113 | #define OP_4A_PS_SEL 23 | ||
| 114 | #define OP_4A_PS_RES 24 | ||
| 115 | #define OP_4A_PS_MUL 25 | ||
| 116 | #define OP_4A_PS_RSQRTE 26 | ||
| 117 | #define OP_4A_PS_MSUB 28 | ||
| 118 | #define OP_4A_PS_MADD 29 | ||
| 119 | #define OP_4A_PS_NMSUB 30 | ||
| 120 | #define OP_4A_PS_NMADD 31 | ||
| 121 | #define OP_4X_PS_CMPO0 32 | ||
| 122 | #define OP_4X_PSQ_LUX 38 | ||
| 123 | #define OP_4XW_PSQ_STUX 39 | ||
| 124 | #define OP_4X_PS_NEG 40 | ||
| 125 | #define OP_4X_PS_CMPU1 64 | ||
| 126 | #define OP_4X_PS_MR 72 | ||
| 127 | #define OP_4X_PS_CMPO1 96 | ||
| 128 | #define OP_4X_PS_NABS 136 | ||
| 129 | #define OP_4X_PS_ABS 264 | ||
| 130 | #define OP_4X_PS_MERGE00 528 | ||
| 131 | #define OP_4X_PS_MERGE01 560 | ||
| 132 | #define OP_4X_PS_MERGE10 592 | ||
| 133 | #define OP_4X_PS_MERGE11 624 | ||
| 134 | |||
| 135 | #define SCALAR_NONE 0 | ||
| 136 | #define SCALAR_HIGH (1 << 0) | ||
| 137 | #define SCALAR_LOW (1 << 1) | ||
| 138 | #define SCALAR_NO_PS0 (1 << 2) | ||
| 139 | #define SCALAR_NO_PS1 (1 << 3) | ||
| 140 | |||
| 141 | #define GQR_ST_TYPE_MASK 0x00000007 | ||
| 142 | #define GQR_ST_TYPE_SHIFT 0 | ||
| 143 | #define GQR_ST_SCALE_MASK 0x00003f00 | ||
| 144 | #define GQR_ST_SCALE_SHIFT 8 | ||
| 145 | #define GQR_LD_TYPE_MASK 0x00070000 | ||
| 146 | #define GQR_LD_TYPE_SHIFT 16 | ||
| 147 | #define GQR_LD_SCALE_MASK 0x3f000000 | ||
| 148 | #define GQR_LD_SCALE_SHIFT 24 | ||
| 149 | |||
| 150 | #define GQR_QUANTIZE_FLOAT 0 | ||
| 151 | #define GQR_QUANTIZE_U8 4 | ||
| 152 | #define GQR_QUANTIZE_U16 5 | ||
| 153 | #define GQR_QUANTIZE_S8 6 | ||
| 154 | #define GQR_QUANTIZE_S16 7 | ||
| 155 | |||
| 156 | #define FPU_LS_SINGLE 0 | ||
| 157 | #define FPU_LS_DOUBLE 1 | ||
| 158 | #define FPU_LS_SINGLE_LOW 2 | ||
| 159 | |||
| 160 | static inline void kvmppc_sync_qpr(struct kvm_vcpu *vcpu, int rt) | ||
| 161 | { | ||
| 162 | struct thread_struct t; | ||
| 163 | |||
| 164 | t.fpscr.val = vcpu->arch.fpscr; | ||
| 165 | cvt_df((double*)&vcpu->arch.fpr[rt], (float*)&vcpu->arch.qpr[rt], &t); | ||
| 166 | } | ||
| 167 | |||
| 168 | static void kvmppc_inject_pf(struct kvm_vcpu *vcpu, ulong eaddr, bool is_store) | ||
| 169 | { | ||
| 170 | u64 dsisr; | ||
| 171 | |||
| 172 | vcpu->arch.msr = kvmppc_set_field(vcpu->arch.msr, 33, 36, 0); | ||
| 173 | vcpu->arch.msr = kvmppc_set_field(vcpu->arch.msr, 42, 47, 0); | ||
| 174 | vcpu->arch.dear = eaddr; | ||
| 175 | /* Page Fault */ | ||
| 176 | dsisr = kvmppc_set_field(0, 33, 33, 1); | ||
| 177 | if (is_store) | ||
| 178 | to_book3s(vcpu)->dsisr = kvmppc_set_field(dsisr, 38, 38, 1); | ||
| 179 | kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DATA_STORAGE); | ||
| 180 | } | ||
| 181 | |||
| 182 | static int kvmppc_emulate_fpr_load(struct kvm_run *run, struct kvm_vcpu *vcpu, | ||
| 183 | int rs, ulong addr, int ls_type) | ||
| 184 | { | ||
| 185 | int emulated = EMULATE_FAIL; | ||
| 186 | struct thread_struct t; | ||
| 187 | int r; | ||
| 188 | char tmp[8]; | ||
| 189 | int len = sizeof(u32); | ||
| 190 | |||
| 191 | if (ls_type == FPU_LS_DOUBLE) | ||
| 192 | len = sizeof(u64); | ||
| 193 | |||
| 194 | t.fpscr.val = vcpu->arch.fpscr; | ||
| 195 | |||
| 196 | /* read from memory */ | ||
| 197 | r = kvmppc_ld(vcpu, &addr, len, tmp, true); | ||
| 198 | vcpu->arch.paddr_accessed = addr; | ||
| 199 | |||
| 200 | if (r < 0) { | ||
| 201 | kvmppc_inject_pf(vcpu, addr, false); | ||
| 202 | goto done_load; | ||
| 203 | } else if (r == EMULATE_DO_MMIO) { | ||
| 204 | emulated = kvmppc_handle_load(run, vcpu, KVM_REG_FPR | rs, len, 1); | ||
| 205 | goto done_load; | ||
| 206 | } | ||
| 207 | |||
| 208 | emulated = EMULATE_DONE; | ||
| 209 | |||
| 210 | /* put in registers */ | ||
| 211 | switch (ls_type) { | ||
| 212 | case FPU_LS_SINGLE: | ||
| 213 | cvt_fd((float*)tmp, (double*)&vcpu->arch.fpr[rs], &t); | ||
| 214 | vcpu->arch.qpr[rs] = *((u32*)tmp); | ||
| 215 | break; | ||
| 216 | case FPU_LS_DOUBLE: | ||
| 217 | vcpu->arch.fpr[rs] = *((u64*)tmp); | ||
| 218 | break; | ||
| 219 | } | ||
| 220 | |||
| 221 | dprintk(KERN_INFO "KVM: FPR_LD [0x%llx] at 0x%lx (%d)\n", *(u64*)tmp, | ||
| 222 | addr, len); | ||
| 223 | |||
| 224 | done_load: | ||
| 225 | return emulated; | ||
| 226 | } | ||
| 227 | |||
| 228 | static int kvmppc_emulate_fpr_store(struct kvm_run *run, struct kvm_vcpu *vcpu, | ||
| 229 | int rs, ulong addr, int ls_type) | ||
| 230 | { | ||
| 231 | int emulated = EMULATE_FAIL; | ||
| 232 | struct thread_struct t; | ||
| 233 | int r; | ||
| 234 | char tmp[8]; | ||
| 235 | u64 val; | ||
| 236 | int len; | ||
| 237 | |||
| 238 | t.fpscr.val = vcpu->arch.fpscr; | ||
| 239 | |||
| 240 | switch (ls_type) { | ||
| 241 | case FPU_LS_SINGLE: | ||
| 242 | cvt_df((double*)&vcpu->arch.fpr[rs], (float*)tmp, &t); | ||
| 243 | val = *((u32*)tmp); | ||
| 244 | len = sizeof(u32); | ||
| 245 | break; | ||
| 246 | case FPU_LS_SINGLE_LOW: | ||
| 247 | *((u32*)tmp) = vcpu->arch.fpr[rs]; | ||
| 248 | val = vcpu->arch.fpr[rs] & 0xffffffff; | ||
| 249 | len = sizeof(u32); | ||
| 250 | break; | ||
| 251 | case FPU_LS_DOUBLE: | ||
| 252 | *((u64*)tmp) = vcpu->arch.fpr[rs]; | ||
| 253 | val = vcpu->arch.fpr[rs]; | ||
| 254 | len = sizeof(u64); | ||
| 255 | break; | ||
| 256 | default: | ||
| 257 | val = 0; | ||
| 258 | len = 0; | ||
| 259 | } | ||
| 260 | |||
| 261 | r = kvmppc_st(vcpu, &addr, len, tmp, true); | ||
| 262 | vcpu->arch.paddr_accessed = addr; | ||
| 263 | if (r < 0) { | ||
| 264 | kvmppc_inject_pf(vcpu, addr, true); | ||
| 265 | } else if (r == EMULATE_DO_MMIO) { | ||
| 266 | emulated = kvmppc_handle_store(run, vcpu, val, len, 1); | ||
| 267 | } else { | ||
| 268 | emulated = EMULATE_DONE; | ||
| 269 | } | ||
| 270 | |||
| 271 | dprintk(KERN_INFO "KVM: FPR_ST [0x%llx] at 0x%lx (%d)\n", | ||
| 272 | val, addr, len); | ||
| 273 | |||
| 274 | return emulated; | ||
| 275 | } | ||
| 276 | |||
| 277 | static int kvmppc_emulate_psq_load(struct kvm_run *run, struct kvm_vcpu *vcpu, | ||
| 278 | int rs, ulong addr, bool w, int i) | ||
| 279 | { | ||
| 280 | int emulated = EMULATE_FAIL; | ||
| 281 | struct thread_struct t; | ||
| 282 | int r; | ||
| 283 | float one = 1.0; | ||
| 284 | u32 tmp[2]; | ||
| 285 | |||
| 286 | t.fpscr.val = vcpu->arch.fpscr; | ||
| 287 | |||
| 288 | /* read from memory */ | ||
| 289 | if (w) { | ||
| 290 | r = kvmppc_ld(vcpu, &addr, sizeof(u32), tmp, true); | ||
| 291 | memcpy(&tmp[1], &one, sizeof(u32)); | ||
| 292 | } else { | ||
| 293 | r = kvmppc_ld(vcpu, &addr, sizeof(u32) * 2, tmp, true); | ||
| 294 | } | ||
| 295 | vcpu->arch.paddr_accessed = addr; | ||
| 296 | if (r < 0) { | ||
| 297 | kvmppc_inject_pf(vcpu, addr, false); | ||
| 298 | goto done_load; | ||
| 299 | } else if ((r == EMULATE_DO_MMIO) && w) { | ||
| 300 | emulated = kvmppc_handle_load(run, vcpu, KVM_REG_FPR | rs, 4, 1); | ||
| 301 | vcpu->arch.qpr[rs] = tmp[1]; | ||
| 302 | goto done_load; | ||
| 303 | } else if (r == EMULATE_DO_MMIO) { | ||
| 304 | emulated = kvmppc_handle_load(run, vcpu, KVM_REG_FQPR | rs, 8, 1); | ||
| 305 | goto done_load; | ||
| 306 | } | ||
| 307 | |||
| 308 | emulated = EMULATE_DONE; | ||
| 309 | |||
| 310 | /* put in registers */ | ||
| 311 | cvt_fd((float*)&tmp[0], (double*)&vcpu->arch.fpr[rs], &t); | ||
| 312 | vcpu->arch.qpr[rs] = tmp[1]; | ||
| 313 | |||
| 314 | dprintk(KERN_INFO "KVM: PSQ_LD [0x%x, 0x%x] at 0x%lx (%d)\n", tmp[0], | ||
| 315 | tmp[1], addr, w ? 4 : 8); | ||
| 316 | |||
| 317 | done_load: | ||
| 318 | return emulated; | ||
| 319 | } | ||
| 320 | |||
| 321 | static int kvmppc_emulate_psq_store(struct kvm_run *run, struct kvm_vcpu *vcpu, | ||
| 322 | int rs, ulong addr, bool w, int i) | ||
| 323 | { | ||
| 324 | int emulated = EMULATE_FAIL; | ||
| 325 | struct thread_struct t; | ||
| 326 | int r; | ||
| 327 | u32 tmp[2]; | ||
| 328 | int len = w ? sizeof(u32) : sizeof(u64); | ||
| 329 | |||
| 330 | t.fpscr.val = vcpu->arch.fpscr; | ||
| 331 | |||
| 332 | cvt_df((double*)&vcpu->arch.fpr[rs], (float*)&tmp[0], &t); | ||
| 333 | tmp[1] = vcpu->arch.qpr[rs]; | ||
| 334 | |||
| 335 | r = kvmppc_st(vcpu, &addr, len, tmp, true); | ||
| 336 | vcpu->arch.paddr_accessed = addr; | ||
| 337 | if (r < 0) { | ||
| 338 | kvmppc_inject_pf(vcpu, addr, true); | ||
| 339 | } else if ((r == EMULATE_DO_MMIO) && w) { | ||
| 340 | emulated = kvmppc_handle_store(run, vcpu, tmp[0], 4, 1); | ||
| 341 | } else if (r == EMULATE_DO_MMIO) { | ||
| 342 | u64 val = ((u64)tmp[0] << 32) | tmp[1]; | ||
| 343 | emulated = kvmppc_handle_store(run, vcpu, val, 8, 1); | ||
| 344 | } else { | ||
| 345 | emulated = EMULATE_DONE; | ||
| 346 | } | ||
| 347 | |||
| 348 | dprintk(KERN_INFO "KVM: PSQ_ST [0x%x, 0x%x] at 0x%lx (%d)\n", | ||
| 349 | tmp[0], tmp[1], addr, len); | ||
| 350 | |||
| 351 | return emulated; | ||
| 352 | } | ||
| 353 | |||
| 354 | /* | ||
| 355 | * Cuts out inst bits with ordering according to spec. | ||
| 356 | * That means the leftmost bit is zero. All given bits are included. | ||
| 357 | */ | ||
| 358 | static inline u32 inst_get_field(u32 inst, int msb, int lsb) | ||
| 359 | { | ||
| 360 | return kvmppc_get_field(inst, msb + 32, lsb + 32); | ||
| 361 | } | ||
| 362 | |||
| 363 | /* | ||
| 364 | * Replaces inst bits with ordering according to spec. | ||
| 365 | */ | ||
| 366 | static inline u32 inst_set_field(u32 inst, int msb, int lsb, int value) | ||
| 367 | { | ||
| 368 | return kvmppc_set_field(inst, msb + 32, lsb + 32, value); | ||
| 369 | } | ||
| 370 | |||
| 371 | bool kvmppc_inst_is_paired_single(struct kvm_vcpu *vcpu, u32 inst) | ||
| 372 | { | ||
| 373 | if (!(vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE)) | ||
| 374 | return false; | ||
| 375 | |||
| 376 | switch (get_op(inst)) { | ||
| 377 | case OP_PSQ_L: | ||
| 378 | case OP_PSQ_LU: | ||
| 379 | case OP_PSQ_ST: | ||
| 380 | case OP_PSQ_STU: | ||
| 381 | case OP_LFS: | ||
| 382 | case OP_LFSU: | ||
| 383 | case OP_LFD: | ||
| 384 | case OP_LFDU: | ||
| 385 | case OP_STFS: | ||
| 386 | case OP_STFSU: | ||
| 387 | case OP_STFD: | ||
| 388 | case OP_STFDU: | ||
| 389 | return true; | ||
| 390 | case 4: | ||
| 391 | /* X form */ | ||
| 392 | switch (inst_get_field(inst, 21, 30)) { | ||
| 393 | case OP_4X_PS_CMPU0: | ||
| 394 | case OP_4X_PSQ_LX: | ||
| 395 | case OP_4X_PS_CMPO0: | ||
| 396 | case OP_4X_PSQ_LUX: | ||
| 397 | case OP_4X_PS_NEG: | ||
| 398 | case OP_4X_PS_CMPU1: | ||
| 399 | case OP_4X_PS_MR: | ||
| 400 | case OP_4X_PS_CMPO1: | ||
| 401 | case OP_4X_PS_NABS: | ||
| 402 | case OP_4X_PS_ABS: | ||
| 403 | case OP_4X_PS_MERGE00: | ||
| 404 | case OP_4X_PS_MERGE01: | ||
| 405 | case OP_4X_PS_MERGE10: | ||
| 406 | case OP_4X_PS_MERGE11: | ||
| 407 | return true; | ||
| 408 | } | ||
| 409 | /* XW form */ | ||
| 410 | switch (inst_get_field(inst, 25, 30)) { | ||
| 411 | case OP_4XW_PSQ_STX: | ||
| 412 | case OP_4XW_PSQ_STUX: | ||
| 413 | return true; | ||
| 414 | } | ||
| 415 | /* A form */ | ||
| 416 | switch (inst_get_field(inst, 26, 30)) { | ||
| 417 | case OP_4A_PS_SUM1: | ||
| 418 | case OP_4A_PS_SUM0: | ||
| 419 | case OP_4A_PS_MULS0: | ||
| 420 | case OP_4A_PS_MULS1: | ||
| 421 | case OP_4A_PS_MADDS0: | ||
| 422 | case OP_4A_PS_MADDS1: | ||
| 423 | case OP_4A_PS_DIV: | ||
| 424 | case OP_4A_PS_SUB: | ||
| 425 | case OP_4A_PS_ADD: | ||
| 426 | case OP_4A_PS_SEL: | ||
| 427 | case OP_4A_PS_RES: | ||
| 428 | case OP_4A_PS_MUL: | ||
| 429 | case OP_4A_PS_RSQRTE: | ||
| 430 | case OP_4A_PS_MSUB: | ||
| 431 | case OP_4A_PS_MADD: | ||
| 432 | case OP_4A_PS_NMSUB: | ||
| 433 | case OP_4A_PS_NMADD: | ||
| 434 | return true; | ||
| 435 | } | ||
| 436 | break; | ||
| 437 | case 59: | ||
| 438 | switch (inst_get_field(inst, 21, 30)) { | ||
| 439 | case OP_59_FADDS: | ||
| 440 | case OP_59_FSUBS: | ||
| 441 | case OP_59_FDIVS: | ||
| 442 | case OP_59_FRES: | ||
| 443 | case OP_59_FRSQRTES: | ||
| 444 | return true; | ||
| 445 | } | ||
| 446 | switch (inst_get_field(inst, 26, 30)) { | ||
| 447 | case OP_59_FMULS: | ||
| 448 | case OP_59_FMSUBS: | ||
| 449 | case OP_59_FMADDS: | ||
| 450 | case OP_59_FNMSUBS: | ||
| 451 | case OP_59_FNMADDS: | ||
| 452 | return true; | ||
| 453 | } | ||
| 454 | break; | ||
| 455 | case 63: | ||
| 456 | switch (inst_get_field(inst, 21, 30)) { | ||
| 457 | case OP_63_MTFSB0: | ||
| 458 | case OP_63_MTFSB1: | ||
| 459 | case OP_63_MTFSF: | ||
| 460 | case OP_63_MTFSFI: | ||
| 461 | case OP_63_MCRFS: | ||
| 462 | case OP_63_MFFS: | ||
| 463 | case OP_63_FCMPU: | ||
| 464 | case OP_63_FCMPO: | ||
| 465 | case OP_63_FNEG: | ||
| 466 | case OP_63_FMR: | ||
| 467 | case OP_63_FABS: | ||
| 468 | case OP_63_FRSP: | ||
| 469 | case OP_63_FDIV: | ||
| 470 | case OP_63_FADD: | ||
| 471 | case OP_63_FSUB: | ||
| 472 | case OP_63_FCTIW: | ||
| 473 | case OP_63_FCTIWZ: | ||
| 474 | case OP_63_FRSQRTE: | ||
| 475 | case OP_63_FCPSGN: | ||
| 476 | return true; | ||
| 477 | } | ||
| 478 | switch (inst_get_field(inst, 26, 30)) { | ||
| 479 | case OP_63_FMUL: | ||
| 480 | case OP_63_FSEL: | ||
| 481 | case OP_63_FMSUB: | ||
| 482 | case OP_63_FMADD: | ||
| 483 | case OP_63_FNMSUB: | ||
| 484 | case OP_63_FNMADD: | ||
| 485 | return true; | ||
| 486 | } | ||
| 487 | break; | ||
| 488 | case 31: | ||
| 489 | switch (inst_get_field(inst, 21, 30)) { | ||
| 490 | case OP_31_LFSX: | ||
| 491 | case OP_31_LFSUX: | ||
| 492 | case OP_31_LFDX: | ||
| 493 | case OP_31_LFDUX: | ||
| 494 | case OP_31_STFSX: | ||
| 495 | case OP_31_STFSUX: | ||
| 496 | case OP_31_STFX: | ||
| 497 | case OP_31_STFUX: | ||
| 498 | case OP_31_STFIWX: | ||
| 499 | return true; | ||
| 500 | } | ||
| 501 | break; | ||
| 502 | } | ||
| 503 | |||
| 504 | return false; | ||
| 505 | } | ||
| 506 | |||
| 507 | static int get_d_signext(u32 inst) | ||
| 508 | { | ||
| 509 | int d = inst & 0x8ff; | ||
| 510 | |||
| 511 | if (d & 0x800) | ||
| 512 | return -(d & 0x7ff); | ||
| 513 | |||
| 514 | return (d & 0x7ff); | ||
| 515 | } | ||
| 516 | |||
| 517 | static int kvmppc_ps_three_in(struct kvm_vcpu *vcpu, bool rc, | ||
| 518 | int reg_out, int reg_in1, int reg_in2, | ||
| 519 | int reg_in3, int scalar, | ||
| 520 | void (*func)(struct thread_struct *t, | ||
| 521 | u32 *dst, u32 *src1, | ||
| 522 | u32 *src2, u32 *src3)) | ||
| 523 | { | ||
| 524 | u32 *qpr = vcpu->arch.qpr; | ||
| 525 | u64 *fpr = vcpu->arch.fpr; | ||
| 526 | u32 ps0_out; | ||
| 527 | u32 ps0_in1, ps0_in2, ps0_in3; | ||
| 528 | u32 ps1_in1, ps1_in2, ps1_in3; | ||
| 529 | struct thread_struct t; | ||
| 530 | t.fpscr.val = vcpu->arch.fpscr; | ||
| 531 | |||
| 532 | /* RC */ | ||
| 533 | WARN_ON(rc); | ||
| 534 | |||
| 535 | /* PS0 */ | ||
| 536 | cvt_df((double*)&fpr[reg_in1], (float*)&ps0_in1, &t); | ||
| 537 | cvt_df((double*)&fpr[reg_in2], (float*)&ps0_in2, &t); | ||
| 538 | cvt_df((double*)&fpr[reg_in3], (float*)&ps0_in3, &t); | ||
| 539 | |||
| 540 | if (scalar & SCALAR_LOW) | ||
| 541 | ps0_in2 = qpr[reg_in2]; | ||
| 542 | |||
| 543 | func(&t, &ps0_out, &ps0_in1, &ps0_in2, &ps0_in3); | ||
| 544 | |||
| 545 | dprintk(KERN_INFO "PS3 ps0 -> f(0x%x, 0x%x, 0x%x) = 0x%x\n", | ||
| 546 | ps0_in1, ps0_in2, ps0_in3, ps0_out); | ||
| 547 | |||
| 548 | if (!(scalar & SCALAR_NO_PS0)) | ||
| 549 | cvt_fd((float*)&ps0_out, (double*)&fpr[reg_out], &t); | ||
| 550 | |||
| 551 | /* PS1 */ | ||
| 552 | ps1_in1 = qpr[reg_in1]; | ||
| 553 | ps1_in2 = qpr[reg_in2]; | ||
| 554 | ps1_in3 = qpr[reg_in3]; | ||
| 555 | |||
| 556 | if (scalar & SCALAR_HIGH) | ||
| 557 | ps1_in2 = ps0_in2; | ||
| 558 | |||
| 559 | if (!(scalar & SCALAR_NO_PS1)) | ||
| 560 | func(&t, &qpr[reg_out], &ps1_in1, &ps1_in2, &ps1_in3); | ||
| 561 | |||
| 562 | dprintk(KERN_INFO "PS3 ps1 -> f(0x%x, 0x%x, 0x%x) = 0x%x\n", | ||
| 563 | ps1_in1, ps1_in2, ps1_in3, qpr[reg_out]); | ||
| 564 | |||
| 565 | return EMULATE_DONE; | ||
| 566 | } | ||
| 567 | |||
| 568 | static int kvmppc_ps_two_in(struct kvm_vcpu *vcpu, bool rc, | ||
| 569 | int reg_out, int reg_in1, int reg_in2, | ||
| 570 | int scalar, | ||
| 571 | void (*func)(struct thread_struct *t, | ||
| 572 | u32 *dst, u32 *src1, | ||
| 573 | u32 *src2)) | ||
| 574 | { | ||
| 575 | u32 *qpr = vcpu->arch.qpr; | ||
| 576 | u64 *fpr = vcpu->arch.fpr; | ||
| 577 | u32 ps0_out; | ||
| 578 | u32 ps0_in1, ps0_in2; | ||
| 579 | u32 ps1_out; | ||
| 580 | u32 ps1_in1, ps1_in2; | ||
| 581 | struct thread_struct t; | ||
| 582 | t.fpscr.val = vcpu->arch.fpscr; | ||
| 583 | |||
| 584 | /* RC */ | ||
| 585 | WARN_ON(rc); | ||
| 586 | |||
| 587 | /* PS0 */ | ||
| 588 | cvt_df((double*)&fpr[reg_in1], (float*)&ps0_in1, &t); | ||
| 589 | |||
| 590 | if (scalar & SCALAR_LOW) | ||
| 591 | ps0_in2 = qpr[reg_in2]; | ||
| 592 | else | ||
| 593 | cvt_df((double*)&fpr[reg_in2], (float*)&ps0_in2, &t); | ||
| 594 | |||
| 595 | func(&t, &ps0_out, &ps0_in1, &ps0_in2); | ||
| 596 | |||
| 597 | if (!(scalar & SCALAR_NO_PS0)) { | ||
| 598 | dprintk(KERN_INFO "PS2 ps0 -> f(0x%x, 0x%x) = 0x%x\n", | ||
| 599 | ps0_in1, ps0_in2, ps0_out); | ||
| 600 | |||
| 601 | cvt_fd((float*)&ps0_out, (double*)&fpr[reg_out], &t); | ||
| 602 | } | ||
| 603 | |||
| 604 | /* PS1 */ | ||
| 605 | ps1_in1 = qpr[reg_in1]; | ||
| 606 | ps1_in2 = qpr[reg_in2]; | ||
| 607 | |||
| 608 | if (scalar & SCALAR_HIGH) | ||
| 609 | ps1_in2 = ps0_in2; | ||
| 610 | |||
| 611 | func(&t, &ps1_out, &ps1_in1, &ps1_in2); | ||
| 612 | |||
| 613 | if (!(scalar & SCALAR_NO_PS1)) { | ||
| 614 | qpr[reg_out] = ps1_out; | ||
| 615 | |||
| 616 | dprintk(KERN_INFO "PS2 ps1 -> f(0x%x, 0x%x) = 0x%x\n", | ||
| 617 | ps1_in1, ps1_in2, qpr[reg_out]); | ||
| 618 | } | ||
| 619 | |||
| 620 | return EMULATE_DONE; | ||
| 621 | } | ||
| 622 | |||
| 623 | static int kvmppc_ps_one_in(struct kvm_vcpu *vcpu, bool rc, | ||
| 624 | int reg_out, int reg_in, | ||
| 625 | void (*func)(struct thread_struct *t, | ||
| 626 | u32 *dst, u32 *src1)) | ||
| 627 | { | ||
| 628 | u32 *qpr = vcpu->arch.qpr; | ||
| 629 | u64 *fpr = vcpu->arch.fpr; | ||
| 630 | u32 ps0_out, ps0_in; | ||
| 631 | u32 ps1_in; | ||
| 632 | struct thread_struct t; | ||
| 633 | t.fpscr.val = vcpu->arch.fpscr; | ||
| 634 | |||
| 635 | /* RC */ | ||
| 636 | WARN_ON(rc); | ||
| 637 | |||
| 638 | /* PS0 */ | ||
| 639 | cvt_df((double*)&fpr[reg_in], (float*)&ps0_in, &t); | ||
| 640 | func(&t, &ps0_out, &ps0_in); | ||
| 641 | |||
| 642 | dprintk(KERN_INFO "PS1 ps0 -> f(0x%x) = 0x%x\n", | ||
| 643 | ps0_in, ps0_out); | ||
| 644 | |||
| 645 | cvt_fd((float*)&ps0_out, (double*)&fpr[reg_out], &t); | ||
| 646 | |||
| 647 | /* PS1 */ | ||
| 648 | ps1_in = qpr[reg_in]; | ||
| 649 | func(&t, &qpr[reg_out], &ps1_in); | ||
| 650 | |||
| 651 | dprintk(KERN_INFO "PS1 ps1 -> f(0x%x) = 0x%x\n", | ||
| 652 | ps1_in, qpr[reg_out]); | ||
| 653 | |||
| 654 | return EMULATE_DONE; | ||
| 655 | } | ||
| 656 | |||
| 657 | int kvmppc_emulate_paired_single(struct kvm_run *run, struct kvm_vcpu *vcpu) | ||
| 658 | { | ||
| 659 | u32 inst = kvmppc_get_last_inst(vcpu); | ||
| 660 | enum emulation_result emulated = EMULATE_DONE; | ||
| 661 | |||
| 662 | int ax_rd = inst_get_field(inst, 6, 10); | ||
| 663 | int ax_ra = inst_get_field(inst, 11, 15); | ||
| 664 | int ax_rb = inst_get_field(inst, 16, 20); | ||
| 665 | int ax_rc = inst_get_field(inst, 21, 25); | ||
| 666 | short full_d = inst_get_field(inst, 16, 31); | ||
| 667 | |||
| 668 | u64 *fpr_d = &vcpu->arch.fpr[ax_rd]; | ||
| 669 | u64 *fpr_a = &vcpu->arch.fpr[ax_ra]; | ||
| 670 | u64 *fpr_b = &vcpu->arch.fpr[ax_rb]; | ||
| 671 | u64 *fpr_c = &vcpu->arch.fpr[ax_rc]; | ||
| 672 | |||
| 673 | bool rcomp = (inst & 1) ? true : false; | ||
| 674 | u32 cr = kvmppc_get_cr(vcpu); | ||
| 675 | struct thread_struct t; | ||
| 676 | #ifdef DEBUG | ||
| 677 | int i; | ||
| 678 | #endif | ||
| 679 | |||
| 680 | t.fpscr.val = vcpu->arch.fpscr; | ||
| 681 | |||
| 682 | if (!kvmppc_inst_is_paired_single(vcpu, inst)) | ||
| 683 | return EMULATE_FAIL; | ||
| 684 | |||
| 685 | if (!(vcpu->arch.msr & MSR_FP)) { | ||
| 686 | kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL); | ||
| 687 | return EMULATE_AGAIN; | ||
| 688 | } | ||
| 689 | |||
| 690 | kvmppc_giveup_ext(vcpu, MSR_FP); | ||
| 691 | preempt_disable(); | ||
| 692 | enable_kernel_fp(); | ||
| 693 | /* Do we need to clear FE0 / FE1 here? Don't think so. */ | ||
| 694 | |||
| 695 | #ifdef DEBUG | ||
| 696 | for (i = 0; i < ARRAY_SIZE(vcpu->arch.fpr); i++) { | ||
| 697 | u32 f; | ||
| 698 | cvt_df((double*)&vcpu->arch.fpr[i], (float*)&f, &t); | ||
| 699 | dprintk(KERN_INFO "FPR[%d] = 0x%x / 0x%llx QPR[%d] = 0x%x\n", | ||
| 700 | i, f, vcpu->arch.fpr[i], i, vcpu->arch.qpr[i]); | ||
| 701 | } | ||
| 702 | #endif | ||
| 703 | |||
| 704 | switch (get_op(inst)) { | ||
| 705 | case OP_PSQ_L: | ||
| 706 | { | ||
| 707 | ulong addr = ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0; | ||
| 708 | bool w = inst_get_field(inst, 16, 16) ? true : false; | ||
| 709 | int i = inst_get_field(inst, 17, 19); | ||
| 710 | |||
| 711 | addr += get_d_signext(inst); | ||
| 712 | emulated = kvmppc_emulate_psq_load(run, vcpu, ax_rd, addr, w, i); | ||
| 713 | break; | ||
| 714 | } | ||
| 715 | case OP_PSQ_LU: | ||
| 716 | { | ||
| 717 | ulong addr = kvmppc_get_gpr(vcpu, ax_ra); | ||
| 718 | bool w = inst_get_field(inst, 16, 16) ? true : false; | ||
| 719 | int i = inst_get_field(inst, 17, 19); | ||
| 720 | |||
| 721 | addr += get_d_signext(inst); | ||
| 722 | emulated = kvmppc_emulate_psq_load(run, vcpu, ax_rd, addr, w, i); | ||
| 723 | |||
| 724 | if (emulated == EMULATE_DONE) | ||
| 725 | kvmppc_set_gpr(vcpu, ax_ra, addr); | ||
| 726 | break; | ||
| 727 | } | ||
| 728 | case OP_PSQ_ST: | ||
| 729 | { | ||
| 730 | ulong addr = ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0; | ||
| 731 | bool w = inst_get_field(inst, 16, 16) ? true : false; | ||
| 732 | int i = inst_get_field(inst, 17, 19); | ||
| 733 | |||
| 734 | addr += get_d_signext(inst); | ||
| 735 | emulated = kvmppc_emulate_psq_store(run, vcpu, ax_rd, addr, w, i); | ||
| 736 | break; | ||
| 737 | } | ||
| 738 | case OP_PSQ_STU: | ||
| 739 | { | ||
| 740 | ulong addr = kvmppc_get_gpr(vcpu, ax_ra); | ||
| 741 | bool w = inst_get_field(inst, 16, 16) ? true : false; | ||
| 742 | int i = inst_get_field(inst, 17, 19); | ||
| 743 | |||
| 744 | addr += get_d_signext(inst); | ||
| 745 | emulated = kvmppc_emulate_psq_store(run, vcpu, ax_rd, addr, w, i); | ||
| 746 | |||
| 747 | if (emulated == EMULATE_DONE) | ||
| 748 | kvmppc_set_gpr(vcpu, ax_ra, addr); | ||
| 749 | break; | ||
| 750 | } | ||
| 751 | case 4: | ||
| 752 | /* X form */ | ||
| 753 | switch (inst_get_field(inst, 21, 30)) { | ||
| 754 | case OP_4X_PS_CMPU0: | ||
| 755 | /* XXX */ | ||
| 756 | emulated = EMULATE_FAIL; | ||
| 757 | break; | ||
| 758 | case OP_4X_PSQ_LX: | ||
| 759 | { | ||
| 760 | ulong addr = ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0; | ||
| 761 | bool w = inst_get_field(inst, 21, 21) ? true : false; | ||
| 762 | int i = inst_get_field(inst, 22, 24); | ||
| 763 | |||
| 764 | addr += kvmppc_get_gpr(vcpu, ax_rb); | ||
| 765 | emulated = kvmppc_emulate_psq_load(run, vcpu, ax_rd, addr, w, i); | ||
| 766 | break; | ||
| 767 | } | ||
| 768 | case OP_4X_PS_CMPO0: | ||
| 769 | /* XXX */ | ||
| 770 | emulated = EMULATE_FAIL; | ||
| 771 | break; | ||
| 772 | case OP_4X_PSQ_LUX: | ||
| 773 | { | ||
| 774 | ulong addr = kvmppc_get_gpr(vcpu, ax_ra); | ||
| 775 | bool w = inst_get_field(inst, 21, 21) ? true : false; | ||
| 776 | int i = inst_get_field(inst, 22, 24); | ||
| 777 | |||
| 778 | addr += kvmppc_get_gpr(vcpu, ax_rb); | ||
| 779 | emulated = kvmppc_emulate_psq_load(run, vcpu, ax_rd, addr, w, i); | ||
| 780 | |||
| 781 | if (emulated == EMULATE_DONE) | ||
| 782 | kvmppc_set_gpr(vcpu, ax_ra, addr); | ||
| 783 | break; | ||
| 784 | } | ||
| 785 | case OP_4X_PS_NEG: | ||
| 786 | vcpu->arch.fpr[ax_rd] = vcpu->arch.fpr[ax_rb]; | ||
| 787 | vcpu->arch.fpr[ax_rd] ^= 0x8000000000000000ULL; | ||
| 788 | vcpu->arch.qpr[ax_rd] = vcpu->arch.qpr[ax_rb]; | ||
| 789 | vcpu->arch.qpr[ax_rd] ^= 0x80000000; | ||
| 790 | break; | ||
| 791 | case OP_4X_PS_CMPU1: | ||
| 792 | /* XXX */ | ||
| 793 | emulated = EMULATE_FAIL; | ||
| 794 | break; | ||
| 795 | case OP_4X_PS_MR: | ||
| 796 | WARN_ON(rcomp); | ||
| 797 | vcpu->arch.fpr[ax_rd] = vcpu->arch.fpr[ax_rb]; | ||
| 798 | vcpu->arch.qpr[ax_rd] = vcpu->arch.qpr[ax_rb]; | ||
| 799 | break; | ||
| 800 | case OP_4X_PS_CMPO1: | ||
| 801 | /* XXX */ | ||
| 802 | emulated = EMULATE_FAIL; | ||
| 803 | break; | ||
| 804 | case OP_4X_PS_NABS: | ||
| 805 | WARN_ON(rcomp); | ||
| 806 | vcpu->arch.fpr[ax_rd] = vcpu->arch.fpr[ax_rb]; | ||
| 807 | vcpu->arch.fpr[ax_rd] |= 0x8000000000000000ULL; | ||
| 808 | vcpu->arch.qpr[ax_rd] = vcpu->arch.qpr[ax_rb]; | ||
| 809 | vcpu->arch.qpr[ax_rd] |= 0x80000000; | ||
| 810 | break; | ||
| 811 | case OP_4X_PS_ABS: | ||
| 812 | WARN_ON(rcomp); | ||
| 813 | vcpu->arch.fpr[ax_rd] = vcpu->arch.fpr[ax_rb]; | ||
| 814 | vcpu->arch.fpr[ax_rd] &= ~0x8000000000000000ULL; | ||
| 815 | vcpu->arch.qpr[ax_rd] = vcpu->arch.qpr[ax_rb]; | ||
| 816 | vcpu->arch.qpr[ax_rd] &= ~0x80000000; | ||
| 817 | break; | ||
| 818 | case OP_4X_PS_MERGE00: | ||
| 819 | WARN_ON(rcomp); | ||
| 820 | vcpu->arch.fpr[ax_rd] = vcpu->arch.fpr[ax_ra]; | ||
| 821 | /* vcpu->arch.qpr[ax_rd] = vcpu->arch.fpr[ax_rb]; */ | ||
| 822 | cvt_df((double*)&vcpu->arch.fpr[ax_rb], | ||
| 823 | (float*)&vcpu->arch.qpr[ax_rd], &t); | ||
| 824 | break; | ||
| 825 | case OP_4X_PS_MERGE01: | ||
| 826 | WARN_ON(rcomp); | ||
| 827 | vcpu->arch.fpr[ax_rd] = vcpu->arch.fpr[ax_ra]; | ||
| 828 | vcpu->arch.qpr[ax_rd] = vcpu->arch.qpr[ax_rb]; | ||
| 829 | break; | ||
| 830 | case OP_4X_PS_MERGE10: | ||
| 831 | WARN_ON(rcomp); | ||
| 832 | /* vcpu->arch.fpr[ax_rd] = vcpu->arch.qpr[ax_ra]; */ | ||
| 833 | cvt_fd((float*)&vcpu->arch.qpr[ax_ra], | ||
| 834 | (double*)&vcpu->arch.fpr[ax_rd], &t); | ||
| 835 | /* vcpu->arch.qpr[ax_rd] = vcpu->arch.fpr[ax_rb]; */ | ||
| 836 | cvt_df((double*)&vcpu->arch.fpr[ax_rb], | ||
| 837 | (float*)&vcpu->arch.qpr[ax_rd], &t); | ||
| 838 | break; | ||
| 839 | case OP_4X_PS_MERGE11: | ||
| 840 | WARN_ON(rcomp); | ||
| 841 | /* vcpu->arch.fpr[ax_rd] = vcpu->arch.qpr[ax_ra]; */ | ||
| 842 | cvt_fd((float*)&vcpu->arch.qpr[ax_ra], | ||
| 843 | (double*)&vcpu->arch.fpr[ax_rd], &t); | ||
| 844 | vcpu->arch.qpr[ax_rd] = vcpu->arch.qpr[ax_rb]; | ||
| 845 | break; | ||
| 846 | } | ||
| 847 | /* XW form */ | ||
| 848 | switch (inst_get_field(inst, 25, 30)) { | ||
| 849 | case OP_4XW_PSQ_STX: | ||
| 850 | { | ||
| 851 | ulong addr = ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0; | ||
| 852 | bool w = inst_get_field(inst, 21, 21) ? true : false; | ||
| 853 | int i = inst_get_field(inst, 22, 24); | ||
| 854 | |||
| 855 | addr += kvmppc_get_gpr(vcpu, ax_rb); | ||
| 856 | emulated = kvmppc_emulate_psq_store(run, vcpu, ax_rd, addr, w, i); | ||
| 857 | break; | ||
| 858 | } | ||
| 859 | case OP_4XW_PSQ_STUX: | ||
| 860 | { | ||
| 861 | ulong addr = kvmppc_get_gpr(vcpu, ax_ra); | ||
| 862 | bool w = inst_get_field(inst, 21, 21) ? true : false; | ||
| 863 | int i = inst_get_field(inst, 22, 24); | ||
| 864 | |||
| 865 | addr += kvmppc_get_gpr(vcpu, ax_rb); | ||
| 866 | emulated = kvmppc_emulate_psq_store(run, vcpu, ax_rd, addr, w, i); | ||
| 867 | |||
| 868 | if (emulated == EMULATE_DONE) | ||
| 869 | kvmppc_set_gpr(vcpu, ax_ra, addr); | ||
| 870 | break; | ||
| 871 | } | ||
| 872 | } | ||
| 873 | /* A form */ | ||
| 874 | switch (inst_get_field(inst, 26, 30)) { | ||
| 875 | case OP_4A_PS_SUM1: | ||
| 876 | emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd, | ||
| 877 | ax_rb, ax_ra, SCALAR_NO_PS0 | SCALAR_HIGH, fps_fadds); | ||
| 878 | vcpu->arch.fpr[ax_rd] = vcpu->arch.fpr[ax_rc]; | ||
| 879 | break; | ||
| 880 | case OP_4A_PS_SUM0: | ||
| 881 | emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd, | ||
| 882 | ax_ra, ax_rb, SCALAR_NO_PS1 | SCALAR_LOW, fps_fadds); | ||
| 883 | vcpu->arch.qpr[ax_rd] = vcpu->arch.qpr[ax_rc]; | ||
| 884 | break; | ||
| 885 | case OP_4A_PS_MULS0: | ||
| 886 | emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd, | ||
| 887 | ax_ra, ax_rc, SCALAR_HIGH, fps_fmuls); | ||
| 888 | break; | ||
| 889 | case OP_4A_PS_MULS1: | ||
| 890 | emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd, | ||
| 891 | ax_ra, ax_rc, SCALAR_LOW, fps_fmuls); | ||
| 892 | break; | ||
| 893 | case OP_4A_PS_MADDS0: | ||
| 894 | emulated = kvmppc_ps_three_in(vcpu, rcomp, ax_rd, | ||
| 895 | ax_ra, ax_rc, ax_rb, SCALAR_HIGH, fps_fmadds); | ||
| 896 | break; | ||
| 897 | case OP_4A_PS_MADDS1: | ||
| 898 | emulated = kvmppc_ps_three_in(vcpu, rcomp, ax_rd, | ||
| 899 | ax_ra, ax_rc, ax_rb, SCALAR_LOW, fps_fmadds); | ||
| 900 | break; | ||
| 901 | case OP_4A_PS_DIV: | ||
| 902 | emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd, | ||
| 903 | ax_ra, ax_rb, SCALAR_NONE, fps_fdivs); | ||
| 904 | break; | ||
| 905 | case OP_4A_PS_SUB: | ||
| 906 | emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd, | ||
| 907 | ax_ra, ax_rb, SCALAR_NONE, fps_fsubs); | ||
| 908 | break; | ||
| 909 | case OP_4A_PS_ADD: | ||
| 910 | emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd, | ||
| 911 | ax_ra, ax_rb, SCALAR_NONE, fps_fadds); | ||
| 912 | break; | ||
| 913 | case OP_4A_PS_SEL: | ||
| 914 | emulated = kvmppc_ps_three_in(vcpu, rcomp, ax_rd, | ||
| 915 | ax_ra, ax_rc, ax_rb, SCALAR_NONE, fps_fsel); | ||
| 916 | break; | ||
| 917 | case OP_4A_PS_RES: | ||
| 918 | emulated = kvmppc_ps_one_in(vcpu, rcomp, ax_rd, | ||
| 919 | ax_rb, fps_fres); | ||
| 920 | break; | ||
| 921 | case OP_4A_PS_MUL: | ||
| 922 | emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd, | ||
| 923 | ax_ra, ax_rc, SCALAR_NONE, fps_fmuls); | ||
| 924 | break; | ||
| 925 | case OP_4A_PS_RSQRTE: | ||
| 926 | emulated = kvmppc_ps_one_in(vcpu, rcomp, ax_rd, | ||
| 927 | ax_rb, fps_frsqrte); | ||
| 928 | break; | ||
| 929 | case OP_4A_PS_MSUB: | ||
| 930 | emulated = kvmppc_ps_three_in(vcpu, rcomp, ax_rd, | ||
| 931 | ax_ra, ax_rc, ax_rb, SCALAR_NONE, fps_fmsubs); | ||
| 932 | break; | ||
| 933 | case OP_4A_PS_MADD: | ||
| 934 | emulated = kvmppc_ps_three_in(vcpu, rcomp, ax_rd, | ||
| 935 | ax_ra, ax_rc, ax_rb, SCALAR_NONE, fps_fmadds); | ||
| 936 | break; | ||
| 937 | case OP_4A_PS_NMSUB: | ||
| 938 | emulated = kvmppc_ps_three_in(vcpu, rcomp, ax_rd, | ||
| 939 | ax_ra, ax_rc, ax_rb, SCALAR_NONE, fps_fnmsubs); | ||
| 940 | break; | ||
| 941 | case OP_4A_PS_NMADD: | ||
| 942 | emulated = kvmppc_ps_three_in(vcpu, rcomp, ax_rd, | ||
| 943 | ax_ra, ax_rc, ax_rb, SCALAR_NONE, fps_fnmadds); | ||
| 944 | break; | ||
| 945 | } | ||
| 946 | break; | ||
| 947 | |||
| 948 | /* Real FPU operations */ | ||
| 949 | |||
| 950 | case OP_LFS: | ||
| 951 | { | ||
| 952 | ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) + full_d; | ||
| 953 | |||
| 954 | emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd, addr, | ||
| 955 | FPU_LS_SINGLE); | ||
| 956 | break; | ||
| 957 | } | ||
| 958 | case OP_LFSU: | ||
| 959 | { | ||
| 960 | ulong addr = kvmppc_get_gpr(vcpu, ax_ra) + full_d; | ||
| 961 | |||
| 962 | emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd, addr, | ||
| 963 | FPU_LS_SINGLE); | ||
| 964 | |||
| 965 | if (emulated == EMULATE_DONE) | ||
| 966 | kvmppc_set_gpr(vcpu, ax_ra, addr); | ||
| 967 | break; | ||
| 968 | } | ||
| 969 | case OP_LFD: | ||
| 970 | { | ||
| 971 | ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) + full_d; | ||
| 972 | |||
| 973 | emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd, addr, | ||
| 974 | FPU_LS_DOUBLE); | ||
| 975 | break; | ||
| 976 | } | ||
| 977 | case OP_LFDU: | ||
| 978 | { | ||
| 979 | ulong addr = kvmppc_get_gpr(vcpu, ax_ra) + full_d; | ||
| 980 | |||
| 981 | emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd, addr, | ||
| 982 | FPU_LS_DOUBLE); | ||
| 983 | |||
| 984 | if (emulated == EMULATE_DONE) | ||
| 985 | kvmppc_set_gpr(vcpu, ax_ra, addr); | ||
| 986 | break; | ||
| 987 | } | ||
| 988 | case OP_STFS: | ||
| 989 | { | ||
| 990 | ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) + full_d; | ||
| 991 | |||
| 992 | emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd, addr, | ||
| 993 | FPU_LS_SINGLE); | ||
| 994 | break; | ||
| 995 | } | ||
| 996 | case OP_STFSU: | ||
| 997 | { | ||
| 998 | ulong addr = kvmppc_get_gpr(vcpu, ax_ra) + full_d; | ||
| 999 | |||
| 1000 | emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd, addr, | ||
| 1001 | FPU_LS_SINGLE); | ||
| 1002 | |||
| 1003 | if (emulated == EMULATE_DONE) | ||
| 1004 | kvmppc_set_gpr(vcpu, ax_ra, addr); | ||
| 1005 | break; | ||
| 1006 | } | ||
| 1007 | case OP_STFD: | ||
| 1008 | { | ||
| 1009 | ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) + full_d; | ||
| 1010 | |||
| 1011 | emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd, addr, | ||
| 1012 | FPU_LS_DOUBLE); | ||
| 1013 | break; | ||
| 1014 | } | ||
| 1015 | case OP_STFDU: | ||
| 1016 | { | ||
| 1017 | ulong addr = kvmppc_get_gpr(vcpu, ax_ra) + full_d; | ||
| 1018 | |||
| 1019 | emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd, addr, | ||
| 1020 | FPU_LS_DOUBLE); | ||
| 1021 | |||
| 1022 | if (emulated == EMULATE_DONE) | ||
| 1023 | kvmppc_set_gpr(vcpu, ax_ra, addr); | ||
| 1024 | break; | ||
| 1025 | } | ||
| 1026 | case 31: | ||
| 1027 | switch (inst_get_field(inst, 21, 30)) { | ||
| 1028 | case OP_31_LFSX: | ||
| 1029 | { | ||
| 1030 | ulong addr = ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0; | ||
| 1031 | |||
| 1032 | addr += kvmppc_get_gpr(vcpu, ax_rb); | ||
| 1033 | emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd, | ||
| 1034 | addr, FPU_LS_SINGLE); | ||
| 1035 | break; | ||
| 1036 | } | ||
| 1037 | case OP_31_LFSUX: | ||
| 1038 | { | ||
| 1039 | ulong addr = kvmppc_get_gpr(vcpu, ax_ra) + | ||
| 1040 | kvmppc_get_gpr(vcpu, ax_rb); | ||
| 1041 | |||
| 1042 | emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd, | ||
| 1043 | addr, FPU_LS_SINGLE); | ||
| 1044 | |||
| 1045 | if (emulated == EMULATE_DONE) | ||
| 1046 | kvmppc_set_gpr(vcpu, ax_ra, addr); | ||
| 1047 | break; | ||
| 1048 | } | ||
| 1049 | case OP_31_LFDX: | ||
| 1050 | { | ||
| 1051 | ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) + | ||
| 1052 | kvmppc_get_gpr(vcpu, ax_rb); | ||
| 1053 | |||
| 1054 | emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd, | ||
| 1055 | addr, FPU_LS_DOUBLE); | ||
| 1056 | break; | ||
| 1057 | } | ||
| 1058 | case OP_31_LFDUX: | ||
| 1059 | { | ||
| 1060 | ulong addr = kvmppc_get_gpr(vcpu, ax_ra) + | ||
| 1061 | kvmppc_get_gpr(vcpu, ax_rb); | ||
| 1062 | |||
| 1063 | emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd, | ||
| 1064 | addr, FPU_LS_DOUBLE); | ||
| 1065 | |||
| 1066 | if (emulated == EMULATE_DONE) | ||
| 1067 | kvmppc_set_gpr(vcpu, ax_ra, addr); | ||
| 1068 | break; | ||
| 1069 | } | ||
| 1070 | case OP_31_STFSX: | ||
| 1071 | { | ||
| 1072 | ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) + | ||
| 1073 | kvmppc_get_gpr(vcpu, ax_rb); | ||
| 1074 | |||
| 1075 | emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd, | ||
| 1076 | addr, FPU_LS_SINGLE); | ||
| 1077 | break; | ||
| 1078 | } | ||
| 1079 | case OP_31_STFSUX: | ||
| 1080 | { | ||
| 1081 | ulong addr = kvmppc_get_gpr(vcpu, ax_ra) + | ||
| 1082 | kvmppc_get_gpr(vcpu, ax_rb); | ||
| 1083 | |||
| 1084 | emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd, | ||
| 1085 | addr, FPU_LS_SINGLE); | ||
| 1086 | |||
| 1087 | if (emulated == EMULATE_DONE) | ||
| 1088 | kvmppc_set_gpr(vcpu, ax_ra, addr); | ||
| 1089 | break; | ||
| 1090 | } | ||
| 1091 | case OP_31_STFX: | ||
| 1092 | { | ||
| 1093 | ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) + | ||
| 1094 | kvmppc_get_gpr(vcpu, ax_rb); | ||
| 1095 | |||
| 1096 | emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd, | ||
| 1097 | addr, FPU_LS_DOUBLE); | ||
| 1098 | break; | ||
| 1099 | } | ||
| 1100 | case OP_31_STFUX: | ||
| 1101 | { | ||
| 1102 | ulong addr = kvmppc_get_gpr(vcpu, ax_ra) + | ||
| 1103 | kvmppc_get_gpr(vcpu, ax_rb); | ||
| 1104 | |||
| 1105 | emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd, | ||
| 1106 | addr, FPU_LS_DOUBLE); | ||
| 1107 | |||
| 1108 | if (emulated == EMULATE_DONE) | ||
| 1109 | kvmppc_set_gpr(vcpu, ax_ra, addr); | ||
| 1110 | break; | ||
| 1111 | } | ||
| 1112 | case OP_31_STFIWX: | ||
| 1113 | { | ||
| 1114 | ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) + | ||
| 1115 | kvmppc_get_gpr(vcpu, ax_rb); | ||
| 1116 | |||
| 1117 | emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd, | ||
| 1118 | addr, | ||
| 1119 | FPU_LS_SINGLE_LOW); | ||
| 1120 | break; | ||
| 1121 | } | ||
| 1122 | break; | ||
| 1123 | } | ||
| 1124 | break; | ||
| 1125 | case 59: | ||
| 1126 | switch (inst_get_field(inst, 21, 30)) { | ||
| 1127 | case OP_59_FADDS: | ||
| 1128 | fpd_fadds(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_b); | ||
| 1129 | kvmppc_sync_qpr(vcpu, ax_rd); | ||
| 1130 | break; | ||
| 1131 | case OP_59_FSUBS: | ||
| 1132 | fpd_fsubs(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_b); | ||
| 1133 | kvmppc_sync_qpr(vcpu, ax_rd); | ||
| 1134 | break; | ||
| 1135 | case OP_59_FDIVS: | ||
| 1136 | fpd_fdivs(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_b); | ||
| 1137 | kvmppc_sync_qpr(vcpu, ax_rd); | ||
| 1138 | break; | ||
| 1139 | case OP_59_FRES: | ||
| 1140 | fpd_fres(&vcpu->arch.fpscr, &cr, fpr_d, fpr_b); | ||
| 1141 | kvmppc_sync_qpr(vcpu, ax_rd); | ||
| 1142 | break; | ||
| 1143 | case OP_59_FRSQRTES: | ||
| 1144 | fpd_frsqrtes(&vcpu->arch.fpscr, &cr, fpr_d, fpr_b); | ||
| 1145 | kvmppc_sync_qpr(vcpu, ax_rd); | ||
| 1146 | break; | ||
| 1147 | } | ||
| 1148 | switch (inst_get_field(inst, 26, 30)) { | ||
| 1149 | case OP_59_FMULS: | ||
| 1150 | fpd_fmuls(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_c); | ||
| 1151 | kvmppc_sync_qpr(vcpu, ax_rd); | ||
| 1152 | break; | ||
| 1153 | case OP_59_FMSUBS: | ||
| 1154 | fpd_fmsubs(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b); | ||
| 1155 | kvmppc_sync_qpr(vcpu, ax_rd); | ||
| 1156 | break; | ||
| 1157 | case OP_59_FMADDS: | ||
| 1158 | fpd_fmadds(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b); | ||
| 1159 | kvmppc_sync_qpr(vcpu, ax_rd); | ||
| 1160 | break; | ||
| 1161 | case OP_59_FNMSUBS: | ||
| 1162 | fpd_fnmsubs(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b); | ||
| 1163 | kvmppc_sync_qpr(vcpu, ax_rd); | ||
| 1164 | break; | ||
| 1165 | case OP_59_FNMADDS: | ||
| 1166 | fpd_fnmadds(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b); | ||
| 1167 | kvmppc_sync_qpr(vcpu, ax_rd); | ||
| 1168 | break; | ||
| 1169 | } | ||
| 1170 | break; | ||
| 1171 | case 63: | ||
| 1172 | switch (inst_get_field(inst, 21, 30)) { | ||
| 1173 | case OP_63_MTFSB0: | ||
| 1174 | case OP_63_MTFSB1: | ||
| 1175 | case OP_63_MCRFS: | ||
| 1176 | case OP_63_MTFSFI: | ||
| 1177 | /* XXX need to implement */ | ||
| 1178 | break; | ||
| 1179 | case OP_63_MFFS: | ||
| 1180 | /* XXX missing CR */ | ||
| 1181 | *fpr_d = vcpu->arch.fpscr; | ||
| 1182 | break; | ||
| 1183 | case OP_63_MTFSF: | ||
| 1184 | /* XXX missing fm bits */ | ||
| 1185 | /* XXX missing CR */ | ||
| 1186 | vcpu->arch.fpscr = *fpr_b; | ||
| 1187 | break; | ||
| 1188 | case OP_63_FCMPU: | ||
| 1189 | { | ||
| 1190 | u32 tmp_cr; | ||
| 1191 | u32 cr0_mask = 0xf0000000; | ||
| 1192 | u32 cr_shift = inst_get_field(inst, 6, 8) * 4; | ||
| 1193 | |||
| 1194 | fpd_fcmpu(&vcpu->arch.fpscr, &tmp_cr, fpr_a, fpr_b); | ||
| 1195 | cr &= ~(cr0_mask >> cr_shift); | ||
| 1196 | cr |= (cr & cr0_mask) >> cr_shift; | ||
| 1197 | break; | ||
| 1198 | } | ||
| 1199 | case OP_63_FCMPO: | ||
| 1200 | { | ||
| 1201 | u32 tmp_cr; | ||
| 1202 | u32 cr0_mask = 0xf0000000; | ||
| 1203 | u32 cr_shift = inst_get_field(inst, 6, 8) * 4; | ||
| 1204 | |||
| 1205 | fpd_fcmpo(&vcpu->arch.fpscr, &tmp_cr, fpr_a, fpr_b); | ||
| 1206 | cr &= ~(cr0_mask >> cr_shift); | ||
| 1207 | cr |= (cr & cr0_mask) >> cr_shift; | ||
| 1208 | break; | ||
| 1209 | } | ||
| 1210 | case OP_63_FNEG: | ||
| 1211 | fpd_fneg(&vcpu->arch.fpscr, &cr, fpr_d, fpr_b); | ||
| 1212 | break; | ||
| 1213 | case OP_63_FMR: | ||
| 1214 | *fpr_d = *fpr_b; | ||
| 1215 | break; | ||
| 1216 | case OP_63_FABS: | ||
| 1217 | fpd_fabs(&vcpu->arch.fpscr, &cr, fpr_d, fpr_b); | ||
| 1218 | break; | ||
| 1219 | case OP_63_FCPSGN: | ||
| 1220 | fpd_fcpsgn(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_b); | ||
| 1221 | break; | ||
| 1222 | case OP_63_FDIV: | ||
| 1223 | fpd_fdiv(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_b); | ||
| 1224 | break; | ||
| 1225 | case OP_63_FADD: | ||
| 1226 | fpd_fadd(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_b); | ||
| 1227 | break; | ||
| 1228 | case OP_63_FSUB: | ||
| 1229 | fpd_fsub(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_b); | ||
| 1230 | break; | ||
| 1231 | case OP_63_FCTIW: | ||
| 1232 | fpd_fctiw(&vcpu->arch.fpscr, &cr, fpr_d, fpr_b); | ||
| 1233 | break; | ||
| 1234 | case OP_63_FCTIWZ: | ||
| 1235 | fpd_fctiwz(&vcpu->arch.fpscr, &cr, fpr_d, fpr_b); | ||
| 1236 | break; | ||
| 1237 | case OP_63_FRSP: | ||
| 1238 | fpd_frsp(&vcpu->arch.fpscr, &cr, fpr_d, fpr_b); | ||
| 1239 | kvmppc_sync_qpr(vcpu, ax_rd); | ||
| 1240 | break; | ||
| 1241 | case OP_63_FRSQRTE: | ||
| 1242 | { | ||
| 1243 | double one = 1.0f; | ||
| 1244 | |||
| 1245 | /* fD = sqrt(fB) */ | ||
| 1246 | fpd_fsqrt(&vcpu->arch.fpscr, &cr, fpr_d, fpr_b); | ||
| 1247 | /* fD = 1.0f / fD */ | ||
| 1248 | fpd_fdiv(&vcpu->arch.fpscr, &cr, fpr_d, (u64*)&one, fpr_d); | ||
| 1249 | break; | ||
| 1250 | } | ||
| 1251 | } | ||
| 1252 | switch (inst_get_field(inst, 26, 30)) { | ||
| 1253 | case OP_63_FMUL: | ||
| 1254 | fpd_fmul(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_c); | ||
| 1255 | break; | ||
| 1256 | case OP_63_FSEL: | ||
| 1257 | fpd_fsel(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b); | ||
| 1258 | break; | ||
| 1259 | case OP_63_FMSUB: | ||
| 1260 | fpd_fmsub(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b); | ||
| 1261 | break; | ||
| 1262 | case OP_63_FMADD: | ||
| 1263 | fpd_fmadd(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b); | ||
| 1264 | break; | ||
| 1265 | case OP_63_FNMSUB: | ||
| 1266 | fpd_fnmsub(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b); | ||
| 1267 | break; | ||
| 1268 | case OP_63_FNMADD: | ||
| 1269 | fpd_fnmadd(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b); | ||
| 1270 | break; | ||
| 1271 | } | ||
| 1272 | break; | ||
| 1273 | } | ||
| 1274 | |||
| 1275 | #ifdef DEBUG | ||
| 1276 | for (i = 0; i < ARRAY_SIZE(vcpu->arch.fpr); i++) { | ||
| 1277 | u32 f; | ||
| 1278 | cvt_df((double*)&vcpu->arch.fpr[i], (float*)&f, &t); | ||
| 1279 | dprintk(KERN_INFO "FPR[%d] = 0x%x\n", i, f); | ||
| 1280 | } | ||
| 1281 | #endif | ||
| 1282 | |||
| 1283 | if (rcomp) | ||
| 1284 | kvmppc_set_cr(vcpu, cr); | ||
| 1285 | |||
| 1286 | preempt_enable(); | ||
| 1287 | |||
| 1288 | return emulated; | ||
| 1289 | } | ||
diff --git a/arch/powerpc/kvm/book3s_64_rmhandlers.S b/arch/powerpc/kvm/book3s_rmhandlers.S index c83c60ad96c5..506d5c316c96 100644 --- a/arch/powerpc/kvm/book3s_64_rmhandlers.S +++ b/arch/powerpc/kvm/book3s_rmhandlers.S | |||
| @@ -22,7 +22,10 @@ | |||
| 22 | #include <asm/reg.h> | 22 | #include <asm/reg.h> |
| 23 | #include <asm/page.h> | 23 | #include <asm/page.h> |
| 24 | #include <asm/asm-offsets.h> | 24 | #include <asm/asm-offsets.h> |
| 25 | |||
| 26 | #ifdef CONFIG_PPC_BOOK3S_64 | ||
| 25 | #include <asm/exception-64s.h> | 27 | #include <asm/exception-64s.h> |
| 28 | #endif | ||
| 26 | 29 | ||
| 27 | /***************************************************************************** | 30 | /***************************************************************************** |
| 28 | * * | 31 | * * |
| @@ -30,6 +33,39 @@ | |||
| 30 | * * | 33 | * * |
| 31 | ****************************************************************************/ | 34 | ****************************************************************************/ |
| 32 | 35 | ||
| 36 | #if defined(CONFIG_PPC_BOOK3S_64) | ||
| 37 | |||
| 38 | #define LOAD_SHADOW_VCPU(reg) \ | ||
| 39 | mfspr reg, SPRN_SPRG_PACA | ||
| 40 | |||
| 41 | #define SHADOW_VCPU_OFF PACA_KVM_SVCPU | ||
| 42 | #define MSR_NOIRQ MSR_KERNEL & ~(MSR_IR | MSR_DR) | ||
| 43 | #define FUNC(name) GLUE(.,name) | ||
| 44 | |||
| 45 | #elif defined(CONFIG_PPC_BOOK3S_32) | ||
| 46 | |||
| 47 | #define LOAD_SHADOW_VCPU(reg) \ | ||
| 48 | mfspr reg, SPRN_SPRG_THREAD; \ | ||
| 49 | lwz reg, THREAD_KVM_SVCPU(reg); \ | ||
| 50 | /* PPC32 can have a NULL pointer - let's check for that */ \ | ||
| 51 | mtspr SPRN_SPRG_SCRATCH1, r12; /* Save r12 */ \ | ||
| 52 | mfcr r12; \ | ||
| 53 | cmpwi reg, 0; \ | ||
| 54 | bne 1f; \ | ||
| 55 | mfspr reg, SPRN_SPRG_SCRATCH0; \ | ||
| 56 | mtcr r12; \ | ||
| 57 | mfspr r12, SPRN_SPRG_SCRATCH1; \ | ||
| 58 | b kvmppc_resume_\intno; \ | ||
| 59 | 1:; \ | ||
| 60 | mtcr r12; \ | ||
| 61 | mfspr r12, SPRN_SPRG_SCRATCH1; \ | ||
| 62 | tophys(reg, reg) | ||
| 63 | |||
| 64 | #define SHADOW_VCPU_OFF 0 | ||
| 65 | #define MSR_NOIRQ MSR_KERNEL | ||
| 66 | #define FUNC(name) name | ||
| 67 | |||
| 68 | #endif | ||
| 33 | 69 | ||
| 34 | .macro INTERRUPT_TRAMPOLINE intno | 70 | .macro INTERRUPT_TRAMPOLINE intno |
| 35 | 71 | ||
| @@ -42,19 +78,19 @@ kvmppc_trampoline_\intno: | |||
| 42 | * First thing to do is to find out if we're coming | 78 | * First thing to do is to find out if we're coming |
| 43 | * from a KVM guest or a Linux process. | 79 | * from a KVM guest or a Linux process. |
| 44 | * | 80 | * |
| 45 | * To distinguish, we check a magic byte in the PACA | 81 | * To distinguish, we check a magic byte in the PACA/current |
| 46 | */ | 82 | */ |
| 47 | mfspr r13, SPRN_SPRG_PACA /* r13 = PACA */ | 83 | LOAD_SHADOW_VCPU(r13) |
| 48 | std r12, PACA_KVM_SCRATCH0(r13) | 84 | PPC_STL r12, (SHADOW_VCPU_OFF + SVCPU_SCRATCH0)(r13) |
| 49 | mfcr r12 | 85 | mfcr r12 |
| 50 | stw r12, PACA_KVM_SCRATCH1(r13) | 86 | stw r12, (SHADOW_VCPU_OFF + SVCPU_SCRATCH1)(r13) |
| 51 | lbz r12, PACA_KVM_IN_GUEST(r13) | 87 | lbz r12, (SHADOW_VCPU_OFF + SVCPU_IN_GUEST)(r13) |
| 52 | cmpwi r12, KVM_GUEST_MODE_NONE | 88 | cmpwi r12, KVM_GUEST_MODE_NONE |
| 53 | bne ..kvmppc_handler_hasmagic_\intno | 89 | bne ..kvmppc_handler_hasmagic_\intno |
| 54 | /* No KVM guest? Then jump back to the Linux handler! */ | 90 | /* No KVM guest? Then jump back to the Linux handler! */ |
| 55 | lwz r12, PACA_KVM_SCRATCH1(r13) | 91 | lwz r12, (SHADOW_VCPU_OFF + SVCPU_SCRATCH1)(r13) |
| 56 | mtcr r12 | 92 | mtcr r12 |
| 57 | ld r12, PACA_KVM_SCRATCH0(r13) | 93 | PPC_LL r12, (SHADOW_VCPU_OFF + SVCPU_SCRATCH0)(r13) |
| 58 | mfspr r13, SPRN_SPRG_SCRATCH0 /* r13 = original r13 */ | 94 | mfspr r13, SPRN_SPRG_SCRATCH0 /* r13 = original r13 */ |
| 59 | b kvmppc_resume_\intno /* Get back original handler */ | 95 | b kvmppc_resume_\intno /* Get back original handler */ |
| 60 | 96 | ||
| @@ -76,9 +112,7 @@ kvmppc_trampoline_\intno: | |||
| 76 | INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_SYSTEM_RESET | 112 | INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_SYSTEM_RESET |
| 77 | INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_MACHINE_CHECK | 113 | INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_MACHINE_CHECK |
| 78 | INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_DATA_STORAGE | 114 | INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_DATA_STORAGE |
| 79 | INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_DATA_SEGMENT | ||
| 80 | INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_INST_STORAGE | 115 | INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_INST_STORAGE |
| 81 | INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_INST_SEGMENT | ||
| 82 | INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_EXTERNAL | 116 | INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_EXTERNAL |
| 83 | INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_ALIGNMENT | 117 | INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_ALIGNMENT |
| 84 | INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_PROGRAM | 118 | INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_PROGRAM |
| @@ -88,7 +122,14 @@ INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_SYSCALL | |||
| 88 | INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_TRACE | 122 | INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_TRACE |
| 89 | INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_PERFMON | 123 | INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_PERFMON |
| 90 | INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_ALTIVEC | 124 | INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_ALTIVEC |
| 125 | |||
| 126 | /* Those are only available on 64 bit machines */ | ||
| 127 | |||
| 128 | #ifdef CONFIG_PPC_BOOK3S_64 | ||
| 129 | INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_DATA_SEGMENT | ||
| 130 | INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_INST_SEGMENT | ||
| 91 | INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_VSX | 131 | INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_VSX |
| 132 | #endif | ||
| 92 | 133 | ||
| 93 | /* | 134 | /* |
| 94 | * Bring us back to the faulting code, but skip the | 135 | * Bring us back to the faulting code, but skip the |
| @@ -99,11 +140,11 @@ INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_VSX | |||
| 99 | * | 140 | * |
| 100 | * Input Registers: | 141 | * Input Registers: |
| 101 | * | 142 | * |
| 102 | * R12 = free | 143 | * R12 = free |
| 103 | * R13 = PACA | 144 | * R13 = Shadow VCPU (PACA) |
| 104 | * PACA.KVM.SCRATCH0 = guest R12 | 145 | * SVCPU.SCRATCH0 = guest R12 |
| 105 | * PACA.KVM.SCRATCH1 = guest CR | 146 | * SVCPU.SCRATCH1 = guest CR |
| 106 | * SPRG_SCRATCH0 = guest R13 | 147 | * SPRG_SCRATCH0 = guest R13 |
| 107 | * | 148 | * |
| 108 | */ | 149 | */ |
| 109 | kvmppc_handler_skip_ins: | 150 | kvmppc_handler_skip_ins: |
| @@ -114,9 +155,9 @@ kvmppc_handler_skip_ins: | |||
| 114 | mtsrr0 r12 | 155 | mtsrr0 r12 |
| 115 | 156 | ||
| 116 | /* Clean up all state */ | 157 | /* Clean up all state */ |
| 117 | lwz r12, PACA_KVM_SCRATCH1(r13) | 158 | lwz r12, (SHADOW_VCPU_OFF + SVCPU_SCRATCH1)(r13) |
| 118 | mtcr r12 | 159 | mtcr r12 |
| 119 | ld r12, PACA_KVM_SCRATCH0(r13) | 160 | PPC_LL r12, (SHADOW_VCPU_OFF + SVCPU_SCRATCH0)(r13) |
| 120 | mfspr r13, SPRN_SPRG_SCRATCH0 | 161 | mfspr r13, SPRN_SPRG_SCRATCH0 |
| 121 | 162 | ||
| 122 | /* And get back into the code */ | 163 | /* And get back into the code */ |
| @@ -147,41 +188,48 @@ kvmppc_handler_lowmem_trampoline_end: | |||
| 147 | * | 188 | * |
| 148 | * R3 = function | 189 | * R3 = function |
| 149 | * R4 = MSR | 190 | * R4 = MSR |
| 150 | * R5 = CTR | 191 | * R5 = scratch register |
| 151 | * | 192 | * |
| 152 | */ | 193 | */ |
| 153 | _GLOBAL(kvmppc_rmcall) | 194 | _GLOBAL(kvmppc_rmcall) |
| 154 | mtmsr r4 /* Disable relocation, so mtsrr | 195 | LOAD_REG_IMMEDIATE(r5, MSR_NOIRQ) |
| 196 | mtmsr r5 /* Disable relocation and interrupts, so mtsrr | ||
| 155 | doesn't get interrupted */ | 197 | doesn't get interrupted */ |
| 156 | mtctr r5 | 198 | sync |
| 157 | mtsrr0 r3 | 199 | mtsrr0 r3 |
| 158 | mtsrr1 r4 | 200 | mtsrr1 r4 |
| 159 | RFI | 201 | RFI |
| 160 | 202 | ||
| 203 | #if defined(CONFIG_PPC_BOOK3S_32) | ||
| 204 | #define STACK_LR INT_FRAME_SIZE+4 | ||
| 205 | #elif defined(CONFIG_PPC_BOOK3S_64) | ||
| 206 | #define STACK_LR _LINK | ||
| 207 | #endif | ||
| 208 | |||
| 161 | /* | 209 | /* |
| 162 | * Activate current's external feature (FPU/Altivec/VSX) | 210 | * Activate current's external feature (FPU/Altivec/VSX) |
| 163 | */ | 211 | */ |
| 164 | #define define_load_up(what) \ | 212 | #define define_load_up(what) \ |
| 165 | \ | 213 | \ |
| 166 | _GLOBAL(kvmppc_load_up_ ## what); \ | 214 | _GLOBAL(kvmppc_load_up_ ## what); \ |
| 167 | subi r1, r1, INT_FRAME_SIZE; \ | 215 | PPC_STLU r1, -INT_FRAME_SIZE(r1); \ |
| 168 | mflr r3; \ | 216 | mflr r3; \ |
| 169 | std r3, _LINK(r1); \ | 217 | PPC_STL r3, STACK_LR(r1); \ |
| 170 | mfmsr r4; \ | 218 | PPC_STL r20, _NIP(r1); \ |
| 171 | std r31, GPR3(r1); \ | 219 | mfmsr r20; \ |
| 172 | mr r31, r4; \ | 220 | LOAD_REG_IMMEDIATE(r3, MSR_DR|MSR_EE); \ |
| 173 | li r5, MSR_DR; \ | 221 | andc r3,r20,r3; /* Disable DR,EE */ \ |
| 174 | oris r5, r5, MSR_EE@h; \ | 222 | mtmsr r3; \ |
| 175 | andc r4, r4, r5; \ | 223 | sync; \ |
| 176 | mtmsr r4; \ | 224 | \ |
| 177 | \ | 225 | bl FUNC(load_up_ ## what); \ |
| 178 | bl .load_up_ ## what; \ | 226 | \ |
| 179 | \ | 227 | mtmsr r20; /* Enable DR,EE */ \ |
| 180 | mtmsr r31; \ | 228 | sync; \ |
| 181 | ld r3, _LINK(r1); \ | 229 | PPC_LL r3, STACK_LR(r1); \ |
| 182 | ld r31, GPR3(r1); \ | 230 | PPC_LL r20, _NIP(r1); \ |
| 183 | addi r1, r1, INT_FRAME_SIZE; \ | 231 | mtlr r3; \ |
| 184 | mtlr r3; \ | 232 | addi r1, r1, INT_FRAME_SIZE; \ |
| 185 | blr | 233 | blr |
| 186 | 234 | ||
| 187 | define_load_up(fpu) | 235 | define_load_up(fpu) |
| @@ -194,11 +242,10 @@ define_load_up(vsx) | |||
| 194 | 242 | ||
| 195 | .global kvmppc_trampoline_lowmem | 243 | .global kvmppc_trampoline_lowmem |
| 196 | kvmppc_trampoline_lowmem: | 244 | kvmppc_trampoline_lowmem: |
| 197 | .long kvmppc_handler_lowmem_trampoline - _stext | 245 | .long kvmppc_handler_lowmem_trampoline - CONFIG_KERNEL_START |
| 198 | 246 | ||
| 199 | .global kvmppc_trampoline_enter | 247 | .global kvmppc_trampoline_enter |
| 200 | kvmppc_trampoline_enter: | 248 | kvmppc_trampoline_enter: |
| 201 | .long kvmppc_handler_trampoline_enter - _stext | 249 | .long kvmppc_handler_trampoline_enter - CONFIG_KERNEL_START |
| 202 | |||
| 203 | #include "book3s_64_slb.S" | ||
| 204 | 250 | ||
| 251 | #include "book3s_segment.S" | ||
diff --git a/arch/powerpc/kvm/book3s_segment.S b/arch/powerpc/kvm/book3s_segment.S new file mode 100644 index 000000000000..7c52ed0b7051 --- /dev/null +++ b/arch/powerpc/kvm/book3s_segment.S | |||
| @@ -0,0 +1,259 @@ | |||
| 1 | /* | ||
| 2 | * This program is free software; you can redistribute it and/or modify | ||
| 3 | * it under the terms of the GNU General Public License, version 2, as | ||
| 4 | * published by the Free Software Foundation. | ||
| 5 | * | ||
| 6 | * This program is distributed in the hope that it will be useful, | ||
| 7 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 8 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 9 | * GNU General Public License for more details. | ||
| 10 | * | ||
| 11 | * You should have received a copy of the GNU General Public License | ||
| 12 | * along with this program; if not, write to the Free Software | ||
| 13 | * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. | ||
| 14 | * | ||
| 15 | * Copyright SUSE Linux Products GmbH 2010 | ||
| 16 | * | ||
| 17 | * Authors: Alexander Graf <agraf@suse.de> | ||
| 18 | */ | ||
| 19 | |||
| 20 | /* Real mode helpers */ | ||
| 21 | |||
| 22 | #if defined(CONFIG_PPC_BOOK3S_64) | ||
| 23 | |||
| 24 | #define GET_SHADOW_VCPU(reg) \ | ||
| 25 | addi reg, r13, PACA_KVM_SVCPU | ||
| 26 | |||
| 27 | #elif defined(CONFIG_PPC_BOOK3S_32) | ||
| 28 | |||
| 29 | #define GET_SHADOW_VCPU(reg) \ | ||
| 30 | tophys(reg, r2); \ | ||
| 31 | lwz reg, (THREAD + THREAD_KVM_SVCPU)(reg); \ | ||
| 32 | tophys(reg, reg) | ||
| 33 | |||
| 34 | #endif | ||
| 35 | |||
| 36 | /* Disable for nested KVM */ | ||
| 37 | #define USE_QUICK_LAST_INST | ||
| 38 | |||
| 39 | |||
| 40 | /* Get helper functions for subarch specific functionality */ | ||
| 41 | |||
| 42 | #if defined(CONFIG_PPC_BOOK3S_64) | ||
| 43 | #include "book3s_64_slb.S" | ||
| 44 | #elif defined(CONFIG_PPC_BOOK3S_32) | ||
| 45 | #include "book3s_32_sr.S" | ||
| 46 | #endif | ||
| 47 | |||
| 48 | /****************************************************************************** | ||
| 49 | * * | ||
| 50 | * Entry code * | ||
| 51 | * * | ||
| 52 | *****************************************************************************/ | ||
| 53 | |||
| 54 | .global kvmppc_handler_trampoline_enter | ||
| 55 | kvmppc_handler_trampoline_enter: | ||
| 56 | |||
| 57 | /* Required state: | ||
| 58 | * | ||
| 59 | * MSR = ~IR|DR | ||
| 60 | * R13 = PACA | ||
| 61 | * R1 = host R1 | ||
| 62 | * R2 = host R2 | ||
| 63 | * R10 = guest MSR | ||
| 64 | * all other volatile GPRS = free | ||
| 65 | * SVCPU[CR] = guest CR | ||
| 66 | * SVCPU[XER] = guest XER | ||
| 67 | * SVCPU[CTR] = guest CTR | ||
| 68 | * SVCPU[LR] = guest LR | ||
| 69 | */ | ||
| 70 | |||
| 71 | /* r3 = shadow vcpu */ | ||
| 72 | GET_SHADOW_VCPU(r3) | ||
| 73 | |||
| 74 | /* Move SRR0 and SRR1 into the respective regs */ | ||
| 75 | PPC_LL r9, SVCPU_PC(r3) | ||
| 76 | mtsrr0 r9 | ||
| 77 | mtsrr1 r10 | ||
| 78 | |||
| 79 | /* Activate guest mode, so faults get handled by KVM */ | ||
| 80 | li r11, KVM_GUEST_MODE_GUEST | ||
| 81 | stb r11, SVCPU_IN_GUEST(r3) | ||
| 82 | |||
| 83 | /* Switch to guest segment. This is subarch specific. */ | ||
| 84 | LOAD_GUEST_SEGMENTS | ||
| 85 | |||
| 86 | /* Enter guest */ | ||
| 87 | |||
| 88 | PPC_LL r4, (SVCPU_CTR)(r3) | ||
| 89 | PPC_LL r5, (SVCPU_LR)(r3) | ||
| 90 | lwz r6, (SVCPU_CR)(r3) | ||
| 91 | lwz r7, (SVCPU_XER)(r3) | ||
| 92 | |||
| 93 | mtctr r4 | ||
| 94 | mtlr r5 | ||
| 95 | mtcr r6 | ||
| 96 | mtxer r7 | ||
| 97 | |||
| 98 | PPC_LL r0, (SVCPU_R0)(r3) | ||
| 99 | PPC_LL r1, (SVCPU_R1)(r3) | ||
| 100 | PPC_LL r2, (SVCPU_R2)(r3) | ||
| 101 | PPC_LL r4, (SVCPU_R4)(r3) | ||
| 102 | PPC_LL r5, (SVCPU_R5)(r3) | ||
| 103 | PPC_LL r6, (SVCPU_R6)(r3) | ||
| 104 | PPC_LL r7, (SVCPU_R7)(r3) | ||
| 105 | PPC_LL r8, (SVCPU_R8)(r3) | ||
| 106 | PPC_LL r9, (SVCPU_R9)(r3) | ||
| 107 | PPC_LL r10, (SVCPU_R10)(r3) | ||
| 108 | PPC_LL r11, (SVCPU_R11)(r3) | ||
| 109 | PPC_LL r12, (SVCPU_R12)(r3) | ||
| 110 | PPC_LL r13, (SVCPU_R13)(r3) | ||
| 111 | |||
| 112 | PPC_LL r3, (SVCPU_R3)(r3) | ||
| 113 | |||
| 114 | RFI | ||
| 115 | kvmppc_handler_trampoline_enter_end: | ||
| 116 | |||
| 117 | |||
| 118 | |||
| 119 | /****************************************************************************** | ||
| 120 | * * | ||
| 121 | * Exit code * | ||
| 122 | * * | ||
| 123 | *****************************************************************************/ | ||
| 124 | |||
| 125 | .global kvmppc_handler_trampoline_exit | ||
| 126 | kvmppc_handler_trampoline_exit: | ||
| 127 | |||
| 128 | /* Register usage at this point: | ||
| 129 | * | ||
| 130 | * SPRG_SCRATCH0 = guest R13 | ||
| 131 | * R12 = exit handler id | ||
| 132 | * R13 = shadow vcpu - SHADOW_VCPU_OFF [=PACA on PPC64] | ||
| 133 | * SVCPU.SCRATCH0 = guest R12 | ||
| 134 | * SVCPU.SCRATCH1 = guest CR | ||
| 135 | * | ||
| 136 | */ | ||
| 137 | |||
| 138 | /* Save registers */ | ||
| 139 | |||
| 140 | PPC_STL r0, (SHADOW_VCPU_OFF + SVCPU_R0)(r13) | ||
| 141 | PPC_STL r1, (SHADOW_VCPU_OFF + SVCPU_R1)(r13) | ||
| 142 | PPC_STL r2, (SHADOW_VCPU_OFF + SVCPU_R2)(r13) | ||
| 143 | PPC_STL r3, (SHADOW_VCPU_OFF + SVCPU_R3)(r13) | ||
| 144 | PPC_STL r4, (SHADOW_VCPU_OFF + SVCPU_R4)(r13) | ||
| 145 | PPC_STL r5, (SHADOW_VCPU_OFF + SVCPU_R5)(r13) | ||
| 146 | PPC_STL r6, (SHADOW_VCPU_OFF + SVCPU_R6)(r13) | ||
| 147 | PPC_STL r7, (SHADOW_VCPU_OFF + SVCPU_R7)(r13) | ||
| 148 | PPC_STL r8, (SHADOW_VCPU_OFF + SVCPU_R8)(r13) | ||
| 149 | PPC_STL r9, (SHADOW_VCPU_OFF + SVCPU_R9)(r13) | ||
| 150 | PPC_STL r10, (SHADOW_VCPU_OFF + SVCPU_R10)(r13) | ||
| 151 | PPC_STL r11, (SHADOW_VCPU_OFF + SVCPU_R11)(r13) | ||
| 152 | |||
| 153 | /* Restore R1/R2 so we can handle faults */ | ||
| 154 | PPC_LL r1, (SHADOW_VCPU_OFF + SVCPU_HOST_R1)(r13) | ||
| 155 | PPC_LL r2, (SHADOW_VCPU_OFF + SVCPU_HOST_R2)(r13) | ||
| 156 | |||
| 157 | /* Save guest PC and MSR */ | ||
| 158 | mfsrr0 r3 | ||
| 159 | mfsrr1 r4 | ||
| 160 | |||
| 161 | PPC_STL r3, (SHADOW_VCPU_OFF + SVCPU_PC)(r13) | ||
| 162 | PPC_STL r4, (SHADOW_VCPU_OFF + SVCPU_SHADOW_SRR1)(r13) | ||
| 163 | |||
| 164 | /* Get scratch'ed off registers */ | ||
| 165 | mfspr r9, SPRN_SPRG_SCRATCH0 | ||
| 166 | PPC_LL r8, (SHADOW_VCPU_OFF + SVCPU_SCRATCH0)(r13) | ||
| 167 | lwz r7, (SHADOW_VCPU_OFF + SVCPU_SCRATCH1)(r13) | ||
| 168 | |||
| 169 | PPC_STL r9, (SHADOW_VCPU_OFF + SVCPU_R13)(r13) | ||
| 170 | PPC_STL r8, (SHADOW_VCPU_OFF + SVCPU_R12)(r13) | ||
| 171 | stw r7, (SHADOW_VCPU_OFF + SVCPU_CR)(r13) | ||
| 172 | |||
| 173 | /* Save more register state */ | ||
| 174 | |||
| 175 | mfxer r5 | ||
| 176 | mfdar r6 | ||
| 177 | mfdsisr r7 | ||
| 178 | mfctr r8 | ||
| 179 | mflr r9 | ||
| 180 | |||
| 181 | stw r5, (SHADOW_VCPU_OFF + SVCPU_XER)(r13) | ||
| 182 | PPC_STL r6, (SHADOW_VCPU_OFF + SVCPU_FAULT_DAR)(r13) | ||
| 183 | stw r7, (SHADOW_VCPU_OFF + SVCPU_FAULT_DSISR)(r13) | ||
| 184 | PPC_STL r8, (SHADOW_VCPU_OFF + SVCPU_CTR)(r13) | ||
| 185 | PPC_STL r9, (SHADOW_VCPU_OFF + SVCPU_LR)(r13) | ||
| 186 | |||
| 187 | /* | ||
| 188 | * In order for us to easily get the last instruction, | ||
| 189 | * we got the #vmexit at, we exploit the fact that the | ||
| 190 | * virtual layout is still the same here, so we can just | ||
| 191 | * ld from the guest's PC address | ||
| 192 | */ | ||
| 193 | |||
| 194 | /* We only load the last instruction when it's safe */ | ||
| 195 | cmpwi r12, BOOK3S_INTERRUPT_DATA_STORAGE | ||
| 196 | beq ld_last_inst | ||
| 197 | cmpwi r12, BOOK3S_INTERRUPT_PROGRAM | ||
| 198 | beq ld_last_inst | ||
| 199 | cmpwi r12, BOOK3S_INTERRUPT_ALIGNMENT | ||
| 200 | beq- ld_last_inst | ||
| 201 | |||
| 202 | b no_ld_last_inst | ||
| 203 | |||
| 204 | ld_last_inst: | ||
| 205 | /* Save off the guest instruction we're at */ | ||
| 206 | |||
| 207 | /* In case lwz faults */ | ||
| 208 | li r0, KVM_INST_FETCH_FAILED | ||
| 209 | |||
| 210 | #ifdef USE_QUICK_LAST_INST | ||
| 211 | |||
| 212 | /* Set guest mode to 'jump over instruction' so if lwz faults | ||
| 213 | * we'll just continue at the next IP. */ | ||
| 214 | li r9, KVM_GUEST_MODE_SKIP | ||
| 215 | stb r9, (SHADOW_VCPU_OFF + SVCPU_IN_GUEST)(r13) | ||
| 216 | |||
| 217 | /* 1) enable paging for data */ | ||
| 218 | mfmsr r9 | ||
| 219 | ori r11, r9, MSR_DR /* Enable paging for data */ | ||
| 220 | mtmsr r11 | ||
| 221 | sync | ||
| 222 | /* 2) fetch the instruction */ | ||
| 223 | lwz r0, 0(r3) | ||
| 224 | /* 3) disable paging again */ | ||
| 225 | mtmsr r9 | ||
| 226 | sync | ||
| 227 | |||
| 228 | #endif | ||
| 229 | stw r0, (SHADOW_VCPU_OFF + SVCPU_LAST_INST)(r13) | ||
| 230 | |||
| 231 | no_ld_last_inst: | ||
| 232 | |||
| 233 | /* Unset guest mode */ | ||
| 234 | li r9, KVM_GUEST_MODE_NONE | ||
| 235 | stb r9, (SHADOW_VCPU_OFF + SVCPU_IN_GUEST)(r13) | ||
| 236 | |||
| 237 | /* Switch back to host MMU */ | ||
| 238 | LOAD_HOST_SEGMENTS | ||
| 239 | |||
| 240 | /* Register usage at this point: | ||
| 241 | * | ||
| 242 | * R1 = host R1 | ||
| 243 | * R2 = host R2 | ||
| 244 | * R12 = exit handler id | ||
| 245 | * R13 = shadow vcpu - SHADOW_VCPU_OFF [=PACA on PPC64] | ||
| 246 | * SVCPU.* = guest * | ||
| 247 | * | ||
| 248 | */ | ||
| 249 | |||
| 250 | /* RFI into the highmem handler */ | ||
| 251 | mfmsr r7 | ||
| 252 | ori r7, r7, MSR_IR|MSR_DR|MSR_RI|MSR_ME /* Enable paging */ | ||
| 253 | mtsrr1 r7 | ||
| 254 | /* Load highmem handler address */ | ||
| 255 | PPC_LL r8, (SHADOW_VCPU_OFF + SVCPU_VMHANDLER)(r13) | ||
| 256 | mtsrr0 r8 | ||
| 257 | |||
| 258 | RFI | ||
| 259 | kvmppc_handler_trampoline_exit_end: | ||
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c index 2a3a1953d4bd..a33ab8cc2ccc 100644 --- a/arch/powerpc/kvm/booke.c +++ b/arch/powerpc/kvm/booke.c | |||
| @@ -133,6 +133,12 @@ void kvmppc_core_queue_external(struct kvm_vcpu *vcpu, | |||
| 133 | kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_EXTERNAL); | 133 | kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_EXTERNAL); |
| 134 | } | 134 | } |
| 135 | 135 | ||
| 136 | void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu, | ||
| 137 | struct kvm_interrupt *irq) | ||
| 138 | { | ||
| 139 | clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions); | ||
| 140 | } | ||
| 141 | |||
| 136 | /* Deliver the interrupt of the corresponding priority, if possible. */ | 142 | /* Deliver the interrupt of the corresponding priority, if possible. */ |
| 137 | static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu, | 143 | static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu, |
| 138 | unsigned int priority) | 144 | unsigned int priority) |
| @@ -479,6 +485,8 @@ int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) | |||
| 479 | { | 485 | { |
| 480 | int i; | 486 | int i; |
| 481 | 487 | ||
| 488 | vcpu_load(vcpu); | ||
| 489 | |||
| 482 | regs->pc = vcpu->arch.pc; | 490 | regs->pc = vcpu->arch.pc; |
| 483 | regs->cr = kvmppc_get_cr(vcpu); | 491 | regs->cr = kvmppc_get_cr(vcpu); |
| 484 | regs->ctr = vcpu->arch.ctr; | 492 | regs->ctr = vcpu->arch.ctr; |
| @@ -499,6 +507,8 @@ int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) | |||
| 499 | for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) | 507 | for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) |
| 500 | regs->gpr[i] = kvmppc_get_gpr(vcpu, i); | 508 | regs->gpr[i] = kvmppc_get_gpr(vcpu, i); |
| 501 | 509 | ||
| 510 | vcpu_put(vcpu); | ||
| 511 | |||
| 502 | return 0; | 512 | return 0; |
| 503 | } | 513 | } |
| 504 | 514 | ||
| @@ -506,6 +516,8 @@ int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) | |||
| 506 | { | 516 | { |
| 507 | int i; | 517 | int i; |
| 508 | 518 | ||
| 519 | vcpu_load(vcpu); | ||
| 520 | |||
| 509 | vcpu->arch.pc = regs->pc; | 521 | vcpu->arch.pc = regs->pc; |
| 510 | kvmppc_set_cr(vcpu, regs->cr); | 522 | kvmppc_set_cr(vcpu, regs->cr); |
| 511 | vcpu->arch.ctr = regs->ctr; | 523 | vcpu->arch.ctr = regs->ctr; |
| @@ -525,6 +537,8 @@ int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) | |||
| 525 | for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) | 537 | for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) |
| 526 | kvmppc_set_gpr(vcpu, i, regs->gpr[i]); | 538 | kvmppc_set_gpr(vcpu, i, regs->gpr[i]); |
| 527 | 539 | ||
| 540 | vcpu_put(vcpu); | ||
| 541 | |||
| 528 | return 0; | 542 | return 0; |
| 529 | } | 543 | } |
| 530 | 544 | ||
| @@ -553,7 +567,12 @@ int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) | |||
| 553 | int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu, | 567 | int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu, |
| 554 | struct kvm_translation *tr) | 568 | struct kvm_translation *tr) |
| 555 | { | 569 | { |
| 556 | return kvmppc_core_vcpu_translate(vcpu, tr); | 570 | int r; |
| 571 | |||
| 572 | vcpu_load(vcpu); | ||
| 573 | r = kvmppc_core_vcpu_translate(vcpu, tr); | ||
| 574 | vcpu_put(vcpu); | ||
| 575 | return r; | ||
| 557 | } | 576 | } |
| 558 | 577 | ||
| 559 | int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log) | 578 | int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log) |
diff --git a/arch/powerpc/kvm/e500.c b/arch/powerpc/kvm/e500.c index 669a5c5fc7d7..e8a00b0c4449 100644 --- a/arch/powerpc/kvm/e500.c +++ b/arch/powerpc/kvm/e500.c | |||
| @@ -161,10 +161,10 @@ static int __init kvmppc_e500_init(void) | |||
| 161 | flush_icache_range(kvmppc_booke_handlers, | 161 | flush_icache_range(kvmppc_booke_handlers, |
| 162 | kvmppc_booke_handlers + max_ivor + kvmppc_handler_len); | 162 | kvmppc_booke_handlers + max_ivor + kvmppc_handler_len); |
| 163 | 163 | ||
| 164 | return kvm_init(NULL, sizeof(struct kvmppc_vcpu_e500), THIS_MODULE); | 164 | return kvm_init(NULL, sizeof(struct kvmppc_vcpu_e500), 0, THIS_MODULE); |
| 165 | } | 165 | } |
| 166 | 166 | ||
| 167 | static void __init kvmppc_e500_exit(void) | 167 | static void __exit kvmppc_e500_exit(void) |
| 168 | { | 168 | { |
| 169 | kvmppc_booke_exit(); | 169 | kvmppc_booke_exit(); |
| 170 | } | 170 | } |
diff --git a/arch/powerpc/kvm/emulate.c b/arch/powerpc/kvm/emulate.c index cb72a65f4ecc..4568ec386c2a 100644 --- a/arch/powerpc/kvm/emulate.c +++ b/arch/powerpc/kvm/emulate.c | |||
| @@ -38,10 +38,12 @@ | |||
| 38 | #define OP_31_XOP_LBZX 87 | 38 | #define OP_31_XOP_LBZX 87 |
| 39 | #define OP_31_XOP_STWX 151 | 39 | #define OP_31_XOP_STWX 151 |
| 40 | #define OP_31_XOP_STBX 215 | 40 | #define OP_31_XOP_STBX 215 |
| 41 | #define OP_31_XOP_LBZUX 119 | ||
| 41 | #define OP_31_XOP_STBUX 247 | 42 | #define OP_31_XOP_STBUX 247 |
| 42 | #define OP_31_XOP_LHZX 279 | 43 | #define OP_31_XOP_LHZX 279 |
| 43 | #define OP_31_XOP_LHZUX 311 | 44 | #define OP_31_XOP_LHZUX 311 |
| 44 | #define OP_31_XOP_MFSPR 339 | 45 | #define OP_31_XOP_MFSPR 339 |
| 46 | #define OP_31_XOP_LHAX 343 | ||
| 45 | #define OP_31_XOP_STHX 407 | 47 | #define OP_31_XOP_STHX 407 |
| 46 | #define OP_31_XOP_STHUX 439 | 48 | #define OP_31_XOP_STHUX 439 |
| 47 | #define OP_31_XOP_MTSPR 467 | 49 | #define OP_31_XOP_MTSPR 467 |
| @@ -62,10 +64,12 @@ | |||
| 62 | #define OP_STBU 39 | 64 | #define OP_STBU 39 |
| 63 | #define OP_LHZ 40 | 65 | #define OP_LHZ 40 |
| 64 | #define OP_LHZU 41 | 66 | #define OP_LHZU 41 |
| 67 | #define OP_LHA 42 | ||
| 68 | #define OP_LHAU 43 | ||
| 65 | #define OP_STH 44 | 69 | #define OP_STH 44 |
| 66 | #define OP_STHU 45 | 70 | #define OP_STHU 45 |
| 67 | 71 | ||
| 68 | #ifdef CONFIG_PPC64 | 72 | #ifdef CONFIG_PPC_BOOK3S |
| 69 | static int kvmppc_dec_enabled(struct kvm_vcpu *vcpu) | 73 | static int kvmppc_dec_enabled(struct kvm_vcpu *vcpu) |
| 70 | { | 74 | { |
| 71 | return 1; | 75 | return 1; |
| @@ -82,7 +86,7 @@ void kvmppc_emulate_dec(struct kvm_vcpu *vcpu) | |||
| 82 | unsigned long dec_nsec; | 86 | unsigned long dec_nsec; |
| 83 | 87 | ||
| 84 | pr_debug("mtDEC: %x\n", vcpu->arch.dec); | 88 | pr_debug("mtDEC: %x\n", vcpu->arch.dec); |
| 85 | #ifdef CONFIG_PPC64 | 89 | #ifdef CONFIG_PPC_BOOK3S |
| 86 | /* mtdec lowers the interrupt line when positive. */ | 90 | /* mtdec lowers the interrupt line when positive. */ |
| 87 | kvmppc_core_dequeue_dec(vcpu); | 91 | kvmppc_core_dequeue_dec(vcpu); |
| 88 | 92 | ||
| @@ -128,7 +132,7 @@ void kvmppc_emulate_dec(struct kvm_vcpu *vcpu) | |||
| 128 | * from opcode tables in the future. */ | 132 | * from opcode tables in the future. */ |
| 129 | int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu) | 133 | int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu) |
| 130 | { | 134 | { |
| 131 | u32 inst = vcpu->arch.last_inst; | 135 | u32 inst = kvmppc_get_last_inst(vcpu); |
| 132 | u32 ea; | 136 | u32 ea; |
| 133 | int ra; | 137 | int ra; |
| 134 | int rb; | 138 | int rb; |
| @@ -143,13 +147,9 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu) | |||
| 143 | 147 | ||
| 144 | pr_debug(KERN_INFO "Emulating opcode %d / %d\n", get_op(inst), get_xop(inst)); | 148 | pr_debug(KERN_INFO "Emulating opcode %d / %d\n", get_op(inst), get_xop(inst)); |
| 145 | 149 | ||
| 146 | /* Try again next time */ | ||
| 147 | if (inst == KVM_INST_FETCH_FAILED) | ||
| 148 | return EMULATE_DONE; | ||
| 149 | |||
| 150 | switch (get_op(inst)) { | 150 | switch (get_op(inst)) { |
| 151 | case OP_TRAP: | 151 | case OP_TRAP: |
| 152 | #ifdef CONFIG_PPC64 | 152 | #ifdef CONFIG_PPC_BOOK3S |
| 153 | case OP_TRAP_64: | 153 | case OP_TRAP_64: |
| 154 | kvmppc_core_queue_program(vcpu, SRR1_PROGTRAP); | 154 | kvmppc_core_queue_program(vcpu, SRR1_PROGTRAP); |
| 155 | #else | 155 | #else |
| @@ -171,6 +171,19 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu) | |||
| 171 | emulated = kvmppc_handle_load(run, vcpu, rt, 1, 1); | 171 | emulated = kvmppc_handle_load(run, vcpu, rt, 1, 1); |
| 172 | break; | 172 | break; |
| 173 | 173 | ||
| 174 | case OP_31_XOP_LBZUX: | ||
| 175 | rt = get_rt(inst); | ||
| 176 | ra = get_ra(inst); | ||
| 177 | rb = get_rb(inst); | ||
| 178 | |||
| 179 | ea = kvmppc_get_gpr(vcpu, rb); | ||
| 180 | if (ra) | ||
| 181 | ea += kvmppc_get_gpr(vcpu, ra); | ||
| 182 | |||
| 183 | emulated = kvmppc_handle_load(run, vcpu, rt, 1, 1); | ||
| 184 | kvmppc_set_gpr(vcpu, ra, ea); | ||
| 185 | break; | ||
| 186 | |||
| 174 | case OP_31_XOP_STWX: | 187 | case OP_31_XOP_STWX: |
| 175 | rs = get_rs(inst); | 188 | rs = get_rs(inst); |
| 176 | emulated = kvmppc_handle_store(run, vcpu, | 189 | emulated = kvmppc_handle_store(run, vcpu, |
| @@ -200,6 +213,11 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu) | |||
| 200 | kvmppc_set_gpr(vcpu, rs, ea); | 213 | kvmppc_set_gpr(vcpu, rs, ea); |
| 201 | break; | 214 | break; |
| 202 | 215 | ||
| 216 | case OP_31_XOP_LHAX: | ||
| 217 | rt = get_rt(inst); | ||
| 218 | emulated = kvmppc_handle_loads(run, vcpu, rt, 2, 1); | ||
| 219 | break; | ||
| 220 | |||
| 203 | case OP_31_XOP_LHZX: | 221 | case OP_31_XOP_LHZX: |
| 204 | rt = get_rt(inst); | 222 | rt = get_rt(inst); |
| 205 | emulated = kvmppc_handle_load(run, vcpu, rt, 2, 1); | 223 | emulated = kvmppc_handle_load(run, vcpu, rt, 2, 1); |
| @@ -450,6 +468,18 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu) | |||
| 450 | kvmppc_set_gpr(vcpu, ra, vcpu->arch.paddr_accessed); | 468 | kvmppc_set_gpr(vcpu, ra, vcpu->arch.paddr_accessed); |
| 451 | break; | 469 | break; |
| 452 | 470 | ||
| 471 | case OP_LHA: | ||
| 472 | rt = get_rt(inst); | ||
| 473 | emulated = kvmppc_handle_loads(run, vcpu, rt, 2, 1); | ||
| 474 | break; | ||
| 475 | |||
| 476 | case OP_LHAU: | ||
| 477 | ra = get_ra(inst); | ||
| 478 | rt = get_rt(inst); | ||
| 479 | emulated = kvmppc_handle_loads(run, vcpu, rt, 2, 1); | ||
| 480 | kvmppc_set_gpr(vcpu, ra, vcpu->arch.paddr_accessed); | ||
| 481 | break; | ||
| 482 | |||
| 453 | case OP_STH: | 483 | case OP_STH: |
| 454 | rs = get_rs(inst); | 484 | rs = get_rs(inst); |
| 455 | emulated = kvmppc_handle_store(run, vcpu, | 485 | emulated = kvmppc_handle_store(run, vcpu, |
| @@ -472,7 +502,9 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu) | |||
| 472 | 502 | ||
| 473 | if (emulated == EMULATE_FAIL) { | 503 | if (emulated == EMULATE_FAIL) { |
| 474 | emulated = kvmppc_core_emulate_op(run, vcpu, inst, &advance); | 504 | emulated = kvmppc_core_emulate_op(run, vcpu, inst, &advance); |
| 475 | if (emulated == EMULATE_FAIL) { | 505 | if (emulated == EMULATE_AGAIN) { |
| 506 | advance = 0; | ||
| 507 | } else if (emulated == EMULATE_FAIL) { | ||
| 476 | advance = 0; | 508 | advance = 0; |
| 477 | printk(KERN_ERR "Couldn't emulate instruction 0x%08x " | 509 | printk(KERN_ERR "Couldn't emulate instruction 0x%08x " |
| 478 | "(op %d xop %d)\n", inst, get_op(inst), get_xop(inst)); | 510 | "(op %d xop %d)\n", inst, get_op(inst), get_xop(inst)); |
| @@ -480,10 +512,11 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu) | |||
| 480 | } | 512 | } |
| 481 | } | 513 | } |
| 482 | 514 | ||
| 483 | trace_kvm_ppc_instr(inst, vcpu->arch.pc, emulated); | 515 | trace_kvm_ppc_instr(inst, kvmppc_get_pc(vcpu), emulated); |
| 484 | 516 | ||
| 517 | /* Advance past emulated instruction. */ | ||
| 485 | if (advance) | 518 | if (advance) |
| 486 | vcpu->arch.pc += 4; /* Advance past emulated instruction. */ | 519 | kvmppc_set_pc(vcpu, kvmppc_get_pc(vcpu) + 4); |
| 487 | 520 | ||
| 488 | return emulated; | 521 | return emulated; |
| 489 | } | 522 | } |
diff --git a/arch/powerpc/kvm/fpu.S b/arch/powerpc/kvm/fpu.S new file mode 100644 index 000000000000..2b340a3eee90 --- /dev/null +++ b/arch/powerpc/kvm/fpu.S | |||
| @@ -0,0 +1,273 @@ | |||
| 1 | /* | ||
| 2 | * FPU helper code to use FPU operations from inside the kernel | ||
| 3 | * | ||
| 4 | * Copyright (C) 2010 Alexander Graf (agraf@suse.de) | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or | ||
| 7 | * modify it under the terms of the GNU General Public License | ||
| 8 | * as published by the Free Software Foundation; either version | ||
| 9 | * 2 of the License, or (at your option) any later version. | ||
| 10 | * | ||
| 11 | */ | ||
| 12 | |||
| 13 | #include <asm/reg.h> | ||
| 14 | #include <asm/page.h> | ||
| 15 | #include <asm/mmu.h> | ||
| 16 | #include <asm/pgtable.h> | ||
| 17 | #include <asm/cputable.h> | ||
| 18 | #include <asm/cache.h> | ||
| 19 | #include <asm/thread_info.h> | ||
| 20 | #include <asm/ppc_asm.h> | ||
| 21 | #include <asm/asm-offsets.h> | ||
| 22 | |||
| 23 | /* Instructions operating on single parameters */ | ||
| 24 | |||
| 25 | /* | ||
| 26 | * Single operation with one input operand | ||
| 27 | * | ||
| 28 | * R3 = (double*)&fpscr | ||
| 29 | * R4 = (short*)&result | ||
| 30 | * R5 = (short*)¶m1 | ||
| 31 | */ | ||
| 32 | #define FPS_ONE_IN(name) \ | ||
| 33 | _GLOBAL(fps_ ## name); \ | ||
| 34 | lfd 0,0(r3); /* load up fpscr value */ \ | ||
| 35 | MTFSF_L(0); \ | ||
| 36 | lfs 0,0(r5); \ | ||
| 37 | \ | ||
| 38 | name 0,0; \ | ||
| 39 | \ | ||
| 40 | stfs 0,0(r4); \ | ||
| 41 | mffs 0; \ | ||
| 42 | stfd 0,0(r3); /* save new fpscr value */ \ | ||
| 43 | blr | ||
| 44 | |||
| 45 | /* | ||
| 46 | * Single operation with two input operands | ||
| 47 | * | ||
| 48 | * R3 = (double*)&fpscr | ||
| 49 | * R4 = (short*)&result | ||
| 50 | * R5 = (short*)¶m1 | ||
| 51 | * R6 = (short*)¶m2 | ||
| 52 | */ | ||
| 53 | #define FPS_TWO_IN(name) \ | ||
| 54 | _GLOBAL(fps_ ## name); \ | ||
| 55 | lfd 0,0(r3); /* load up fpscr value */ \ | ||
| 56 | MTFSF_L(0); \ | ||
| 57 | lfs 0,0(r5); \ | ||
| 58 | lfs 1,0(r6); \ | ||
| 59 | \ | ||
| 60 | name 0,0,1; \ | ||
| 61 | \ | ||
| 62 | stfs 0,0(r4); \ | ||
| 63 | mffs 0; \ | ||
| 64 | stfd 0,0(r3); /* save new fpscr value */ \ | ||
| 65 | blr | ||
| 66 | |||
| 67 | /* | ||
| 68 | * Single operation with three input operands | ||
| 69 | * | ||
| 70 | * R3 = (double*)&fpscr | ||
| 71 | * R4 = (short*)&result | ||
| 72 | * R5 = (short*)¶m1 | ||
| 73 | * R6 = (short*)¶m2 | ||
| 74 | * R7 = (short*)¶m3 | ||
| 75 | */ | ||
| 76 | #define FPS_THREE_IN(name) \ | ||
| 77 | _GLOBAL(fps_ ## name); \ | ||
| 78 | lfd 0,0(r3); /* load up fpscr value */ \ | ||
| 79 | MTFSF_L(0); \ | ||
| 80 | lfs 0,0(r5); \ | ||
| 81 | lfs 1,0(r6); \ | ||
| 82 | lfs 2,0(r7); \ | ||
| 83 | \ | ||
| 84 | name 0,0,1,2; \ | ||
| 85 | \ | ||
| 86 | stfs 0,0(r4); \ | ||
| 87 | mffs 0; \ | ||
| 88 | stfd 0,0(r3); /* save new fpscr value */ \ | ||
| 89 | blr | ||
| 90 | |||
| 91 | FPS_ONE_IN(fres) | ||
| 92 | FPS_ONE_IN(frsqrte) | ||
| 93 | FPS_ONE_IN(fsqrts) | ||
| 94 | FPS_TWO_IN(fadds) | ||
| 95 | FPS_TWO_IN(fdivs) | ||
| 96 | FPS_TWO_IN(fmuls) | ||
| 97 | FPS_TWO_IN(fsubs) | ||
| 98 | FPS_THREE_IN(fmadds) | ||
| 99 | FPS_THREE_IN(fmsubs) | ||
| 100 | FPS_THREE_IN(fnmadds) | ||
| 101 | FPS_THREE_IN(fnmsubs) | ||
| 102 | FPS_THREE_IN(fsel) | ||
| 103 | |||
| 104 | |||
| 105 | /* Instructions operating on double parameters */ | ||
| 106 | |||
| 107 | /* | ||
| 108 | * Beginning of double instruction processing | ||
| 109 | * | ||
| 110 | * R3 = (double*)&fpscr | ||
| 111 | * R4 = (u32*)&cr | ||
| 112 | * R5 = (double*)&result | ||
| 113 | * R6 = (double*)¶m1 | ||
| 114 | * R7 = (double*)¶m2 [load_two] | ||
| 115 | * R8 = (double*)¶m3 [load_three] | ||
| 116 | * LR = instruction call function | ||
| 117 | */ | ||
| 118 | fpd_load_three: | ||
| 119 | lfd 2,0(r8) /* load param3 */ | ||
| 120 | fpd_load_two: | ||
| 121 | lfd 1,0(r7) /* load param2 */ | ||
| 122 | fpd_load_one: | ||
| 123 | lfd 0,0(r6) /* load param1 */ | ||
| 124 | fpd_load_none: | ||
| 125 | lfd 3,0(r3) /* load up fpscr value */ | ||
| 126 | MTFSF_L(3) | ||
| 127 | lwz r6, 0(r4) /* load cr */ | ||
| 128 | mtcr r6 | ||
| 129 | blr | ||
| 130 | |||
| 131 | /* | ||
| 132 | * End of double instruction processing | ||
| 133 | * | ||
| 134 | * R3 = (double*)&fpscr | ||
| 135 | * R4 = (u32*)&cr | ||
| 136 | * R5 = (double*)&result | ||
| 137 | * LR = caller of instruction call function | ||
| 138 | */ | ||
| 139 | fpd_return: | ||
| 140 | mfcr r6 | ||
| 141 | stfd 0,0(r5) /* save result */ | ||
| 142 | mffs 0 | ||
| 143 | stfd 0,0(r3) /* save new fpscr value */ | ||
| 144 | stw r6,0(r4) /* save new cr value */ | ||
| 145 | blr | ||
| 146 | |||
| 147 | /* | ||
| 148 | * Double operation with no input operand | ||
| 149 | * | ||
| 150 | * R3 = (double*)&fpscr | ||
| 151 | * R4 = (u32*)&cr | ||
| 152 | * R5 = (double*)&result | ||
| 153 | */ | ||
| 154 | #define FPD_NONE_IN(name) \ | ||
| 155 | _GLOBAL(fpd_ ## name); \ | ||
| 156 | mflr r12; \ | ||
| 157 | bl fpd_load_none; \ | ||
| 158 | mtlr r12; \ | ||
| 159 | \ | ||
| 160 | name. 0; /* call instruction */ \ | ||
| 161 | b fpd_return | ||
| 162 | |||
| 163 | /* | ||
| 164 | * Double operation with one input operand | ||
| 165 | * | ||
| 166 | * R3 = (double*)&fpscr | ||
| 167 | * R4 = (u32*)&cr | ||
| 168 | * R5 = (double*)&result | ||
| 169 | * R6 = (double*)¶m1 | ||
| 170 | */ | ||
| 171 | #define FPD_ONE_IN(name) \ | ||
| 172 | _GLOBAL(fpd_ ## name); \ | ||
| 173 | mflr r12; \ | ||
| 174 | bl fpd_load_one; \ | ||
| 175 | mtlr r12; \ | ||
| 176 | \ | ||
| 177 | name. 0,0; /* call instruction */ \ | ||
| 178 | b fpd_return | ||
| 179 | |||
| 180 | /* | ||
| 181 | * Double operation with two input operands | ||
| 182 | * | ||
| 183 | * R3 = (double*)&fpscr | ||
| 184 | * R4 = (u32*)&cr | ||
| 185 | * R5 = (double*)&result | ||
| 186 | * R6 = (double*)¶m1 | ||
| 187 | * R7 = (double*)¶m2 | ||
| 188 | * R8 = (double*)¶m3 | ||
| 189 | */ | ||
| 190 | #define FPD_TWO_IN(name) \ | ||
| 191 | _GLOBAL(fpd_ ## name); \ | ||
| 192 | mflr r12; \ | ||
| 193 | bl fpd_load_two; \ | ||
| 194 | mtlr r12; \ | ||
| 195 | \ | ||
| 196 | name. 0,0,1; /* call instruction */ \ | ||
| 197 | b fpd_return | ||
| 198 | |||
| 199 | /* | ||
| 200 | * CR Double operation with two input operands | ||
| 201 | * | ||
| 202 | * R3 = (double*)&fpscr | ||
| 203 | * R4 = (u32*)&cr | ||
| 204 | * R5 = (double*)¶m1 | ||
| 205 | * R6 = (double*)¶m2 | ||
| 206 | * R7 = (double*)¶m3 | ||
| 207 | */ | ||
| 208 | #define FPD_TWO_IN_CR(name) \ | ||
| 209 | _GLOBAL(fpd_ ## name); \ | ||
| 210 | lfd 1,0(r6); /* load param2 */ \ | ||
| 211 | lfd 0,0(r5); /* load param1 */ \ | ||
| 212 | lfd 3,0(r3); /* load up fpscr value */ \ | ||
| 213 | MTFSF_L(3); \ | ||
| 214 | lwz r6, 0(r4); /* load cr */ \ | ||
| 215 | mtcr r6; \ | ||
| 216 | \ | ||
| 217 | name 0,0,1; /* call instruction */ \ | ||
| 218 | mfcr r6; \ | ||
| 219 | mffs 0; \ | ||
| 220 | stfd 0,0(r3); /* save new fpscr value */ \ | ||
| 221 | stw r6,0(r4); /* save new cr value */ \ | ||
| 222 | blr | ||
| 223 | |||
| 224 | /* | ||
| 225 | * Double operation with three input operands | ||
| 226 | * | ||
| 227 | * R3 = (double*)&fpscr | ||
| 228 | * R4 = (u32*)&cr | ||
| 229 | * R5 = (double*)&result | ||
| 230 | * R6 = (double*)¶m1 | ||
| 231 | * R7 = (double*)¶m2 | ||
| 232 | * R8 = (double*)¶m3 | ||
| 233 | */ | ||
| 234 | #define FPD_THREE_IN(name) \ | ||
| 235 | _GLOBAL(fpd_ ## name); \ | ||
| 236 | mflr r12; \ | ||
| 237 | bl fpd_load_three; \ | ||
| 238 | mtlr r12; \ | ||
| 239 | \ | ||
| 240 | name. 0,0,1,2; /* call instruction */ \ | ||
| 241 | b fpd_return | ||
| 242 | |||
| 243 | FPD_ONE_IN(fsqrts) | ||
| 244 | FPD_ONE_IN(frsqrtes) | ||
| 245 | FPD_ONE_IN(fres) | ||
| 246 | FPD_ONE_IN(frsp) | ||
| 247 | FPD_ONE_IN(fctiw) | ||
| 248 | FPD_ONE_IN(fctiwz) | ||
| 249 | FPD_ONE_IN(fsqrt) | ||
| 250 | FPD_ONE_IN(fre) | ||
| 251 | FPD_ONE_IN(frsqrte) | ||
| 252 | FPD_ONE_IN(fneg) | ||
| 253 | FPD_ONE_IN(fabs) | ||
| 254 | FPD_TWO_IN(fadds) | ||
| 255 | FPD_TWO_IN(fsubs) | ||
| 256 | FPD_TWO_IN(fdivs) | ||
| 257 | FPD_TWO_IN(fmuls) | ||
| 258 | FPD_TWO_IN_CR(fcmpu) | ||
| 259 | FPD_TWO_IN(fcpsgn) | ||
| 260 | FPD_TWO_IN(fdiv) | ||
| 261 | FPD_TWO_IN(fadd) | ||
| 262 | FPD_TWO_IN(fmul) | ||
| 263 | FPD_TWO_IN_CR(fcmpo) | ||
| 264 | FPD_TWO_IN(fsub) | ||
| 265 | FPD_THREE_IN(fmsubs) | ||
| 266 | FPD_THREE_IN(fmadds) | ||
| 267 | FPD_THREE_IN(fnmsubs) | ||
| 268 | FPD_THREE_IN(fnmadds) | ||
| 269 | FPD_THREE_IN(fsel) | ||
| 270 | FPD_THREE_IN(fmsub) | ||
| 271 | FPD_THREE_IN(fmadd) | ||
| 272 | FPD_THREE_IN(fnmsub) | ||
| 273 | FPD_THREE_IN(fnmadd) | ||
diff --git a/arch/powerpc/kvm/powerpc.c b/arch/powerpc/kvm/powerpc.c index 297fcd2ff7d0..9b8683f39e05 100644 --- a/arch/powerpc/kvm/powerpc.c +++ b/arch/powerpc/kvm/powerpc.c | |||
| @@ -70,7 +70,7 @@ int kvmppc_emulate_mmio(struct kvm_run *run, struct kvm_vcpu *vcpu) | |||
| 70 | case EMULATE_FAIL: | 70 | case EMULATE_FAIL: |
| 71 | /* XXX Deliver Program interrupt to guest. */ | 71 | /* XXX Deliver Program interrupt to guest. */ |
| 72 | printk(KERN_EMERG "%s: emulation failed (%08x)\n", __func__, | 72 | printk(KERN_EMERG "%s: emulation failed (%08x)\n", __func__, |
| 73 | vcpu->arch.last_inst); | 73 | kvmppc_get_last_inst(vcpu)); |
| 74 | r = RESUME_HOST; | 74 | r = RESUME_HOST; |
| 75 | break; | 75 | break; |
| 76 | default: | 76 | default: |
| @@ -148,6 +148,10 @@ int kvm_dev_ioctl_check_extension(long ext) | |||
| 148 | 148 | ||
| 149 | switch (ext) { | 149 | switch (ext) { |
| 150 | case KVM_CAP_PPC_SEGSTATE: | 150 | case KVM_CAP_PPC_SEGSTATE: |
| 151 | case KVM_CAP_PPC_PAIRED_SINGLES: | ||
| 152 | case KVM_CAP_PPC_UNSET_IRQ: | ||
| 153 | case KVM_CAP_ENABLE_CAP: | ||
| 154 | case KVM_CAP_PPC_OSI: | ||
| 151 | r = 1; | 155 | r = 1; |
| 152 | break; | 156 | break; |
| 153 | case KVM_CAP_COALESCED_MMIO: | 157 | case KVM_CAP_COALESCED_MMIO: |
| @@ -193,12 +197,17 @@ struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm, unsigned int id) | |||
| 193 | { | 197 | { |
| 194 | struct kvm_vcpu *vcpu; | 198 | struct kvm_vcpu *vcpu; |
| 195 | vcpu = kvmppc_core_vcpu_create(kvm, id); | 199 | vcpu = kvmppc_core_vcpu_create(kvm, id); |
| 196 | kvmppc_create_vcpu_debugfs(vcpu, id); | 200 | if (!IS_ERR(vcpu)) |
| 201 | kvmppc_create_vcpu_debugfs(vcpu, id); | ||
| 197 | return vcpu; | 202 | return vcpu; |
| 198 | } | 203 | } |
| 199 | 204 | ||
| 200 | void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu) | 205 | void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu) |
| 201 | { | 206 | { |
| 207 | /* Make sure we're not using the vcpu anymore */ | ||
| 208 | hrtimer_cancel(&vcpu->arch.dec_timer); | ||
| 209 | tasklet_kill(&vcpu->arch.tasklet); | ||
| 210 | |||
| 202 | kvmppc_remove_vcpu_debugfs(vcpu); | 211 | kvmppc_remove_vcpu_debugfs(vcpu); |
| 203 | kvmppc_core_vcpu_free(vcpu); | 212 | kvmppc_core_vcpu_free(vcpu); |
| 204 | } | 213 | } |
| @@ -278,7 +287,7 @@ static void kvmppc_complete_dcr_load(struct kvm_vcpu *vcpu, | |||
| 278 | static void kvmppc_complete_mmio_load(struct kvm_vcpu *vcpu, | 287 | static void kvmppc_complete_mmio_load(struct kvm_vcpu *vcpu, |
| 279 | struct kvm_run *run) | 288 | struct kvm_run *run) |
| 280 | { | 289 | { |
| 281 | ulong gpr; | 290 | u64 gpr; |
| 282 | 291 | ||
| 283 | if (run->mmio.len > sizeof(gpr)) { | 292 | if (run->mmio.len > sizeof(gpr)) { |
| 284 | printk(KERN_ERR "bad MMIO length: %d\n", run->mmio.len); | 293 | printk(KERN_ERR "bad MMIO length: %d\n", run->mmio.len); |
| @@ -287,6 +296,7 @@ static void kvmppc_complete_mmio_load(struct kvm_vcpu *vcpu, | |||
| 287 | 296 | ||
| 288 | if (vcpu->arch.mmio_is_bigendian) { | 297 | if (vcpu->arch.mmio_is_bigendian) { |
| 289 | switch (run->mmio.len) { | 298 | switch (run->mmio.len) { |
| 299 | case 8: gpr = *(u64 *)run->mmio.data; break; | ||
| 290 | case 4: gpr = *(u32 *)run->mmio.data; break; | 300 | case 4: gpr = *(u32 *)run->mmio.data; break; |
| 291 | case 2: gpr = *(u16 *)run->mmio.data; break; | 301 | case 2: gpr = *(u16 *)run->mmio.data; break; |
| 292 | case 1: gpr = *(u8 *)run->mmio.data; break; | 302 | case 1: gpr = *(u8 *)run->mmio.data; break; |
| @@ -300,7 +310,43 @@ static void kvmppc_complete_mmio_load(struct kvm_vcpu *vcpu, | |||
| 300 | } | 310 | } |
| 301 | } | 311 | } |
| 302 | 312 | ||
| 313 | if (vcpu->arch.mmio_sign_extend) { | ||
| 314 | switch (run->mmio.len) { | ||
| 315 | #ifdef CONFIG_PPC64 | ||
| 316 | case 4: | ||
| 317 | gpr = (s64)(s32)gpr; | ||
| 318 | break; | ||
| 319 | #endif | ||
| 320 | case 2: | ||
| 321 | gpr = (s64)(s16)gpr; | ||
| 322 | break; | ||
| 323 | case 1: | ||
| 324 | gpr = (s64)(s8)gpr; | ||
| 325 | break; | ||
| 326 | } | ||
| 327 | } | ||
| 328 | |||
| 303 | kvmppc_set_gpr(vcpu, vcpu->arch.io_gpr, gpr); | 329 | kvmppc_set_gpr(vcpu, vcpu->arch.io_gpr, gpr); |
| 330 | |||
| 331 | switch (vcpu->arch.io_gpr & KVM_REG_EXT_MASK) { | ||
| 332 | case KVM_REG_GPR: | ||
| 333 | kvmppc_set_gpr(vcpu, vcpu->arch.io_gpr, gpr); | ||
| 334 | break; | ||
| 335 | case KVM_REG_FPR: | ||
| 336 | vcpu->arch.fpr[vcpu->arch.io_gpr & KVM_REG_MASK] = gpr; | ||
| 337 | break; | ||
| 338 | #ifdef CONFIG_PPC_BOOK3S | ||
| 339 | case KVM_REG_QPR: | ||
| 340 | vcpu->arch.qpr[vcpu->arch.io_gpr & KVM_REG_MASK] = gpr; | ||
| 341 | break; | ||
| 342 | case KVM_REG_FQPR: | ||
| 343 | vcpu->arch.fpr[vcpu->arch.io_gpr & KVM_REG_MASK] = gpr; | ||
| 344 | vcpu->arch.qpr[vcpu->arch.io_gpr & KVM_REG_MASK] = gpr; | ||
| 345 | break; | ||
| 346 | #endif | ||
| 347 | default: | ||
| 348 | BUG(); | ||
| 349 | } | ||
| 304 | } | 350 | } |
| 305 | 351 | ||
| 306 | int kvmppc_handle_load(struct kvm_run *run, struct kvm_vcpu *vcpu, | 352 | int kvmppc_handle_load(struct kvm_run *run, struct kvm_vcpu *vcpu, |
| @@ -319,12 +365,25 @@ int kvmppc_handle_load(struct kvm_run *run, struct kvm_vcpu *vcpu, | |||
| 319 | vcpu->arch.mmio_is_bigendian = is_bigendian; | 365 | vcpu->arch.mmio_is_bigendian = is_bigendian; |
| 320 | vcpu->mmio_needed = 1; | 366 | vcpu->mmio_needed = 1; |
| 321 | vcpu->mmio_is_write = 0; | 367 | vcpu->mmio_is_write = 0; |
| 368 | vcpu->arch.mmio_sign_extend = 0; | ||
| 322 | 369 | ||
| 323 | return EMULATE_DO_MMIO; | 370 | return EMULATE_DO_MMIO; |
| 324 | } | 371 | } |
| 325 | 372 | ||
| 373 | /* Same as above, but sign extends */ | ||
| 374 | int kvmppc_handle_loads(struct kvm_run *run, struct kvm_vcpu *vcpu, | ||
| 375 | unsigned int rt, unsigned int bytes, int is_bigendian) | ||
| 376 | { | ||
| 377 | int r; | ||
| 378 | |||
| 379 | r = kvmppc_handle_load(run, vcpu, rt, bytes, is_bigendian); | ||
| 380 | vcpu->arch.mmio_sign_extend = 1; | ||
| 381 | |||
| 382 | return r; | ||
| 383 | } | ||
| 384 | |||
| 326 | int kvmppc_handle_store(struct kvm_run *run, struct kvm_vcpu *vcpu, | 385 | int kvmppc_handle_store(struct kvm_run *run, struct kvm_vcpu *vcpu, |
| 327 | u32 val, unsigned int bytes, int is_bigendian) | 386 | u64 val, unsigned int bytes, int is_bigendian) |
| 328 | { | 387 | { |
| 329 | void *data = run->mmio.data; | 388 | void *data = run->mmio.data; |
| 330 | 389 | ||
| @@ -342,6 +401,7 @@ int kvmppc_handle_store(struct kvm_run *run, struct kvm_vcpu *vcpu, | |||
| 342 | /* Store the value at the lowest bytes in 'data'. */ | 401 | /* Store the value at the lowest bytes in 'data'. */ |
| 343 | if (is_bigendian) { | 402 | if (is_bigendian) { |
| 344 | switch (bytes) { | 403 | switch (bytes) { |
| 404 | case 8: *(u64 *)data = val; break; | ||
| 345 | case 4: *(u32 *)data = val; break; | 405 | case 4: *(u32 *)data = val; break; |
| 346 | case 2: *(u16 *)data = val; break; | 406 | case 2: *(u16 *)data = val; break; |
| 347 | case 1: *(u8 *)data = val; break; | 407 | case 1: *(u8 *)data = val; break; |
| @@ -376,6 +436,13 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run) | |||
| 376 | if (!vcpu->arch.dcr_is_write) | 436 | if (!vcpu->arch.dcr_is_write) |
| 377 | kvmppc_complete_dcr_load(vcpu, run); | 437 | kvmppc_complete_dcr_load(vcpu, run); |
| 378 | vcpu->arch.dcr_needed = 0; | 438 | vcpu->arch.dcr_needed = 0; |
| 439 | } else if (vcpu->arch.osi_needed) { | ||
| 440 | u64 *gprs = run->osi.gprs; | ||
| 441 | int i; | ||
| 442 | |||
| 443 | for (i = 0; i < 32; i++) | ||
| 444 | kvmppc_set_gpr(vcpu, i, gprs[i]); | ||
| 445 | vcpu->arch.osi_needed = 0; | ||
| 379 | } | 446 | } |
| 380 | 447 | ||
| 381 | kvmppc_core_deliver_interrupts(vcpu); | 448 | kvmppc_core_deliver_interrupts(vcpu); |
| @@ -396,7 +463,10 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run) | |||
| 396 | 463 | ||
| 397 | int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu, struct kvm_interrupt *irq) | 464 | int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu, struct kvm_interrupt *irq) |
| 398 | { | 465 | { |
| 399 | kvmppc_core_queue_external(vcpu, irq); | 466 | if (irq->irq == KVM_INTERRUPT_UNSET) |
| 467 | kvmppc_core_dequeue_external(vcpu, irq); | ||
| 468 | else | ||
| 469 | kvmppc_core_queue_external(vcpu, irq); | ||
| 400 | 470 | ||
| 401 | if (waitqueue_active(&vcpu->wq)) { | 471 | if (waitqueue_active(&vcpu->wq)) { |
| 402 | wake_up_interruptible(&vcpu->wq); | 472 | wake_up_interruptible(&vcpu->wq); |
| @@ -406,6 +476,27 @@ int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu, struct kvm_interrupt *irq) | |||
| 406 | return 0; | 476 | return 0; |
| 407 | } | 477 | } |
| 408 | 478 | ||
| 479 | static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu, | ||
| 480 | struct kvm_enable_cap *cap) | ||
| 481 | { | ||
| 482 | int r; | ||
| 483 | |||
| 484 | if (cap->flags) | ||
| 485 | return -EINVAL; | ||
| 486 | |||
| 487 | switch (cap->cap) { | ||
| 488 | case KVM_CAP_PPC_OSI: | ||
| 489 | r = 0; | ||
| 490 | vcpu->arch.osi_enabled = true; | ||
| 491 | break; | ||
| 492 | default: | ||
| 493 | r = -EINVAL; | ||
| 494 | break; | ||
| 495 | } | ||
| 496 | |||
| 497 | return r; | ||
| 498 | } | ||
| 499 | |||
| 409 | int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu, | 500 | int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu, |
| 410 | struct kvm_mp_state *mp_state) | 501 | struct kvm_mp_state *mp_state) |
| 411 | { | 502 | { |
| @@ -434,6 +525,15 @@ long kvm_arch_vcpu_ioctl(struct file *filp, | |||
| 434 | r = kvm_vcpu_ioctl_interrupt(vcpu, &irq); | 525 | r = kvm_vcpu_ioctl_interrupt(vcpu, &irq); |
| 435 | break; | 526 | break; |
| 436 | } | 527 | } |
| 528 | case KVM_ENABLE_CAP: | ||
| 529 | { | ||
| 530 | struct kvm_enable_cap cap; | ||
| 531 | r = -EFAULT; | ||
| 532 | if (copy_from_user(&cap, argp, sizeof(cap))) | ||
| 533 | goto out; | ||
| 534 | r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap); | ||
| 535 | break; | ||
| 536 | } | ||
| 437 | default: | 537 | default: |
| 438 | r = -EINVAL; | 538 | r = -EINVAL; |
| 439 | } | 539 | } |
diff --git a/arch/powerpc/mm/mmu_context_hash32.c b/arch/powerpc/mm/mmu_context_hash32.c index 0dfba2bf7f31..d0ee554e86e4 100644 --- a/arch/powerpc/mm/mmu_context_hash32.c +++ b/arch/powerpc/mm/mmu_context_hash32.c | |||
| @@ -60,11 +60,7 @@ | |||
| 60 | static unsigned long next_mmu_context; | 60 | static unsigned long next_mmu_context; |
| 61 | static unsigned long context_map[LAST_CONTEXT / BITS_PER_LONG + 1]; | 61 | static unsigned long context_map[LAST_CONTEXT / BITS_PER_LONG + 1]; |
| 62 | 62 | ||
| 63 | 63 | unsigned long __init_new_context(void) | |
| 64 | /* | ||
| 65 | * Set up the context for a new address space. | ||
| 66 | */ | ||
| 67 | int init_new_context(struct task_struct *t, struct mm_struct *mm) | ||
| 68 | { | 64 | { |
| 69 | unsigned long ctx = next_mmu_context; | 65 | unsigned long ctx = next_mmu_context; |
| 70 | 66 | ||
| @@ -74,19 +70,38 @@ int init_new_context(struct task_struct *t, struct mm_struct *mm) | |||
| 74 | ctx = 0; | 70 | ctx = 0; |
| 75 | } | 71 | } |
| 76 | next_mmu_context = (ctx + 1) & LAST_CONTEXT; | 72 | next_mmu_context = (ctx + 1) & LAST_CONTEXT; |
| 77 | mm->context.id = ctx; | 73 | |
| 74 | return ctx; | ||
| 75 | } | ||
| 76 | EXPORT_SYMBOL_GPL(__init_new_context); | ||
| 77 | |||
| 78 | /* | ||
| 79 | * Set up the context for a new address space. | ||
| 80 | */ | ||
| 81 | int init_new_context(struct task_struct *t, struct mm_struct *mm) | ||
| 82 | { | ||
| 83 | mm->context.id = __init_new_context(); | ||
| 78 | 84 | ||
| 79 | return 0; | 85 | return 0; |
| 80 | } | 86 | } |
| 81 | 87 | ||
| 82 | /* | 88 | /* |
| 89 | * Free a context ID. Make sure to call this with preempt disabled! | ||
| 90 | */ | ||
| 91 | void __destroy_context(unsigned long ctx) | ||
| 92 | { | ||
| 93 | clear_bit(ctx, context_map); | ||
| 94 | } | ||
| 95 | EXPORT_SYMBOL_GPL(__destroy_context); | ||
| 96 | |||
| 97 | /* | ||
| 83 | * We're finished using the context for an address space. | 98 | * We're finished using the context for an address space. |
| 84 | */ | 99 | */ |
| 85 | void destroy_context(struct mm_struct *mm) | 100 | void destroy_context(struct mm_struct *mm) |
| 86 | { | 101 | { |
| 87 | preempt_disable(); | 102 | preempt_disable(); |
| 88 | if (mm->context.id != NO_CONTEXT) { | 103 | if (mm->context.id != NO_CONTEXT) { |
| 89 | clear_bit(mm->context.id, context_map); | 104 | __destroy_context(mm->context.id); |
| 90 | mm->context.id = NO_CONTEXT; | 105 | mm->context.id = NO_CONTEXT; |
| 91 | } | 106 | } |
| 92 | preempt_enable(); | 107 | preempt_enable(); |
diff --git a/arch/powerpc/oprofile/op_model_cell.c b/arch/powerpc/oprofile/op_model_cell.c index 2c9e52267292..7fd90d02d8c6 100644 --- a/arch/powerpc/oprofile/op_model_cell.c +++ b/arch/powerpc/oprofile/op_model_cell.c | |||
| @@ -1077,7 +1077,7 @@ static int calculate_lfsr(int n) | |||
| 1077 | index = ENTRIES-1; | 1077 | index = ENTRIES-1; |
| 1078 | 1078 | ||
| 1079 | /* make sure index is valid */ | 1079 | /* make sure index is valid */ |
| 1080 | if ((index > ENTRIES) || (index < 0)) | 1080 | if ((index >= ENTRIES) || (index < 0)) |
| 1081 | index = ENTRIES-1; | 1081 | index = ENTRIES-1; |
| 1082 | 1082 | ||
| 1083 | return initial_lfsr[index]; | 1083 | return initial_lfsr[index]; |
diff --git a/arch/powerpc/platforms/44x/Kconfig b/arch/powerpc/platforms/44x/Kconfig index eeba0a70e466..69d668c072ae 100644 --- a/arch/powerpc/platforms/44x/Kconfig +++ b/arch/powerpc/platforms/44x/Kconfig | |||
| @@ -171,6 +171,17 @@ config ISS4xx | |||
| 171 | help | 171 | help |
| 172 | This option enables support for the IBM ISS simulation environment | 172 | This option enables support for the IBM ISS simulation environment |
| 173 | 173 | ||
| 174 | config ICON | ||
| 175 | bool "Icon" | ||
| 176 | depends on 44x | ||
| 177 | default n | ||
| 178 | select PPC44x_SIMPLE | ||
| 179 | select 440SPe | ||
| 180 | select PCI | ||
| 181 | select PPC4xx_PCI_EXPRESS | ||
| 182 | help | ||
| 183 | This option enables support for the AMCC PPC440SPe evaluation board. | ||
| 184 | |||
| 174 | #config LUAN | 185 | #config LUAN |
| 175 | # bool "Luan" | 186 | # bool "Luan" |
| 176 | # depends on 44x | 187 | # depends on 44x |
diff --git a/arch/powerpc/platforms/44x/ppc44x_simple.c b/arch/powerpc/platforms/44x/ppc44x_simple.c index e8c23ccaa1fc..5f7a29d7f590 100644 --- a/arch/powerpc/platforms/44x/ppc44x_simple.c +++ b/arch/powerpc/platforms/44x/ppc44x_simple.c | |||
| @@ -61,7 +61,8 @@ static char *board[] __initdata = { | |||
| 61 | "amcc,redwood", | 61 | "amcc,redwood", |
| 62 | "amcc,sequoia", | 62 | "amcc,sequoia", |
| 63 | "amcc,taishan", | 63 | "amcc,taishan", |
| 64 | "amcc,yosemite" | 64 | "amcc,yosemite", |
| 65 | "mosaixtech,icon" | ||
| 65 | }; | 66 | }; |
| 66 | 67 | ||
| 67 | static int __init ppc44x_probe(void) | 68 | static int __init ppc44x_probe(void) |
diff --git a/arch/powerpc/platforms/512x/mpc512x_shared.c b/arch/powerpc/platforms/512x/mpc512x_shared.c index b7f518a60f03..707e572b7c40 100644 --- a/arch/powerpc/platforms/512x/mpc512x_shared.c +++ b/arch/powerpc/platforms/512x/mpc512x_shared.c | |||
| @@ -22,6 +22,7 @@ | |||
| 22 | #include <asm/prom.h> | 22 | #include <asm/prom.h> |
| 23 | #include <asm/time.h> | 23 | #include <asm/time.h> |
| 24 | #include <asm/mpc5121.h> | 24 | #include <asm/mpc5121.h> |
| 25 | #include <asm/mpc52xx_psc.h> | ||
| 25 | 26 | ||
| 26 | #include "mpc512x.h" | 27 | #include "mpc512x.h" |
| 27 | 28 | ||
| @@ -95,9 +96,86 @@ void __init mpc512x_declare_of_platform_devices(void) | |||
| 95 | } | 96 | } |
| 96 | } | 97 | } |
| 97 | 98 | ||
| 99 | #define DEFAULT_FIFO_SIZE 16 | ||
| 100 | |||
| 101 | static unsigned int __init get_fifo_size(struct device_node *np, | ||
| 102 | char *prop_name) | ||
| 103 | { | ||
| 104 | const unsigned int *fp; | ||
| 105 | |||
| 106 | fp = of_get_property(np, prop_name, NULL); | ||
| 107 | if (fp) | ||
| 108 | return *fp; | ||
| 109 | |||
| 110 | pr_warning("no %s property in %s node, defaulting to %d\n", | ||
| 111 | prop_name, np->full_name, DEFAULT_FIFO_SIZE); | ||
| 112 | |||
| 113 | return DEFAULT_FIFO_SIZE; | ||
| 114 | } | ||
| 115 | |||
| 116 | #define FIFOC(_base) ((struct mpc512x_psc_fifo __iomem *) \ | ||
| 117 | ((u32)(_base) + sizeof(struct mpc52xx_psc))) | ||
| 118 | |||
| 119 | /* Init PSC FIFO space for TX and RX slices */ | ||
| 120 | void __init mpc512x_psc_fifo_init(void) | ||
| 121 | { | ||
| 122 | struct device_node *np; | ||
| 123 | void __iomem *psc; | ||
| 124 | unsigned int tx_fifo_size; | ||
| 125 | unsigned int rx_fifo_size; | ||
| 126 | int fifobase = 0; /* current fifo address in 32 bit words */ | ||
| 127 | |||
| 128 | for_each_compatible_node(np, NULL, "fsl,mpc5121-psc") { | ||
| 129 | tx_fifo_size = get_fifo_size(np, "fsl,tx-fifo-size"); | ||
| 130 | rx_fifo_size = get_fifo_size(np, "fsl,rx-fifo-size"); | ||
| 131 | |||
| 132 | /* size in register is in 4 byte units */ | ||
| 133 | tx_fifo_size /= 4; | ||
| 134 | rx_fifo_size /= 4; | ||
| 135 | if (!tx_fifo_size) | ||
| 136 | tx_fifo_size = 1; | ||
| 137 | if (!rx_fifo_size) | ||
| 138 | rx_fifo_size = 1; | ||
| 139 | |||
| 140 | psc = of_iomap(np, 0); | ||
| 141 | if (!psc) { | ||
| 142 | pr_err("%s: Can't map %s device\n", | ||
| 143 | __func__, np->full_name); | ||
| 144 | continue; | ||
| 145 | } | ||
| 146 | |||
| 147 | /* FIFO space is 4KiB, check if requested size is available */ | ||
| 148 | if ((fifobase + tx_fifo_size + rx_fifo_size) > 0x1000) { | ||
| 149 | pr_err("%s: no fifo space available for %s\n", | ||
| 150 | __func__, np->full_name); | ||
| 151 | iounmap(psc); | ||
| 152 | /* | ||
| 153 | * chances are that another device requests less | ||
| 154 | * fifo space, so we continue. | ||
| 155 | */ | ||
| 156 | continue; | ||
| 157 | } | ||
| 158 | |||
| 159 | /* set tx and rx fifo size registers */ | ||
| 160 | out_be32(&FIFOC(psc)->txsz, (fifobase << 16) | tx_fifo_size); | ||
| 161 | fifobase += tx_fifo_size; | ||
| 162 | out_be32(&FIFOC(psc)->rxsz, (fifobase << 16) | rx_fifo_size); | ||
| 163 | fifobase += rx_fifo_size; | ||
| 164 | |||
| 165 | /* reset and enable the slices */ | ||
| 166 | out_be32(&FIFOC(psc)->txcmd, 0x80); | ||
| 167 | out_be32(&FIFOC(psc)->txcmd, 0x01); | ||
| 168 | out_be32(&FIFOC(psc)->rxcmd, 0x80); | ||
| 169 | out_be32(&FIFOC(psc)->rxcmd, 0x01); | ||
| 170 | |||
| 171 | iounmap(psc); | ||
| 172 | } | ||
| 173 | } | ||
| 174 | |||
| 98 | void __init mpc512x_init(void) | 175 | void __init mpc512x_init(void) |
| 99 | { | 176 | { |
| 100 | mpc512x_declare_of_platform_devices(); | 177 | mpc512x_declare_of_platform_devices(); |
| 101 | mpc5121_clk_init(); | 178 | mpc5121_clk_init(); |
| 102 | mpc512x_restart_init(); | 179 | mpc512x_restart_init(); |
| 180 | mpc512x_psc_fifo_init(); | ||
| 103 | } | 181 | } |
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_gpio.c b/arch/powerpc/platforms/52xx/mpc52xx_gpio.c index fda7c2a18282..ca5305a5bd61 100644 --- a/arch/powerpc/platforms/52xx/mpc52xx_gpio.c +++ b/arch/powerpc/platforms/52xx/mpc52xx_gpio.c | |||
| @@ -168,7 +168,7 @@ static int __devinit mpc52xx_wkup_gpiochip_probe(struct of_device *ofdev, | |||
| 168 | ofchip->gc.get = mpc52xx_wkup_gpio_get; | 168 | ofchip->gc.get = mpc52xx_wkup_gpio_get; |
| 169 | ofchip->gc.set = mpc52xx_wkup_gpio_set; | 169 | ofchip->gc.set = mpc52xx_wkup_gpio_set; |
| 170 | 170 | ||
| 171 | ret = of_mm_gpiochip_add(ofdev->node, &chip->mmchip); | 171 | ret = of_mm_gpiochip_add(ofdev->dev.of_node, &chip->mmchip); |
| 172 | if (ret) | 172 | if (ret) |
| 173 | return ret; | 173 | return ret; |
| 174 | 174 | ||
| @@ -193,8 +193,11 @@ static const struct of_device_id mpc52xx_wkup_gpiochip_match[] = { | |||
| 193 | }; | 193 | }; |
| 194 | 194 | ||
| 195 | static struct of_platform_driver mpc52xx_wkup_gpiochip_driver = { | 195 | static struct of_platform_driver mpc52xx_wkup_gpiochip_driver = { |
| 196 | .name = "gpio_wkup", | 196 | .driver = { |
| 197 | .match_table = mpc52xx_wkup_gpiochip_match, | 197 | .name = "gpio_wkup", |
| 198 | .owner = THIS_MODULE, | ||
| 199 | .of_match_table = mpc52xx_wkup_gpiochip_match, | ||
| 200 | }, | ||
| 198 | .probe = mpc52xx_wkup_gpiochip_probe, | 201 | .probe = mpc52xx_wkup_gpiochip_probe, |
| 199 | .remove = mpc52xx_gpiochip_remove, | 202 | .remove = mpc52xx_gpiochip_remove, |
| 200 | }; | 203 | }; |
| @@ -329,7 +332,7 @@ static int __devinit mpc52xx_simple_gpiochip_probe(struct of_device *ofdev, | |||
| 329 | ofchip->gc.get = mpc52xx_simple_gpio_get; | 332 | ofchip->gc.get = mpc52xx_simple_gpio_get; |
| 330 | ofchip->gc.set = mpc52xx_simple_gpio_set; | 333 | ofchip->gc.set = mpc52xx_simple_gpio_set; |
| 331 | 334 | ||
| 332 | ret = of_mm_gpiochip_add(ofdev->node, &chip->mmchip); | 335 | ret = of_mm_gpiochip_add(ofdev->dev.of_node, &chip->mmchip); |
| 333 | if (ret) | 336 | if (ret) |
| 334 | return ret; | 337 | return ret; |
| 335 | 338 | ||
| @@ -349,8 +352,11 @@ static const struct of_device_id mpc52xx_simple_gpiochip_match[] = { | |||
| 349 | }; | 352 | }; |
| 350 | 353 | ||
| 351 | static struct of_platform_driver mpc52xx_simple_gpiochip_driver = { | 354 | static struct of_platform_driver mpc52xx_simple_gpiochip_driver = { |
| 352 | .name = "gpio", | 355 | .driver = { |
| 353 | .match_table = mpc52xx_simple_gpiochip_match, | 356 | .name = "gpio", |
| 357 | .owner = THIS_MODULE, | ||
| 358 | .of_match_table = mpc52xx_simple_gpiochip_match, | ||
| 359 | }, | ||
| 354 | .probe = mpc52xx_simple_gpiochip_probe, | 360 | .probe = mpc52xx_simple_gpiochip_probe, |
| 355 | .remove = mpc52xx_gpiochip_remove, | 361 | .remove = mpc52xx_gpiochip_remove, |
| 356 | }; | 362 | }; |
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c index a60ee39d3b78..46c93578cbf0 100644 --- a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c +++ b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c | |||
| @@ -734,8 +734,8 @@ static int __devinit mpc52xx_gpt_probe(struct of_device *ofdev, | |||
| 734 | 734 | ||
| 735 | spin_lock_init(&gpt->lock); | 735 | spin_lock_init(&gpt->lock); |
| 736 | gpt->dev = &ofdev->dev; | 736 | gpt->dev = &ofdev->dev; |
| 737 | gpt->ipb_freq = mpc5xxx_get_bus_frequency(ofdev->node); | 737 | gpt->ipb_freq = mpc5xxx_get_bus_frequency(ofdev->dev.of_node); |
| 738 | gpt->regs = of_iomap(ofdev->node, 0); | 738 | gpt->regs = of_iomap(ofdev->dev.of_node, 0); |
| 739 | if (!gpt->regs) { | 739 | if (!gpt->regs) { |
| 740 | kfree(gpt); | 740 | kfree(gpt); |
| 741 | return -ENOMEM; | 741 | return -ENOMEM; |
| @@ -743,21 +743,21 @@ static int __devinit mpc52xx_gpt_probe(struct of_device *ofdev, | |||
| 743 | 743 | ||
| 744 | dev_set_drvdata(&ofdev->dev, gpt); | 744 | dev_set_drvdata(&ofdev->dev, gpt); |
| 745 | 745 | ||
| 746 | mpc52xx_gpt_gpio_setup(gpt, ofdev->node); | 746 | mpc52xx_gpt_gpio_setup(gpt, ofdev->dev.of_node); |
| 747 | mpc52xx_gpt_irq_setup(gpt, ofdev->node); | 747 | mpc52xx_gpt_irq_setup(gpt, ofdev->dev.of_node); |
| 748 | 748 | ||
| 749 | mutex_lock(&mpc52xx_gpt_list_mutex); | 749 | mutex_lock(&mpc52xx_gpt_list_mutex); |
| 750 | list_add(&gpt->list, &mpc52xx_gpt_list); | 750 | list_add(&gpt->list, &mpc52xx_gpt_list); |
| 751 | mutex_unlock(&mpc52xx_gpt_list_mutex); | 751 | mutex_unlock(&mpc52xx_gpt_list_mutex); |
| 752 | 752 | ||
| 753 | /* check if this device could be a watchdog */ | 753 | /* check if this device could be a watchdog */ |
| 754 | if (of_get_property(ofdev->node, "fsl,has-wdt", NULL) || | 754 | if (of_get_property(ofdev->dev.of_node, "fsl,has-wdt", NULL) || |
| 755 | of_get_property(ofdev->node, "has-wdt", NULL)) { | 755 | of_get_property(ofdev->dev.of_node, "has-wdt", NULL)) { |
| 756 | const u32 *on_boot_wdt; | 756 | const u32 *on_boot_wdt; |
| 757 | 757 | ||
| 758 | gpt->wdt_mode = MPC52xx_GPT_CAN_WDT; | 758 | gpt->wdt_mode = MPC52xx_GPT_CAN_WDT; |
| 759 | on_boot_wdt = of_get_property(ofdev->node, "fsl,wdt-on-boot", | 759 | on_boot_wdt = of_get_property(ofdev->dev.of_node, |
| 760 | NULL); | 760 | "fsl,wdt-on-boot", NULL); |
| 761 | if (on_boot_wdt) { | 761 | if (on_boot_wdt) { |
| 762 | dev_info(gpt->dev, "used as watchdog\n"); | 762 | dev_info(gpt->dev, "used as watchdog\n"); |
| 763 | gpt->wdt_mode |= MPC52xx_GPT_IS_WDT; | 763 | gpt->wdt_mode |= MPC52xx_GPT_IS_WDT; |
| @@ -784,8 +784,11 @@ static const struct of_device_id mpc52xx_gpt_match[] = { | |||
| 784 | }; | 784 | }; |
| 785 | 785 | ||
| 786 | static struct of_platform_driver mpc52xx_gpt_driver = { | 786 | static struct of_platform_driver mpc52xx_gpt_driver = { |
| 787 | .name = "mpc52xx-gpt", | 787 | .driver = { |
| 788 | .match_table = mpc52xx_gpt_match, | 788 | .name = "mpc52xx-gpt", |
| 789 | .owner = THIS_MODULE, | ||
| 790 | .of_match_table = mpc52xx_gpt_match, | ||
| 791 | }, | ||
| 789 | .probe = mpc52xx_gpt_probe, | 792 | .probe = mpc52xx_gpt_probe, |
| 790 | .remove = mpc52xx_gpt_remove, | 793 | .remove = mpc52xx_gpt_remove, |
| 791 | }; | 794 | }; |
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c b/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c index d4f8be307cd5..e86aec644501 100644 --- a/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c +++ b/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c | |||
| @@ -445,14 +445,14 @@ mpc52xx_lpbfifo_probe(struct of_device *op, const struct of_device_id *match) | |||
| 445 | if (lpbfifo.dev != NULL) | 445 | if (lpbfifo.dev != NULL) |
| 446 | return -ENOSPC; | 446 | return -ENOSPC; |
| 447 | 447 | ||
| 448 | lpbfifo.irq = irq_of_parse_and_map(op->node, 0); | 448 | lpbfifo.irq = irq_of_parse_and_map(op->dev.of_node, 0); |
| 449 | if (!lpbfifo.irq) | 449 | if (!lpbfifo.irq) |
| 450 | return -ENODEV; | 450 | return -ENODEV; |
| 451 | 451 | ||
| 452 | if (of_address_to_resource(op->node, 0, &res)) | 452 | if (of_address_to_resource(op->dev.of_node, 0, &res)) |
| 453 | return -ENODEV; | 453 | return -ENODEV; |
| 454 | lpbfifo.regs_phys = res.start; | 454 | lpbfifo.regs_phys = res.start; |
| 455 | lpbfifo.regs = of_iomap(op->node, 0); | 455 | lpbfifo.regs = of_iomap(op->dev.of_node, 0); |
| 456 | if (!lpbfifo.regs) | 456 | if (!lpbfifo.regs) |
| 457 | return -ENOMEM; | 457 | return -ENOMEM; |
| 458 | 458 | ||
| @@ -537,9 +537,11 @@ static struct of_device_id mpc52xx_lpbfifo_match[] __devinitconst = { | |||
| 537 | }; | 537 | }; |
| 538 | 538 | ||
| 539 | static struct of_platform_driver mpc52xx_lpbfifo_driver = { | 539 | static struct of_platform_driver mpc52xx_lpbfifo_driver = { |
| 540 | .owner = THIS_MODULE, | 540 | .driver = { |
| 541 | .name = "mpc52xx-lpbfifo", | 541 | .name = "mpc52xx-lpbfifo", |
| 542 | .match_table = mpc52xx_lpbfifo_match, | 542 | .owner = THIS_MODULE, |
| 543 | .of_match_table = mpc52xx_lpbfifo_match, | ||
| 544 | }, | ||
| 543 | .probe = mpc52xx_lpbfifo_probe, | 545 | .probe = mpc52xx_lpbfifo_probe, |
| 544 | .remove = __devexit_p(mpc52xx_lpbfifo_remove), | 546 | .remove = __devexit_p(mpc52xx_lpbfifo_remove), |
| 545 | }; | 547 | }; |
diff --git a/arch/powerpc/platforms/82xx/ep8248e.c b/arch/powerpc/platforms/82xx/ep8248e.c index f21555d3395a..9f2e52b36f91 100644 --- a/arch/powerpc/platforms/82xx/ep8248e.c +++ b/arch/powerpc/platforms/82xx/ep8248e.c | |||
| @@ -119,12 +119,12 @@ static int __devinit ep8248e_mdio_probe(struct of_device *ofdev, | |||
| 119 | struct device_node *node; | 119 | struct device_node *node; |
| 120 | int ret; | 120 | int ret; |
| 121 | 121 | ||
| 122 | node = of_get_parent(ofdev->node); | 122 | node = of_get_parent(ofdev->dev.of_node); |
| 123 | of_node_put(node); | 123 | of_node_put(node); |
| 124 | if (node != ep8248e_bcsr_node) | 124 | if (node != ep8248e_bcsr_node) |
| 125 | return -ENODEV; | 125 | return -ENODEV; |
| 126 | 126 | ||
| 127 | ret = of_address_to_resource(ofdev->node, 0, &res); | 127 | ret = of_address_to_resource(ofdev->dev.of_node, 0, &res); |
| 128 | if (ret) | 128 | if (ret) |
| 129 | return ret; | 129 | return ret; |
| 130 | 130 | ||
| @@ -142,7 +142,7 @@ static int __devinit ep8248e_mdio_probe(struct of_device *ofdev, | |||
| 142 | bus->parent = &ofdev->dev; | 142 | bus->parent = &ofdev->dev; |
| 143 | snprintf(bus->id, MII_BUS_ID_SIZE, "%x", res.start); | 143 | snprintf(bus->id, MII_BUS_ID_SIZE, "%x", res.start); |
| 144 | 144 | ||
| 145 | ret = of_mdiobus_register(bus, ofdev->node); | 145 | ret = of_mdiobus_register(bus, ofdev->dev.of_node); |
| 146 | if (ret) | 146 | if (ret) |
| 147 | goto err_free_irq; | 147 | goto err_free_irq; |
| 148 | 148 | ||
| @@ -170,8 +170,9 @@ static const struct of_device_id ep8248e_mdio_match[] = { | |||
| 170 | static struct of_platform_driver ep8248e_mdio_driver = { | 170 | static struct of_platform_driver ep8248e_mdio_driver = { |
| 171 | .driver = { | 171 | .driver = { |
| 172 | .name = "ep8248e-mdio-bitbang", | 172 | .name = "ep8248e-mdio-bitbang", |
| 173 | .owner = THIS_MODULE, | ||
| 174 | .of_match_table = ep8248e_mdio_match, | ||
| 173 | }, | 175 | }, |
| 174 | .match_table = ep8248e_mdio_match, | ||
| 175 | .probe = ep8248e_mdio_probe, | 176 | .probe = ep8248e_mdio_probe, |
| 176 | .remove = ep8248e_mdio_remove, | 177 | .remove = ep8248e_mdio_remove, |
| 177 | }; | 178 | }; |
diff --git a/arch/powerpc/platforms/83xx/suspend.c b/arch/powerpc/platforms/83xx/suspend.c index 43805348b81e..ebe6c3537209 100644 --- a/arch/powerpc/platforms/83xx/suspend.c +++ b/arch/powerpc/platforms/83xx/suspend.c | |||
| @@ -321,7 +321,7 @@ static struct platform_suspend_ops mpc83xx_suspend_ops = { | |||
| 321 | static int pmc_probe(struct of_device *ofdev, | 321 | static int pmc_probe(struct of_device *ofdev, |
| 322 | const struct of_device_id *match) | 322 | const struct of_device_id *match) |
| 323 | { | 323 | { |
| 324 | struct device_node *np = ofdev->node; | 324 | struct device_node *np = ofdev->dev.of_node; |
| 325 | struct resource res; | 325 | struct resource res; |
| 326 | struct pmc_type *type = match->data; | 326 | struct pmc_type *type = match->data; |
| 327 | int ret = 0; | 327 | int ret = 0; |
| @@ -423,8 +423,11 @@ static struct of_device_id pmc_match[] = { | |||
| 423 | }; | 423 | }; |
| 424 | 424 | ||
| 425 | static struct of_platform_driver pmc_driver = { | 425 | static struct of_platform_driver pmc_driver = { |
| 426 | .name = "mpc83xx-pmc", | 426 | .driver = { |
| 427 | .match_table = pmc_match, | 427 | .name = "mpc83xx-pmc", |
| 428 | .owner = THIS_MODULE, | ||
| 429 | .of_match_table = pmc_match, | ||
| 430 | }, | ||
| 428 | .probe = pmc_probe, | 431 | .probe = pmc_probe, |
| 429 | .remove = pmc_remove | 432 | .remove = pmc_remove |
| 430 | }; | 433 | }; |
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c index f0684c8ac960..8fe87fc61485 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c | |||
| @@ -1,5 +1,5 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Copyright (C) Freescale Semicondutor, Inc. 2006-2007. All rights reserved. | 2 | * Copyright (C) Freescale Semicondutor, Inc. 2006-2010. All rights reserved. |
| 3 | * | 3 | * |
| 4 | * Author: Andy Fleming <afleming@freescale.com> | 4 | * Author: Andy Fleming <afleming@freescale.com> |
| 5 | * | 5 | * |
| @@ -154,6 +154,10 @@ static int mpc8568_mds_phy_fixups(struct phy_device *phydev) | |||
| 154 | * Setup the architecture | 154 | * Setup the architecture |
| 155 | * | 155 | * |
| 156 | */ | 156 | */ |
| 157 | #ifdef CONFIG_SMP | ||
| 158 | extern void __init mpc85xx_smp_init(void); | ||
| 159 | #endif | ||
| 160 | |||
| 157 | static void __init mpc85xx_mds_setup_arch(void) | 161 | static void __init mpc85xx_mds_setup_arch(void) |
| 158 | { | 162 | { |
| 159 | struct device_node *np; | 163 | struct device_node *np; |
| @@ -194,6 +198,10 @@ static void __init mpc85xx_mds_setup_arch(void) | |||
| 194 | } | 198 | } |
| 195 | #endif | 199 | #endif |
| 196 | 200 | ||
| 201 | #ifdef CONFIG_SMP | ||
| 202 | mpc85xx_smp_init(); | ||
| 203 | #endif | ||
| 204 | |||
| 197 | #ifdef CONFIG_QUICC_ENGINE | 205 | #ifdef CONFIG_QUICC_ENGINE |
| 198 | np = of_find_compatible_node(NULL, NULL, "fsl,qe"); | 206 | np = of_find_compatible_node(NULL, NULL, "fsl,qe"); |
| 199 | if (!np) { | 207 | if (!np) { |
| @@ -271,9 +279,49 @@ static void __init mpc85xx_mds_setup_arch(void) | |||
| 271 | BCSR_UCC_RGMII, BCSR_UCC_RTBI); | 279 | BCSR_UCC_RGMII, BCSR_UCC_RTBI); |
| 272 | } | 280 | } |
| 273 | 281 | ||
| 282 | } else if (machine_is(p1021_mds)) { | ||
| 283 | #define BCSR11_ENET_MICRST (0x1 << 5) | ||
| 284 | /* Reset Micrel PHY */ | ||
| 285 | clrbits8(&bcsr_regs[11], BCSR11_ENET_MICRST); | ||
| 286 | setbits8(&bcsr_regs[11], BCSR11_ENET_MICRST); | ||
| 274 | } | 287 | } |
| 288 | |||
| 275 | iounmap(bcsr_regs); | 289 | iounmap(bcsr_regs); |
| 276 | } | 290 | } |
| 291 | |||
| 292 | if (machine_is(p1021_mds)) { | ||
| 293 | #define MPC85xx_PMUXCR_OFFSET 0x60 | ||
| 294 | #define MPC85xx_PMUXCR_QE0 0x00008000 | ||
| 295 | #define MPC85xx_PMUXCR_QE3 0x00001000 | ||
| 296 | #define MPC85xx_PMUXCR_QE9 0x00000040 | ||
| 297 | #define MPC85xx_PMUXCR_QE12 0x00000008 | ||
| 298 | static __be32 __iomem *pmuxcr; | ||
| 299 | |||
| 300 | np = of_find_node_by_name(NULL, "global-utilities"); | ||
| 301 | |||
| 302 | if (np) { | ||
| 303 | pmuxcr = of_iomap(np, 0) + MPC85xx_PMUXCR_OFFSET; | ||
| 304 | |||
| 305 | if (!pmuxcr) | ||
| 306 | printk(KERN_EMERG "Error: Alternate function" | ||
| 307 | " signal multiplex control register not" | ||
| 308 | " mapped!\n"); | ||
| 309 | else | ||
| 310 | /* P1021 has pins muxed for QE and other functions. To | ||
| 311 | * enable QE UEC mode, we need to set bit QE0 for UCC1 | ||
| 312 | * in Eth mode, QE0 and QE3 for UCC5 in Eth mode, QE9 | ||
| 313 | * and QE12 for QE MII management singals in PMUXCR | ||
| 314 | * register. | ||
| 315 | */ | ||
| 316 | setbits32(pmuxcr, MPC85xx_PMUXCR_QE0 | | ||
| 317 | MPC85xx_PMUXCR_QE3 | | ||
| 318 | MPC85xx_PMUXCR_QE9 | | ||
| 319 | MPC85xx_PMUXCR_QE12); | ||
| 320 | |||
| 321 | of_node_put(np); | ||
| 322 | } | ||
| 323 | |||
| 324 | } | ||
| 277 | #endif /* CONFIG_QUICC_ENGINE */ | 325 | #endif /* CONFIG_QUICC_ENGINE */ |
| 278 | 326 | ||
| 279 | #ifdef CONFIG_SWIOTLB | 327 | #ifdef CONFIG_SWIOTLB |
| @@ -330,6 +378,16 @@ static struct of_device_id mpc85xx_ids[] = { | |||
| 330 | {}, | 378 | {}, |
| 331 | }; | 379 | }; |
| 332 | 380 | ||
| 381 | static struct of_device_id p1021_ids[] = { | ||
| 382 | { .type = "soc", }, | ||
| 383 | { .compatible = "soc", }, | ||
| 384 | { .compatible = "simple-bus", }, | ||
| 385 | { .type = "qe", }, | ||
| 386 | { .compatible = "fsl,qe", }, | ||
| 387 | { .compatible = "gianfar", }, | ||
| 388 | {}, | ||
| 389 | }; | ||
| 390 | |||
| 333 | static int __init mpc85xx_publish_devices(void) | 391 | static int __init mpc85xx_publish_devices(void) |
| 334 | { | 392 | { |
| 335 | if (machine_is(mpc8568_mds)) | 393 | if (machine_is(mpc8568_mds)) |
| @@ -342,11 +400,22 @@ static int __init mpc85xx_publish_devices(void) | |||
| 342 | 400 | ||
| 343 | return 0; | 401 | return 0; |
| 344 | } | 402 | } |
| 403 | |||
| 404 | static int __init p1021_publish_devices(void) | ||
| 405 | { | ||
| 406 | /* Publish the QE devices */ | ||
| 407 | of_platform_bus_probe(NULL, p1021_ids, NULL); | ||
| 408 | |||
| 409 | return 0; | ||
| 410 | } | ||
| 411 | |||
| 345 | machine_device_initcall(mpc8568_mds, mpc85xx_publish_devices); | 412 | machine_device_initcall(mpc8568_mds, mpc85xx_publish_devices); |
| 346 | machine_device_initcall(mpc8569_mds, mpc85xx_publish_devices); | 413 | machine_device_initcall(mpc8569_mds, mpc85xx_publish_devices); |
| 414 | machine_device_initcall(p1021_mds, p1021_publish_devices); | ||
| 347 | 415 | ||
| 348 | machine_arch_initcall(mpc8568_mds, swiotlb_setup_bus_notifier); | 416 | machine_arch_initcall(mpc8568_mds, swiotlb_setup_bus_notifier); |
| 349 | machine_arch_initcall(mpc8569_mds, swiotlb_setup_bus_notifier); | 417 | machine_arch_initcall(mpc8569_mds, swiotlb_setup_bus_notifier); |
| 418 | machine_arch_initcall(p1021_mds, swiotlb_setup_bus_notifier); | ||
| 350 | 419 | ||
| 351 | static void __init mpc85xx_mds_pic_init(void) | 420 | static void __init mpc85xx_mds_pic_init(void) |
| 352 | { | 421 | { |
| @@ -366,7 +435,7 @@ static void __init mpc85xx_mds_pic_init(void) | |||
| 366 | 435 | ||
| 367 | mpic = mpic_alloc(np, r.start, | 436 | mpic = mpic_alloc(np, r.start, |
| 368 | MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN | | 437 | MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN | |
| 369 | MPIC_BROKEN_FRR_NIRQS, | 438 | MPIC_BROKEN_FRR_NIRQS | MPIC_SINGLE_DEST_CPU, |
| 370 | 0, 256, " OpenPIC "); | 439 | 0, 256, " OpenPIC "); |
| 371 | BUG_ON(mpic == NULL); | 440 | BUG_ON(mpic == NULL); |
| 372 | of_node_put(np); | 441 | of_node_put(np); |
| @@ -380,7 +449,11 @@ static void __init mpc85xx_mds_pic_init(void) | |||
| 380 | if (!np) | 449 | if (!np) |
| 381 | return; | 450 | return; |
| 382 | } | 451 | } |
| 383 | qe_ic_init(np, 0, qe_ic_cascade_muxed_mpic, NULL); | 452 | if (machine_is(p1021_mds)) |
| 453 | qe_ic_init(np, 0, qe_ic_cascade_low_mpic, | ||
| 454 | qe_ic_cascade_high_mpic); | ||
| 455 | else | ||
| 456 | qe_ic_init(np, 0, qe_ic_cascade_muxed_mpic, NULL); | ||
| 384 | of_node_put(np); | 457 | of_node_put(np); |
| 385 | #endif /* CONFIG_QUICC_ENGINE */ | 458 | #endif /* CONFIG_QUICC_ENGINE */ |
| 386 | } | 459 | } |
| @@ -426,3 +499,26 @@ define_machine(mpc8569_mds) { | |||
| 426 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | 499 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, |
| 427 | #endif | 500 | #endif |
| 428 | }; | 501 | }; |
| 502 | |||
| 503 | static int __init p1021_mds_probe(void) | ||
| 504 | { | ||
| 505 | unsigned long root = of_get_flat_dt_root(); | ||
| 506 | |||
| 507 | return of_flat_dt_is_compatible(root, "fsl,P1021MDS"); | ||
| 508 | |||
| 509 | } | ||
| 510 | |||
| 511 | define_machine(p1021_mds) { | ||
| 512 | .name = "P1021 MDS", | ||
| 513 | .probe = p1021_mds_probe, | ||
| 514 | .setup_arch = mpc85xx_mds_setup_arch, | ||
| 515 | .init_IRQ = mpc85xx_mds_pic_init, | ||
| 516 | .get_irq = mpic_get_irq, | ||
| 517 | .restart = fsl_rstcr_restart, | ||
| 518 | .calibrate_decr = generic_calibrate_decr, | ||
| 519 | .progress = udbg_progress, | ||
| 520 | #ifdef CONFIG_PCI | ||
| 521 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | ||
| 522 | #endif | ||
| 523 | }; | ||
| 524 | |||
diff --git a/arch/powerpc/platforms/cell/axon_msi.c b/arch/powerpc/platforms/cell/axon_msi.c index 8efe48192f3f..6257e5378615 100644 --- a/arch/powerpc/platforms/cell/axon_msi.c +++ b/arch/powerpc/platforms/cell/axon_msi.c | |||
| @@ -345,7 +345,7 @@ static int axon_msi_shutdown(struct of_device *device) | |||
| 345 | static int axon_msi_probe(struct of_device *device, | 345 | static int axon_msi_probe(struct of_device *device, |
| 346 | const struct of_device_id *device_id) | 346 | const struct of_device_id *device_id) |
| 347 | { | 347 | { |
| 348 | struct device_node *dn = device->node; | 348 | struct device_node *dn = device->dev.of_node; |
| 349 | struct axon_msic *msic; | 349 | struct axon_msic *msic; |
| 350 | unsigned int virq; | 350 | unsigned int virq; |
| 351 | int dcr_base, dcr_len; | 351 | int dcr_base, dcr_len; |
| @@ -447,11 +447,12 @@ static const struct of_device_id axon_msi_device_id[] = { | |||
| 447 | }; | 447 | }; |
| 448 | 448 | ||
| 449 | static struct of_platform_driver axon_msi_driver = { | 449 | static struct of_platform_driver axon_msi_driver = { |
| 450 | .match_table = axon_msi_device_id, | ||
| 451 | .probe = axon_msi_probe, | 450 | .probe = axon_msi_probe, |
| 452 | .shutdown = axon_msi_shutdown, | 451 | .shutdown = axon_msi_shutdown, |
| 453 | .driver = { | 452 | .driver = { |
| 454 | .name = "axon-msi" | 453 | .name = "axon-msi", |
| 454 | .owner = THIS_MODULE, | ||
| 455 | .of_match_table = axon_msi_device_id, | ||
| 455 | }, | 456 | }, |
| 456 | }; | 457 | }; |
| 457 | 458 | ||
diff --git a/arch/powerpc/platforms/cell/iommu.c b/arch/powerpc/platforms/cell/iommu.c index e3ec4976fae7..4326b737d913 100644 --- a/arch/powerpc/platforms/cell/iommu.c +++ b/arch/powerpc/platforms/cell/iommu.c | |||
| @@ -545,7 +545,6 @@ static struct iommu_table *cell_get_iommu_table(struct device *dev) | |||
| 545 | { | 545 | { |
| 546 | struct iommu_window *window; | 546 | struct iommu_window *window; |
| 547 | struct cbe_iommu *iommu; | 547 | struct cbe_iommu *iommu; |
| 548 | struct dev_archdata *archdata = &dev->archdata; | ||
| 549 | 548 | ||
| 550 | /* Current implementation uses the first window available in that | 549 | /* Current implementation uses the first window available in that |
| 551 | * node's iommu. We -might- do something smarter later though it may | 550 | * node's iommu. We -might- do something smarter later though it may |
| @@ -554,7 +553,7 @@ static struct iommu_table *cell_get_iommu_table(struct device *dev) | |||
| 554 | iommu = cell_iommu_for_node(dev_to_node(dev)); | 553 | iommu = cell_iommu_for_node(dev_to_node(dev)); |
| 555 | if (iommu == NULL || list_empty(&iommu->windows)) { | 554 | if (iommu == NULL || list_empty(&iommu->windows)) { |
| 556 | printk(KERN_ERR "iommu: missing iommu for %s (node %d)\n", | 555 | printk(KERN_ERR "iommu: missing iommu for %s (node %d)\n", |
| 557 | archdata->of_node ? archdata->of_node->full_name : "?", | 556 | dev->of_node ? dev->of_node->full_name : "?", |
| 558 | dev_to_node(dev)); | 557 | dev_to_node(dev)); |
| 559 | return NULL; | 558 | return NULL; |
| 560 | } | 559 | } |
| @@ -897,7 +896,7 @@ static u64 cell_iommu_get_fixed_address(struct device *dev) | |||
| 897 | const u32 *ranges = NULL; | 896 | const u32 *ranges = NULL; |
| 898 | int i, len, best, naddr, nsize, pna, range_size; | 897 | int i, len, best, naddr, nsize, pna, range_size; |
| 899 | 898 | ||
| 900 | np = of_node_get(dev->archdata.of_node); | 899 | np = of_node_get(dev->of_node); |
| 901 | while (1) { | 900 | while (1) { |
| 902 | naddr = of_n_addr_cells(np); | 901 | naddr = of_n_addr_cells(np); |
| 903 | nsize = of_n_size_cells(np); | 902 | nsize = of_n_size_cells(np); |
| @@ -1067,7 +1066,7 @@ static int __init cell_iommu_fixed_mapping_init(void) | |||
| 1067 | fbase = _ALIGN_UP(fbase, 1 << IO_SEGMENT_SHIFT); | 1066 | fbase = _ALIGN_UP(fbase, 1 << IO_SEGMENT_SHIFT); |
| 1068 | fsize = lmb_phys_mem_size(); | 1067 | fsize = lmb_phys_mem_size(); |
| 1069 | 1068 | ||
| 1070 | if ((fbase + fsize) <= 0x800000000) | 1069 | if ((fbase + fsize) <= 0x800000000ul) |
| 1071 | hbase = 0; /* use the device tree window */ | 1070 | hbase = 0; /* use the device tree window */ |
| 1072 | else { | 1071 | else { |
| 1073 | /* If we're over 32 GB we need to cheat. We can't map all of | 1072 | /* If we're over 32 GB we need to cheat. We can't map all of |
diff --git a/arch/powerpc/platforms/cell/spufs/file.c b/arch/powerpc/platforms/cell/spufs/file.c index 5c2808252516..1a40da92154c 100644 --- a/arch/powerpc/platforms/cell/spufs/file.c +++ b/arch/powerpc/platforms/cell/spufs/file.c | |||
| @@ -1849,8 +1849,7 @@ out: | |||
| 1849 | return ret; | 1849 | return ret; |
| 1850 | } | 1850 | } |
| 1851 | 1851 | ||
| 1852 | static int spufs_mfc_fsync(struct file *file, struct dentry *dentry, | 1852 | static int spufs_mfc_fsync(struct file *file, int datasync) |
| 1853 | int datasync) | ||
| 1854 | { | 1853 | { |
| 1855 | return spufs_mfc_flush(file, NULL); | 1854 | return spufs_mfc_flush(file, NULL); |
| 1856 | } | 1855 | } |
diff --git a/arch/powerpc/platforms/cell/spufs/inode.c b/arch/powerpc/platforms/cell/spufs/inode.c index fc1b1c42b1dc..e5e5f823d687 100644 --- a/arch/powerpc/platforms/cell/spufs/inode.c +++ b/arch/powerpc/platforms/cell/spufs/inode.c | |||
| @@ -251,7 +251,7 @@ const struct file_operations spufs_context_fops = { | |||
| 251 | .llseek = dcache_dir_lseek, | 251 | .llseek = dcache_dir_lseek, |
| 252 | .read = generic_read_dir, | 252 | .read = generic_read_dir, |
| 253 | .readdir = dcache_readdir, | 253 | .readdir = dcache_readdir, |
| 254 | .fsync = simple_sync_file, | 254 | .fsync = noop_fsync, |
| 255 | }; | 255 | }; |
| 256 | EXPORT_SYMBOL_GPL(spufs_context_fops); | 256 | EXPORT_SYMBOL_GPL(spufs_context_fops); |
| 257 | 257 | ||
diff --git a/arch/powerpc/platforms/pasemi/gpio_mdio.c b/arch/powerpc/platforms/pasemi/gpio_mdio.c index 0f881f64583e..627ee089e75d 100644 --- a/arch/powerpc/platforms/pasemi/gpio_mdio.c +++ b/arch/powerpc/platforms/pasemi/gpio_mdio.c | |||
| @@ -220,7 +220,7 @@ static int __devinit gpio_mdio_probe(struct of_device *ofdev, | |||
| 220 | const struct of_device_id *match) | 220 | const struct of_device_id *match) |
| 221 | { | 221 | { |
| 222 | struct device *dev = &ofdev->dev; | 222 | struct device *dev = &ofdev->dev; |
| 223 | struct device_node *np = ofdev->node; | 223 | struct device_node *np = ofdev->dev.of_node; |
| 224 | struct mii_bus *new_bus; | 224 | struct mii_bus *new_bus; |
| 225 | struct gpio_priv *priv; | 225 | struct gpio_priv *priv; |
| 226 | const unsigned int *prop; | 226 | const unsigned int *prop; |
| @@ -301,11 +301,12 @@ MODULE_DEVICE_TABLE(of, gpio_mdio_match); | |||
| 301 | 301 | ||
| 302 | static struct of_platform_driver gpio_mdio_driver = | 302 | static struct of_platform_driver gpio_mdio_driver = |
| 303 | { | 303 | { |
| 304 | .match_table = gpio_mdio_match, | ||
| 305 | .probe = gpio_mdio_probe, | 304 | .probe = gpio_mdio_probe, |
| 306 | .remove = gpio_mdio_remove, | 305 | .remove = gpio_mdio_remove, |
| 307 | .driver = { | 306 | .driver = { |
| 308 | .name = "gpio-mdio-bitbang", | 307 | .name = "gpio-mdio-bitbang", |
| 308 | .owner = THIS_MODULE, | ||
| 309 | .of_match_table = gpio_mdio_match, | ||
| 309 | }, | 310 | }, |
| 310 | }; | 311 | }; |
| 311 | 312 | ||
diff --git a/arch/powerpc/platforms/pasemi/setup.c b/arch/powerpc/platforms/pasemi/setup.c index ac6fdd973291..f372ec1691a3 100644 --- a/arch/powerpc/platforms/pasemi/setup.c +++ b/arch/powerpc/platforms/pasemi/setup.c | |||
| @@ -360,10 +360,10 @@ static int pcmcia_notify(struct notifier_block *nb, unsigned long action, | |||
| 360 | /* We know electra_cf devices will always have of_node set, since | 360 | /* We know electra_cf devices will always have of_node set, since |
| 361 | * electra_cf is an of_platform driver. | 361 | * electra_cf is an of_platform driver. |
| 362 | */ | 362 | */ |
| 363 | if (!parent->archdata.of_node) | 363 | if (!parent->of_node) |
| 364 | return 0; | 364 | return 0; |
| 365 | 365 | ||
| 366 | if (!of_device_is_compatible(parent->archdata.of_node, "electra-cf")) | 366 | if (!of_device_is_compatible(parent->of_node, "electra-cf")) |
| 367 | return 0; | 367 | return 0; |
| 368 | 368 | ||
| 369 | /* We use the direct ops for localbus */ | 369 | /* We use the direct ops for localbus */ |
diff --git a/arch/powerpc/platforms/ps3/system-bus.c b/arch/powerpc/platforms/ps3/system-bus.c index 6d09f5e3e7e4..23083c397528 100644 --- a/arch/powerpc/platforms/ps3/system-bus.c +++ b/arch/powerpc/platforms/ps3/system-bus.c | |||
| @@ -766,7 +766,7 @@ int ps3_system_bus_device_register(struct ps3_system_bus_device *dev) | |||
| 766 | BUG(); | 766 | BUG(); |
| 767 | }; | 767 | }; |
| 768 | 768 | ||
| 769 | dev->core.archdata.of_node = NULL; | 769 | dev->core.of_node = NULL; |
| 770 | set_dev_node(&dev->core, 0); | 770 | set_dev_node(&dev->core, 0); |
| 771 | 771 | ||
| 772 | pr_debug("%s:%d add %s\n", __func__, __LINE__, dev_name(&dev->core)); | 772 | pr_debug("%s:%d add %s\n", __func__, __LINE__, dev_name(&dev->core)); |
diff --git a/arch/powerpc/platforms/pseries/hvCall_inst.c b/arch/powerpc/platforms/pseries/hvCall_inst.c index 1fefae76e295..e19ff021e711 100644 --- a/arch/powerpc/platforms/pseries/hvCall_inst.c +++ b/arch/powerpc/platforms/pseries/hvCall_inst.c | |||
| @@ -102,7 +102,7 @@ static const struct file_operations hcall_inst_seq_fops = { | |||
| 102 | #define CPU_NAME_BUF_SIZE 32 | 102 | #define CPU_NAME_BUF_SIZE 32 |
| 103 | 103 | ||
| 104 | 104 | ||
| 105 | static void probe_hcall_entry(unsigned long opcode, unsigned long *args) | 105 | static void probe_hcall_entry(void *ignored, unsigned long opcode, unsigned long *args) |
| 106 | { | 106 | { |
| 107 | struct hcall_stats *h; | 107 | struct hcall_stats *h; |
| 108 | 108 | ||
| @@ -114,7 +114,7 @@ static void probe_hcall_entry(unsigned long opcode, unsigned long *args) | |||
| 114 | h->purr_start = mfspr(SPRN_PURR); | 114 | h->purr_start = mfspr(SPRN_PURR); |
| 115 | } | 115 | } |
| 116 | 116 | ||
| 117 | static void probe_hcall_exit(unsigned long opcode, unsigned long retval, | 117 | static void probe_hcall_exit(void *ignored, unsigned long opcode, unsigned long retval, |
| 118 | unsigned long *retbuf) | 118 | unsigned long *retbuf) |
| 119 | { | 119 | { |
| 120 | struct hcall_stats *h; | 120 | struct hcall_stats *h; |
| @@ -140,11 +140,11 @@ static int __init hcall_inst_init(void) | |||
| 140 | if (!firmware_has_feature(FW_FEATURE_LPAR)) | 140 | if (!firmware_has_feature(FW_FEATURE_LPAR)) |
| 141 | return 0; | 141 | return 0; |
| 142 | 142 | ||
| 143 | if (register_trace_hcall_entry(probe_hcall_entry)) | 143 | if (register_trace_hcall_entry(probe_hcall_entry, NULL)) |
| 144 | return -EINVAL; | 144 | return -EINVAL; |
| 145 | 145 | ||
| 146 | if (register_trace_hcall_exit(probe_hcall_exit)) { | 146 | if (register_trace_hcall_exit(probe_hcall_exit, NULL)) { |
| 147 | unregister_trace_hcall_entry(probe_hcall_entry); | 147 | unregister_trace_hcall_entry(probe_hcall_entry, NULL); |
| 148 | return -EINVAL; | 148 | return -EINVAL; |
| 149 | } | 149 | } |
| 150 | 150 | ||
diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c index 1a0000a4b6d6..d26182d42cbf 100644 --- a/arch/powerpc/platforms/pseries/iommu.c +++ b/arch/powerpc/platforms/pseries/iommu.c | |||
| @@ -468,7 +468,7 @@ static void pci_dma_dev_setup_pSeries(struct pci_dev *dev) | |||
| 468 | 468 | ||
| 469 | pr_debug("pci_dma_dev_setup_pSeries: %s\n", pci_name(dev)); | 469 | pr_debug("pci_dma_dev_setup_pSeries: %s\n", pci_name(dev)); |
| 470 | 470 | ||
| 471 | dn = dev->dev.archdata.of_node; | 471 | dn = dev->dev.of_node; |
| 472 | 472 | ||
| 473 | /* If we're the direct child of a root bus, then we need to allocate | 473 | /* If we're the direct child of a root bus, then we need to allocate |
| 474 | * an iommu table ourselves. The bus setup code should have setup | 474 | * an iommu table ourselves. The bus setup code should have setup |
diff --git a/arch/powerpc/sysdev/axonram.c b/arch/powerpc/sysdev/axonram.c index 88f4ae787832..402d2212162f 100644 --- a/arch/powerpc/sysdev/axonram.c +++ b/arch/powerpc/sysdev/axonram.c | |||
| @@ -185,7 +185,7 @@ axon_ram_probe(struct of_device *device, const struct of_device_id *device_id) | |||
| 185 | axon_ram_bank_id++; | 185 | axon_ram_bank_id++; |
| 186 | 186 | ||
| 187 | dev_info(&device->dev, "Found memory controller on %s\n", | 187 | dev_info(&device->dev, "Found memory controller on %s\n", |
| 188 | device->node->full_name); | 188 | device->dev.of_node->full_name); |
| 189 | 189 | ||
| 190 | bank = kzalloc(sizeof(struct axon_ram_bank), GFP_KERNEL); | 190 | bank = kzalloc(sizeof(struct axon_ram_bank), GFP_KERNEL); |
| 191 | if (bank == NULL) { | 191 | if (bank == NULL) { |
| @@ -198,7 +198,7 @@ axon_ram_probe(struct of_device *device, const struct of_device_id *device_id) | |||
| 198 | 198 | ||
| 199 | bank->device = device; | 199 | bank->device = device; |
| 200 | 200 | ||
| 201 | if (of_address_to_resource(device->node, 0, &resource) != 0) { | 201 | if (of_address_to_resource(device->dev.of_node, 0, &resource) != 0) { |
| 202 | dev_err(&device->dev, "Cannot access device tree\n"); | 202 | dev_err(&device->dev, "Cannot access device tree\n"); |
| 203 | rc = -EFAULT; | 203 | rc = -EFAULT; |
| 204 | goto failed; | 204 | goto failed; |
| @@ -253,7 +253,7 @@ axon_ram_probe(struct of_device *device, const struct of_device_id *device_id) | |||
| 253 | blk_queue_logical_block_size(bank->disk->queue, AXON_RAM_SECTOR_SIZE); | 253 | blk_queue_logical_block_size(bank->disk->queue, AXON_RAM_SECTOR_SIZE); |
| 254 | add_disk(bank->disk); | 254 | add_disk(bank->disk); |
| 255 | 255 | ||
| 256 | bank->irq_id = irq_of_parse_and_map(device->node, 0); | 256 | bank->irq_id = irq_of_parse_and_map(device->dev.of_node, 0); |
| 257 | if (bank->irq_id == NO_IRQ) { | 257 | if (bank->irq_id == NO_IRQ) { |
| 258 | dev_err(&device->dev, "Cannot access ECC interrupt ID\n"); | 258 | dev_err(&device->dev, "Cannot access ECC interrupt ID\n"); |
| 259 | rc = -EFAULT; | 259 | rc = -EFAULT; |
| @@ -327,12 +327,12 @@ static struct of_device_id axon_ram_device_id[] = { | |||
| 327 | }; | 327 | }; |
| 328 | 328 | ||
| 329 | static struct of_platform_driver axon_ram_driver = { | 329 | static struct of_platform_driver axon_ram_driver = { |
| 330 | .match_table = axon_ram_device_id, | ||
| 331 | .probe = axon_ram_probe, | 330 | .probe = axon_ram_probe, |
| 332 | .remove = axon_ram_remove, | 331 | .remove = axon_ram_remove, |
| 333 | .driver = { | 332 | .driver = { |
| 334 | .owner = THIS_MODULE, | 333 | .name = AXON_RAM_MODULE_NAME, |
| 335 | .name = AXON_RAM_MODULE_NAME, | 334 | .owner = THIS_MODULE, |
| 335 | .of_match_table = axon_ram_device_id, | ||
| 336 | }, | 336 | }, |
| 337 | }; | 337 | }; |
| 338 | 338 | ||
diff --git a/arch/powerpc/sysdev/bestcomm/bestcomm.c b/arch/powerpc/sysdev/bestcomm/bestcomm.c index 378ebd9aac18..a7c5c470af14 100644 --- a/arch/powerpc/sysdev/bestcomm/bestcomm.c +++ b/arch/powerpc/sysdev/bestcomm/bestcomm.c | |||
| @@ -377,7 +377,7 @@ mpc52xx_bcom_probe(struct of_device *op, const struct of_device_id *match) | |||
| 377 | printk(KERN_INFO "DMA: MPC52xx BestComm driver\n"); | 377 | printk(KERN_INFO "DMA: MPC52xx BestComm driver\n"); |
| 378 | 378 | ||
| 379 | /* Get the bestcomm node */ | 379 | /* Get the bestcomm node */ |
| 380 | of_node_get(op->node); | 380 | of_node_get(op->dev.of_node); |
| 381 | 381 | ||
| 382 | /* Prepare SRAM */ | 382 | /* Prepare SRAM */ |
| 383 | ofn_sram = of_find_matching_node(NULL, mpc52xx_sram_ids); | 383 | ofn_sram = of_find_matching_node(NULL, mpc52xx_sram_ids); |
| @@ -406,10 +406,10 @@ mpc52xx_bcom_probe(struct of_device *op, const struct of_device_id *match) | |||
| 406 | } | 406 | } |
| 407 | 407 | ||
| 408 | /* Save the node */ | 408 | /* Save the node */ |
| 409 | bcom_eng->ofnode = op->node; | 409 | bcom_eng->ofnode = op->dev.of_node; |
| 410 | 410 | ||
| 411 | /* Get, reserve & map io */ | 411 | /* Get, reserve & map io */ |
| 412 | if (of_address_to_resource(op->node, 0, &res_bcom)) { | 412 | if (of_address_to_resource(op->dev.of_node, 0, &res_bcom)) { |
| 413 | printk(KERN_ERR DRIVER_NAME ": " | 413 | printk(KERN_ERR DRIVER_NAME ": " |
| 414 | "Can't get resource\n"); | 414 | "Can't get resource\n"); |
| 415 | rv = -EINVAL; | 415 | rv = -EINVAL; |
| @@ -453,7 +453,7 @@ error_sramclean: | |||
| 453 | kfree(bcom_eng); | 453 | kfree(bcom_eng); |
| 454 | bcom_sram_cleanup(); | 454 | bcom_sram_cleanup(); |
| 455 | error_ofput: | 455 | error_ofput: |
| 456 | of_node_put(op->node); | 456 | of_node_put(op->dev.of_node); |
| 457 | 457 | ||
| 458 | printk(KERN_ERR "DMA: MPC52xx BestComm init failed !\n"); | 458 | printk(KERN_ERR "DMA: MPC52xx BestComm init failed !\n"); |
| 459 | 459 | ||
| @@ -494,14 +494,12 @@ MODULE_DEVICE_TABLE(of, mpc52xx_bcom_of_match); | |||
| 494 | 494 | ||
| 495 | 495 | ||
| 496 | static struct of_platform_driver mpc52xx_bcom_of_platform_driver = { | 496 | static struct of_platform_driver mpc52xx_bcom_of_platform_driver = { |
| 497 | .owner = THIS_MODULE, | ||
| 498 | .name = DRIVER_NAME, | ||
| 499 | .match_table = mpc52xx_bcom_of_match, | ||
| 500 | .probe = mpc52xx_bcom_probe, | 497 | .probe = mpc52xx_bcom_probe, |
| 501 | .remove = mpc52xx_bcom_remove, | 498 | .remove = mpc52xx_bcom_remove, |
| 502 | .driver = { | 499 | .driver = { |
| 503 | .name = DRIVER_NAME, | 500 | .name = DRIVER_NAME, |
| 504 | .owner = THIS_MODULE, | 501 | .owner = THIS_MODULE, |
| 502 | .of_match_table = mpc52xx_bcom_of_match, | ||
| 505 | }, | 503 | }, |
| 506 | }; | 504 | }; |
| 507 | 505 | ||
diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c index 3482e3fd89c0..962c2d8dd8d9 100644 --- a/arch/powerpc/sysdev/fsl_msi.c +++ b/arch/powerpc/sysdev/fsl_msi.c | |||
| @@ -1,5 +1,5 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Copyright (C) 2007-2008 Freescale Semiconductor, Inc. All rights reserved. | 2 | * Copyright (C) 2007-2010 Freescale Semiconductor, Inc. |
| 3 | * | 3 | * |
| 4 | * Author: Tony Li <tony.li@freescale.com> | 4 | * Author: Tony Li <tony.li@freescale.com> |
| 5 | * Jason Jin <Jason.jin@freescale.com> | 5 | * Jason Jin <Jason.jin@freescale.com> |
| @@ -22,14 +22,20 @@ | |||
| 22 | #include <asm/prom.h> | 22 | #include <asm/prom.h> |
| 23 | #include <asm/hw_irq.h> | 23 | #include <asm/hw_irq.h> |
| 24 | #include <asm/ppc-pci.h> | 24 | #include <asm/ppc-pci.h> |
| 25 | #include <asm/mpic.h> | ||
| 25 | #include "fsl_msi.h" | 26 | #include "fsl_msi.h" |
| 26 | 27 | ||
| 28 | LIST_HEAD(msi_head); | ||
| 29 | |||
| 27 | struct fsl_msi_feature { | 30 | struct fsl_msi_feature { |
| 28 | u32 fsl_pic_ip; | 31 | u32 fsl_pic_ip; |
| 29 | u32 msiir_offset; | 32 | u32 msiir_offset; |
| 30 | }; | 33 | }; |
| 31 | 34 | ||
| 32 | static struct fsl_msi *fsl_msi; | 35 | struct fsl_msi_cascade_data { |
| 36 | struct fsl_msi *msi_data; | ||
| 37 | int index; | ||
| 38 | }; | ||
| 33 | 39 | ||
| 34 | static inline u32 fsl_msi_read(u32 __iomem *base, unsigned int reg) | 40 | static inline u32 fsl_msi_read(u32 __iomem *base, unsigned int reg) |
| 35 | { | 41 | { |
| @@ -54,10 +60,12 @@ static struct irq_chip fsl_msi_chip = { | |||
| 54 | static int fsl_msi_host_map(struct irq_host *h, unsigned int virq, | 60 | static int fsl_msi_host_map(struct irq_host *h, unsigned int virq, |
| 55 | irq_hw_number_t hw) | 61 | irq_hw_number_t hw) |
| 56 | { | 62 | { |
| 63 | struct fsl_msi *msi_data = h->host_data; | ||
| 57 | struct irq_chip *chip = &fsl_msi_chip; | 64 | struct irq_chip *chip = &fsl_msi_chip; |
| 58 | 65 | ||
| 59 | irq_to_desc(virq)->status |= IRQ_TYPE_EDGE_FALLING; | 66 | irq_to_desc(virq)->status |= IRQ_TYPE_EDGE_FALLING; |
| 60 | 67 | ||
| 68 | set_irq_chip_data(virq, msi_data); | ||
| 61 | set_irq_chip_and_handler(virq, chip, handle_edge_irq); | 69 | set_irq_chip_and_handler(virq, chip, handle_edge_irq); |
| 62 | 70 | ||
| 63 | return 0; | 71 | return 0; |
| @@ -96,11 +104,12 @@ static int fsl_msi_check_device(struct pci_dev *pdev, int nvec, int type) | |||
| 96 | static void fsl_teardown_msi_irqs(struct pci_dev *pdev) | 104 | static void fsl_teardown_msi_irqs(struct pci_dev *pdev) |
| 97 | { | 105 | { |
| 98 | struct msi_desc *entry; | 106 | struct msi_desc *entry; |
| 99 | struct fsl_msi *msi_data = fsl_msi; | 107 | struct fsl_msi *msi_data; |
| 100 | 108 | ||
| 101 | list_for_each_entry(entry, &pdev->msi_list, list) { | 109 | list_for_each_entry(entry, &pdev->msi_list, list) { |
| 102 | if (entry->irq == NO_IRQ) | 110 | if (entry->irq == NO_IRQ) |
| 103 | continue; | 111 | continue; |
| 112 | msi_data = get_irq_data(entry->irq); | ||
| 104 | set_irq_msi(entry->irq, NULL); | 113 | set_irq_msi(entry->irq, NULL); |
| 105 | msi_bitmap_free_hwirqs(&msi_data->bitmap, | 114 | msi_bitmap_free_hwirqs(&msi_data->bitmap, |
| 106 | virq_to_hw(entry->irq), 1); | 115 | virq_to_hw(entry->irq), 1); |
| @@ -111,9 +120,10 @@ static void fsl_teardown_msi_irqs(struct pci_dev *pdev) | |||
| 111 | } | 120 | } |
| 112 | 121 | ||
| 113 | static void fsl_compose_msi_msg(struct pci_dev *pdev, int hwirq, | 122 | static void fsl_compose_msi_msg(struct pci_dev *pdev, int hwirq, |
| 114 | struct msi_msg *msg) | 123 | struct msi_msg *msg, |
| 124 | struct fsl_msi *fsl_msi_data) | ||
| 115 | { | 125 | { |
| 116 | struct fsl_msi *msi_data = fsl_msi; | 126 | struct fsl_msi *msi_data = fsl_msi_data; |
| 117 | struct pci_controller *hose = pci_bus_to_host(pdev->bus); | 127 | struct pci_controller *hose = pci_bus_to_host(pdev->bus); |
| 118 | u32 base = 0; | 128 | u32 base = 0; |
| 119 | 129 | ||
| @@ -130,14 +140,19 @@ static void fsl_compose_msi_msg(struct pci_dev *pdev, int hwirq, | |||
| 130 | 140 | ||
| 131 | static int fsl_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) | 141 | static int fsl_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) |
| 132 | { | 142 | { |
| 133 | int rc, hwirq; | 143 | int rc, hwirq = -ENOMEM; |
| 134 | unsigned int virq; | 144 | unsigned int virq; |
| 135 | struct msi_desc *entry; | 145 | struct msi_desc *entry; |
| 136 | struct msi_msg msg; | 146 | struct msi_msg msg; |
| 137 | struct fsl_msi *msi_data = fsl_msi; | 147 | struct fsl_msi *msi_data; |
| 138 | 148 | ||
| 139 | list_for_each_entry(entry, &pdev->msi_list, list) { | 149 | list_for_each_entry(entry, &pdev->msi_list, list) { |
| 140 | hwirq = msi_bitmap_alloc_hwirqs(&msi_data->bitmap, 1); | 150 | list_for_each_entry(msi_data, &msi_head, list) { |
| 151 | hwirq = msi_bitmap_alloc_hwirqs(&msi_data->bitmap, 1); | ||
| 152 | if (hwirq >= 0) | ||
| 153 | break; | ||
| 154 | } | ||
| 155 | |||
| 141 | if (hwirq < 0) { | 156 | if (hwirq < 0) { |
| 142 | rc = hwirq; | 157 | rc = hwirq; |
| 143 | pr_debug("%s: fail allocating msi interrupt\n", | 158 | pr_debug("%s: fail allocating msi interrupt\n", |
| @@ -154,25 +169,31 @@ static int fsl_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) | |||
| 154 | rc = -ENOSPC; | 169 | rc = -ENOSPC; |
| 155 | goto out_free; | 170 | goto out_free; |
| 156 | } | 171 | } |
| 172 | set_irq_data(virq, msi_data); | ||
| 157 | set_irq_msi(virq, entry); | 173 | set_irq_msi(virq, entry); |
| 158 | 174 | ||
| 159 | fsl_compose_msi_msg(pdev, hwirq, &msg); | 175 | fsl_compose_msi_msg(pdev, hwirq, &msg, msi_data); |
| 160 | write_msi_msg(virq, &msg); | 176 | write_msi_msg(virq, &msg); |
| 161 | } | 177 | } |
| 162 | return 0; | 178 | return 0; |
| 163 | 179 | ||
| 164 | out_free: | 180 | out_free: |
| 181 | /* free by the caller of this function */ | ||
| 165 | return rc; | 182 | return rc; |
| 166 | } | 183 | } |
| 167 | 184 | ||
| 168 | static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc) | 185 | static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc) |
| 169 | { | 186 | { |
| 170 | unsigned int cascade_irq; | 187 | unsigned int cascade_irq; |
| 171 | struct fsl_msi *msi_data = fsl_msi; | 188 | struct fsl_msi *msi_data; |
| 172 | int msir_index = -1; | 189 | int msir_index = -1; |
| 173 | u32 msir_value = 0; | 190 | u32 msir_value = 0; |
| 174 | u32 intr_index; | 191 | u32 intr_index; |
| 175 | u32 have_shift = 0; | 192 | u32 have_shift = 0; |
| 193 | struct fsl_msi_cascade_data *cascade_data; | ||
| 194 | |||
| 195 | cascade_data = (struct fsl_msi_cascade_data *)get_irq_data(irq); | ||
| 196 | msi_data = cascade_data->msi_data; | ||
| 176 | 197 | ||
| 177 | raw_spin_lock(&desc->lock); | 198 | raw_spin_lock(&desc->lock); |
| 178 | if ((msi_data->feature & FSL_PIC_IP_MASK) == FSL_PIC_IP_IPIC) { | 199 | if ((msi_data->feature & FSL_PIC_IP_MASK) == FSL_PIC_IP_IPIC) { |
| @@ -187,13 +208,13 @@ static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc) | |||
| 187 | if (unlikely(desc->status & IRQ_INPROGRESS)) | 208 | if (unlikely(desc->status & IRQ_INPROGRESS)) |
| 188 | goto unlock; | 209 | goto unlock; |
| 189 | 210 | ||
| 190 | msir_index = (int)desc->handler_data; | 211 | msir_index = cascade_data->index; |
| 191 | 212 | ||
| 192 | if (msir_index >= NR_MSI_REG) | 213 | if (msir_index >= NR_MSI_REG) |
| 193 | cascade_irq = NO_IRQ; | 214 | cascade_irq = NO_IRQ; |
| 194 | 215 | ||
| 195 | desc->status |= IRQ_INPROGRESS; | 216 | desc->status |= IRQ_INPROGRESS; |
| 196 | switch (fsl_msi->feature & FSL_PIC_IP_MASK) { | 217 | switch (msi_data->feature & FSL_PIC_IP_MASK) { |
| 197 | case FSL_PIC_IP_MPIC: | 218 | case FSL_PIC_IP_MPIC: |
| 198 | msir_value = fsl_msi_read(msi_data->msi_regs, | 219 | msir_value = fsl_msi_read(msi_data->msi_regs, |
| 199 | msir_index * 0x10); | 220 | msir_index * 0x10); |
| @@ -229,6 +250,30 @@ unlock: | |||
| 229 | raw_spin_unlock(&desc->lock); | 250 | raw_spin_unlock(&desc->lock); |
| 230 | } | 251 | } |
| 231 | 252 | ||
| 253 | static int fsl_of_msi_remove(struct of_device *ofdev) | ||
| 254 | { | ||
| 255 | struct fsl_msi *msi = ofdev->dev.platform_data; | ||
| 256 | int virq, i; | ||
| 257 | struct fsl_msi_cascade_data *cascade_data; | ||
| 258 | |||
| 259 | if (msi->list.prev != NULL) | ||
| 260 | list_del(&msi->list); | ||
| 261 | for (i = 0; i < NR_MSI_REG; i++) { | ||
| 262 | virq = msi->msi_virqs[i]; | ||
| 263 | if (virq != NO_IRQ) { | ||
| 264 | cascade_data = get_irq_data(virq); | ||
| 265 | kfree(cascade_data); | ||
| 266 | irq_dispose_mapping(virq); | ||
| 267 | } | ||
| 268 | } | ||
| 269 | if (msi->bitmap.bitmap) | ||
| 270 | msi_bitmap_free(&msi->bitmap); | ||
| 271 | iounmap(msi->msi_regs); | ||
| 272 | kfree(msi); | ||
| 273 | |||
| 274 | return 0; | ||
| 275 | } | ||
| 276 | |||
| 232 | static int __devinit fsl_of_msi_probe(struct of_device *dev, | 277 | static int __devinit fsl_of_msi_probe(struct of_device *dev, |
| 233 | const struct of_device_id *match) | 278 | const struct of_device_id *match) |
| 234 | { | 279 | { |
| @@ -239,17 +284,20 @@ static int __devinit fsl_of_msi_probe(struct of_device *dev, | |||
| 239 | int virt_msir; | 284 | int virt_msir; |
| 240 | const u32 *p; | 285 | const u32 *p; |
| 241 | struct fsl_msi_feature *features = match->data; | 286 | struct fsl_msi_feature *features = match->data; |
| 287 | struct fsl_msi_cascade_data *cascade_data = NULL; | ||
| 288 | int len; | ||
| 289 | u32 offset; | ||
| 242 | 290 | ||
| 243 | printk(KERN_DEBUG "Setting up Freescale MSI support\n"); | 291 | printk(KERN_DEBUG "Setting up Freescale MSI support\n"); |
| 244 | 292 | ||
| 245 | msi = kzalloc(sizeof(struct fsl_msi), GFP_KERNEL); | 293 | msi = kzalloc(sizeof(struct fsl_msi), GFP_KERNEL); |
| 246 | if (!msi) { | 294 | if (!msi) { |
| 247 | dev_err(&dev->dev, "No memory for MSI structure\n"); | 295 | dev_err(&dev->dev, "No memory for MSI structure\n"); |
| 248 | err = -ENOMEM; | 296 | return -ENOMEM; |
| 249 | goto error_out; | ||
| 250 | } | 297 | } |
| 298 | dev->dev.platform_data = msi; | ||
| 251 | 299 | ||
| 252 | msi->irqhost = irq_alloc_host(dev->node, IRQ_HOST_MAP_LINEAR, | 300 | msi->irqhost = irq_alloc_host(dev->dev.of_node, IRQ_HOST_MAP_LINEAR, |
| 253 | NR_MSI_IRQS, &fsl_msi_host_ops, 0); | 301 | NR_MSI_IRQS, &fsl_msi_host_ops, 0); |
| 254 | 302 | ||
| 255 | if (msi->irqhost == NULL) { | 303 | if (msi->irqhost == NULL) { |
| @@ -259,10 +307,10 @@ static int __devinit fsl_of_msi_probe(struct of_device *dev, | |||
| 259 | } | 307 | } |
| 260 | 308 | ||
| 261 | /* Get the MSI reg base */ | 309 | /* Get the MSI reg base */ |
| 262 | err = of_address_to_resource(dev->node, 0, &res); | 310 | err = of_address_to_resource(dev->dev.of_node, 0, &res); |
| 263 | if (err) { | 311 | if (err) { |
| 264 | dev_err(&dev->dev, "%s resource error!\n", | 312 | dev_err(&dev->dev, "%s resource error!\n", |
| 265 | dev->node->full_name); | 313 | dev->dev.of_node->full_name); |
| 266 | goto error_out; | 314 | goto error_out; |
| 267 | } | 315 | } |
| 268 | 316 | ||
| @@ -285,40 +333,60 @@ static int __devinit fsl_of_msi_probe(struct of_device *dev, | |||
| 285 | goto error_out; | 333 | goto error_out; |
| 286 | } | 334 | } |
| 287 | 335 | ||
| 288 | p = of_get_property(dev->node, "interrupts", &count); | 336 | p = of_get_property(dev->dev.of_node, "interrupts", &count); |
| 289 | if (!p) { | 337 | if (!p) { |
| 290 | dev_err(&dev->dev, "no interrupts property found on %s\n", | 338 | dev_err(&dev->dev, "no interrupts property found on %s\n", |
| 291 | dev->node->full_name); | 339 | dev->dev.of_node->full_name); |
| 292 | err = -ENODEV; | 340 | err = -ENODEV; |
| 293 | goto error_out; | 341 | goto error_out; |
| 294 | } | 342 | } |
| 295 | if (count % 8 != 0) { | 343 | if (count % 8 != 0) { |
| 296 | dev_err(&dev->dev, "Malformed interrupts property on %s\n", | 344 | dev_err(&dev->dev, "Malformed interrupts property on %s\n", |
| 297 | dev->node->full_name); | 345 | dev->dev.of_node->full_name); |
| 298 | err = -EINVAL; | 346 | err = -EINVAL; |
| 299 | goto error_out; | 347 | goto error_out; |
| 300 | } | 348 | } |
| 349 | offset = 0; | ||
| 350 | p = of_get_property(dev->dev.of_node, "msi-available-ranges", &len); | ||
| 351 | if (p) | ||
| 352 | offset = *p / IRQS_PER_MSI_REG; | ||
| 301 | 353 | ||
| 302 | count /= sizeof(u32); | 354 | count /= sizeof(u32); |
| 303 | for (i = 0; i < count / 2; i++) { | 355 | for (i = 0; i < min(count / 2, NR_MSI_REG); i++) { |
| 304 | if (i > NR_MSI_REG) | 356 | virt_msir = irq_of_parse_and_map(dev->dev.of_node, i); |
| 305 | break; | ||
| 306 | virt_msir = irq_of_parse_and_map(dev->node, i); | ||
| 307 | if (virt_msir != NO_IRQ) { | 357 | if (virt_msir != NO_IRQ) { |
| 308 | set_irq_data(virt_msir, (void *)i); | 358 | cascade_data = kzalloc( |
| 359 | sizeof(struct fsl_msi_cascade_data), | ||
| 360 | GFP_KERNEL); | ||
| 361 | if (!cascade_data) { | ||
| 362 | dev_err(&dev->dev, | ||
| 363 | "No memory for MSI cascade data\n"); | ||
| 364 | err = -ENOMEM; | ||
| 365 | goto error_out; | ||
| 366 | } | ||
| 367 | msi->msi_virqs[i] = virt_msir; | ||
| 368 | cascade_data->index = i + offset; | ||
| 369 | cascade_data->msi_data = msi; | ||
| 370 | set_irq_data(virt_msir, (void *)cascade_data); | ||
| 309 | set_irq_chained_handler(virt_msir, fsl_msi_cascade); | 371 | set_irq_chained_handler(virt_msir, fsl_msi_cascade); |
| 310 | } | 372 | } |
| 311 | } | 373 | } |
| 312 | 374 | ||
| 313 | fsl_msi = msi; | 375 | list_add_tail(&msi->list, &msi_head); |
| 314 | 376 | ||
| 315 | WARN_ON(ppc_md.setup_msi_irqs); | 377 | /* The multiple setting ppc_md.setup_msi_irqs will not harm things */ |
| 316 | ppc_md.setup_msi_irqs = fsl_setup_msi_irqs; | 378 | if (!ppc_md.setup_msi_irqs) { |
| 317 | ppc_md.teardown_msi_irqs = fsl_teardown_msi_irqs; | 379 | ppc_md.setup_msi_irqs = fsl_setup_msi_irqs; |
| 318 | ppc_md.msi_check_device = fsl_msi_check_device; | 380 | ppc_md.teardown_msi_irqs = fsl_teardown_msi_irqs; |
| 381 | ppc_md.msi_check_device = fsl_msi_check_device; | ||
| 382 | } else if (ppc_md.setup_msi_irqs != fsl_setup_msi_irqs) { | ||
| 383 | dev_err(&dev->dev, "Different MSI driver already installed!\n"); | ||
| 384 | err = -ENODEV; | ||
| 385 | goto error_out; | ||
| 386 | } | ||
| 319 | return 0; | 387 | return 0; |
| 320 | error_out: | 388 | error_out: |
| 321 | kfree(msi); | 389 | fsl_of_msi_remove(dev); |
| 322 | return err; | 390 | return err; |
| 323 | } | 391 | } |
| 324 | 392 | ||
| @@ -345,9 +413,13 @@ static const struct of_device_id fsl_of_msi_ids[] = { | |||
| 345 | }; | 413 | }; |
| 346 | 414 | ||
| 347 | static struct of_platform_driver fsl_of_msi_driver = { | 415 | static struct of_platform_driver fsl_of_msi_driver = { |
| 348 | .name = "fsl-msi", | 416 | .driver = { |
| 349 | .match_table = fsl_of_msi_ids, | 417 | .name = "fsl-msi", |
| 418 | .owner = THIS_MODULE, | ||
| 419 | .of_match_table = fsl_of_msi_ids, | ||
| 420 | }, | ||
| 350 | .probe = fsl_of_msi_probe, | 421 | .probe = fsl_of_msi_probe, |
| 422 | .remove = fsl_of_msi_remove, | ||
| 351 | }; | 423 | }; |
| 352 | 424 | ||
| 353 | static __init int fsl_of_msi_init(void) | 425 | static __init int fsl_of_msi_init(void) |
diff --git a/arch/powerpc/sysdev/fsl_msi.h b/arch/powerpc/sysdev/fsl_msi.h index 331c7e7025b7..624580c252d7 100644 --- a/arch/powerpc/sysdev/fsl_msi.h +++ b/arch/powerpc/sysdev/fsl_msi.h | |||
| @@ -32,8 +32,11 @@ struct fsl_msi { | |||
| 32 | u32 msi_addr_hi; | 32 | u32 msi_addr_hi; |
| 33 | void __iomem *msi_regs; | 33 | void __iomem *msi_regs; |
| 34 | u32 feature; | 34 | u32 feature; |
| 35 | int msi_virqs[NR_MSI_REG]; | ||
| 35 | 36 | ||
| 36 | struct msi_bitmap bitmap; | 37 | struct msi_bitmap bitmap; |
| 38 | |||
| 39 | struct list_head list; /* support multiple MSI banks */ | ||
| 37 | }; | 40 | }; |
| 38 | 41 | ||
| 39 | #endif /* _POWERPC_SYSDEV_FSL_MSI_H */ | 42 | #endif /* _POWERPC_SYSDEV_FSL_MSI_H */ |
diff --git a/arch/powerpc/sysdev/fsl_pmc.c b/arch/powerpc/sysdev/fsl_pmc.c index a7635a993dca..9082eb921ad9 100644 --- a/arch/powerpc/sysdev/fsl_pmc.c +++ b/arch/powerpc/sysdev/fsl_pmc.c | |||
| @@ -60,7 +60,7 @@ static struct platform_suspend_ops pmc_suspend_ops = { | |||
| 60 | 60 | ||
| 61 | static int pmc_probe(struct of_device *ofdev, const struct of_device_id *id) | 61 | static int pmc_probe(struct of_device *ofdev, const struct of_device_id *id) |
| 62 | { | 62 | { |
| 63 | pmc_regs = of_iomap(ofdev->node, 0); | 63 | pmc_regs = of_iomap(ofdev->dev.of_node, 0); |
| 64 | if (!pmc_regs) | 64 | if (!pmc_regs) |
| 65 | return -ENOMEM; | 65 | return -ENOMEM; |
| 66 | 66 | ||
| @@ -76,8 +76,11 @@ static const struct of_device_id pmc_ids[] = { | |||
| 76 | }; | 76 | }; |
| 77 | 77 | ||
| 78 | static struct of_platform_driver pmc_driver = { | 78 | static struct of_platform_driver pmc_driver = { |
| 79 | .driver.name = "fsl-pmc", | 79 | .driver = { |
| 80 | .match_table = pmc_ids, | 80 | .name = "fsl-pmc", |
| 81 | .owner = THIS_MODULE, | ||
| 82 | .of_match_table = pmc_ids, | ||
| 83 | }, | ||
| 81 | .probe = pmc_probe, | 84 | .probe = pmc_probe, |
| 82 | }; | 85 | }; |
| 83 | 86 | ||
diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c index 71fba88f50db..30e1626b2e85 100644 --- a/arch/powerpc/sysdev/fsl_rio.c +++ b/arch/powerpc/sysdev/fsl_rio.c | |||
| @@ -1,6 +1,15 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Freescale MPC85xx/MPC86xx RapidIO support | 2 | * Freescale MPC85xx/MPC86xx RapidIO support |
| 3 | * | 3 | * |
| 4 | * Copyright 2009 Sysgo AG | ||
| 5 | * Thomas Moll <thomas.moll@sysgo.com> | ||
| 6 | * - fixed maintenance access routines, check for aligned access | ||
| 7 | * | ||
| 8 | * Copyright 2009 Integrated Device Technology, Inc. | ||
| 9 | * Alex Bounine <alexandre.bounine@idt.com> | ||
| 10 | * - Added Port-Write message handling | ||
| 11 | * - Added Machine Check exception handling | ||
| 12 | * | ||
| 4 | * Copyright (C) 2007, 2008 Freescale Semiconductor, Inc. | 13 | * Copyright (C) 2007, 2008 Freescale Semiconductor, Inc. |
| 5 | * Zhang Wei <wei.zhang@freescale.com> | 14 | * Zhang Wei <wei.zhang@freescale.com> |
| 6 | * | 15 | * |
| @@ -24,19 +33,30 @@ | |||
| 24 | #include <linux/of_platform.h> | 33 | #include <linux/of_platform.h> |
| 25 | #include <linux/delay.h> | 34 | #include <linux/delay.h> |
| 26 | #include <linux/slab.h> | 35 | #include <linux/slab.h> |
| 36 | #include <linux/kfifo.h> | ||
| 27 | 37 | ||
| 28 | #include <asm/io.h> | 38 | #include <asm/io.h> |
| 39 | #include <asm/machdep.h> | ||
| 40 | #include <asm/uaccess.h> | ||
| 41 | |||
| 42 | #undef DEBUG_PW /* Port-Write debugging */ | ||
| 29 | 43 | ||
| 30 | /* RapidIO definition irq, which read from OF-tree */ | 44 | /* RapidIO definition irq, which read from OF-tree */ |
| 31 | #define IRQ_RIO_BELL(m) (((struct rio_priv *)(m->priv))->bellirq) | 45 | #define IRQ_RIO_BELL(m) (((struct rio_priv *)(m->priv))->bellirq) |
| 32 | #define IRQ_RIO_TX(m) (((struct rio_priv *)(m->priv))->txirq) | 46 | #define IRQ_RIO_TX(m) (((struct rio_priv *)(m->priv))->txirq) |
| 33 | #define IRQ_RIO_RX(m) (((struct rio_priv *)(m->priv))->rxirq) | 47 | #define IRQ_RIO_RX(m) (((struct rio_priv *)(m->priv))->rxirq) |
| 48 | #define IRQ_RIO_PW(m) (((struct rio_priv *)(m->priv))->pwirq) | ||
| 34 | 49 | ||
| 35 | #define RIO_ATMU_REGS_OFFSET 0x10c00 | 50 | #define RIO_ATMU_REGS_OFFSET 0x10c00 |
| 36 | #define RIO_P_MSG_REGS_OFFSET 0x11000 | 51 | #define RIO_P_MSG_REGS_OFFSET 0x11000 |
| 37 | #define RIO_S_MSG_REGS_OFFSET 0x13000 | 52 | #define RIO_S_MSG_REGS_OFFSET 0x13000 |
| 38 | #define RIO_ESCSR 0x158 | 53 | #define RIO_ESCSR 0x158 |
| 39 | #define RIO_CCSR 0x15c | 54 | #define RIO_CCSR 0x15c |
| 55 | #define RIO_LTLEDCSR 0x0608 | ||
| 56 | #define RIO_LTLEDCSR_IER 0x80000000 | ||
| 57 | #define RIO_LTLEDCSR_PRT 0x01000000 | ||
| 58 | #define RIO_LTLEECSR 0x060c | ||
| 59 | #define RIO_EPWISR 0x10010 | ||
| 40 | #define RIO_ISR_AACR 0x10120 | 60 | #define RIO_ISR_AACR 0x10120 |
| 41 | #define RIO_ISR_AACR_AA 0x1 /* Accept All ID */ | 61 | #define RIO_ISR_AACR_AA 0x1 /* Accept All ID */ |
| 42 | #define RIO_MAINT_WIN_SIZE 0x400000 | 62 | #define RIO_MAINT_WIN_SIZE 0x400000 |
| @@ -55,6 +75,18 @@ | |||
| 55 | #define RIO_MSG_ISR_QFI 0x00000010 | 75 | #define RIO_MSG_ISR_QFI 0x00000010 |
| 56 | #define RIO_MSG_ISR_DIQI 0x00000001 | 76 | #define RIO_MSG_ISR_DIQI 0x00000001 |
| 57 | 77 | ||
| 78 | #define RIO_IPWMR_SEN 0x00100000 | ||
| 79 | #define RIO_IPWMR_QFIE 0x00000100 | ||
| 80 | #define RIO_IPWMR_EIE 0x00000020 | ||
| 81 | #define RIO_IPWMR_CQ 0x00000002 | ||
| 82 | #define RIO_IPWMR_PWE 0x00000001 | ||
| 83 | |||
| 84 | #define RIO_IPWSR_QF 0x00100000 | ||
| 85 | #define RIO_IPWSR_TE 0x00000080 | ||
| 86 | #define RIO_IPWSR_QFI 0x00000010 | ||
| 87 | #define RIO_IPWSR_PWD 0x00000008 | ||
| 88 | #define RIO_IPWSR_PWB 0x00000004 | ||
| 89 | |||
| 58 | #define RIO_MSG_DESC_SIZE 32 | 90 | #define RIO_MSG_DESC_SIZE 32 |
| 59 | #define RIO_MSG_BUFFER_SIZE 4096 | 91 | #define RIO_MSG_BUFFER_SIZE 4096 |
| 60 | #define RIO_MIN_TX_RING_SIZE 2 | 92 | #define RIO_MIN_TX_RING_SIZE 2 |
| @@ -121,7 +153,7 @@ struct rio_msg_regs { | |||
| 121 | u32 pad10[26]; | 153 | u32 pad10[26]; |
| 122 | u32 pwmr; | 154 | u32 pwmr; |
| 123 | u32 pwsr; | 155 | u32 pwsr; |
| 124 | u32 pad11; | 156 | u32 epwqbar; |
| 125 | u32 pwqbar; | 157 | u32 pwqbar; |
| 126 | }; | 158 | }; |
| 127 | 159 | ||
| @@ -160,6 +192,14 @@ struct rio_msg_rx_ring { | |||
| 160 | void *dev_id; | 192 | void *dev_id; |
| 161 | }; | 193 | }; |
| 162 | 194 | ||
| 195 | struct rio_port_write_msg { | ||
| 196 | void *virt; | ||
| 197 | dma_addr_t phys; | ||
| 198 | u32 msg_count; | ||
| 199 | u32 err_count; | ||
| 200 | u32 discard_count; | ||
| 201 | }; | ||
| 202 | |||
| 163 | struct rio_priv { | 203 | struct rio_priv { |
| 164 | struct device *dev; | 204 | struct device *dev; |
| 165 | void __iomem *regs_win; | 205 | void __iomem *regs_win; |
| @@ -172,11 +212,64 @@ struct rio_priv { | |||
| 172 | struct rio_dbell_ring dbell_ring; | 212 | struct rio_dbell_ring dbell_ring; |
| 173 | struct rio_msg_tx_ring msg_tx_ring; | 213 | struct rio_msg_tx_ring msg_tx_ring; |
| 174 | struct rio_msg_rx_ring msg_rx_ring; | 214 | struct rio_msg_rx_ring msg_rx_ring; |
| 215 | struct rio_port_write_msg port_write_msg; | ||
| 175 | int bellirq; | 216 | int bellirq; |
| 176 | int txirq; | 217 | int txirq; |
| 177 | int rxirq; | 218 | int rxirq; |
| 219 | int pwirq; | ||
| 220 | struct work_struct pw_work; | ||
| 221 | struct kfifo pw_fifo; | ||
| 222 | spinlock_t pw_fifo_lock; | ||
| 178 | }; | 223 | }; |
| 179 | 224 | ||
| 225 | #define __fsl_read_rio_config(x, addr, err, op) \ | ||
| 226 | __asm__ __volatile__( \ | ||
| 227 | "1: "op" %1,0(%2)\n" \ | ||
| 228 | " eieio\n" \ | ||
| 229 | "2:\n" \ | ||
| 230 | ".section .fixup,\"ax\"\n" \ | ||
| 231 | "3: li %1,-1\n" \ | ||
| 232 | " li %0,%3\n" \ | ||
| 233 | " b 2b\n" \ | ||
| 234 | ".section __ex_table,\"a\"\n" \ | ||
| 235 | " .align 2\n" \ | ||
| 236 | " .long 1b,3b\n" \ | ||
| 237 | ".text" \ | ||
| 238 | : "=r" (err), "=r" (x) \ | ||
| 239 | : "b" (addr), "i" (-EFAULT), "0" (err)) | ||
| 240 | |||
| 241 | static void __iomem *rio_regs_win; | ||
| 242 | |||
| 243 | static int (*saved_mcheck_exception)(struct pt_regs *regs); | ||
| 244 | |||
| 245 | static int fsl_rio_mcheck_exception(struct pt_regs *regs) | ||
| 246 | { | ||
| 247 | const struct exception_table_entry *entry = NULL; | ||
| 248 | unsigned long reason = (mfspr(SPRN_MCSR) & MCSR_MASK); | ||
| 249 | |||
| 250 | if (reason & MCSR_BUS_RBERR) { | ||
| 251 | reason = in_be32((u32 *)(rio_regs_win + RIO_LTLEDCSR)); | ||
| 252 | if (reason & (RIO_LTLEDCSR_IER | RIO_LTLEDCSR_PRT)) { | ||
| 253 | /* Check if we are prepared to handle this fault */ | ||
| 254 | entry = search_exception_tables(regs->nip); | ||
| 255 | if (entry) { | ||
| 256 | pr_debug("RIO: %s - MC Exception handled\n", | ||
| 257 | __func__); | ||
| 258 | out_be32((u32 *)(rio_regs_win + RIO_LTLEDCSR), | ||
| 259 | 0); | ||
| 260 | regs->msr |= MSR_RI; | ||
| 261 | regs->nip = entry->fixup; | ||
| 262 | return 1; | ||
| 263 | } | ||
| 264 | } | ||
| 265 | } | ||
| 266 | |||
| 267 | if (saved_mcheck_exception) | ||
| 268 | return saved_mcheck_exception(regs); | ||
| 269 | else | ||
| 270 | return cur_cpu_spec->machine_check(regs); | ||
| 271 | } | ||
| 272 | |||
| 180 | /** | 273 | /** |
| 181 | * fsl_rio_doorbell_send - Send a MPC85xx doorbell message | 274 | * fsl_rio_doorbell_send - Send a MPC85xx doorbell message |
| 182 | * @mport: RapidIO master port info | 275 | * @mport: RapidIO master port info |
| @@ -277,27 +370,44 @@ fsl_rio_config_read(struct rio_mport *mport, int index, u16 destid, | |||
| 277 | { | 370 | { |
| 278 | struct rio_priv *priv = mport->priv; | 371 | struct rio_priv *priv = mport->priv; |
| 279 | u8 *data; | 372 | u8 *data; |
| 373 | u32 rval, err = 0; | ||
| 280 | 374 | ||
| 281 | pr_debug | 375 | pr_debug |
| 282 | ("fsl_rio_config_read: index %d destid %d hopcount %d offset %8.8x len %d\n", | 376 | ("fsl_rio_config_read: index %d destid %d hopcount %d offset %8.8x len %d\n", |
| 283 | index, destid, hopcount, offset, len); | 377 | index, destid, hopcount, offset, len); |
| 378 | |||
| 379 | /* 16MB maintenance window possible */ | ||
| 380 | /* allow only aligned access to maintenance registers */ | ||
| 381 | if (offset > (0x1000000 - len) || !IS_ALIGNED(offset, len)) | ||
| 382 | return -EINVAL; | ||
| 383 | |||
| 284 | out_be32(&priv->maint_atmu_regs->rowtar, | 384 | out_be32(&priv->maint_atmu_regs->rowtar, |
| 285 | (destid << 22) | (hopcount << 12) | ((offset & ~0x3) >> 9)); | 385 | (destid << 22) | (hopcount << 12) | (offset >> 12)); |
| 386 | out_be32(&priv->maint_atmu_regs->rowtear, (destid >> 10)); | ||
| 286 | 387 | ||
| 287 | data = (u8 *) priv->maint_win + offset; | 388 | data = (u8 *) priv->maint_win + (offset & (RIO_MAINT_WIN_SIZE - 1)); |
| 288 | switch (len) { | 389 | switch (len) { |
| 289 | case 1: | 390 | case 1: |
| 290 | *val = in_8((u8 *) data); | 391 | __fsl_read_rio_config(rval, data, err, "lbz"); |
| 291 | break; | 392 | break; |
| 292 | case 2: | 393 | case 2: |
| 293 | *val = in_be16((u16 *) data); | 394 | __fsl_read_rio_config(rval, data, err, "lhz"); |
| 294 | break; | 395 | break; |
| 295 | default: | 396 | case 4: |
| 296 | *val = in_be32((u32 *) data); | 397 | __fsl_read_rio_config(rval, data, err, "lwz"); |
| 297 | break; | 398 | break; |
| 399 | default: | ||
| 400 | return -EINVAL; | ||
| 298 | } | 401 | } |
| 299 | 402 | ||
| 300 | return 0; | 403 | if (err) { |
| 404 | pr_debug("RIO: cfg_read error %d for %x:%x:%x\n", | ||
| 405 | err, destid, hopcount, offset); | ||
| 406 | } | ||
| 407 | |||
| 408 | *val = rval; | ||
| 409 | |||
| 410 | return err; | ||
| 301 | } | 411 | } |
| 302 | 412 | ||
| 303 | /** | 413 | /** |
| @@ -322,10 +432,17 @@ fsl_rio_config_write(struct rio_mport *mport, int index, u16 destid, | |||
| 322 | pr_debug | 432 | pr_debug |
| 323 | ("fsl_rio_config_write: index %d destid %d hopcount %d offset %8.8x len %d val %8.8x\n", | 433 | ("fsl_rio_config_write: index %d destid %d hopcount %d offset %8.8x len %d val %8.8x\n", |
| 324 | index, destid, hopcount, offset, len, val); | 434 | index, destid, hopcount, offset, len, val); |
| 435 | |||
| 436 | /* 16MB maintenance windows possible */ | ||
| 437 | /* allow only aligned access to maintenance registers */ | ||
| 438 | if (offset > (0x1000000 - len) || !IS_ALIGNED(offset, len)) | ||
| 439 | return -EINVAL; | ||
| 440 | |||
| 325 | out_be32(&priv->maint_atmu_regs->rowtar, | 441 | out_be32(&priv->maint_atmu_regs->rowtar, |
| 326 | (destid << 22) | (hopcount << 12) | ((offset & ~0x3) >> 9)); | 442 | (destid << 22) | (hopcount << 12) | (offset >> 12)); |
| 443 | out_be32(&priv->maint_atmu_regs->rowtear, (destid >> 10)); | ||
| 327 | 444 | ||
| 328 | data = (u8 *) priv->maint_win + offset; | 445 | data = (u8 *) priv->maint_win + (offset & (RIO_MAINT_WIN_SIZE - 1)); |
| 329 | switch (len) { | 446 | switch (len) { |
| 330 | case 1: | 447 | case 1: |
| 331 | out_8((u8 *) data, val); | 448 | out_8((u8 *) data, val); |
| @@ -333,9 +450,11 @@ fsl_rio_config_write(struct rio_mport *mport, int index, u16 destid, | |||
| 333 | case 2: | 450 | case 2: |
| 334 | out_be16((u16 *) data, val); | 451 | out_be16((u16 *) data, val); |
| 335 | break; | 452 | break; |
| 336 | default: | 453 | case 4: |
| 337 | out_be32((u32 *) data, val); | 454 | out_be32((u32 *) data, val); |
| 338 | break; | 455 | break; |
| 456 | default: | ||
| 457 | return -EINVAL; | ||
| 339 | } | 458 | } |
| 340 | 459 | ||
| 341 | return 0; | 460 | return 0; |
| @@ -930,6 +1049,223 @@ static int fsl_rio_doorbell_init(struct rio_mport *mport) | |||
| 930 | return rc; | 1049 | return rc; |
| 931 | } | 1050 | } |
| 932 | 1051 | ||
| 1052 | /** | ||
| 1053 | * fsl_rio_port_write_handler - MPC85xx port write interrupt handler | ||
| 1054 | * @irq: Linux interrupt number | ||
| 1055 | * @dev_instance: Pointer to interrupt-specific data | ||
| 1056 | * | ||
| 1057 | * Handles port write interrupts. Parses a list of registered | ||
| 1058 | * port write event handlers and executes a matching event handler. | ||
| 1059 | */ | ||
| 1060 | static irqreturn_t | ||
| 1061 | fsl_rio_port_write_handler(int irq, void *dev_instance) | ||
| 1062 | { | ||
| 1063 | u32 ipwmr, ipwsr; | ||
| 1064 | struct rio_mport *port = (struct rio_mport *)dev_instance; | ||
| 1065 | struct rio_priv *priv = port->priv; | ||
| 1066 | u32 epwisr, tmp; | ||
| 1067 | |||
| 1068 | ipwmr = in_be32(&priv->msg_regs->pwmr); | ||
| 1069 | ipwsr = in_be32(&priv->msg_regs->pwsr); | ||
| 1070 | |||
| 1071 | epwisr = in_be32(priv->regs_win + RIO_EPWISR); | ||
| 1072 | if (epwisr & 0x80000000) { | ||
| 1073 | tmp = in_be32(priv->regs_win + RIO_LTLEDCSR); | ||
| 1074 | pr_info("RIO_LTLEDCSR = 0x%x\n", tmp); | ||
| 1075 | out_be32(priv->regs_win + RIO_LTLEDCSR, 0); | ||
| 1076 | } | ||
| 1077 | |||
| 1078 | if (!(epwisr & 0x00000001)) | ||
| 1079 | return IRQ_HANDLED; | ||
| 1080 | |||
| 1081 | #ifdef DEBUG_PW | ||
| 1082 | pr_debug("PW Int->IPWMR: 0x%08x IPWSR: 0x%08x (", ipwmr, ipwsr); | ||
| 1083 | if (ipwsr & RIO_IPWSR_QF) | ||
| 1084 | pr_debug(" QF"); | ||
| 1085 | if (ipwsr & RIO_IPWSR_TE) | ||
| 1086 | pr_debug(" TE"); | ||
| 1087 | if (ipwsr & RIO_IPWSR_QFI) | ||
| 1088 | pr_debug(" QFI"); | ||
| 1089 | if (ipwsr & RIO_IPWSR_PWD) | ||
| 1090 | pr_debug(" PWD"); | ||
| 1091 | if (ipwsr & RIO_IPWSR_PWB) | ||
| 1092 | pr_debug(" PWB"); | ||
| 1093 | pr_debug(" )\n"); | ||
| 1094 | #endif | ||
| 1095 | out_be32(&priv->msg_regs->pwsr, | ||
| 1096 | ipwsr & (RIO_IPWSR_TE | RIO_IPWSR_QFI | RIO_IPWSR_PWD)); | ||
| 1097 | |||
| 1098 | if ((ipwmr & RIO_IPWMR_EIE) && (ipwsr & RIO_IPWSR_TE)) { | ||
| 1099 | priv->port_write_msg.err_count++; | ||
| 1100 | pr_info("RIO: Port-Write Transaction Err (%d)\n", | ||
| 1101 | priv->port_write_msg.err_count); | ||
| 1102 | } | ||
| 1103 | if (ipwsr & RIO_IPWSR_PWD) { | ||
| 1104 | priv->port_write_msg.discard_count++; | ||
| 1105 | pr_info("RIO: Port Discarded Port-Write Msg(s) (%d)\n", | ||
| 1106 | priv->port_write_msg.discard_count); | ||
| 1107 | } | ||
| 1108 | |||
| 1109 | /* Schedule deferred processing if PW was received */ | ||
| 1110 | if (ipwsr & RIO_IPWSR_QFI) { | ||
| 1111 | /* Save PW message (if there is room in FIFO), | ||
| 1112 | * otherwise discard it. | ||
| 1113 | */ | ||
| 1114 | if (kfifo_avail(&priv->pw_fifo) >= RIO_PW_MSG_SIZE) { | ||
| 1115 | priv->port_write_msg.msg_count++; | ||
| 1116 | kfifo_in(&priv->pw_fifo, priv->port_write_msg.virt, | ||
| 1117 | RIO_PW_MSG_SIZE); | ||
| 1118 | } else { | ||
| 1119 | priv->port_write_msg.discard_count++; | ||
| 1120 | pr_info("RIO: ISR Discarded Port-Write Msg(s) (%d)\n", | ||
| 1121 | priv->port_write_msg.discard_count); | ||
| 1122 | } | ||
| 1123 | schedule_work(&priv->pw_work); | ||
| 1124 | } | ||
| 1125 | |||
| 1126 | /* Issue Clear Queue command. This allows another | ||
| 1127 | * port-write to be received. | ||
| 1128 | */ | ||
| 1129 | out_be32(&priv->msg_regs->pwmr, ipwmr | RIO_IPWMR_CQ); | ||
| 1130 | |||
| 1131 | return IRQ_HANDLED; | ||
| 1132 | } | ||
| 1133 | |||
| 1134 | static void fsl_pw_dpc(struct work_struct *work) | ||
| 1135 | { | ||
| 1136 | struct rio_priv *priv = container_of(work, struct rio_priv, pw_work); | ||
| 1137 | unsigned long flags; | ||
| 1138 | u32 msg_buffer[RIO_PW_MSG_SIZE/sizeof(u32)]; | ||
| 1139 | |||
| 1140 | /* | ||
| 1141 | * Process port-write messages | ||
| 1142 | */ | ||
| 1143 | spin_lock_irqsave(&priv->pw_fifo_lock, flags); | ||
| 1144 | while (kfifo_out(&priv->pw_fifo, (unsigned char *)msg_buffer, | ||
| 1145 | RIO_PW_MSG_SIZE)) { | ||
| 1146 | /* Process one message */ | ||
| 1147 | spin_unlock_irqrestore(&priv->pw_fifo_lock, flags); | ||
| 1148 | #ifdef DEBUG_PW | ||
| 1149 | { | ||
| 1150 | u32 i; | ||
| 1151 | pr_debug("%s : Port-Write Message:", __func__); | ||
| 1152 | for (i = 0; i < RIO_PW_MSG_SIZE/sizeof(u32); i++) { | ||
| 1153 | if ((i%4) == 0) | ||
| 1154 | pr_debug("\n0x%02x: 0x%08x", i*4, | ||
| 1155 | msg_buffer[i]); | ||
| 1156 | else | ||
| 1157 | pr_debug(" 0x%08x", msg_buffer[i]); | ||
| 1158 | } | ||
| 1159 | pr_debug("\n"); | ||
| 1160 | } | ||
| 1161 | #endif | ||
| 1162 | /* Pass the port-write message to RIO core for processing */ | ||
| 1163 | rio_inb_pwrite_handler((union rio_pw_msg *)msg_buffer); | ||
| 1164 | spin_lock_irqsave(&priv->pw_fifo_lock, flags); | ||
| 1165 | } | ||
| 1166 | spin_unlock_irqrestore(&priv->pw_fifo_lock, flags); | ||
| 1167 | } | ||
| 1168 | |||
| 1169 | /** | ||
| 1170 | * fsl_rio_pw_enable - enable/disable port-write interface init | ||
| 1171 | * @mport: Master port implementing the port write unit | ||
| 1172 | * @enable: 1=enable; 0=disable port-write message handling | ||
| 1173 | */ | ||
| 1174 | static int fsl_rio_pw_enable(struct rio_mport *mport, int enable) | ||
| 1175 | { | ||
| 1176 | struct rio_priv *priv = mport->priv; | ||
| 1177 | u32 rval; | ||
| 1178 | |||
| 1179 | rval = in_be32(&priv->msg_regs->pwmr); | ||
| 1180 | |||
| 1181 | if (enable) | ||
| 1182 | rval |= RIO_IPWMR_PWE; | ||
| 1183 | else | ||
| 1184 | rval &= ~RIO_IPWMR_PWE; | ||
| 1185 | |||
| 1186 | out_be32(&priv->msg_regs->pwmr, rval); | ||
| 1187 | |||
| 1188 | return 0; | ||
| 1189 | } | ||
| 1190 | |||
| 1191 | /** | ||
| 1192 | * fsl_rio_port_write_init - MPC85xx port write interface init | ||
| 1193 | * @mport: Master port implementing the port write unit | ||
| 1194 | * | ||
| 1195 | * Initializes port write unit hardware and DMA buffer | ||
| 1196 | * ring. Called from fsl_rio_setup(). Returns %0 on success | ||
| 1197 | * or %-ENOMEM on failure. | ||
| 1198 | */ | ||
| 1199 | static int fsl_rio_port_write_init(struct rio_mport *mport) | ||
| 1200 | { | ||
| 1201 | struct rio_priv *priv = mport->priv; | ||
| 1202 | int rc = 0; | ||
| 1203 | |||
| 1204 | /* Following configurations require a disabled port write controller */ | ||
| 1205 | out_be32(&priv->msg_regs->pwmr, | ||
| 1206 | in_be32(&priv->msg_regs->pwmr) & ~RIO_IPWMR_PWE); | ||
| 1207 | |||
| 1208 | /* Initialize port write */ | ||
| 1209 | priv->port_write_msg.virt = dma_alloc_coherent(priv->dev, | ||
| 1210 | RIO_PW_MSG_SIZE, | ||
| 1211 | &priv->port_write_msg.phys, GFP_KERNEL); | ||
| 1212 | if (!priv->port_write_msg.virt) { | ||
| 1213 | pr_err("RIO: unable allocate port write queue\n"); | ||
| 1214 | return -ENOMEM; | ||
| 1215 | } | ||
| 1216 | |||
| 1217 | priv->port_write_msg.err_count = 0; | ||
| 1218 | priv->port_write_msg.discard_count = 0; | ||
| 1219 | |||
| 1220 | /* Point dequeue/enqueue pointers at first entry */ | ||
| 1221 | out_be32(&priv->msg_regs->epwqbar, 0); | ||
| 1222 | out_be32(&priv->msg_regs->pwqbar, (u32) priv->port_write_msg.phys); | ||
| 1223 | |||
| 1224 | pr_debug("EIPWQBAR: 0x%08x IPWQBAR: 0x%08x\n", | ||
| 1225 | in_be32(&priv->msg_regs->epwqbar), | ||
| 1226 | in_be32(&priv->msg_regs->pwqbar)); | ||
| 1227 | |||
| 1228 | /* Clear interrupt status IPWSR */ | ||
| 1229 | out_be32(&priv->msg_regs->pwsr, | ||
| 1230 | (RIO_IPWSR_TE | RIO_IPWSR_QFI | RIO_IPWSR_PWD)); | ||
| 1231 | |||
| 1232 | /* Configure port write contoller for snooping enable all reporting, | ||
| 1233 | clear queue full */ | ||
| 1234 | out_be32(&priv->msg_regs->pwmr, | ||
| 1235 | RIO_IPWMR_SEN | RIO_IPWMR_QFIE | RIO_IPWMR_EIE | RIO_IPWMR_CQ); | ||
| 1236 | |||
| 1237 | |||
| 1238 | /* Hook up port-write handler */ | ||
| 1239 | rc = request_irq(IRQ_RIO_PW(mport), fsl_rio_port_write_handler, 0, | ||
| 1240 | "port-write", (void *)mport); | ||
| 1241 | if (rc < 0) { | ||
| 1242 | pr_err("MPC85xx RIO: unable to request inbound doorbell irq"); | ||
| 1243 | goto err_out; | ||
| 1244 | } | ||
| 1245 | |||
| 1246 | INIT_WORK(&priv->pw_work, fsl_pw_dpc); | ||
| 1247 | spin_lock_init(&priv->pw_fifo_lock); | ||
| 1248 | if (kfifo_alloc(&priv->pw_fifo, RIO_PW_MSG_SIZE * 32, GFP_KERNEL)) { | ||
| 1249 | pr_err("FIFO allocation failed\n"); | ||
| 1250 | rc = -ENOMEM; | ||
| 1251 | goto err_out_irq; | ||
| 1252 | } | ||
| 1253 | |||
| 1254 | pr_debug("IPWMR: 0x%08x IPWSR: 0x%08x\n", | ||
| 1255 | in_be32(&priv->msg_regs->pwmr), | ||
| 1256 | in_be32(&priv->msg_regs->pwsr)); | ||
| 1257 | |||
| 1258 | return rc; | ||
| 1259 | |||
| 1260 | err_out_irq: | ||
| 1261 | free_irq(IRQ_RIO_PW(mport), (void *)mport); | ||
| 1262 | err_out: | ||
| 1263 | dma_free_coherent(priv->dev, RIO_PW_MSG_SIZE, | ||
| 1264 | priv->port_write_msg.virt, | ||
| 1265 | priv->port_write_msg.phys); | ||
| 1266 | return rc; | ||
| 1267 | } | ||
| 1268 | |||
| 933 | static char *cmdline = NULL; | 1269 | static char *cmdline = NULL; |
| 934 | 1270 | ||
| 935 | static int fsl_rio_get_hdid(int index) | 1271 | static int fsl_rio_get_hdid(int index) |
| @@ -1015,41 +1351,41 @@ int fsl_rio_setup(struct of_device *dev) | |||
| 1015 | u64 law_start, law_size; | 1351 | u64 law_start, law_size; |
| 1016 | int paw, aw, sw; | 1352 | int paw, aw, sw; |
| 1017 | 1353 | ||
| 1018 | if (!dev->node) { | 1354 | if (!dev->dev.of_node) { |
| 1019 | dev_err(&dev->dev, "Device OF-Node is NULL"); | 1355 | dev_err(&dev->dev, "Device OF-Node is NULL"); |
| 1020 | return -EFAULT; | 1356 | return -EFAULT; |
| 1021 | } | 1357 | } |
| 1022 | 1358 | ||
| 1023 | rc = of_address_to_resource(dev->node, 0, ®s); | 1359 | rc = of_address_to_resource(dev->dev.of_node, 0, ®s); |
| 1024 | if (rc) { | 1360 | if (rc) { |
| 1025 | dev_err(&dev->dev, "Can't get %s property 'reg'\n", | 1361 | dev_err(&dev->dev, "Can't get %s property 'reg'\n", |
| 1026 | dev->node->full_name); | 1362 | dev->dev.of_node->full_name); |
| 1027 | return -EFAULT; | 1363 | return -EFAULT; |
| 1028 | } | 1364 | } |
| 1029 | dev_info(&dev->dev, "Of-device full name %s\n", dev->node->full_name); | 1365 | dev_info(&dev->dev, "Of-device full name %s\n", dev->dev.of_node->full_name); |
| 1030 | dev_info(&dev->dev, "Regs: %pR\n", ®s); | 1366 | dev_info(&dev->dev, "Regs: %pR\n", ®s); |
| 1031 | 1367 | ||
| 1032 | dt_range = of_get_property(dev->node, "ranges", &rlen); | 1368 | dt_range = of_get_property(dev->dev.of_node, "ranges", &rlen); |
| 1033 | if (!dt_range) { | 1369 | if (!dt_range) { |
| 1034 | dev_err(&dev->dev, "Can't get %s property 'ranges'\n", | 1370 | dev_err(&dev->dev, "Can't get %s property 'ranges'\n", |
| 1035 | dev->node->full_name); | 1371 | dev->dev.of_node->full_name); |
| 1036 | return -EFAULT; | 1372 | return -EFAULT; |
| 1037 | } | 1373 | } |
| 1038 | 1374 | ||
| 1039 | /* Get node address wide */ | 1375 | /* Get node address wide */ |
| 1040 | cell = of_get_property(dev->node, "#address-cells", NULL); | 1376 | cell = of_get_property(dev->dev.of_node, "#address-cells", NULL); |
| 1041 | if (cell) | 1377 | if (cell) |
| 1042 | aw = *cell; | 1378 | aw = *cell; |
| 1043 | else | 1379 | else |
| 1044 | aw = of_n_addr_cells(dev->node); | 1380 | aw = of_n_addr_cells(dev->dev.of_node); |
| 1045 | /* Get node size wide */ | 1381 | /* Get node size wide */ |
| 1046 | cell = of_get_property(dev->node, "#size-cells", NULL); | 1382 | cell = of_get_property(dev->dev.of_node, "#size-cells", NULL); |
| 1047 | if (cell) | 1383 | if (cell) |
| 1048 | sw = *cell; | 1384 | sw = *cell; |
| 1049 | else | 1385 | else |
| 1050 | sw = of_n_size_cells(dev->node); | 1386 | sw = of_n_size_cells(dev->dev.of_node); |
| 1051 | /* Get parent address wide wide */ | 1387 | /* Get parent address wide wide */ |
| 1052 | paw = of_n_addr_cells(dev->node); | 1388 | paw = of_n_addr_cells(dev->dev.of_node); |
| 1053 | 1389 | ||
| 1054 | law_start = of_read_number(dt_range + aw, paw); | 1390 | law_start = of_read_number(dt_range + aw, paw); |
| 1055 | law_size = of_read_number(dt_range + aw + paw, sw); | 1391 | law_size = of_read_number(dt_range + aw + paw, sw); |
| @@ -1057,7 +1393,7 @@ int fsl_rio_setup(struct of_device *dev) | |||
| 1057 | dev_info(&dev->dev, "LAW start 0x%016llx, size 0x%016llx.\n", | 1393 | dev_info(&dev->dev, "LAW start 0x%016llx, size 0x%016llx.\n", |
| 1058 | law_start, law_size); | 1394 | law_start, law_size); |
| 1059 | 1395 | ||
| 1060 | ops = kmalloc(sizeof(struct rio_ops), GFP_KERNEL); | 1396 | ops = kzalloc(sizeof(struct rio_ops), GFP_KERNEL); |
| 1061 | if (!ops) { | 1397 | if (!ops) { |
| 1062 | rc = -ENOMEM; | 1398 | rc = -ENOMEM; |
| 1063 | goto err_ops; | 1399 | goto err_ops; |
| @@ -1067,6 +1403,7 @@ int fsl_rio_setup(struct of_device *dev) | |||
| 1067 | ops->cread = fsl_rio_config_read; | 1403 | ops->cread = fsl_rio_config_read; |
| 1068 | ops->cwrite = fsl_rio_config_write; | 1404 | ops->cwrite = fsl_rio_config_write; |
| 1069 | ops->dsend = fsl_rio_doorbell_send; | 1405 | ops->dsend = fsl_rio_doorbell_send; |
| 1406 | ops->pwenable = fsl_rio_pw_enable; | ||
| 1070 | 1407 | ||
| 1071 | port = kzalloc(sizeof(struct rio_mport), GFP_KERNEL); | 1408 | port = kzalloc(sizeof(struct rio_mport), GFP_KERNEL); |
| 1072 | if (!port) { | 1409 | if (!port) { |
| @@ -1089,11 +1426,12 @@ int fsl_rio_setup(struct of_device *dev) | |||
| 1089 | port->iores.flags = IORESOURCE_MEM; | 1426 | port->iores.flags = IORESOURCE_MEM; |
| 1090 | port->iores.name = "rio_io_win"; | 1427 | port->iores.name = "rio_io_win"; |
| 1091 | 1428 | ||
| 1092 | priv->bellirq = irq_of_parse_and_map(dev->node, 2); | 1429 | priv->pwirq = irq_of_parse_and_map(dev->dev.of_node, 0); |
| 1093 | priv->txirq = irq_of_parse_and_map(dev->node, 3); | 1430 | priv->bellirq = irq_of_parse_and_map(dev->dev.of_node, 2); |
| 1094 | priv->rxirq = irq_of_parse_and_map(dev->node, 4); | 1431 | priv->txirq = irq_of_parse_and_map(dev->dev.of_node, 3); |
| 1095 | dev_info(&dev->dev, "bellirq: %d, txirq: %d, rxirq %d\n", priv->bellirq, | 1432 | priv->rxirq = irq_of_parse_and_map(dev->dev.of_node, 4); |
| 1096 | priv->txirq, priv->rxirq); | 1433 | dev_info(&dev->dev, "pwirq: %d, bellirq: %d, txirq: %d, rxirq %d\n", |
| 1434 | priv->pwirq, priv->bellirq, priv->txirq, priv->rxirq); | ||
| 1097 | 1435 | ||
| 1098 | rio_init_dbell_res(&port->riores[RIO_DOORBELL_RESOURCE], 0, 0xffff); | 1436 | rio_init_dbell_res(&port->riores[RIO_DOORBELL_RESOURCE], 0, 0xffff); |
| 1099 | rio_init_mbox_res(&port->riores[RIO_INB_MBOX_RESOURCE], 0, 0); | 1437 | rio_init_mbox_res(&port->riores[RIO_INB_MBOX_RESOURCE], 0, 0); |
| @@ -1109,6 +1447,7 @@ int fsl_rio_setup(struct of_device *dev) | |||
| 1109 | rio_register_mport(port); | 1447 | rio_register_mport(port); |
| 1110 | 1448 | ||
| 1111 | priv->regs_win = ioremap(regs.start, regs.end - regs.start + 1); | 1449 | priv->regs_win = ioremap(regs.start, regs.end - regs.start + 1); |
| 1450 | rio_regs_win = priv->regs_win; | ||
| 1112 | 1451 | ||
| 1113 | /* Probe the master port phy type */ | 1452 | /* Probe the master port phy type */ |
| 1114 | ccsr = in_be32(priv->regs_win + RIO_CCSR); | 1453 | ccsr = in_be32(priv->regs_win + RIO_CCSR); |
| @@ -1166,7 +1505,8 @@ int fsl_rio_setup(struct of_device *dev) | |||
| 1166 | 1505 | ||
| 1167 | /* Configure maintenance transaction window */ | 1506 | /* Configure maintenance transaction window */ |
| 1168 | out_be32(&priv->maint_atmu_regs->rowbar, law_start >> 12); | 1507 | out_be32(&priv->maint_atmu_regs->rowbar, law_start >> 12); |
| 1169 | out_be32(&priv->maint_atmu_regs->rowar, 0x80077015); /* 4M */ | 1508 | out_be32(&priv->maint_atmu_regs->rowar, |
| 1509 | 0x80077000 | (ilog2(RIO_MAINT_WIN_SIZE) - 1)); | ||
| 1170 | 1510 | ||
| 1171 | priv->maint_win = ioremap(law_start, RIO_MAINT_WIN_SIZE); | 1511 | priv->maint_win = ioremap(law_start, RIO_MAINT_WIN_SIZE); |
| 1172 | 1512 | ||
| @@ -1175,6 +1515,12 @@ int fsl_rio_setup(struct of_device *dev) | |||
| 1175 | (law_start + RIO_MAINT_WIN_SIZE) >> 12); | 1515 | (law_start + RIO_MAINT_WIN_SIZE) >> 12); |
| 1176 | out_be32(&priv->dbell_atmu_regs->rowar, 0x8004200b); /* 4k */ | 1516 | out_be32(&priv->dbell_atmu_regs->rowar, 0x8004200b); /* 4k */ |
| 1177 | fsl_rio_doorbell_init(port); | 1517 | fsl_rio_doorbell_init(port); |
| 1518 | fsl_rio_port_write_init(port); | ||
| 1519 | |||
| 1520 | saved_mcheck_exception = ppc_md.machine_check_exception; | ||
| 1521 | ppc_md.machine_check_exception = fsl_rio_mcheck_exception; | ||
| 1522 | /* Ensure that RFXE is set */ | ||
| 1523 | mtspr(SPRN_HID1, (mfspr(SPRN_HID1) | 0x20000)); | ||
| 1178 | 1524 | ||
| 1179 | return 0; | 1525 | return 0; |
| 1180 | err: | 1526 | err: |
| @@ -1195,7 +1541,7 @@ static int __devinit fsl_of_rio_rpn_probe(struct of_device *dev, | |||
| 1195 | { | 1541 | { |
| 1196 | int rc; | 1542 | int rc; |
| 1197 | printk(KERN_INFO "Setting up RapidIO peer-to-peer network %s\n", | 1543 | printk(KERN_INFO "Setting up RapidIO peer-to-peer network %s\n", |
| 1198 | dev->node->full_name); | 1544 | dev->dev.of_node->full_name); |
| 1199 | 1545 | ||
| 1200 | rc = fsl_rio_setup(dev); | 1546 | rc = fsl_rio_setup(dev); |
| 1201 | if (rc) | 1547 | if (rc) |
| @@ -1215,8 +1561,11 @@ static const struct of_device_id fsl_of_rio_rpn_ids[] = { | |||
| 1215 | }; | 1561 | }; |
| 1216 | 1562 | ||
| 1217 | static struct of_platform_driver fsl_of_rio_rpn_driver = { | 1563 | static struct of_platform_driver fsl_of_rio_rpn_driver = { |
| 1218 | .name = "fsl-of-rio", | 1564 | .driver = { |
| 1219 | .match_table = fsl_of_rio_rpn_ids, | 1565 | .name = "fsl-of-rio", |
| 1566 | .owner = THIS_MODULE, | ||
| 1567 | .of_match_table = fsl_of_rio_rpn_ids, | ||
| 1568 | }, | ||
| 1220 | .probe = fsl_of_rio_rpn_probe, | 1569 | .probe = fsl_of_rio_rpn_probe, |
| 1221 | }; | 1570 | }; |
| 1222 | 1571 | ||
diff --git a/arch/powerpc/sysdev/pmi.c b/arch/powerpc/sysdev/pmi.c index 652652db4ce2..d07137a07d75 100644 --- a/arch/powerpc/sysdev/pmi.c +++ b/arch/powerpc/sysdev/pmi.c | |||
| @@ -124,7 +124,7 @@ static void pmi_notify_handlers(struct work_struct *work) | |||
| 124 | static int pmi_of_probe(struct of_device *dev, | 124 | static int pmi_of_probe(struct of_device *dev, |
| 125 | const struct of_device_id *match) | 125 | const struct of_device_id *match) |
| 126 | { | 126 | { |
| 127 | struct device_node *np = dev->node; | 127 | struct device_node *np = dev->dev.of_node; |
| 128 | int rc; | 128 | int rc; |
| 129 | 129 | ||
| 130 | if (data) { | 130 | if (data) { |
| @@ -206,11 +206,12 @@ static int pmi_of_remove(struct of_device *dev) | |||
| 206 | } | 206 | } |
| 207 | 207 | ||
| 208 | static struct of_platform_driver pmi_of_platform_driver = { | 208 | static struct of_platform_driver pmi_of_platform_driver = { |
| 209 | .match_table = pmi_match, | ||
| 210 | .probe = pmi_of_probe, | 209 | .probe = pmi_of_probe, |
| 211 | .remove = pmi_of_remove, | 210 | .remove = pmi_of_remove, |
| 212 | .driver = { | 211 | .driver = { |
| 213 | .name = "pmi", | 212 | .name = "pmi", |
| 213 | .owner = THIS_MODULE, | ||
| 214 | .of_match_table = pmi_match, | ||
| 214 | }, | 215 | }, |
| 215 | }; | 216 | }; |
| 216 | 217 | ||
diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c index 106d767bf65b..156aa7d36258 100644 --- a/arch/powerpc/sysdev/ppc4xx_pci.c +++ b/arch/powerpc/sysdev/ppc4xx_pci.c | |||
| @@ -974,6 +974,123 @@ static struct ppc4xx_pciex_hwops ppc460ex_pcie_hwops __initdata = | |||
| 974 | .setup_utl = ppc460ex_pciex_init_utl, | 974 | .setup_utl = ppc460ex_pciex_init_utl, |
| 975 | }; | 975 | }; |
| 976 | 976 | ||
| 977 | static int __init ppc460sx_pciex_core_init(struct device_node *np) | ||
| 978 | { | ||
| 979 | /* HSS drive amplitude */ | ||
| 980 | mtdcri(SDR0, PESDR0_460SX_HSSL0DAMP, 0xB9843211); | ||
| 981 | mtdcri(SDR0, PESDR0_460SX_HSSL1DAMP, 0xB9843211); | ||
| 982 | mtdcri(SDR0, PESDR0_460SX_HSSL2DAMP, 0xB9843211); | ||
| 983 | mtdcri(SDR0, PESDR0_460SX_HSSL3DAMP, 0xB9843211); | ||
| 984 | mtdcri(SDR0, PESDR0_460SX_HSSL4DAMP, 0xB9843211); | ||
| 985 | mtdcri(SDR0, PESDR0_460SX_HSSL5DAMP, 0xB9843211); | ||
| 986 | mtdcri(SDR0, PESDR0_460SX_HSSL6DAMP, 0xB9843211); | ||
| 987 | mtdcri(SDR0, PESDR0_460SX_HSSL7DAMP, 0xB9843211); | ||
| 988 | |||
| 989 | mtdcri(SDR0, PESDR1_460SX_HSSL0DAMP, 0xB9843211); | ||
| 990 | mtdcri(SDR0, PESDR1_460SX_HSSL1DAMP, 0xB9843211); | ||
| 991 | mtdcri(SDR0, PESDR1_460SX_HSSL2DAMP, 0xB9843211); | ||
| 992 | mtdcri(SDR0, PESDR1_460SX_HSSL3DAMP, 0xB9843211); | ||
| 993 | |||
| 994 | mtdcri(SDR0, PESDR2_460SX_HSSL0DAMP, 0xB9843211); | ||
| 995 | mtdcri(SDR0, PESDR2_460SX_HSSL1DAMP, 0xB9843211); | ||
| 996 | mtdcri(SDR0, PESDR2_460SX_HSSL2DAMP, 0xB9843211); | ||
| 997 | mtdcri(SDR0, PESDR2_460SX_HSSL3DAMP, 0xB9843211); | ||
| 998 | |||
| 999 | /* HSS TX pre-emphasis */ | ||
| 1000 | mtdcri(SDR0, PESDR0_460SX_HSSL0COEFA, 0xDCB98987); | ||
| 1001 | mtdcri(SDR0, PESDR0_460SX_HSSL1COEFA, 0xDCB98987); | ||
| 1002 | mtdcri(SDR0, PESDR0_460SX_HSSL2COEFA, 0xDCB98987); | ||
| 1003 | mtdcri(SDR0, PESDR0_460SX_HSSL3COEFA, 0xDCB98987); | ||
| 1004 | mtdcri(SDR0, PESDR0_460SX_HSSL4COEFA, 0xDCB98987); | ||
| 1005 | mtdcri(SDR0, PESDR0_460SX_HSSL5COEFA, 0xDCB98987); | ||
| 1006 | mtdcri(SDR0, PESDR0_460SX_HSSL6COEFA, 0xDCB98987); | ||
| 1007 | mtdcri(SDR0, PESDR0_460SX_HSSL7COEFA, 0xDCB98987); | ||
| 1008 | |||
| 1009 | mtdcri(SDR0, PESDR1_460SX_HSSL0COEFA, 0xDCB98987); | ||
| 1010 | mtdcri(SDR0, PESDR1_460SX_HSSL1COEFA, 0xDCB98987); | ||
| 1011 | mtdcri(SDR0, PESDR1_460SX_HSSL2COEFA, 0xDCB98987); | ||
| 1012 | mtdcri(SDR0, PESDR1_460SX_HSSL3COEFA, 0xDCB98987); | ||
| 1013 | |||
| 1014 | mtdcri(SDR0, PESDR2_460SX_HSSL0COEFA, 0xDCB98987); | ||
| 1015 | mtdcri(SDR0, PESDR2_460SX_HSSL1COEFA, 0xDCB98987); | ||
| 1016 | mtdcri(SDR0, PESDR2_460SX_HSSL2COEFA, 0xDCB98987); | ||
| 1017 | mtdcri(SDR0, PESDR2_460SX_HSSL3COEFA, 0xDCB98987); | ||
| 1018 | |||
| 1019 | /* HSS TX calibration control */ | ||
| 1020 | mtdcri(SDR0, PESDR0_460SX_HSSL1CALDRV, 0x22222222); | ||
| 1021 | mtdcri(SDR0, PESDR1_460SX_HSSL1CALDRV, 0x22220000); | ||
| 1022 | mtdcri(SDR0, PESDR2_460SX_HSSL1CALDRV, 0x22220000); | ||
| 1023 | |||
| 1024 | /* HSS TX slew control */ | ||
| 1025 | mtdcri(SDR0, PESDR0_460SX_HSSSLEW, 0xFFFFFFFF); | ||
| 1026 | mtdcri(SDR0, PESDR1_460SX_HSSSLEW, 0xFFFF0000); | ||
| 1027 | mtdcri(SDR0, PESDR2_460SX_HSSSLEW, 0xFFFF0000); | ||
| 1028 | |||
| 1029 | udelay(100); | ||
| 1030 | |||
| 1031 | /* De-assert PLLRESET */ | ||
| 1032 | dcri_clrset(SDR0, PESDR0_PLLLCT2, 0x00000100, 0); | ||
| 1033 | |||
| 1034 | /* Reset DL, UTL, GPL before configuration */ | ||
| 1035 | mtdcri(SDR0, PESDR0_460SX_RCSSET, | ||
| 1036 | PESDRx_RCSSET_RSTDL | PESDRx_RCSSET_RSTGU); | ||
| 1037 | mtdcri(SDR0, PESDR1_460SX_RCSSET, | ||
| 1038 | PESDRx_RCSSET_RSTDL | PESDRx_RCSSET_RSTGU); | ||
| 1039 | mtdcri(SDR0, PESDR2_460SX_RCSSET, | ||
| 1040 | PESDRx_RCSSET_RSTDL | PESDRx_RCSSET_RSTGU); | ||
| 1041 | |||
| 1042 | udelay(100); | ||
| 1043 | |||
| 1044 | /* | ||
| 1045 | * If bifurcation is not enabled, u-boot would have disabled the | ||
| 1046 | * third PCIe port | ||
| 1047 | */ | ||
| 1048 | if (((mfdcri(SDR0, PESDR1_460SX_HSSCTLSET) & 0x00000001) == | ||
| 1049 | 0x00000001)) { | ||
| 1050 | printk(KERN_INFO "PCI: PCIE bifurcation setup successfully.\n"); | ||
| 1051 | printk(KERN_INFO "PCI: Total 3 PCIE ports are present\n"); | ||
| 1052 | return 3; | ||
| 1053 | } | ||
| 1054 | |||
| 1055 | printk(KERN_INFO "PCI: Total 2 PCIE ports are present\n"); | ||
| 1056 | return 2; | ||
| 1057 | } | ||
| 1058 | |||
| 1059 | static int ppc460sx_pciex_init_port_hw(struct ppc4xx_pciex_port *port) | ||
| 1060 | { | ||
| 1061 | |||
| 1062 | if (port->endpoint) | ||
| 1063 | dcri_clrset(SDR0, port->sdr_base + PESDRn_UTLSET2, | ||
| 1064 | 0x01000000, 0); | ||
| 1065 | else | ||
| 1066 | dcri_clrset(SDR0, port->sdr_base + PESDRn_UTLSET2, | ||
| 1067 | 0, 0x01000000); | ||
| 1068 | |||
| 1069 | /*Gen-1*/ | ||
| 1070 | mtdcri(SDR0, port->sdr_base + PESDRn_460SX_RCEI, 0x08000000); | ||
| 1071 | |||
| 1072 | dcri_clrset(SDR0, port->sdr_base + PESDRn_RCSSET, | ||
| 1073 | (PESDRx_RCSSET_RSTGU | PESDRx_RCSSET_RSTDL), | ||
| 1074 | PESDRx_RCSSET_RSTPYN); | ||
| 1075 | |||
| 1076 | port->has_ibpre = 1; | ||
| 1077 | |||
| 1078 | return 0; | ||
| 1079 | } | ||
| 1080 | |||
| 1081 | static int ppc460sx_pciex_init_utl(struct ppc4xx_pciex_port *port) | ||
| 1082 | { | ||
| 1083 | /* Max 128 Bytes */ | ||
| 1084 | out_be32 (port->utl_base + PEUTL_PBBSZ, 0x00000000); | ||
| 1085 | return 0; | ||
| 1086 | } | ||
| 1087 | |||
| 1088 | static struct ppc4xx_pciex_hwops ppc460sx_pcie_hwops __initdata = { | ||
| 1089 | .core_init = ppc460sx_pciex_core_init, | ||
| 1090 | .port_init_hw = ppc460sx_pciex_init_port_hw, | ||
| 1091 | .setup_utl = ppc460sx_pciex_init_utl, | ||
| 1092 | }; | ||
| 1093 | |||
| 977 | #endif /* CONFIG_44x */ | 1094 | #endif /* CONFIG_44x */ |
| 978 | 1095 | ||
| 979 | #ifdef CONFIG_40x | 1096 | #ifdef CONFIG_40x |
| @@ -1089,6 +1206,8 @@ static int __init ppc4xx_pciex_check_core_init(struct device_node *np) | |||
| 1089 | } | 1206 | } |
| 1090 | if (of_device_is_compatible(np, "ibm,plb-pciex-460ex")) | 1207 | if (of_device_is_compatible(np, "ibm,plb-pciex-460ex")) |
| 1091 | ppc4xx_pciex_hwops = &ppc460ex_pcie_hwops; | 1208 | ppc4xx_pciex_hwops = &ppc460ex_pcie_hwops; |
| 1209 | if (of_device_is_compatible(np, "ibm,plb-pciex-460sx")) | ||
| 1210 | ppc4xx_pciex_hwops = &ppc460sx_pcie_hwops; | ||
| 1092 | #endif /* CONFIG_44x */ | 1211 | #endif /* CONFIG_44x */ |
| 1093 | #ifdef CONFIG_40x | 1212 | #ifdef CONFIG_40x |
| 1094 | if (of_device_is_compatible(np, "ibm,plb-pciex-405ex")) | 1213 | if (of_device_is_compatible(np, "ibm,plb-pciex-405ex")) |
diff --git a/arch/powerpc/sysdev/ppc4xx_pci.h b/arch/powerpc/sysdev/ppc4xx_pci.h index d04e40b306fb..56d9e5deccbf 100644 --- a/arch/powerpc/sysdev/ppc4xx_pci.h +++ b/arch/powerpc/sysdev/ppc4xx_pci.h | |||
| @@ -324,6 +324,64 @@ | |||
| 324 | #define PESDR0_460EX_IHS2 0x036D | 324 | #define PESDR0_460EX_IHS2 0x036D |
| 325 | 325 | ||
| 326 | /* | 326 | /* |
| 327 | * 460SX addtional DCRs | ||
| 328 | */ | ||
| 329 | #define PESDRn_460SX_RCEI 0x02 | ||
| 330 | |||
| 331 | #define PESDR0_460SX_HSSL0DAMP 0x320 | ||
| 332 | #define PESDR0_460SX_HSSL1DAMP 0x321 | ||
| 333 | #define PESDR0_460SX_HSSL2DAMP 0x322 | ||
| 334 | #define PESDR0_460SX_HSSL3DAMP 0x323 | ||
| 335 | #define PESDR0_460SX_HSSL4DAMP 0x324 | ||
| 336 | #define PESDR0_460SX_HSSL5DAMP 0x325 | ||
| 337 | #define PESDR0_460SX_HSSL6DAMP 0x326 | ||
| 338 | #define PESDR0_460SX_HSSL7DAMP 0x327 | ||
| 339 | |||
| 340 | #define PESDR1_460SX_HSSL0DAMP 0x354 | ||
| 341 | #define PESDR1_460SX_HSSL1DAMP 0x355 | ||
| 342 | #define PESDR1_460SX_HSSL2DAMP 0x356 | ||
| 343 | #define PESDR1_460SX_HSSL3DAMP 0x357 | ||
| 344 | |||
| 345 | #define PESDR2_460SX_HSSL0DAMP 0x384 | ||
| 346 | #define PESDR2_460SX_HSSL1DAMP 0x385 | ||
| 347 | #define PESDR2_460SX_HSSL2DAMP 0x386 | ||
| 348 | #define PESDR2_460SX_HSSL3DAMP 0x387 | ||
| 349 | |||
| 350 | #define PESDR0_460SX_HSSL0COEFA 0x328 | ||
| 351 | #define PESDR0_460SX_HSSL1COEFA 0x329 | ||
| 352 | #define PESDR0_460SX_HSSL2COEFA 0x32A | ||
| 353 | #define PESDR0_460SX_HSSL3COEFA 0x32B | ||
| 354 | #define PESDR0_460SX_HSSL4COEFA 0x32C | ||
| 355 | #define PESDR0_460SX_HSSL5COEFA 0x32D | ||
| 356 | #define PESDR0_460SX_HSSL6COEFA 0x32E | ||
| 357 | #define PESDR0_460SX_HSSL7COEFA 0x32F | ||
| 358 | |||
| 359 | #define PESDR1_460SX_HSSL0COEFA 0x358 | ||
| 360 | #define PESDR1_460SX_HSSL1COEFA 0x359 | ||
| 361 | #define PESDR1_460SX_HSSL2COEFA 0x35A | ||
| 362 | #define PESDR1_460SX_HSSL3COEFA 0x35B | ||
| 363 | |||
| 364 | #define PESDR2_460SX_HSSL0COEFA 0x388 | ||
| 365 | #define PESDR2_460SX_HSSL1COEFA 0x389 | ||
| 366 | #define PESDR2_460SX_HSSL2COEFA 0x38A | ||
| 367 | #define PESDR2_460SX_HSSL3COEFA 0x38B | ||
| 368 | |||
| 369 | #define PESDR0_460SX_HSSL1CALDRV 0x339 | ||
| 370 | #define PESDR1_460SX_HSSL1CALDRV 0x361 | ||
| 371 | #define PESDR2_460SX_HSSL1CALDRV 0x391 | ||
| 372 | |||
| 373 | #define PESDR0_460SX_HSSSLEW 0x338 | ||
| 374 | #define PESDR1_460SX_HSSSLEW 0x360 | ||
| 375 | #define PESDR2_460SX_HSSSLEW 0x390 | ||
| 376 | |||
| 377 | #define PESDR0_460SX_HSSCTLSET 0x31E | ||
| 378 | #define PESDR1_460SX_HSSCTLSET 0x352 | ||
| 379 | #define PESDR2_460SX_HSSCTLSET 0x382 | ||
| 380 | |||
| 381 | #define PESDR0_460SX_RCSSET 0x304 | ||
| 382 | #define PESDR1_460SX_RCSSET 0x344 | ||
| 383 | #define PESDR2_460SX_RCSSET 0x374 | ||
| 384 | /* | ||
| 327 | * Of the above, some are common offsets from the base | 385 | * Of the above, some are common offsets from the base |
| 328 | */ | 386 | */ |
| 329 | #define PESDRn_UTLSET1 0x00 | 387 | #define PESDRn_UTLSET1 0x00 |
diff --git a/arch/powerpc/sysdev/qe_lib/qe.c b/arch/powerpc/sysdev/qe_lib/qe.c index 149393c02c3f..093e0ae1a941 100644 --- a/arch/powerpc/sysdev/qe_lib/qe.c +++ b/arch/powerpc/sysdev/qe_lib/qe.c | |||
| @@ -669,8 +669,11 @@ static const struct of_device_id qe_ids[] = { | |||
| 669 | }; | 669 | }; |
| 670 | 670 | ||
| 671 | static struct of_platform_driver qe_driver = { | 671 | static struct of_platform_driver qe_driver = { |
| 672 | .driver.name = "fsl-qe", | 672 | .driver = { |
| 673 | .match_table = qe_ids, | 673 | .name = "fsl-qe", |
| 674 | .owner = THIS_MODULE, | ||
| 675 | .of_match_table = qe_ids, | ||
| 676 | }, | ||
| 674 | .probe = qe_probe, | 677 | .probe = qe_probe, |
| 675 | .resume = qe_resume, | 678 | .resume = qe_resume, |
| 676 | }; | 679 | }; |
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig index 79d0ca086820..bee1c0f794cf 100644 --- a/arch/s390/Kconfig +++ b/arch/s390/Kconfig | |||
| @@ -102,6 +102,7 @@ config S390 | |||
| 102 | select HAVE_KERNEL_GZIP | 102 | select HAVE_KERNEL_GZIP |
| 103 | select HAVE_KERNEL_BZIP2 | 103 | select HAVE_KERNEL_BZIP2 |
| 104 | select HAVE_KERNEL_LZMA | 104 | select HAVE_KERNEL_LZMA |
| 105 | select HAVE_KERNEL_LZO | ||
| 105 | select ARCH_INLINE_SPIN_TRYLOCK | 106 | select ARCH_INLINE_SPIN_TRYLOCK |
| 106 | select ARCH_INLINE_SPIN_TRYLOCK_BH | 107 | select ARCH_INLINE_SPIN_TRYLOCK_BH |
| 107 | select ARCH_INLINE_SPIN_LOCK | 108 | select ARCH_INLINE_SPIN_LOCK |
| @@ -479,13 +480,6 @@ config CMM | |||
| 479 | Everybody who wants to run Linux under VM should select this | 480 | Everybody who wants to run Linux under VM should select this |
| 480 | option. | 481 | option. |
| 481 | 482 | ||
| 482 | config CMM_PROC | ||
| 483 | bool "/proc interface to cooperative memory management" | ||
| 484 | depends on CMM | ||
| 485 | help | ||
| 486 | Select this option to enable the /proc interface to the | ||
| 487 | cooperative memory management. | ||
| 488 | |||
| 489 | config CMM_IUCV | 483 | config CMM_IUCV |
| 490 | bool "IUCV special message interface to cooperative memory management" | 484 | bool "IUCV special message interface to cooperative memory management" |
| 491 | depends on CMM && (SMSGIUCV=y || CMM=SMSGIUCV) | 485 | depends on CMM && (SMSGIUCV=y || CMM=SMSGIUCV) |
diff --git a/arch/s390/appldata/appldata_os.c b/arch/s390/appldata/appldata_os.c index 55c80ffd42b9..92f1cb745d69 100644 --- a/arch/s390/appldata/appldata_os.c +++ b/arch/s390/appldata/appldata_os.c | |||
| @@ -181,7 +181,7 @@ static int __init appldata_os_init(void) | |||
| 181 | goto out; | 181 | goto out; |
| 182 | } | 182 | } |
| 183 | 183 | ||
| 184 | appldata_os_data = kzalloc(max_size, GFP_DMA); | 184 | appldata_os_data = kzalloc(max_size, GFP_KERNEL | GFP_DMA); |
| 185 | if (appldata_os_data == NULL) { | 185 | if (appldata_os_data == NULL) { |
| 186 | rc = -ENOMEM; | 186 | rc = -ENOMEM; |
| 187 | goto out; | 187 | goto out; |
diff --git a/arch/s390/boot/compressed/Makefile b/arch/s390/boot/compressed/Makefile index 6e4a67ad07e1..1c999f726a58 100644 --- a/arch/s390/boot/compressed/Makefile +++ b/arch/s390/boot/compressed/Makefile | |||
| @@ -7,7 +7,7 @@ | |||
| 7 | BITS := $(if $(CONFIG_64BIT),64,31) | 7 | BITS := $(if $(CONFIG_64BIT),64,31) |
| 8 | 8 | ||
| 9 | targets := vmlinux.lds vmlinux vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 \ | 9 | targets := vmlinux.lds vmlinux vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 \ |
| 10 | vmlinux.bin.lzma misc.o piggy.o sizes.h head$(BITS).o | 10 | vmlinux.bin.lzma vmlinux.bin.lzo misc.o piggy.o sizes.h head$(BITS).o |
| 11 | 11 | ||
| 12 | KBUILD_CFLAGS := -m$(BITS) -D__KERNEL__ $(LINUX_INCLUDE) -O2 | 12 | KBUILD_CFLAGS := -m$(BITS) -D__KERNEL__ $(LINUX_INCLUDE) -O2 |
| 13 | KBUILD_CFLAGS += $(cflags-y) | 13 | KBUILD_CFLAGS += $(cflags-y) |
| @@ -47,6 +47,7 @@ vmlinux.bin.all-y := $(obj)/vmlinux.bin | |||
| 47 | suffix-$(CONFIG_KERNEL_GZIP) := gz | 47 | suffix-$(CONFIG_KERNEL_GZIP) := gz |
| 48 | suffix-$(CONFIG_KERNEL_BZIP2) := bz2 | 48 | suffix-$(CONFIG_KERNEL_BZIP2) := bz2 |
| 49 | suffix-$(CONFIG_KERNEL_LZMA) := lzma | 49 | suffix-$(CONFIG_KERNEL_LZMA) := lzma |
| 50 | suffix-$(CONFIG_KERNEL_LZO) := lzo | ||
| 50 | 51 | ||
| 51 | $(obj)/vmlinux.bin.gz: $(vmlinux.bin.all-y) | 52 | $(obj)/vmlinux.bin.gz: $(vmlinux.bin.all-y) |
| 52 | $(call if_changed,gzip) | 53 | $(call if_changed,gzip) |
| @@ -54,6 +55,8 @@ $(obj)/vmlinux.bin.bz2: $(vmlinux.bin.all-y) | |||
| 54 | $(call if_changed,bzip2) | 55 | $(call if_changed,bzip2) |
| 55 | $(obj)/vmlinux.bin.lzma: $(vmlinux.bin.all-y) | 56 | $(obj)/vmlinux.bin.lzma: $(vmlinux.bin.all-y) |
| 56 | $(call if_changed,lzma) | 57 | $(call if_changed,lzma) |
| 58 | $(obj)/vmlinux.bin.lzo: $(vmlinux.bin.all-y) | ||
| 59 | $(call if_changed,lzo) | ||
| 57 | 60 | ||
| 58 | LDFLAGS_piggy.o := -r --format binary --oformat $(LD_BFD) -T | 61 | LDFLAGS_piggy.o := -r --format binary --oformat $(LD_BFD) -T |
| 59 | $(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.$(suffix-y) | 62 | $(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.$(suffix-y) |
diff --git a/arch/s390/boot/compressed/misc.c b/arch/s390/boot/compressed/misc.c index 14e0479d3888..0851eb1e919e 100644 --- a/arch/s390/boot/compressed/misc.c +++ b/arch/s390/boot/compressed/misc.c | |||
| @@ -50,6 +50,10 @@ static unsigned long free_mem_end_ptr; | |||
| 50 | #include "../../../../lib/decompress_unlzma.c" | 50 | #include "../../../../lib/decompress_unlzma.c" |
| 51 | #endif | 51 | #endif |
| 52 | 52 | ||
| 53 | #ifdef CONFIG_KERNEL_LZO | ||
| 54 | #include "../../../../lib/decompress_unlzo.c" | ||
| 55 | #endif | ||
| 56 | |||
| 53 | extern _sclp_print_early(const char *); | 57 | extern _sclp_print_early(const char *); |
| 54 | 58 | ||
| 55 | int puts(const char *s) | 59 | int puts(const char *s) |
diff --git a/arch/s390/defconfig b/arch/s390/defconfig index bcd6884985ad..253f158db668 100644 --- a/arch/s390/defconfig +++ b/arch/s390/defconfig | |||
| @@ -1,7 +1,7 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.34-rc3 | 3 | # Linux kernel version: 2.6.35-rc1 |
| 4 | # Fri Apr 9 09:57:10 2010 | 4 | # Fri Jun 4 11:32:40 2010 |
| 5 | # | 5 | # |
| 6 | CONFIG_SCHED_MC=y | 6 | CONFIG_SCHED_MC=y |
| 7 | CONFIG_MMU=y | 7 | CONFIG_MMU=y |
| @@ -35,11 +35,13 @@ CONFIG_CONSTRUCTORS=y | |||
| 35 | CONFIG_EXPERIMENTAL=y | 35 | CONFIG_EXPERIMENTAL=y |
| 36 | CONFIG_LOCK_KERNEL=y | 36 | CONFIG_LOCK_KERNEL=y |
| 37 | CONFIG_INIT_ENV_ARG_LIMIT=32 | 37 | CONFIG_INIT_ENV_ARG_LIMIT=32 |
| 38 | CONFIG_CROSS_COMPILE="" | ||
| 38 | CONFIG_LOCALVERSION="" | 39 | CONFIG_LOCALVERSION="" |
| 39 | CONFIG_LOCALVERSION_AUTO=y | 40 | CONFIG_LOCALVERSION_AUTO=y |
| 40 | CONFIG_HAVE_KERNEL_GZIP=y | 41 | CONFIG_HAVE_KERNEL_GZIP=y |
| 41 | CONFIG_HAVE_KERNEL_BZIP2=y | 42 | CONFIG_HAVE_KERNEL_BZIP2=y |
| 42 | CONFIG_HAVE_KERNEL_LZMA=y | 43 | CONFIG_HAVE_KERNEL_LZMA=y |
| 44 | CONFIG_HAVE_KERNEL_LZO=y | ||
| 43 | CONFIG_KERNEL_GZIP=y | 45 | CONFIG_KERNEL_GZIP=y |
| 44 | # CONFIG_KERNEL_BZIP2 is not set | 46 | # CONFIG_KERNEL_BZIP2 is not set |
| 45 | # CONFIG_KERNEL_LZMA is not set | 47 | # CONFIG_KERNEL_LZMA is not set |
| @@ -77,6 +79,7 @@ CONFIG_CGROUP_NS=y | |||
| 77 | # CONFIG_CGROUP_CPUACCT is not set | 79 | # CONFIG_CGROUP_CPUACCT is not set |
| 78 | # CONFIG_RESOURCE_COUNTERS is not set | 80 | # CONFIG_RESOURCE_COUNTERS is not set |
| 79 | # CONFIG_CGROUP_SCHED is not set | 81 | # CONFIG_CGROUP_SCHED is not set |
| 82 | # CONFIG_BLK_CGROUP is not set | ||
| 80 | CONFIG_SYSFS_DEPRECATED=y | 83 | CONFIG_SYSFS_DEPRECATED=y |
| 81 | CONFIG_SYSFS_DEPRECATED_V2=y | 84 | CONFIG_SYSFS_DEPRECATED_V2=y |
| 82 | # CONFIG_RELAY is not set | 85 | # CONFIG_RELAY is not set |
| @@ -157,7 +160,6 @@ CONFIG_STOP_MACHINE=y | |||
| 157 | CONFIG_BLOCK=y | 160 | CONFIG_BLOCK=y |
| 158 | CONFIG_BLK_DEV_BSG=y | 161 | CONFIG_BLK_DEV_BSG=y |
| 159 | # CONFIG_BLK_DEV_INTEGRITY is not set | 162 | # CONFIG_BLK_DEV_INTEGRITY is not set |
| 160 | # CONFIG_BLK_CGROUP is not set | ||
| 161 | CONFIG_BLOCK_COMPAT=y | 163 | CONFIG_BLOCK_COMPAT=y |
| 162 | 164 | ||
| 163 | # | 165 | # |
| @@ -166,7 +168,6 @@ CONFIG_BLOCK_COMPAT=y | |||
| 166 | CONFIG_IOSCHED_NOOP=y | 168 | CONFIG_IOSCHED_NOOP=y |
| 167 | CONFIG_IOSCHED_DEADLINE=y | 169 | CONFIG_IOSCHED_DEADLINE=y |
| 168 | CONFIG_IOSCHED_CFQ=y | 170 | CONFIG_IOSCHED_CFQ=y |
| 169 | # CONFIG_CFQ_GROUP_IOSCHED is not set | ||
| 170 | CONFIG_DEFAULT_DEADLINE=y | 171 | CONFIG_DEFAULT_DEADLINE=y |
| 171 | # CONFIG_DEFAULT_CFQ is not set | 172 | # CONFIG_DEFAULT_CFQ is not set |
| 172 | # CONFIG_DEFAULT_NOOP is not set | 173 | # CONFIG_DEFAULT_NOOP is not set |
| @@ -247,7 +248,6 @@ CONFIG_64BIT=y | |||
| 247 | CONFIG_SMP=y | 248 | CONFIG_SMP=y |
| 248 | CONFIG_NR_CPUS=32 | 249 | CONFIG_NR_CPUS=32 |
| 249 | CONFIG_HOTPLUG_CPU=y | 250 | CONFIG_HOTPLUG_CPU=y |
| 250 | # CONFIG_SCHED_BOOK is not set | ||
| 251 | CONFIG_COMPAT=y | 251 | CONFIG_COMPAT=y |
| 252 | CONFIG_SYSVIPC_COMPAT=y | 252 | CONFIG_SYSVIPC_COMPAT=y |
| 253 | CONFIG_AUDIT_ARCH=y | 253 | CONFIG_AUDIT_ARCH=y |
| @@ -320,7 +320,6 @@ CONFIG_COMPAT_BINFMT_ELF=y | |||
| 320 | # CONFIG_HAVE_AOUT is not set | 320 | # CONFIG_HAVE_AOUT is not set |
| 321 | CONFIG_BINFMT_MISC=m | 321 | CONFIG_BINFMT_MISC=m |
| 322 | CONFIG_FORCE_MAX_ZONEORDER=9 | 322 | CONFIG_FORCE_MAX_ZONEORDER=9 |
| 323 | # CONFIG_PROCESS_DEBUG is not set | ||
| 324 | CONFIG_PFAULT=y | 323 | CONFIG_PFAULT=y |
| 325 | # CONFIG_SHARED_KERNEL is not set | 324 | # CONFIG_SHARED_KERNEL is not set |
| 326 | # CONFIG_CMM is not set | 325 | # CONFIG_CMM is not set |
| @@ -457,6 +456,7 @@ CONFIG_NF_CONNTRACK=m | |||
| 457 | # CONFIG_IP6_NF_IPTABLES is not set | 456 | # CONFIG_IP6_NF_IPTABLES is not set |
| 458 | # CONFIG_IP_DCCP is not set | 457 | # CONFIG_IP_DCCP is not set |
| 459 | CONFIG_IP_SCTP=m | 458 | CONFIG_IP_SCTP=m |
| 459 | # CONFIG_NET_SCTPPROBE is not set | ||
| 460 | # CONFIG_SCTP_DBG_MSG is not set | 460 | # CONFIG_SCTP_DBG_MSG is not set |
| 461 | # CONFIG_SCTP_DBG_OBJCNT is not set | 461 | # CONFIG_SCTP_DBG_OBJCNT is not set |
| 462 | # CONFIG_SCTP_HMAC_NONE is not set | 462 | # CONFIG_SCTP_HMAC_NONE is not set |
| @@ -465,6 +465,7 @@ CONFIG_SCTP_HMAC_MD5=y | |||
| 465 | # CONFIG_RDS is not set | 465 | # CONFIG_RDS is not set |
| 466 | # CONFIG_TIPC is not set | 466 | # CONFIG_TIPC is not set |
| 467 | # CONFIG_ATM is not set | 467 | # CONFIG_ATM is not set |
| 468 | # CONFIG_L2TP is not set | ||
| 468 | # CONFIG_BRIDGE is not set | 469 | # CONFIG_BRIDGE is not set |
| 469 | # CONFIG_VLAN_8021Q is not set | 470 | # CONFIG_VLAN_8021Q is not set |
| 470 | # CONFIG_DECNET is not set | 471 | # CONFIG_DECNET is not set |
| @@ -525,6 +526,7 @@ CONFIG_NET_ACT_NAT=m | |||
| 525 | # CONFIG_NET_CLS_IND is not set | 526 | # CONFIG_NET_CLS_IND is not set |
| 526 | CONFIG_NET_SCH_FIFO=y | 527 | CONFIG_NET_SCH_FIFO=y |
| 527 | # CONFIG_DCB is not set | 528 | # CONFIG_DCB is not set |
| 529 | CONFIG_RPS=y | ||
| 528 | 530 | ||
| 529 | # | 531 | # |
| 530 | # Network testing | 532 | # Network testing |
| @@ -546,6 +548,7 @@ CONFIG_CAN_VCAN=m | |||
| 546 | # CONFIG_WIMAX is not set | 548 | # CONFIG_WIMAX is not set |
| 547 | # CONFIG_RFKILL is not set | 549 | # CONFIG_RFKILL is not set |
| 548 | # CONFIG_NET_9P is not set | 550 | # CONFIG_NET_9P is not set |
| 551 | # CONFIG_CAIF is not set | ||
| 549 | # CONFIG_PCMCIA is not set | 552 | # CONFIG_PCMCIA is not set |
| 550 | CONFIG_CCW=y | 553 | CONFIG_CCW=y |
| 551 | 554 | ||
| @@ -728,6 +731,7 @@ CONFIG_VIRTIO_NET=m | |||
| 728 | # Character devices | 731 | # Character devices |
| 729 | # | 732 | # |
| 730 | CONFIG_DEVKMEM=y | 733 | CONFIG_DEVKMEM=y |
| 734 | # CONFIG_N_GSM is not set | ||
| 731 | CONFIG_UNIX98_PTYS=y | 735 | CONFIG_UNIX98_PTYS=y |
| 732 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | 736 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set |
| 733 | CONFIG_LEGACY_PTYS=y | 737 | CONFIG_LEGACY_PTYS=y |
| @@ -775,6 +779,7 @@ CONFIG_S390_TAPE_34XX=m | |||
| 775 | # CONFIG_MONREADER is not set | 779 | # CONFIG_MONREADER is not set |
| 776 | CONFIG_MONWRITER=m | 780 | CONFIG_MONWRITER=m |
| 777 | CONFIG_S390_VMUR=m | 781 | CONFIG_S390_VMUR=m |
| 782 | # CONFIG_RAMOOPS is not set | ||
| 778 | 783 | ||
| 779 | # | 784 | # |
| 780 | # PPS support | 785 | # PPS support |
| @@ -788,10 +793,6 @@ CONFIG_S390_VMUR=m | |||
| 788 | # CONFIG_NEW_LEDS is not set | 793 | # CONFIG_NEW_LEDS is not set |
| 789 | CONFIG_ACCESSIBILITY=y | 794 | CONFIG_ACCESSIBILITY=y |
| 790 | # CONFIG_AUXDISPLAY is not set | 795 | # CONFIG_AUXDISPLAY is not set |
| 791 | |||
| 792 | # | ||
| 793 | # TI VLYNQ | ||
| 794 | # | ||
| 795 | # CONFIG_STAGING is not set | 796 | # CONFIG_STAGING is not set |
| 796 | 797 | ||
| 797 | # | 798 | # |
| @@ -976,6 +977,7 @@ CONFIG_DEBUG_MEMORY_INIT=y | |||
| 976 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | 977 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set |
| 977 | CONFIG_DEBUG_FORCE_WEAK_PER_CPU=y | 978 | CONFIG_DEBUG_FORCE_WEAK_PER_CPU=y |
| 978 | # CONFIG_LKDTM is not set | 979 | # CONFIG_LKDTM is not set |
| 980 | # CONFIG_CPU_NOTIFIER_ERROR_INJECT is not set | ||
| 979 | # CONFIG_FAULT_INJECTION is not set | 981 | # CONFIG_FAULT_INJECTION is not set |
| 980 | # CONFIG_LATENCYTOP is not set | 982 | # CONFIG_LATENCYTOP is not set |
| 981 | CONFIG_SYSCTL_SYSCALL_CHECK=y | 983 | CONFIG_SYSCTL_SYSCALL_CHECK=y |
| @@ -1010,6 +1012,7 @@ CONFIG_BRANCH_PROFILE_NONE=y | |||
| 1010 | CONFIG_KPROBE_EVENT=y | 1012 | CONFIG_KPROBE_EVENT=y |
| 1011 | # CONFIG_RING_BUFFER_BENCHMARK is not set | 1013 | # CONFIG_RING_BUFFER_BENCHMARK is not set |
| 1012 | # CONFIG_DYNAMIC_DEBUG is not set | 1014 | # CONFIG_DYNAMIC_DEBUG is not set |
| 1015 | # CONFIG_ATOMIC64_SELFTEST is not set | ||
| 1013 | CONFIG_SAMPLES=y | 1016 | CONFIG_SAMPLES=y |
| 1014 | # CONFIG_SAMPLE_TRACEPOINTS is not set | 1017 | # CONFIG_SAMPLE_TRACEPOINTS is not set |
| 1015 | # CONFIG_SAMPLE_TRACE_EVENTS is not set | 1018 | # CONFIG_SAMPLE_TRACE_EVENTS is not set |
diff --git a/arch/s390/include/asm/atomic.h b/arch/s390/include/asm/atomic.h index 451bfbb9db3d..76daea117181 100644 --- a/arch/s390/include/asm/atomic.h +++ b/arch/s390/include/asm/atomic.h | |||
| @@ -15,6 +15,7 @@ | |||
| 15 | 15 | ||
| 16 | #include <linux/compiler.h> | 16 | #include <linux/compiler.h> |
| 17 | #include <linux/types.h> | 17 | #include <linux/types.h> |
| 18 | #include <asm/system.h> | ||
| 18 | 19 | ||
| 19 | #define ATOMIC_INIT(i) { (i) } | 20 | #define ATOMIC_INIT(i) { (i) } |
| 20 | 21 | ||
| @@ -274,6 +275,7 @@ static inline void atomic64_clear_mask(unsigned long long mask, atomic64_t *v) | |||
| 274 | static inline int atomic64_add_unless(atomic64_t *v, long long a, long long u) | 275 | static inline int atomic64_add_unless(atomic64_t *v, long long a, long long u) |
| 275 | { | 276 | { |
| 276 | long long c, old; | 277 | long long c, old; |
| 278 | |||
| 277 | c = atomic64_read(v); | 279 | c = atomic64_read(v); |
| 278 | for (;;) { | 280 | for (;;) { |
| 279 | if (unlikely(c == u)) | 281 | if (unlikely(c == u)) |
| @@ -286,6 +288,23 @@ static inline int atomic64_add_unless(atomic64_t *v, long long a, long long u) | |||
| 286 | return c != u; | 288 | return c != u; |
| 287 | } | 289 | } |
| 288 | 290 | ||
| 291 | static inline long long atomic64_dec_if_positive(atomic64_t *v) | ||
| 292 | { | ||
| 293 | long long c, old, dec; | ||
| 294 | |||
| 295 | c = atomic64_read(v); | ||
| 296 | for (;;) { | ||
| 297 | dec = c - 1; | ||
| 298 | if (unlikely(dec < 0)) | ||
| 299 | break; | ||
| 300 | old = atomic64_cmpxchg((v), c, dec); | ||
| 301 | if (likely(old == c)) | ||
| 302 | break; | ||
| 303 | c = old; | ||
| 304 | } | ||
| 305 | return dec; | ||
| 306 | } | ||
| 307 | |||
| 289 | #define atomic64_add(_i, _v) atomic64_add_return(_i, _v) | 308 | #define atomic64_add(_i, _v) atomic64_add_return(_i, _v) |
| 290 | #define atomic64_add_negative(_i, _v) (atomic64_add_return(_i, _v) < 0) | 309 | #define atomic64_add_negative(_i, _v) (atomic64_add_return(_i, _v) < 0) |
| 291 | #define atomic64_inc(_v) atomic64_add_return(1, _v) | 310 | #define atomic64_inc(_v) atomic64_add_return(1, _v) |
diff --git a/arch/s390/include/asm/bug.h b/arch/s390/include/asm/bug.h index 9beeb9db9b23..bf90d1fd97a5 100644 --- a/arch/s390/include/asm/bug.h +++ b/arch/s390/include/asm/bug.h | |||
| @@ -46,18 +46,18 @@ | |||
| 46 | unreachable(); \ | 46 | unreachable(); \ |
| 47 | } while (0) | 47 | } while (0) |
| 48 | 48 | ||
| 49 | #define __WARN() do { \ | 49 | #define __WARN_TAINT(taint) do { \ |
| 50 | __EMIT_BUG(BUGFLAG_WARNING); \ | 50 | __EMIT_BUG(BUGFLAG_TAINT(taint)); \ |
| 51 | } while (0) | 51 | } while (0) |
| 52 | 52 | ||
| 53 | #define WARN_ON(x) ({ \ | 53 | #define WARN_ON(x) ({ \ |
| 54 | int __ret_warn_on = !!(x); \ | 54 | int __ret_warn_on = !!(x); \ |
| 55 | if (__builtin_constant_p(__ret_warn_on)) { \ | 55 | if (__builtin_constant_p(__ret_warn_on)) { \ |
| 56 | if (__ret_warn_on) \ | 56 | if (__ret_warn_on) \ |
| 57 | __EMIT_BUG(BUGFLAG_WARNING); \ | 57 | __WARN(); \ |
| 58 | } else { \ | 58 | } else { \ |
| 59 | if (unlikely(__ret_warn_on)) \ | 59 | if (unlikely(__ret_warn_on)) \ |
| 60 | __EMIT_BUG(BUGFLAG_WARNING); \ | 60 | __WARN(); \ |
| 61 | } \ | 61 | } \ |
| 62 | unlikely(__ret_warn_on); \ | 62 | unlikely(__ret_warn_on); \ |
| 63 | }) | 63 | }) |
diff --git a/arch/s390/include/asm/cache.h b/arch/s390/include/asm/cache.h index 9b866816863c..24aafa68b643 100644 --- a/arch/s390/include/asm/cache.h +++ b/arch/s390/include/asm/cache.h | |||
| @@ -14,6 +14,6 @@ | |||
| 14 | #define L1_CACHE_BYTES 256 | 14 | #define L1_CACHE_BYTES 256 |
| 15 | #define L1_CACHE_SHIFT 8 | 15 | #define L1_CACHE_SHIFT 8 |
| 16 | 16 | ||
| 17 | #define __read_mostly __attribute__((__section__(".data.read_mostly"))) | 17 | #define __read_mostly __attribute__((__section__(".data..read_mostly"))) |
| 18 | 18 | ||
| 19 | #endif | 19 | #endif |
diff --git a/arch/s390/include/asm/ccwdev.h b/arch/s390/include/asm/ccwdev.h index f4bd346a52d3..1c0030f9b890 100644 --- a/arch/s390/include/asm/ccwdev.h +++ b/arch/s390/include/asm/ccwdev.h | |||
| @@ -91,6 +91,14 @@ struct ccw_device { | |||
| 91 | void (*handler) (struct ccw_device *, unsigned long, struct irb *); | 91 | void (*handler) (struct ccw_device *, unsigned long, struct irb *); |
| 92 | }; | 92 | }; |
| 93 | 93 | ||
| 94 | /* | ||
| 95 | * Possible CIO actions triggered by the unit check handler. | ||
| 96 | */ | ||
| 97 | enum uc_todo { | ||
| 98 | UC_TODO_RETRY, | ||
| 99 | UC_TODO_RETRY_ON_NEW_PATH, | ||
| 100 | UC_TODO_STOP | ||
| 101 | }; | ||
| 94 | 102 | ||
| 95 | /** | 103 | /** |
| 96 | * struct ccw driver - device driver for channel attached devices | 104 | * struct ccw driver - device driver for channel attached devices |
| @@ -107,6 +115,7 @@ struct ccw_device { | |||
| 107 | * @freeze: callback for freezing during hibernation snapshotting | 115 | * @freeze: callback for freezing during hibernation snapshotting |
| 108 | * @thaw: undo work done in @freeze | 116 | * @thaw: undo work done in @freeze |
| 109 | * @restore: callback for restoring after hibernation | 117 | * @restore: callback for restoring after hibernation |
| 118 | * @uc_handler: callback for unit check handler | ||
| 110 | * @driver: embedded device driver structure | 119 | * @driver: embedded device driver structure |
| 111 | * @name: device driver name | 120 | * @name: device driver name |
| 112 | */ | 121 | */ |
| @@ -124,6 +133,7 @@ struct ccw_driver { | |||
| 124 | int (*freeze)(struct ccw_device *); | 133 | int (*freeze)(struct ccw_device *); |
| 125 | int (*thaw) (struct ccw_device *); | 134 | int (*thaw) (struct ccw_device *); |
| 126 | int (*restore)(struct ccw_device *); | 135 | int (*restore)(struct ccw_device *); |
| 136 | enum uc_todo (*uc_handler) (struct ccw_device *, struct irb *); | ||
| 127 | struct device_driver driver; | 137 | struct device_driver driver; |
| 128 | char *name; | 138 | char *name; |
| 129 | }; | 139 | }; |
diff --git a/arch/s390/include/asm/scatterlist.h b/arch/s390/include/asm/scatterlist.h index 35d786fe93ae..be44d94cba54 100644 --- a/arch/s390/include/asm/scatterlist.h +++ b/arch/s390/include/asm/scatterlist.h | |||
| @@ -1 +1,3 @@ | |||
| 1 | #define ISA_DMA_THRESHOLD (~0UL) | ||
| 2 | |||
| 1 | #include <asm-generic/scatterlist.h> | 3 | #include <asm-generic/scatterlist.h> |
diff --git a/arch/s390/kernel/asm-offsets.c b/arch/s390/kernel/asm-offsets.c index d9b490a2716e..5232278d79ad 100644 --- a/arch/s390/kernel/asm-offsets.c +++ b/arch/s390/kernel/asm-offsets.c | |||
| @@ -132,8 +132,6 @@ int main(void) | |||
| 132 | DEFINE(__LC_MCCK_CLOCK, offsetof(struct _lowcore, mcck_clock)); | 132 | DEFINE(__LC_MCCK_CLOCK, offsetof(struct _lowcore, mcck_clock)); |
| 133 | DEFINE(__LC_MACHINE_FLAGS, offsetof(struct _lowcore, machine_flags)); | 133 | DEFINE(__LC_MACHINE_FLAGS, offsetof(struct _lowcore, machine_flags)); |
| 134 | DEFINE(__LC_FTRACE_FUNC, offsetof(struct _lowcore, ftrace_func)); | 134 | DEFINE(__LC_FTRACE_FUNC, offsetof(struct _lowcore, ftrace_func)); |
| 135 | DEFINE(__LC_SIE_HOOK, offsetof(struct _lowcore, sie_hook)); | ||
| 136 | DEFINE(__LC_CMF_HPP, offsetof(struct _lowcore, cmf_hpp)); | ||
| 137 | DEFINE(__LC_IRB, offsetof(struct _lowcore, irb)); | 135 | DEFINE(__LC_IRB, offsetof(struct _lowcore, irb)); |
| 138 | DEFINE(__LC_CPU_TIMER_SAVE_AREA, offsetof(struct _lowcore, cpu_timer_save_area)); | 136 | DEFINE(__LC_CPU_TIMER_SAVE_AREA, offsetof(struct _lowcore, cpu_timer_save_area)); |
| 139 | DEFINE(__LC_CLOCK_COMP_SAVE_AREA, offsetof(struct _lowcore, clock_comp_save_area)); | 137 | DEFINE(__LC_CLOCK_COMP_SAVE_AREA, offsetof(struct _lowcore, clock_comp_save_area)); |
| @@ -154,6 +152,8 @@ int main(void) | |||
| 154 | DEFINE(__LC_FP_CREG_SAVE_AREA, offsetof(struct _lowcore, fpt_creg_save_area)); | 152 | DEFINE(__LC_FP_CREG_SAVE_AREA, offsetof(struct _lowcore, fpt_creg_save_area)); |
| 155 | DEFINE(__LC_LAST_BREAK, offsetof(struct _lowcore, breaking_event_addr)); | 153 | DEFINE(__LC_LAST_BREAK, offsetof(struct _lowcore, breaking_event_addr)); |
| 156 | DEFINE(__LC_VDSO_PER_CPU, offsetof(struct _lowcore, vdso_per_cpu_data)); | 154 | DEFINE(__LC_VDSO_PER_CPU, offsetof(struct _lowcore, vdso_per_cpu_data)); |
| 155 | DEFINE(__LC_SIE_HOOK, offsetof(struct _lowcore, sie_hook)); | ||
| 156 | DEFINE(__LC_CMF_HPP, offsetof(struct _lowcore, cmf_hpp)); | ||
| 157 | #endif /* CONFIG_32BIT */ | 157 | #endif /* CONFIG_32BIT */ |
| 158 | return 0; | 158 | return 0; |
| 159 | } | 159 | } |
diff --git a/arch/s390/kernel/entry64.S b/arch/s390/kernel/entry64.S index 178d92536d90..e7192e1cb678 100644 --- a/arch/s390/kernel/entry64.S +++ b/arch/s390/kernel/entry64.S | |||
| @@ -65,7 +65,7 @@ _TIF_SYSCALL = (_TIF_SYSCALL_TRACE>>8 | _TIF_SYSCALL_AUDIT>>8 | \ | |||
| 65 | ltgr %r3,%r3 | 65 | ltgr %r3,%r3 |
| 66 | jz 0f | 66 | jz 0f |
| 67 | basr %r14,%r3 | 67 | basr %r14,%r3 |
| 68 | 0: | 68 | 0: |
| 69 | #endif | 69 | #endif |
| 70 | .endm | 70 | .endm |
| 71 | 71 | ||
diff --git a/arch/s390/kernel/kprobes.c b/arch/s390/kernel/kprobes.c index 3d34eef5a2c3..2a3d2bf6f083 100644 --- a/arch/s390/kernel/kprobes.c +++ b/arch/s390/kernel/kprobes.c | |||
| @@ -63,6 +63,8 @@ int __kprobes is_prohibited_opcode(kprobe_opcode_t *instruction) | |||
| 63 | case 0x0b: /* bsm */ | 63 | case 0x0b: /* bsm */ |
| 64 | case 0x83: /* diag */ | 64 | case 0x83: /* diag */ |
| 65 | case 0x44: /* ex */ | 65 | case 0x44: /* ex */ |
| 66 | case 0xac: /* stnsm */ | ||
| 67 | case 0xad: /* stosm */ | ||
| 66 | return -EINVAL; | 68 | return -EINVAL; |
| 67 | } | 69 | } |
| 68 | switch (*(__u16 *) instruction) { | 70 | switch (*(__u16 *) instruction) { |
| @@ -72,6 +74,7 @@ int __kprobes is_prohibited_opcode(kprobe_opcode_t *instruction) | |||
| 72 | case 0xb258: /* bsg */ | 74 | case 0xb258: /* bsg */ |
| 73 | case 0xb218: /* pc */ | 75 | case 0xb218: /* pc */ |
| 74 | case 0xb228: /* pt */ | 76 | case 0xb228: /* pt */ |
| 77 | case 0xb98d: /* epsw */ | ||
| 75 | return -EINVAL; | 78 | return -EINVAL; |
| 76 | } | 79 | } |
| 77 | return 0; | 80 | return 0; |
diff --git a/arch/s390/kernel/module.c b/arch/s390/kernel/module.c index 639380a0c45c..22cfd634c355 100644 --- a/arch/s390/kernel/module.c +++ b/arch/s390/kernel/module.c | |||
| @@ -55,8 +55,10 @@ void *module_alloc(unsigned long size) | |||
| 55 | /* Free memory returned from module_alloc */ | 55 | /* Free memory returned from module_alloc */ |
| 56 | void module_free(struct module *mod, void *module_region) | 56 | void module_free(struct module *mod, void *module_region) |
| 57 | { | 57 | { |
| 58 | vfree(mod->arch.syminfo); | 58 | if (mod) { |
| 59 | mod->arch.syminfo = NULL; | 59 | vfree(mod->arch.syminfo); |
| 60 | mod->arch.syminfo = NULL; | ||
| 61 | } | ||
| 60 | vfree(module_region); | 62 | vfree(module_region); |
| 61 | } | 63 | } |
| 62 | 64 | ||
diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c index 7d893248d265..c8e8e1354e1d 100644 --- a/arch/s390/kernel/setup.c +++ b/arch/s390/kernel/setup.c | |||
| @@ -401,7 +401,6 @@ setup_lowcore(void) | |||
| 401 | lc->io_new_psw.mask = psw_kernel_bits; | 401 | lc->io_new_psw.mask = psw_kernel_bits; |
| 402 | lc->io_new_psw.addr = PSW_ADDR_AMODE | (unsigned long) io_int_handler; | 402 | lc->io_new_psw.addr = PSW_ADDR_AMODE | (unsigned long) io_int_handler; |
| 403 | lc->clock_comparator = -1ULL; | 403 | lc->clock_comparator = -1ULL; |
| 404 | lc->cmf_hpp = -1ULL; | ||
| 405 | lc->kernel_stack = ((unsigned long) &init_thread_union) + THREAD_SIZE; | 404 | lc->kernel_stack = ((unsigned long) &init_thread_union) + THREAD_SIZE; |
| 406 | lc->async_stack = (unsigned long) | 405 | lc->async_stack = (unsigned long) |
| 407 | __alloc_bootmem(ASYNC_SIZE, ASYNC_SIZE, 0) + ASYNC_SIZE; | 406 | __alloc_bootmem(ASYNC_SIZE, ASYNC_SIZE, 0) + ASYNC_SIZE; |
| @@ -418,6 +417,7 @@ setup_lowcore(void) | |||
| 418 | __ctl_set_bit(14, 29); | 417 | __ctl_set_bit(14, 29); |
| 419 | } | 418 | } |
| 420 | #else | 419 | #else |
| 420 | lc->cmf_hpp = -1ULL; | ||
| 421 | lc->vdso_per_cpu_data = (unsigned long) &lc->paste[0]; | 421 | lc->vdso_per_cpu_data = (unsigned long) &lc->paste[0]; |
| 422 | #endif | 422 | #endif |
| 423 | lc->sync_enter_timer = S390_lowcore.sync_enter_timer; | 423 | lc->sync_enter_timer = S390_lowcore.sync_enter_timer; |
diff --git a/arch/s390/kernel/smp.c b/arch/s390/kernel/smp.c index e4d98de83dd8..541053ed234e 100644 --- a/arch/s390/kernel/smp.c +++ b/arch/s390/kernel/smp.c | |||
| @@ -944,21 +944,21 @@ static int __cpuinit smp_cpu_notify(struct notifier_block *self, | |||
| 944 | struct cpu *c = &per_cpu(cpu_devices, cpu); | 944 | struct cpu *c = &per_cpu(cpu_devices, cpu); |
| 945 | struct sys_device *s = &c->sysdev; | 945 | struct sys_device *s = &c->sysdev; |
| 946 | struct s390_idle_data *idle; | 946 | struct s390_idle_data *idle; |
| 947 | int err = 0; | ||
| 947 | 948 | ||
| 948 | switch (action) { | 949 | switch (action) { |
| 949 | case CPU_ONLINE: | 950 | case CPU_ONLINE: |
| 950 | case CPU_ONLINE_FROZEN: | 951 | case CPU_ONLINE_FROZEN: |
| 951 | idle = &per_cpu(s390_idle, cpu); | 952 | idle = &per_cpu(s390_idle, cpu); |
| 952 | memset(idle, 0, sizeof(struct s390_idle_data)); | 953 | memset(idle, 0, sizeof(struct s390_idle_data)); |
| 953 | if (sysfs_create_group(&s->kobj, &cpu_online_attr_group)) | 954 | err = sysfs_create_group(&s->kobj, &cpu_online_attr_group); |
| 954 | return NOTIFY_BAD; | ||
| 955 | break; | 955 | break; |
| 956 | case CPU_DEAD: | 956 | case CPU_DEAD: |
| 957 | case CPU_DEAD_FROZEN: | 957 | case CPU_DEAD_FROZEN: |
| 958 | sysfs_remove_group(&s->kobj, &cpu_online_attr_group); | 958 | sysfs_remove_group(&s->kobj, &cpu_online_attr_group); |
| 959 | break; | 959 | break; |
| 960 | } | 960 | } |
| 961 | return NOTIFY_OK; | 961 | return notifier_from_errno(err); |
| 962 | } | 962 | } |
| 963 | 963 | ||
| 964 | static struct notifier_block __cpuinitdata smp_cpu_nb = { | 964 | static struct notifier_block __cpuinitdata smp_cpu_nb = { |
diff --git a/arch/s390/kernel/swsusp_asm64.S b/arch/s390/kernel/swsusp_asm64.S index c56d3f56d020..1f066e46e83e 100644 --- a/arch/s390/kernel/swsusp_asm64.S +++ b/arch/s390/kernel/swsusp_asm64.S | |||
| @@ -264,7 +264,7 @@ restore_registers: | |||
| 264 | lghi %r2,0 | 264 | lghi %r2,0 |
| 265 | br %r14 | 265 | br %r14 |
| 266 | 266 | ||
| 267 | .section .data.nosave,"aw",@progbits | 267 | .section .data..nosave,"aw",@progbits |
| 268 | .align 8 | 268 | .align 8 |
| 269 | .Ldisabled_wait_31: | 269 | .Ldisabled_wait_31: |
| 270 | .long 0x000a0000,0x00000000 | 270 | .long 0x000a0000,0x00000000 |
diff --git a/arch/s390/kvm/Kconfig b/arch/s390/kvm/Kconfig index 2f4b687cc7fa..a7251580891c 100644 --- a/arch/s390/kvm/Kconfig +++ b/arch/s390/kvm/Kconfig | |||
| @@ -33,17 +33,6 @@ config KVM | |||
| 33 | 33 | ||
| 34 | If unsure, say N. | 34 | If unsure, say N. |
| 35 | 35 | ||
| 36 | config KVM_AWARE_CMF | ||
| 37 | depends on KVM | ||
| 38 | bool "KVM aware sampling" | ||
| 39 | ---help--- | ||
| 40 | This option enhances the sampling data from the CPU Measurement | ||
| 41 | Facility with additional information, that allows to distinguish | ||
| 42 | guest(s) and host when using the kernel based virtual machine | ||
| 43 | functionality. | ||
| 44 | |||
| 45 | If unsure, say N. | ||
| 46 | |||
| 47 | # OK, it's a little counter-intuitive to do this, but it puts it neatly under | 36 | # OK, it's a little counter-intuitive to do this, but it puts it neatly under |
| 48 | # the virtualization menu. | 37 | # the virtualization menu. |
| 49 | source drivers/vhost/Kconfig | 38 | source drivers/vhost/Kconfig |
diff --git a/arch/s390/kvm/kvm-s390.c b/arch/s390/kvm/kvm-s390.c index 49292869a5cd..ae3705816878 100644 --- a/arch/s390/kvm/kvm-s390.c +++ b/arch/s390/kvm/kvm-s390.c | |||
| @@ -341,11 +341,13 @@ struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm, | |||
| 341 | 341 | ||
| 342 | rc = kvm_vcpu_init(vcpu, kvm, id); | 342 | rc = kvm_vcpu_init(vcpu, kvm, id); |
| 343 | if (rc) | 343 | if (rc) |
| 344 | goto out_free_cpu; | 344 | goto out_free_sie_block; |
| 345 | VM_EVENT(kvm, 3, "create cpu %d at %p, sie block at %p", id, vcpu, | 345 | VM_EVENT(kvm, 3, "create cpu %d at %p, sie block at %p", id, vcpu, |
| 346 | vcpu->arch.sie_block); | 346 | vcpu->arch.sie_block); |
| 347 | 347 | ||
| 348 | return vcpu; | 348 | return vcpu; |
| 349 | out_free_sie_block: | ||
| 350 | free_page((unsigned long)(vcpu->arch.sie_block)); | ||
| 349 | out_free_cpu: | 351 | out_free_cpu: |
| 350 | kfree(vcpu); | 352 | kfree(vcpu); |
| 351 | out_nomem: | 353 | out_nomem: |
| @@ -750,7 +752,7 @@ gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn) | |||
| 750 | static int __init kvm_s390_init(void) | 752 | static int __init kvm_s390_init(void) |
| 751 | { | 753 | { |
| 752 | int ret; | 754 | int ret; |
| 753 | ret = kvm_init(NULL, sizeof(struct kvm_vcpu), THIS_MODULE); | 755 | ret = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE); |
| 754 | if (ret) | 756 | if (ret) |
| 755 | return ret; | 757 | return ret; |
| 756 | 758 | ||
| @@ -759,7 +761,7 @@ static int __init kvm_s390_init(void) | |||
| 759 | * to hold the maximum amount of facilites. On the other hand, we | 761 | * to hold the maximum amount of facilites. On the other hand, we |
| 760 | * only set facilities that are known to work in KVM. | 762 | * only set facilities that are known to work in KVM. |
| 761 | */ | 763 | */ |
| 762 | facilities = (unsigned long long *) get_zeroed_page(GFP_DMA); | 764 | facilities = (unsigned long long *) get_zeroed_page(GFP_KERNEL|GFP_DMA); |
| 763 | if (!facilities) { | 765 | if (!facilities) { |
| 764 | kvm_exit(); | 766 | kvm_exit(); |
| 765 | return -ENOMEM; | 767 | return -ENOMEM; |
diff --git a/arch/s390/kvm/kvm-s390.h b/arch/s390/kvm/kvm-s390.h index 60f09ab3672c..cfa9d1777457 100644 --- a/arch/s390/kvm/kvm-s390.h +++ b/arch/s390/kvm/kvm-s390.h | |||
| @@ -72,7 +72,7 @@ static inline void kvm_s390_vcpu_set_mem(struct kvm_vcpu *vcpu) | |||
| 72 | struct kvm_memslots *memslots; | 72 | struct kvm_memslots *memslots; |
| 73 | 73 | ||
| 74 | idx = srcu_read_lock(&vcpu->kvm->srcu); | 74 | idx = srcu_read_lock(&vcpu->kvm->srcu); |
| 75 | memslots = rcu_dereference(vcpu->kvm->memslots); | 75 | memslots = kvm_memslots(vcpu->kvm); |
| 76 | 76 | ||
| 77 | mem = &memslots->memslots[0]; | 77 | mem = &memslots->memslots[0]; |
| 78 | 78 | ||
diff --git a/arch/s390/kvm/sie64a.S b/arch/s390/kvm/sie64a.S index 31646bd0e469..7e9d30d567b0 100644 --- a/arch/s390/kvm/sie64a.S +++ b/arch/s390/kvm/sie64a.S | |||
| @@ -32,12 +32,10 @@ SPI_PSW = STACK_FRAME_OVERHEAD + __PT_PSW | |||
| 32 | 32 | ||
| 33 | 33 | ||
| 34 | .macro SPP newpp | 34 | .macro SPP newpp |
| 35 | #ifdef CONFIG_KVM_AWARE_CMF | ||
| 36 | tm __LC_MACHINE_FLAGS+6,0x20 # MACHINE_FLAG_SPP | 35 | tm __LC_MACHINE_FLAGS+6,0x20 # MACHINE_FLAG_SPP |
| 37 | jz 0f | 36 | jz 0f |
| 38 | .insn s,0xb2800000,\newpp | 37 | .insn s,0xb2800000,\newpp |
| 39 | 0: | 38 | 0: |
| 40 | #endif | ||
| 41 | .endm | 39 | .endm |
| 42 | 40 | ||
| 43 | sie_irq_handler: | 41 | sie_irq_handler: |
diff --git a/arch/s390/kvm/sigp.c b/arch/s390/kvm/sigp.c index eff3c5989b46..702276f5e2fa 100644 --- a/arch/s390/kvm/sigp.c +++ b/arch/s390/kvm/sigp.c | |||
| @@ -113,7 +113,7 @@ static int __inject_sigp_stop(struct kvm_s390_local_interrupt *li, int action) | |||
| 113 | { | 113 | { |
| 114 | struct kvm_s390_interrupt_info *inti; | 114 | struct kvm_s390_interrupt_info *inti; |
| 115 | 115 | ||
| 116 | inti = kzalloc(sizeof(*inti), GFP_KERNEL); | 116 | inti = kzalloc(sizeof(*inti), GFP_ATOMIC); |
| 117 | if (!inti) | 117 | if (!inti) |
| 118 | return -ENOMEM; | 118 | return -ENOMEM; |
| 119 | inti->type = KVM_S390_SIGP_STOP; | 119 | inti->type = KVM_S390_SIGP_STOP; |
diff --git a/arch/s390/mm/cmm.c b/arch/s390/mm/cmm.c index f87b34731e1d..eb6a2ef5f82e 100644 --- a/arch/s390/mm/cmm.c +++ b/arch/s390/mm/cmm.c | |||
| @@ -1,11 +1,9 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * arch/s390/mm/cmm.c | 2 | * Collaborative memory management interface. |
| 3 | * | 3 | * |
| 4 | * S390 version | 4 | * Copyright IBM Corp 2003,2010 |
| 5 | * Copyright (C) 2003 IBM Deutschland Entwicklung GmbH, IBM Corporation | 5 | * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>, |
| 6 | * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com) | ||
| 7 | * | 6 | * |
| 8 | * Collaborative memory management interface. | ||
| 9 | */ | 7 | */ |
| 10 | 8 | ||
| 11 | #include <linux/errno.h> | 9 | #include <linux/errno.h> |
| @@ -20,9 +18,9 @@ | |||
| 20 | #include <linux/kthread.h> | 18 | #include <linux/kthread.h> |
| 21 | #include <linux/oom.h> | 19 | #include <linux/oom.h> |
| 22 | #include <linux/suspend.h> | 20 | #include <linux/suspend.h> |
| 21 | #include <linux/uaccess.h> | ||
| 23 | 22 | ||
| 24 | #include <asm/pgalloc.h> | 23 | #include <asm/pgalloc.h> |
| 25 | #include <asm/uaccess.h> | ||
| 26 | #include <asm/diag.h> | 24 | #include <asm/diag.h> |
| 27 | 25 | ||
| 28 | static char *sender = "VMRMSVM"; | 26 | static char *sender = "VMRMSVM"; |
| @@ -53,14 +51,14 @@ static struct cmm_page_array *cmm_timed_page_list; | |||
| 53 | static DEFINE_SPINLOCK(cmm_lock); | 51 | static DEFINE_SPINLOCK(cmm_lock); |
| 54 | 52 | ||
| 55 | static struct task_struct *cmm_thread_ptr; | 53 | static struct task_struct *cmm_thread_ptr; |
| 56 | static wait_queue_head_t cmm_thread_wait; | 54 | static DECLARE_WAIT_QUEUE_HEAD(cmm_thread_wait); |
| 57 | static struct timer_list cmm_timer; | 55 | static DEFINE_TIMER(cmm_timer, NULL, 0, 0); |
| 58 | 56 | ||
| 59 | static void cmm_timer_fn(unsigned long); | 57 | static void cmm_timer_fn(unsigned long); |
| 60 | static void cmm_set_timer(void); | 58 | static void cmm_set_timer(void); |
| 61 | 59 | ||
| 62 | static long | 60 | static long cmm_alloc_pages(long nr, long *counter, |
| 63 | cmm_alloc_pages(long nr, long *counter, struct cmm_page_array **list) | 61 | struct cmm_page_array **list) |
| 64 | { | 62 | { |
| 65 | struct cmm_page_array *pa, *npa; | 63 | struct cmm_page_array *pa, *npa; |
| 66 | unsigned long addr; | 64 | unsigned long addr; |
| @@ -99,8 +97,7 @@ cmm_alloc_pages(long nr, long *counter, struct cmm_page_array **list) | |||
| 99 | return nr; | 97 | return nr; |
| 100 | } | 98 | } |
| 101 | 99 | ||
| 102 | static long | 100 | static long cmm_free_pages(long nr, long *counter, struct cmm_page_array **list) |
| 103 | cmm_free_pages(long nr, long *counter, struct cmm_page_array **list) | ||
| 104 | { | 101 | { |
| 105 | struct cmm_page_array *pa; | 102 | struct cmm_page_array *pa; |
| 106 | unsigned long addr; | 103 | unsigned long addr; |
| @@ -140,11 +137,10 @@ static int cmm_oom_notify(struct notifier_block *self, | |||
| 140 | } | 137 | } |
| 141 | 138 | ||
| 142 | static struct notifier_block cmm_oom_nb = { | 139 | static struct notifier_block cmm_oom_nb = { |
| 143 | .notifier_call = cmm_oom_notify | 140 | .notifier_call = cmm_oom_notify, |
| 144 | }; | 141 | }; |
| 145 | 142 | ||
| 146 | static int | 143 | static int cmm_thread(void *dummy) |
| 147 | cmm_thread(void *dummy) | ||
| 148 | { | 144 | { |
| 149 | int rc; | 145 | int rc; |
| 150 | 146 | ||
| @@ -170,7 +166,7 @@ cmm_thread(void *dummy) | |||
| 170 | cmm_timed_pages_target = cmm_timed_pages; | 166 | cmm_timed_pages_target = cmm_timed_pages; |
| 171 | } else if (cmm_timed_pages_target < cmm_timed_pages) { | 167 | } else if (cmm_timed_pages_target < cmm_timed_pages) { |
| 172 | cmm_free_pages(1, &cmm_timed_pages, | 168 | cmm_free_pages(1, &cmm_timed_pages, |
| 173 | &cmm_timed_page_list); | 169 | &cmm_timed_page_list); |
| 174 | } | 170 | } |
| 175 | if (cmm_timed_pages > 0 && !timer_pending(&cmm_timer)) | 171 | if (cmm_timed_pages > 0 && !timer_pending(&cmm_timer)) |
| 176 | cmm_set_timer(); | 172 | cmm_set_timer(); |
| @@ -178,14 +174,12 @@ cmm_thread(void *dummy) | |||
| 178 | return 0; | 174 | return 0; |
| 179 | } | 175 | } |
| 180 | 176 | ||
| 181 | static void | 177 | static void cmm_kick_thread(void) |
| 182 | cmm_kick_thread(void) | ||
| 183 | { | 178 | { |
| 184 | wake_up(&cmm_thread_wait); | 179 | wake_up(&cmm_thread_wait); |
| 185 | } | 180 | } |
| 186 | 181 | ||
| 187 | static void | 182 | static void cmm_set_timer(void) |
| 188 | cmm_set_timer(void) | ||
| 189 | { | 183 | { |
| 190 | if (cmm_timed_pages_target <= 0 || cmm_timeout_seconds <= 0) { | 184 | if (cmm_timed_pages_target <= 0 || cmm_timeout_seconds <= 0) { |
| 191 | if (timer_pending(&cmm_timer)) | 185 | if (timer_pending(&cmm_timer)) |
| @@ -202,8 +196,7 @@ cmm_set_timer(void) | |||
| 202 | add_timer(&cmm_timer); | 196 | add_timer(&cmm_timer); |
| 203 | } | 197 | } |
| 204 | 198 | ||
| 205 | static void | 199 | static void cmm_timer_fn(unsigned long ignored) |
| 206 | cmm_timer_fn(unsigned long ignored) | ||
| 207 | { | 200 | { |
| 208 | long nr; | 201 | long nr; |
| 209 | 202 | ||
| @@ -216,57 +209,49 @@ cmm_timer_fn(unsigned long ignored) | |||
| 216 | cmm_set_timer(); | 209 | cmm_set_timer(); |
| 217 | } | 210 | } |
| 218 | 211 | ||
| 219 | void | 212 | static void cmm_set_pages(long nr) |
| 220 | cmm_set_pages(long nr) | ||
| 221 | { | 213 | { |
| 222 | cmm_pages_target = nr; | 214 | cmm_pages_target = nr; |
| 223 | cmm_kick_thread(); | 215 | cmm_kick_thread(); |
| 224 | } | 216 | } |
| 225 | 217 | ||
| 226 | long | 218 | static long cmm_get_pages(void) |
| 227 | cmm_get_pages(void) | ||
| 228 | { | 219 | { |
| 229 | return cmm_pages; | 220 | return cmm_pages; |
| 230 | } | 221 | } |
| 231 | 222 | ||
| 232 | void | 223 | static void cmm_add_timed_pages(long nr) |
| 233 | cmm_add_timed_pages(long nr) | ||
| 234 | { | 224 | { |
| 235 | cmm_timed_pages_target += nr; | 225 | cmm_timed_pages_target += nr; |
| 236 | cmm_kick_thread(); | 226 | cmm_kick_thread(); |
| 237 | } | 227 | } |
| 238 | 228 | ||
| 239 | long | 229 | static long cmm_get_timed_pages(void) |
| 240 | cmm_get_timed_pages(void) | ||
| 241 | { | 230 | { |
| 242 | return cmm_timed_pages; | 231 | return cmm_timed_pages; |
| 243 | } | 232 | } |
| 244 | 233 | ||
| 245 | void | 234 | static void cmm_set_timeout(long nr, long seconds) |
| 246 | cmm_set_timeout(long nr, long seconds) | ||
| 247 | { | 235 | { |
| 248 | cmm_timeout_pages = nr; | 236 | cmm_timeout_pages = nr; |
| 249 | cmm_timeout_seconds = seconds; | 237 | cmm_timeout_seconds = seconds; |
| 250 | cmm_set_timer(); | 238 | cmm_set_timer(); |
| 251 | } | 239 | } |
| 252 | 240 | ||
| 253 | static int | 241 | static int cmm_skip_blanks(char *cp, char **endp) |
| 254 | cmm_skip_blanks(char *cp, char **endp) | ||
| 255 | { | 242 | { |
| 256 | char *str; | 243 | char *str; |
| 257 | 244 | ||
| 258 | for (str = cp; *str == ' ' || *str == '\t'; str++); | 245 | for (str = cp; *str == ' ' || *str == '\t'; str++) |
| 246 | ; | ||
| 259 | *endp = str; | 247 | *endp = str; |
| 260 | return str != cp; | 248 | return str != cp; |
| 261 | } | 249 | } |
| 262 | 250 | ||
| 263 | #ifdef CONFIG_CMM_PROC | ||
| 264 | |||
| 265 | static struct ctl_table cmm_table[]; | 251 | static struct ctl_table cmm_table[]; |
| 266 | 252 | ||
| 267 | static int | 253 | static int cmm_pages_handler(ctl_table *ctl, int write, void __user *buffer, |
| 268 | cmm_pages_handler(ctl_table *ctl, int write, | 254 | size_t *lenp, loff_t *ppos) |
| 269 | void __user *buffer, size_t *lenp, loff_t *ppos) | ||
| 270 | { | 255 | { |
| 271 | char buf[16], *p; | 256 | char buf[16], *p; |
| 272 | long nr; | 257 | long nr; |
| @@ -305,9 +290,8 @@ cmm_pages_handler(ctl_table *ctl, int write, | |||
| 305 | return 0; | 290 | return 0; |
| 306 | } | 291 | } |
| 307 | 292 | ||
| 308 | static int | 293 | static int cmm_timeout_handler(ctl_table *ctl, int write, void __user *buffer, |
| 309 | cmm_timeout_handler(ctl_table *ctl, int write, | 294 | size_t *lenp, loff_t *ppos) |
| 310 | void __user *buffer, size_t *lenp, loff_t *ppos) | ||
| 311 | { | 295 | { |
| 312 | char buf[64], *p; | 296 | char buf[64], *p; |
| 313 | long nr, seconds; | 297 | long nr, seconds; |
| @@ -370,12 +354,10 @@ static struct ctl_table cmm_dir_table[] = { | |||
| 370 | }, | 354 | }, |
| 371 | { } | 355 | { } |
| 372 | }; | 356 | }; |
| 373 | #endif | ||
| 374 | 357 | ||
| 375 | #ifdef CONFIG_CMM_IUCV | 358 | #ifdef CONFIG_CMM_IUCV |
| 376 | #define SMSG_PREFIX "CMM" | 359 | #define SMSG_PREFIX "CMM" |
| 377 | static void | 360 | static void cmm_smsg_target(const char *from, char *msg) |
| 378 | cmm_smsg_target(const char *from, char *msg) | ||
| 379 | { | 361 | { |
| 380 | long nr, seconds; | 362 | long nr, seconds; |
| 381 | 363 | ||
| @@ -445,16 +427,13 @@ static struct notifier_block cmm_power_notifier = { | |||
| 445 | .notifier_call = cmm_power_event, | 427 | .notifier_call = cmm_power_event, |
| 446 | }; | 428 | }; |
| 447 | 429 | ||
| 448 | static int | 430 | static int cmm_init(void) |
| 449 | cmm_init (void) | ||
| 450 | { | 431 | { |
| 451 | int rc = -ENOMEM; | 432 | int rc = -ENOMEM; |
| 452 | 433 | ||
| 453 | #ifdef CONFIG_CMM_PROC | ||
| 454 | cmm_sysctl_header = register_sysctl_table(cmm_dir_table); | 434 | cmm_sysctl_header = register_sysctl_table(cmm_dir_table); |
| 455 | if (!cmm_sysctl_header) | 435 | if (!cmm_sysctl_header) |
| 456 | goto out_sysctl; | 436 | goto out_sysctl; |
| 457 | #endif | ||
| 458 | #ifdef CONFIG_CMM_IUCV | 437 | #ifdef CONFIG_CMM_IUCV |
| 459 | rc = smsg_register_callback(SMSG_PREFIX, cmm_smsg_target); | 438 | rc = smsg_register_callback(SMSG_PREFIX, cmm_smsg_target); |
| 460 | if (rc < 0) | 439 | if (rc < 0) |
| @@ -466,8 +445,6 @@ cmm_init (void) | |||
| 466 | rc = register_pm_notifier(&cmm_power_notifier); | 445 | rc = register_pm_notifier(&cmm_power_notifier); |
| 467 | if (rc) | 446 | if (rc) |
| 468 | goto out_pm; | 447 | goto out_pm; |
| 469 | init_waitqueue_head(&cmm_thread_wait); | ||
| 470 | init_timer(&cmm_timer); | ||
| 471 | cmm_thread_ptr = kthread_run(cmm_thread, NULL, "cmmthread"); | 448 | cmm_thread_ptr = kthread_run(cmm_thread, NULL, "cmmthread"); |
| 472 | rc = IS_ERR(cmm_thread_ptr) ? PTR_ERR(cmm_thread_ptr) : 0; | 449 | rc = IS_ERR(cmm_thread_ptr) ? PTR_ERR(cmm_thread_ptr) : 0; |
| 473 | if (rc) | 450 | if (rc) |
| @@ -483,36 +460,26 @@ out_oom_notify: | |||
| 483 | smsg_unregister_callback(SMSG_PREFIX, cmm_smsg_target); | 460 | smsg_unregister_callback(SMSG_PREFIX, cmm_smsg_target); |
| 484 | out_smsg: | 461 | out_smsg: |
| 485 | #endif | 462 | #endif |
| 486 | #ifdef CONFIG_CMM_PROC | ||
| 487 | unregister_sysctl_table(cmm_sysctl_header); | 463 | unregister_sysctl_table(cmm_sysctl_header); |
| 488 | out_sysctl: | 464 | out_sysctl: |
| 489 | #endif | 465 | del_timer_sync(&cmm_timer); |
| 490 | return rc; | 466 | return rc; |
| 491 | } | 467 | } |
| 468 | module_init(cmm_init); | ||
| 492 | 469 | ||
| 493 | static void | 470 | static void cmm_exit(void) |
| 494 | cmm_exit(void) | ||
| 495 | { | 471 | { |
| 496 | kthread_stop(cmm_thread_ptr); | ||
| 497 | unregister_pm_notifier(&cmm_power_notifier); | ||
| 498 | unregister_oom_notifier(&cmm_oom_nb); | ||
| 499 | cmm_free_pages(cmm_pages, &cmm_pages, &cmm_page_list); | ||
| 500 | cmm_free_pages(cmm_timed_pages, &cmm_timed_pages, &cmm_timed_page_list); | ||
| 501 | #ifdef CONFIG_CMM_PROC | ||
| 502 | unregister_sysctl_table(cmm_sysctl_header); | 472 | unregister_sysctl_table(cmm_sysctl_header); |
| 503 | #endif | ||
| 504 | #ifdef CONFIG_CMM_IUCV | 473 | #ifdef CONFIG_CMM_IUCV |
| 505 | smsg_unregister_callback(SMSG_PREFIX, cmm_smsg_target); | 474 | smsg_unregister_callback(SMSG_PREFIX, cmm_smsg_target); |
| 506 | #endif | 475 | #endif |
| 476 | unregister_pm_notifier(&cmm_power_notifier); | ||
| 477 | unregister_oom_notifier(&cmm_oom_nb); | ||
| 478 | kthread_stop(cmm_thread_ptr); | ||
| 479 | del_timer_sync(&cmm_timer); | ||
| 480 | cmm_free_pages(cmm_pages, &cmm_pages, &cmm_page_list); | ||
| 481 | cmm_free_pages(cmm_timed_pages, &cmm_timed_pages, &cmm_timed_page_list); | ||
| 507 | } | 482 | } |
| 508 | |||
| 509 | module_init(cmm_init); | ||
| 510 | module_exit(cmm_exit); | 483 | module_exit(cmm_exit); |
| 511 | 484 | ||
| 512 | EXPORT_SYMBOL(cmm_set_pages); | ||
| 513 | EXPORT_SYMBOL(cmm_get_pages); | ||
| 514 | EXPORT_SYMBOL(cmm_add_timed_pages); | ||
| 515 | EXPORT_SYMBOL(cmm_get_timed_pages); | ||
| 516 | EXPORT_SYMBOL(cmm_set_timeout); | ||
| 517 | |||
| 518 | MODULE_LICENSE("GPL"); | 485 | MODULE_LICENSE("GPL"); |
diff --git a/arch/s390/mm/extmem.c b/arch/s390/mm/extmem.c index 6409fd57eb04..3cc95dd0a3a6 100644 --- a/arch/s390/mm/extmem.c +++ b/arch/s390/mm/extmem.c | |||
| @@ -105,7 +105,7 @@ static int | |||
| 105 | dcss_set_subcodes(void) | 105 | dcss_set_subcodes(void) |
| 106 | { | 106 | { |
| 107 | #ifdef CONFIG_64BIT | 107 | #ifdef CONFIG_64BIT |
| 108 | char *name = kmalloc(8 * sizeof(char), GFP_DMA); | 108 | char *name = kmalloc(8 * sizeof(char), GFP_KERNEL | GFP_DMA); |
| 109 | unsigned long rx, ry; | 109 | unsigned long rx, ry; |
| 110 | int rc; | 110 | int rc; |
| 111 | 111 | ||
| @@ -252,12 +252,13 @@ dcss_diag_translate_rc (int vm_rc) { | |||
| 252 | static int | 252 | static int |
| 253 | query_segment_type (struct dcss_segment *seg) | 253 | query_segment_type (struct dcss_segment *seg) |
| 254 | { | 254 | { |
| 255 | struct qin64 *qin = kmalloc (sizeof(struct qin64), GFP_DMA); | ||
| 256 | struct qout64 *qout = kmalloc (sizeof(struct qout64), GFP_DMA); | ||
| 257 | |||
| 258 | int diag_cc, rc, i; | ||
| 259 | unsigned long dummy, vmrc; | 255 | unsigned long dummy, vmrc; |
| 256 | int diag_cc, rc, i; | ||
| 257 | struct qout64 *qout; | ||
| 258 | struct qin64 *qin; | ||
| 260 | 259 | ||
| 260 | qin = kmalloc(sizeof(*qin), GFP_KERNEL | GFP_DMA); | ||
| 261 | qout = kmalloc(sizeof(*qout), GFP_KERNEL | GFP_DMA); | ||
| 261 | if ((qin == NULL) || (qout == NULL)) { | 262 | if ((qin == NULL) || (qout == NULL)) { |
| 262 | rc = -ENOMEM; | 263 | rc = -ENOMEM; |
| 263 | goto out_free; | 264 | goto out_free; |
| @@ -286,7 +287,7 @@ query_segment_type (struct dcss_segment *seg) | |||
| 286 | copy data for the new format. */ | 287 | copy data for the new format. */ |
| 287 | if (segext_scode == DCSS_SEGEXT) { | 288 | if (segext_scode == DCSS_SEGEXT) { |
| 288 | struct qout64_old *qout_old; | 289 | struct qout64_old *qout_old; |
| 289 | qout_old = kzalloc(sizeof(struct qout64_old), GFP_DMA); | 290 | qout_old = kzalloc(sizeof(*qout_old), GFP_KERNEL | GFP_DMA); |
| 290 | if (qout_old == NULL) { | 291 | if (qout_old == NULL) { |
| 291 | rc = -ENOMEM; | 292 | rc = -ENOMEM; |
| 292 | goto out_free; | 293 | goto out_free; |
| @@ -407,11 +408,11 @@ segment_overlaps_others (struct dcss_segment *seg) | |||
| 407 | static int | 408 | static int |
| 408 | __segment_load (char *name, int do_nonshared, unsigned long *addr, unsigned long *end) | 409 | __segment_load (char *name, int do_nonshared, unsigned long *addr, unsigned long *end) |
| 409 | { | 410 | { |
| 410 | struct dcss_segment *seg = kmalloc(sizeof(struct dcss_segment), | ||
| 411 | GFP_DMA); | ||
| 412 | int rc, diag_cc; | ||
| 413 | unsigned long start_addr, end_addr, dummy; | 411 | unsigned long start_addr, end_addr, dummy; |
| 412 | struct dcss_segment *seg; | ||
| 413 | int rc, diag_cc; | ||
| 414 | 414 | ||
| 415 | seg = kmalloc(sizeof(*seg), GFP_KERNEL | GFP_DMA); | ||
| 415 | if (seg == NULL) { | 416 | if (seg == NULL) { |
| 416 | rc = -ENOMEM; | 417 | rc = -ENOMEM; |
| 417 | goto out; | 418 | goto out; |
diff --git a/arch/score/include/asm/scatterlist.h b/arch/score/include/asm/scatterlist.h index 9f533b8362c7..4fa1a6658215 100644 --- a/arch/score/include/asm/scatterlist.h +++ b/arch/score/include/asm/scatterlist.h | |||
| @@ -1,6 +1,8 @@ | |||
| 1 | #ifndef _ASM_SCORE_SCATTERLIST_H | 1 | #ifndef _ASM_SCORE_SCATTERLIST_H |
| 2 | #define _ASM_SCORE_SCATTERLIST_H | 2 | #define _ASM_SCORE_SCATTERLIST_H |
| 3 | 3 | ||
| 4 | #define ISA_DMA_THRESHOLD (~0UL) | ||
| 5 | |||
| 4 | #include <asm-generic/scatterlist.h> | 6 | #include <asm-generic/scatterlist.h> |
| 5 | 7 | ||
| 6 | #endif /* _ASM_SCORE_SCATTERLIST_H */ | 8 | #endif /* _ASM_SCORE_SCATTERLIST_H */ |
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index 0e318c905eea..573fca1fbd9b 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig | |||
| @@ -9,7 +9,7 @@ config SUPERH | |||
| 9 | def_bool y | 9 | def_bool y |
| 10 | select EMBEDDED | 10 | select EMBEDDED |
| 11 | select HAVE_CLK | 11 | select HAVE_CLK |
| 12 | select HAVE_IDE | 12 | select HAVE_IDE if HAS_IOPORT |
| 13 | select HAVE_LMB | 13 | select HAVE_LMB |
| 14 | select HAVE_OPROFILE | 14 | select HAVE_OPROFILE |
| 15 | select HAVE_GENERIC_DMA_COHERENT | 15 | select HAVE_GENERIC_DMA_COHERENT |
| @@ -174,6 +174,9 @@ config ARCH_HAS_DEFAULT_IDLE | |||
| 174 | config ARCH_HAS_CPU_IDLE_WAIT | 174 | config ARCH_HAS_CPU_IDLE_WAIT |
| 175 | def_bool y | 175 | def_bool y |
| 176 | 176 | ||
| 177 | config NO_IOPORT | ||
| 178 | bool | ||
| 179 | |||
| 177 | config IO_TRAPPED | 180 | config IO_TRAPPED |
| 178 | bool | 181 | bool |
| 179 | 182 | ||
| @@ -186,6 +189,9 @@ config DMA_NONCOHERENT | |||
| 186 | config NEED_DMA_MAP_STATE | 189 | config NEED_DMA_MAP_STATE |
| 187 | def_bool DMA_NONCOHERENT | 190 | def_bool DMA_NONCOHERENT |
| 188 | 191 | ||
| 192 | config NEED_SG_DMA_LENGTH | ||
| 193 | def_bool y | ||
| 194 | |||
| 189 | source "init/Kconfig" | 195 | source "init/Kconfig" |
| 190 | 196 | ||
| 191 | source "kernel/Kconfig.freezer" | 197 | source "kernel/Kconfig.freezer" |
| @@ -773,6 +779,17 @@ config ENTRY_OFFSET | |||
| 773 | default "0x00010000" if PAGE_SIZE_64KB | 779 | default "0x00010000" if PAGE_SIZE_64KB |
| 774 | default "0x00000000" | 780 | default "0x00000000" |
| 775 | 781 | ||
| 782 | config ROMIMAGE_MMCIF | ||
| 783 | bool "Include MMCIF loader in romImage (EXPERIMENTAL)" | ||
| 784 | depends on CPU_SUBTYPE_SH7724 && EXPERIMENTAL | ||
| 785 | help | ||
| 786 | Say Y here to include experimental MMCIF loading code in | ||
| 787 | romImage. With this enabled it is possible to write the romImage | ||
| 788 | kernel image to an MMC card and boot the kernel straight from | ||
| 789 | the reset vector. At reset the processor Mask ROM will load the | ||
| 790 | first part of the romImage which in turn loads the rest the kernel | ||
| 791 | image to RAM using the MMCIF hardware block. | ||
| 792 | |||
| 776 | choice | 793 | choice |
| 777 | prompt "Kernel command line" | 794 | prompt "Kernel command line" |
| 778 | optional | 795 | optional |
diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig index 938e87d51482..07b35ca2f644 100644 --- a/arch/sh/boards/Kconfig +++ b/arch/sh/boards/Kconfig | |||
| @@ -154,6 +154,7 @@ config SH_SDK7786 | |||
| 154 | bool "SDK7786" | 154 | bool "SDK7786" |
| 155 | depends on CPU_SUBTYPE_SH7786 | 155 | depends on CPU_SUBTYPE_SH7786 |
| 156 | select SYS_SUPPORTS_PCI | 156 | select SYS_SUPPORTS_PCI |
| 157 | select NO_IOPORT if !PCI | ||
| 157 | help | 158 | help |
| 158 | Select SDK7786 if configuring for a Renesas Technology Europe | 159 | Select SDK7786 if configuring for a Renesas Technology Europe |
| 159 | SH7786-65nm board. | 160 | SH7786-65nm board. |
| @@ -190,6 +191,7 @@ config SH_URQUELL | |||
| 190 | depends on CPU_SUBTYPE_SH7786 | 191 | depends on CPU_SUBTYPE_SH7786 |
| 191 | select ARCH_REQUIRE_GPIOLIB | 192 | select ARCH_REQUIRE_GPIOLIB |
| 192 | select SYS_SUPPORTS_PCI | 193 | select SYS_SUPPORTS_PCI |
| 194 | select NO_IOPORT if !PCI | ||
| 193 | 195 | ||
| 194 | config SH_MIGOR | 196 | config SH_MIGOR |
| 195 | bool "Migo-R" | 197 | bool "Migo-R" |
| @@ -286,6 +288,7 @@ config SH_LBOX_RE2 | |||
| 286 | config SH_X3PROTO | 288 | config SH_X3PROTO |
| 287 | bool "SH-X3 Prototype board" | 289 | bool "SH-X3 Prototype board" |
| 288 | depends on CPU_SUBTYPE_SHX3 | 290 | depends on CPU_SUBTYPE_SHX3 |
| 291 | select NO_IOPORT if !PCI | ||
| 289 | 292 | ||
| 290 | config SH_MAGIC_PANEL_R2 | 293 | config SH_MAGIC_PANEL_R2 |
| 291 | bool "Magic Panel R2" | 294 | bool "Magic Panel R2" |
diff --git a/arch/sh/boards/mach-ap325rxa/setup.c b/arch/sh/boards/mach-ap325rxa/setup.c index 57e37e284208..3a170bd3f3d0 100644 --- a/arch/sh/boards/mach-ap325rxa/setup.c +++ b/arch/sh/boards/mach-ap325rxa/setup.c | |||
| @@ -328,7 +328,7 @@ static struct soc_camera_platform_info camera_info = { | |||
| 328 | .set_capture = camera_set_capture, | 328 | .set_capture = camera_set_capture, |
| 329 | }; | 329 | }; |
| 330 | 330 | ||
| 331 | struct soc_camera_link camera_link = { | 331 | static struct soc_camera_link camera_link = { |
| 332 | .bus_id = 0, | 332 | .bus_id = 0, |
| 333 | .add_device = ap325rxa_camera_add, | 333 | .add_device = ap325rxa_camera_add, |
| 334 | .del_device = ap325rxa_camera_del, | 334 | .del_device = ap325rxa_camera_del, |
diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c index 62123885a6fa..be1d114d3a43 100644 --- a/arch/sh/boards/mach-ecovec24/setup.c +++ b/arch/sh/boards/mach-ecovec24/setup.c | |||
| @@ -11,6 +11,9 @@ | |||
| 11 | #include <linux/init.h> | 11 | #include <linux/init.h> |
| 12 | #include <linux/device.h> | 12 | #include <linux/device.h> |
| 13 | #include <linux/platform_device.h> | 13 | #include <linux/platform_device.h> |
| 14 | #include <linux/mfd/sh_mobile_sdhi.h> | ||
| 15 | #include <linux/mmc/host.h> | ||
| 16 | #include <linux/mmc/sh_mmcif.h> | ||
| 14 | #include <linux/mtd/physmap.h> | 17 | #include <linux/mtd/physmap.h> |
| 15 | #include <linux/gpio.h> | 18 | #include <linux/gpio.h> |
| 16 | #include <linux/interrupt.h> | 19 | #include <linux/interrupt.h> |
| @@ -25,7 +28,6 @@ | |||
| 25 | #include <linux/mmc/host.h> | 28 | #include <linux/mmc/host.h> |
| 26 | #include <linux/input.h> | 29 | #include <linux/input.h> |
| 27 | #include <linux/input/sh_keysc.h> | 30 | #include <linux/input/sh_keysc.h> |
| 28 | #include <linux/mfd/sh_mobile_sdhi.h> | ||
| 29 | #include <video/sh_mobile_lcdc.h> | 31 | #include <video/sh_mobile_lcdc.h> |
| 30 | #include <sound/sh_fsi.h> | 32 | #include <sound/sh_fsi.h> |
| 31 | #include <media/sh_mobile_ceu.h> | 33 | #include <media/sh_mobile_ceu.h> |
| @@ -138,7 +140,7 @@ static struct resource sh_eth_resources[] = { | |||
| 138 | }, | 140 | }, |
| 139 | }; | 141 | }; |
| 140 | 142 | ||
| 141 | struct sh_eth_plat_data sh_eth_plat = { | 143 | static struct sh_eth_plat_data sh_eth_plat = { |
| 142 | .phy = 0x1f, /* SMSC LAN8700 */ | 144 | .phy = 0x1f, /* SMSC LAN8700 */ |
| 143 | .edmac_endian = EDMAC_LITTLE_ENDIAN, | 145 | .edmac_endian = EDMAC_LITTLE_ENDIAN, |
| 144 | .ether_link_active_low = 1 | 146 | .ether_link_active_low = 1 |
| @@ -158,7 +160,7 @@ static struct platform_device sh_eth_device = { | |||
| 158 | }; | 160 | }; |
| 159 | 161 | ||
| 160 | /* USB0 host */ | 162 | /* USB0 host */ |
| 161 | void usb0_port_power(int port, int power) | 163 | static void usb0_port_power(int port, int power) |
| 162 | { | 164 | { |
| 163 | gpio_set_value(GPIO_PTB4, power); | 165 | gpio_set_value(GPIO_PTB4, power); |
| 164 | } | 166 | } |
| @@ -194,7 +196,7 @@ static struct platform_device usb0_host_device = { | |||
| 194 | }; | 196 | }; |
| 195 | 197 | ||
| 196 | /* USB1 host/function */ | 198 | /* USB1 host/function */ |
| 197 | void usb1_port_power(int port, int power) | 199 | static void usb1_port_power(int port, int power) |
| 198 | { | 200 | { |
| 199 | gpio_set_value(GPIO_PTB5, power); | 201 | gpio_set_value(GPIO_PTB5, power); |
| 200 | } | 202 | } |
| @@ -420,7 +422,7 @@ static int ts_init(void) | |||
| 420 | return 0; | 422 | return 0; |
| 421 | } | 423 | } |
| 422 | 424 | ||
| 423 | struct tsc2007_platform_data tsc2007_info = { | 425 | static struct tsc2007_platform_data tsc2007_info = { |
| 424 | .model = 2007, | 426 | .model = 2007, |
| 425 | .x_plate_ohms = 180, | 427 | .x_plate_ohms = 180, |
| 426 | .get_pendown_state = ts_get_pendown_state, | 428 | .get_pendown_state = ts_get_pendown_state, |
| @@ -435,14 +437,16 @@ static struct i2c_board_info ts_i2c_clients = { | |||
| 435 | }; | 437 | }; |
| 436 | 438 | ||
| 437 | #ifdef CONFIG_MFD_SH_MOBILE_SDHI | 439 | #ifdef CONFIG_MFD_SH_MOBILE_SDHI |
| 438 | /* SHDI0 */ | 440 | /* SDHI0 */ |
| 439 | static void sdhi0_set_pwr(struct platform_device *pdev, int state) | 441 | static void sdhi0_set_pwr(struct platform_device *pdev, int state) |
| 440 | { | 442 | { |
| 441 | gpio_set_value(GPIO_PTB6, state); | 443 | gpio_set_value(GPIO_PTB6, state); |
| 442 | } | 444 | } |
| 443 | 445 | ||
| 444 | static struct sh_mobile_sdhi_info sdhi0_info = { | 446 | static struct sh_mobile_sdhi_info sdhi0_info = { |
| 445 | .set_pwr = sdhi0_set_pwr, | 447 | .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX, |
| 448 | .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX, | ||
| 449 | .set_pwr = sdhi0_set_pwr, | ||
| 446 | }; | 450 | }; |
| 447 | 451 | ||
| 448 | static struct resource sdhi0_resources[] = { | 452 | static struct resource sdhi0_resources[] = { |
| @@ -471,14 +475,17 @@ static struct platform_device sdhi0_device = { | |||
| 471 | }, | 475 | }, |
| 472 | }; | 476 | }; |
| 473 | 477 | ||
| 474 | /* SHDI1 */ | 478 | #if !defined(CONFIG_MMC_SH_MMCIF) |
| 479 | /* SDHI1 */ | ||
| 475 | static void sdhi1_set_pwr(struct platform_device *pdev, int state) | 480 | static void sdhi1_set_pwr(struct platform_device *pdev, int state) |
| 476 | { | 481 | { |
| 477 | gpio_set_value(GPIO_PTB7, state); | 482 | gpio_set_value(GPIO_PTB7, state); |
| 478 | } | 483 | } |
| 479 | 484 | ||
| 480 | static struct sh_mobile_sdhi_info sdhi1_info = { | 485 | static struct sh_mobile_sdhi_info sdhi1_info = { |
| 481 | .set_pwr = sdhi1_set_pwr, | 486 | .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX, |
| 487 | .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX, | ||
| 488 | .set_pwr = sdhi1_set_pwr, | ||
| 482 | }; | 489 | }; |
| 483 | 490 | ||
| 484 | static struct resource sdhi1_resources[] = { | 491 | static struct resource sdhi1_resources[] = { |
| @@ -506,6 +513,7 @@ static struct platform_device sdhi1_device = { | |||
| 506 | .hwblk_id = HWBLK_SDHI1, | 513 | .hwblk_id = HWBLK_SDHI1, |
| 507 | }, | 514 | }, |
| 508 | }; | 515 | }; |
| 516 | #endif /* CONFIG_MMC_SH_MMCIF */ | ||
| 509 | 517 | ||
| 510 | #else | 518 | #else |
| 511 | 519 | ||
| @@ -715,7 +723,7 @@ static struct clk fsimckb_clk = { | |||
| 715 | .rate = 0, /* unknown */ | 723 | .rate = 0, /* unknown */ |
| 716 | }; | 724 | }; |
| 717 | 725 | ||
| 718 | struct sh_fsi_platform_info fsi_info = { | 726 | static struct sh_fsi_platform_info fsi_info = { |
| 719 | .portb_flags = SH_FSI_BRS_INV | | 727 | .portb_flags = SH_FSI_BRS_INV | |
| 720 | SH_FSI_OUT_SLAVE_MODE | | 728 | SH_FSI_OUT_SLAVE_MODE | |
| 721 | SH_FSI_IN_SLAVE_MODE | | 729 | SH_FSI_IN_SLAVE_MODE | |
| @@ -769,6 +777,103 @@ static struct platform_device irda_device = { | |||
| 769 | .resource = irda_resources, | 777 | .resource = irda_resources, |
| 770 | }; | 778 | }; |
| 771 | 779 | ||
| 780 | #include <media/ak881x.h> | ||
| 781 | #include <media/sh_vou.h> | ||
| 782 | |||
| 783 | static struct ak881x_pdata ak881x_pdata = { | ||
| 784 | .flags = AK881X_IF_MODE_SLAVE, | ||
| 785 | }; | ||
| 786 | |||
| 787 | static struct i2c_board_info ak8813 = { | ||
| 788 | I2C_BOARD_INFO("ak8813", 0x20), | ||
| 789 | .platform_data = &ak881x_pdata, | ||
| 790 | }; | ||
| 791 | |||
| 792 | static struct sh_vou_pdata sh_vou_pdata = { | ||
| 793 | .bus_fmt = SH_VOU_BUS_8BIT, | ||
| 794 | .flags = SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW, | ||
| 795 | .board_info = &ak8813, | ||
| 796 | .i2c_adap = 0, | ||
| 797 | .module_name = "ak881x", | ||
| 798 | }; | ||
| 799 | |||
| 800 | static struct resource sh_vou_resources[] = { | ||
| 801 | [0] = { | ||
| 802 | .start = 0xfe960000, | ||
| 803 | .end = 0xfe962043, | ||
| 804 | .flags = IORESOURCE_MEM, | ||
| 805 | }, | ||
| 806 | [1] = { | ||
| 807 | .start = 55, | ||
| 808 | .flags = IORESOURCE_IRQ, | ||
| 809 | }, | ||
| 810 | }; | ||
| 811 | |||
| 812 | static struct platform_device vou_device = { | ||
| 813 | .name = "sh-vou", | ||
| 814 | .id = -1, | ||
| 815 | .num_resources = ARRAY_SIZE(sh_vou_resources), | ||
| 816 | .resource = sh_vou_resources, | ||
| 817 | .dev = { | ||
| 818 | .platform_data = &sh_vou_pdata, | ||
| 819 | }, | ||
| 820 | .archdata = { | ||
| 821 | .hwblk_id = HWBLK_VOU, | ||
| 822 | }, | ||
| 823 | }; | ||
| 824 | |||
| 825 | #if defined(CONFIG_MMC_SH_MMCIF) | ||
| 826 | /* SH_MMCIF */ | ||
| 827 | static void mmcif_set_pwr(struct platform_device *pdev, int state) | ||
| 828 | { | ||
| 829 | gpio_set_value(GPIO_PTB7, state); | ||
| 830 | } | ||
| 831 | |||
| 832 | static void mmcif_down_pwr(struct platform_device *pdev) | ||
| 833 | { | ||
| 834 | gpio_set_value(GPIO_PTB7, 0); | ||
| 835 | } | ||
| 836 | |||
| 837 | static struct resource sh_mmcif_resources[] = { | ||
| 838 | [0] = { | ||
| 839 | .name = "SH_MMCIF", | ||
| 840 | .start = 0xA4CA0000, | ||
| 841 | .end = 0xA4CA00FF, | ||
| 842 | .flags = IORESOURCE_MEM, | ||
| 843 | }, | ||
| 844 | [1] = { | ||
| 845 | /* MMC2I */ | ||
| 846 | .start = 29, | ||
| 847 | .flags = IORESOURCE_IRQ, | ||
| 848 | }, | ||
| 849 | [2] = { | ||
| 850 | /* MMC3I */ | ||
| 851 | .start = 30, | ||
| 852 | .flags = IORESOURCE_IRQ, | ||
| 853 | }, | ||
| 854 | }; | ||
| 855 | |||
| 856 | static struct sh_mmcif_plat_data sh_mmcif_plat = { | ||
| 857 | .set_pwr = mmcif_set_pwr, | ||
| 858 | .down_pwr = mmcif_down_pwr, | ||
| 859 | .sup_pclk = 0, /* SH7724: Max Pclk/2 */ | ||
| 860 | .caps = MMC_CAP_4_BIT_DATA | | ||
| 861 | MMC_CAP_8_BIT_DATA | | ||
| 862 | MMC_CAP_NEEDS_POLL, | ||
| 863 | .ocr = MMC_VDD_32_33 | MMC_VDD_33_34, | ||
| 864 | }; | ||
| 865 | |||
| 866 | static struct platform_device sh_mmcif_device = { | ||
| 867 | .name = "sh_mmcif", | ||
| 868 | .id = 0, | ||
| 869 | .dev = { | ||
| 870 | .platform_data = &sh_mmcif_plat, | ||
| 871 | }, | ||
| 872 | .num_resources = ARRAY_SIZE(sh_mmcif_resources), | ||
| 873 | .resource = sh_mmcif_resources, | ||
| 874 | }; | ||
| 875 | #endif | ||
| 876 | |||
| 772 | static struct platform_device *ecovec_devices[] __initdata = { | 877 | static struct platform_device *ecovec_devices[] __initdata = { |
| 773 | &heartbeat_device, | 878 | &heartbeat_device, |
| 774 | &nor_flash_device, | 879 | &nor_flash_device, |
| @@ -781,7 +886,9 @@ static struct platform_device *ecovec_devices[] __initdata = { | |||
| 781 | &keysc_device, | 886 | &keysc_device, |
| 782 | #ifdef CONFIG_MFD_SH_MOBILE_SDHI | 887 | #ifdef CONFIG_MFD_SH_MOBILE_SDHI |
| 783 | &sdhi0_device, | 888 | &sdhi0_device, |
| 889 | #if !defined(CONFIG_MMC_SH_MMCIF) | ||
| 784 | &sdhi1_device, | 890 | &sdhi1_device, |
| 891 | #endif | ||
| 785 | #else | 892 | #else |
| 786 | &msiof0_device, | 893 | &msiof0_device, |
| 787 | #endif | 894 | #endif |
| @@ -790,6 +897,10 @@ static struct platform_device *ecovec_devices[] __initdata = { | |||
| 790 | &camera_devices[2], | 897 | &camera_devices[2], |
| 791 | &fsi_device, | 898 | &fsi_device, |
| 792 | &irda_device, | 899 | &irda_device, |
| 900 | &vou_device, | ||
| 901 | #if defined(CONFIG_MMC_SH_MMCIF) | ||
| 902 | &sh_mmcif_device, | ||
| 903 | #endif | ||
| 793 | }; | 904 | }; |
| 794 | 905 | ||
| 795 | #ifdef CONFIG_I2C | 906 | #ifdef CONFIG_I2C |
| @@ -1083,6 +1194,7 @@ static int __init arch_setup(void) | |||
| 1083 | gpio_request(GPIO_PTB6, NULL); | 1194 | gpio_request(GPIO_PTB6, NULL); |
| 1084 | gpio_direction_output(GPIO_PTB6, 0); | 1195 | gpio_direction_output(GPIO_PTB6, 0); |
| 1085 | 1196 | ||
| 1197 | #if !defined(CONFIG_MMC_SH_MMCIF) | ||
| 1086 | /* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */ | 1198 | /* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */ |
| 1087 | gpio_request(GPIO_FN_SDHI1CD, NULL); | 1199 | gpio_request(GPIO_FN_SDHI1CD, NULL); |
| 1088 | gpio_request(GPIO_FN_SDHI1WP, NULL); | 1200 | gpio_request(GPIO_FN_SDHI1WP, NULL); |
| @@ -1097,6 +1209,7 @@ static int __init arch_setup(void) | |||
| 1097 | 1209 | ||
| 1098 | /* I/O buffer drive ability is high for SDHI1 */ | 1210 | /* I/O buffer drive ability is high for SDHI1 */ |
| 1099 | __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA); | 1211 | __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA); |
| 1212 | #endif /* CONFIG_MMC_SH_MMCIF */ | ||
| 1100 | #else | 1213 | #else |
| 1101 | /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */ | 1214 | /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */ |
| 1102 | gpio_request(GPIO_FN_MSIOF0_TXD, NULL); | 1215 | gpio_request(GPIO_FN_MSIOF0_TXD, NULL); |
| @@ -1172,6 +1285,25 @@ static int __init arch_setup(void) | |||
| 1172 | gpio_request(GPIO_PTU5, NULL); | 1285 | gpio_request(GPIO_PTU5, NULL); |
| 1173 | gpio_direction_output(GPIO_PTU5, 0); | 1286 | gpio_direction_output(GPIO_PTU5, 0); |
| 1174 | 1287 | ||
| 1288 | #if defined(CONFIG_MMC_SH_MMCIF) | ||
| 1289 | /* enable MMCIF (needs DS2.6,7 set to OFF,ON) */ | ||
| 1290 | gpio_request(GPIO_FN_MMC_D7, NULL); | ||
| 1291 | gpio_request(GPIO_FN_MMC_D6, NULL); | ||
| 1292 | gpio_request(GPIO_FN_MMC_D5, NULL); | ||
| 1293 | gpio_request(GPIO_FN_MMC_D4, NULL); | ||
| 1294 | gpio_request(GPIO_FN_MMC_D3, NULL); | ||
| 1295 | gpio_request(GPIO_FN_MMC_D2, NULL); | ||
| 1296 | gpio_request(GPIO_FN_MMC_D1, NULL); | ||
| 1297 | gpio_request(GPIO_FN_MMC_D0, NULL); | ||
| 1298 | gpio_request(GPIO_FN_MMC_CLK, NULL); | ||
| 1299 | gpio_request(GPIO_FN_MMC_CMD, NULL); | ||
| 1300 | gpio_request(GPIO_PTB7, NULL); | ||
| 1301 | gpio_direction_output(GPIO_PTB7, 0); | ||
| 1302 | |||
| 1303 | /* I/O buffer drive ability is high for MMCIF */ | ||
| 1304 | __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA); | ||
| 1305 | #endif | ||
| 1306 | |||
| 1175 | /* enable I2C device */ | 1307 | /* enable I2C device */ |
| 1176 | i2c_register_board_info(0, i2c0_devices, | 1308 | i2c_register_board_info(0, i2c0_devices, |
| 1177 | ARRAY_SIZE(i2c0_devices)); | 1309 | ARRAY_SIZE(i2c0_devices)); |
| @@ -1179,6 +1311,38 @@ static int __init arch_setup(void) | |||
| 1179 | i2c_register_board_info(1, i2c1_devices, | 1311 | i2c_register_board_info(1, i2c1_devices, |
| 1180 | ARRAY_SIZE(i2c1_devices)); | 1312 | ARRAY_SIZE(i2c1_devices)); |
| 1181 | 1313 | ||
| 1314 | /* VOU */ | ||
| 1315 | gpio_request(GPIO_FN_DV_D15, NULL); | ||
| 1316 | gpio_request(GPIO_FN_DV_D14, NULL); | ||
| 1317 | gpio_request(GPIO_FN_DV_D13, NULL); | ||
| 1318 | gpio_request(GPIO_FN_DV_D12, NULL); | ||
| 1319 | gpio_request(GPIO_FN_DV_D11, NULL); | ||
| 1320 | gpio_request(GPIO_FN_DV_D10, NULL); | ||
| 1321 | gpio_request(GPIO_FN_DV_D9, NULL); | ||
| 1322 | gpio_request(GPIO_FN_DV_D8, NULL); | ||
| 1323 | gpio_request(GPIO_FN_DV_CLKI, NULL); | ||
| 1324 | gpio_request(GPIO_FN_DV_CLK, NULL); | ||
| 1325 | gpio_request(GPIO_FN_DV_VSYNC, NULL); | ||
| 1326 | gpio_request(GPIO_FN_DV_HSYNC, NULL); | ||
| 1327 | |||
| 1328 | /* AK8813 power / reset sequence */ | ||
| 1329 | gpio_request(GPIO_PTG4, NULL); | ||
| 1330 | gpio_request(GPIO_PTU3, NULL); | ||
| 1331 | /* Reset */ | ||
| 1332 | gpio_direction_output(GPIO_PTG4, 0); | ||
| 1333 | /* Power down */ | ||
| 1334 | gpio_direction_output(GPIO_PTU3, 1); | ||
| 1335 | |||
| 1336 | udelay(10); | ||
| 1337 | |||
| 1338 | /* Power up, reset */ | ||
| 1339 | gpio_set_value(GPIO_PTU3, 0); | ||
| 1340 | |||
| 1341 | udelay(10); | ||
| 1342 | |||
| 1343 | /* Remove reset */ | ||
| 1344 | gpio_set_value(GPIO_PTG4, 1); | ||
| 1345 | |||
| 1182 | return platform_add_devices(ecovec_devices, | 1346 | return platform_add_devices(ecovec_devices, |
| 1183 | ARRAY_SIZE(ecovec_devices)); | 1347 | ARRAY_SIZE(ecovec_devices)); |
| 1184 | } | 1348 | } |
diff --git a/arch/sh/boards/mach-kfr2r09/setup.c b/arch/sh/boards/mach-kfr2r09/setup.c index b2cd0ed8664e..68994a163f6c 100644 --- a/arch/sh/boards/mach-kfr2r09/setup.c +++ b/arch/sh/boards/mach-kfr2r09/setup.c | |||
| @@ -10,6 +10,8 @@ | |||
| 10 | #include <linux/init.h> | 10 | #include <linux/init.h> |
| 11 | #include <linux/platform_device.h> | 11 | #include <linux/platform_device.h> |
| 12 | #include <linux/interrupt.h> | 12 | #include <linux/interrupt.h> |
| 13 | #include <linux/mfd/sh_mobile_sdhi.h> | ||
| 14 | #include <linux/mfd/tmio.h> | ||
| 13 | #include <linux/mtd/physmap.h> | 15 | #include <linux/mtd/physmap.h> |
| 14 | #include <linux/mtd/onenand.h> | 16 | #include <linux/mtd/onenand.h> |
| 15 | #include <linux/delay.h> | 17 | #include <linux/delay.h> |
| @@ -356,10 +358,19 @@ static struct resource kfr2r09_sh_sdhi0_resources[] = { | |||
| 356 | }, | 358 | }, |
| 357 | }; | 359 | }; |
| 358 | 360 | ||
| 361 | static struct sh_mobile_sdhi_info sh7724_sdhi0_data = { | ||
| 362 | .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX, | ||
| 363 | .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX, | ||
| 364 | .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE, | ||
| 365 | }; | ||
| 366 | |||
| 359 | static struct platform_device kfr2r09_sh_sdhi0_device = { | 367 | static struct platform_device kfr2r09_sh_sdhi0_device = { |
| 360 | .name = "sh_mobile_sdhi", | 368 | .name = "sh_mobile_sdhi", |
| 361 | .num_resources = ARRAY_SIZE(kfr2r09_sh_sdhi0_resources), | 369 | .num_resources = ARRAY_SIZE(kfr2r09_sh_sdhi0_resources), |
| 362 | .resource = kfr2r09_sh_sdhi0_resources, | 370 | .resource = kfr2r09_sh_sdhi0_resources, |
| 371 | .dev = { | ||
| 372 | .platform_data = &sh7724_sdhi0_data, | ||
| 373 | }, | ||
| 363 | .archdata = { | 374 | .archdata = { |
| 364 | .hwblk_id = HWBLK_SDHI0, | 375 | .hwblk_id = HWBLK_SDHI0, |
| 365 | }, | 376 | }, |
diff --git a/arch/sh/boards/mach-migor/setup.c b/arch/sh/boards/mach-migor/setup.c index 7da0fc94a01e..662debe4ead2 100644 --- a/arch/sh/boards/mach-migor/setup.c +++ b/arch/sh/boards/mach-migor/setup.c | |||
| @@ -12,6 +12,7 @@ | |||
| 12 | #include <linux/interrupt.h> | 12 | #include <linux/interrupt.h> |
| 13 | #include <linux/input.h> | 13 | #include <linux/input.h> |
| 14 | #include <linux/input/sh_keysc.h> | 14 | #include <linux/input/sh_keysc.h> |
| 15 | #include <linux/mfd/sh_mobile_sdhi.h> | ||
| 15 | #include <linux/mtd/physmap.h> | 16 | #include <linux/mtd/physmap.h> |
| 16 | #include <linux/mtd/nand.h> | 17 | #include <linux/mtd/nand.h> |
| 17 | #include <linux/i2c.h> | 18 | #include <linux/i2c.h> |
| @@ -180,7 +181,7 @@ static int migor_nand_flash_ready(struct mtd_info *mtd) | |||
| 180 | return gpio_get_value(GPIO_PTA1); /* NAND_RBn */ | 181 | return gpio_get_value(GPIO_PTA1); /* NAND_RBn */ |
| 181 | } | 182 | } |
| 182 | 183 | ||
| 183 | struct platform_nand_data migor_nand_flash_data = { | 184 | static struct platform_nand_data migor_nand_flash_data = { |
| 184 | .chip = { | 185 | .chip = { |
| 185 | .nr_chips = 1, | 186 | .nr_chips = 1, |
| 186 | .partitions = migor_nand_flash_partitions, | 187 | .partitions = migor_nand_flash_partitions, |
| @@ -402,10 +403,18 @@ static struct resource sdhi_cn9_resources[] = { | |||
| 402 | }, | 403 | }, |
| 403 | }; | 404 | }; |
| 404 | 405 | ||
| 406 | static struct sh_mobile_sdhi_info sh7724_sdhi_data = { | ||
| 407 | .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX, | ||
| 408 | .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX, | ||
| 409 | }; | ||
| 410 | |||
| 405 | static struct platform_device sdhi_cn9_device = { | 411 | static struct platform_device sdhi_cn9_device = { |
| 406 | .name = "sh_mobile_sdhi", | 412 | .name = "sh_mobile_sdhi", |
| 407 | .num_resources = ARRAY_SIZE(sdhi_cn9_resources), | 413 | .num_resources = ARRAY_SIZE(sdhi_cn9_resources), |
| 408 | .resource = sdhi_cn9_resources, | 414 | .resource = sdhi_cn9_resources, |
| 415 | .dev = { | ||
| 416 | .platform_data = &sh7724_sdhi_data, | ||
| 417 | }, | ||
| 409 | .archdata = { | 418 | .archdata = { |
| 410 | .hwblk_id = HWBLK_SDHI, | 419 | .hwblk_id = HWBLK_SDHI, |
| 411 | }, | 420 | }, |
diff --git a/arch/sh/boards/mach-se/7724/setup.c b/arch/sh/boards/mach-se/7724/setup.c index e74ae7b0d8bf..552ebd9ba82b 100644 --- a/arch/sh/boards/mach-se/7724/setup.c +++ b/arch/sh/boards/mach-se/7724/setup.c | |||
| @@ -14,6 +14,7 @@ | |||
| 14 | #include <linux/device.h> | 14 | #include <linux/device.h> |
| 15 | #include <linux/interrupt.h> | 15 | #include <linux/interrupt.h> |
| 16 | #include <linux/platform_device.h> | 16 | #include <linux/platform_device.h> |
| 17 | #include <linux/mfd/sh_mobile_sdhi.h> | ||
| 17 | #include <linux/mtd/physmap.h> | 18 | #include <linux/mtd/physmap.h> |
| 18 | #include <linux/delay.h> | 19 | #include <linux/delay.h> |
| 19 | #include <linux/smc91x.h> | 20 | #include <linux/smc91x.h> |
| @@ -282,7 +283,7 @@ static struct clk fsimcka_clk = { | |||
| 282 | }; | 283 | }; |
| 283 | 284 | ||
| 284 | /* change J20, J21, J22 pin to 1-2 connection to use slave mode */ | 285 | /* change J20, J21, J22 pin to 1-2 connection to use slave mode */ |
| 285 | struct sh_fsi_platform_info fsi_info = { | 286 | static struct sh_fsi_platform_info fsi_info = { |
| 286 | .porta_flags = SH_FSI_BRS_INV | | 287 | .porta_flags = SH_FSI_BRS_INV | |
| 287 | SH_FSI_OUT_SLAVE_MODE | | 288 | SH_FSI_OUT_SLAVE_MODE | |
| 288 | SH_FSI_IN_SLAVE_MODE | | 289 | SH_FSI_IN_SLAVE_MODE | |
| @@ -370,7 +371,7 @@ static struct resource sh_eth_resources[] = { | |||
| 370 | }, | 371 | }, |
| 371 | }; | 372 | }; |
| 372 | 373 | ||
| 373 | struct sh_eth_plat_data sh_eth_plat = { | 374 | static struct sh_eth_plat_data sh_eth_plat = { |
| 374 | .phy = 0x1f, /* SMSC LAN8187 */ | 375 | .phy = 0x1f, /* SMSC LAN8187 */ |
| 375 | .edmac_endian = EDMAC_LITTLE_ENDIAN, | 376 | .edmac_endian = EDMAC_LITTLE_ENDIAN, |
| 376 | }; | 377 | }; |
| @@ -462,11 +463,19 @@ static struct resource sdhi0_cn7_resources[] = { | |||
| 462 | }, | 463 | }, |
| 463 | }; | 464 | }; |
| 464 | 465 | ||
| 466 | static struct sh_mobile_sdhi_info sh7724_sdhi0_data = { | ||
| 467 | .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX, | ||
| 468 | .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX, | ||
| 469 | }; | ||
| 470 | |||
| 465 | static struct platform_device sdhi0_cn7_device = { | 471 | static struct platform_device sdhi0_cn7_device = { |
| 466 | .name = "sh_mobile_sdhi", | 472 | .name = "sh_mobile_sdhi", |
| 467 | .id = 0, | 473 | .id = 0, |
| 468 | .num_resources = ARRAY_SIZE(sdhi0_cn7_resources), | 474 | .num_resources = ARRAY_SIZE(sdhi0_cn7_resources), |
| 469 | .resource = sdhi0_cn7_resources, | 475 | .resource = sdhi0_cn7_resources, |
| 476 | .dev = { | ||
| 477 | .platform_data = &sh7724_sdhi0_data, | ||
| 478 | }, | ||
| 470 | .archdata = { | 479 | .archdata = { |
| 471 | .hwblk_id = HWBLK_SDHI0, | 480 | .hwblk_id = HWBLK_SDHI0, |
| 472 | }, | 481 | }, |
| @@ -485,11 +494,19 @@ static struct resource sdhi1_cn8_resources[] = { | |||
| 485 | }, | 494 | }, |
| 486 | }; | 495 | }; |
| 487 | 496 | ||
| 497 | static struct sh_mobile_sdhi_info sh7724_sdhi1_data = { | ||
| 498 | .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX, | ||
| 499 | .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX, | ||
| 500 | }; | ||
| 501 | |||
| 488 | static struct platform_device sdhi1_cn8_device = { | 502 | static struct platform_device sdhi1_cn8_device = { |
| 489 | .name = "sh_mobile_sdhi", | 503 | .name = "sh_mobile_sdhi", |
| 490 | .id = 1, | 504 | .id = 1, |
| 491 | .num_resources = ARRAY_SIZE(sdhi1_cn8_resources), | 505 | .num_resources = ARRAY_SIZE(sdhi1_cn8_resources), |
| 492 | .resource = sdhi1_cn8_resources, | 506 | .resource = sdhi1_cn8_resources, |
| 507 | .dev = { | ||
| 508 | .platform_data = &sh7724_sdhi1_data, | ||
| 509 | }, | ||
| 493 | .archdata = { | 510 | .archdata = { |
| 494 | .hwblk_id = HWBLK_SDHI1, | 511 | .hwblk_id = HWBLK_SDHI1, |
| 495 | }, | 512 | }, |
| @@ -515,6 +532,52 @@ static struct platform_device irda_device = { | |||
| 515 | .resource = irda_resources, | 532 | .resource = irda_resources, |
| 516 | }; | 533 | }; |
| 517 | 534 | ||
| 535 | #include <media/ak881x.h> | ||
| 536 | #include <media/sh_vou.h> | ||
| 537 | |||
| 538 | static struct ak881x_pdata ak881x_pdata = { | ||
| 539 | .flags = AK881X_IF_MODE_SLAVE, | ||
| 540 | }; | ||
| 541 | |||
| 542 | static struct i2c_board_info ak8813 = { | ||
| 543 | /* With open J18 jumper address is 0x21 */ | ||
| 544 | I2C_BOARD_INFO("ak8813", 0x20), | ||
| 545 | .platform_data = &ak881x_pdata, | ||
| 546 | }; | ||
| 547 | |||
| 548 | static struct sh_vou_pdata sh_vou_pdata = { | ||
| 549 | .bus_fmt = SH_VOU_BUS_8BIT, | ||
| 550 | .flags = SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW, | ||
| 551 | .board_info = &ak8813, | ||
| 552 | .i2c_adap = 0, | ||
| 553 | .module_name = "ak881x", | ||
| 554 | }; | ||
| 555 | |||
| 556 | static struct resource sh_vou_resources[] = { | ||
| 557 | [0] = { | ||
| 558 | .start = 0xfe960000, | ||
| 559 | .end = 0xfe962043, | ||
| 560 | .flags = IORESOURCE_MEM, | ||
| 561 | }, | ||
| 562 | [1] = { | ||
| 563 | .start = 55, | ||
| 564 | .flags = IORESOURCE_IRQ, | ||
| 565 | }, | ||
| 566 | }; | ||
| 567 | |||
| 568 | static struct platform_device vou_device = { | ||
| 569 | .name = "sh-vou", | ||
| 570 | .id = -1, | ||
| 571 | .num_resources = ARRAY_SIZE(sh_vou_resources), | ||
| 572 | .resource = sh_vou_resources, | ||
| 573 | .dev = { | ||
| 574 | .platform_data = &sh_vou_pdata, | ||
| 575 | }, | ||
| 576 | .archdata = { | ||
| 577 | .hwblk_id = HWBLK_VOU, | ||
| 578 | }, | ||
| 579 | }; | ||
| 580 | |||
| 518 | static struct platform_device *ms7724se_devices[] __initdata = { | 581 | static struct platform_device *ms7724se_devices[] __initdata = { |
| 519 | &heartbeat_device, | 582 | &heartbeat_device, |
| 520 | &smc91x_eth_device, | 583 | &smc91x_eth_device, |
| @@ -530,6 +593,7 @@ static struct platform_device *ms7724se_devices[] __initdata = { | |||
| 530 | &sdhi0_cn7_device, | 593 | &sdhi0_cn7_device, |
| 531 | &sdhi1_cn8_device, | 594 | &sdhi1_cn8_device, |
| 532 | &irda_device, | 595 | &irda_device, |
| 596 | &vou_device, | ||
| 533 | }; | 597 | }; |
| 534 | 598 | ||
| 535 | /* I2C device */ | 599 | /* I2C device */ |
| @@ -614,6 +678,7 @@ static int __init devices_setup(void) | |||
| 614 | { | 678 | { |
| 615 | u16 sw = __raw_readw(SW4140); /* select camera, monitor */ | 679 | u16 sw = __raw_readw(SW4140); /* select camera, monitor */ |
| 616 | struct clk *clk; | 680 | struct clk *clk; |
| 681 | u16 fpga_out; | ||
| 617 | 682 | ||
| 618 | /* register board specific self-refresh code */ | 683 | /* register board specific self-refresh code */ |
| 619 | sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF | | 684 | sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF | |
| @@ -623,14 +688,26 @@ static int __init devices_setup(void) | |||
| 623 | &ms7724se_sdram_leave_start, | 688 | &ms7724se_sdram_leave_start, |
| 624 | &ms7724se_sdram_leave_end); | 689 | &ms7724se_sdram_leave_end); |
| 625 | /* Reset Release */ | 690 | /* Reset Release */ |
| 626 | __raw_writew(__raw_readw(FPGA_OUT) & | 691 | fpga_out = __raw_readw(FPGA_OUT); |
| 627 | ~((1 << 1) | /* LAN */ | 692 | /* bit4: NTSC_PDN, bit5: NTSC_RESET */ |
| 628 | (1 << 6) | /* VIDEO DAC */ | 693 | fpga_out &= ~((1 << 1) | /* LAN */ |
| 629 | (1 << 7) | /* AK4643 */ | 694 | (1 << 4) | /* AK8813 PDN */ |
| 630 | (1 << 8) | /* IrDA */ | 695 | (1 << 5) | /* AK8813 RESET */ |
| 631 | (1 << 12) | /* USB0 */ | 696 | (1 << 6) | /* VIDEO DAC */ |
| 632 | (1 << 14)), /* RMII */ | 697 | (1 << 7) | /* AK4643 */ |
| 633 | FPGA_OUT); | 698 | (1 << 8) | /* IrDA */ |
| 699 | (1 << 12) | /* USB0 */ | ||
| 700 | (1 << 14)); /* RMII */ | ||
| 701 | __raw_writew(fpga_out | (1 << 4), FPGA_OUT); | ||
| 702 | |||
| 703 | udelay(10); | ||
| 704 | |||
| 705 | /* AK8813 RESET */ | ||
| 706 | __raw_writew(fpga_out | (1 << 5), FPGA_OUT); | ||
| 707 | |||
| 708 | udelay(10); | ||
| 709 | |||
| 710 | __raw_writew(fpga_out, FPGA_OUT); | ||
| 634 | 711 | ||
| 635 | /* turn on USB clocks, use external clock */ | 712 | /* turn on USB clocks, use external clock */ |
| 636 | __raw_writew((__raw_readw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB); | 713 | __raw_writew((__raw_readw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB); |
| @@ -862,6 +939,20 @@ static int __init devices_setup(void) | |||
| 862 | lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL; | 939 | lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL; |
| 863 | } | 940 | } |
| 864 | 941 | ||
| 942 | /* VOU */ | ||
| 943 | gpio_request(GPIO_FN_DV_D15, NULL); | ||
| 944 | gpio_request(GPIO_FN_DV_D14, NULL); | ||
| 945 | gpio_request(GPIO_FN_DV_D13, NULL); | ||
| 946 | gpio_request(GPIO_FN_DV_D12, NULL); | ||
| 947 | gpio_request(GPIO_FN_DV_D11, NULL); | ||
| 948 | gpio_request(GPIO_FN_DV_D10, NULL); | ||
| 949 | gpio_request(GPIO_FN_DV_D9, NULL); | ||
| 950 | gpio_request(GPIO_FN_DV_D8, NULL); | ||
| 951 | gpio_request(GPIO_FN_DV_CLKI, NULL); | ||
| 952 | gpio_request(GPIO_FN_DV_CLK, NULL); | ||
| 953 | gpio_request(GPIO_FN_DV_VSYNC, NULL); | ||
| 954 | gpio_request(GPIO_FN_DV_HSYNC, NULL); | ||
| 955 | |||
| 865 | return platform_add_devices(ms7724se_devices, | 956 | return platform_add_devices(ms7724se_devices, |
| 866 | ARRAY_SIZE(ms7724se_devices)); | 957 | ARRAY_SIZE(ms7724se_devices)); |
| 867 | } | 958 | } |
diff --git a/arch/sh/boot/compressed/vmlinux.scr b/arch/sh/boot/compressed/vmlinux.scr index f02382ae5c48..862d74808236 100644 --- a/arch/sh/boot/compressed/vmlinux.scr +++ b/arch/sh/boot/compressed/vmlinux.scr | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | SECTIONS | 1 | SECTIONS |
| 2 | { | 2 | { |
| 3 | .rodata.compressed : { | 3 | .rodata..compressed : { |
| 4 | input_len = .; | 4 | input_len = .; |
| 5 | LONG(input_data_end - input_data) input_data = .; | 5 | LONG(input_data_end - input_data) input_data = .; |
| 6 | *(.data) | 6 | *(.data) |
diff --git a/arch/sh/boot/romimage/Makefile b/arch/sh/boot/romimage/Makefile index f473a24a2d92..2216ee57f251 100644 --- a/arch/sh/boot/romimage/Makefile +++ b/arch/sh/boot/romimage/Makefile | |||
| @@ -1,16 +1,21 @@ | |||
| 1 | # | 1 | # |
| 2 | # linux/arch/sh/boot/romimage/Makefile | 2 | # linux/arch/sh/boot/romimage/Makefile |
| 3 | # | 3 | # |
| 4 | # create an image suitable for burning to flash from zImage | 4 | # create an romImage file suitable for burning to flash/mmc from zImage |
| 5 | # | 5 | # |
| 6 | 6 | ||
| 7 | targets := vmlinux head.o zeropage.bin piggy.o | 7 | targets := vmlinux head.o zeropage.bin piggy.o |
| 8 | load-y := 0 | ||
| 8 | 9 | ||
| 9 | OBJECTS = $(obj)/head.o | 10 | mmcif-load-$(CONFIG_CPU_SUBTYPE_SH7724) := 0xe5200000 # ILRAM |
| 10 | LDFLAGS_vmlinux := --oformat $(ld-bfd) -Ttext 0 -e romstart \ | 11 | mmcif-obj-$(CONFIG_CPU_SUBTYPE_SH7724) := $(obj)/mmcif-sh7724.o |
| 12 | load-$(CONFIG_ROMIMAGE_MMCIF) := $(mmcif-load-y) | ||
| 13 | obj-$(CONFIG_ROMIMAGE_MMCIF) := $(mmcif-obj-y) | ||
| 14 | |||
| 15 | LDFLAGS_vmlinux := --oformat $(ld-bfd) -Ttext $(load-y) -e romstart \ | ||
| 11 | -T $(obj)/../../kernel/vmlinux.lds | 16 | -T $(obj)/../../kernel/vmlinux.lds |
| 12 | 17 | ||
| 13 | $(obj)/vmlinux: $(OBJECTS) $(obj)/piggy.o FORCE | 18 | $(obj)/vmlinux: $(obj)/head.o $(obj-y) $(obj)/piggy.o FORCE |
| 14 | $(call if_changed,ld) | 19 | $(call if_changed,ld) |
| 15 | @: | 20 | @: |
| 16 | 21 | ||
diff --git a/arch/sh/boot/romimage/head.S b/arch/sh/boot/romimage/head.S index 93e779a405ec..4671d1b82150 100644 --- a/arch/sh/boot/romimage/head.S +++ b/arch/sh/boot/romimage/head.S | |||
| @@ -12,8 +12,40 @@ romstart: | |||
| 12 | /* include board specific setup code */ | 12 | /* include board specific setup code */ |
| 13 | #include <mach/romimage.h> | 13 | #include <mach/romimage.h> |
| 14 | 14 | ||
| 15 | #ifdef CONFIG_ROMIMAGE_MMCIF | ||
| 16 | /* load the romImage to above the empty zero page */ | ||
| 17 | mov.l empty_zero_page_dst, r4 | ||
| 18 | mov.l empty_zero_page_dst_adj, r5 | ||
| 19 | add r5, r4 | ||
| 20 | mov.l bytes_to_load, r5 | ||
| 21 | mov.l loader_function, r7 | ||
| 22 | jsr @r7 | ||
| 23 | mov r4, r15 | ||
| 24 | |||
| 25 | mov.l empty_zero_page_dst, r4 | ||
| 26 | mov.l empty_zero_page_dst_adj, r5 | ||
| 27 | add r5, r4 | ||
| 28 | mov.l loaded_code_offs, r5 | ||
| 29 | add r5, r4 | ||
| 30 | jmp @r4 | ||
| 31 | nop | ||
| 32 | |||
| 33 | .balign 4 | ||
| 34 | empty_zero_page_dst_adj: | ||
| 35 | .long PAGE_SIZE | ||
| 36 | bytes_to_load: | ||
| 37 | .long end_data - romstart | ||
| 38 | loader_function: | ||
| 39 | .long mmcif_loader | ||
| 40 | loaded_code_offs: | ||
| 41 | .long loaded_code - romstart | ||
| 42 | loaded_code: | ||
| 43 | #endif /* CONFIG_ROMIMAGE_MMCIF */ | ||
| 44 | |||
| 15 | /* copy the empty_zero_page contents to where vmlinux expects it */ | 45 | /* copy the empty_zero_page contents to where vmlinux expects it */ |
| 16 | mova empty_zero_page_src, r0 | 46 | mova extra_data_pos, r0 |
| 47 | mov.l extra_data_size, r1 | ||
| 48 | add r1, r0 | ||
| 17 | mov.l empty_zero_page_dst, r1 | 49 | mov.l empty_zero_page_dst, r1 |
| 18 | mov #(PAGE_SHIFT - 4), r4 | 50 | mov #(PAGE_SHIFT - 4), r4 |
| 19 | mov #1, r3 | 51 | mov #1, r3 |
| @@ -37,7 +69,9 @@ romstart: | |||
| 37 | mov #PAGE_SHIFT, r4 | 69 | mov #PAGE_SHIFT, r4 |
| 38 | mov #1, r1 | 70 | mov #1, r1 |
| 39 | shld r4, r1 | 71 | shld r4, r1 |
| 40 | mova empty_zero_page_src, r0 | 72 | mova extra_data_pos, r0 |
| 73 | add r1, r0 | ||
| 74 | mov.l extra_data_size, r1 | ||
| 41 | add r1, r0 | 75 | add r1, r0 |
| 42 | jmp @r0 | 76 | jmp @r0 |
| 43 | nop | 77 | nop |
| @@ -45,4 +79,6 @@ romstart: | |||
| 45 | .align 2 | 79 | .align 2 |
| 46 | empty_zero_page_dst: | 80 | empty_zero_page_dst: |
| 47 | .long _text | 81 | .long _text |
| 48 | empty_zero_page_src: | 82 | extra_data_pos: |
| 83 | extra_data_size: | ||
| 84 | .long zero_page_pos - extra_data_pos | ||
diff --git a/arch/sh/boot/romimage/mmcif-sh7724.c b/arch/sh/boot/romimage/mmcif-sh7724.c new file mode 100644 index 000000000000..14863d7292cb --- /dev/null +++ b/arch/sh/boot/romimage/mmcif-sh7724.c | |||
| @@ -0,0 +1,72 @@ | |||
| 1 | /* | ||
| 2 | * sh7724 MMCIF loader | ||
| 3 | * | ||
| 4 | * Copyright (C) 2010 Magnus Damm | ||
| 5 | * | ||
| 6 | * This file is subject to the terms and conditions of the GNU General Public | ||
| 7 | * License. See the file "COPYING" in the main directory of this archive | ||
| 8 | * for more details. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #include <linux/mmc/sh_mmcif.h> | ||
| 12 | #include <mach/romimage.h> | ||
| 13 | |||
| 14 | #define MMCIF_BASE (void __iomem *)0xa4ca0000 | ||
| 15 | |||
| 16 | #define MSTPCR2 0xa4150038 | ||
| 17 | #define PTWCR 0xa4050146 | ||
| 18 | #define PTXCR 0xa4050148 | ||
| 19 | #define PSELA 0xa405014e | ||
| 20 | #define PSELE 0xa4050156 | ||
| 21 | #define HIZCRC 0xa405015c | ||
| 22 | #define DRVCRA 0xa405018a | ||
| 23 | |||
| 24 | enum { MMCIF_PROGRESS_ENTER, MMCIF_PROGRESS_INIT, | ||
| 25 | MMCIF_PROGRESS_LOAD, MMCIF_PROGRESS_DONE }; | ||
| 26 | |||
| 27 | /* SH7724 specific MMCIF loader | ||
| 28 | * | ||
| 29 | * loads the romImage from an MMC card starting from block 512 | ||
| 30 | * use the following line to write the romImage to an MMC card | ||
| 31 | * # dd if=arch/sh/boot/romImage of=/dev/sdx bs=512 seek=512 | ||
| 32 | */ | ||
| 33 | asmlinkage void mmcif_loader(unsigned char *buf, unsigned long no_bytes) | ||
| 34 | { | ||
| 35 | mmcif_update_progress(MMCIF_PROGRESS_ENTER); | ||
| 36 | |||
| 37 | /* enable clock to the MMCIF hardware block */ | ||
| 38 | __raw_writel(__raw_readl(MSTPCR2) & ~0x20000000, MSTPCR2); | ||
| 39 | |||
| 40 | /* setup pins D7-D0 */ | ||
| 41 | __raw_writew(0x0000, PTWCR); | ||
| 42 | |||
| 43 | /* setup pins MMC_CLK, MMC_CMD */ | ||
| 44 | __raw_writew(__raw_readw(PTXCR) & ~0x000f, PTXCR); | ||
| 45 | |||
| 46 | /* select D3-D0 pin function */ | ||
| 47 | __raw_writew(__raw_readw(PSELA) & ~0x2000, PSELA); | ||
| 48 | |||
| 49 | /* select D7-D4 pin function */ | ||
| 50 | __raw_writew(__raw_readw(PSELE) & ~0x3000, PSELE); | ||
| 51 | |||
| 52 | /* disable Hi-Z for the MMC pins */ | ||
| 53 | __raw_writew(__raw_readw(HIZCRC) & ~0x0620, HIZCRC); | ||
| 54 | |||
| 55 | /* high drive capability for MMC pins */ | ||
| 56 | __raw_writew(__raw_readw(DRVCRA) | 0x3000, DRVCRA); | ||
| 57 | |||
| 58 | mmcif_update_progress(MMCIF_PROGRESS_INIT); | ||
| 59 | |||
| 60 | /* setup MMCIF hardware */ | ||
| 61 | sh_mmcif_boot_init(MMCIF_BASE); | ||
| 62 | |||
| 63 | mmcif_update_progress(MMCIF_PROGRESS_LOAD); | ||
| 64 | |||
| 65 | /* load kernel via MMCIF interface */ | ||
| 66 | sh_mmcif_boot_slurp(MMCIF_BASE, buf, no_bytes); | ||
| 67 | |||
| 68 | /* disable clock to the MMCIF hardware block */ | ||
| 69 | __raw_writel(__raw_readl(MSTPCR2) | 0x20000000, MSTPCR2); | ||
| 70 | |||
| 71 | mmcif_update_progress(MMCIF_PROGRESS_DONE); | ||
| 72 | } | ||
diff --git a/arch/sh/boot/romimage/vmlinux.scr b/arch/sh/boot/romimage/vmlinux.scr index 287c08f8b4bb..590394e2f5f2 100644 --- a/arch/sh/boot/romimage/vmlinux.scr +++ b/arch/sh/boot/romimage/vmlinux.scr | |||
| @@ -1,6 +1,8 @@ | |||
| 1 | SECTIONS | 1 | SECTIONS |
| 2 | { | 2 | { |
| 3 | .text : { | 3 | .text : { |
| 4 | zero_page_pos = .; | ||
| 4 | *(.data) | 5 | *(.data) |
| 6 | end_data = .; | ||
| 5 | } | 7 | } |
| 6 | } | 8 | } |
diff --git a/arch/sh/configs/sh7785lcr_32bit_defconfig b/arch/sh/configs/sh7785lcr_32bit_defconfig index e9af616b2160..71f39c71b04b 100644 --- a/arch/sh/configs/sh7785lcr_32bit_defconfig +++ b/arch/sh/configs/sh7785lcr_32bit_defconfig | |||
| @@ -1,7 +1,7 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.34-rc5 | 3 | # Linux kernel version: 2.6.34 |
| 4 | # Tue May 18 17:22:09 2010 | 4 | # Mon May 24 08:33:02 2010 |
| 5 | # | 5 | # |
| 6 | CONFIG_SUPERH=y | 6 | CONFIG_SUPERH=y |
| 7 | CONFIG_SUPERH32=y | 7 | CONFIG_SUPERH32=y |
| @@ -76,7 +76,7 @@ CONFIG_RCU_FANOUT=32 | |||
| 76 | # CONFIG_TREE_RCU_TRACE is not set | 76 | # CONFIG_TREE_RCU_TRACE is not set |
| 77 | CONFIG_IKCONFIG=y | 77 | CONFIG_IKCONFIG=y |
| 78 | CONFIG_IKCONFIG_PROC=y | 78 | CONFIG_IKCONFIG_PROC=y |
| 79 | CONFIG_LOG_BUF_SHIFT=14 | 79 | CONFIG_LOG_BUF_SHIFT=16 |
| 80 | # CONFIG_CGROUPS is not set | 80 | # CONFIG_CGROUPS is not set |
| 81 | # CONFIG_SYSFS_DEPRECATED_V2 is not set | 81 | # CONFIG_SYSFS_DEPRECATED_V2 is not set |
| 82 | # CONFIG_RELAY is not set | 82 | # CONFIG_RELAY is not set |
| @@ -111,18 +111,17 @@ CONFIG_PERF_USE_VMALLOC=y | |||
| 111 | # | 111 | # |
| 112 | CONFIG_PERF_EVENTS=y | 112 | CONFIG_PERF_EVENTS=y |
| 113 | CONFIG_PERF_COUNTERS=y | 113 | CONFIG_PERF_COUNTERS=y |
| 114 | # CONFIG_DEBUG_PERF_USE_VMALLOC is not set | ||
| 114 | CONFIG_VM_EVENT_COUNTERS=y | 115 | CONFIG_VM_EVENT_COUNTERS=y |
| 115 | CONFIG_PCI_QUIRKS=y | 116 | CONFIG_PCI_QUIRKS=y |
| 116 | CONFIG_COMPAT_BRK=y | 117 | # CONFIG_COMPAT_BRK is not set |
| 117 | CONFIG_SLAB=y | 118 | CONFIG_SLAB=y |
| 118 | # CONFIG_SLUB is not set | 119 | # CONFIG_SLUB is not set |
| 119 | # CONFIG_SLOB is not set | 120 | # CONFIG_SLOB is not set |
| 120 | CONFIG_PROFILING=y | 121 | CONFIG_PROFILING=y |
| 121 | CONFIG_TRACEPOINTS=y | 122 | # CONFIG_OPROFILE is not set |
| 122 | CONFIG_OPROFILE=y | ||
| 123 | CONFIG_HAVE_OPROFILE=y | 123 | CONFIG_HAVE_OPROFILE=y |
| 124 | CONFIG_KPROBES=y | 124 | # CONFIG_KPROBES is not set |
| 125 | CONFIG_KRETPROBES=y | ||
| 126 | CONFIG_HAVE_KPROBES=y | 125 | CONFIG_HAVE_KPROBES=y |
| 127 | CONFIG_HAVE_KRETPROBES=y | 126 | CONFIG_HAVE_KRETPROBES=y |
| 128 | CONFIG_HAVE_ARCH_TRACEHOOK=y | 127 | CONFIG_HAVE_ARCH_TRACEHOOK=y |
| @@ -130,6 +129,7 @@ CONFIG_HAVE_DMA_ATTRS=y | |||
| 130 | CONFIG_HAVE_CLK=y | 129 | CONFIG_HAVE_CLK=y |
| 131 | CONFIG_HAVE_DMA_API_DEBUG=y | 130 | CONFIG_HAVE_DMA_API_DEBUG=y |
| 132 | CONFIG_HAVE_HW_BREAKPOINT=y | 131 | CONFIG_HAVE_HW_BREAKPOINT=y |
| 132 | CONFIG_HAVE_MIXED_BREAKPOINTS_REGS=y | ||
| 133 | 133 | ||
| 134 | # | 134 | # |
| 135 | # GCOV-based kernel profiling | 135 | # GCOV-based kernel profiling |
| @@ -243,8 +243,9 @@ CONFIG_PAGE_OFFSET=0x80000000 | |||
| 243 | CONFIG_FORCE_MAX_ZONEORDER=11 | 243 | CONFIG_FORCE_MAX_ZONEORDER=11 |
| 244 | CONFIG_MEMORY_START=0x40000000 | 244 | CONFIG_MEMORY_START=0x40000000 |
| 245 | CONFIG_MEMORY_SIZE=0x20000000 | 245 | CONFIG_MEMORY_SIZE=0x20000000 |
| 246 | CONFIG_29BIT=y | 246 | # CONFIG_29BIT is not set |
| 247 | # CONFIG_PMB is not set | 247 | CONFIG_32BIT=y |
| 248 | CONFIG_PMB=y | ||
| 248 | CONFIG_X2TLB=y | 249 | CONFIG_X2TLB=y |
| 249 | CONFIG_VSYSCALL=y | 250 | CONFIG_VSYSCALL=y |
| 250 | # CONFIG_NUMA is not set | 251 | # CONFIG_NUMA is not set |
| @@ -262,9 +263,9 @@ CONFIG_PAGE_SIZE_4KB=y | |||
| 262 | # CONFIG_PAGE_SIZE_8KB is not set | 263 | # CONFIG_PAGE_SIZE_8KB is not set |
| 263 | # CONFIG_PAGE_SIZE_16KB is not set | 264 | # CONFIG_PAGE_SIZE_16KB is not set |
| 264 | # CONFIG_PAGE_SIZE_64KB is not set | 265 | # CONFIG_PAGE_SIZE_64KB is not set |
| 265 | CONFIG_HUGETLB_PAGE_SIZE_64K=y | 266 | # CONFIG_HUGETLB_PAGE_SIZE_64K is not set |
| 266 | # CONFIG_HUGETLB_PAGE_SIZE_256K is not set | 267 | # CONFIG_HUGETLB_PAGE_SIZE_256K is not set |
| 267 | # CONFIG_HUGETLB_PAGE_SIZE_1MB is not set | 268 | CONFIG_HUGETLB_PAGE_SIZE_1MB=y |
| 268 | # CONFIG_HUGETLB_PAGE_SIZE_4MB is not set | 269 | # CONFIG_HUGETLB_PAGE_SIZE_4MB is not set |
| 269 | # CONFIG_HUGETLB_PAGE_SIZE_64MB is not set | 270 | # CONFIG_HUGETLB_PAGE_SIZE_64MB is not set |
| 270 | # CONFIG_HUGETLB_PAGE_SIZE_512MB is not set | 271 | # CONFIG_HUGETLB_PAGE_SIZE_512MB is not set |
| @@ -276,7 +277,7 @@ CONFIG_SPARSEMEM=y | |||
| 276 | CONFIG_HAVE_MEMORY_PRESENT=y | 277 | CONFIG_HAVE_MEMORY_PRESENT=y |
| 277 | CONFIG_SPARSEMEM_STATIC=y | 278 | CONFIG_SPARSEMEM_STATIC=y |
| 278 | # CONFIG_MEMORY_HOTPLUG is not set | 279 | # CONFIG_MEMORY_HOTPLUG is not set |
| 279 | CONFIG_SPLIT_PTLOCK_CPUS=4 | 280 | CONFIG_SPLIT_PTLOCK_CPUS=999999 |
| 280 | CONFIG_MIGRATION=y | 281 | CONFIG_MIGRATION=y |
| 281 | # CONFIG_PHYS_ADDR_T_64BIT is not set | 282 | # CONFIG_PHYS_ADDR_T_64BIT is not set |
| 282 | CONFIG_ZONE_DMA_FLAG=0 | 283 | CONFIG_ZONE_DMA_FLAG=0 |
| @@ -298,7 +299,7 @@ CONFIG_CPU_LITTLE_ENDIAN=y | |||
| 298 | # CONFIG_CPU_BIG_ENDIAN is not set | 299 | # CONFIG_CPU_BIG_ENDIAN is not set |
| 299 | CONFIG_SH_FPU=y | 300 | CONFIG_SH_FPU=y |
| 300 | CONFIG_SH_STORE_QUEUES=y | 301 | CONFIG_SH_STORE_QUEUES=y |
| 301 | # CONFIG_SPECULATIVE_EXECUTION is not set | 302 | CONFIG_SPECULATIVE_EXECUTION=y |
| 302 | CONFIG_CPU_HAS_INTEVT=y | 303 | CONFIG_CPU_HAS_INTEVT=y |
| 303 | CONFIG_CPU_HAS_SR_RB=y | 304 | CONFIG_CPU_HAS_SR_RB=y |
| 304 | CONFIG_CPU_HAS_FPU=y | 305 | CONFIG_CPU_HAS_FPU=y |
| @@ -308,7 +309,7 @@ CONFIG_CPU_HAS_FPU=y | |||
| 308 | # | 309 | # |
| 309 | # CONFIG_SH_HIGHLANDER is not set | 310 | # CONFIG_SH_HIGHLANDER is not set |
| 310 | CONFIG_SH_SH7785LCR=y | 311 | CONFIG_SH_SH7785LCR=y |
| 311 | CONFIG_SH_SH7785LCR_29BIT_PHYSMAPS=y | 312 | # CONFIG_SH_SH7785LCR_PT is not set |
| 312 | 313 | ||
| 313 | # | 314 | # |
| 314 | # Timer and clock configuration | 315 | # Timer and clock configuration |
| @@ -371,7 +372,7 @@ CONFIG_SECCOMP=y | |||
| 371 | # CONFIG_PREEMPT_VOLUNTARY is not set | 372 | # CONFIG_PREEMPT_VOLUNTARY is not set |
| 372 | CONFIG_PREEMPT=y | 373 | CONFIG_PREEMPT=y |
| 373 | CONFIG_GUSA=y | 374 | CONFIG_GUSA=y |
| 374 | # CONFIG_INTC_USERIMASK is not set | 375 | CONFIG_INTC_USERIMASK=y |
| 375 | 376 | ||
| 376 | # | 377 | # |
| 377 | # Boot options | 378 | # Boot options |
| @@ -389,6 +390,7 @@ CONFIG_PCI=y | |||
| 389 | CONFIG_PCI_DOMAINS=y | 390 | CONFIG_PCI_DOMAINS=y |
| 390 | # CONFIG_PCIEPORTBUS is not set | 391 | # CONFIG_PCIEPORTBUS is not set |
| 391 | # CONFIG_ARCH_SUPPORTS_MSI is not set | 392 | # CONFIG_ARCH_SUPPORTS_MSI is not set |
| 393 | CONFIG_PCI_DEBUG=y | ||
| 392 | # CONFIG_PCI_STUB is not set | 394 | # CONFIG_PCI_STUB is not set |
| 393 | # CONFIG_PCI_IOV is not set | 395 | # CONFIG_PCI_IOV is not set |
| 394 | # CONFIG_PCCARD is not set | 396 | # CONFIG_PCCARD is not set |
| @@ -465,6 +467,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic" | |||
| 465 | # CONFIG_RDS is not set | 467 | # CONFIG_RDS is not set |
| 466 | # CONFIG_TIPC is not set | 468 | # CONFIG_TIPC is not set |
| 467 | # CONFIG_ATM is not set | 469 | # CONFIG_ATM is not set |
| 470 | # CONFIG_L2TP is not set | ||
| 468 | # CONFIG_BRIDGE is not set | 471 | # CONFIG_BRIDGE is not set |
| 469 | # CONFIG_NET_DSA is not set | 472 | # CONFIG_NET_DSA is not set |
| 470 | # CONFIG_VLAN_8021Q is not set | 473 | # CONFIG_VLAN_8021Q is not set |
| @@ -485,8 +488,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic" | |||
| 485 | # Network testing | 488 | # Network testing |
| 486 | # | 489 | # |
| 487 | # CONFIG_NET_PKTGEN is not set | 490 | # CONFIG_NET_PKTGEN is not set |
| 488 | # CONFIG_NET_TCPPROBE is not set | ||
| 489 | # CONFIG_NET_DROP_MONITOR is not set | ||
| 490 | # CONFIG_HAMRADIO is not set | 491 | # CONFIG_HAMRADIO is not set |
| 491 | # CONFIG_CAN is not set | 492 | # CONFIG_CAN is not set |
| 492 | # CONFIG_IRDA is not set | 493 | # CONFIG_IRDA is not set |
| @@ -499,11 +500,20 @@ CONFIG_WIRELESS=y | |||
| 499 | # | 500 | # |
| 500 | # CFG80211 needs to be enabled for MAC80211 | 501 | # CFG80211 needs to be enabled for MAC80211 |
| 501 | # | 502 | # |
| 503 | |||
| 504 | # | ||
| 505 | # Some wireless drivers require a rate control algorithm | ||
| 506 | # | ||
| 502 | # CONFIG_WIMAX is not set | 507 | # CONFIG_WIMAX is not set |
| 503 | # CONFIG_RFKILL is not set | 508 | # CONFIG_RFKILL is not set |
| 504 | # CONFIG_NET_9P is not set | 509 | # CONFIG_NET_9P is not set |
| 505 | 510 | ||
| 506 | # | 511 | # |
| 512 | # CAIF Support | ||
| 513 | # | ||
| 514 | # CONFIG_CAIF is not set | ||
| 515 | |||
| 516 | # | ||
| 507 | # Device Drivers | 517 | # Device Drivers |
| 508 | # | 518 | # |
| 509 | 519 | ||
| @@ -514,7 +524,11 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | |||
| 514 | # CONFIG_DEVTMPFS is not set | 524 | # CONFIG_DEVTMPFS is not set |
| 515 | CONFIG_STANDALONE=y | 525 | CONFIG_STANDALONE=y |
| 516 | CONFIG_PREVENT_FIRMWARE_BUILD=y | 526 | CONFIG_PREVENT_FIRMWARE_BUILD=y |
| 517 | # CONFIG_FW_LOADER is not set | 527 | CONFIG_FW_LOADER=y |
| 528 | CONFIG_FIRMWARE_IN_KERNEL=y | ||
| 529 | CONFIG_EXTRA_FIRMWARE="" | ||
| 530 | # CONFIG_DEBUG_DRIVER is not set | ||
| 531 | # CONFIG_DEBUG_DEVRES is not set | ||
| 518 | # CONFIG_SYS_HYPERVISOR is not set | 532 | # CONFIG_SYS_HYPERVISOR is not set |
| 519 | # CONFIG_CONNECTOR is not set | 533 | # CONFIG_CONNECTOR is not set |
| 520 | CONFIG_MTD=y | 534 | CONFIG_MTD=y |
| @@ -537,6 +551,7 @@ CONFIG_MTD_BLOCK=y | |||
| 537 | # CONFIG_INFTL is not set | 551 | # CONFIG_INFTL is not set |
| 538 | # CONFIG_RFD_FTL is not set | 552 | # CONFIG_RFD_FTL is not set |
| 539 | # CONFIG_SSFDC is not set | 553 | # CONFIG_SSFDC is not set |
| 554 | # CONFIG_SM_FTL is not set | ||
| 540 | # CONFIG_MTD_OOPS is not set | 555 | # CONFIG_MTD_OOPS is not set |
| 541 | 556 | ||
| 542 | # | 557 | # |
| @@ -668,7 +683,9 @@ CONFIG_ATA=y | |||
| 668 | CONFIG_ATA_VERBOSE_ERROR=y | 683 | CONFIG_ATA_VERBOSE_ERROR=y |
| 669 | CONFIG_SATA_PMP=y | 684 | CONFIG_SATA_PMP=y |
| 670 | # CONFIG_SATA_AHCI is not set | 685 | # CONFIG_SATA_AHCI is not set |
| 686 | # CONFIG_SATA_AHCI_PLATFORM is not set | ||
| 671 | # CONFIG_SATA_SIL24 is not set | 687 | # CONFIG_SATA_SIL24 is not set |
| 688 | # CONFIG_SATA_INIC162X is not set | ||
| 672 | CONFIG_ATA_SFF=y | 689 | CONFIG_ATA_SFF=y |
| 673 | # CONFIG_SATA_SVW is not set | 690 | # CONFIG_SATA_SVW is not set |
| 674 | # CONFIG_ATA_PIIX is not set | 691 | # CONFIG_ATA_PIIX is not set |
| @@ -683,7 +700,6 @@ CONFIG_SATA_SIL=y | |||
| 683 | # CONFIG_SATA_ULI is not set | 700 | # CONFIG_SATA_ULI is not set |
| 684 | # CONFIG_SATA_VIA is not set | 701 | # CONFIG_SATA_VIA is not set |
| 685 | # CONFIG_SATA_VITESSE is not set | 702 | # CONFIG_SATA_VITESSE is not set |
| 686 | # CONFIG_SATA_INIC162X is not set | ||
| 687 | # CONFIG_PATA_ALI is not set | 703 | # CONFIG_PATA_ALI is not set |
| 688 | # CONFIG_PATA_AMD is not set | 704 | # CONFIG_PATA_AMD is not set |
| 689 | # CONFIG_PATA_ARTOP is not set | 705 | # CONFIG_PATA_ARTOP is not set |
| @@ -753,8 +769,36 @@ CONFIG_NETDEVICES=y | |||
| 753 | # CONFIG_TUN is not set | 769 | # CONFIG_TUN is not set |
| 754 | # CONFIG_VETH is not set | 770 | # CONFIG_VETH is not set |
| 755 | # CONFIG_ARCNET is not set | 771 | # CONFIG_ARCNET is not set |
| 756 | # CONFIG_NET_ETHERNET is not set | 772 | # CONFIG_PHYLIB is not set |
| 773 | CONFIG_NET_ETHERNET=y | ||
| 757 | CONFIG_MII=y | 774 | CONFIG_MII=y |
| 775 | # CONFIG_AX88796 is not set | ||
| 776 | # CONFIG_STNIC is not set | ||
| 777 | # CONFIG_HAPPYMEAL is not set | ||
| 778 | # CONFIG_SUNGEM is not set | ||
| 779 | # CONFIG_CASSINI is not set | ||
| 780 | CONFIG_NET_VENDOR_3COM=y | ||
| 781 | CONFIG_VORTEX=y | ||
| 782 | # CONFIG_TYPHOON is not set | ||
| 783 | # CONFIG_SMC91X is not set | ||
| 784 | # CONFIG_ETHOC is not set | ||
| 785 | # CONFIG_SMC911X is not set | ||
| 786 | # CONFIG_SMSC911X is not set | ||
| 787 | # CONFIG_DNET is not set | ||
| 788 | # CONFIG_NET_TULIP is not set | ||
| 789 | # CONFIG_HP100 is not set | ||
| 790 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
| 791 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
| 792 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
| 793 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
| 794 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
| 795 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
| 796 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
| 797 | # CONFIG_NET_PCI is not set | ||
| 798 | # CONFIG_B44 is not set | ||
| 799 | # CONFIG_KS8842 is not set | ||
| 800 | # CONFIG_KS8851_MLL is not set | ||
| 801 | # CONFIG_ATL2 is not set | ||
| 758 | CONFIG_NETDEV_1000=y | 802 | CONFIG_NETDEV_1000=y |
| 759 | # CONFIG_ACENIC is not set | 803 | # CONFIG_ACENIC is not set |
| 760 | # CONFIG_DL2K is not set | 804 | # CONFIG_DL2K is not set |
| @@ -836,6 +880,7 @@ CONFIG_INPUT_KEYBOARD=y | |||
| 836 | CONFIG_KEYBOARD_ATKBD=y | 880 | CONFIG_KEYBOARD_ATKBD=y |
| 837 | # CONFIG_QT2160 is not set | 881 | # CONFIG_QT2160 is not set |
| 838 | # CONFIG_KEYBOARD_LKKBD is not set | 882 | # CONFIG_KEYBOARD_LKKBD is not set |
| 883 | # CONFIG_KEYBOARD_TCA6416 is not set | ||
| 839 | # CONFIG_KEYBOARD_MAX7359 is not set | 884 | # CONFIG_KEYBOARD_MAX7359 is not set |
| 840 | # CONFIG_KEYBOARD_NEWTON is not set | 885 | # CONFIG_KEYBOARD_NEWTON is not set |
| 841 | # CONFIG_KEYBOARD_OPENCORES is not set | 886 | # CONFIG_KEYBOARD_OPENCORES is not set |
| @@ -884,6 +929,7 @@ CONFIG_HW_CONSOLE=y | |||
| 884 | CONFIG_VT_HW_CONSOLE_BINDING=y | 929 | CONFIG_VT_HW_CONSOLE_BINDING=y |
| 885 | # CONFIG_DEVKMEM is not set | 930 | # CONFIG_DEVKMEM is not set |
| 886 | # CONFIG_SERIAL_NONSTANDARD is not set | 931 | # CONFIG_SERIAL_NONSTANDARD is not set |
| 932 | # CONFIG_N_GSM is not set | ||
| 887 | # CONFIG_NOZOMI is not set | 933 | # CONFIG_NOZOMI is not set |
| 888 | 934 | ||
| 889 | # | 935 | # |
| @@ -901,6 +947,8 @@ CONFIG_SERIAL_CORE=y | |||
| 901 | CONFIG_SERIAL_CORE_CONSOLE=y | 947 | CONFIG_SERIAL_CORE_CONSOLE=y |
| 902 | # CONFIG_SERIAL_JSM is not set | 948 | # CONFIG_SERIAL_JSM is not set |
| 903 | # CONFIG_SERIAL_TIMBERDALE is not set | 949 | # CONFIG_SERIAL_TIMBERDALE is not set |
| 950 | # CONFIG_SERIAL_ALTERA_JTAGUART is not set | ||
| 951 | # CONFIG_SERIAL_ALTERA_UART is not set | ||
| 904 | CONFIG_UNIX98_PTYS=y | 952 | CONFIG_UNIX98_PTYS=y |
| 905 | CONFIG_DEVPTS_MULTIPLE_INSTANCES=y | 953 | CONFIG_DEVPTS_MULTIPLE_INSTANCES=y |
| 906 | # CONFIG_LEGACY_PTYS is not set | 954 | # CONFIG_LEGACY_PTYS is not set |
| @@ -1071,7 +1119,7 @@ CONFIG_FB_CFB_IMAGEBLIT=y | |||
| 1071 | # CONFIG_FB_SIS is not set | 1119 | # CONFIG_FB_SIS is not set |
| 1072 | # CONFIG_FB_VIA is not set | 1120 | # CONFIG_FB_VIA is not set |
| 1073 | # CONFIG_FB_NEOMAGIC is not set | 1121 | # CONFIG_FB_NEOMAGIC is not set |
| 1074 | # CONFIG_FB_KYRO is not set | 1122 | CONFIG_FB_KYRO=y |
| 1075 | # CONFIG_FB_3DFX is not set | 1123 | # CONFIG_FB_3DFX is not set |
| 1076 | # CONFIG_FB_VOODOO1 is not set | 1124 | # CONFIG_FB_VOODOO1 is not set |
| 1077 | # CONFIG_FB_VT8623 is not set | 1125 | # CONFIG_FB_VT8623 is not set |
| @@ -1097,15 +1145,15 @@ CONFIG_FB_SM501=y | |||
| 1097 | # | 1145 | # |
| 1098 | CONFIG_DUMMY_CONSOLE=y | 1146 | CONFIG_DUMMY_CONSOLE=y |
| 1099 | CONFIG_FRAMEBUFFER_CONSOLE=y | 1147 | CONFIG_FRAMEBUFFER_CONSOLE=y |
| 1100 | # CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set | 1148 | CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y |
| 1101 | # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set | 1149 | # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set |
| 1102 | # CONFIG_FONTS is not set | 1150 | # CONFIG_FONTS is not set |
| 1103 | CONFIG_FONT_8x8=y | 1151 | CONFIG_FONT_8x8=y |
| 1104 | CONFIG_FONT_8x16=y | 1152 | CONFIG_FONT_8x16=y |
| 1105 | CONFIG_LOGO=y | 1153 | CONFIG_LOGO=y |
| 1106 | # CONFIG_LOGO_LINUX_MONO is not set | 1154 | CONFIG_LOGO_LINUX_MONO=y |
| 1107 | # CONFIG_LOGO_LINUX_VGA16 is not set | 1155 | CONFIG_LOGO_LINUX_VGA16=y |
| 1108 | # CONFIG_LOGO_LINUX_CLUT224 is not set | 1156 | CONFIG_LOGO_LINUX_CLUT224=y |
| 1109 | CONFIG_LOGO_SUPERH_MONO=y | 1157 | CONFIG_LOGO_SUPERH_MONO=y |
| 1110 | CONFIG_LOGO_SUPERH_VGA16=y | 1158 | CONFIG_LOGO_SUPERH_VGA16=y |
| 1111 | CONFIG_LOGO_SUPERH_CLUT224=y | 1159 | CONFIG_LOGO_SUPERH_CLUT224=y |
| @@ -1129,15 +1177,18 @@ CONFIG_SND_SEQ_HRTIMER_DEFAULT=y | |||
| 1129 | CONFIG_SND_DYNAMIC_MINORS=y | 1177 | CONFIG_SND_DYNAMIC_MINORS=y |
| 1130 | # CONFIG_SND_SUPPORT_OLD_API is not set | 1178 | # CONFIG_SND_SUPPORT_OLD_API is not set |
| 1131 | # CONFIG_SND_VERBOSE_PROCFS is not set | 1179 | # CONFIG_SND_VERBOSE_PROCFS is not set |
| 1132 | # CONFIG_SND_VERBOSE_PRINTK is not set | 1180 | CONFIG_SND_VERBOSE_PRINTK=y |
| 1133 | # CONFIG_SND_DEBUG is not set | 1181 | CONFIG_SND_DEBUG=y |
| 1182 | CONFIG_SND_DEBUG_VERBOSE=y | ||
| 1183 | CONFIG_SND_VMASTER=y | ||
| 1134 | CONFIG_SND_RAWMIDI_SEQ=y | 1184 | CONFIG_SND_RAWMIDI_SEQ=y |
| 1135 | CONFIG_SND_OPL3_LIB_SEQ=y | 1185 | CONFIG_SND_OPL3_LIB_SEQ=y |
| 1136 | # CONFIG_SND_OPL4_LIB_SEQ is not set | 1186 | # CONFIG_SND_OPL4_LIB_SEQ is not set |
| 1137 | # CONFIG_SND_SBAWE_SEQ is not set | 1187 | # CONFIG_SND_SBAWE_SEQ is not set |
| 1138 | # CONFIG_SND_EMU10K1_SEQ is not set | 1188 | CONFIG_SND_EMU10K1_SEQ=y |
| 1139 | CONFIG_SND_MPU401_UART=y | 1189 | CONFIG_SND_MPU401_UART=y |
| 1140 | CONFIG_SND_OPL3_LIB=y | 1190 | CONFIG_SND_OPL3_LIB=y |
| 1191 | CONFIG_SND_AC97_CODEC=y | ||
| 1141 | # CONFIG_SND_DRIVERS is not set | 1192 | # CONFIG_SND_DRIVERS is not set |
| 1142 | CONFIG_SND_PCI=y | 1193 | CONFIG_SND_PCI=y |
| 1143 | # CONFIG_SND_AD1889 is not set | 1194 | # CONFIG_SND_AD1889 is not set |
| @@ -1172,7 +1223,7 @@ CONFIG_SND_CMIPCI=y | |||
| 1172 | # CONFIG_SND_INDIGODJ is not set | 1223 | # CONFIG_SND_INDIGODJ is not set |
| 1173 | # CONFIG_SND_INDIGOIOX is not set | 1224 | # CONFIG_SND_INDIGOIOX is not set |
| 1174 | # CONFIG_SND_INDIGODJX is not set | 1225 | # CONFIG_SND_INDIGODJX is not set |
| 1175 | # CONFIG_SND_EMU10K1 is not set | 1226 | CONFIG_SND_EMU10K1=y |
| 1176 | # CONFIG_SND_EMU10K1X is not set | 1227 | # CONFIG_SND_EMU10K1X is not set |
| 1177 | # CONFIG_SND_ENS1370 is not set | 1228 | # CONFIG_SND_ENS1370 is not set |
| 1178 | # CONFIG_SND_ENS1371 is not set | 1229 | # CONFIG_SND_ENS1371 is not set |
| @@ -1211,6 +1262,7 @@ CONFIG_SND_USB=y | |||
| 1211 | # CONFIG_SND_USB_CAIAQ is not set | 1262 | # CONFIG_SND_USB_CAIAQ is not set |
| 1212 | # CONFIG_SND_SOC is not set | 1263 | # CONFIG_SND_SOC is not set |
| 1213 | # CONFIG_SOUND_PRIME is not set | 1264 | # CONFIG_SOUND_PRIME is not set |
| 1265 | CONFIG_AC97_BUS=y | ||
| 1214 | CONFIG_HID_SUPPORT=y | 1266 | CONFIG_HID_SUPPORT=y |
| 1215 | CONFIG_HID=y | 1267 | CONFIG_HID=y |
| 1216 | # CONFIG_HIDRAW is not set | 1268 | # CONFIG_HIDRAW is not set |
| @@ -1226,44 +1278,42 @@ CONFIG_USB_HID=y | |||
| 1226 | # Special HID drivers | 1278 | # Special HID drivers |
| 1227 | # | 1279 | # |
| 1228 | # CONFIG_HID_3M_PCT is not set | 1280 | # CONFIG_HID_3M_PCT is not set |
| 1229 | CONFIG_HID_A4TECH=m | 1281 | # CONFIG_HID_A4TECH is not set |
| 1230 | CONFIG_HID_APPLE=m | 1282 | # CONFIG_HID_APPLE is not set |
| 1231 | CONFIG_HID_BELKIN=m | 1283 | # CONFIG_HID_BELKIN is not set |
| 1232 | CONFIG_HID_CHERRY=m | 1284 | # CONFIG_HID_CANDO is not set |
| 1233 | CONFIG_HID_CHICONY=m | 1285 | # CONFIG_HID_CHERRY is not set |
| 1234 | CONFIG_HID_CYPRESS=m | 1286 | # CONFIG_HID_CHICONY is not set |
| 1235 | CONFIG_HID_DRAGONRISE=m | 1287 | # CONFIG_HID_PRODIKEYS is not set |
| 1236 | # CONFIG_DRAGONRISE_FF is not set | 1288 | # CONFIG_HID_CYPRESS is not set |
| 1237 | CONFIG_HID_EZKEY=m | 1289 | # CONFIG_HID_DRAGONRISE is not set |
| 1238 | CONFIG_HID_KYE=m | 1290 | # CONFIG_HID_EGALAX is not set |
| 1239 | CONFIG_HID_GYRATION=m | 1291 | # CONFIG_HID_EZKEY is not set |
| 1240 | CONFIG_HID_TWINHAN=m | 1292 | # CONFIG_HID_KYE is not set |
| 1241 | CONFIG_HID_KENSINGTON=m | 1293 | # CONFIG_HID_GYRATION is not set |
| 1242 | CONFIG_HID_LOGITECH=m | 1294 | # CONFIG_HID_TWINHAN is not set |
| 1243 | # CONFIG_LOGITECH_FF is not set | 1295 | # CONFIG_HID_KENSINGTON is not set |
| 1244 | # CONFIG_LOGIRUMBLEPAD2_FF is not set | 1296 | # CONFIG_HID_LOGITECH is not set |
| 1245 | # CONFIG_LOGIG940_FF is not set | 1297 | # CONFIG_HID_MICROSOFT is not set |
| 1246 | CONFIG_HID_MICROSOFT=m | ||
| 1247 | # CONFIG_HID_MOSART is not set | 1298 | # CONFIG_HID_MOSART is not set |
| 1248 | CONFIG_HID_MONTEREY=m | 1299 | # CONFIG_HID_MONTEREY is not set |
| 1249 | CONFIG_HID_NTRIG=m | 1300 | # CONFIG_HID_NTRIG is not set |
| 1250 | # CONFIG_HID_ORTEK is not set | 1301 | # CONFIG_HID_ORTEK is not set |
| 1251 | CONFIG_HID_PANTHERLORD=m | 1302 | # CONFIG_HID_PANTHERLORD is not set |
| 1252 | # CONFIG_PANTHERLORD_FF is not set | 1303 | # CONFIG_HID_PETALYNX is not set |
| 1253 | CONFIG_HID_PETALYNX=m | 1304 | # CONFIG_HID_PICOLCD is not set |
| 1254 | # CONFIG_HID_QUANTA is not set | 1305 | # CONFIG_HID_QUANTA is not set |
| 1255 | CONFIG_HID_SAMSUNG=m | 1306 | # CONFIG_HID_ROCCAT_KONE is not set |
| 1256 | CONFIG_HID_SONY=m | 1307 | # CONFIG_HID_SAMSUNG is not set |
| 1308 | # CONFIG_HID_SONY is not set | ||
| 1257 | # CONFIG_HID_STANTUM is not set | 1309 | # CONFIG_HID_STANTUM is not set |
| 1258 | CONFIG_HID_SUNPLUS=m | 1310 | # CONFIG_HID_SUNPLUS is not set |
| 1259 | CONFIG_HID_GREENASIA=m | 1311 | # CONFIG_HID_GREENASIA is not set |
| 1260 | # CONFIG_GREENASIA_FF is not set | 1312 | # CONFIG_HID_SMARTJOYPLUS is not set |
| 1261 | CONFIG_HID_SMARTJOYPLUS=m | 1313 | # CONFIG_HID_TOPSEED is not set |
| 1262 | # CONFIG_SMARTJOYPLUS_FF is not set | ||
| 1263 | CONFIG_HID_TOPSEED=m | ||
| 1264 | # CONFIG_HID_THRUSTMASTER is not set | 1314 | # CONFIG_HID_THRUSTMASTER is not set |
| 1265 | CONFIG_HID_ZEROPLUS=m | 1315 | # CONFIG_HID_ZEROPLUS is not set |
| 1266 | # CONFIG_ZEROPLUS_FF is not set | 1316 | # CONFIG_HID_ZYDACRON is not set |
| 1267 | CONFIG_USB_SUPPORT=y | 1317 | CONFIG_USB_SUPPORT=y |
| 1268 | CONFIG_USB_ARCH_HAS_HCD=y | 1318 | CONFIG_USB_ARCH_HAS_HCD=y |
| 1269 | CONFIG_USB_ARCH_HAS_OHCI=y | 1319 | CONFIG_USB_ARCH_HAS_OHCI=y |
| @@ -1276,9 +1326,8 @@ CONFIG_USB=y | |||
| 1276 | # Miscellaneous USB options | 1326 | # Miscellaneous USB options |
| 1277 | # | 1327 | # |
| 1278 | # CONFIG_USB_DEVICEFS is not set | 1328 | # CONFIG_USB_DEVICEFS is not set |
| 1279 | CONFIG_USB_DEVICE_CLASS=y | 1329 | # CONFIG_USB_DEVICE_CLASS is not set |
| 1280 | # CONFIG_USB_DYNAMIC_MINORS is not set | 1330 | # CONFIG_USB_DYNAMIC_MINORS is not set |
| 1281 | # CONFIG_USB_OTG is not set | ||
| 1282 | # CONFIG_USB_OTG_WHITELIST is not set | 1331 | # CONFIG_USB_OTG_WHITELIST is not set |
| 1283 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set | 1332 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set |
| 1284 | # CONFIG_USB_MON is not set | 1333 | # CONFIG_USB_MON is not set |
| @@ -1290,9 +1339,7 @@ CONFIG_USB_DEVICE_CLASS=y | |||
| 1290 | # | 1339 | # |
| 1291 | # CONFIG_USB_C67X00_HCD is not set | 1340 | # CONFIG_USB_C67X00_HCD is not set |
| 1292 | # CONFIG_USB_XHCI_HCD is not set | 1341 | # CONFIG_USB_XHCI_HCD is not set |
| 1293 | CONFIG_USB_EHCI_HCD=m | 1342 | # CONFIG_USB_EHCI_HCD is not set |
| 1294 | # CONFIG_USB_EHCI_ROOT_HUB_TT is not set | ||
| 1295 | # CONFIG_USB_EHCI_TT_NEWSCHED is not set | ||
| 1296 | # CONFIG_USB_OXU210HP_HCD is not set | 1343 | # CONFIG_USB_OXU210HP_HCD is not set |
| 1297 | # CONFIG_USB_ISP116X_HCD is not set | 1344 | # CONFIG_USB_ISP116X_HCD is not set |
| 1298 | # CONFIG_USB_ISP1760_HCD is not set | 1345 | # CONFIG_USB_ISP1760_HCD is not set |
| @@ -1361,7 +1408,6 @@ CONFIG_USB_STORAGE=y | |||
| 1361 | # CONFIG_USB_IDMOUSE is not set | 1408 | # CONFIG_USB_IDMOUSE is not set |
| 1362 | # CONFIG_USB_FTDI_ELAN is not set | 1409 | # CONFIG_USB_FTDI_ELAN is not set |
| 1363 | # CONFIG_USB_APPLEDISPLAY is not set | 1410 | # CONFIG_USB_APPLEDISPLAY is not set |
| 1364 | # CONFIG_USB_SISUSBVGA is not set | ||
| 1365 | # CONFIG_USB_LD is not set | 1411 | # CONFIG_USB_LD is not set |
| 1366 | # CONFIG_USB_TRANCEVIBRATOR is not set | 1412 | # CONFIG_USB_TRANCEVIBRATOR is not set |
| 1367 | # CONFIG_USB_IOWARRIOR is not set | 1413 | # CONFIG_USB_IOWARRIOR is not set |
| @@ -1464,6 +1510,7 @@ CONFIG_DMADEVICES=y | |||
| 1464 | # | 1510 | # |
| 1465 | # DMA Devices | 1511 | # DMA Devices |
| 1466 | # | 1512 | # |
| 1513 | # CONFIG_TIMB_DMA is not set | ||
| 1467 | # CONFIG_AUXDISPLAY is not set | 1514 | # CONFIG_AUXDISPLAY is not set |
| 1468 | CONFIG_UIO=m | 1515 | CONFIG_UIO=m |
| 1469 | # CONFIG_UIO_CIF is not set | 1516 | # CONFIG_UIO_CIF is not set |
| @@ -1473,10 +1520,6 @@ CONFIG_UIO=m | |||
| 1473 | # CONFIG_UIO_SERCOS3 is not set | 1520 | # CONFIG_UIO_SERCOS3 is not set |
| 1474 | # CONFIG_UIO_PCI_GENERIC is not set | 1521 | # CONFIG_UIO_PCI_GENERIC is not set |
| 1475 | # CONFIG_UIO_NETX is not set | 1522 | # CONFIG_UIO_NETX is not set |
| 1476 | |||
| 1477 | # | ||
| 1478 | # TI VLYNQ | ||
| 1479 | # | ||
| 1480 | # CONFIG_STAGING is not set | 1523 | # CONFIG_STAGING is not set |
| 1481 | 1524 | ||
| 1482 | # | 1525 | # |
| @@ -1653,63 +1696,75 @@ CONFIG_MAGIC_SYSRQ=y | |||
| 1653 | # CONFIG_UNUSED_SYMBOLS is not set | 1696 | # CONFIG_UNUSED_SYMBOLS is not set |
| 1654 | CONFIG_DEBUG_FS=y | 1697 | CONFIG_DEBUG_FS=y |
| 1655 | # CONFIG_HEADERS_CHECK is not set | 1698 | # CONFIG_HEADERS_CHECK is not set |
| 1656 | # CONFIG_DEBUG_KERNEL is not set | 1699 | CONFIG_DEBUG_KERNEL=y |
| 1700 | # CONFIG_DEBUG_SHIRQ is not set | ||
| 1701 | CONFIG_DETECT_SOFTLOCKUP=y | ||
| 1702 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | ||
| 1703 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | ||
| 1704 | CONFIG_DETECT_HUNG_TASK=y | ||
| 1705 | # CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set | ||
| 1706 | CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 | ||
| 1657 | CONFIG_SCHED_DEBUG=y | 1707 | CONFIG_SCHED_DEBUG=y |
| 1658 | CONFIG_SCHEDSTATS=y | 1708 | CONFIG_SCHEDSTATS=y |
| 1659 | CONFIG_TRACE_IRQFLAGS=y | 1709 | # CONFIG_TIMER_STATS is not set |
| 1710 | # CONFIG_DEBUG_OBJECTS is not set | ||
| 1711 | # CONFIG_DEBUG_SLAB is not set | ||
| 1712 | CONFIG_DEBUG_KMEMLEAK=y | ||
| 1713 | CONFIG_DEBUG_KMEMLEAK_EARLY_LOG_SIZE=400 | ||
| 1714 | # CONFIG_DEBUG_KMEMLEAK_TEST is not set | ||
| 1715 | CONFIG_DEBUG_PREEMPT=y | ||
| 1716 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
| 1717 | # CONFIG_RT_MUTEX_TESTER is not set | ||
| 1718 | CONFIG_DEBUG_SPINLOCK=y | ||
| 1719 | CONFIG_DEBUG_MUTEXES=y | ||
| 1720 | # CONFIG_DEBUG_LOCK_ALLOC is not set | ||
| 1721 | # CONFIG_PROVE_LOCKING is not set | ||
| 1722 | # CONFIG_LOCK_STAT is not set | ||
| 1723 | CONFIG_DEBUG_SPINLOCK_SLEEP=y | ||
| 1724 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
| 1660 | CONFIG_STACKTRACE=y | 1725 | CONFIG_STACKTRACE=y |
| 1726 | # CONFIG_DEBUG_KOBJECT is not set | ||
| 1661 | CONFIG_DEBUG_BUGVERBOSE=y | 1727 | CONFIG_DEBUG_BUGVERBOSE=y |
| 1728 | CONFIG_DEBUG_INFO=y | ||
| 1729 | # CONFIG_DEBUG_VM is not set | ||
| 1730 | # CONFIG_DEBUG_WRITECOUNT is not set | ||
| 1662 | # CONFIG_DEBUG_MEMORY_INIT is not set | 1731 | # CONFIG_DEBUG_MEMORY_INIT is not set |
| 1732 | # CONFIG_DEBUG_LIST is not set | ||
| 1733 | # CONFIG_DEBUG_SG is not set | ||
| 1734 | # CONFIG_DEBUG_NOTIFIERS is not set | ||
| 1735 | # CONFIG_DEBUG_CREDENTIALS is not set | ||
| 1663 | CONFIG_FRAME_POINTER=y | 1736 | CONFIG_FRAME_POINTER=y |
| 1737 | # CONFIG_RCU_TORTURE_TEST is not set | ||
| 1664 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | 1738 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set |
| 1739 | # CONFIG_BACKTRACE_SELF_TEST is not set | ||
| 1740 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | ||
| 1741 | # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set | ||
| 1665 | # CONFIG_LKDTM is not set | 1742 | # CONFIG_LKDTM is not set |
| 1743 | # CONFIG_FAULT_INJECTION is not set | ||
| 1666 | CONFIG_LATENCYTOP=y | 1744 | CONFIG_LATENCYTOP=y |
| 1667 | CONFIG_SYSCTL_SYSCALL_CHECK=y | 1745 | CONFIG_SYSCTL_SYSCALL_CHECK=y |
| 1668 | CONFIG_NOP_TRACER=y | 1746 | # CONFIG_PAGE_POISONING is not set |
| 1669 | CONFIG_HAVE_FTRACE_NMI_ENTER=y | ||
| 1670 | CONFIG_HAVE_FUNCTION_TRACER=y | 1747 | CONFIG_HAVE_FUNCTION_TRACER=y |
| 1671 | CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y | 1748 | CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y |
| 1672 | CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y | 1749 | CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y |
| 1673 | CONFIG_HAVE_DYNAMIC_FTRACE=y | 1750 | CONFIG_HAVE_DYNAMIC_FTRACE=y |
| 1674 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y | 1751 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y |
| 1675 | CONFIG_HAVE_SYSCALL_TRACEPOINTS=y | 1752 | CONFIG_HAVE_SYSCALL_TRACEPOINTS=y |
| 1676 | CONFIG_TRACER_MAX_TRACE=y | ||
| 1677 | CONFIG_RING_BUFFER=y | ||
| 1678 | CONFIG_FTRACE_NMI_ENTER=y | ||
| 1679 | CONFIG_EVENT_TRACING=y | ||
| 1680 | CONFIG_CONTEXT_SWITCH_TRACER=y | ||
| 1681 | CONFIG_RING_BUFFER_ALLOW_SWAP=y | ||
| 1682 | CONFIG_TRACING=y | ||
| 1683 | CONFIG_GENERIC_TRACER=y | ||
| 1684 | CONFIG_TRACING_SUPPORT=y | 1753 | CONFIG_TRACING_SUPPORT=y |
| 1685 | CONFIG_FTRACE=y | 1754 | # CONFIG_FTRACE is not set |
| 1686 | CONFIG_FUNCTION_TRACER=y | ||
| 1687 | CONFIG_FUNCTION_GRAPH_TRACER=y | ||
| 1688 | CONFIG_IRQSOFF_TRACER=y | ||
| 1689 | # CONFIG_PREEMPT_TRACER is not set | ||
| 1690 | CONFIG_SCHED_TRACER=y | ||
| 1691 | # CONFIG_FTRACE_SYSCALLS is not set | ||
| 1692 | # CONFIG_BOOT_TRACER is not set | ||
| 1693 | CONFIG_BRANCH_PROFILE_NONE=y | ||
| 1694 | # CONFIG_PROFILE_ANNOTATED_BRANCHES is not set | ||
| 1695 | # CONFIG_PROFILE_ALL_BRANCHES is not set | ||
| 1696 | # CONFIG_KSYM_TRACER is not set | ||
| 1697 | CONFIG_STACK_TRACER=y | ||
| 1698 | CONFIG_KMEMTRACE=y | ||
| 1699 | CONFIG_WORKQUEUE_TRACER=y | ||
| 1700 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
| 1701 | CONFIG_DYNAMIC_FTRACE=y | ||
| 1702 | # CONFIG_FUNCTION_PROFILER is not set | ||
| 1703 | CONFIG_FTRACE_MCOUNT_RECORD=y | ||
| 1704 | # CONFIG_FTRACE_STARTUP_TEST is not set | ||
| 1705 | # CONFIG_RING_BUFFER_BENCHMARK is not set | ||
| 1706 | # CONFIG_DYNAMIC_DEBUG is not set | 1755 | # CONFIG_DYNAMIC_DEBUG is not set |
| 1707 | # CONFIG_DMA_API_DEBUG is not set | 1756 | # CONFIG_DMA_API_DEBUG is not set |
| 1757 | # CONFIG_ATOMIC64_SELFTEST is not set | ||
| 1708 | # CONFIG_SAMPLES is not set | 1758 | # CONFIG_SAMPLES is not set |
| 1709 | CONFIG_HAVE_ARCH_KGDB=y | 1759 | CONFIG_HAVE_ARCH_KGDB=y |
| 1760 | # CONFIG_KGDB is not set | ||
| 1710 | # CONFIG_SH_STANDARD_BIOS is not set | 1761 | # CONFIG_SH_STANDARD_BIOS is not set |
| 1711 | CONFIG_DWARF_UNWINDER=y | 1762 | # CONFIG_STACK_DEBUG is not set |
| 1712 | CONFIG_MCOUNT=y | 1763 | # CONFIG_DEBUG_STACK_USAGE is not set |
| 1764 | # CONFIG_4KSTACKS is not set | ||
| 1765 | CONFIG_DUMP_CODE=y | ||
| 1766 | # CONFIG_DWARF_UNWINDER is not set | ||
| 1767 | # CONFIG_SH_NO_BSS_INIT is not set | ||
| 1713 | 1768 | ||
| 1714 | # | 1769 | # |
| 1715 | # Security options | 1770 | # Security options |
| @@ -1820,7 +1875,7 @@ CONFIG_CRYPTO_DES=y | |||
| 1820 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | 1875 | # CONFIG_CRYPTO_ANSI_CPRNG is not set |
| 1821 | # CONFIG_CRYPTO_HW is not set | 1876 | # CONFIG_CRYPTO_HW is not set |
| 1822 | # CONFIG_VIRTUALIZATION is not set | 1877 | # CONFIG_VIRTUALIZATION is not set |
| 1823 | CONFIG_BINARY_PRINTF=y | 1878 | # CONFIG_BINARY_PRINTF is not set |
| 1824 | 1879 | ||
| 1825 | # | 1880 | # |
| 1826 | # Library routines | 1881 | # Library routines |
diff --git a/arch/sh/include/asm/bug.h b/arch/sh/include/asm/bug.h index d02c01b3e6b9..6323f864d111 100644 --- a/arch/sh/include/asm/bug.h +++ b/arch/sh/include/asm/bug.h | |||
| @@ -48,7 +48,7 @@ do { \ | |||
| 48 | "i" (sizeof(struct bug_entry))); \ | 48 | "i" (sizeof(struct bug_entry))); \ |
| 49 | } while (0) | 49 | } while (0) |
| 50 | 50 | ||
| 51 | #define __WARN() \ | 51 | #define __WARN_TAINT(taint) \ |
| 52 | do { \ | 52 | do { \ |
| 53 | __asm__ __volatile__ ( \ | 53 | __asm__ __volatile__ ( \ |
| 54 | "1:\t.short %O0\n" \ | 54 | "1:\t.short %O0\n" \ |
| @@ -57,7 +57,7 @@ do { \ | |||
| 57 | : "n" (TRAPA_BUG_OPCODE), \ | 57 | : "n" (TRAPA_BUG_OPCODE), \ |
| 58 | "i" (__FILE__), \ | 58 | "i" (__FILE__), \ |
| 59 | "i" (__LINE__), \ | 59 | "i" (__LINE__), \ |
| 60 | "i" (BUGFLAG_WARNING), \ | 60 | "i" (BUGFLAG_TAINT(taint)), \ |
| 61 | "i" (sizeof(struct bug_entry))); \ | 61 | "i" (sizeof(struct bug_entry))); \ |
| 62 | } while (0) | 62 | } while (0) |
| 63 | 63 | ||
diff --git a/arch/sh/include/asm/cache.h b/arch/sh/include/asm/cache.h index e461d67f03c3..ef9e555aafba 100644 --- a/arch/sh/include/asm/cache.h +++ b/arch/sh/include/asm/cache.h | |||
| @@ -14,7 +14,7 @@ | |||
| 14 | 14 | ||
| 15 | #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) | 15 | #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) |
| 16 | 16 | ||
| 17 | #define __read_mostly __attribute__((__section__(".data.read_mostly"))) | 17 | #define __read_mostly __attribute__((__section__(".data..read_mostly"))) |
| 18 | 18 | ||
| 19 | #ifndef __ASSEMBLY__ | 19 | #ifndef __ASSEMBLY__ |
| 20 | struct cache_info { | 20 | struct cache_info { |
diff --git a/arch/sh/include/asm/dmaengine.h b/arch/sh/include/asm/dmaengine.h deleted file mode 100644 index 2a02b611a9ad..000000000000 --- a/arch/sh/include/asm/dmaengine.h +++ /dev/null | |||
| @@ -1,34 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * Header for the new SH dmaengine driver | ||
| 3 | * | ||
| 4 | * Copyright (C) 2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de> | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | */ | ||
| 10 | #ifndef ASM_DMAENGINE_H | ||
| 11 | #define ASM_DMAENGINE_H | ||
| 12 | |||
| 13 | #include <linux/sh_dma.h> | ||
| 14 | |||
| 15 | enum { | ||
| 16 | SHDMA_SLAVE_SCIF0_TX, | ||
| 17 | SHDMA_SLAVE_SCIF0_RX, | ||
| 18 | SHDMA_SLAVE_SCIF1_TX, | ||
| 19 | SHDMA_SLAVE_SCIF1_RX, | ||
| 20 | SHDMA_SLAVE_SCIF2_TX, | ||
| 21 | SHDMA_SLAVE_SCIF2_RX, | ||
| 22 | SHDMA_SLAVE_SCIF3_TX, | ||
| 23 | SHDMA_SLAVE_SCIF3_RX, | ||
| 24 | SHDMA_SLAVE_SCIF4_TX, | ||
| 25 | SHDMA_SLAVE_SCIF4_RX, | ||
| 26 | SHDMA_SLAVE_SCIF5_TX, | ||
| 27 | SHDMA_SLAVE_SCIF5_RX, | ||
| 28 | SHDMA_SLAVE_SIUA_TX, | ||
| 29 | SHDMA_SLAVE_SIUA_RX, | ||
| 30 | SHDMA_SLAVE_SIUB_TX, | ||
| 31 | SHDMA_SLAVE_SIUB_RX, | ||
| 32 | }; | ||
| 33 | |||
| 34 | #endif | ||
diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h index f689554e17c1..b237d525d592 100644 --- a/arch/sh/include/asm/io.h +++ b/arch/sh/include/asm/io.h | |||
| @@ -39,6 +39,8 @@ | |||
| 39 | #include <asm/io_generic.h> | 39 | #include <asm/io_generic.h> |
| 40 | #include <asm/io_trapped.h> | 40 | #include <asm/io_trapped.h> |
| 41 | 41 | ||
| 42 | #ifdef CONFIG_HAS_IOPORT | ||
| 43 | |||
| 42 | #define inb(p) sh_mv.mv_inb((p)) | 44 | #define inb(p) sh_mv.mv_inb((p)) |
| 43 | #define inw(p) sh_mv.mv_inw((p)) | 45 | #define inw(p) sh_mv.mv_inw((p)) |
| 44 | #define inl(p) sh_mv.mv_inl((p)) | 46 | #define inl(p) sh_mv.mv_inl((p)) |
| @@ -60,6 +62,8 @@ | |||
| 60 | #define outsw(p,b,c) sh_mv.mv_outsw((p), (b), (c)) | 62 | #define outsw(p,b,c) sh_mv.mv_outsw((p), (b), (c)) |
| 61 | #define outsl(p,b,c) sh_mv.mv_outsl((p), (b), (c)) | 63 | #define outsl(p,b,c) sh_mv.mv_outsl((p), (b), (c)) |
| 62 | 64 | ||
| 65 | #endif | ||
| 66 | |||
| 63 | #define __raw_writeb(v,a) (__chk_io_ptr(a), *(volatile u8 __force *)(a) = (v)) | 67 | #define __raw_writeb(v,a) (__chk_io_ptr(a), *(volatile u8 __force *)(a) = (v)) |
| 64 | #define __raw_writew(v,a) (__chk_io_ptr(a), *(volatile u16 __force *)(a) = (v)) | 68 | #define __raw_writew(v,a) (__chk_io_ptr(a), *(volatile u16 __force *)(a) = (v)) |
| 65 | #define __raw_writel(v,a) (__chk_io_ptr(a), *(volatile u32 __force *)(a) = (v)) | 69 | #define __raw_writel(v,a) (__chk_io_ptr(a), *(volatile u32 __force *)(a) = (v)) |
| @@ -240,6 +244,8 @@ __BUILD_MEMORY_STRING(q, u64) | |||
| 240 | 244 | ||
| 241 | #define IO_SPACE_LIMIT 0xffffffff | 245 | #define IO_SPACE_LIMIT 0xffffffff |
| 242 | 246 | ||
| 247 | #ifdef CONFIG_HAS_IOPORT | ||
| 248 | |||
| 243 | /* | 249 | /* |
| 244 | * This function provides a method for the generic case where a | 250 | * This function provides a method for the generic case where a |
| 245 | * board-specific ioport_map simply needs to return the port + some | 251 | * board-specific ioport_map simply needs to return the port + some |
| @@ -255,6 +261,8 @@ static inline void __set_io_port_base(unsigned long pbase) | |||
| 255 | 261 | ||
| 256 | #define __ioport_map(p, n) sh_mv.mv_ioport_map((p), (n)) | 262 | #define __ioport_map(p, n) sh_mv.mv_ioport_map((p), (n)) |
| 257 | 263 | ||
| 264 | #endif | ||
| 265 | |||
| 258 | /* We really want to try and get these to memcpy etc */ | 266 | /* We really want to try and get these to memcpy etc */ |
| 259 | void memcpy_fromio(void *, const volatile void __iomem *, unsigned long); | 267 | void memcpy_fromio(void *, const volatile void __iomem *, unsigned long); |
| 260 | void memcpy_toio(volatile void __iomem *, const void *, unsigned long); | 268 | void memcpy_toio(volatile void __iomem *, const void *, unsigned long); |
diff --git a/arch/sh/include/asm/machvec.h b/arch/sh/include/asm/machvec.h index bc0218cb72e1..a0b0cf79cf8a 100644 --- a/arch/sh/include/asm/machvec.h +++ b/arch/sh/include/asm/machvec.h | |||
| @@ -19,6 +19,10 @@ struct sh_machine_vector { | |||
| 19 | const char *mv_name; | 19 | const char *mv_name; |
| 20 | int mv_nr_irqs; | 20 | int mv_nr_irqs; |
| 21 | 21 | ||
| 22 | int (*mv_irq_demux)(int irq); | ||
| 23 | void (*mv_init_irq)(void); | ||
| 24 | |||
| 25 | #ifdef CONFIG_HAS_IOPORT | ||
| 22 | u8 (*mv_inb)(unsigned long); | 26 | u8 (*mv_inb)(unsigned long); |
| 23 | u16 (*mv_inw)(unsigned long); | 27 | u16 (*mv_inw)(unsigned long); |
| 24 | u32 (*mv_inl)(unsigned long); | 28 | u32 (*mv_inl)(unsigned long); |
| @@ -40,12 +44,9 @@ struct sh_machine_vector { | |||
| 40 | void (*mv_outsw)(unsigned long, const void *src, unsigned long count); | 44 | void (*mv_outsw)(unsigned long, const void *src, unsigned long count); |
| 41 | void (*mv_outsl)(unsigned long, const void *src, unsigned long count); | 45 | void (*mv_outsl)(unsigned long, const void *src, unsigned long count); |
| 42 | 46 | ||
| 43 | int (*mv_irq_demux)(int irq); | ||
| 44 | |||
| 45 | void (*mv_init_irq)(void); | ||
| 46 | |||
| 47 | void __iomem *(*mv_ioport_map)(unsigned long port, unsigned int size); | 47 | void __iomem *(*mv_ioport_map)(unsigned long port, unsigned int size); |
| 48 | void (*mv_ioport_unmap)(void __iomem *); | 48 | void (*mv_ioport_unmap)(void __iomem *); |
| 49 | #endif | ||
| 49 | 50 | ||
| 50 | int (*mv_clk_init)(void); | 51 | int (*mv_clk_init)(void); |
| 51 | int (*mv_mode_pins)(void); | 52 | int (*mv_mode_pins)(void); |
diff --git a/arch/sh/include/asm/siu.h b/arch/sh/include/asm/siu.h index e8d4142baf59..1d95c78808d1 100644 --- a/arch/sh/include/asm/siu.h +++ b/arch/sh/include/asm/siu.h | |||
| @@ -11,8 +11,6 @@ | |||
| 11 | #ifndef ASM_SIU_H | 11 | #ifndef ASM_SIU_H |
| 12 | #define ASM_SIU_H | 12 | #define ASM_SIU_H |
| 13 | 13 | ||
| 14 | #include <asm/dmaengine.h> | ||
| 15 | |||
| 16 | struct device; | 14 | struct device; |
| 17 | 15 | ||
| 18 | struct siu_platform { | 16 | struct siu_platform { |
diff --git a/arch/sh/include/cpu-sh4/cpu/sh7722.h b/arch/sh/include/cpu-sh4/cpu/sh7722.h index 48560407cbe1..7a5b8a331b4a 100644 --- a/arch/sh/include/cpu-sh4/cpu/sh7722.h +++ b/arch/sh/include/cpu-sh4/cpu/sh7722.h | |||
| @@ -235,4 +235,19 @@ enum { | |||
| 235 | HWBLK_NR, | 235 | HWBLK_NR, |
| 236 | }; | 236 | }; |
| 237 | 237 | ||
| 238 | enum { | ||
| 239 | SHDMA_SLAVE_SCIF0_TX, | ||
| 240 | SHDMA_SLAVE_SCIF0_RX, | ||
| 241 | SHDMA_SLAVE_SCIF1_TX, | ||
| 242 | SHDMA_SLAVE_SCIF1_RX, | ||
| 243 | SHDMA_SLAVE_SCIF2_TX, | ||
| 244 | SHDMA_SLAVE_SCIF2_RX, | ||
| 245 | SHDMA_SLAVE_SIUA_TX, | ||
| 246 | SHDMA_SLAVE_SIUA_RX, | ||
| 247 | SHDMA_SLAVE_SIUB_TX, | ||
| 248 | SHDMA_SLAVE_SIUB_RX, | ||
| 249 | SHDMA_SLAVE_SDHI0_TX, | ||
| 250 | SHDMA_SLAVE_SDHI0_RX, | ||
| 251 | }; | ||
| 252 | |||
| 238 | #endif /* __ASM_SH7722_H__ */ | 253 | #endif /* __ASM_SH7722_H__ */ |
diff --git a/arch/sh/include/cpu-sh4/cpu/sh7724.h b/arch/sh/include/cpu-sh4/cpu/sh7724.h index 0cd1f71a1116..4c27b68789b3 100644 --- a/arch/sh/include/cpu-sh4/cpu/sh7724.h +++ b/arch/sh/include/cpu-sh4/cpu/sh7724.h | |||
| @@ -9,6 +9,7 @@ | |||
| 9 | * MD3: BSC - Area0 Bus Width (16/32-bit) [CS0BCR.9,10] | 9 | * MD3: BSC - Area0 Bus Width (16/32-bit) [CS0BCR.9,10] |
| 10 | * MD5: BSC - Endian Mode (L: Big, H: Little) [CMNCR.3] | 10 | * MD5: BSC - Endian Mode (L: Big, H: Little) [CMNCR.3] |
| 11 | * MD8: Test Mode | 11 | * MD8: Test Mode |
| 12 | * BOOT: FBR - Boot Mode (L: MMCIF, H: Area0) | ||
| 12 | */ | 13 | */ |
| 13 | 14 | ||
| 14 | /* Pin Function Controller: | 15 | /* Pin Function Controller: |
| @@ -283,4 +284,23 @@ enum { | |||
| 283 | HWBLK_NR, | 284 | HWBLK_NR, |
| 284 | }; | 285 | }; |
| 285 | 286 | ||
| 287 | enum { | ||
| 288 | SHDMA_SLAVE_SCIF0_TX, | ||
| 289 | SHDMA_SLAVE_SCIF0_RX, | ||
| 290 | SHDMA_SLAVE_SCIF1_TX, | ||
| 291 | SHDMA_SLAVE_SCIF1_RX, | ||
| 292 | SHDMA_SLAVE_SCIF2_TX, | ||
| 293 | SHDMA_SLAVE_SCIF2_RX, | ||
| 294 | SHDMA_SLAVE_SCIF3_TX, | ||
| 295 | SHDMA_SLAVE_SCIF3_RX, | ||
| 296 | SHDMA_SLAVE_SCIF4_TX, | ||
| 297 | SHDMA_SLAVE_SCIF4_RX, | ||
| 298 | SHDMA_SLAVE_SCIF5_TX, | ||
| 299 | SHDMA_SLAVE_SCIF5_RX, | ||
| 300 | SHDMA_SLAVE_SDHI0_TX, | ||
| 301 | SHDMA_SLAVE_SDHI0_RX, | ||
| 302 | SHDMA_SLAVE_SDHI1_TX, | ||
| 303 | SHDMA_SLAVE_SDHI1_RX, | ||
| 304 | }; | ||
| 305 | |||
| 286 | #endif /* __ASM_SH7724_H__ */ | 306 | #endif /* __ASM_SH7724_H__ */ |
diff --git a/arch/sh/include/mach-common/mach/romimage.h b/arch/sh/include/mach-common/mach/romimage.h index 267e24112d82..08fb42269ecd 100644 --- a/arch/sh/include/mach-common/mach/romimage.h +++ b/arch/sh/include/mach-common/mach/romimage.h | |||
| @@ -1 +1,11 @@ | |||
| 1 | #ifdef __ASSEMBLY__ | ||
| 2 | |||
| 1 | /* do nothing here by default */ | 3 | /* do nothing here by default */ |
| 4 | |||
| 5 | #else /* __ASSEMBLY__ */ | ||
| 6 | |||
| 7 | extern inline void mmcif_update_progress(int nr) | ||
| 8 | { | ||
| 9 | } | ||
| 10 | |||
| 11 | #endif /* __ASSEMBLY__ */ | ||
diff --git a/arch/sh/include/mach-ecovec24/mach/romimage.h b/arch/sh/include/mach-ecovec24/mach/romimage.h index 1c8787ecb1c1..1dcf5e6c8d83 100644 --- a/arch/sh/include/mach-ecovec24/mach/romimage.h +++ b/arch/sh/include/mach-ecovec24/mach/romimage.h | |||
| @@ -1,3 +1,5 @@ | |||
| 1 | #ifdef __ASSEMBLY__ | ||
| 2 | |||
| 1 | /* EcoVec board specific boot code: | 3 | /* EcoVec board specific boot code: |
| 2 | * converts the "partner-jet-script.txt" script into assembly | 4 | * converts the "partner-jet-script.txt" script into assembly |
| 3 | * the assembly code is the first code to be executed in the romImage | 5 | * the assembly code is the first code to be executed in the romImage |
| @@ -18,3 +20,28 @@ | |||
| 18 | .align 2 | 20 | .align 2 |
| 19 | 1 : .long 0xa8000000 | 21 | 1 : .long 0xa8000000 |
| 20 | 2 : | 22 | 2 : |
| 23 | |||
| 24 | #else /* __ASSEMBLY__ */ | ||
| 25 | |||
| 26 | /* Ecovec board specific information: | ||
| 27 | * | ||
| 28 | * Set the following to enable MMCIF boot from the MMC card in CN12: | ||
| 29 | * | ||
| 30 | * DS1.5 = OFF (SH BOOT pin set to L) | ||
| 31 | * DS2.6 = OFF (Select MMCIF on CN12 instead of SDHI1) | ||
| 32 | * DS2.7 = ON (Select MMCIF on CN12 instead of SDHI1) | ||
| 33 | * | ||
| 34 | */ | ||
| 35 | #define HIZCRA 0xa4050158 | ||
| 36 | #define PGDR 0xa405012c | ||
| 37 | |||
| 38 | extern inline void mmcif_update_progress(int nr) | ||
| 39 | { | ||
| 40 | /* disable Hi-Z for LED pins */ | ||
| 41 | __raw_writew(__raw_readw(HIZCRA) & ~(1 << 1), HIZCRA); | ||
| 42 | |||
| 43 | /* update progress on LED4, LED5, LED6 and LED7 */ | ||
| 44 | __raw_writeb(1 << (nr - 1), PGDR); | ||
| 45 | } | ||
| 46 | |||
| 47 | #endif /* __ASSEMBLY__ */ | ||
diff --git a/arch/sh/include/mach-kfr2r09/mach/romimage.h b/arch/sh/include/mach-kfr2r09/mach/romimage.h index a110823f2bde..976256a323f2 100644 --- a/arch/sh/include/mach-kfr2r09/mach/romimage.h +++ b/arch/sh/include/mach-kfr2r09/mach/romimage.h | |||
| @@ -1,3 +1,5 @@ | |||
| 1 | #ifdef __ASSEMBLY__ | ||
| 2 | |||
| 1 | /* kfr2r09 board specific boot code: | 3 | /* kfr2r09 board specific boot code: |
| 2 | * converts the "partner-jet-script.txt" script into assembly | 4 | * converts the "partner-jet-script.txt" script into assembly |
| 3 | * the assembly code is the first code to be executed in the romImage | 5 | * the assembly code is the first code to be executed in the romImage |
| @@ -18,3 +20,11 @@ | |||
| 18 | .align 2 | 20 | .align 2 |
| 19 | 1: .long 0xa8000000 | 21 | 1: .long 0xa8000000 |
| 20 | 2: | 22 | 2: |
| 23 | |||
| 24 | #else /* __ASSEMBLY__ */ | ||
| 25 | |||
| 26 | extern inline void mmcif_update_progress(int nr) | ||
| 27 | { | ||
| 28 | } | ||
| 29 | |||
| 30 | #endif /* __ASSEMBLY__ */ | ||
diff --git a/arch/sh/kernel/Makefile b/arch/sh/kernel/Makefile index 650b92f00ee5..e25f3c69525d 100644 --- a/arch/sh/kernel/Makefile +++ b/arch/sh/kernel/Makefile | |||
| @@ -12,7 +12,7 @@ endif | |||
| 12 | CFLAGS_REMOVE_return_address.o = -pg | 12 | CFLAGS_REMOVE_return_address.o = -pg |
| 13 | 13 | ||
| 14 | obj-y := clkdev.o debugtraps.o dma-nommu.o dumpstack.o \ | 14 | obj-y := clkdev.o debugtraps.o dma-nommu.o dumpstack.o \ |
| 15 | idle.o io.o io_generic.o irq.o \ | 15 | idle.o io.o irq.o \ |
| 16 | irq_$(BITS).o machvec.o nmi_debug.o process.o \ | 16 | irq_$(BITS).o machvec.o nmi_debug.o process.o \ |
| 17 | process_$(BITS).o ptrace_$(BITS).o \ | 17 | process_$(BITS).o ptrace_$(BITS).o \ |
| 18 | reboot.o return_address.o \ | 18 | reboot.o return_address.o \ |
| @@ -39,6 +39,7 @@ obj-$(CONFIG_DUMP_CODE) += disassemble.o | |||
| 39 | obj-$(CONFIG_HIBERNATION) += swsusp.o | 39 | obj-$(CONFIG_HIBERNATION) += swsusp.o |
| 40 | obj-$(CONFIG_DWARF_UNWINDER) += dwarf.o | 40 | obj-$(CONFIG_DWARF_UNWINDER) += dwarf.o |
| 41 | obj-$(CONFIG_PERF_EVENTS) += perf_event.o perf_callchain.o | 41 | obj-$(CONFIG_PERF_EVENTS) += perf_event.o perf_callchain.o |
| 42 | obj-$(CONFIG_HAS_IOPORT) += io_generic.o | ||
| 42 | 43 | ||
| 43 | obj-$(CONFIG_HAVE_HW_BREAKPOINT) += hw_breakpoint.o | 44 | obj-$(CONFIG_HAVE_HW_BREAKPOINT) += hw_breakpoint.o |
| 44 | obj-$(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) += localtimer.o | 45 | obj-$(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) += localtimer.o |
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7786.c b/arch/sh/kernel/cpu/sh4a/clock-sh7786.c index 105a6d41b569..597c9fbe49c6 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7786.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7786.c | |||
| @@ -13,7 +13,6 @@ | |||
| 13 | #include <linux/kernel.h> | 13 | #include <linux/kernel.h> |
| 14 | #include <linux/clk.h> | 14 | #include <linux/clk.h> |
| 15 | #include <linux/io.h> | 15 | #include <linux/io.h> |
| 16 | #include <linux/clk.h> | ||
| 17 | #include <asm/clkdev.h> | 16 | #include <asm/clkdev.h> |
| 18 | #include <asm/clock.h> | 17 | #include <asm/clock.h> |
| 19 | #include <asm/freq.h> | 18 | #include <asm/freq.h> |
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c index 24c6167a7181..156ccc960015 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c | |||
| @@ -17,7 +17,6 @@ | |||
| 17 | #include <linux/usb/m66592.h> | 17 | #include <linux/usb/m66592.h> |
| 18 | 18 | ||
| 19 | #include <asm/clock.h> | 19 | #include <asm/clock.h> |
| 20 | #include <asm/dmaengine.h> | ||
| 21 | #include <asm/mmzone.h> | 20 | #include <asm/mmzone.h> |
| 22 | #include <asm/siu.h> | 21 | #include <asm/siu.h> |
| 23 | 22 | ||
| @@ -75,6 +74,16 @@ static const struct sh_dmae_slave_config sh7722_dmae_slaves[] = { | |||
| 75 | .addr = 0xa454c094, | 74 | .addr = 0xa454c094, |
| 76 | .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT), | 75 | .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT), |
| 77 | .mid_rid = 0xb6, | 76 | .mid_rid = 0xb6, |
| 77 | }, { | ||
| 78 | .slave_id = SHDMA_SLAVE_SDHI0_TX, | ||
| 79 | .addr = 0x04ce0030, | ||
| 80 | .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT), | ||
| 81 | .mid_rid = 0xc1, | ||
| 82 | }, { | ||
| 83 | .slave_id = SHDMA_SLAVE_SDHI0_RX, | ||
| 84 | .addr = 0x04ce0030, | ||
| 85 | .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT), | ||
| 86 | .mid_rid = 0xc2, | ||
| 78 | }, | 87 | }, |
| 79 | }; | 88 | }; |
| 80 | 89 | ||
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c index 89fe16d20fdb..79c556e56262 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c | |||
| @@ -18,19 +18,103 @@ | |||
| 18 | #include <linux/mm.h> | 18 | #include <linux/mm.h> |
| 19 | #include <linux/serial_sci.h> | 19 | #include <linux/serial_sci.h> |
| 20 | #include <linux/uio_driver.h> | 20 | #include <linux/uio_driver.h> |
| 21 | #include <linux/sh_dma.h> | ||
| 21 | #include <linux/sh_timer.h> | 22 | #include <linux/sh_timer.h> |
| 22 | #include <linux/io.h> | 23 | #include <linux/io.h> |
| 23 | #include <linux/notifier.h> | 24 | #include <linux/notifier.h> |
| 24 | 25 | ||
| 25 | #include <asm/suspend.h> | 26 | #include <asm/suspend.h> |
| 26 | #include <asm/clock.h> | 27 | #include <asm/clock.h> |
| 27 | #include <asm/dmaengine.h> | ||
| 28 | #include <asm/mmzone.h> | 28 | #include <asm/mmzone.h> |
| 29 | 29 | ||
| 30 | #include <cpu/dma-register.h> | 30 | #include <cpu/dma-register.h> |
| 31 | #include <cpu/sh7724.h> | 31 | #include <cpu/sh7724.h> |
| 32 | 32 | ||
| 33 | /* DMA */ | 33 | /* DMA */ |
| 34 | static const struct sh_dmae_slave_config sh7724_dmae_slaves[] = { | ||
| 35 | { | ||
| 36 | .slave_id = SHDMA_SLAVE_SCIF0_TX, | ||
| 37 | .addr = 0xffe0000c, | ||
| 38 | .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT), | ||
| 39 | .mid_rid = 0x21, | ||
| 40 | }, { | ||
| 41 | .slave_id = SHDMA_SLAVE_SCIF0_RX, | ||
| 42 | .addr = 0xffe00014, | ||
| 43 | .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT), | ||
| 44 | .mid_rid = 0x22, | ||
| 45 | }, { | ||
| 46 | .slave_id = SHDMA_SLAVE_SCIF1_TX, | ||
| 47 | .addr = 0xffe1000c, | ||
| 48 | .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT), | ||
| 49 | .mid_rid = 0x25, | ||
| 50 | }, { | ||
| 51 | .slave_id = SHDMA_SLAVE_SCIF1_RX, | ||
| 52 | .addr = 0xffe10014, | ||
| 53 | .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT), | ||
| 54 | .mid_rid = 0x26, | ||
| 55 | }, { | ||
| 56 | .slave_id = SHDMA_SLAVE_SCIF2_TX, | ||
| 57 | .addr = 0xffe2000c, | ||
| 58 | .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT), | ||
| 59 | .mid_rid = 0x29, | ||
| 60 | }, { | ||
| 61 | .slave_id = SHDMA_SLAVE_SCIF2_RX, | ||
| 62 | .addr = 0xffe20014, | ||
| 63 | .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT), | ||
| 64 | .mid_rid = 0x2a, | ||
| 65 | }, { | ||
| 66 | .slave_id = SHDMA_SLAVE_SCIF3_TX, | ||
| 67 | .addr = 0xa4e30020, | ||
| 68 | .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT), | ||
| 69 | .mid_rid = 0x2d, | ||
| 70 | }, { | ||
| 71 | .slave_id = SHDMA_SLAVE_SCIF3_RX, | ||
| 72 | .addr = 0xa4e30024, | ||
| 73 | .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT), | ||
| 74 | .mid_rid = 0x2e, | ||
| 75 | }, { | ||
| 76 | .slave_id = SHDMA_SLAVE_SCIF4_TX, | ||
| 77 | .addr = 0xa4e40020, | ||
| 78 | .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT), | ||
| 79 | .mid_rid = 0x31, | ||
| 80 | }, { | ||
| 81 | .slave_id = SHDMA_SLAVE_SCIF4_RX, | ||
| 82 | .addr = 0xa4e40024, | ||
| 83 | .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT), | ||
| 84 | .mid_rid = 0x32, | ||
| 85 | }, { | ||
| 86 | .slave_id = SHDMA_SLAVE_SCIF5_TX, | ||
| 87 | .addr = 0xa4e50020, | ||
| 88 | .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT), | ||
| 89 | .mid_rid = 0x35, | ||
| 90 | }, { | ||
| 91 | .slave_id = SHDMA_SLAVE_SCIF5_RX, | ||
| 92 | .addr = 0xa4e50024, | ||
| 93 | .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT), | ||
| 94 | .mid_rid = 0x36, | ||
| 95 | }, { | ||
| 96 | .slave_id = SHDMA_SLAVE_SDHI0_TX, | ||
| 97 | .addr = 0x04ce0030, | ||
| 98 | .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT), | ||
| 99 | .mid_rid = 0xc1, | ||
| 100 | }, { | ||
| 101 | .slave_id = SHDMA_SLAVE_SDHI0_RX, | ||
| 102 | .addr = 0x04ce0030, | ||
| 103 | .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT), | ||
| 104 | .mid_rid = 0xc2, | ||
| 105 | }, { | ||
| 106 | .slave_id = SHDMA_SLAVE_SDHI1_TX, | ||
| 107 | .addr = 0x04cf0030, | ||
| 108 | .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT), | ||
| 109 | .mid_rid = 0xc9, | ||
| 110 | }, { | ||
| 111 | .slave_id = SHDMA_SLAVE_SDHI1_RX, | ||
| 112 | .addr = 0x04cf0030, | ||
| 113 | .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT), | ||
| 114 | .mid_rid = 0xca, | ||
| 115 | }, | ||
| 116 | }; | ||
| 117 | |||
| 34 | static const struct sh_dmae_channel sh7724_dmae_channels[] = { | 118 | static const struct sh_dmae_channel sh7724_dmae_channels[] = { |
| 35 | { | 119 | { |
| 36 | .offset = 0, | 120 | .offset = 0, |
| @@ -62,6 +146,8 @@ static const struct sh_dmae_channel sh7724_dmae_channels[] = { | |||
| 62 | static const unsigned int ts_shift[] = TS_SHIFT; | 146 | static const unsigned int ts_shift[] = TS_SHIFT; |
| 63 | 147 | ||
| 64 | static struct sh_dmae_pdata dma_platform_data = { | 148 | static struct sh_dmae_pdata dma_platform_data = { |
| 149 | .slave = sh7724_dmae_slaves, | ||
| 150 | .slave_num = ARRAY_SIZE(sh7724_dmae_slaves), | ||
| 65 | .channel = sh7724_dmae_channels, | 151 | .channel = sh7724_dmae_channels, |
| 66 | .channel_num = ARRAY_SIZE(sh7724_dmae_channels), | 152 | .channel_num = ARRAY_SIZE(sh7724_dmae_channels), |
| 67 | .ts_low_shift = CHCR_TS_LOW_SHIFT, | 153 | .ts_low_shift = CHCR_TS_LOW_SHIFT, |
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c index b12f537e4dde..0f414864f76b 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c | |||
| @@ -12,10 +12,9 @@ | |||
| 12 | #include <linux/serial.h> | 12 | #include <linux/serial.h> |
| 13 | #include <linux/io.h> | 13 | #include <linux/io.h> |
| 14 | #include <linux/serial_sci.h> | 14 | #include <linux/serial_sci.h> |
| 15 | #include <linux/sh_dma.h> | ||
| 15 | #include <linux/sh_timer.h> | 16 | #include <linux/sh_timer.h> |
| 16 | 17 | ||
| 17 | #include <asm/dmaengine.h> | ||
| 18 | |||
| 19 | #include <cpu/dma-register.h> | 18 | #include <cpu/dma-register.h> |
| 20 | 19 | ||
| 21 | static struct plat_sci_port scif0_platform_data = { | 20 | static struct plat_sci_port scif0_platform_data = { |
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c index f3e3ea0ce050..c9a572bc6dc8 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c | |||
| @@ -13,9 +13,9 @@ | |||
| 13 | #include <linux/serial_sci.h> | 13 | #include <linux/serial_sci.h> |
| 14 | #include <linux/io.h> | 14 | #include <linux/io.h> |
| 15 | #include <linux/mm.h> | 15 | #include <linux/mm.h> |
| 16 | #include <linux/sh_dma.h> | ||
| 16 | #include <linux/sh_timer.h> | 17 | #include <linux/sh_timer.h> |
| 17 | 18 | ||
| 18 | #include <asm/dmaengine.h> | ||
| 19 | #include <asm/mmzone.h> | 19 | #include <asm/mmzone.h> |
| 20 | 20 | ||
| 21 | #include <cpu/dma-register.h> | 21 | #include <cpu/dma-register.h> |
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c index 81657091da46..8797723231ea 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c | |||
| @@ -21,10 +21,10 @@ | |||
| 21 | #include <linux/mm.h> | 21 | #include <linux/mm.h> |
| 22 | #include <linux/dma-mapping.h> | 22 | #include <linux/dma-mapping.h> |
| 23 | #include <linux/sh_timer.h> | 23 | #include <linux/sh_timer.h> |
| 24 | #include <linux/sh_dma.h> | ||
| 24 | #include <linux/sh_intc.h> | 25 | #include <linux/sh_intc.h> |
| 25 | #include <cpu/dma-register.h> | 26 | #include <cpu/dma-register.h> |
| 26 | #include <asm/mmzone.h> | 27 | #include <asm/mmzone.h> |
| 27 | #include <asm/dmaengine.h> | ||
| 28 | 28 | ||
| 29 | static struct plat_sci_port scif0_platform_data = { | 29 | static struct plat_sci_port scif0_platform_data = { |
| 30 | .mapbase = 0xffea0000, | 30 | .mapbase = 0xffea0000, |
diff --git a/arch/sh/kernel/dwarf.c b/arch/sh/kernel/dwarf.c index 5ec1d1818691..49c09c7d5b77 100644 --- a/arch/sh/kernel/dwarf.c +++ b/arch/sh/kernel/dwarf.c | |||
| @@ -49,6 +49,8 @@ static DEFINE_SPINLOCK(dwarf_fde_lock); | |||
| 49 | 49 | ||
| 50 | static struct dwarf_cie *cached_cie; | 50 | static struct dwarf_cie *cached_cie; |
| 51 | 51 | ||
| 52 | static unsigned int dwarf_unwinder_ready; | ||
| 53 | |||
| 52 | /** | 54 | /** |
| 53 | * dwarf_frame_alloc_reg - allocate memory for a DWARF register | 55 | * dwarf_frame_alloc_reg - allocate memory for a DWARF register |
| 54 | * @frame: the DWARF frame whose list of registers we insert on | 56 | * @frame: the DWARF frame whose list of registers we insert on |
| @@ -582,6 +584,13 @@ struct dwarf_frame *dwarf_unwind_stack(unsigned long pc, | |||
| 582 | unsigned long addr; | 584 | unsigned long addr; |
| 583 | 585 | ||
| 584 | /* | 586 | /* |
| 587 | * If we've been called in to before initialization has | ||
| 588 | * completed, bail out immediately. | ||
| 589 | */ | ||
| 590 | if (!dwarf_unwinder_ready) | ||
| 591 | return NULL; | ||
| 592 | |||
| 593 | /* | ||
| 585 | * If we're starting at the top of the stack we need get the | 594 | * If we're starting at the top of the stack we need get the |
| 586 | * contents of a physical register to get the CFA in order to | 595 | * contents of a physical register to get the CFA in order to |
| 587 | * begin the virtual unwinding of the stack. | 596 | * begin the virtual unwinding of the stack. |
| @@ -845,8 +854,10 @@ static int dwarf_parse_cie(void *entry, void *p, unsigned long len, | |||
| 845 | rb_link_node(&cie->node, parent, rb_node); | 854 | rb_link_node(&cie->node, parent, rb_node); |
| 846 | rb_insert_color(&cie->node, &cie_root); | 855 | rb_insert_color(&cie->node, &cie_root); |
| 847 | 856 | ||
| 857 | #ifdef CONFIG_MODULES | ||
| 848 | if (mod != NULL) | 858 | if (mod != NULL) |
| 849 | list_add_tail(&cie->link, &mod->arch.cie_list); | 859 | list_add_tail(&cie->link, &mod->arch.cie_list); |
| 860 | #endif | ||
| 850 | 861 | ||
| 851 | spin_unlock_irqrestore(&dwarf_cie_lock, flags); | 862 | spin_unlock_irqrestore(&dwarf_cie_lock, flags); |
| 852 | 863 | ||
| @@ -935,8 +946,10 @@ static int dwarf_parse_fde(void *entry, u32 entry_type, | |||
| 935 | rb_link_node(&fde->node, parent, rb_node); | 946 | rb_link_node(&fde->node, parent, rb_node); |
| 936 | rb_insert_color(&fde->node, &fde_root); | 947 | rb_insert_color(&fde->node, &fde_root); |
| 937 | 948 | ||
| 949 | #ifdef CONFIG_MODULES | ||
| 938 | if (mod != NULL) | 950 | if (mod != NULL) |
| 939 | list_add_tail(&fde->link, &mod->arch.fde_list); | 951 | list_add_tail(&fde->link, &mod->arch.fde_list); |
| 952 | #endif | ||
| 940 | 953 | ||
| 941 | spin_unlock_irqrestore(&dwarf_fde_lock, flags); | 954 | spin_unlock_irqrestore(&dwarf_fde_lock, flags); |
| 942 | 955 | ||
| @@ -1163,7 +1176,7 @@ void module_dwarf_cleanup(struct module *mod) | |||
| 1163 | */ | 1176 | */ |
| 1164 | static int __init dwarf_unwinder_init(void) | 1177 | static int __init dwarf_unwinder_init(void) |
| 1165 | { | 1178 | { |
| 1166 | int err; | 1179 | int err = -ENOMEM; |
| 1167 | 1180 | ||
| 1168 | dwarf_frame_cachep = kmem_cache_create("dwarf_frames", | 1181 | dwarf_frame_cachep = kmem_cache_create("dwarf_frames", |
| 1169 | sizeof(struct dwarf_frame), 0, | 1182 | sizeof(struct dwarf_frame), 0, |
| @@ -1177,11 +1190,15 @@ static int __init dwarf_unwinder_init(void) | |||
| 1177 | mempool_alloc_slab, | 1190 | mempool_alloc_slab, |
| 1178 | mempool_free_slab, | 1191 | mempool_free_slab, |
| 1179 | dwarf_frame_cachep); | 1192 | dwarf_frame_cachep); |
| 1193 | if (!dwarf_frame_pool) | ||
| 1194 | goto out; | ||
| 1180 | 1195 | ||
| 1181 | dwarf_reg_pool = mempool_create(DWARF_REG_MIN_REQ, | 1196 | dwarf_reg_pool = mempool_create(DWARF_REG_MIN_REQ, |
| 1182 | mempool_alloc_slab, | 1197 | mempool_alloc_slab, |
| 1183 | mempool_free_slab, | 1198 | mempool_free_slab, |
| 1184 | dwarf_reg_cachep); | 1199 | dwarf_reg_cachep); |
| 1200 | if (!dwarf_reg_pool) | ||
| 1201 | goto out; | ||
| 1185 | 1202 | ||
| 1186 | err = dwarf_parse_section(__start_eh_frame, __stop_eh_frame, NULL); | 1203 | err = dwarf_parse_section(__start_eh_frame, __stop_eh_frame, NULL); |
| 1187 | if (err) | 1204 | if (err) |
| @@ -1191,11 +1208,13 @@ static int __init dwarf_unwinder_init(void) | |||
| 1191 | if (err) | 1208 | if (err) |
| 1192 | goto out; | 1209 | goto out; |
| 1193 | 1210 | ||
| 1211 | dwarf_unwinder_ready = 1; | ||
| 1212 | |||
| 1194 | return 0; | 1213 | return 0; |
| 1195 | 1214 | ||
| 1196 | out: | 1215 | out: |
| 1197 | printk(KERN_ERR "Failed to initialise DWARF unwinder: %d\n", err); | 1216 | printk(KERN_ERR "Failed to initialise DWARF unwinder: %d\n", err); |
| 1198 | dwarf_unwinder_cleanup(); | 1217 | dwarf_unwinder_cleanup(); |
| 1199 | return -EINVAL; | 1218 | return err; |
| 1200 | } | 1219 | } |
| 1201 | early_initcall(dwarf_unwinder_init); | 1220 | early_initcall(dwarf_unwinder_init); |
diff --git a/arch/sh/kernel/io.c b/arch/sh/kernel/io.c index 4770c241c679..5c51b794ba2a 100644 --- a/arch/sh/kernel/io.c +++ b/arch/sh/kernel/io.c | |||
| @@ -112,25 +112,3 @@ void memset_io(volatile void __iomem *dst, int c, unsigned long count) | |||
| 112 | } | 112 | } |
| 113 | } | 113 | } |
| 114 | EXPORT_SYMBOL(memset_io); | 114 | EXPORT_SYMBOL(memset_io); |
| 115 | |||
| 116 | #ifndef CONFIG_GENERIC_IOMAP | ||
| 117 | |||
| 118 | void __iomem *ioport_map(unsigned long port, unsigned int nr) | ||
| 119 | { | ||
| 120 | void __iomem *ret; | ||
| 121 | |||
| 122 | ret = __ioport_map_trapped(port, nr); | ||
| 123 | if (ret) | ||
| 124 | return ret; | ||
| 125 | |||
| 126 | return __ioport_map(port, nr); | ||
| 127 | } | ||
| 128 | EXPORT_SYMBOL(ioport_map); | ||
| 129 | |||
| 130 | void ioport_unmap(void __iomem *addr) | ||
| 131 | { | ||
| 132 | sh_mv.mv_ioport_unmap(addr); | ||
| 133 | } | ||
| 134 | EXPORT_SYMBOL(ioport_unmap); | ||
| 135 | |||
| 136 | #endif /* CONFIG_GENERIC_IOMAP */ | ||
diff --git a/arch/sh/kernel/io_generic.c b/arch/sh/kernel/io_generic.c index e1e1dbd19557..447d78f666f9 100644 --- a/arch/sh/kernel/io_generic.c +++ b/arch/sh/kernel/io_generic.c | |||
| @@ -158,3 +158,23 @@ void __iomem *generic_ioport_map(unsigned long addr, unsigned int size) | |||
| 158 | void generic_ioport_unmap(void __iomem *addr) | 158 | void generic_ioport_unmap(void __iomem *addr) |
| 159 | { | 159 | { |
| 160 | } | 160 | } |
| 161 | |||
| 162 | #ifndef CONFIG_GENERIC_IOMAP | ||
| 163 | void __iomem *ioport_map(unsigned long port, unsigned int nr) | ||
| 164 | { | ||
| 165 | void __iomem *ret; | ||
| 166 | |||
| 167 | ret = __ioport_map_trapped(port, nr); | ||
| 168 | if (ret) | ||
| 169 | return ret; | ||
| 170 | |||
| 171 | return __ioport_map(port, nr); | ||
| 172 | } | ||
| 173 | EXPORT_SYMBOL(ioport_map); | ||
| 174 | |||
| 175 | void ioport_unmap(void __iomem *addr) | ||
| 176 | { | ||
| 177 | sh_mv.mv_ioport_unmap(addr); | ||
| 178 | } | ||
| 179 | EXPORT_SYMBOL(ioport_unmap); | ||
| 180 | #endif /* CONFIG_GENERIC_IOMAP */ | ||
diff --git a/arch/sh/kernel/io_trapped.c b/arch/sh/kernel/io_trapped.c index 4a8bb4eeb8ad..2947d2bd1291 100644 --- a/arch/sh/kernel/io_trapped.c +++ b/arch/sh/kernel/io_trapped.c | |||
| @@ -91,10 +91,14 @@ int register_trapped_io(struct trapped_io *tiop) | |||
| 91 | tiop->magic = IO_TRAPPED_MAGIC; | 91 | tiop->magic = IO_TRAPPED_MAGIC; |
| 92 | INIT_LIST_HEAD(&tiop->list); | 92 | INIT_LIST_HEAD(&tiop->list); |
| 93 | spin_lock_irq(&trapped_lock); | 93 | spin_lock_irq(&trapped_lock); |
| 94 | #ifdef CONFIG_HAS_IOPORT | ||
| 94 | if (flags & IORESOURCE_IO) | 95 | if (flags & IORESOURCE_IO) |
| 95 | list_add(&tiop->list, &trapped_io); | 96 | list_add(&tiop->list, &trapped_io); |
| 97 | #endif | ||
| 98 | #ifdef CONFIG_HAS_IOMEM | ||
| 96 | if (flags & IORESOURCE_MEM) | 99 | if (flags & IORESOURCE_MEM) |
| 97 | list_add(&tiop->list, &trapped_mem); | 100 | list_add(&tiop->list, &trapped_mem); |
| 101 | #endif | ||
| 98 | spin_unlock_irq(&trapped_lock); | 102 | spin_unlock_irq(&trapped_lock); |
| 99 | 103 | ||
| 100 | return 0; | 104 | return 0; |
diff --git a/arch/sh/kernel/machvec.c b/arch/sh/kernel/machvec.c index 85cfaf916fdc..9f9bb63616ad 100644 --- a/arch/sh/kernel/machvec.c +++ b/arch/sh/kernel/machvec.c | |||
| @@ -118,6 +118,14 @@ void __init sh_mv_setup(void) | |||
| 118 | sh_mv.mv_##elem = generic_##elem; \ | 118 | sh_mv.mv_##elem = generic_##elem; \ |
| 119 | } while (0) | 119 | } while (0) |
| 120 | 120 | ||
| 121 | #ifdef CONFIG_HAS_IOPORT | ||
| 122 | |||
| 123 | #ifdef P2SEG | ||
| 124 | __set_io_port_base(P2SEG); | ||
| 125 | #else | ||
| 126 | __set_io_port_base(0); | ||
| 127 | #endif | ||
| 128 | |||
| 121 | mv_set(inb); mv_set(inw); mv_set(inl); | 129 | mv_set(inb); mv_set(inw); mv_set(inl); |
| 122 | mv_set(outb); mv_set(outw); mv_set(outl); | 130 | mv_set(outb); mv_set(outw); mv_set(outl); |
| 123 | 131 | ||
| @@ -129,16 +137,13 @@ void __init sh_mv_setup(void) | |||
| 129 | 137 | ||
| 130 | mv_set(ioport_map); | 138 | mv_set(ioport_map); |
| 131 | mv_set(ioport_unmap); | 139 | mv_set(ioport_unmap); |
| 140 | |||
| 141 | #endif | ||
| 142 | |||
| 132 | mv_set(irq_demux); | 143 | mv_set(irq_demux); |
| 133 | mv_set(mode_pins); | 144 | mv_set(mode_pins); |
| 134 | mv_set(mem_init); | 145 | mv_set(mem_init); |
| 135 | 146 | ||
| 136 | if (!sh_mv.mv_nr_irqs) | 147 | if (!sh_mv.mv_nr_irqs) |
| 137 | sh_mv.mv_nr_irqs = NR_IRQS; | 148 | sh_mv.mv_nr_irqs = NR_IRQS; |
| 138 | |||
| 139 | #ifdef P2SEG | ||
| 140 | __set_io_port_base(P2SEG); | ||
| 141 | #else | ||
| 142 | __set_io_port_base(0); | ||
| 143 | #endif | ||
| 144 | } | 149 | } |
diff --git a/arch/sh/kernel/ptrace_32.c b/arch/sh/kernel/ptrace_32.c index d4104ce9fe53..6c4bbba2a675 100644 --- a/arch/sh/kernel/ptrace_32.c +++ b/arch/sh/kernel/ptrace_32.c | |||
| @@ -436,29 +436,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) | |||
| 436 | 0, sizeof(struct pt_dspregs), | 436 | 0, sizeof(struct pt_dspregs), |
| 437 | (const void __user *)data); | 437 | (const void __user *)data); |
| 438 | #endif | 438 | #endif |
| 439 | #ifdef CONFIG_BINFMT_ELF_FDPIC | ||
| 440 | case PTRACE_GETFDPIC: { | ||
| 441 | unsigned long tmp = 0; | ||
| 442 | |||
| 443 | switch (addr) { | ||
| 444 | case PTRACE_GETFDPIC_EXEC: | ||
| 445 | tmp = child->mm->context.exec_fdpic_loadmap; | ||
| 446 | break; | ||
| 447 | case PTRACE_GETFDPIC_INTERP: | ||
| 448 | tmp = child->mm->context.interp_fdpic_loadmap; | ||
| 449 | break; | ||
| 450 | default: | ||
| 451 | break; | ||
| 452 | } | ||
| 453 | |||
| 454 | ret = 0; | ||
| 455 | if (put_user(tmp, datap)) { | ||
| 456 | ret = -EFAULT; | ||
| 457 | break; | ||
| 458 | } | ||
| 459 | break; | ||
| 460 | } | ||
| 461 | #endif | ||
| 462 | default: | 439 | default: |
| 463 | ret = ptrace_request(child, request, addr, data); | 440 | ret = ptrace_request(child, request, addr, data); |
| 464 | break; | 441 | break; |
diff --git a/arch/sh/kernel/return_address.c b/arch/sh/kernel/return_address.c index cbf1dd5372b2..5124aeb28c3f 100644 --- a/arch/sh/kernel/return_address.c +++ b/arch/sh/kernel/return_address.c | |||
| @@ -24,6 +24,8 @@ void *return_address(unsigned int depth) | |||
| 24 | struct dwarf_frame *tmp; | 24 | struct dwarf_frame *tmp; |
| 25 | 25 | ||
| 26 | tmp = dwarf_unwind_stack(ra, frame); | 26 | tmp = dwarf_unwind_stack(ra, frame); |
| 27 | if (!tmp) | ||
| 28 | return NULL; | ||
| 27 | 29 | ||
| 28 | if (frame) | 30 | if (frame) |
| 29 | dwarf_free_frame(frame); | 31 | dwarf_free_frame(frame); |
diff --git a/arch/sh/lib/strlen.S b/arch/sh/lib/strlen.S index f8ab296047b3..1bcc13f05962 100644 --- a/arch/sh/lib/strlen.S +++ b/arch/sh/lib/strlen.S | |||
| @@ -35,7 +35,7 @@ ENTRY(strlen) | |||
| 35 | mov.b @r4+,r1 | 35 | mov.b @r4+,r1 |
| 36 | tst r1,r1 | 36 | tst r1,r1 |
| 37 | bt 8f | 37 | bt 8f |
| 38 | add #1,r2 | 38 | add #1,r2 |
| 39 | 39 | ||
| 40 | 1: | 40 | 1: |
| 41 | mov #0,r3 | 41 | mov #0,r3 |
diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig index d6781ce687e2..6f1470baa314 100644 --- a/arch/sparc/Kconfig +++ b/arch/sparc/Kconfig | |||
| @@ -133,6 +133,9 @@ config ZONE_DMA | |||
| 133 | config NEED_DMA_MAP_STATE | 133 | config NEED_DMA_MAP_STATE |
| 134 | def_bool y | 134 | def_bool y |
| 135 | 135 | ||
| 136 | config NEED_SG_DMA_LENGTH | ||
| 137 | def_bool y | ||
| 138 | |||
| 136 | config GENERIC_ISA_DMA | 139 | config GENERIC_ISA_DMA |
| 137 | bool | 140 | bool |
| 138 | default y if SPARC32 | 141 | default y if SPARC32 |
diff --git a/arch/sparc/boot/btfixupprep.c b/arch/sparc/boot/btfixupprep.c index b60491102237..da031159e2b7 100644 --- a/arch/sparc/boot/btfixupprep.c +++ b/arch/sparc/boot/btfixupprep.c | |||
| @@ -325,7 +325,7 @@ main1: | |||
| 325 | (*rr)->next = NULL; | 325 | (*rr)->next = NULL; |
| 326 | } | 326 | } |
| 327 | printf("! Generated by btfixupprep. Do not edit.\n\n"); | 327 | printf("! Generated by btfixupprep. Do not edit.\n\n"); |
| 328 | printf("\t.section\t\".data.init\",#alloc,#write\n\t.align\t4\n\n"); | 328 | printf("\t.section\t\".data..init\",#alloc,#write\n\t.align\t4\n\n"); |
| 329 | printf("\t.global\t___btfixup_start\n___btfixup_start:\n\n"); | 329 | printf("\t.global\t___btfixup_start\n___btfixup_start:\n\n"); |
| 330 | for (i = 0; i < last; i++) { | 330 | for (i = 0; i < last; i++) { |
| 331 | f = array + i; | 331 | f = array + i; |
diff --git a/arch/sparc/include/asm/cache.h b/arch/sparc/include/asm/cache.h index 78b07009f60a..0588b8c7faa2 100644 --- a/arch/sparc/include/asm/cache.h +++ b/arch/sparc/include/asm/cache.h | |||
| @@ -21,7 +21,7 @@ | |||
| 21 | 21 | ||
| 22 | #define SMP_CACHE_BYTES (1 << SMP_CACHE_BYTES_SHIFT) | 22 | #define SMP_CACHE_BYTES (1 << SMP_CACHE_BYTES_SHIFT) |
| 23 | 23 | ||
| 24 | #define __read_mostly __attribute__((__section__(".data.read_mostly"))) | 24 | #define __read_mostly __attribute__((__section__(".data..read_mostly"))) |
| 25 | 25 | ||
| 26 | #ifdef CONFIG_SPARC32 | 26 | #ifdef CONFIG_SPARC32 |
| 27 | #include <asm/asi.h> | 27 | #include <asm/asi.h> |
diff --git a/arch/sparc/include/asm/device.h b/arch/sparc/include/asm/device.h index f3b85b6b0b76..d4c452147412 100644 --- a/arch/sparc/include/asm/device.h +++ b/arch/sparc/include/asm/device.h | |||
| @@ -13,25 +13,10 @@ struct dev_archdata { | |||
| 13 | void *iommu; | 13 | void *iommu; |
| 14 | void *stc; | 14 | void *stc; |
| 15 | void *host_controller; | 15 | void *host_controller; |
| 16 | |||
| 17 | struct device_node *prom_node; | ||
| 18 | struct of_device *op; | 16 | struct of_device *op; |
| 19 | |||
| 20 | int numa_node; | 17 | int numa_node; |
| 21 | }; | 18 | }; |
| 22 | 19 | ||
| 23 | static inline void dev_archdata_set_node(struct dev_archdata *ad, | ||
| 24 | struct device_node *np) | ||
| 25 | { | ||
| 26 | ad->prom_node = np; | ||
| 27 | } | ||
| 28 | |||
| 29 | static inline struct device_node * | ||
| 30 | dev_archdata_get_node(const struct dev_archdata *ad) | ||
| 31 | { | ||
| 32 | return ad->prom_node; | ||
| 33 | } | ||
| 34 | |||
| 35 | struct pdev_archdata { | 20 | struct pdev_archdata { |
| 36 | }; | 21 | }; |
| 37 | 22 | ||
diff --git a/arch/sparc/include/asm/fb.h b/arch/sparc/include/asm/fb.h index b83e44729655..e834880be204 100644 --- a/arch/sparc/include/asm/fb.h +++ b/arch/sparc/include/asm/fb.h | |||
| @@ -18,7 +18,7 @@ static inline int fb_is_primary_device(struct fb_info *info) | |||
| 18 | struct device *dev = info->device; | 18 | struct device *dev = info->device; |
| 19 | struct device_node *node; | 19 | struct device_node *node; |
| 20 | 20 | ||
| 21 | node = dev->archdata.prom_node; | 21 | node = dev->of_node; |
| 22 | if (node && | 22 | if (node && |
| 23 | node == of_console_device) | 23 | node == of_console_device) |
| 24 | return 1; | 24 | return 1; |
diff --git a/arch/sparc/include/asm/floppy_64.h b/arch/sparc/include/asm/floppy_64.h index 36439d67ad71..8fac3ab22f36 100644 --- a/arch/sparc/include/asm/floppy_64.h +++ b/arch/sparc/include/asm/floppy_64.h | |||
| @@ -589,7 +589,7 @@ static unsigned long __init sun_floppy_init(void) | |||
| 589 | if (!op) | 589 | if (!op) |
| 590 | return 0; | 590 | return 0; |
| 591 | 591 | ||
| 592 | state_prop = of_get_property(op->node, "status", NULL); | 592 | state_prop = of_get_property(op->dev.of_node, "status", NULL); |
| 593 | if (state_prop && !strncmp(state_prop, "disabled", 8)) | 593 | if (state_prop && !strncmp(state_prop, "disabled", 8)) |
| 594 | return 0; | 594 | return 0; |
| 595 | 595 | ||
| @@ -716,7 +716,7 @@ static unsigned long __init sun_floppy_init(void) | |||
| 716 | 716 | ||
| 717 | return sun_floppy_types[0]; | 717 | return sun_floppy_types[0]; |
| 718 | } | 718 | } |
| 719 | prop = of_get_property(op->node, "status", NULL); | 719 | prop = of_get_property(op->dev.of_node, "status", NULL); |
| 720 | if (prop && !strncmp(state, "disabled", 8)) | 720 | if (prop && !strncmp(state, "disabled", 8)) |
| 721 | return 0; | 721 | return 0; |
| 722 | 722 | ||
diff --git a/arch/sparc/include/asm/of_device.h b/arch/sparc/include/asm/of_device.h index a5d9811f9697..f320246a0586 100644 --- a/arch/sparc/include/asm/of_device.h +++ b/arch/sparc/include/asm/of_device.h | |||
| @@ -14,7 +14,6 @@ | |||
| 14 | */ | 14 | */ |
| 15 | struct of_device | 15 | struct of_device |
| 16 | { | 16 | { |
| 17 | struct device_node *node; | ||
| 18 | struct device dev; | 17 | struct device dev; |
| 19 | struct resource resource[PROMREG_MAX]; | 18 | struct resource resource[PROMREG_MAX]; |
| 20 | unsigned int irqs[PROMINTR_MAX]; | 19 | unsigned int irqs[PROMINTR_MAX]; |
diff --git a/arch/sparc/include/asm/parport.h b/arch/sparc/include/asm/parport.h index ff9ead640c4a..c333b8d0949b 100644 --- a/arch/sparc/include/asm/parport.h +++ b/arch/sparc/include/asm/parport.h | |||
| @@ -113,7 +113,7 @@ static int __devinit ecpp_probe(struct of_device *op, const struct of_device_id | |||
| 113 | struct parport *p; | 113 | struct parport *p; |
| 114 | int slot, err; | 114 | int slot, err; |
| 115 | 115 | ||
| 116 | parent = op->node->parent; | 116 | parent = op->dev.of_node->parent; |
| 117 | if (!strcmp(parent->name, "dma")) { | 117 | if (!strcmp(parent->name, "dma")) { |
| 118 | p = parport_pc_probe_port(base, base + 0x400, | 118 | p = parport_pc_probe_port(base, base + 0x400, |
| 119 | op->irqs[0], PARPORT_DMA_NOFIFO, | 119 | op->irqs[0], PARPORT_DMA_NOFIFO, |
| @@ -232,8 +232,11 @@ static const struct of_device_id ecpp_match[] = { | |||
| 232 | }; | 232 | }; |
| 233 | 233 | ||
| 234 | static struct of_platform_driver ecpp_driver = { | 234 | static struct of_platform_driver ecpp_driver = { |
| 235 | .name = "ecpp", | 235 | .driver = { |
| 236 | .match_table = ecpp_match, | 236 | .name = "ecpp", |
| 237 | .owner = THIS_MODULE, | ||
| 238 | .of_match_table = ecpp_match, | ||
| 239 | }, | ||
| 237 | .probe = ecpp_probe, | 240 | .probe = ecpp_probe, |
| 238 | .remove = __devexit_p(ecpp_remove), | 241 | .remove = __devexit_p(ecpp_remove), |
| 239 | }; | 242 | }; |
diff --git a/arch/sparc/include/asm/scatterlist.h b/arch/sparc/include/asm/scatterlist.h index d1120257b033..433e45f05fd4 100644 --- a/arch/sparc/include/asm/scatterlist.h +++ b/arch/sparc/include/asm/scatterlist.h | |||
| @@ -1,8 +1,9 @@ | |||
| 1 | #ifndef _SPARC_SCATTERLIST_H | 1 | #ifndef _SPARC_SCATTERLIST_H |
| 2 | #define _SPARC_SCATTERLIST_H | 2 | #define _SPARC_SCATTERLIST_H |
| 3 | 3 | ||
| 4 | #define sg_dma_len(sg) ((sg)->dma_length) | ||
| 5 | |||
| 6 | #include <asm-generic/scatterlist.h> | 4 | #include <asm-generic/scatterlist.h> |
| 7 | 5 | ||
| 6 | #define ISA_DMA_THRESHOLD (~0UL) | ||
| 7 | #define ARCH_HAS_SG_CHAIN | ||
| 8 | |||
| 8 | #endif /* !(_SPARC_SCATTERLIST_H) */ | 9 | #endif /* !(_SPARC_SCATTERLIST_H) */ |
diff --git a/arch/sparc/kernel/apc.c b/arch/sparc/kernel/apc.c index 71ec90b9e316..b27476caa133 100644 --- a/arch/sparc/kernel/apc.c +++ b/arch/sparc/kernel/apc.c | |||
| @@ -174,8 +174,11 @@ static struct of_device_id __initdata apc_match[] = { | |||
| 174 | MODULE_DEVICE_TABLE(of, apc_match); | 174 | MODULE_DEVICE_TABLE(of, apc_match); |
| 175 | 175 | ||
| 176 | static struct of_platform_driver apc_driver = { | 176 | static struct of_platform_driver apc_driver = { |
| 177 | .name = "apc", | 177 | .driver = { |
| 178 | .match_table = apc_match, | 178 | .name = "apc", |
| 179 | .owner = THIS_MODULE, | ||
| 180 | .of_match_table = apc_match, | ||
| 181 | }, | ||
| 179 | .probe = apc_probe, | 182 | .probe = apc_probe, |
| 180 | }; | 183 | }; |
| 181 | 184 | ||
diff --git a/arch/sparc/kernel/auxio_64.c b/arch/sparc/kernel/auxio_64.c index 9f52db2d441c..ddc84128b3c2 100644 --- a/arch/sparc/kernel/auxio_64.c +++ b/arch/sparc/kernel/auxio_64.c | |||
| @@ -104,7 +104,7 @@ MODULE_DEVICE_TABLE(of, auxio_match); | |||
| 104 | 104 | ||
| 105 | static int __devinit auxio_probe(struct of_device *dev, const struct of_device_id *match) | 105 | static int __devinit auxio_probe(struct of_device *dev, const struct of_device_id *match) |
| 106 | { | 106 | { |
| 107 | struct device_node *dp = dev->node; | 107 | struct device_node *dp = dev->dev.of_node; |
| 108 | unsigned long size; | 108 | unsigned long size; |
| 109 | 109 | ||
| 110 | if (!strcmp(dp->parent->name, "ebus")) { | 110 | if (!strcmp(dp->parent->name, "ebus")) { |
| @@ -132,10 +132,11 @@ static int __devinit auxio_probe(struct of_device *dev, const struct of_device_i | |||
| 132 | } | 132 | } |
| 133 | 133 | ||
| 134 | static struct of_platform_driver auxio_driver = { | 134 | static struct of_platform_driver auxio_driver = { |
| 135 | .match_table = auxio_match, | ||
| 136 | .probe = auxio_probe, | 135 | .probe = auxio_probe, |
| 137 | .driver = { | 136 | .driver = { |
| 138 | .name = "auxio", | 137 | .name = "auxio", |
| 138 | .owner = THIS_MODULE, | ||
| 139 | .of_match_table = auxio_match, | ||
| 139 | }, | 140 | }, |
| 140 | }; | 141 | }; |
| 141 | 142 | ||
diff --git a/arch/sparc/kernel/central.c b/arch/sparc/kernel/central.c index 415c86d5a8da..434335f65823 100644 --- a/arch/sparc/kernel/central.c +++ b/arch/sparc/kernel/central.c | |||
| @@ -149,10 +149,11 @@ static struct of_device_id __initdata clock_board_match[] = { | |||
| 149 | }; | 149 | }; |
| 150 | 150 | ||
| 151 | static struct of_platform_driver clock_board_driver = { | 151 | static struct of_platform_driver clock_board_driver = { |
| 152 | .match_table = clock_board_match, | ||
| 153 | .probe = clock_board_probe, | 152 | .probe = clock_board_probe, |
| 154 | .driver = { | 153 | .driver = { |
| 155 | .name = "clock_board", | 154 | .name = "clock_board", |
| 155 | .owner = THIS_MODULE, | ||
| 156 | .of_match_table = clock_board_match, | ||
| 156 | }, | 157 | }, |
| 157 | }; | 158 | }; |
| 158 | 159 | ||
| @@ -168,7 +169,7 @@ static int __devinit fhc_probe(struct of_device *op, | |||
| 168 | goto out; | 169 | goto out; |
| 169 | } | 170 | } |
| 170 | 171 | ||
| 171 | if (!strcmp(op->node->parent->name, "central")) | 172 | if (!strcmp(op->dev.of_node->parent->name, "central")) |
| 172 | p->central = true; | 173 | p->central = true; |
| 173 | 174 | ||
| 174 | p->pregs = of_ioremap(&op->resource[0], 0, | 175 | p->pregs = of_ioremap(&op->resource[0], 0, |
| @@ -183,7 +184,7 @@ static int __devinit fhc_probe(struct of_device *op, | |||
| 183 | reg = upa_readl(p->pregs + FHC_PREGS_BSR); | 184 | reg = upa_readl(p->pregs + FHC_PREGS_BSR); |
| 184 | p->board_num = ((reg >> 16) & 1) | ((reg >> 12) & 0x0e); | 185 | p->board_num = ((reg >> 16) & 1) | ((reg >> 12) & 0x0e); |
| 185 | } else { | 186 | } else { |
| 186 | p->board_num = of_getintprop_default(op->node, "board#", -1); | 187 | p->board_num = of_getintprop_default(op->dev.of_node, "board#", -1); |
| 187 | if (p->board_num == -1) { | 188 | if (p->board_num == -1) { |
| 188 | printk(KERN_ERR "fhc: No board# property\n"); | 189 | printk(KERN_ERR "fhc: No board# property\n"); |
| 189 | goto out_unmap_pregs; | 190 | goto out_unmap_pregs; |
| @@ -254,10 +255,11 @@ static struct of_device_id __initdata fhc_match[] = { | |||
| 254 | }; | 255 | }; |
| 255 | 256 | ||
| 256 | static struct of_platform_driver fhc_driver = { | 257 | static struct of_platform_driver fhc_driver = { |
| 257 | .match_table = fhc_match, | ||
| 258 | .probe = fhc_probe, | 258 | .probe = fhc_probe, |
| 259 | .driver = { | 259 | .driver = { |
| 260 | .name = "fhc", | 260 | .name = "fhc", |
| 261 | .owner = THIS_MODULE, | ||
| 262 | .of_match_table = fhc_match, | ||
| 261 | }, | 263 | }, |
| 262 | }; | 264 | }; |
| 263 | 265 | ||
diff --git a/arch/sparc/kernel/chmc.c b/arch/sparc/kernel/chmc.c index e1a9598e2a4d..870cb65b3f21 100644 --- a/arch/sparc/kernel/chmc.c +++ b/arch/sparc/kernel/chmc.c | |||
| @@ -425,7 +425,7 @@ static int __devinit jbusmc_probe(struct of_device *op, | |||
| 425 | INIT_LIST_HEAD(&p->list); | 425 | INIT_LIST_HEAD(&p->list); |
| 426 | 426 | ||
| 427 | err = -ENODEV; | 427 | err = -ENODEV; |
| 428 | prop = of_get_property(op->node, "portid", &len); | 428 | prop = of_get_property(op->dev.of_node, "portid", &len); |
| 429 | if (!prop || len != 4) { | 429 | if (!prop || len != 4) { |
| 430 | printk(KERN_ERR PFX "Cannot find portid.\n"); | 430 | printk(KERN_ERR PFX "Cannot find portid.\n"); |
| 431 | goto out_free; | 431 | goto out_free; |
| @@ -433,7 +433,7 @@ static int __devinit jbusmc_probe(struct of_device *op, | |||
| 433 | 433 | ||
| 434 | p->portid = *prop; | 434 | p->portid = *prop; |
| 435 | 435 | ||
| 436 | prop = of_get_property(op->node, "memory-control-register-1", &len); | 436 | prop = of_get_property(op->dev.of_node, "memory-control-register-1", &len); |
| 437 | if (!prop || len != 8) { | 437 | if (!prop || len != 8) { |
| 438 | printk(KERN_ERR PFX "Cannot get memory control register 1.\n"); | 438 | printk(KERN_ERR PFX "Cannot get memory control register 1.\n"); |
| 439 | goto out_free; | 439 | goto out_free; |
| @@ -449,7 +449,7 @@ static int __devinit jbusmc_probe(struct of_device *op, | |||
| 449 | } | 449 | } |
| 450 | 450 | ||
| 451 | err = -ENODEV; | 451 | err = -ENODEV; |
| 452 | ml = of_get_property(op->node, "memory-layout", &p->layout_len); | 452 | ml = of_get_property(op->dev.of_node, "memory-layout", &p->layout_len); |
| 453 | if (!ml) { | 453 | if (!ml) { |
| 454 | printk(KERN_ERR PFX "Cannot get memory layout property.\n"); | 454 | printk(KERN_ERR PFX "Cannot get memory layout property.\n"); |
| 455 | goto out_iounmap; | 455 | goto out_iounmap; |
| @@ -466,7 +466,7 @@ static int __devinit jbusmc_probe(struct of_device *op, | |||
| 466 | mc_list_add(&p->list); | 466 | mc_list_add(&p->list); |
| 467 | 467 | ||
| 468 | printk(KERN_INFO PFX "UltraSPARC-IIIi memory controller at %s\n", | 468 | printk(KERN_INFO PFX "UltraSPARC-IIIi memory controller at %s\n", |
| 469 | op->node->full_name); | 469 | op->dev.of_node->full_name); |
| 470 | 470 | ||
| 471 | dev_set_drvdata(&op->dev, p); | 471 | dev_set_drvdata(&op->dev, p); |
| 472 | 472 | ||
| @@ -693,7 +693,7 @@ static void chmc_fetch_decode_regs(struct chmc *p) | |||
| 693 | static int __devinit chmc_probe(struct of_device *op, | 693 | static int __devinit chmc_probe(struct of_device *op, |
| 694 | const struct of_device_id *match) | 694 | const struct of_device_id *match) |
| 695 | { | 695 | { |
| 696 | struct device_node *dp = op->node; | 696 | struct device_node *dp = op->dev.of_node; |
| 697 | unsigned long ver; | 697 | unsigned long ver; |
| 698 | const void *pval; | 698 | const void *pval; |
| 699 | int len, portid; | 699 | int len, portid; |
| @@ -811,8 +811,11 @@ static const struct of_device_id us3mc_match[] = { | |||
| 811 | MODULE_DEVICE_TABLE(of, us3mc_match); | 811 | MODULE_DEVICE_TABLE(of, us3mc_match); |
| 812 | 812 | ||
| 813 | static struct of_platform_driver us3mc_driver = { | 813 | static struct of_platform_driver us3mc_driver = { |
| 814 | .name = "us3mc", | 814 | .driver = { |
| 815 | .match_table = us3mc_match, | 815 | .name = "us3mc", |
| 816 | .owner = THIS_MODULE, | ||
| 817 | .of_match_table = us3mc_match, | ||
| 818 | }, | ||
| 816 | .probe = us3mc_probe, | 819 | .probe = us3mc_probe, |
| 817 | .remove = __devexit_p(us3mc_remove), | 820 | .remove = __devexit_p(us3mc_remove), |
| 818 | }; | 821 | }; |
diff --git a/arch/sparc/kernel/ioport.c b/arch/sparc/kernel/ioport.c index 84e5386714cd..703e4aa9bc38 100644 --- a/arch/sparc/kernel/ioport.c +++ b/arch/sparc/kernel/ioport.c | |||
| @@ -290,7 +290,7 @@ static void *sbus_alloc_coherent(struct device *dev, size_t len, | |||
| 290 | if (mmu_map_dma_area(dev, dma_addrp, va, res->start, len_total) != 0) | 290 | if (mmu_map_dma_area(dev, dma_addrp, va, res->start, len_total) != 0) |
| 291 | goto err_noiommu; | 291 | goto err_noiommu; |
| 292 | 292 | ||
| 293 | res->name = op->node->name; | 293 | res->name = op->dev.of_node->name; |
| 294 | 294 | ||
| 295 | return (void *)(unsigned long)res->start; | 295 | return (void *)(unsigned long)res->start; |
| 296 | 296 | ||
diff --git a/arch/sparc/kernel/of_device_32.c b/arch/sparc/kernel/of_device_32.c index da527b33ebc7..47e63f1e719c 100644 --- a/arch/sparc/kernel/of_device_32.c +++ b/arch/sparc/kernel/of_device_32.c | |||
| @@ -254,10 +254,10 @@ static void __init build_device_resources(struct of_device *op, | |||
| 254 | return; | 254 | return; |
| 255 | 255 | ||
| 256 | p_op = to_of_device(parent); | 256 | p_op = to_of_device(parent); |
| 257 | bus = of_match_bus(p_op->node); | 257 | bus = of_match_bus(p_op->dev.of_node); |
| 258 | bus->count_cells(op->node, &na, &ns); | 258 | bus->count_cells(op->dev.of_node, &na, &ns); |
| 259 | 259 | ||
| 260 | preg = of_get_property(op->node, bus->addr_prop_name, &num_reg); | 260 | preg = of_get_property(op->dev.of_node, bus->addr_prop_name, &num_reg); |
| 261 | if (!preg || num_reg == 0) | 261 | if (!preg || num_reg == 0) |
| 262 | return; | 262 | return; |
| 263 | 263 | ||
| @@ -271,8 +271,8 @@ static void __init build_device_resources(struct of_device *op, | |||
| 271 | struct resource *r = &op->resource[index]; | 271 | struct resource *r = &op->resource[index]; |
| 272 | u32 addr[OF_MAX_ADDR_CELLS]; | 272 | u32 addr[OF_MAX_ADDR_CELLS]; |
| 273 | const u32 *reg = (preg + (index * ((na + ns) * 4))); | 273 | const u32 *reg = (preg + (index * ((na + ns) * 4))); |
| 274 | struct device_node *dp = op->node; | 274 | struct device_node *dp = op->dev.of_node; |
| 275 | struct device_node *pp = p_op->node; | 275 | struct device_node *pp = p_op->dev.of_node; |
| 276 | struct of_bus *pbus, *dbus; | 276 | struct of_bus *pbus, *dbus; |
| 277 | u64 size, result = OF_BAD_ADDR; | 277 | u64 size, result = OF_BAD_ADDR; |
| 278 | unsigned long flags; | 278 | unsigned long flags; |
| @@ -321,7 +321,7 @@ static void __init build_device_resources(struct of_device *op, | |||
| 321 | 321 | ||
| 322 | if (of_resource_verbose) | 322 | if (of_resource_verbose) |
| 323 | printk("%s reg[%d] -> %llx\n", | 323 | printk("%s reg[%d] -> %llx\n", |
| 324 | op->node->full_name, index, | 324 | op->dev.of_node->full_name, index, |
| 325 | result); | 325 | result); |
| 326 | 326 | ||
| 327 | if (result != OF_BAD_ADDR) { | 327 | if (result != OF_BAD_ADDR) { |
| @@ -329,7 +329,7 @@ static void __init build_device_resources(struct of_device *op, | |||
| 329 | r->end = result + size - 1; | 329 | r->end = result + size - 1; |
| 330 | r->flags = flags | ((result >> 32ULL) & 0xffUL); | 330 | r->flags = flags | ((result >> 32ULL) & 0xffUL); |
| 331 | } | 331 | } |
| 332 | r->name = op->node->name; | 332 | r->name = op->dev.of_node->name; |
| 333 | } | 333 | } |
| 334 | } | 334 | } |
| 335 | 335 | ||
| @@ -345,10 +345,9 @@ static struct of_device * __init scan_one_device(struct device_node *dp, | |||
| 345 | return NULL; | 345 | return NULL; |
| 346 | 346 | ||
| 347 | sd = &op->dev.archdata; | 347 | sd = &op->dev.archdata; |
| 348 | sd->prom_node = dp; | ||
| 349 | sd->op = op; | 348 | sd->op = op; |
| 350 | 349 | ||
| 351 | op->node = dp; | 350 | op->dev.of_node = dp; |
| 352 | 351 | ||
| 353 | op->clock_freq = of_getintprop_default(dp, "clock-frequency", | 352 | op->clock_freq = of_getintprop_default(dp, "clock-frequency", |
| 354 | (25*1000*1000)); | 353 | (25*1000*1000)); |
diff --git a/arch/sparc/kernel/of_device_64.c b/arch/sparc/kernel/of_device_64.c index b3d4cb5d21b3..1dae8079f728 100644 --- a/arch/sparc/kernel/of_device_64.c +++ b/arch/sparc/kernel/of_device_64.c | |||
| @@ -323,10 +323,10 @@ static void __init build_device_resources(struct of_device *op, | |||
| 323 | return; | 323 | return; |
| 324 | 324 | ||
| 325 | p_op = to_of_device(parent); | 325 | p_op = to_of_device(parent); |
| 326 | bus = of_match_bus(p_op->node); | 326 | bus = of_match_bus(p_op->dev.of_node); |
| 327 | bus->count_cells(op->node, &na, &ns); | 327 | bus->count_cells(op->dev.of_node, &na, &ns); |
| 328 | 328 | ||
| 329 | preg = of_get_property(op->node, bus->addr_prop_name, &num_reg); | 329 | preg = of_get_property(op->dev.of_node, bus->addr_prop_name, &num_reg); |
| 330 | if (!preg || num_reg == 0) | 330 | if (!preg || num_reg == 0) |
| 331 | return; | 331 | return; |
| 332 | 332 | ||
| @@ -340,7 +340,7 @@ static void __init build_device_resources(struct of_device *op, | |||
| 340 | if (num_reg > PROMREG_MAX) { | 340 | if (num_reg > PROMREG_MAX) { |
| 341 | printk(KERN_WARNING "%s: Too many regs (%d), " | 341 | printk(KERN_WARNING "%s: Too many regs (%d), " |
| 342 | "limiting to %d.\n", | 342 | "limiting to %d.\n", |
| 343 | op->node->full_name, num_reg, PROMREG_MAX); | 343 | op->dev.of_node->full_name, num_reg, PROMREG_MAX); |
| 344 | num_reg = PROMREG_MAX; | 344 | num_reg = PROMREG_MAX; |
| 345 | } | 345 | } |
| 346 | 346 | ||
| @@ -348,8 +348,8 @@ static void __init build_device_resources(struct of_device *op, | |||
| 348 | struct resource *r = &op->resource[index]; | 348 | struct resource *r = &op->resource[index]; |
| 349 | u32 addr[OF_MAX_ADDR_CELLS]; | 349 | u32 addr[OF_MAX_ADDR_CELLS]; |
| 350 | const u32 *reg = (preg + (index * ((na + ns) * 4))); | 350 | const u32 *reg = (preg + (index * ((na + ns) * 4))); |
| 351 | struct device_node *dp = op->node; | 351 | struct device_node *dp = op->dev.of_node; |
| 352 | struct device_node *pp = p_op->node; | 352 | struct device_node *pp = p_op->dev.of_node; |
| 353 | struct of_bus *pbus, *dbus; | 353 | struct of_bus *pbus, *dbus; |
| 354 | u64 size, result = OF_BAD_ADDR; | 354 | u64 size, result = OF_BAD_ADDR; |
| 355 | unsigned long flags; | 355 | unsigned long flags; |
| @@ -397,7 +397,7 @@ static void __init build_device_resources(struct of_device *op, | |||
| 397 | 397 | ||
| 398 | if (of_resource_verbose) | 398 | if (of_resource_verbose) |
| 399 | printk("%s reg[%d] -> %llx\n", | 399 | printk("%s reg[%d] -> %llx\n", |
| 400 | op->node->full_name, index, | 400 | op->dev.of_node->full_name, index, |
| 401 | result); | 401 | result); |
| 402 | 402 | ||
| 403 | if (result != OF_BAD_ADDR) { | 403 | if (result != OF_BAD_ADDR) { |
| @@ -408,7 +408,7 @@ static void __init build_device_resources(struct of_device *op, | |||
| 408 | r->end = result + size - 1; | 408 | r->end = result + size - 1; |
| 409 | r->flags = flags; | 409 | r->flags = flags; |
| 410 | } | 410 | } |
| 411 | r->name = op->node->name; | 411 | r->name = op->dev.of_node->name; |
| 412 | } | 412 | } |
| 413 | } | 413 | } |
| 414 | 414 | ||
| @@ -530,7 +530,7 @@ static unsigned int __init build_one_device_irq(struct of_device *op, | |||
| 530 | struct device *parent, | 530 | struct device *parent, |
| 531 | unsigned int irq) | 531 | unsigned int irq) |
| 532 | { | 532 | { |
| 533 | struct device_node *dp = op->node; | 533 | struct device_node *dp = op->dev.of_node; |
| 534 | struct device_node *pp, *ip; | 534 | struct device_node *pp, *ip; |
| 535 | unsigned int orig_irq = irq; | 535 | unsigned int orig_irq = irq; |
| 536 | int nid; | 536 | int nid; |
| @@ -575,7 +575,7 @@ static unsigned int __init build_one_device_irq(struct of_device *op, | |||
| 575 | 575 | ||
| 576 | if (of_irq_verbose) | 576 | if (of_irq_verbose) |
| 577 | printk("%s: Apply [%s:%x] imap --> [%s:%x]\n", | 577 | printk("%s: Apply [%s:%x] imap --> [%s:%x]\n", |
| 578 | op->node->full_name, | 578 | op->dev.of_node->full_name, |
| 579 | pp->full_name, this_orig_irq, | 579 | pp->full_name, this_orig_irq, |
| 580 | (iret ? iret->full_name : "NULL"), irq); | 580 | (iret ? iret->full_name : "NULL"), irq); |
| 581 | 581 | ||
| @@ -594,7 +594,7 @@ static unsigned int __init build_one_device_irq(struct of_device *op, | |||
| 594 | if (of_irq_verbose) | 594 | if (of_irq_verbose) |
| 595 | printk("%s: PCI swizzle [%s] " | 595 | printk("%s: PCI swizzle [%s] " |
| 596 | "%x --> %x\n", | 596 | "%x --> %x\n", |
| 597 | op->node->full_name, | 597 | op->dev.of_node->full_name, |
| 598 | pp->full_name, this_orig_irq, | 598 | pp->full_name, this_orig_irq, |
| 599 | irq); | 599 | irq); |
| 600 | 600 | ||
| @@ -611,11 +611,11 @@ static unsigned int __init build_one_device_irq(struct of_device *op, | |||
| 611 | if (!ip) | 611 | if (!ip) |
| 612 | return orig_irq; | 612 | return orig_irq; |
| 613 | 613 | ||
| 614 | irq = ip->irq_trans->irq_build(op->node, irq, | 614 | irq = ip->irq_trans->irq_build(op->dev.of_node, irq, |
| 615 | ip->irq_trans->data); | 615 | ip->irq_trans->data); |
| 616 | if (of_irq_verbose) | 616 | if (of_irq_verbose) |
| 617 | printk("%s: Apply IRQ trans [%s] %x --> %x\n", | 617 | printk("%s: Apply IRQ trans [%s] %x --> %x\n", |
| 618 | op->node->full_name, ip->full_name, orig_irq, irq); | 618 | op->dev.of_node->full_name, ip->full_name, orig_irq, irq); |
| 619 | 619 | ||
| 620 | out: | 620 | out: |
| 621 | nid = of_node_to_nid(dp); | 621 | nid = of_node_to_nid(dp); |
| @@ -640,10 +640,9 @@ static struct of_device * __init scan_one_device(struct device_node *dp, | |||
| 640 | return NULL; | 640 | return NULL; |
| 641 | 641 | ||
| 642 | sd = &op->dev.archdata; | 642 | sd = &op->dev.archdata; |
| 643 | sd->prom_node = dp; | ||
| 644 | sd->op = op; | 643 | sd->op = op; |
| 645 | 644 | ||
| 646 | op->node = dp; | 645 | op->dev.of_node = dp; |
| 647 | 646 | ||
| 648 | op->clock_freq = of_getintprop_default(dp, "clock-frequency", | 647 | op->clock_freq = of_getintprop_default(dp, "clock-frequency", |
| 649 | (25*1000*1000)); | 648 | (25*1000*1000)); |
diff --git a/arch/sparc/kernel/of_device_common.c b/arch/sparc/kernel/of_device_common.c index 0247e68210b3..10c6c36a6e75 100644 --- a/arch/sparc/kernel/of_device_common.c +++ b/arch/sparc/kernel/of_device_common.c | |||
| @@ -16,7 +16,7 @@ static int node_match(struct device *dev, void *data) | |||
| 16 | struct of_device *op = to_of_device(dev); | 16 | struct of_device *op = to_of_device(dev); |
| 17 | struct device_node *dp = data; | 17 | struct device_node *dp = data; |
| 18 | 18 | ||
| 19 | return (op->node == dp); | 19 | return (op->dev.of_node == dp); |
| 20 | } | 20 | } |
| 21 | 21 | ||
| 22 | struct of_device *of_find_device_by_node(struct device_node *dp) | 22 | struct of_device *of_find_device_by_node(struct device_node *dp) |
| @@ -48,7 +48,7 @@ EXPORT_SYMBOL(irq_of_parse_and_map); | |||
| 48 | void of_propagate_archdata(struct of_device *bus) | 48 | void of_propagate_archdata(struct of_device *bus) |
| 49 | { | 49 | { |
| 50 | struct dev_archdata *bus_sd = &bus->dev.archdata; | 50 | struct dev_archdata *bus_sd = &bus->dev.archdata; |
| 51 | struct device_node *bus_dp = bus->node; | 51 | struct device_node *bus_dp = bus->dev.of_node; |
| 52 | struct device_node *dp; | 52 | struct device_node *dp; |
| 53 | 53 | ||
| 54 | for (dp = bus_dp->child; dp; dp = dp->sibling) { | 54 | for (dp = bus_dp->child; dp; dp = dp->sibling) { |
diff --git a/arch/sparc/kernel/pci.c b/arch/sparc/kernel/pci.c index 5ac539a5930f..8a8363adb8bd 100644 --- a/arch/sparc/kernel/pci.c +++ b/arch/sparc/kernel/pci.c | |||
| @@ -261,7 +261,6 @@ static struct pci_dev *of_create_pci_dev(struct pci_pbm_info *pbm, | |||
| 261 | sd->iommu = pbm->iommu; | 261 | sd->iommu = pbm->iommu; |
| 262 | sd->stc = &pbm->stc; | 262 | sd->stc = &pbm->stc; |
| 263 | sd->host_controller = pbm; | 263 | sd->host_controller = pbm; |
| 264 | sd->prom_node = node; | ||
| 265 | sd->op = op = of_find_device_by_node(node); | 264 | sd->op = op = of_find_device_by_node(node); |
| 266 | sd->numa_node = pbm->numa_node; | 265 | sd->numa_node = pbm->numa_node; |
| 267 | 266 | ||
| @@ -285,6 +284,7 @@ static struct pci_dev *of_create_pci_dev(struct pci_pbm_info *pbm, | |||
| 285 | dev->sysdata = node; | 284 | dev->sysdata = node; |
| 286 | dev->dev.parent = bus->bridge; | 285 | dev->dev.parent = bus->bridge; |
| 287 | dev->dev.bus = &pci_bus_type; | 286 | dev->dev.bus = &pci_bus_type; |
| 287 | dev->dev.of_node = node; | ||
| 288 | dev->devfn = devfn; | 288 | dev->devfn = devfn; |
| 289 | dev->multifunction = 0; /* maybe a lie? */ | 289 | dev->multifunction = 0; /* maybe a lie? */ |
| 290 | set_pcie_port_type(dev); | 290 | set_pcie_port_type(dev); |
| @@ -653,7 +653,7 @@ show_pciobppath_attr(struct device * dev, struct device_attribute * attr, char * | |||
| 653 | struct device_node *dp; | 653 | struct device_node *dp; |
| 654 | 654 | ||
| 655 | pdev = to_pci_dev(dev); | 655 | pdev = to_pci_dev(dev); |
| 656 | dp = pdev->dev.archdata.prom_node; | 656 | dp = pdev->dev.of_node; |
| 657 | 657 | ||
| 658 | return snprintf (buf, PAGE_SIZE, "%s\n", dp->full_name); | 658 | return snprintf (buf, PAGE_SIZE, "%s\n", dp->full_name); |
| 659 | } | 659 | } |
| @@ -683,7 +683,7 @@ static void __devinit pci_bus_register_of_sysfs(struct pci_bus *bus) | |||
| 683 | struct pci_bus * __devinit pci_scan_one_pbm(struct pci_pbm_info *pbm, | 683 | struct pci_bus * __devinit pci_scan_one_pbm(struct pci_pbm_info *pbm, |
| 684 | struct device *parent) | 684 | struct device *parent) |
| 685 | { | 685 | { |
| 686 | struct device_node *node = pbm->op->node; | 686 | struct device_node *node = pbm->op->dev.of_node; |
| 687 | struct pci_bus *bus; | 687 | struct pci_bus *bus; |
| 688 | 688 | ||
| 689 | printk("PCI: Scanning PBM %s\n", node->full_name); | 689 | printk("PCI: Scanning PBM %s\n", node->full_name); |
| @@ -1022,7 +1022,7 @@ void arch_teardown_msi_irq(unsigned int virt_irq) | |||
| 1022 | 1022 | ||
| 1023 | struct device_node *pci_device_to_OF_node(struct pci_dev *pdev) | 1023 | struct device_node *pci_device_to_OF_node(struct pci_dev *pdev) |
| 1024 | { | 1024 | { |
| 1025 | return pdev->dev.archdata.prom_node; | 1025 | return pdev->dev.of_node; |
| 1026 | } | 1026 | } |
| 1027 | EXPORT_SYMBOL(pci_device_to_OF_node); | 1027 | EXPORT_SYMBOL(pci_device_to_OF_node); |
| 1028 | 1028 | ||
| @@ -1151,15 +1151,13 @@ static int __init of_pci_slot_init(void) | |||
| 1151 | struct device_node *node; | 1151 | struct device_node *node; |
| 1152 | 1152 | ||
| 1153 | if (pbus->self) { | 1153 | if (pbus->self) { |
| 1154 | struct dev_archdata *sd = pbus->self->sysdata; | ||
| 1155 | |||
| 1156 | /* PCI->PCI bridge */ | 1154 | /* PCI->PCI bridge */ |
| 1157 | node = sd->prom_node; | 1155 | node = pbus->self->dev.of_node; |
| 1158 | } else { | 1156 | } else { |
| 1159 | struct pci_pbm_info *pbm = pbus->sysdata; | 1157 | struct pci_pbm_info *pbm = pbus->sysdata; |
| 1160 | 1158 | ||
| 1161 | /* Host PCI controller */ | 1159 | /* Host PCI controller */ |
| 1162 | node = pbm->op->node; | 1160 | node = pbm->op->dev.of_node; |
| 1163 | } | 1161 | } |
| 1164 | 1162 | ||
| 1165 | pci_bus_slot_names(node, pbus); | 1163 | pci_bus_slot_names(node, pbus); |
diff --git a/arch/sparc/kernel/pci_common.c b/arch/sparc/kernel/pci_common.c index 8a000583b5cf..6c7a33af3ba6 100644 --- a/arch/sparc/kernel/pci_common.c +++ b/arch/sparc/kernel/pci_common.c | |||
| @@ -314,12 +314,12 @@ struct pci_ops sun4v_pci_ops = { | |||
| 314 | 314 | ||
| 315 | void pci_get_pbm_props(struct pci_pbm_info *pbm) | 315 | void pci_get_pbm_props(struct pci_pbm_info *pbm) |
| 316 | { | 316 | { |
| 317 | const u32 *val = of_get_property(pbm->op->node, "bus-range", NULL); | 317 | const u32 *val = of_get_property(pbm->op->dev.of_node, "bus-range", NULL); |
| 318 | 318 | ||
| 319 | pbm->pci_first_busno = val[0]; | 319 | pbm->pci_first_busno = val[0]; |
| 320 | pbm->pci_last_busno = val[1]; | 320 | pbm->pci_last_busno = val[1]; |
| 321 | 321 | ||
| 322 | val = of_get_property(pbm->op->node, "ino-bitmap", NULL); | 322 | val = of_get_property(pbm->op->dev.of_node, "ino-bitmap", NULL); |
| 323 | if (val) { | 323 | if (val) { |
| 324 | pbm->ino_bitmap = (((u64)val[1] << 32UL) | | 324 | pbm->ino_bitmap = (((u64)val[1] << 32UL) | |
| 325 | ((u64)val[0] << 0UL)); | 325 | ((u64)val[0] << 0UL)); |
| @@ -365,7 +365,8 @@ static void pci_register_legacy_regions(struct resource *io_res, | |||
| 365 | 365 | ||
| 366 | static void pci_register_iommu_region(struct pci_pbm_info *pbm) | 366 | static void pci_register_iommu_region(struct pci_pbm_info *pbm) |
| 367 | { | 367 | { |
| 368 | const u32 *vdma = of_get_property(pbm->op->node, "virtual-dma", NULL); | 368 | const u32 *vdma = of_get_property(pbm->op->dev.of_node, "virtual-dma", |
| 369 | NULL); | ||
| 369 | 370 | ||
| 370 | if (vdma) { | 371 | if (vdma) { |
| 371 | struct resource *rp = kzalloc(sizeof(*rp), GFP_KERNEL); | 372 | struct resource *rp = kzalloc(sizeof(*rp), GFP_KERNEL); |
| @@ -394,7 +395,7 @@ void pci_determine_mem_io_space(struct pci_pbm_info *pbm) | |||
| 394 | int num_pbm_ranges; | 395 | int num_pbm_ranges; |
| 395 | 396 | ||
| 396 | saw_mem = saw_io = 0; | 397 | saw_mem = saw_io = 0; |
| 397 | pbm_ranges = of_get_property(pbm->op->node, "ranges", &i); | 398 | pbm_ranges = of_get_property(pbm->op->dev.of_node, "ranges", &i); |
| 398 | if (!pbm_ranges) { | 399 | if (!pbm_ranges) { |
| 399 | prom_printf("PCI: Fatal error, missing PBM ranges property " | 400 | prom_printf("PCI: Fatal error, missing PBM ranges property " |
| 400 | " for %s\n", | 401 | " for %s\n", |
diff --git a/arch/sparc/kernel/pci_fire.c b/arch/sparc/kernel/pci_fire.c index d53f45bc7dda..51cfa09e392a 100644 --- a/arch/sparc/kernel/pci_fire.c +++ b/arch/sparc/kernel/pci_fire.c | |||
| @@ -413,7 +413,7 @@ static int __devinit pci_fire_pbm_init(struct pci_pbm_info *pbm, | |||
| 413 | struct of_device *op, u32 portid) | 413 | struct of_device *op, u32 portid) |
| 414 | { | 414 | { |
| 415 | const struct linux_prom64_registers *regs; | 415 | const struct linux_prom64_registers *regs; |
| 416 | struct device_node *dp = op->node; | 416 | struct device_node *dp = op->dev.of_node; |
| 417 | int err; | 417 | int err; |
| 418 | 418 | ||
| 419 | pbm->numa_node = -1; | 419 | pbm->numa_node = -1; |
| @@ -458,7 +458,7 @@ static int __devinit pci_fire_pbm_init(struct pci_pbm_info *pbm, | |||
| 458 | static int __devinit fire_probe(struct of_device *op, | 458 | static int __devinit fire_probe(struct of_device *op, |
| 459 | const struct of_device_id *match) | 459 | const struct of_device_id *match) |
| 460 | { | 460 | { |
| 461 | struct device_node *dp = op->node; | 461 | struct device_node *dp = op->dev.of_node; |
| 462 | struct pci_pbm_info *pbm; | 462 | struct pci_pbm_info *pbm; |
| 463 | struct iommu *iommu; | 463 | struct iommu *iommu; |
| 464 | u32 portid; | 464 | u32 portid; |
| @@ -508,8 +508,11 @@ static struct of_device_id __initdata fire_match[] = { | |||
| 508 | }; | 508 | }; |
| 509 | 509 | ||
| 510 | static struct of_platform_driver fire_driver = { | 510 | static struct of_platform_driver fire_driver = { |
| 511 | .name = DRIVER_NAME, | 511 | .driver = { |
| 512 | .match_table = fire_match, | 512 | .name = DRIVER_NAME, |
| 513 | .owner = THIS_MODULE, | ||
| 514 | .of_match_table = fire_match, | ||
| 515 | }, | ||
| 513 | .probe = fire_probe, | 516 | .probe = fire_probe, |
| 514 | }; | 517 | }; |
| 515 | 518 | ||
diff --git a/arch/sparc/kernel/pci_msi.c b/arch/sparc/kernel/pci_msi.c index e0ef847219c3..548b8ca9c210 100644 --- a/arch/sparc/kernel/pci_msi.c +++ b/arch/sparc/kernel/pci_msi.c | |||
| @@ -324,7 +324,7 @@ void sparc64_pbm_msi_init(struct pci_pbm_info *pbm, | |||
| 324 | const u32 *val; | 324 | const u32 *val; |
| 325 | int len; | 325 | int len; |
| 326 | 326 | ||
| 327 | val = of_get_property(pbm->op->node, "#msi-eqs", &len); | 327 | val = of_get_property(pbm->op->dev.of_node, "#msi-eqs", &len); |
| 328 | if (!val || len != 4) | 328 | if (!val || len != 4) |
| 329 | goto no_msi; | 329 | goto no_msi; |
| 330 | pbm->msiq_num = *val; | 330 | pbm->msiq_num = *val; |
| @@ -347,16 +347,16 @@ void sparc64_pbm_msi_init(struct pci_pbm_info *pbm, | |||
| 347 | u32 msi64_len; | 347 | u32 msi64_len; |
| 348 | } *arng; | 348 | } *arng; |
| 349 | 349 | ||
| 350 | val = of_get_property(pbm->op->node, "msi-eq-size", &len); | 350 | val = of_get_property(pbm->op->dev.of_node, "msi-eq-size", &len); |
| 351 | if (!val || len != 4) | 351 | if (!val || len != 4) |
| 352 | goto no_msi; | 352 | goto no_msi; |
| 353 | 353 | ||
| 354 | pbm->msiq_ent_count = *val; | 354 | pbm->msiq_ent_count = *val; |
| 355 | 355 | ||
| 356 | mqp = of_get_property(pbm->op->node, | 356 | mqp = of_get_property(pbm->op->dev.of_node, |
| 357 | "msi-eq-to-devino", &len); | 357 | "msi-eq-to-devino", &len); |
| 358 | if (!mqp) | 358 | if (!mqp) |
| 359 | mqp = of_get_property(pbm->op->node, | 359 | mqp = of_get_property(pbm->op->dev.of_node, |
| 360 | "msi-eq-devino", &len); | 360 | "msi-eq-devino", &len); |
| 361 | if (!mqp || len != sizeof(struct msiq_prop)) | 361 | if (!mqp || len != sizeof(struct msiq_prop)) |
| 362 | goto no_msi; | 362 | goto no_msi; |
| @@ -364,27 +364,27 @@ void sparc64_pbm_msi_init(struct pci_pbm_info *pbm, | |||
| 364 | pbm->msiq_first = mqp->first_msiq; | 364 | pbm->msiq_first = mqp->first_msiq; |
| 365 | pbm->msiq_first_devino = mqp->first_devino; | 365 | pbm->msiq_first_devino = mqp->first_devino; |
| 366 | 366 | ||
| 367 | val = of_get_property(pbm->op->node, "#msi", &len); | 367 | val = of_get_property(pbm->op->dev.of_node, "#msi", &len); |
| 368 | if (!val || len != 4) | 368 | if (!val || len != 4) |
| 369 | goto no_msi; | 369 | goto no_msi; |
| 370 | pbm->msi_num = *val; | 370 | pbm->msi_num = *val; |
| 371 | 371 | ||
| 372 | mrng = of_get_property(pbm->op->node, "msi-ranges", &len); | 372 | mrng = of_get_property(pbm->op->dev.of_node, "msi-ranges", &len); |
| 373 | if (!mrng || len != sizeof(struct msi_range_prop)) | 373 | if (!mrng || len != sizeof(struct msi_range_prop)) |
| 374 | goto no_msi; | 374 | goto no_msi; |
| 375 | pbm->msi_first = mrng->first_msi; | 375 | pbm->msi_first = mrng->first_msi; |
| 376 | 376 | ||
| 377 | val = of_get_property(pbm->op->node, "msi-data-mask", &len); | 377 | val = of_get_property(pbm->op->dev.of_node, "msi-data-mask", &len); |
| 378 | if (!val || len != 4) | 378 | if (!val || len != 4) |
| 379 | goto no_msi; | 379 | goto no_msi; |
| 380 | pbm->msi_data_mask = *val; | 380 | pbm->msi_data_mask = *val; |
| 381 | 381 | ||
| 382 | val = of_get_property(pbm->op->node, "msix-data-width", &len); | 382 | val = of_get_property(pbm->op->dev.of_node, "msix-data-width", &len); |
| 383 | if (!val || len != 4) | 383 | if (!val || len != 4) |
| 384 | goto no_msi; | 384 | goto no_msi; |
| 385 | pbm->msix_data_width = *val; | 385 | pbm->msix_data_width = *val; |
| 386 | 386 | ||
| 387 | arng = of_get_property(pbm->op->node, "msi-address-ranges", | 387 | arng = of_get_property(pbm->op->dev.of_node, "msi-address-ranges", |
| 388 | &len); | 388 | &len); |
| 389 | if (!arng || len != sizeof(struct addr_range_prop)) | 389 | if (!arng || len != sizeof(struct addr_range_prop)) |
| 390 | goto no_msi; | 390 | goto no_msi; |
diff --git a/arch/sparc/kernel/pci_psycho.c b/arch/sparc/kernel/pci_psycho.c index 142b9d6984a8..558a70512824 100644 --- a/arch/sparc/kernel/pci_psycho.c +++ b/arch/sparc/kernel/pci_psycho.c | |||
| @@ -285,7 +285,7 @@ static irqreturn_t psycho_ce_intr(int irq, void *dev_id) | |||
| 285 | #define PSYCHO_ECCCTRL_CE 0x2000000000000000UL /* Enable CE INterrupts */ | 285 | #define PSYCHO_ECCCTRL_CE 0x2000000000000000UL /* Enable CE INterrupts */ |
| 286 | static void psycho_register_error_handlers(struct pci_pbm_info *pbm) | 286 | static void psycho_register_error_handlers(struct pci_pbm_info *pbm) |
| 287 | { | 287 | { |
| 288 | struct of_device *op = of_find_device_by_node(pbm->op->node); | 288 | struct of_device *op = of_find_device_by_node(pbm->op->dev.of_node); |
| 289 | unsigned long base = pbm->controller_regs; | 289 | unsigned long base = pbm->controller_regs; |
| 290 | u64 tmp; | 290 | u64 tmp; |
| 291 | int err; | 291 | int err; |
| @@ -507,7 +507,7 @@ static int __devinit psycho_probe(struct of_device *op, | |||
| 507 | const struct of_device_id *match) | 507 | const struct of_device_id *match) |
| 508 | { | 508 | { |
| 509 | const struct linux_prom64_registers *pr_regs; | 509 | const struct linux_prom64_registers *pr_regs; |
| 510 | struct device_node *dp = op->node; | 510 | struct device_node *dp = op->dev.of_node; |
| 511 | struct pci_pbm_info *pbm; | 511 | struct pci_pbm_info *pbm; |
| 512 | struct iommu *iommu; | 512 | struct iommu *iommu; |
| 513 | int is_pbm_a, err; | 513 | int is_pbm_a, err; |
| @@ -602,8 +602,11 @@ static struct of_device_id __initdata psycho_match[] = { | |||
| 602 | }; | 602 | }; |
| 603 | 603 | ||
| 604 | static struct of_platform_driver psycho_driver = { | 604 | static struct of_platform_driver psycho_driver = { |
| 605 | .name = DRIVER_NAME, | 605 | .driver = { |
| 606 | .match_table = psycho_match, | 606 | .name = DRIVER_NAME, |
| 607 | .owner = THIS_MODULE, | ||
| 608 | .of_match_table = psycho_match, | ||
| 609 | }, | ||
| 607 | .probe = psycho_probe, | 610 | .probe = psycho_probe, |
| 608 | }; | 611 | }; |
| 609 | 612 | ||
diff --git a/arch/sparc/kernel/pci_sabre.c b/arch/sparc/kernel/pci_sabre.c index ba6fbeba3e2c..6dad8e3b7506 100644 --- a/arch/sparc/kernel/pci_sabre.c +++ b/arch/sparc/kernel/pci_sabre.c | |||
| @@ -310,7 +310,7 @@ static irqreturn_t sabre_ce_intr(int irq, void *dev_id) | |||
| 310 | 310 | ||
| 311 | static void sabre_register_error_handlers(struct pci_pbm_info *pbm) | 311 | static void sabre_register_error_handlers(struct pci_pbm_info *pbm) |
| 312 | { | 312 | { |
| 313 | struct device_node *dp = pbm->op->node; | 313 | struct device_node *dp = pbm->op->dev.of_node; |
| 314 | struct of_device *op; | 314 | struct of_device *op; |
| 315 | unsigned long base = pbm->controller_regs; | 315 | unsigned long base = pbm->controller_regs; |
| 316 | u64 tmp; | 316 | u64 tmp; |
| @@ -456,7 +456,7 @@ static int __devinit sabre_probe(struct of_device *op, | |||
| 456 | const struct of_device_id *match) | 456 | const struct of_device_id *match) |
| 457 | { | 457 | { |
| 458 | const struct linux_prom64_registers *pr_regs; | 458 | const struct linux_prom64_registers *pr_regs; |
| 459 | struct device_node *dp = op->node; | 459 | struct device_node *dp = op->dev.of_node; |
| 460 | struct pci_pbm_info *pbm; | 460 | struct pci_pbm_info *pbm; |
| 461 | u32 upa_portid, dma_mask; | 461 | u32 upa_portid, dma_mask; |
| 462 | struct iommu *iommu; | 462 | struct iommu *iommu; |
| @@ -596,8 +596,11 @@ static struct of_device_id __initdata sabre_match[] = { | |||
| 596 | }; | 596 | }; |
| 597 | 597 | ||
| 598 | static struct of_platform_driver sabre_driver = { | 598 | static struct of_platform_driver sabre_driver = { |
| 599 | .name = DRIVER_NAME, | 599 | .driver = { |
| 600 | .match_table = sabre_match, | 600 | .name = DRIVER_NAME, |
| 601 | .owner = THIS_MODULE, | ||
| 602 | .of_match_table = sabre_match, | ||
| 603 | }, | ||
| 601 | .probe = sabre_probe, | 604 | .probe = sabre_probe, |
| 602 | }; | 605 | }; |
| 603 | 606 | ||
diff --git a/arch/sparc/kernel/pci_schizo.c b/arch/sparc/kernel/pci_schizo.c index 2b5cdde77af7..97a1ae2e1c02 100644 --- a/arch/sparc/kernel/pci_schizo.c +++ b/arch/sparc/kernel/pci_schizo.c | |||
| @@ -844,7 +844,7 @@ static int pbm_routes_this_ino(struct pci_pbm_info *pbm, u32 ino) | |||
| 844 | */ | 844 | */ |
| 845 | static void tomatillo_register_error_handlers(struct pci_pbm_info *pbm) | 845 | static void tomatillo_register_error_handlers(struct pci_pbm_info *pbm) |
| 846 | { | 846 | { |
| 847 | struct of_device *op = of_find_device_by_node(pbm->op->node); | 847 | struct of_device *op = of_find_device_by_node(pbm->op->dev.of_node); |
| 848 | u64 tmp, err_mask, err_no_mask; | 848 | u64 tmp, err_mask, err_no_mask; |
| 849 | int err; | 849 | int err; |
| 850 | 850 | ||
| @@ -939,7 +939,7 @@ static void tomatillo_register_error_handlers(struct pci_pbm_info *pbm) | |||
| 939 | 939 | ||
| 940 | static void schizo_register_error_handlers(struct pci_pbm_info *pbm) | 940 | static void schizo_register_error_handlers(struct pci_pbm_info *pbm) |
| 941 | { | 941 | { |
| 942 | struct of_device *op = of_find_device_by_node(pbm->op->node); | 942 | struct of_device *op = of_find_device_by_node(pbm->op->dev.of_node); |
| 943 | u64 tmp, err_mask, err_no_mask; | 943 | u64 tmp, err_mask, err_no_mask; |
| 944 | int err; | 944 | int err; |
| 945 | 945 | ||
| @@ -1068,7 +1068,7 @@ static void __devinit schizo_scan_bus(struct pci_pbm_info *pbm, | |||
| 1068 | { | 1068 | { |
| 1069 | pbm_config_busmastering(pbm); | 1069 | pbm_config_busmastering(pbm); |
| 1070 | pbm->is_66mhz_capable = | 1070 | pbm->is_66mhz_capable = |
| 1071 | (of_find_property(pbm->op->node, "66mhz-capable", NULL) | 1071 | (of_find_property(pbm->op->dev.of_node, "66mhz-capable", NULL) |
| 1072 | != NULL); | 1072 | != NULL); |
| 1073 | 1073 | ||
| 1074 | pbm->pci_bus = pci_scan_one_pbm(pbm, parent); | 1074 | pbm->pci_bus = pci_scan_one_pbm(pbm, parent); |
| @@ -1138,7 +1138,7 @@ static int schizo_pbm_iommu_init(struct pci_pbm_info *pbm) | |||
| 1138 | u32 dma_mask; | 1138 | u32 dma_mask; |
| 1139 | u64 control; | 1139 | u64 control; |
| 1140 | 1140 | ||
| 1141 | vdma = of_get_property(pbm->op->node, "virtual-dma", NULL); | 1141 | vdma = of_get_property(pbm->op->dev.of_node, "virtual-dma", NULL); |
| 1142 | if (!vdma) | 1142 | if (!vdma) |
| 1143 | vdma = vdma_default; | 1143 | vdma = vdma_default; |
| 1144 | 1144 | ||
| @@ -1268,7 +1268,7 @@ static void schizo_pbm_hw_init(struct pci_pbm_info *pbm) | |||
| 1268 | pbm->chip_version >= 0x2) | 1268 | pbm->chip_version >= 0x2) |
| 1269 | tmp |= 0x3UL << SCHIZO_PCICTRL_PTO_SHIFT; | 1269 | tmp |= 0x3UL << SCHIZO_PCICTRL_PTO_SHIFT; |
| 1270 | 1270 | ||
| 1271 | if (!of_find_property(pbm->op->node, "no-bus-parking", NULL)) | 1271 | if (!of_find_property(pbm->op->dev.of_node, "no-bus-parking", NULL)) |
| 1272 | tmp |= SCHIZO_PCICTRL_PARK; | 1272 | tmp |= SCHIZO_PCICTRL_PARK; |
| 1273 | else | 1273 | else |
| 1274 | tmp &= ~SCHIZO_PCICTRL_PARK; | 1274 | tmp &= ~SCHIZO_PCICTRL_PARK; |
| @@ -1311,7 +1311,7 @@ static int __devinit schizo_pbm_init(struct pci_pbm_info *pbm, | |||
| 1311 | int chip_type) | 1311 | int chip_type) |
| 1312 | { | 1312 | { |
| 1313 | const struct linux_prom64_registers *regs; | 1313 | const struct linux_prom64_registers *regs; |
| 1314 | struct device_node *dp = op->node; | 1314 | struct device_node *dp = op->dev.of_node; |
| 1315 | const char *chipset_name; | 1315 | const char *chipset_name; |
| 1316 | int is_pbm_a, err; | 1316 | int is_pbm_a, err; |
| 1317 | 1317 | ||
| @@ -1415,7 +1415,7 @@ static struct pci_pbm_info * __devinit schizo_find_sibling(u32 portid, | |||
| 1415 | 1415 | ||
| 1416 | static int __devinit __schizo_init(struct of_device *op, unsigned long chip_type) | 1416 | static int __devinit __schizo_init(struct of_device *op, unsigned long chip_type) |
| 1417 | { | 1417 | { |
| 1418 | struct device_node *dp = op->node; | 1418 | struct device_node *dp = op->dev.of_node; |
| 1419 | struct pci_pbm_info *pbm; | 1419 | struct pci_pbm_info *pbm; |
| 1420 | struct iommu *iommu; | 1420 | struct iommu *iommu; |
| 1421 | u32 portid; | 1421 | u32 portid; |
| @@ -1491,8 +1491,11 @@ static struct of_device_id __initdata schizo_match[] = { | |||
| 1491 | }; | 1491 | }; |
| 1492 | 1492 | ||
| 1493 | static struct of_platform_driver schizo_driver = { | 1493 | static struct of_platform_driver schizo_driver = { |
| 1494 | .name = DRIVER_NAME, | 1494 | .driver = { |
| 1495 | .match_table = schizo_match, | 1495 | .name = DRIVER_NAME, |
| 1496 | .owner = THIS_MODULE, | ||
| 1497 | .of_match_table = schizo_match, | ||
| 1498 | }, | ||
| 1496 | .probe = schizo_probe, | 1499 | .probe = schizo_probe, |
| 1497 | }; | 1500 | }; |
| 1498 | 1501 | ||
diff --git a/arch/sparc/kernel/pci_sun4v.c b/arch/sparc/kernel/pci_sun4v.c index 23c33ff9c31e..a24af6f7e17f 100644 --- a/arch/sparc/kernel/pci_sun4v.c +++ b/arch/sparc/kernel/pci_sun4v.c | |||
| @@ -540,7 +540,7 @@ static void __devinit pci_sun4v_scan_bus(struct pci_pbm_info *pbm, | |||
| 540 | struct property *prop; | 540 | struct property *prop; |
| 541 | struct device_node *dp; | 541 | struct device_node *dp; |
| 542 | 542 | ||
| 543 | dp = pbm->op->node; | 543 | dp = pbm->op->dev.of_node; |
| 544 | prop = of_find_property(dp, "66mhz-capable", NULL); | 544 | prop = of_find_property(dp, "66mhz-capable", NULL); |
| 545 | pbm->is_66mhz_capable = (prop != NULL); | 545 | pbm->is_66mhz_capable = (prop != NULL); |
| 546 | pbm->pci_bus = pci_scan_one_pbm(pbm, parent); | 546 | pbm->pci_bus = pci_scan_one_pbm(pbm, parent); |
| @@ -584,7 +584,7 @@ static int __devinit pci_sun4v_iommu_init(struct pci_pbm_info *pbm) | |||
| 584 | u32 dma_mask, dma_offset; | 584 | u32 dma_mask, dma_offset; |
| 585 | const u32 *vdma; | 585 | const u32 *vdma; |
| 586 | 586 | ||
| 587 | vdma = of_get_property(pbm->op->node, "virtual-dma", NULL); | 587 | vdma = of_get_property(pbm->op->dev.of_node, "virtual-dma", NULL); |
| 588 | if (!vdma) | 588 | if (!vdma) |
| 589 | vdma = vdma_default; | 589 | vdma = vdma_default; |
| 590 | 590 | ||
| @@ -881,7 +881,7 @@ static void pci_sun4v_msi_init(struct pci_pbm_info *pbm) | |||
| 881 | static int __devinit pci_sun4v_pbm_init(struct pci_pbm_info *pbm, | 881 | static int __devinit pci_sun4v_pbm_init(struct pci_pbm_info *pbm, |
| 882 | struct of_device *op, u32 devhandle) | 882 | struct of_device *op, u32 devhandle) |
| 883 | { | 883 | { |
| 884 | struct device_node *dp = op->node; | 884 | struct device_node *dp = op->dev.of_node; |
| 885 | int err; | 885 | int err; |
| 886 | 886 | ||
| 887 | pbm->numa_node = of_node_to_nid(dp); | 887 | pbm->numa_node = of_node_to_nid(dp); |
| @@ -929,7 +929,7 @@ static int __devinit pci_sun4v_probe(struct of_device *op, | |||
| 929 | u32 devhandle; | 929 | u32 devhandle; |
| 930 | int i, err; | 930 | int i, err; |
| 931 | 931 | ||
| 932 | dp = op->node; | 932 | dp = op->dev.of_node; |
| 933 | 933 | ||
| 934 | if (!hvapi_negotiated++) { | 934 | if (!hvapi_negotiated++) { |
| 935 | err = sun4v_hvapi_register(HV_GRP_PCI, | 935 | err = sun4v_hvapi_register(HV_GRP_PCI, |
| @@ -1009,8 +1009,11 @@ static struct of_device_id __initdata pci_sun4v_match[] = { | |||
| 1009 | }; | 1009 | }; |
| 1010 | 1010 | ||
| 1011 | static struct of_platform_driver pci_sun4v_driver = { | 1011 | static struct of_platform_driver pci_sun4v_driver = { |
| 1012 | .name = DRIVER_NAME, | 1012 | .driver = { |
| 1013 | .match_table = pci_sun4v_match, | 1013 | .name = DRIVER_NAME, |
| 1014 | .owner = THIS_MODULE, | ||
| 1015 | .of_match_table = pci_sun4v_match, | ||
| 1016 | }, | ||
| 1014 | .probe = pci_sun4v_probe, | 1017 | .probe = pci_sun4v_probe, |
| 1015 | }; | 1018 | }; |
| 1016 | 1019 | ||
diff --git a/arch/sparc/kernel/perf_event.c b/arch/sparc/kernel/perf_event.c index 34ce49f80eac..0ec92c8861dd 100644 --- a/arch/sparc/kernel/perf_event.c +++ b/arch/sparc/kernel/perf_event.c | |||
| @@ -92,6 +92,8 @@ struct cpu_hw_events { | |||
| 92 | 92 | ||
| 93 | /* Enabled/disable state. */ | 93 | /* Enabled/disable state. */ |
| 94 | int enabled; | 94 | int enabled; |
| 95 | |||
| 96 | unsigned int group_flag; | ||
| 95 | }; | 97 | }; |
| 96 | DEFINE_PER_CPU(struct cpu_hw_events, cpu_hw_events) = { .enabled = 1, }; | 98 | DEFINE_PER_CPU(struct cpu_hw_events, cpu_hw_events) = { .enabled = 1, }; |
| 97 | 99 | ||
| @@ -981,53 +983,6 @@ static int collect_events(struct perf_event *group, int max_count, | |||
| 981 | return n; | 983 | return n; |
| 982 | } | 984 | } |
| 983 | 985 | ||
| 984 | static void event_sched_in(struct perf_event *event) | ||
| 985 | { | ||
| 986 | event->state = PERF_EVENT_STATE_ACTIVE; | ||
| 987 | event->oncpu = smp_processor_id(); | ||
| 988 | event->tstamp_running += event->ctx->time - event->tstamp_stopped; | ||
| 989 | if (is_software_event(event)) | ||
| 990 | event->pmu->enable(event); | ||
| 991 | } | ||
| 992 | |||
| 993 | int hw_perf_group_sched_in(struct perf_event *group_leader, | ||
| 994 | struct perf_cpu_context *cpuctx, | ||
| 995 | struct perf_event_context *ctx) | ||
| 996 | { | ||
| 997 | struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); | ||
| 998 | struct perf_event *sub; | ||
| 999 | int n0, n; | ||
| 1000 | |||
| 1001 | if (!sparc_pmu) | ||
| 1002 | return 0; | ||
| 1003 | |||
| 1004 | n0 = cpuc->n_events; | ||
| 1005 | n = collect_events(group_leader, perf_max_events - n0, | ||
| 1006 | &cpuc->event[n0], &cpuc->events[n0], | ||
| 1007 | &cpuc->current_idx[n0]); | ||
| 1008 | if (n < 0) | ||
| 1009 | return -EAGAIN; | ||
| 1010 | if (check_excludes(cpuc->event, n0, n)) | ||
| 1011 | return -EINVAL; | ||
| 1012 | if (sparc_check_constraints(cpuc->event, cpuc->events, n + n0)) | ||
| 1013 | return -EAGAIN; | ||
| 1014 | cpuc->n_events = n0 + n; | ||
| 1015 | cpuc->n_added += n; | ||
| 1016 | |||
| 1017 | cpuctx->active_oncpu += n; | ||
| 1018 | n = 1; | ||
| 1019 | event_sched_in(group_leader); | ||
| 1020 | list_for_each_entry(sub, &group_leader->sibling_list, group_entry) { | ||
| 1021 | if (sub->state != PERF_EVENT_STATE_OFF) { | ||
| 1022 | event_sched_in(sub); | ||
| 1023 | n++; | ||
| 1024 | } | ||
| 1025 | } | ||
| 1026 | ctx->nr_active += n; | ||
| 1027 | |||
| 1028 | return 1; | ||
| 1029 | } | ||
| 1030 | |||
| 1031 | static int sparc_pmu_enable(struct perf_event *event) | 986 | static int sparc_pmu_enable(struct perf_event *event) |
| 1032 | { | 987 | { |
| 1033 | struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); | 988 | struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); |
| @@ -1045,11 +1000,20 @@ static int sparc_pmu_enable(struct perf_event *event) | |||
| 1045 | cpuc->events[n0] = event->hw.event_base; | 1000 | cpuc->events[n0] = event->hw.event_base; |
| 1046 | cpuc->current_idx[n0] = PIC_NO_INDEX; | 1001 | cpuc->current_idx[n0] = PIC_NO_INDEX; |
| 1047 | 1002 | ||
| 1003 | /* | ||
| 1004 | * If group events scheduling transaction was started, | ||
| 1005 | * skip the schedulability test here, it will be peformed | ||
| 1006 | * at commit time(->commit_txn) as a whole | ||
| 1007 | */ | ||
| 1008 | if (cpuc->group_flag & PERF_EVENT_TXN_STARTED) | ||
| 1009 | goto nocheck; | ||
| 1010 | |||
| 1048 | if (check_excludes(cpuc->event, n0, 1)) | 1011 | if (check_excludes(cpuc->event, n0, 1)) |
| 1049 | goto out; | 1012 | goto out; |
| 1050 | if (sparc_check_constraints(cpuc->event, cpuc->events, n0 + 1)) | 1013 | if (sparc_check_constraints(cpuc->event, cpuc->events, n0 + 1)) |
| 1051 | goto out; | 1014 | goto out; |
| 1052 | 1015 | ||
| 1016 | nocheck: | ||
| 1053 | cpuc->n_events++; | 1017 | cpuc->n_events++; |
| 1054 | cpuc->n_added++; | 1018 | cpuc->n_added++; |
| 1055 | 1019 | ||
| @@ -1129,11 +1093,61 @@ static int __hw_perf_event_init(struct perf_event *event) | |||
| 1129 | return 0; | 1093 | return 0; |
| 1130 | } | 1094 | } |
| 1131 | 1095 | ||
| 1096 | /* | ||
| 1097 | * Start group events scheduling transaction | ||
| 1098 | * Set the flag to make pmu::enable() not perform the | ||
| 1099 | * schedulability test, it will be performed at commit time | ||
| 1100 | */ | ||
| 1101 | static void sparc_pmu_start_txn(const struct pmu *pmu) | ||
| 1102 | { | ||
| 1103 | struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events); | ||
| 1104 | |||
| 1105 | cpuhw->group_flag |= PERF_EVENT_TXN_STARTED; | ||
| 1106 | } | ||
| 1107 | |||
| 1108 | /* | ||
| 1109 | * Stop group events scheduling transaction | ||
| 1110 | * Clear the flag and pmu::enable() will perform the | ||
| 1111 | * schedulability test. | ||
| 1112 | */ | ||
| 1113 | static void sparc_pmu_cancel_txn(const struct pmu *pmu) | ||
| 1114 | { | ||
| 1115 | struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events); | ||
| 1116 | |||
| 1117 | cpuhw->group_flag &= ~PERF_EVENT_TXN_STARTED; | ||
| 1118 | } | ||
| 1119 | |||
| 1120 | /* | ||
| 1121 | * Commit group events scheduling transaction | ||
| 1122 | * Perform the group schedulability test as a whole | ||
| 1123 | * Return 0 if success | ||
| 1124 | */ | ||
| 1125 | static int sparc_pmu_commit_txn(const struct pmu *pmu) | ||
| 1126 | { | ||
| 1127 | struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); | ||
| 1128 | int n; | ||
| 1129 | |||
| 1130 | if (!sparc_pmu) | ||
| 1131 | return -EINVAL; | ||
| 1132 | |||
| 1133 | cpuc = &__get_cpu_var(cpu_hw_events); | ||
| 1134 | n = cpuc->n_events; | ||
| 1135 | if (check_excludes(cpuc->event, 0, n)) | ||
| 1136 | return -EINVAL; | ||
| 1137 | if (sparc_check_constraints(cpuc->event, cpuc->events, n)) | ||
| 1138 | return -EAGAIN; | ||
| 1139 | |||
| 1140 | return 0; | ||
| 1141 | } | ||
| 1142 | |||
| 1132 | static const struct pmu pmu = { | 1143 | static const struct pmu pmu = { |
| 1133 | .enable = sparc_pmu_enable, | 1144 | .enable = sparc_pmu_enable, |
| 1134 | .disable = sparc_pmu_disable, | 1145 | .disable = sparc_pmu_disable, |
| 1135 | .read = sparc_pmu_read, | 1146 | .read = sparc_pmu_read, |
| 1136 | .unthrottle = sparc_pmu_unthrottle, | 1147 | .unthrottle = sparc_pmu_unthrottle, |
| 1148 | .start_txn = sparc_pmu_start_txn, | ||
| 1149 | .cancel_txn = sparc_pmu_cancel_txn, | ||
| 1150 | .commit_txn = sparc_pmu_commit_txn, | ||
| 1137 | }; | 1151 | }; |
| 1138 | 1152 | ||
| 1139 | const struct pmu *hw_perf_event_init(struct perf_event *event) | 1153 | const struct pmu *hw_perf_event_init(struct perf_event *event) |
diff --git a/arch/sparc/kernel/pmc.c b/arch/sparc/kernel/pmc.c index 5e4563d86f19..9589d8b9b0c1 100644 --- a/arch/sparc/kernel/pmc.c +++ b/arch/sparc/kernel/pmc.c | |||
| @@ -79,8 +79,11 @@ static struct of_device_id __initdata pmc_match[] = { | |||
| 79 | MODULE_DEVICE_TABLE(of, pmc_match); | 79 | MODULE_DEVICE_TABLE(of, pmc_match); |
| 80 | 80 | ||
| 81 | static struct of_platform_driver pmc_driver = { | 81 | static struct of_platform_driver pmc_driver = { |
| 82 | .name = "pmc", | 82 | .driver = { |
| 83 | .match_table = pmc_match, | 83 | .name = "pmc", |
| 84 | .owner = THIS_MODULE, | ||
| 85 | .of_match_table = pmc_match, | ||
| 86 | }, | ||
| 84 | .probe = pmc_probe, | 87 | .probe = pmc_probe, |
| 85 | }; | 88 | }; |
| 86 | 89 | ||
diff --git a/arch/sparc/kernel/power.c b/arch/sparc/kernel/power.c index e2a045c235a1..168d4cb63f5b 100644 --- a/arch/sparc/kernel/power.c +++ b/arch/sparc/kernel/power.c | |||
| @@ -41,9 +41,9 @@ static int __devinit power_probe(struct of_device *op, const struct of_device_id | |||
| 41 | power_reg = of_ioremap(res, 0, 0x4, "power"); | 41 | power_reg = of_ioremap(res, 0, 0x4, "power"); |
| 42 | 42 | ||
| 43 | printk(KERN_INFO "%s: Control reg at %llx\n", | 43 | printk(KERN_INFO "%s: Control reg at %llx\n", |
| 44 | op->node->name, res->start); | 44 | op->dev.of_node->name, res->start); |
| 45 | 45 | ||
| 46 | if (has_button_interrupt(irq, op->node)) { | 46 | if (has_button_interrupt(irq, op->dev.of_node)) { |
| 47 | if (request_irq(irq, | 47 | if (request_irq(irq, |
| 48 | power_handler, 0, "power", NULL) < 0) | 48 | power_handler, 0, "power", NULL) < 0) |
| 49 | printk(KERN_ERR "power: Cannot setup IRQ handler.\n"); | 49 | printk(KERN_ERR "power: Cannot setup IRQ handler.\n"); |
| @@ -60,10 +60,11 @@ static struct of_device_id __initdata power_match[] = { | |||
| 60 | }; | 60 | }; |
| 61 | 61 | ||
| 62 | static struct of_platform_driver power_driver = { | 62 | static struct of_platform_driver power_driver = { |
| 63 | .match_table = power_match, | ||
| 64 | .probe = power_probe, | 63 | .probe = power_probe, |
| 65 | .driver = { | 64 | .driver = { |
| 66 | .name = "power", | 65 | .name = "power", |
| 66 | .owner = THIS_MODULE, | ||
| 67 | .of_match_table = power_match, | ||
| 67 | }, | 68 | }, |
| 68 | }; | 69 | }; |
| 69 | 70 | ||
diff --git a/arch/sparc/kernel/psycho_common.c b/arch/sparc/kernel/psycho_common.c index 8f1478475421..3f34ac853931 100644 --- a/arch/sparc/kernel/psycho_common.c +++ b/arch/sparc/kernel/psycho_common.c | |||
| @@ -450,7 +450,7 @@ int psycho_iommu_init(struct pci_pbm_info *pbm, int tsbsize, | |||
| 450 | void psycho_pbm_init_common(struct pci_pbm_info *pbm, struct of_device *op, | 450 | void psycho_pbm_init_common(struct pci_pbm_info *pbm, struct of_device *op, |
| 451 | const char *chip_name, int chip_type) | 451 | const char *chip_name, int chip_type) |
| 452 | { | 452 | { |
| 453 | struct device_node *dp = op->node; | 453 | struct device_node *dp = op->dev.of_node; |
| 454 | 454 | ||
| 455 | pbm->name = dp->full_name; | 455 | pbm->name = dp->full_name; |
| 456 | pbm->numa_node = -1; | 456 | pbm->numa_node = -1; |
diff --git a/arch/sparc/kernel/sbus.c b/arch/sparc/kernel/sbus.c index 406e0872504e..cfeaf04b9cdf 100644 --- a/arch/sparc/kernel/sbus.c +++ b/arch/sparc/kernel/sbus.c | |||
| @@ -63,10 +63,10 @@ void sbus_set_sbus64(struct device *dev, int bursts) | |||
| 63 | int slot; | 63 | int slot; |
| 64 | u64 val; | 64 | u64 val; |
| 65 | 65 | ||
| 66 | regs = of_get_property(op->node, "reg", NULL); | 66 | regs = of_get_property(op->dev.of_node, "reg", NULL); |
| 67 | if (!regs) { | 67 | if (!regs) { |
| 68 | printk(KERN_ERR "sbus_set_sbus64: Cannot find regs for %s\n", | 68 | printk(KERN_ERR "sbus_set_sbus64: Cannot find regs for %s\n", |
| 69 | op->node->full_name); | 69 | op->dev.of_node->full_name); |
| 70 | return; | 70 | return; |
| 71 | } | 71 | } |
| 72 | slot = regs->which_io; | 72 | slot = regs->which_io; |
| @@ -287,7 +287,7 @@ static irqreturn_t sysio_ue_handler(int irq, void *dev_id) | |||
| 287 | SYSIO_UEAFSR_SPIO | SYSIO_UEAFSR_SDRD | SYSIO_UEAFSR_SDWR); | 287 | SYSIO_UEAFSR_SPIO | SYSIO_UEAFSR_SDRD | SYSIO_UEAFSR_SDWR); |
| 288 | upa_writeq(error_bits, afsr_reg); | 288 | upa_writeq(error_bits, afsr_reg); |
| 289 | 289 | ||
| 290 | portid = of_getintprop_default(op->node, "portid", -1); | 290 | portid = of_getintprop_default(op->dev.of_node, "portid", -1); |
| 291 | 291 | ||
| 292 | /* Log the error. */ | 292 | /* Log the error. */ |
| 293 | printk("SYSIO[%x]: Uncorrectable ECC Error, primary error type[%s]\n", | 293 | printk("SYSIO[%x]: Uncorrectable ECC Error, primary error type[%s]\n", |
| @@ -361,7 +361,7 @@ static irqreturn_t sysio_ce_handler(int irq, void *dev_id) | |||
| 361 | SYSIO_CEAFSR_SPIO | SYSIO_CEAFSR_SDRD | SYSIO_CEAFSR_SDWR); | 361 | SYSIO_CEAFSR_SPIO | SYSIO_CEAFSR_SDRD | SYSIO_CEAFSR_SDWR); |
| 362 | upa_writeq(error_bits, afsr_reg); | 362 | upa_writeq(error_bits, afsr_reg); |
| 363 | 363 | ||
| 364 | portid = of_getintprop_default(op->node, "portid", -1); | 364 | portid = of_getintprop_default(op->dev.of_node, "portid", -1); |
| 365 | 365 | ||
| 366 | printk("SYSIO[%x]: Correctable ECC Error, primary error type[%s]\n", | 366 | printk("SYSIO[%x]: Correctable ECC Error, primary error type[%s]\n", |
| 367 | portid, | 367 | portid, |
| @@ -439,7 +439,7 @@ static irqreturn_t sysio_sbus_error_handler(int irq, void *dev_id) | |||
| 439 | SYSIO_SBAFSR_SLE | SYSIO_SBAFSR_STO | SYSIO_SBAFSR_SBERR); | 439 | SYSIO_SBAFSR_SLE | SYSIO_SBAFSR_STO | SYSIO_SBAFSR_SBERR); |
| 440 | upa_writeq(error_bits, afsr_reg); | 440 | upa_writeq(error_bits, afsr_reg); |
| 441 | 441 | ||
| 442 | portid = of_getintprop_default(op->node, "portid", -1); | 442 | portid = of_getintprop_default(op->dev.of_node, "portid", -1); |
| 443 | 443 | ||
| 444 | /* Log the error. */ | 444 | /* Log the error. */ |
| 445 | printk("SYSIO[%x]: SBUS Error, primary error type[%s] read(%d)\n", | 445 | printk("SYSIO[%x]: SBUS Error, primary error type[%s] read(%d)\n", |
| @@ -496,7 +496,7 @@ static void __init sysio_register_error_handlers(struct of_device *op) | |||
| 496 | u64 control; | 496 | u64 control; |
| 497 | int portid; | 497 | int portid; |
| 498 | 498 | ||
| 499 | portid = of_getintprop_default(op->node, "portid", -1); | 499 | portid = of_getintprop_default(op->dev.of_node, "portid", -1); |
| 500 | 500 | ||
| 501 | irq = sbus_build_irq(op, SYSIO_UE_INO); | 501 | irq = sbus_build_irq(op, SYSIO_UE_INO); |
| 502 | if (request_irq(irq, sysio_ue_handler, 0, | 502 | if (request_irq(irq, sysio_ue_handler, 0, |
| @@ -537,7 +537,7 @@ static void __init sysio_register_error_handlers(struct of_device *op) | |||
| 537 | static void __init sbus_iommu_init(struct of_device *op) | 537 | static void __init sbus_iommu_init(struct of_device *op) |
| 538 | { | 538 | { |
| 539 | const struct linux_prom64_registers *pr; | 539 | const struct linux_prom64_registers *pr; |
| 540 | struct device_node *dp = op->node; | 540 | struct device_node *dp = op->dev.of_node; |
| 541 | struct iommu *iommu; | 541 | struct iommu *iommu; |
| 542 | struct strbuf *strbuf; | 542 | struct strbuf *strbuf; |
| 543 | unsigned long regs, reg_base; | 543 | unsigned long regs, reg_base; |
| @@ -589,7 +589,7 @@ static void __init sbus_iommu_init(struct of_device *op) | |||
| 589 | */ | 589 | */ |
| 590 | iommu->write_complete_reg = regs + 0x2000UL; | 590 | iommu->write_complete_reg = regs + 0x2000UL; |
| 591 | 591 | ||
| 592 | portid = of_getintprop_default(op->node, "portid", -1); | 592 | portid = of_getintprop_default(op->dev.of_node, "portid", -1); |
| 593 | printk(KERN_INFO "SYSIO: UPA portID %x, at %016lx\n", | 593 | printk(KERN_INFO "SYSIO: UPA portID %x, at %016lx\n", |
| 594 | portid, regs); | 594 | portid, regs); |
| 595 | 595 | ||
diff --git a/arch/sparc/kernel/time_32.c b/arch/sparc/kernel/time_32.c index 4453003032b5..e404b063be2c 100644 --- a/arch/sparc/kernel/time_32.c +++ b/arch/sparc/kernel/time_32.c | |||
| @@ -144,7 +144,7 @@ static struct platform_device m48t59_rtc = { | |||
| 144 | 144 | ||
| 145 | static int __devinit clock_probe(struct of_device *op, const struct of_device_id *match) | 145 | static int __devinit clock_probe(struct of_device *op, const struct of_device_id *match) |
| 146 | { | 146 | { |
| 147 | struct device_node *dp = op->node; | 147 | struct device_node *dp = op->dev.of_node; |
| 148 | const char *model = of_get_property(dp, "model", NULL); | 148 | const char *model = of_get_property(dp, "model", NULL); |
| 149 | 149 | ||
| 150 | if (!model) | 150 | if (!model) |
| @@ -177,10 +177,11 @@ static struct of_device_id __initdata clock_match[] = { | |||
| 177 | }; | 177 | }; |
| 178 | 178 | ||
| 179 | static struct of_platform_driver clock_driver = { | 179 | static struct of_platform_driver clock_driver = { |
| 180 | .match_table = clock_match, | ||
| 181 | .probe = clock_probe, | 180 | .probe = clock_probe, |
| 182 | .driver = { | 181 | .driver = { |
| 183 | .name = "rtc", | 182 | .name = "rtc", |
| 183 | .owner = THIS_MODULE, | ||
| 184 | .of_match_table = clock_match, | ||
| 184 | }, | 185 | }, |
| 185 | }; | 186 | }; |
| 186 | 187 | ||
diff --git a/arch/sparc/kernel/time_64.c b/arch/sparc/kernel/time_64.c index c7bbe6cf7b85..21e9fcae0668 100644 --- a/arch/sparc/kernel/time_64.c +++ b/arch/sparc/kernel/time_64.c | |||
| @@ -424,7 +424,7 @@ static int __devinit rtc_probe(struct of_device *op, const struct of_device_id * | |||
| 424 | struct resource *r; | 424 | struct resource *r; |
| 425 | 425 | ||
| 426 | printk(KERN_INFO "%s: RTC regs at 0x%llx\n", | 426 | printk(KERN_INFO "%s: RTC regs at 0x%llx\n", |
| 427 | op->node->full_name, op->resource[0].start); | 427 | op->dev.of_node->full_name, op->resource[0].start); |
| 428 | 428 | ||
| 429 | /* The CMOS RTC driver only accepts IORESOURCE_IO, so cons | 429 | /* The CMOS RTC driver only accepts IORESOURCE_IO, so cons |
| 430 | * up a fake resource so that the probe works for all cases. | 430 | * up a fake resource so that the probe works for all cases. |
| @@ -463,10 +463,11 @@ static struct of_device_id __initdata rtc_match[] = { | |||
| 463 | }; | 463 | }; |
| 464 | 464 | ||
| 465 | static struct of_platform_driver rtc_driver = { | 465 | static struct of_platform_driver rtc_driver = { |
| 466 | .match_table = rtc_match, | ||
| 467 | .probe = rtc_probe, | 466 | .probe = rtc_probe, |
| 468 | .driver = { | 467 | .driver = { |
| 469 | .name = "rtc", | 468 | .name = "rtc", |
| 469 | .owner = THIS_MODULE, | ||
| 470 | .of_match_table = rtc_match, | ||
| 470 | }, | 471 | }, |
| 471 | }; | 472 | }; |
| 472 | 473 | ||
| @@ -480,7 +481,7 @@ static int __devinit bq4802_probe(struct of_device *op, const struct of_device_i | |||
| 480 | { | 481 | { |
| 481 | 482 | ||
| 482 | printk(KERN_INFO "%s: BQ4802 regs at 0x%llx\n", | 483 | printk(KERN_INFO "%s: BQ4802 regs at 0x%llx\n", |
| 483 | op->node->full_name, op->resource[0].start); | 484 | op->dev.of_node->full_name, op->resource[0].start); |
| 484 | 485 | ||
| 485 | rtc_bq4802_device.resource = &op->resource[0]; | 486 | rtc_bq4802_device.resource = &op->resource[0]; |
| 486 | return platform_device_register(&rtc_bq4802_device); | 487 | return platform_device_register(&rtc_bq4802_device); |
| @@ -495,10 +496,11 @@ static struct of_device_id __initdata bq4802_match[] = { | |||
| 495 | }; | 496 | }; |
| 496 | 497 | ||
| 497 | static struct of_platform_driver bq4802_driver = { | 498 | static struct of_platform_driver bq4802_driver = { |
| 498 | .match_table = bq4802_match, | ||
| 499 | .probe = bq4802_probe, | 499 | .probe = bq4802_probe, |
| 500 | .driver = { | 500 | .driver = { |
| 501 | .name = "bq4802", | 501 | .name = "bq4802", |
| 502 | .owner = THIS_MODULE, | ||
| 503 | .of_match_table = bq4802_match, | ||
| 502 | }, | 504 | }, |
| 503 | }; | 505 | }; |
| 504 | 506 | ||
| @@ -534,7 +536,7 @@ static struct platform_device m48t59_rtc = { | |||
| 534 | 536 | ||
| 535 | static int __devinit mostek_probe(struct of_device *op, const struct of_device_id *match) | 537 | static int __devinit mostek_probe(struct of_device *op, const struct of_device_id *match) |
| 536 | { | 538 | { |
| 537 | struct device_node *dp = op->node; | 539 | struct device_node *dp = op->dev.of_node; |
| 538 | 540 | ||
| 539 | /* On an Enterprise system there can be multiple mostek clocks. | 541 | /* On an Enterprise system there can be multiple mostek clocks. |
| 540 | * We should only match the one that is on the central FHC bus. | 542 | * We should only match the one that is on the central FHC bus. |
| @@ -558,10 +560,11 @@ static struct of_device_id __initdata mostek_match[] = { | |||
| 558 | }; | 560 | }; |
| 559 | 561 | ||
| 560 | static struct of_platform_driver mostek_driver = { | 562 | static struct of_platform_driver mostek_driver = { |
| 561 | .match_table = mostek_match, | ||
| 562 | .probe = mostek_probe, | 563 | .probe = mostek_probe, |
| 563 | .driver = { | 564 | .driver = { |
| 564 | .name = "mostek", | 565 | .name = "mostek", |
| 566 | .owner = THIS_MODULE, | ||
| 567 | .of_match_table = mostek_match, | ||
| 565 | }, | 568 | }, |
| 566 | }; | 569 | }; |
| 567 | 570 | ||
diff --git a/arch/um/drivers/harddog_kern.c b/arch/um/drivers/harddog_kern.c index d332503fa1be..cfcac1ff4cf2 100644 --- a/arch/um/drivers/harddog_kern.c +++ b/arch/um/drivers/harddog_kern.c | |||
| @@ -124,8 +124,8 @@ static ssize_t harddog_write(struct file *file, const char __user *data, size_t | |||
| 124 | return 0; | 124 | return 0; |
| 125 | } | 125 | } |
| 126 | 126 | ||
| 127 | static int harddog_ioctl(struct inode *inode, struct file *file, | 127 | static int harddog_ioctl_unlocked(struct file *file, |
| 128 | unsigned int cmd, unsigned long arg) | 128 | unsigned int cmd, unsigned long arg) |
| 129 | { | 129 | { |
| 130 | void __user *argp= (void __user *)arg; | 130 | void __user *argp= (void __user *)arg; |
| 131 | static struct watchdog_info ident = { | 131 | static struct watchdog_info ident = { |
| @@ -148,10 +148,22 @@ static int harddog_ioctl(struct inode *inode, struct file *file, | |||
| 148 | } | 148 | } |
| 149 | } | 149 | } |
| 150 | 150 | ||
| 151 | static long harddog_ioctl(struct file *file, | ||
| 152 | unsigned int cmd, unsigned long arg) | ||
| 153 | { | ||
| 154 | long ret; | ||
| 155 | |||
| 156 | lock_kernel(); | ||
| 157 | ret = harddog_ioctl_unlocked(file, cmd, arg); | ||
| 158 | unlock_kernel(); | ||
| 159 | |||
| 160 | return ret; | ||
| 161 | } | ||
| 162 | |||
| 151 | static const struct file_operations harddog_fops = { | 163 | static const struct file_operations harddog_fops = { |
| 152 | .owner = THIS_MODULE, | 164 | .owner = THIS_MODULE, |
| 153 | .write = harddog_write, | 165 | .write = harddog_write, |
| 154 | .ioctl = harddog_ioctl, | 166 | .unlocked_ioctl = harddog_ioctl, |
| 155 | .open = harddog_open, | 167 | .open = harddog_open, |
| 156 | .release = harddog_release, | 168 | .release = harddog_release, |
| 157 | }; | 169 | }; |
diff --git a/arch/um/drivers/hostaudio_kern.c b/arch/um/drivers/hostaudio_kern.c index 368219cc2366..ae42695c3597 100644 --- a/arch/um/drivers/hostaudio_kern.c +++ b/arch/um/drivers/hostaudio_kern.c | |||
| @@ -136,7 +136,7 @@ static unsigned int hostaudio_poll(struct file *file, | |||
| 136 | return mask; | 136 | return mask; |
| 137 | } | 137 | } |
| 138 | 138 | ||
| 139 | static int hostaudio_ioctl(struct inode *inode, struct file *file, | 139 | static long hostaudio_ioctl(struct file *file, |
| 140 | unsigned int cmd, unsigned long arg) | 140 | unsigned int cmd, unsigned long arg) |
| 141 | { | 141 | { |
| 142 | struct hostaudio_state *state = file->private_data; | 142 | struct hostaudio_state *state = file->private_data; |
| @@ -223,7 +223,7 @@ static int hostaudio_release(struct inode *inode, struct file *file) | |||
| 223 | 223 | ||
| 224 | /* /dev/mixer file operations */ | 224 | /* /dev/mixer file operations */ |
| 225 | 225 | ||
| 226 | static int hostmixer_ioctl_mixdev(struct inode *inode, struct file *file, | 226 | static long hostmixer_ioctl_mixdev(struct file *file, |
| 227 | unsigned int cmd, unsigned long arg) | 227 | unsigned int cmd, unsigned long arg) |
| 228 | { | 228 | { |
| 229 | struct hostmixer_state *state = file->private_data; | 229 | struct hostmixer_state *state = file->private_data; |
| @@ -289,7 +289,7 @@ static const struct file_operations hostaudio_fops = { | |||
| 289 | .read = hostaudio_read, | 289 | .read = hostaudio_read, |
| 290 | .write = hostaudio_write, | 290 | .write = hostaudio_write, |
| 291 | .poll = hostaudio_poll, | 291 | .poll = hostaudio_poll, |
| 292 | .ioctl = hostaudio_ioctl, | 292 | .unlocked_ioctl = hostaudio_ioctl, |
| 293 | .mmap = NULL, | 293 | .mmap = NULL, |
| 294 | .open = hostaudio_open, | 294 | .open = hostaudio_open, |
| 295 | .release = hostaudio_release, | 295 | .release = hostaudio_release, |
| @@ -298,7 +298,7 @@ static const struct file_operations hostaudio_fops = { | |||
| 298 | static const struct file_operations hostmixer_fops = { | 298 | static const struct file_operations hostmixer_fops = { |
| 299 | .owner = THIS_MODULE, | 299 | .owner = THIS_MODULE, |
| 300 | .llseek = no_llseek, | 300 | .llseek = no_llseek, |
| 301 | .ioctl = hostmixer_ioctl_mixdev, | 301 | .unlocked_ioctl = hostmixer_ioctl_mixdev, |
| 302 | .open = hostmixer_open_mixdev, | 302 | .open = hostmixer_open_mixdev, |
| 303 | .release = hostmixer_release, | 303 | .release = hostmixer_release, |
| 304 | }; | 304 | }; |
diff --git a/arch/um/drivers/mmapper_kern.c b/arch/um/drivers/mmapper_kern.c index d22f9e5c0eac..7158393b6793 100644 --- a/arch/um/drivers/mmapper_kern.c +++ b/arch/um/drivers/mmapper_kern.c | |||
| @@ -46,8 +46,7 @@ static ssize_t mmapper_write(struct file *file, const char __user *buf, | |||
| 46 | return count; | 46 | return count; |
| 47 | } | 47 | } |
| 48 | 48 | ||
| 49 | static int mmapper_ioctl(struct inode *inode, struct file *file, | 49 | static long mmapper_ioctl(struct file *file, unsigned int cmd, unsigned long arg) |
| 50 | unsigned int cmd, unsigned long arg) | ||
| 51 | { | 50 | { |
| 52 | return -ENOIOCTLCMD; | 51 | return -ENOIOCTLCMD; |
| 53 | } | 52 | } |
| @@ -90,7 +89,7 @@ static const struct file_operations mmapper_fops = { | |||
| 90 | .owner = THIS_MODULE, | 89 | .owner = THIS_MODULE, |
| 91 | .read = mmapper_read, | 90 | .read = mmapper_read, |
| 92 | .write = mmapper_write, | 91 | .write = mmapper_write, |
| 93 | .ioctl = mmapper_ioctl, | 92 | .unlocked_ioctl = mmapper_ioctl, |
| 94 | .mmap = mmapper_mmap, | 93 | .mmap = mmapper_mmap, |
| 95 | .open = mmapper_open, | 94 | .open = mmapper_open, |
| 96 | .release = mmapper_release, | 95 | .release = mmapper_release, |
diff --git a/arch/um/kernel/dyn.lds.S b/arch/um/kernel/dyn.lds.S index 7fcad58e216d..69268014dd8e 100644 --- a/arch/um/kernel/dyn.lds.S +++ b/arch/um/kernel/dyn.lds.S | |||
| @@ -94,7 +94,7 @@ SECTIONS | |||
| 94 | .data : { | 94 | .data : { |
| 95 | INIT_TASK_DATA(KERNEL_STACK_SIZE) | 95 | INIT_TASK_DATA(KERNEL_STACK_SIZE) |
| 96 | . = ALIGN(KERNEL_STACK_SIZE); | 96 | . = ALIGN(KERNEL_STACK_SIZE); |
| 97 | *(.data.init_irqstack) | 97 | *(.data..init_irqstack) |
| 98 | DATA_DATA | 98 | DATA_DATA |
| 99 | *(.data.* .gnu.linkonce.d.*) | 99 | *(.data.* .gnu.linkonce.d.*) |
| 100 | SORT(CONSTRUCTORS) | 100 | SORT(CONSTRUCTORS) |
diff --git a/arch/um/kernel/init_task.c b/arch/um/kernel/init_task.c index 8aa77b61a5ff..ddc9698b66ed 100644 --- a/arch/um/kernel/init_task.c +++ b/arch/um/kernel/init_task.c | |||
| @@ -34,5 +34,5 @@ union thread_union init_thread_union __init_task_data = | |||
| 34 | { INIT_THREAD_INFO(init_task) }; | 34 | { INIT_THREAD_INFO(init_task) }; |
| 35 | 35 | ||
| 36 | union thread_union cpu0_irqstack | 36 | union thread_union cpu0_irqstack |
| 37 | __attribute__((__section__(".data.init_irqstack"))) = | 37 | __attribute__((__section__(".data..init_irqstack"))) = |
| 38 | { INIT_THREAD_INFO(init_task) }; | 38 | { INIT_THREAD_INFO(init_task) }; |
diff --git a/arch/um/kernel/skas/uaccess.c b/arch/um/kernel/skas/uaccess.c index e22c96993db3..696634214dc6 100644 --- a/arch/um/kernel/skas/uaccess.c +++ b/arch/um/kernel/skas/uaccess.c | |||
| @@ -81,7 +81,7 @@ static int do_op_one_page(unsigned long addr, int len, int is_write, | |||
| 81 | 81 | ||
| 82 | current->thread.fault_catcher = NULL; | 82 | current->thread.fault_catcher = NULL; |
| 83 | 83 | ||
| 84 | kunmap_atomic(page, KM_UML_USERCOPY); | 84 | kunmap_atomic((void *)addr, KM_UML_USERCOPY); |
| 85 | 85 | ||
| 86 | return n; | 86 | return n; |
| 87 | } | 87 | } |
diff --git a/arch/um/kernel/uml.lds.S b/arch/um/kernel/uml.lds.S index e7a6cca667aa..ec6378550671 100644 --- a/arch/um/kernel/uml.lds.S +++ b/arch/um/kernel/uml.lds.S | |||
| @@ -50,7 +50,7 @@ SECTIONS | |||
| 50 | { | 50 | { |
| 51 | INIT_TASK_DATA(KERNEL_STACK_SIZE) | 51 | INIT_TASK_DATA(KERNEL_STACK_SIZE) |
| 52 | . = ALIGN(KERNEL_STACK_SIZE); | 52 | . = ALIGN(KERNEL_STACK_SIZE); |
| 53 | *(.data.init_irqstack) | 53 | *(.data..init_irqstack) |
| 54 | DATA_DATA | 54 | DATA_DATA |
| 55 | *(.gnu.linkonce.d*) | 55 | *(.gnu.linkonce.d*) |
| 56 | CONSTRUCTORS | 56 | CONSTRUCTORS |
diff --git a/arch/x86/.gitignore b/arch/x86/.gitignore new file mode 100644 index 000000000000..028079065af6 --- /dev/null +++ b/arch/x86/.gitignore | |||
| @@ -0,0 +1,3 @@ | |||
| 1 | boot/compressed/vmlinux | ||
| 2 | tools/test_get_len | ||
| 3 | |||
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index a2d3a5fbeeda..dcb0593b4a66 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig | |||
| @@ -109,6 +109,9 @@ config SBUS | |||
| 109 | config NEED_DMA_MAP_STATE | 109 | config NEED_DMA_MAP_STATE |
| 110 | def_bool (X86_64 || DMAR || DMA_API_DEBUG) | 110 | def_bool (X86_64 || DMAR || DMA_API_DEBUG) |
| 111 | 111 | ||
| 112 | config NEED_SG_DMA_LENGTH | ||
| 113 | def_bool y | ||
| 114 | |||
| 112 | config GENERIC_ISA_DMA | 115 | config GENERIC_ISA_DMA |
| 113 | def_bool y | 116 | def_bool y |
| 114 | 117 | ||
| @@ -1703,6 +1706,10 @@ config HAVE_ARCH_EARLY_PFN_TO_NID | |||
| 1703 | def_bool X86_64 | 1706 | def_bool X86_64 |
| 1704 | depends on NUMA | 1707 | depends on NUMA |
| 1705 | 1708 | ||
| 1709 | config USE_PERCPU_NUMA_NODE_ID | ||
| 1710 | def_bool X86_64 | ||
| 1711 | depends on NUMA | ||
| 1712 | |||
| 1706 | menu "Power management and ACPI options" | 1713 | menu "Power management and ACPI options" |
| 1707 | 1714 | ||
| 1708 | config ARCH_HIBERNATION_HEADER | 1715 | config ARCH_HIBERNATION_HEADER |
| @@ -1923,6 +1930,14 @@ config PCI_MMCONFIG | |||
| 1923 | bool "Support mmconfig PCI config space access" | 1930 | bool "Support mmconfig PCI config space access" |
| 1924 | depends on X86_64 && PCI && ACPI | 1931 | depends on X86_64 && PCI && ACPI |
| 1925 | 1932 | ||
| 1933 | config PCI_CNB20LE_QUIRK | ||
| 1934 | bool "Read CNB20LE Host Bridge Windows" | ||
| 1935 | depends on PCI | ||
| 1936 | help | ||
| 1937 | Read the PCI windows out of the CNB20LE host bridge. This allows | ||
| 1938 | PCI hotplug to work on systems with the CNB20LE chipset which do | ||
| 1939 | not have ACPI. | ||
| 1940 | |||
| 1926 | config DMAR | 1941 | config DMAR |
| 1927 | bool "Support for DMA Remapping Devices (EXPERIMENTAL)" | 1942 | bool "Support for DMA Remapping Devices (EXPERIMENTAL)" |
| 1928 | depends on PCI_MSI && ACPI && EXPERIMENTAL | 1943 | depends on PCI_MSI && ACPI && EXPERIMENTAL |
diff --git a/arch/x86/boot/compressed/mkpiggy.c b/arch/x86/boot/compressed/mkpiggy.c index bcbd36c41432..5c228129d175 100644 --- a/arch/x86/boot/compressed/mkpiggy.c +++ b/arch/x86/boot/compressed/mkpiggy.c | |||
| @@ -77,7 +77,7 @@ int main(int argc, char *argv[]) | |||
| 77 | offs += 32*1024 + 18; /* Add 32K + 18 bytes slack */ | 77 | offs += 32*1024 + 18; /* Add 32K + 18 bytes slack */ |
| 78 | offs = (offs+4095) & ~4095; /* Round to a 4K boundary */ | 78 | offs = (offs+4095) & ~4095; /* Round to a 4K boundary */ |
| 79 | 79 | ||
| 80 | printf(".section \".rodata.compressed\",\"a\",@progbits\n"); | 80 | printf(".section \".rodata..compressed\",\"a\",@progbits\n"); |
| 81 | printf(".globl z_input_len\n"); | 81 | printf(".globl z_input_len\n"); |
| 82 | printf("z_input_len = %lu\n", ilen); | 82 | printf("z_input_len = %lu\n", ilen); |
| 83 | printf(".globl z_output_len\n"); | 83 | printf(".globl z_output_len\n"); |
diff --git a/arch/x86/boot/compressed/vmlinux.lds.S b/arch/x86/boot/compressed/vmlinux.lds.S index a6f1a59a5b0c..5ddabceee124 100644 --- a/arch/x86/boot/compressed/vmlinux.lds.S +++ b/arch/x86/boot/compressed/vmlinux.lds.S | |||
| @@ -26,8 +26,8 @@ SECTIONS | |||
| 26 | HEAD_TEXT | 26 | HEAD_TEXT |
| 27 | _ehead = . ; | 27 | _ehead = . ; |
| 28 | } | 28 | } |
| 29 | .rodata.compressed : { | 29 | .rodata..compressed : { |
| 30 | *(.rodata.compressed) | 30 | *(.rodata..compressed) |
| 31 | } | 31 | } |
| 32 | .text : { | 32 | .text : { |
| 33 | _text = .; /* Text */ | 33 | _text = .; /* Text */ |
diff --git a/arch/x86/crypto/aesni-intel_asm.S b/arch/x86/crypto/aesni-intel_asm.S index 20bb0e1ac681..ff16756a51c1 100644 --- a/arch/x86/crypto/aesni-intel_asm.S +++ b/arch/x86/crypto/aesni-intel_asm.S | |||
| @@ -32,6 +32,9 @@ | |||
| 32 | #define IN IN1 | 32 | #define IN IN1 |
| 33 | #define KEY %xmm2 | 33 | #define KEY %xmm2 |
| 34 | #define IV %xmm3 | 34 | #define IV %xmm3 |
| 35 | #define BSWAP_MASK %xmm10 | ||
| 36 | #define CTR %xmm11 | ||
| 37 | #define INC %xmm12 | ||
| 35 | 38 | ||
| 36 | #define KEYP %rdi | 39 | #define KEYP %rdi |
| 37 | #define OUTP %rsi | 40 | #define OUTP %rsi |
| @@ -42,6 +45,7 @@ | |||
| 42 | #define T1 %r10 | 45 | #define T1 %r10 |
| 43 | #define TKEYP T1 | 46 | #define TKEYP T1 |
| 44 | #define T2 %r11 | 47 | #define T2 %r11 |
| 48 | #define TCTR_LOW T2 | ||
| 45 | 49 | ||
| 46 | _key_expansion_128: | 50 | _key_expansion_128: |
| 47 | _key_expansion_256a: | 51 | _key_expansion_256a: |
| @@ -724,3 +728,114 @@ ENTRY(aesni_cbc_dec) | |||
| 724 | movups IV, (IVP) | 728 | movups IV, (IVP) |
| 725 | .Lcbc_dec_just_ret: | 729 | .Lcbc_dec_just_ret: |
| 726 | ret | 730 | ret |
| 731 | |||
| 732 | .align 16 | ||
| 733 | .Lbswap_mask: | ||
| 734 | .byte 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 | ||
| 735 | |||
| 736 | /* | ||
| 737 | * _aesni_inc_init: internal ABI | ||
| 738 | * setup registers used by _aesni_inc | ||
| 739 | * input: | ||
| 740 | * IV | ||
| 741 | * output: | ||
| 742 | * CTR: == IV, in little endian | ||
| 743 | * TCTR_LOW: == lower qword of CTR | ||
| 744 | * INC: == 1, in little endian | ||
| 745 | * BSWAP_MASK == endian swapping mask | ||
| 746 | */ | ||
| 747 | _aesni_inc_init: | ||
| 748 | movaps .Lbswap_mask, BSWAP_MASK | ||
| 749 | movaps IV, CTR | ||
| 750 | PSHUFB_XMM BSWAP_MASK CTR | ||
| 751 | mov $1, TCTR_LOW | ||
| 752 | MOVQ_R64_XMM TCTR_LOW INC | ||
| 753 | MOVQ_R64_XMM CTR TCTR_LOW | ||
| 754 | ret | ||
| 755 | |||
| 756 | /* | ||
| 757 | * _aesni_inc: internal ABI | ||
| 758 | * Increase IV by 1, IV is in big endian | ||
| 759 | * input: | ||
| 760 | * IV | ||
| 761 | * CTR: == IV, in little endian | ||
| 762 | * TCTR_LOW: == lower qword of CTR | ||
| 763 | * INC: == 1, in little endian | ||
| 764 | * BSWAP_MASK == endian swapping mask | ||
| 765 | * output: | ||
| 766 | * IV: Increase by 1 | ||
| 767 | * changed: | ||
| 768 | * CTR: == output IV, in little endian | ||
| 769 | * TCTR_LOW: == lower qword of CTR | ||
| 770 | */ | ||
| 771 | _aesni_inc: | ||
| 772 | paddq INC, CTR | ||
| 773 | add $1, TCTR_LOW | ||
| 774 | jnc .Linc_low | ||
| 775 | pslldq $8, INC | ||
| 776 | paddq INC, CTR | ||
| 777 | psrldq $8, INC | ||
| 778 | .Linc_low: | ||
| 779 | movaps CTR, IV | ||
| 780 | PSHUFB_XMM BSWAP_MASK IV | ||
| 781 | ret | ||
| 782 | |||
| 783 | /* | ||
| 784 | * void aesni_ctr_enc(struct crypto_aes_ctx *ctx, const u8 *dst, u8 *src, | ||
| 785 | * size_t len, u8 *iv) | ||
| 786 | */ | ||
| 787 | ENTRY(aesni_ctr_enc) | ||
| 788 | cmp $16, LEN | ||
| 789 | jb .Lctr_enc_just_ret | ||
| 790 | mov 480(KEYP), KLEN | ||
| 791 | movups (IVP), IV | ||
| 792 | call _aesni_inc_init | ||
| 793 | cmp $64, LEN | ||
| 794 | jb .Lctr_enc_loop1 | ||
| 795 | .align 4 | ||
| 796 | .Lctr_enc_loop4: | ||
| 797 | movaps IV, STATE1 | ||
| 798 | call _aesni_inc | ||
| 799 | movups (INP), IN1 | ||
| 800 | movaps IV, STATE2 | ||
| 801 | call _aesni_inc | ||
| 802 | movups 0x10(INP), IN2 | ||
| 803 | movaps IV, STATE3 | ||
| 804 | call _aesni_inc | ||
| 805 | movups 0x20(INP), IN3 | ||
| 806 | movaps IV, STATE4 | ||
| 807 | call _aesni_inc | ||
| 808 | movups 0x30(INP), IN4 | ||
| 809 | call _aesni_enc4 | ||
| 810 | pxor IN1, STATE1 | ||
| 811 | movups STATE1, (OUTP) | ||
| 812 | pxor IN2, STATE2 | ||
| 813 | movups STATE2, 0x10(OUTP) | ||
| 814 | pxor IN3, STATE3 | ||
| 815 | movups STATE3, 0x20(OUTP) | ||
| 816 | pxor IN4, STATE4 | ||
| 817 | movups STATE4, 0x30(OUTP) | ||
| 818 | sub $64, LEN | ||
| 819 | add $64, INP | ||
| 820 | add $64, OUTP | ||
| 821 | cmp $64, LEN | ||
| 822 | jge .Lctr_enc_loop4 | ||
| 823 | cmp $16, LEN | ||
| 824 | jb .Lctr_enc_ret | ||
| 825 | .align 4 | ||
| 826 | .Lctr_enc_loop1: | ||
| 827 | movaps IV, STATE | ||
| 828 | call _aesni_inc | ||
| 829 | movups (INP), IN | ||
| 830 | call _aesni_enc1 | ||
| 831 | pxor IN, STATE | ||
| 832 | movups STATE, (OUTP) | ||
| 833 | sub $16, LEN | ||
| 834 | add $16, INP | ||
| 835 | add $16, OUTP | ||
| 836 | cmp $16, LEN | ||
| 837 | jge .Lctr_enc_loop1 | ||
| 838 | .Lctr_enc_ret: | ||
| 839 | movups IV, (IVP) | ||
| 840 | .Lctr_enc_just_ret: | ||
| 841 | ret | ||
diff --git a/arch/x86/crypto/aesni-intel_glue.c b/arch/x86/crypto/aesni-intel_glue.c index 49c552c060e9..2cb3dcc4490a 100644 --- a/arch/x86/crypto/aesni-intel_glue.c +++ b/arch/x86/crypto/aesni-intel_glue.c | |||
| @@ -18,6 +18,7 @@ | |||
| 18 | #include <crypto/algapi.h> | 18 | #include <crypto/algapi.h> |
| 19 | #include <crypto/aes.h> | 19 | #include <crypto/aes.h> |
| 20 | #include <crypto/cryptd.h> | 20 | #include <crypto/cryptd.h> |
| 21 | #include <crypto/ctr.h> | ||
| 21 | #include <asm/i387.h> | 22 | #include <asm/i387.h> |
| 22 | #include <asm/aes.h> | 23 | #include <asm/aes.h> |
| 23 | 24 | ||
| @@ -58,6 +59,8 @@ asmlinkage void aesni_cbc_enc(struct crypto_aes_ctx *ctx, u8 *out, | |||
| 58 | const u8 *in, unsigned int len, u8 *iv); | 59 | const u8 *in, unsigned int len, u8 *iv); |
| 59 | asmlinkage void aesni_cbc_dec(struct crypto_aes_ctx *ctx, u8 *out, | 60 | asmlinkage void aesni_cbc_dec(struct crypto_aes_ctx *ctx, u8 *out, |
| 60 | const u8 *in, unsigned int len, u8 *iv); | 61 | const u8 *in, unsigned int len, u8 *iv); |
| 62 | asmlinkage void aesni_ctr_enc(struct crypto_aes_ctx *ctx, u8 *out, | ||
| 63 | const u8 *in, unsigned int len, u8 *iv); | ||
| 61 | 64 | ||
| 62 | static inline struct crypto_aes_ctx *aes_ctx(void *raw_ctx) | 65 | static inline struct crypto_aes_ctx *aes_ctx(void *raw_ctx) |
| 63 | { | 66 | { |
| @@ -321,6 +324,72 @@ static struct crypto_alg blk_cbc_alg = { | |||
| 321 | }, | 324 | }, |
| 322 | }; | 325 | }; |
| 323 | 326 | ||
| 327 | static void ctr_crypt_final(struct crypto_aes_ctx *ctx, | ||
| 328 | struct blkcipher_walk *walk) | ||
| 329 | { | ||
| 330 | u8 *ctrblk = walk->iv; | ||
| 331 | u8 keystream[AES_BLOCK_SIZE]; | ||
| 332 | u8 *src = walk->src.virt.addr; | ||
| 333 | u8 *dst = walk->dst.virt.addr; | ||
| 334 | unsigned int nbytes = walk->nbytes; | ||
| 335 | |||
| 336 | aesni_enc(ctx, keystream, ctrblk); | ||
| 337 | crypto_xor(keystream, src, nbytes); | ||
| 338 | memcpy(dst, keystream, nbytes); | ||
| 339 | crypto_inc(ctrblk, AES_BLOCK_SIZE); | ||
| 340 | } | ||
| 341 | |||
| 342 | static int ctr_crypt(struct blkcipher_desc *desc, | ||
| 343 | struct scatterlist *dst, struct scatterlist *src, | ||
| 344 | unsigned int nbytes) | ||
| 345 | { | ||
| 346 | struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm)); | ||
| 347 | struct blkcipher_walk walk; | ||
| 348 | int err; | ||
| 349 | |||
| 350 | blkcipher_walk_init(&walk, dst, src, nbytes); | ||
| 351 | err = blkcipher_walk_virt_block(desc, &walk, AES_BLOCK_SIZE); | ||
| 352 | desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP; | ||
| 353 | |||
| 354 | kernel_fpu_begin(); | ||
| 355 | while ((nbytes = walk.nbytes) >= AES_BLOCK_SIZE) { | ||
| 356 | aesni_ctr_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr, | ||
| 357 | nbytes & AES_BLOCK_MASK, walk.iv); | ||
| 358 | nbytes &= AES_BLOCK_SIZE - 1; | ||
| 359 | err = blkcipher_walk_done(desc, &walk, nbytes); | ||
| 360 | } | ||
| 361 | if (walk.nbytes) { | ||
| 362 | ctr_crypt_final(ctx, &walk); | ||
| 363 | err = blkcipher_walk_done(desc, &walk, 0); | ||
| 364 | } | ||
| 365 | kernel_fpu_end(); | ||
| 366 | |||
| 367 | return err; | ||
| 368 | } | ||
| 369 | |||
| 370 | static struct crypto_alg blk_ctr_alg = { | ||
| 371 | .cra_name = "__ctr-aes-aesni", | ||
| 372 | .cra_driver_name = "__driver-ctr-aes-aesni", | ||
| 373 | .cra_priority = 0, | ||
| 374 | .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER, | ||
| 375 | .cra_blocksize = 1, | ||
| 376 | .cra_ctxsize = sizeof(struct crypto_aes_ctx)+AESNI_ALIGN-1, | ||
| 377 | .cra_alignmask = 0, | ||
| 378 | .cra_type = &crypto_blkcipher_type, | ||
| 379 | .cra_module = THIS_MODULE, | ||
| 380 | .cra_list = LIST_HEAD_INIT(blk_ctr_alg.cra_list), | ||
| 381 | .cra_u = { | ||
| 382 | .blkcipher = { | ||
| 383 | .min_keysize = AES_MIN_KEY_SIZE, | ||
| 384 | .max_keysize = AES_MAX_KEY_SIZE, | ||
| 385 | .ivsize = AES_BLOCK_SIZE, | ||
| 386 | .setkey = aes_set_key, | ||
| 387 | .encrypt = ctr_crypt, | ||
| 388 | .decrypt = ctr_crypt, | ||
| 389 | }, | ||
| 390 | }, | ||
| 391 | }; | ||
| 392 | |||
| 324 | static int ablk_set_key(struct crypto_ablkcipher *tfm, const u8 *key, | 393 | static int ablk_set_key(struct crypto_ablkcipher *tfm, const u8 *key, |
| 325 | unsigned int key_len) | 394 | unsigned int key_len) |
| 326 | { | 395 | { |
| @@ -467,13 +536,11 @@ static struct crypto_alg ablk_cbc_alg = { | |||
| 467 | }, | 536 | }, |
| 468 | }; | 537 | }; |
| 469 | 538 | ||
| 470 | #ifdef HAS_CTR | ||
| 471 | static int ablk_ctr_init(struct crypto_tfm *tfm) | 539 | static int ablk_ctr_init(struct crypto_tfm *tfm) |
| 472 | { | 540 | { |
| 473 | struct cryptd_ablkcipher *cryptd_tfm; | 541 | struct cryptd_ablkcipher *cryptd_tfm; |
| 474 | 542 | ||
| 475 | cryptd_tfm = cryptd_alloc_ablkcipher("fpu(ctr(__driver-aes-aesni))", | 543 | cryptd_tfm = cryptd_alloc_ablkcipher("__driver-ctr-aes-aesni", 0, 0); |
| 476 | 0, 0); | ||
| 477 | if (IS_ERR(cryptd_tfm)) | 544 | if (IS_ERR(cryptd_tfm)) |
| 478 | return PTR_ERR(cryptd_tfm); | 545 | return PTR_ERR(cryptd_tfm); |
| 479 | ablk_init_common(tfm, cryptd_tfm); | 546 | ablk_init_common(tfm, cryptd_tfm); |
| @@ -500,11 +567,50 @@ static struct crypto_alg ablk_ctr_alg = { | |||
| 500 | .ivsize = AES_BLOCK_SIZE, | 567 | .ivsize = AES_BLOCK_SIZE, |
| 501 | .setkey = ablk_set_key, | 568 | .setkey = ablk_set_key, |
| 502 | .encrypt = ablk_encrypt, | 569 | .encrypt = ablk_encrypt, |
| 503 | .decrypt = ablk_decrypt, | 570 | .decrypt = ablk_encrypt, |
| 504 | .geniv = "chainiv", | 571 | .geniv = "chainiv", |
| 505 | }, | 572 | }, |
| 506 | }, | 573 | }, |
| 507 | }; | 574 | }; |
| 575 | |||
| 576 | #ifdef HAS_CTR | ||
| 577 | static int ablk_rfc3686_ctr_init(struct crypto_tfm *tfm) | ||
| 578 | { | ||
| 579 | struct cryptd_ablkcipher *cryptd_tfm; | ||
| 580 | |||
| 581 | cryptd_tfm = cryptd_alloc_ablkcipher( | ||
| 582 | "rfc3686(__driver-ctr-aes-aesni)", 0, 0); | ||
| 583 | if (IS_ERR(cryptd_tfm)) | ||
| 584 | return PTR_ERR(cryptd_tfm); | ||
| 585 | ablk_init_common(tfm, cryptd_tfm); | ||
| 586 | return 0; | ||
| 587 | } | ||
| 588 | |||
| 589 | static struct crypto_alg ablk_rfc3686_ctr_alg = { | ||
| 590 | .cra_name = "rfc3686(ctr(aes))", | ||
| 591 | .cra_driver_name = "rfc3686-ctr-aes-aesni", | ||
| 592 | .cra_priority = 400, | ||
| 593 | .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC, | ||
| 594 | .cra_blocksize = 1, | ||
| 595 | .cra_ctxsize = sizeof(struct async_aes_ctx), | ||
| 596 | .cra_alignmask = 0, | ||
| 597 | .cra_type = &crypto_ablkcipher_type, | ||
| 598 | .cra_module = THIS_MODULE, | ||
| 599 | .cra_list = LIST_HEAD_INIT(ablk_rfc3686_ctr_alg.cra_list), | ||
| 600 | .cra_init = ablk_rfc3686_ctr_init, | ||
| 601 | .cra_exit = ablk_exit, | ||
| 602 | .cra_u = { | ||
| 603 | .ablkcipher = { | ||
| 604 | .min_keysize = AES_MIN_KEY_SIZE+CTR_RFC3686_NONCE_SIZE, | ||
| 605 | .max_keysize = AES_MAX_KEY_SIZE+CTR_RFC3686_NONCE_SIZE, | ||
| 606 | .ivsize = CTR_RFC3686_IV_SIZE, | ||
| 607 | .setkey = ablk_set_key, | ||
| 608 | .encrypt = ablk_encrypt, | ||
| 609 | .decrypt = ablk_decrypt, | ||
| 610 | .geniv = "seqiv", | ||
| 611 | }, | ||
| 612 | }, | ||
| 613 | }; | ||
| 508 | #endif | 614 | #endif |
| 509 | 615 | ||
| 510 | #ifdef HAS_LRW | 616 | #ifdef HAS_LRW |
| @@ -640,13 +746,17 @@ static int __init aesni_init(void) | |||
| 640 | goto blk_ecb_err; | 746 | goto blk_ecb_err; |
| 641 | if ((err = crypto_register_alg(&blk_cbc_alg))) | 747 | if ((err = crypto_register_alg(&blk_cbc_alg))) |
| 642 | goto blk_cbc_err; | 748 | goto blk_cbc_err; |
| 749 | if ((err = crypto_register_alg(&blk_ctr_alg))) | ||
| 750 | goto blk_ctr_err; | ||
| 643 | if ((err = crypto_register_alg(&ablk_ecb_alg))) | 751 | if ((err = crypto_register_alg(&ablk_ecb_alg))) |
| 644 | goto ablk_ecb_err; | 752 | goto ablk_ecb_err; |
| 645 | if ((err = crypto_register_alg(&ablk_cbc_alg))) | 753 | if ((err = crypto_register_alg(&ablk_cbc_alg))) |
| 646 | goto ablk_cbc_err; | 754 | goto ablk_cbc_err; |
| 647 | #ifdef HAS_CTR | ||
| 648 | if ((err = crypto_register_alg(&ablk_ctr_alg))) | 755 | if ((err = crypto_register_alg(&ablk_ctr_alg))) |
| 649 | goto ablk_ctr_err; | 756 | goto ablk_ctr_err; |
| 757 | #ifdef HAS_CTR | ||
| 758 | if ((err = crypto_register_alg(&ablk_rfc3686_ctr_alg))) | ||
| 759 | goto ablk_rfc3686_ctr_err; | ||
| 650 | #endif | 760 | #endif |
| 651 | #ifdef HAS_LRW | 761 | #ifdef HAS_LRW |
| 652 | if ((err = crypto_register_alg(&ablk_lrw_alg))) | 762 | if ((err = crypto_register_alg(&ablk_lrw_alg))) |
| @@ -675,13 +785,17 @@ ablk_pcbc_err: | |||
| 675 | ablk_lrw_err: | 785 | ablk_lrw_err: |
| 676 | #endif | 786 | #endif |
| 677 | #ifdef HAS_CTR | 787 | #ifdef HAS_CTR |
| 788 | crypto_unregister_alg(&ablk_rfc3686_ctr_alg); | ||
| 789 | ablk_rfc3686_ctr_err: | ||
| 790 | #endif | ||
| 678 | crypto_unregister_alg(&ablk_ctr_alg); | 791 | crypto_unregister_alg(&ablk_ctr_alg); |
| 679 | ablk_ctr_err: | 792 | ablk_ctr_err: |
| 680 | #endif | ||
| 681 | crypto_unregister_alg(&ablk_cbc_alg); | 793 | crypto_unregister_alg(&ablk_cbc_alg); |
| 682 | ablk_cbc_err: | 794 | ablk_cbc_err: |
| 683 | crypto_unregister_alg(&ablk_ecb_alg); | 795 | crypto_unregister_alg(&ablk_ecb_alg); |
| 684 | ablk_ecb_err: | 796 | ablk_ecb_err: |
| 797 | crypto_unregister_alg(&blk_ctr_alg); | ||
| 798 | blk_ctr_err: | ||
| 685 | crypto_unregister_alg(&blk_cbc_alg); | 799 | crypto_unregister_alg(&blk_cbc_alg); |
| 686 | blk_cbc_err: | 800 | blk_cbc_err: |
| 687 | crypto_unregister_alg(&blk_ecb_alg); | 801 | crypto_unregister_alg(&blk_ecb_alg); |
| @@ -705,10 +819,12 @@ static void __exit aesni_exit(void) | |||
| 705 | crypto_unregister_alg(&ablk_lrw_alg); | 819 | crypto_unregister_alg(&ablk_lrw_alg); |
| 706 | #endif | 820 | #endif |
| 707 | #ifdef HAS_CTR | 821 | #ifdef HAS_CTR |
| 708 | crypto_unregister_alg(&ablk_ctr_alg); | 822 | crypto_unregister_alg(&ablk_rfc3686_ctr_alg); |
| 709 | #endif | 823 | #endif |
| 824 | crypto_unregister_alg(&ablk_ctr_alg); | ||
| 710 | crypto_unregister_alg(&ablk_cbc_alg); | 825 | crypto_unregister_alg(&ablk_cbc_alg); |
| 711 | crypto_unregister_alg(&ablk_ecb_alg); | 826 | crypto_unregister_alg(&ablk_ecb_alg); |
| 827 | crypto_unregister_alg(&blk_ctr_alg); | ||
| 712 | crypto_unregister_alg(&blk_cbc_alg); | 828 | crypto_unregister_alg(&blk_cbc_alg); |
| 713 | crypto_unregister_alg(&blk_ecb_alg); | 829 | crypto_unregister_alg(&blk_ecb_alg); |
| 714 | crypto_unregister_alg(&__aesni_alg); | 830 | crypto_unregister_alg(&__aesni_alg); |
diff --git a/arch/x86/include/asm/acpi.h b/arch/x86/include/asm/acpi.h index 56f462cf22d2..aa2c39d968fc 100644 --- a/arch/x86/include/asm/acpi.h +++ b/arch/x86/include/asm/acpi.h | |||
| @@ -85,7 +85,6 @@ extern int acpi_ioapic; | |||
| 85 | extern int acpi_noirq; | 85 | extern int acpi_noirq; |
| 86 | extern int acpi_strict; | 86 | extern int acpi_strict; |
| 87 | extern int acpi_disabled; | 87 | extern int acpi_disabled; |
| 88 | extern int acpi_ht; | ||
| 89 | extern int acpi_pci_disabled; | 88 | extern int acpi_pci_disabled; |
| 90 | extern int acpi_skip_timer_override; | 89 | extern int acpi_skip_timer_override; |
| 91 | extern int acpi_use_timer_override; | 90 | extern int acpi_use_timer_override; |
| @@ -97,7 +96,6 @@ void acpi_pic_sci_set_trigger(unsigned int, u16); | |||
| 97 | static inline void disable_acpi(void) | 96 | static inline void disable_acpi(void) |
| 98 | { | 97 | { |
| 99 | acpi_disabled = 1; | 98 | acpi_disabled = 1; |
| 100 | acpi_ht = 0; | ||
| 101 | acpi_pci_disabled = 1; | 99 | acpi_pci_disabled = 1; |
| 102 | acpi_noirq = 1; | 100 | acpi_noirq = 1; |
| 103 | } | 101 | } |
diff --git a/arch/x86/include/asm/cache.h b/arch/x86/include/asm/cache.h index 2f9047cfaaca..48f99f15452e 100644 --- a/arch/x86/include/asm/cache.h +++ b/arch/x86/include/asm/cache.h | |||
| @@ -7,7 +7,7 @@ | |||
| 7 | #define L1_CACHE_SHIFT (CONFIG_X86_L1_CACHE_SHIFT) | 7 | #define L1_CACHE_SHIFT (CONFIG_X86_L1_CACHE_SHIFT) |
| 8 | #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) | 8 | #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) |
| 9 | 9 | ||
| 10 | #define __read_mostly __attribute__((__section__(".data.read_mostly"))) | 10 | #define __read_mostly __attribute__((__section__(".data..read_mostly"))) |
| 11 | 11 | ||
| 12 | #define INTERNODE_CACHE_SHIFT CONFIG_X86_INTERNODE_CACHE_SHIFT | 12 | #define INTERNODE_CACHE_SHIFT CONFIG_X86_INTERNODE_CACHE_SHIFT |
| 13 | #define INTERNODE_CACHE_BYTES (1 << INTERNODE_CACHE_SHIFT) | 13 | #define INTERNODE_CACHE_BYTES (1 << INTERNODE_CACHE_SHIFT) |
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h index dca9c545f44e..468145914389 100644 --- a/arch/x86/include/asm/cpufeature.h +++ b/arch/x86/include/asm/cpufeature.h | |||
| @@ -332,6 +332,7 @@ static __always_inline __pure bool __static_cpu_has(u8 bit) | |||
| 332 | #endif | 332 | #endif |
| 333 | } | 333 | } |
| 334 | 334 | ||
| 335 | #if __GNUC__ >= 4 | ||
| 335 | #define static_cpu_has(bit) \ | 336 | #define static_cpu_has(bit) \ |
| 336 | ( \ | 337 | ( \ |
| 337 | __builtin_constant_p(boot_cpu_has(bit)) ? \ | 338 | __builtin_constant_p(boot_cpu_has(bit)) ? \ |
| @@ -340,6 +341,12 @@ static __always_inline __pure bool __static_cpu_has(u8 bit) | |||
| 340 | __static_cpu_has(bit) : \ | 341 | __static_cpu_has(bit) : \ |
| 341 | boot_cpu_has(bit) \ | 342 | boot_cpu_has(bit) \ |
| 342 | ) | 343 | ) |
| 344 | #else | ||
| 345 | /* | ||
| 346 | * gcc 3.x is too stupid to do the static test; fall back to dynamic. | ||
| 347 | */ | ||
| 348 | #define static_cpu_has(bit) boot_cpu_has(bit) | ||
| 349 | #endif | ||
| 343 | 350 | ||
| 344 | #endif /* defined(__KERNEL__) && !defined(__ASSEMBLY__) */ | 351 | #endif /* defined(__KERNEL__) && !defined(__ASSEMBLY__) */ |
| 345 | 352 | ||
diff --git a/arch/x86/include/asm/inst.h b/arch/x86/include/asm/inst.h index 14cf526091f9..280bf7fb6aba 100644 --- a/arch/x86/include/asm/inst.h +++ b/arch/x86/include/asm/inst.h | |||
| @@ -7,7 +7,66 @@ | |||
| 7 | 7 | ||
| 8 | #ifdef __ASSEMBLY__ | 8 | #ifdef __ASSEMBLY__ |
| 9 | 9 | ||
| 10 | #define REG_NUM_INVALID 100 | ||
| 11 | |||
| 12 | #define REG_TYPE_R64 0 | ||
| 13 | #define REG_TYPE_XMM 1 | ||
| 14 | #define REG_TYPE_INVALID 100 | ||
| 15 | |||
| 16 | .macro R64_NUM opd r64 | ||
| 17 | \opd = REG_NUM_INVALID | ||
| 18 | .ifc \r64,%rax | ||
| 19 | \opd = 0 | ||
| 20 | .endif | ||
| 21 | .ifc \r64,%rcx | ||
| 22 | \opd = 1 | ||
| 23 | .endif | ||
| 24 | .ifc \r64,%rdx | ||
| 25 | \opd = 2 | ||
| 26 | .endif | ||
| 27 | .ifc \r64,%rbx | ||
| 28 | \opd = 3 | ||
| 29 | .endif | ||
| 30 | .ifc \r64,%rsp | ||
| 31 | \opd = 4 | ||
| 32 | .endif | ||
| 33 | .ifc \r64,%rbp | ||
| 34 | \opd = 5 | ||
| 35 | .endif | ||
| 36 | .ifc \r64,%rsi | ||
| 37 | \opd = 6 | ||
| 38 | .endif | ||
| 39 | .ifc \r64,%rdi | ||
| 40 | \opd = 7 | ||
| 41 | .endif | ||
| 42 | .ifc \r64,%r8 | ||
| 43 | \opd = 8 | ||
| 44 | .endif | ||
| 45 | .ifc \r64,%r9 | ||
| 46 | \opd = 9 | ||
| 47 | .endif | ||
| 48 | .ifc \r64,%r10 | ||
| 49 | \opd = 10 | ||
| 50 | .endif | ||
| 51 | .ifc \r64,%r11 | ||
| 52 | \opd = 11 | ||
| 53 | .endif | ||
| 54 | .ifc \r64,%r12 | ||
| 55 | \opd = 12 | ||
| 56 | .endif | ||
| 57 | .ifc \r64,%r13 | ||
| 58 | \opd = 13 | ||
| 59 | .endif | ||
| 60 | .ifc \r64,%r14 | ||
| 61 | \opd = 14 | ||
| 62 | .endif | ||
| 63 | .ifc \r64,%r15 | ||
| 64 | \opd = 15 | ||
| 65 | .endif | ||
| 66 | .endm | ||
| 67 | |||
| 10 | .macro XMM_NUM opd xmm | 68 | .macro XMM_NUM opd xmm |
| 69 | \opd = REG_NUM_INVALID | ||
| 11 | .ifc \xmm,%xmm0 | 70 | .ifc \xmm,%xmm0 |
| 12 | \opd = 0 | 71 | \opd = 0 |
| 13 | .endif | 72 | .endif |
| @@ -58,13 +117,25 @@ | |||
| 58 | .endif | 117 | .endif |
| 59 | .endm | 118 | .endm |
| 60 | 119 | ||
| 120 | .macro REG_TYPE type reg | ||
| 121 | R64_NUM reg_type_r64 \reg | ||
| 122 | XMM_NUM reg_type_xmm \reg | ||
| 123 | .if reg_type_r64 <> REG_NUM_INVALID | ||
| 124 | \type = REG_TYPE_R64 | ||
| 125 | .elseif reg_type_xmm <> REG_NUM_INVALID | ||
| 126 | \type = REG_TYPE_XMM | ||
| 127 | .else | ||
| 128 | \type = REG_TYPE_INVALID | ||
| 129 | .endif | ||
| 130 | .endm | ||
| 131 | |||
| 61 | .macro PFX_OPD_SIZE | 132 | .macro PFX_OPD_SIZE |
| 62 | .byte 0x66 | 133 | .byte 0x66 |
| 63 | .endm | 134 | .endm |
| 64 | 135 | ||
| 65 | .macro PFX_REX opd1 opd2 | 136 | .macro PFX_REX opd1 opd2 W=0 |
| 66 | .if (\opd1 | \opd2) & 8 | 137 | .if ((\opd1 | \opd2) & 8) || \W |
| 67 | .byte 0x40 | ((\opd1 & 8) >> 3) | ((\opd2 & 8) >> 1) | 138 | .byte 0x40 | ((\opd1 & 8) >> 3) | ((\opd2 & 8) >> 1) | (\W << 3) |
| 68 | .endif | 139 | .endif |
| 69 | .endm | 140 | .endm |
| 70 | 141 | ||
| @@ -145,6 +216,25 @@ | |||
| 145 | .byte 0x0f, 0x38, 0xdf | 216 | .byte 0x0f, 0x38, 0xdf |
| 146 | MODRM 0xc0 aesdeclast_opd1 aesdeclast_opd2 | 217 | MODRM 0xc0 aesdeclast_opd1 aesdeclast_opd2 |
| 147 | .endm | 218 | .endm |
| 219 | |||
| 220 | .macro MOVQ_R64_XMM opd1 opd2 | ||
| 221 | REG_TYPE movq_r64_xmm_opd1_type \opd1 | ||
| 222 | .if movq_r64_xmm_opd1_type == REG_TYPE_XMM | ||
| 223 | XMM_NUM movq_r64_xmm_opd1 \opd1 | ||
| 224 | R64_NUM movq_r64_xmm_opd2 \opd2 | ||
| 225 | .else | ||
| 226 | R64_NUM movq_r64_xmm_opd1 \opd1 | ||
| 227 | XMM_NUM movq_r64_xmm_opd2 \opd2 | ||
| 228 | .endif | ||
| 229 | PFX_OPD_SIZE | ||
| 230 | PFX_REX movq_r64_xmm_opd1 movq_r64_xmm_opd2 1 | ||
| 231 | .if movq_r64_xmm_opd1_type == REG_TYPE_XMM | ||
| 232 | .byte 0x0f, 0x7e | ||
| 233 | .else | ||
| 234 | .byte 0x0f, 0x6e | ||
| 235 | .endif | ||
| 236 | MODRM 0xc0 movq_r64_xmm_opd1 movq_r64_xmm_opd2 | ||
| 237 | .endm | ||
| 148 | #endif | 238 | #endif |
| 149 | 239 | ||
| 150 | #endif | 240 | #endif |
diff --git a/arch/x86/include/asm/intel_scu_ipc.h b/arch/x86/include/asm/intel_scu_ipc.h new file mode 100644 index 000000000000..4470c9ad4a3e --- /dev/null +++ b/arch/x86/include/asm/intel_scu_ipc.h | |||
| @@ -0,0 +1,55 @@ | |||
| 1 | #ifndef _ASM_X86_INTEL_SCU_IPC_H_ | ||
| 2 | #define _ASM_X86_INTEL_SCU_IPC_H_ | ||
| 3 | |||
| 4 | /* Read single register */ | ||
| 5 | int intel_scu_ipc_ioread8(u16 addr, u8 *data); | ||
| 6 | |||
| 7 | /* Read two sequential registers */ | ||
| 8 | int intel_scu_ipc_ioread16(u16 addr, u16 *data); | ||
| 9 | |||
| 10 | /* Read four sequential registers */ | ||
| 11 | int intel_scu_ipc_ioread32(u16 addr, u32 *data); | ||
| 12 | |||
| 13 | /* Read a vector */ | ||
| 14 | int intel_scu_ipc_readv(u16 *addr, u8 *data, int len); | ||
| 15 | |||
| 16 | /* Write single register */ | ||
| 17 | int intel_scu_ipc_iowrite8(u16 addr, u8 data); | ||
| 18 | |||
| 19 | /* Write two sequential registers */ | ||
| 20 | int intel_scu_ipc_iowrite16(u16 addr, u16 data); | ||
| 21 | |||
| 22 | /* Write four sequential registers */ | ||
| 23 | int intel_scu_ipc_iowrite32(u16 addr, u32 data); | ||
| 24 | |||
| 25 | /* Write a vector */ | ||
| 26 | int intel_scu_ipc_writev(u16 *addr, u8 *data, int len); | ||
| 27 | |||
| 28 | /* Update single register based on the mask */ | ||
| 29 | int intel_scu_ipc_update_register(u16 addr, u8 data, u8 mask); | ||
| 30 | |||
| 31 | /* | ||
| 32 | * Indirect register read | ||
| 33 | * Can be used when SCCB(System Controller Configuration Block) register | ||
| 34 | * HRIM(Honor Restricted IPC Messages) is set (bit 23) | ||
| 35 | */ | ||
| 36 | int intel_scu_ipc_register_read(u32 addr, u32 *data); | ||
| 37 | |||
| 38 | /* | ||
| 39 | * Indirect register write | ||
| 40 | * Can be used when SCCB(System Controller Configuration Block) register | ||
| 41 | * HRIM(Honor Restricted IPC Messages) is set (bit 23) | ||
| 42 | */ | ||
| 43 | int intel_scu_ipc_register_write(u32 addr, u32 data); | ||
| 44 | |||
| 45 | /* Issue commands to the SCU with or without data */ | ||
| 46 | int intel_scu_ipc_simple_command(int cmd, int sub); | ||
| 47 | int intel_scu_ipc_command(int cmd, int sub, u32 *in, int inlen, | ||
| 48 | u32 *out, int outlen); | ||
| 49 | /* I2C control api */ | ||
| 50 | int intel_scu_ipc_i2c_cntrl(u32 addr, u32 *data); | ||
| 51 | |||
| 52 | /* Update FW version */ | ||
| 53 | int intel_scu_ipc_fw_update(u8 *buffer, u32 length); | ||
| 54 | |||
| 55 | #endif | ||
diff --git a/arch/x86/include/asm/kvm.h b/arch/x86/include/asm/kvm.h index f46b79f6c16c..ff90055c7f0b 100644 --- a/arch/x86/include/asm/kvm.h +++ b/arch/x86/include/asm/kvm.h | |||
| @@ -21,6 +21,7 @@ | |||
| 21 | #define __KVM_HAVE_PIT_STATE2 | 21 | #define __KVM_HAVE_PIT_STATE2 |
| 22 | #define __KVM_HAVE_XEN_HVM | 22 | #define __KVM_HAVE_XEN_HVM |
| 23 | #define __KVM_HAVE_VCPU_EVENTS | 23 | #define __KVM_HAVE_VCPU_EVENTS |
| 24 | #define __KVM_HAVE_DEBUGREGS | ||
| 24 | 25 | ||
| 25 | /* Architectural interrupt line count. */ | 26 | /* Architectural interrupt line count. */ |
| 26 | #define KVM_NR_INTERRUPTS 256 | 27 | #define KVM_NR_INTERRUPTS 256 |
| @@ -257,6 +258,11 @@ struct kvm_reinject_control { | |||
| 257 | /* When set in flags, include corresponding fields on KVM_SET_VCPU_EVENTS */ | 258 | /* When set in flags, include corresponding fields on KVM_SET_VCPU_EVENTS */ |
| 258 | #define KVM_VCPUEVENT_VALID_NMI_PENDING 0x00000001 | 259 | #define KVM_VCPUEVENT_VALID_NMI_PENDING 0x00000001 |
| 259 | #define KVM_VCPUEVENT_VALID_SIPI_VECTOR 0x00000002 | 260 | #define KVM_VCPUEVENT_VALID_SIPI_VECTOR 0x00000002 |
| 261 | #define KVM_VCPUEVENT_VALID_SHADOW 0x00000004 | ||
| 262 | |||
| 263 | /* Interrupt shadow states */ | ||
| 264 | #define KVM_X86_SHADOW_INT_MOV_SS 0x01 | ||
| 265 | #define KVM_X86_SHADOW_INT_STI 0x02 | ||
| 260 | 266 | ||
| 261 | /* for KVM_GET/SET_VCPU_EVENTS */ | 267 | /* for KVM_GET/SET_VCPU_EVENTS */ |
| 262 | struct kvm_vcpu_events { | 268 | struct kvm_vcpu_events { |
| @@ -271,7 +277,7 @@ struct kvm_vcpu_events { | |||
| 271 | __u8 injected; | 277 | __u8 injected; |
| 272 | __u8 nr; | 278 | __u8 nr; |
| 273 | __u8 soft; | 279 | __u8 soft; |
| 274 | __u8 pad; | 280 | __u8 shadow; |
| 275 | } interrupt; | 281 | } interrupt; |
| 276 | struct { | 282 | struct { |
| 277 | __u8 injected; | 283 | __u8 injected; |
| @@ -284,4 +290,13 @@ struct kvm_vcpu_events { | |||
| 284 | __u32 reserved[10]; | 290 | __u32 reserved[10]; |
| 285 | }; | 291 | }; |
| 286 | 292 | ||
| 293 | /* for KVM_GET/SET_DEBUGREGS */ | ||
| 294 | struct kvm_debugregs { | ||
| 295 | __u64 db[4]; | ||
| 296 | __u64 dr6; | ||
| 297 | __u64 dr7; | ||
| 298 | __u64 flags; | ||
| 299 | __u64 reserved[9]; | ||
| 300 | }; | ||
| 301 | |||
| 287 | #endif /* _ASM_X86_KVM_H */ | 302 | #endif /* _ASM_X86_KVM_H */ |
diff --git a/arch/x86/include/asm/kvm_emulate.h b/arch/x86/include/asm/kvm_emulate.h index 7a6f54fa13ba..0b2729bf2070 100644 --- a/arch/x86/include/asm/kvm_emulate.h +++ b/arch/x86/include/asm/kvm_emulate.h | |||
| @@ -11,6 +11,8 @@ | |||
| 11 | #ifndef _ASM_X86_KVM_X86_EMULATE_H | 11 | #ifndef _ASM_X86_KVM_X86_EMULATE_H |
| 12 | #define _ASM_X86_KVM_X86_EMULATE_H | 12 | #define _ASM_X86_KVM_X86_EMULATE_H |
| 13 | 13 | ||
| 14 | #include <asm/desc_defs.h> | ||
| 15 | |||
| 14 | struct x86_emulate_ctxt; | 16 | struct x86_emulate_ctxt; |
| 15 | 17 | ||
| 16 | /* | 18 | /* |
| @@ -63,6 +65,15 @@ struct x86_emulate_ops { | |||
| 63 | unsigned int bytes, struct kvm_vcpu *vcpu, u32 *error); | 65 | unsigned int bytes, struct kvm_vcpu *vcpu, u32 *error); |
| 64 | 66 | ||
| 65 | /* | 67 | /* |
| 68 | * write_std: Write bytes of standard (non-emulated/special) memory. | ||
| 69 | * Used for descriptor writing. | ||
| 70 | * @addr: [IN ] Linear address to which to write. | ||
| 71 | * @val: [OUT] Value write to memory, zero-extended to 'u_long'. | ||
| 72 | * @bytes: [IN ] Number of bytes to write to memory. | ||
| 73 | */ | ||
| 74 | int (*write_std)(unsigned long addr, void *val, | ||
| 75 | unsigned int bytes, struct kvm_vcpu *vcpu, u32 *error); | ||
| 76 | /* | ||
| 66 | * fetch: Read bytes of standard (non-emulated/special) memory. | 77 | * fetch: Read bytes of standard (non-emulated/special) memory. |
| 67 | * Used for instruction fetch. | 78 | * Used for instruction fetch. |
| 68 | * @addr: [IN ] Linear address from which to read. | 79 | * @addr: [IN ] Linear address from which to read. |
| @@ -109,6 +120,23 @@ struct x86_emulate_ops { | |||
| 109 | unsigned int bytes, | 120 | unsigned int bytes, |
| 110 | struct kvm_vcpu *vcpu); | 121 | struct kvm_vcpu *vcpu); |
| 111 | 122 | ||
| 123 | int (*pio_in_emulated)(int size, unsigned short port, void *val, | ||
| 124 | unsigned int count, struct kvm_vcpu *vcpu); | ||
| 125 | |||
| 126 | int (*pio_out_emulated)(int size, unsigned short port, const void *val, | ||
| 127 | unsigned int count, struct kvm_vcpu *vcpu); | ||
| 128 | |||
| 129 | bool (*get_cached_descriptor)(struct desc_struct *desc, | ||
| 130 | int seg, struct kvm_vcpu *vcpu); | ||
| 131 | void (*set_cached_descriptor)(struct desc_struct *desc, | ||
| 132 | int seg, struct kvm_vcpu *vcpu); | ||
| 133 | u16 (*get_segment_selector)(int seg, struct kvm_vcpu *vcpu); | ||
| 134 | void (*set_segment_selector)(u16 sel, int seg, struct kvm_vcpu *vcpu); | ||
| 135 | void (*get_gdt)(struct desc_ptr *dt, struct kvm_vcpu *vcpu); | ||
| 136 | ulong (*get_cr)(int cr, struct kvm_vcpu *vcpu); | ||
| 137 | void (*set_cr)(int cr, ulong val, struct kvm_vcpu *vcpu); | ||
| 138 | int (*cpl)(struct kvm_vcpu *vcpu); | ||
| 139 | void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); | ||
| 112 | }; | 140 | }; |
| 113 | 141 | ||
| 114 | /* Type, address-of, and value of an instruction's operand. */ | 142 | /* Type, address-of, and value of an instruction's operand. */ |
| @@ -124,6 +152,12 @@ struct fetch_cache { | |||
| 124 | unsigned long end; | 152 | unsigned long end; |
| 125 | }; | 153 | }; |
| 126 | 154 | ||
| 155 | struct read_cache { | ||
| 156 | u8 data[1024]; | ||
| 157 | unsigned long pos; | ||
| 158 | unsigned long end; | ||
| 159 | }; | ||
| 160 | |||
| 127 | struct decode_cache { | 161 | struct decode_cache { |
| 128 | u8 twobyte; | 162 | u8 twobyte; |
| 129 | u8 b; | 163 | u8 b; |
| @@ -139,7 +173,7 @@ struct decode_cache { | |||
| 139 | u8 seg_override; | 173 | u8 seg_override; |
| 140 | unsigned int d; | 174 | unsigned int d; |
| 141 | unsigned long regs[NR_VCPU_REGS]; | 175 | unsigned long regs[NR_VCPU_REGS]; |
| 142 | unsigned long eip, eip_orig; | 176 | unsigned long eip; |
| 143 | /* modrm */ | 177 | /* modrm */ |
| 144 | u8 modrm; | 178 | u8 modrm; |
| 145 | u8 modrm_mod; | 179 | u8 modrm_mod; |
| @@ -151,16 +185,15 @@ struct decode_cache { | |||
| 151 | void *modrm_ptr; | 185 | void *modrm_ptr; |
| 152 | unsigned long modrm_val; | 186 | unsigned long modrm_val; |
| 153 | struct fetch_cache fetch; | 187 | struct fetch_cache fetch; |
| 188 | struct read_cache io_read; | ||
| 154 | }; | 189 | }; |
| 155 | 190 | ||
| 156 | #define X86_SHADOW_INT_MOV_SS 1 | ||
| 157 | #define X86_SHADOW_INT_STI 2 | ||
| 158 | |||
| 159 | struct x86_emulate_ctxt { | 191 | struct x86_emulate_ctxt { |
| 160 | /* Register state before/after emulation. */ | 192 | /* Register state before/after emulation. */ |
| 161 | struct kvm_vcpu *vcpu; | 193 | struct kvm_vcpu *vcpu; |
| 162 | 194 | ||
| 163 | unsigned long eflags; | 195 | unsigned long eflags; |
| 196 | unsigned long eip; /* eip before instruction emulation */ | ||
| 164 | /* Emulated execution mode, represented by an X86EMUL_MODE value. */ | 197 | /* Emulated execution mode, represented by an X86EMUL_MODE value. */ |
| 165 | int mode; | 198 | int mode; |
| 166 | u32 cs_base; | 199 | u32 cs_base; |
| @@ -168,6 +201,7 @@ struct x86_emulate_ctxt { | |||
| 168 | /* interruptibility state, as a result of execution of STI or MOV SS */ | 201 | /* interruptibility state, as a result of execution of STI or MOV SS */ |
| 169 | int interruptibility; | 202 | int interruptibility; |
| 170 | 203 | ||
| 204 | bool restart; /* restart string instruction after writeback */ | ||
| 171 | /* decode cache */ | 205 | /* decode cache */ |
| 172 | struct decode_cache decode; | 206 | struct decode_cache decode; |
| 173 | }; | 207 | }; |
| @@ -194,5 +228,9 @@ int x86_decode_insn(struct x86_emulate_ctxt *ctxt, | |||
| 194 | struct x86_emulate_ops *ops); | 228 | struct x86_emulate_ops *ops); |
| 195 | int x86_emulate_insn(struct x86_emulate_ctxt *ctxt, | 229 | int x86_emulate_insn(struct x86_emulate_ctxt *ctxt, |
| 196 | struct x86_emulate_ops *ops); | 230 | struct x86_emulate_ops *ops); |
| 231 | int emulator_task_switch(struct x86_emulate_ctxt *ctxt, | ||
| 232 | struct x86_emulate_ops *ops, | ||
| 233 | u16 tss_selector, int reason, | ||
| 234 | bool has_error_code, u32 error_code); | ||
| 197 | 235 | ||
| 198 | #endif /* _ASM_X86_KVM_X86_EMULATE_H */ | 236 | #endif /* _ASM_X86_KVM_X86_EMULATE_H */ |
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h index 06d9e79ca37d..76f5483cffec 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h | |||
| @@ -171,15 +171,15 @@ struct kvm_pte_chain { | |||
| 171 | union kvm_mmu_page_role { | 171 | union kvm_mmu_page_role { |
| 172 | unsigned word; | 172 | unsigned word; |
| 173 | struct { | 173 | struct { |
| 174 | unsigned glevels:4; | ||
| 175 | unsigned level:4; | 174 | unsigned level:4; |
| 175 | unsigned cr4_pae:1; | ||
| 176 | unsigned quadrant:2; | 176 | unsigned quadrant:2; |
| 177 | unsigned pad_for_nice_hex_output:6; | 177 | unsigned pad_for_nice_hex_output:6; |
| 178 | unsigned direct:1; | 178 | unsigned direct:1; |
| 179 | unsigned access:3; | 179 | unsigned access:3; |
| 180 | unsigned invalid:1; | 180 | unsigned invalid:1; |
| 181 | unsigned cr4_pge:1; | ||
| 182 | unsigned nxe:1; | 181 | unsigned nxe:1; |
| 182 | unsigned cr0_wp:1; | ||
| 183 | }; | 183 | }; |
| 184 | }; | 184 | }; |
| 185 | 185 | ||
| @@ -187,8 +187,6 @@ struct kvm_mmu_page { | |||
| 187 | struct list_head link; | 187 | struct list_head link; |
| 188 | struct hlist_node hash_link; | 188 | struct hlist_node hash_link; |
| 189 | 189 | ||
| 190 | struct list_head oos_link; | ||
| 191 | |||
| 192 | /* | 190 | /* |
| 193 | * The following two entries are used to key the shadow page in the | 191 | * The following two entries are used to key the shadow page in the |
| 194 | * hash table. | 192 | * hash table. |
| @@ -204,9 +202,9 @@ struct kvm_mmu_page { | |||
| 204 | * in this shadow page. | 202 | * in this shadow page. |
| 205 | */ | 203 | */ |
| 206 | DECLARE_BITMAP(slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS); | 204 | DECLARE_BITMAP(slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS); |
| 207 | int multimapped; /* More than one parent_pte? */ | 205 | bool multimapped; /* More than one parent_pte? */ |
| 208 | int root_count; /* Currently serving as active root */ | ||
| 209 | bool unsync; | 206 | bool unsync; |
| 207 | int root_count; /* Currently serving as active root */ | ||
| 210 | unsigned int unsync_children; | 208 | unsigned int unsync_children; |
| 211 | union { | 209 | union { |
| 212 | u64 *parent_pte; /* !multimapped */ | 210 | u64 *parent_pte; /* !multimapped */ |
| @@ -224,14 +222,9 @@ struct kvm_pv_mmu_op_buffer { | |||
| 224 | 222 | ||
| 225 | struct kvm_pio_request { | 223 | struct kvm_pio_request { |
| 226 | unsigned long count; | 224 | unsigned long count; |
| 227 | int cur_count; | ||
| 228 | gva_t guest_gva; | ||
| 229 | int in; | 225 | int in; |
| 230 | int port; | 226 | int port; |
| 231 | int size; | 227 | int size; |
| 232 | int string; | ||
| 233 | int down; | ||
| 234 | int rep; | ||
| 235 | }; | 228 | }; |
| 236 | 229 | ||
| 237 | /* | 230 | /* |
| @@ -320,6 +313,7 @@ struct kvm_vcpu_arch { | |||
| 320 | struct kvm_queued_exception { | 313 | struct kvm_queued_exception { |
| 321 | bool pending; | 314 | bool pending; |
| 322 | bool has_error_code; | 315 | bool has_error_code; |
| 316 | bool reinject; | ||
| 323 | u8 nr; | 317 | u8 nr; |
| 324 | u32 error_code; | 318 | u32 error_code; |
| 325 | } exception; | 319 | } exception; |
| @@ -362,8 +356,8 @@ struct kvm_vcpu_arch { | |||
| 362 | u64 *mce_banks; | 356 | u64 *mce_banks; |
| 363 | 357 | ||
| 364 | /* used for guest single stepping over the given code position */ | 358 | /* used for guest single stepping over the given code position */ |
| 365 | u16 singlestep_cs; | ||
| 366 | unsigned long singlestep_rip; | 359 | unsigned long singlestep_rip; |
| 360 | |||
| 367 | /* fields used by HYPER-V emulation */ | 361 | /* fields used by HYPER-V emulation */ |
| 368 | u64 hv_vapic; | 362 | u64 hv_vapic; |
| 369 | }; | 363 | }; |
| @@ -389,6 +383,7 @@ struct kvm_arch { | |||
| 389 | unsigned int n_free_mmu_pages; | 383 | unsigned int n_free_mmu_pages; |
| 390 | unsigned int n_requested_mmu_pages; | 384 | unsigned int n_requested_mmu_pages; |
| 391 | unsigned int n_alloc_mmu_pages; | 385 | unsigned int n_alloc_mmu_pages; |
| 386 | atomic_t invlpg_counter; | ||
| 392 | struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; | 387 | struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; |
| 393 | /* | 388 | /* |
| 394 | * Hash table of struct kvm_mmu_page. | 389 | * Hash table of struct kvm_mmu_page. |
| @@ -461,11 +456,6 @@ struct kvm_vcpu_stat { | |||
| 461 | u32 nmi_injections; | 456 | u32 nmi_injections; |
| 462 | }; | 457 | }; |
| 463 | 458 | ||
| 464 | struct descriptor_table { | ||
| 465 | u16 limit; | ||
| 466 | unsigned long base; | ||
| 467 | } __attribute__((packed)); | ||
| 468 | |||
| 469 | struct kvm_x86_ops { | 459 | struct kvm_x86_ops { |
| 470 | int (*cpu_has_kvm_support)(void); /* __init */ | 460 | int (*cpu_has_kvm_support)(void); /* __init */ |
| 471 | int (*disabled_by_bios)(void); /* __init */ | 461 | int (*disabled_by_bios)(void); /* __init */ |
| @@ -503,12 +493,11 @@ struct kvm_x86_ops { | |||
| 503 | void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); | 493 | void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); |
| 504 | void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); | 494 | void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); |
| 505 | void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); | 495 | void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); |
| 506 | void (*get_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | 496 | void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); |
| 507 | void (*set_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | 497 | void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); |
| 508 | void (*get_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | 498 | void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); |
| 509 | void (*set_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | 499 | void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); |
| 510 | int (*get_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long *dest); | 500 | void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value); |
| 511 | int (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value); | ||
| 512 | void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); | 501 | void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); |
| 513 | unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); | 502 | unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); |
| 514 | void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); | 503 | void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); |
| @@ -527,7 +516,8 @@ struct kvm_x86_ops { | |||
| 527 | void (*set_irq)(struct kvm_vcpu *vcpu); | 516 | void (*set_irq)(struct kvm_vcpu *vcpu); |
| 528 | void (*set_nmi)(struct kvm_vcpu *vcpu); | 517 | void (*set_nmi)(struct kvm_vcpu *vcpu); |
| 529 | void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr, | 518 | void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr, |
| 530 | bool has_error_code, u32 error_code); | 519 | bool has_error_code, u32 error_code, |
| 520 | bool reinject); | ||
| 531 | int (*interrupt_allowed)(struct kvm_vcpu *vcpu); | 521 | int (*interrupt_allowed)(struct kvm_vcpu *vcpu); |
| 532 | int (*nmi_allowed)(struct kvm_vcpu *vcpu); | 522 | int (*nmi_allowed)(struct kvm_vcpu *vcpu); |
| 533 | bool (*get_nmi_mask)(struct kvm_vcpu *vcpu); | 523 | bool (*get_nmi_mask)(struct kvm_vcpu *vcpu); |
| @@ -541,6 +531,8 @@ struct kvm_x86_ops { | |||
| 541 | int (*get_lpage_level)(void); | 531 | int (*get_lpage_level)(void); |
| 542 | bool (*rdtscp_supported)(void); | 532 | bool (*rdtscp_supported)(void); |
| 543 | 533 | ||
| 534 | void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry); | ||
| 535 | |||
| 544 | const struct trace_print_flags *exit_reasons_str; | 536 | const struct trace_print_flags *exit_reasons_str; |
| 545 | }; | 537 | }; |
| 546 | 538 | ||
| @@ -587,23 +579,14 @@ int emulate_instruction(struct kvm_vcpu *vcpu, | |||
| 587 | void kvm_report_emulation_failure(struct kvm_vcpu *cvpu, const char *context); | 579 | void kvm_report_emulation_failure(struct kvm_vcpu *cvpu, const char *context); |
| 588 | void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address); | 580 | void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address); |
| 589 | void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address); | 581 | void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address); |
| 590 | void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw, | ||
| 591 | unsigned long *rflags); | ||
| 592 | 582 | ||
| 593 | unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr); | ||
| 594 | void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long value, | ||
| 595 | unsigned long *rflags); | ||
| 596 | void kvm_enable_efer_bits(u64); | 583 | void kvm_enable_efer_bits(u64); |
| 597 | int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data); | 584 | int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data); |
| 598 | int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data); | 585 | int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data); |
| 599 | 586 | ||
| 600 | struct x86_emulate_ctxt; | 587 | struct x86_emulate_ctxt; |
| 601 | 588 | ||
| 602 | int kvm_emulate_pio(struct kvm_vcpu *vcpu, int in, | 589 | int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port); |
| 603 | int size, unsigned port); | ||
| 604 | int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, int in, | ||
| 605 | int size, unsigned long count, int down, | ||
| 606 | gva_t address, int rep, unsigned port); | ||
| 607 | void kvm_emulate_cpuid(struct kvm_vcpu *vcpu); | 590 | void kvm_emulate_cpuid(struct kvm_vcpu *vcpu); |
| 608 | int kvm_emulate_halt(struct kvm_vcpu *vcpu); | 591 | int kvm_emulate_halt(struct kvm_vcpu *vcpu); |
| 609 | int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address); | 592 | int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address); |
| @@ -616,12 +599,15 @@ int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, | |||
| 616 | void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); | 599 | void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); |
| 617 | int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg); | 600 | int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg); |
| 618 | 601 | ||
| 619 | int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason); | 602 | int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason, |
| 603 | bool has_error_code, u32 error_code); | ||
| 620 | 604 | ||
| 621 | void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); | 605 | void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); |
| 622 | void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); | 606 | void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); |
| 623 | void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); | 607 | void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); |
| 624 | void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); | 608 | void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); |
| 609 | int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val); | ||
| 610 | int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val); | ||
| 625 | unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); | 611 | unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); |
| 626 | void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); | 612 | void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); |
| 627 | void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l); | 613 | void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l); |
| @@ -634,6 +620,8 @@ void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags); | |||
| 634 | 620 | ||
| 635 | void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); | 621 | void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); |
| 636 | void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); | 622 | void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); |
| 623 | void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr); | ||
| 624 | void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); | ||
| 637 | void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2, | 625 | void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2, |
| 638 | u32 error_code); | 626 | u32 error_code); |
| 639 | bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl); | 627 | bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl); |
| @@ -649,8 +637,6 @@ int emulator_write_emulated(unsigned long addr, | |||
| 649 | unsigned int bytes, | 637 | unsigned int bytes, |
| 650 | struct kvm_vcpu *vcpu); | 638 | struct kvm_vcpu *vcpu); |
| 651 | 639 | ||
| 652 | unsigned long segment_base(u16 selector); | ||
| 653 | |||
| 654 | void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu); | 640 | void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu); |
| 655 | void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, | 641 | void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, |
| 656 | const u8 *new, int bytes, | 642 | const u8 *new, int bytes, |
| @@ -675,7 +661,6 @@ void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva); | |||
| 675 | void kvm_enable_tdp(void); | 661 | void kvm_enable_tdp(void); |
| 676 | void kvm_disable_tdp(void); | 662 | void kvm_disable_tdp(void); |
| 677 | 663 | ||
| 678 | int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3); | ||
| 679 | int complete_pio(struct kvm_vcpu *vcpu); | 664 | int complete_pio(struct kvm_vcpu *vcpu); |
| 680 | bool kvm_check_iopl(struct kvm_vcpu *vcpu); | 665 | bool kvm_check_iopl(struct kvm_vcpu *vcpu); |
| 681 | 666 | ||
| @@ -724,23 +709,6 @@ static inline void kvm_load_ldt(u16 sel) | |||
| 724 | asm("lldt %0" : : "rm"(sel)); | 709 | asm("lldt %0" : : "rm"(sel)); |
| 725 | } | 710 | } |
| 726 | 711 | ||
| 727 | static inline void kvm_get_idt(struct descriptor_table *table) | ||
| 728 | { | ||
| 729 | asm("sidt %0" : "=m"(*table)); | ||
| 730 | } | ||
| 731 | |||
| 732 | static inline void kvm_get_gdt(struct descriptor_table *table) | ||
| 733 | { | ||
| 734 | asm("sgdt %0" : "=m"(*table)); | ||
| 735 | } | ||
| 736 | |||
| 737 | static inline unsigned long kvm_read_tr_base(void) | ||
| 738 | { | ||
| 739 | u16 tr; | ||
| 740 | asm("str %0" : "=g"(tr)); | ||
| 741 | return segment_base(tr); | ||
| 742 | } | ||
| 743 | |||
| 744 | #ifdef CONFIG_X86_64 | 712 | #ifdef CONFIG_X86_64 |
| 745 | static inline unsigned long read_msr(unsigned long msr) | 713 | static inline unsigned long read_msr(unsigned long msr) |
| 746 | { | 714 | { |
| @@ -826,4 +794,6 @@ int kvm_cpu_get_interrupt(struct kvm_vcpu *v); | |||
| 826 | void kvm_define_shared_msr(unsigned index, u32 msr); | 794 | void kvm_define_shared_msr(unsigned index, u32 msr); |
| 827 | void kvm_set_shared_msr(unsigned index, u64 val, u64 mask); | 795 | void kvm_set_shared_msr(unsigned index, u64 val, u64 mask); |
| 828 | 796 | ||
| 797 | bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip); | ||
| 798 | |||
| 829 | #endif /* _ASM_X86_KVM_HOST_H */ | 799 | #endif /* _ASM_X86_KVM_HOST_H */ |
diff --git a/arch/x86/include/asm/kvm_para.h b/arch/x86/include/asm/kvm_para.h index ffae1420e7d7..05eba5e9a8e8 100644 --- a/arch/x86/include/asm/kvm_para.h +++ b/arch/x86/include/asm/kvm_para.h | |||
| @@ -16,10 +16,23 @@ | |||
| 16 | #define KVM_FEATURE_CLOCKSOURCE 0 | 16 | #define KVM_FEATURE_CLOCKSOURCE 0 |
| 17 | #define KVM_FEATURE_NOP_IO_DELAY 1 | 17 | #define KVM_FEATURE_NOP_IO_DELAY 1 |
| 18 | #define KVM_FEATURE_MMU_OP 2 | 18 | #define KVM_FEATURE_MMU_OP 2 |
| 19 | /* This indicates that the new set of kvmclock msrs | ||
| 20 | * are available. The use of 0x11 and 0x12 is deprecated | ||
| 21 | */ | ||
| 22 | #define KVM_FEATURE_CLOCKSOURCE2 3 | ||
| 23 | |||
| 24 | /* The last 8 bits are used to indicate how to interpret the flags field | ||
| 25 | * in pvclock structure. If no bits are set, all flags are ignored. | ||
| 26 | */ | ||
| 27 | #define KVM_FEATURE_CLOCKSOURCE_STABLE_BIT 24 | ||
| 19 | 28 | ||
| 20 | #define MSR_KVM_WALL_CLOCK 0x11 | 29 | #define MSR_KVM_WALL_CLOCK 0x11 |
| 21 | #define MSR_KVM_SYSTEM_TIME 0x12 | 30 | #define MSR_KVM_SYSTEM_TIME 0x12 |
| 22 | 31 | ||
| 32 | /* Custom MSRs falls in the range 0x4b564d00-0x4b564dff */ | ||
| 33 | #define MSR_KVM_WALL_CLOCK_NEW 0x4b564d00 | ||
| 34 | #define MSR_KVM_SYSTEM_TIME_NEW 0x4b564d01 | ||
| 35 | |||
| 23 | #define KVM_MAX_MMU_OP_BATCH 32 | 36 | #define KVM_MAX_MMU_OP_BATCH 32 |
| 24 | 37 | ||
| 25 | /* Operations for KVM_HC_MMU_OP */ | 38 | /* Operations for KVM_HC_MMU_OP */ |
diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h index 6c3fdd631ed3..f32a4301c4d4 100644 --- a/arch/x86/include/asm/mce.h +++ b/arch/x86/include/asm/mce.h | |||
| @@ -225,5 +225,13 @@ extern void mcheck_intel_therm_init(void); | |||
| 225 | static inline void mcheck_intel_therm_init(void) { } | 225 | static inline void mcheck_intel_therm_init(void) { } |
| 226 | #endif | 226 | #endif |
| 227 | 227 | ||
| 228 | /* | ||
| 229 | * Used by APEI to report memory error via /dev/mcelog | ||
| 230 | */ | ||
| 231 | |||
| 232 | struct cper_sec_mem_err; | ||
| 233 | extern void apei_mce_report_mem_error(int corrected, | ||
| 234 | struct cper_sec_mem_err *mem_err); | ||
| 235 | |||
| 228 | #endif /* __KERNEL__ */ | 236 | #endif /* __KERNEL__ */ |
| 229 | #endif /* _ASM_X86_MCE_H */ | 237 | #endif /* _ASM_X86_MCE_H */ |
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index bc473acfa7f9..8c7ae4318629 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h | |||
| @@ -110,6 +110,7 @@ | |||
| 110 | #define MSR_AMD64_PATCH_LOADER 0xc0010020 | 110 | #define MSR_AMD64_PATCH_LOADER 0xc0010020 |
| 111 | #define MSR_AMD64_OSVW_ID_LENGTH 0xc0010140 | 111 | #define MSR_AMD64_OSVW_ID_LENGTH 0xc0010140 |
| 112 | #define MSR_AMD64_OSVW_STATUS 0xc0010141 | 112 | #define MSR_AMD64_OSVW_STATUS 0xc0010141 |
| 113 | #define MSR_AMD64_DC_CFG 0xc0011022 | ||
| 113 | #define MSR_AMD64_IBSFETCHCTL 0xc0011030 | 114 | #define MSR_AMD64_IBSFETCHCTL 0xc0011030 |
| 114 | #define MSR_AMD64_IBSFETCHLINAD 0xc0011031 | 115 | #define MSR_AMD64_IBSFETCHLINAD 0xc0011031 |
| 115 | #define MSR_AMD64_IBSFETCHPHYSAD 0xc0011032 | 116 | #define MSR_AMD64_IBSFETCHPHYSAD 0xc0011032 |
| @@ -202,8 +203,9 @@ | |||
| 202 | #define MSR_IA32_EBL_CR_POWERON 0x0000002a | 203 | #define MSR_IA32_EBL_CR_POWERON 0x0000002a |
| 203 | #define MSR_IA32_FEATURE_CONTROL 0x0000003a | 204 | #define MSR_IA32_FEATURE_CONTROL 0x0000003a |
| 204 | 205 | ||
| 205 | #define FEATURE_CONTROL_LOCKED (1<<0) | 206 | #define FEATURE_CONTROL_LOCKED (1<<0) |
| 206 | #define FEATURE_CONTROL_VMXON_ENABLED (1<<2) | 207 | #define FEATURE_CONTROL_VMXON_ENABLED_INSIDE_SMX (1<<1) |
| 208 | #define FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX (1<<2) | ||
| 207 | 209 | ||
| 208 | #define MSR_IA32_APICBASE 0x0000001b | 210 | #define MSR_IA32_APICBASE 0x0000001b |
| 209 | #define MSR_IA32_APICBASE_BSP (1<<8) | 211 | #define MSR_IA32_APICBASE_BSP (1<<8) |
| @@ -235,6 +237,8 @@ | |||
| 235 | 237 | ||
| 236 | #define MSR_IA32_MISC_ENABLE 0x000001a0 | 238 | #define MSR_IA32_MISC_ENABLE 0x000001a0 |
| 237 | 239 | ||
| 240 | #define MSR_IA32_TEMPERATURE_TARGET 0x000001a2 | ||
| 241 | |||
| 238 | /* MISC_ENABLE bits: architectural */ | 242 | /* MISC_ENABLE bits: architectural */ |
| 239 | #define MSR_IA32_MISC_ENABLE_FAST_STRING (1ULL << 0) | 243 | #define MSR_IA32_MISC_ENABLE_FAST_STRING (1ULL << 0) |
| 240 | #define MSR_IA32_MISC_ENABLE_TCC (1ULL << 1) | 244 | #define MSR_IA32_MISC_ENABLE_TCC (1ULL << 1) |
diff --git a/arch/x86/include/asm/pci_x86.h b/arch/x86/include/asm/pci_x86.h index 1a0422348d6d..cd2a31dc5fb8 100644 --- a/arch/x86/include/asm/pci_x86.h +++ b/arch/x86/include/asm/pci_x86.h | |||
| @@ -53,6 +53,8 @@ extern int pcibios_last_bus; | |||
| 53 | extern struct pci_bus *pci_root_bus; | 53 | extern struct pci_bus *pci_root_bus; |
| 54 | extern struct pci_ops pci_root_ops; | 54 | extern struct pci_ops pci_root_ops; |
| 55 | 55 | ||
| 56 | void pcibios_scan_specific_bus(int busn); | ||
| 57 | |||
| 56 | /* pci-irq.c */ | 58 | /* pci-irq.c */ |
| 57 | 59 | ||
| 58 | struct irq_info { | 60 | struct irq_info { |
| @@ -83,7 +85,7 @@ struct irq_routing_table { | |||
| 83 | 85 | ||
| 84 | extern unsigned int pcibios_irq_mask; | 86 | extern unsigned int pcibios_irq_mask; |
| 85 | 87 | ||
| 86 | extern spinlock_t pci_config_lock; | 88 | extern raw_spinlock_t pci_config_lock; |
| 87 | 89 | ||
| 88 | extern int (*pcibios_enable_irq)(struct pci_dev *dev); | 90 | extern int (*pcibios_enable_irq)(struct pci_dev *dev); |
| 89 | extern void (*pcibios_disable_irq)(struct pci_dev *dev); | 91 | extern void (*pcibios_disable_irq)(struct pci_dev *dev); |
diff --git a/arch/x86/include/asm/perf_event_p4.h b/arch/x86/include/asm/perf_event_p4.h index b05400a542ff..64a8ebff06fc 100644 --- a/arch/x86/include/asm/perf_event_p4.h +++ b/arch/x86/include/asm/perf_event_p4.h | |||
| @@ -89,7 +89,8 @@ | |||
| 89 | P4_CCCR_ENABLE) | 89 | P4_CCCR_ENABLE) |
| 90 | 90 | ||
| 91 | /* HT mask */ | 91 | /* HT mask */ |
| 92 | #define P4_CCCR_MASK_HT (P4_CCCR_MASK | P4_CCCR_THREAD_ANY) | 92 | #define P4_CCCR_MASK_HT \ |
| 93 | (P4_CCCR_MASK | P4_CCCR_OVF_PMI_T1 | P4_CCCR_THREAD_ANY) | ||
| 93 | 94 | ||
| 94 | #define P4_GEN_ESCR_EMASK(class, name, bit) \ | 95 | #define P4_GEN_ESCR_EMASK(class, name, bit) \ |
| 95 | class##__##name = ((1 << bit) << P4_ESCR_EVENTMASK_SHIFT) | 96 | class##__##name = ((1 << bit) << P4_ESCR_EVENTMASK_SHIFT) |
diff --git a/arch/x86/include/asm/pvclock-abi.h b/arch/x86/include/asm/pvclock-abi.h index 6d93508f2626..35f2d1948ada 100644 --- a/arch/x86/include/asm/pvclock-abi.h +++ b/arch/x86/include/asm/pvclock-abi.h | |||
| @@ -29,7 +29,8 @@ struct pvclock_vcpu_time_info { | |||
| 29 | u64 system_time; | 29 | u64 system_time; |
| 30 | u32 tsc_to_system_mul; | 30 | u32 tsc_to_system_mul; |
| 31 | s8 tsc_shift; | 31 | s8 tsc_shift; |
| 32 | u8 pad[3]; | 32 | u8 flags; |
| 33 | u8 pad[2]; | ||
| 33 | } __attribute__((__packed__)); /* 32 bytes */ | 34 | } __attribute__((__packed__)); /* 32 bytes */ |
| 34 | 35 | ||
| 35 | struct pvclock_wall_clock { | 36 | struct pvclock_wall_clock { |
| @@ -38,5 +39,6 @@ struct pvclock_wall_clock { | |||
| 38 | u32 nsec; | 39 | u32 nsec; |
| 39 | } __attribute__((__packed__)); | 40 | } __attribute__((__packed__)); |
| 40 | 41 | ||
| 42 | #define PVCLOCK_TSC_STABLE_BIT (1 << 0) | ||
| 41 | #endif /* __ASSEMBLY__ */ | 43 | #endif /* __ASSEMBLY__ */ |
| 42 | #endif /* _ASM_X86_PVCLOCK_ABI_H */ | 44 | #endif /* _ASM_X86_PVCLOCK_ABI_H */ |
diff --git a/arch/x86/include/asm/pvclock.h b/arch/x86/include/asm/pvclock.h index 53235fd5f8ce..cd02f324aa6b 100644 --- a/arch/x86/include/asm/pvclock.h +++ b/arch/x86/include/asm/pvclock.h | |||
| @@ -6,6 +6,7 @@ | |||
| 6 | 6 | ||
| 7 | /* some helper functions for xen and kvm pv clock sources */ | 7 | /* some helper functions for xen and kvm pv clock sources */ |
| 8 | cycle_t pvclock_clocksource_read(struct pvclock_vcpu_time_info *src); | 8 | cycle_t pvclock_clocksource_read(struct pvclock_vcpu_time_info *src); |
| 9 | void pvclock_set_flags(u8 flags); | ||
| 9 | unsigned long pvclock_tsc_khz(struct pvclock_vcpu_time_info *src); | 10 | unsigned long pvclock_tsc_khz(struct pvclock_vcpu_time_info *src); |
| 10 | void pvclock_read_wallclock(struct pvclock_wall_clock *wall, | 11 | void pvclock_read_wallclock(struct pvclock_wall_clock *wall, |
| 11 | struct pvclock_vcpu_time_info *vcpu, | 12 | struct pvclock_vcpu_time_info *vcpu, |
diff --git a/arch/x86/include/asm/rdc321x_defs.h b/arch/x86/include/asm/rdc321x_defs.h deleted file mode 100644 index c8e9c8bed3d0..000000000000 --- a/arch/x86/include/asm/rdc321x_defs.h +++ /dev/null | |||
| @@ -1,12 +0,0 @@ | |||
| 1 | #define PFX "rdc321x: " | ||
| 2 | |||
| 3 | /* General purpose configuration and data registers */ | ||
| 4 | #define RDC3210_CFGREG_ADDR 0x0CF8 | ||
| 5 | #define RDC3210_CFGREG_DATA 0x0CFC | ||
| 6 | |||
| 7 | #define RDC321X_GPIO_CTRL_REG1 0x48 | ||
| 8 | #define RDC321X_GPIO_CTRL_REG2 0x84 | ||
| 9 | #define RDC321X_GPIO_DATA_REG1 0x4c | ||
| 10 | #define RDC321X_GPIO_DATA_REG2 0x88 | ||
| 11 | |||
| 12 | #define RDC321X_MAX_GPIO 58 | ||
diff --git a/arch/x86/include/asm/scatterlist.h b/arch/x86/include/asm/scatterlist.h index 75af592677ec..fb0b1874396f 100644 --- a/arch/x86/include/asm/scatterlist.h +++ b/arch/x86/include/asm/scatterlist.h | |||
| @@ -1,8 +1,9 @@ | |||
| 1 | #ifndef _ASM_X86_SCATTERLIST_H | 1 | #ifndef _ASM_X86_SCATTERLIST_H |
| 2 | #define _ASM_X86_SCATTERLIST_H | 2 | #define _ASM_X86_SCATTERLIST_H |
| 3 | 3 | ||
| 4 | #define ISA_DMA_THRESHOLD (0x00ffffff) | ||
| 5 | |||
| 6 | #include <asm-generic/scatterlist.h> | 4 | #include <asm-generic/scatterlist.h> |
| 7 | 5 | ||
| 6 | #define ISA_DMA_THRESHOLD (0x00ffffff) | ||
| 7 | #define ARCH_HAS_SG_CHAIN | ||
| 8 | |||
| 8 | #endif /* _ASM_X86_SCATTERLIST_H */ | 9 | #endif /* _ASM_X86_SCATTERLIST_H */ |
diff --git a/arch/x86/include/asm/suspend_32.h b/arch/x86/include/asm/suspend_32.h index 48dcfa62ea07..fd921c3a6841 100644 --- a/arch/x86/include/asm/suspend_32.h +++ b/arch/x86/include/asm/suspend_32.h | |||
| @@ -15,6 +15,8 @@ static inline int arch_prepare_suspend(void) { return 0; } | |||
| 15 | struct saved_context { | 15 | struct saved_context { |
| 16 | u16 es, fs, gs, ss; | 16 | u16 es, fs, gs, ss; |
| 17 | unsigned long cr0, cr2, cr3, cr4; | 17 | unsigned long cr0, cr2, cr3, cr4; |
| 18 | u64 misc_enable; | ||
| 19 | bool misc_enable_saved; | ||
| 18 | struct desc_ptr gdt; | 20 | struct desc_ptr gdt; |
| 19 | struct desc_ptr idt; | 21 | struct desc_ptr idt; |
| 20 | u16 ldt; | 22 | u16 ldt; |
diff --git a/arch/x86/include/asm/suspend_64.h b/arch/x86/include/asm/suspend_64.h index 06284f42b759..8d942afae681 100644 --- a/arch/x86/include/asm/suspend_64.h +++ b/arch/x86/include/asm/suspend_64.h | |||
| @@ -27,6 +27,8 @@ struct saved_context { | |||
| 27 | u16 ds, es, fs, gs, ss; | 27 | u16 ds, es, fs, gs, ss; |
| 28 | unsigned long gs_base, gs_kernel_base, fs_base; | 28 | unsigned long gs_base, gs_kernel_base, fs_base; |
| 29 | unsigned long cr0, cr2, cr3, cr4, cr8; | 29 | unsigned long cr0, cr2, cr3, cr4, cr8; |
| 30 | u64 misc_enable; | ||
| 31 | bool misc_enable_saved; | ||
| 30 | unsigned long efer; | 32 | unsigned long efer; |
| 31 | u16 gdt_pad; | 33 | u16 gdt_pad; |
| 32 | u16 gdt_limit; | 34 | u16 gdt_limit; |
diff --git a/arch/x86/include/asm/svm.h b/arch/x86/include/asm/svm.h index 38638cd2fa4c..0e831059ac5a 100644 --- a/arch/x86/include/asm/svm.h +++ b/arch/x86/include/asm/svm.h | |||
| @@ -81,7 +81,9 @@ struct __attribute__ ((__packed__)) vmcb_control_area { | |||
| 81 | u32 event_inj_err; | 81 | u32 event_inj_err; |
| 82 | u64 nested_cr3; | 82 | u64 nested_cr3; |
| 83 | u64 lbr_ctl; | 83 | u64 lbr_ctl; |
| 84 | u8 reserved_5[832]; | 84 | u64 reserved_5; |
| 85 | u64 next_rip; | ||
| 86 | u8 reserved_6[816]; | ||
| 85 | }; | 87 | }; |
| 86 | 88 | ||
| 87 | 89 | ||
| @@ -115,6 +117,10 @@ struct __attribute__ ((__packed__)) vmcb_control_area { | |||
| 115 | #define SVM_IOIO_SIZE_MASK (7 << SVM_IOIO_SIZE_SHIFT) | 117 | #define SVM_IOIO_SIZE_MASK (7 << SVM_IOIO_SIZE_SHIFT) |
| 116 | #define SVM_IOIO_ASIZE_MASK (7 << SVM_IOIO_ASIZE_SHIFT) | 118 | #define SVM_IOIO_ASIZE_MASK (7 << SVM_IOIO_ASIZE_SHIFT) |
| 117 | 119 | ||
| 120 | #define SVM_VM_CR_VALID_MASK 0x001fULL | ||
| 121 | #define SVM_VM_CR_SVM_LOCK_MASK 0x0008ULL | ||
| 122 | #define SVM_VM_CR_SVM_DIS_MASK 0x0010ULL | ||
| 123 | |||
| 118 | struct __attribute__ ((__packed__)) vmcb_seg { | 124 | struct __attribute__ ((__packed__)) vmcb_seg { |
| 119 | u16 selector; | 125 | u16 selector; |
| 120 | u16 attrib; | 126 | u16 attrib; |
| @@ -238,6 +244,7 @@ struct __attribute__ ((__packed__)) vmcb { | |||
| 238 | 244 | ||
| 239 | #define SVM_EXITINFOSHIFT_TS_REASON_IRET 36 | 245 | #define SVM_EXITINFOSHIFT_TS_REASON_IRET 36 |
| 240 | #define SVM_EXITINFOSHIFT_TS_REASON_JMP 38 | 246 | #define SVM_EXITINFOSHIFT_TS_REASON_JMP 38 |
| 247 | #define SVM_EXITINFOSHIFT_TS_HAS_ERROR_CODE 44 | ||
| 241 | 248 | ||
| 242 | #define SVM_EXIT_READ_CR0 0x000 | 249 | #define SVM_EXIT_READ_CR0 0x000 |
| 243 | #define SVM_EXIT_READ_CR3 0x003 | 250 | #define SVM_EXIT_READ_CR3 0x003 |
diff --git a/arch/x86/include/asm/thread_info.h b/arch/x86/include/asm/thread_info.h index 62ba9400cc43..f0b6e5dbc5a0 100644 --- a/arch/x86/include/asm/thread_info.h +++ b/arch/x86/include/asm/thread_info.h | |||
| @@ -239,8 +239,8 @@ static inline struct thread_info *current_thread_info(void) | |||
| 239 | #define TS_USEDFPU 0x0001 /* FPU was used by this task | 239 | #define TS_USEDFPU 0x0001 /* FPU was used by this task |
| 240 | this quantum (SMP) */ | 240 | this quantum (SMP) */ |
| 241 | #define TS_COMPAT 0x0002 /* 32bit syscall active (64BIT)*/ | 241 | #define TS_COMPAT 0x0002 /* 32bit syscall active (64BIT)*/ |
| 242 | #define TS_POLLING 0x0004 /* true if in idle loop | 242 | #define TS_POLLING 0x0004 /* idle task polling need_resched, |
| 243 | and not sleeping */ | 243 | skip sending interrupt */ |
| 244 | #define TS_RESTORE_SIGMASK 0x0008 /* restore signal mask in do_signal() */ | 244 | #define TS_RESTORE_SIGMASK 0x0008 /* restore signal mask in do_signal() */ |
| 245 | 245 | ||
| 246 | #define tsk_is_polling(t) (task_thread_info(t)->status & TS_POLLING) | 246 | #define tsk_is_polling(t) (task_thread_info(t)->status & TS_POLLING) |
diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h index c5087d796587..21899cc31e52 100644 --- a/arch/x86/include/asm/topology.h +++ b/arch/x86/include/asm/topology.h | |||
| @@ -53,33 +53,29 @@ | |||
| 53 | extern int cpu_to_node_map[]; | 53 | extern int cpu_to_node_map[]; |
| 54 | 54 | ||
| 55 | /* Returns the number of the node containing CPU 'cpu' */ | 55 | /* Returns the number of the node containing CPU 'cpu' */ |
| 56 | static inline int cpu_to_node(int cpu) | 56 | static inline int __cpu_to_node(int cpu) |
| 57 | { | 57 | { |
| 58 | return cpu_to_node_map[cpu]; | 58 | return cpu_to_node_map[cpu]; |
| 59 | } | 59 | } |
| 60 | #define early_cpu_to_node(cpu) cpu_to_node(cpu) | 60 | #define early_cpu_to_node __cpu_to_node |
| 61 | #define cpu_to_node __cpu_to_node | ||
| 61 | 62 | ||
| 62 | #else /* CONFIG_X86_64 */ | 63 | #else /* CONFIG_X86_64 */ |
| 63 | 64 | ||
| 64 | /* Mappings between logical cpu number and node number */ | 65 | /* Mappings between logical cpu number and node number */ |
| 65 | DECLARE_EARLY_PER_CPU(int, x86_cpu_to_node_map); | 66 | DECLARE_EARLY_PER_CPU(int, x86_cpu_to_node_map); |
| 66 | 67 | ||
| 67 | /* Returns the number of the current Node. */ | ||
| 68 | DECLARE_PER_CPU(int, node_number); | ||
| 69 | #define numa_node_id() percpu_read(node_number) | ||
| 70 | |||
| 71 | #ifdef CONFIG_DEBUG_PER_CPU_MAPS | 68 | #ifdef CONFIG_DEBUG_PER_CPU_MAPS |
| 72 | extern int cpu_to_node(int cpu); | 69 | /* |
| 70 | * override generic percpu implementation of cpu_to_node | ||
| 71 | */ | ||
| 72 | extern int __cpu_to_node(int cpu); | ||
| 73 | #define cpu_to_node __cpu_to_node | ||
| 74 | |||
| 73 | extern int early_cpu_to_node(int cpu); | 75 | extern int early_cpu_to_node(int cpu); |
| 74 | 76 | ||
| 75 | #else /* !CONFIG_DEBUG_PER_CPU_MAPS */ | 77 | #else /* !CONFIG_DEBUG_PER_CPU_MAPS */ |
| 76 | 78 | ||
| 77 | /* Returns the number of the node containing CPU 'cpu' */ | ||
| 78 | static inline int cpu_to_node(int cpu) | ||
| 79 | { | ||
| 80 | return per_cpu(x86_cpu_to_node_map, cpu); | ||
| 81 | } | ||
| 82 | |||
| 83 | /* Same function but used if called before per_cpu areas are setup */ | 79 | /* Same function but used if called before per_cpu areas are setup */ |
| 84 | static inline int early_cpu_to_node(int cpu) | 80 | static inline int early_cpu_to_node(int cpu) |
| 85 | { | 81 | { |
| @@ -170,6 +166,10 @@ static inline int numa_node_id(void) | |||
| 170 | { | 166 | { |
| 171 | return 0; | 167 | return 0; |
| 172 | } | 168 | } |
| 169 | /* | ||
| 170 | * indicate override: | ||
| 171 | */ | ||
| 172 | #define numa_node_id numa_node_id | ||
| 173 | 173 | ||
| 174 | static inline int early_cpu_to_node(int cpu) | 174 | static inline int early_cpu_to_node(int cpu) |
| 175 | { | 175 | { |
diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h index fb9a080740ec..9e6779f7cf2d 100644 --- a/arch/x86/include/asm/vmx.h +++ b/arch/x86/include/asm/vmx.h | |||
| @@ -25,6 +25,8 @@ | |||
| 25 | * | 25 | * |
| 26 | */ | 26 | */ |
| 27 | 27 | ||
| 28 | #include <linux/types.h> | ||
| 29 | |||
| 28 | /* | 30 | /* |
| 29 | * Definitions of Primary Processor-Based VM-Execution Controls. | 31 | * Definitions of Primary Processor-Based VM-Execution Controls. |
| 30 | */ | 32 | */ |
| @@ -120,6 +122,8 @@ enum vmcs_field { | |||
| 120 | GUEST_IA32_DEBUGCTL_HIGH = 0x00002803, | 122 | GUEST_IA32_DEBUGCTL_HIGH = 0x00002803, |
| 121 | GUEST_IA32_PAT = 0x00002804, | 123 | GUEST_IA32_PAT = 0x00002804, |
| 122 | GUEST_IA32_PAT_HIGH = 0x00002805, | 124 | GUEST_IA32_PAT_HIGH = 0x00002805, |
| 125 | GUEST_IA32_EFER = 0x00002806, | ||
| 126 | GUEST_IA32_EFER_HIGH = 0x00002807, | ||
| 123 | GUEST_PDPTR0 = 0x0000280a, | 127 | GUEST_PDPTR0 = 0x0000280a, |
| 124 | GUEST_PDPTR0_HIGH = 0x0000280b, | 128 | GUEST_PDPTR0_HIGH = 0x0000280b, |
| 125 | GUEST_PDPTR1 = 0x0000280c, | 129 | GUEST_PDPTR1 = 0x0000280c, |
| @@ -130,6 +134,8 @@ enum vmcs_field { | |||
| 130 | GUEST_PDPTR3_HIGH = 0x00002811, | 134 | GUEST_PDPTR3_HIGH = 0x00002811, |
| 131 | HOST_IA32_PAT = 0x00002c00, | 135 | HOST_IA32_PAT = 0x00002c00, |
| 132 | HOST_IA32_PAT_HIGH = 0x00002c01, | 136 | HOST_IA32_PAT_HIGH = 0x00002c01, |
| 137 | HOST_IA32_EFER = 0x00002c02, | ||
| 138 | HOST_IA32_EFER_HIGH = 0x00002c03, | ||
| 133 | PIN_BASED_VM_EXEC_CONTROL = 0x00004000, | 139 | PIN_BASED_VM_EXEC_CONTROL = 0x00004000, |
| 134 | CPU_BASED_VM_EXEC_CONTROL = 0x00004002, | 140 | CPU_BASED_VM_EXEC_CONTROL = 0x00004002, |
| 135 | EXCEPTION_BITMAP = 0x00004004, | 141 | EXCEPTION_BITMAP = 0x00004004, |
| @@ -394,6 +400,10 @@ enum vmcs_field { | |||
| 394 | #define ASM_VMX_INVEPT ".byte 0x66, 0x0f, 0x38, 0x80, 0x08" | 400 | #define ASM_VMX_INVEPT ".byte 0x66, 0x0f, 0x38, 0x80, 0x08" |
| 395 | #define ASM_VMX_INVVPID ".byte 0x66, 0x0f, 0x38, 0x81, 0x08" | 401 | #define ASM_VMX_INVVPID ".byte 0x66, 0x0f, 0x38, 0x81, 0x08" |
| 396 | 402 | ||
| 397 | 403 | struct vmx_msr_entry { | |
| 404 | u32 index; | ||
| 405 | u32 reserved; | ||
| 406 | u64 value; | ||
| 407 | } __aligned(16); | ||
| 398 | 408 | ||
| 399 | #endif | 409 | #endif |
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c index 488be461a380..60cc4058ed5f 100644 --- a/arch/x86/kernel/acpi/boot.c +++ b/arch/x86/kernel/acpi/boot.c | |||
| @@ -63,7 +63,6 @@ EXPORT_SYMBOL(acpi_disabled); | |||
| 63 | int acpi_noirq; /* skip ACPI IRQ initialization */ | 63 | int acpi_noirq; /* skip ACPI IRQ initialization */ |
| 64 | int acpi_pci_disabled; /* skip ACPI PCI scan and IRQ initialization */ | 64 | int acpi_pci_disabled; /* skip ACPI PCI scan and IRQ initialization */ |
| 65 | EXPORT_SYMBOL(acpi_pci_disabled); | 65 | EXPORT_SYMBOL(acpi_pci_disabled); |
| 66 | int acpi_ht __initdata = 1; /* enable HT */ | ||
| 67 | 66 | ||
| 68 | int acpi_lapic; | 67 | int acpi_lapic; |
| 69 | int acpi_ioapic; | 68 | int acpi_ioapic; |
| @@ -1501,9 +1500,8 @@ void __init acpi_boot_table_init(void) | |||
| 1501 | 1500 | ||
| 1502 | /* | 1501 | /* |
| 1503 | * If acpi_disabled, bail out | 1502 | * If acpi_disabled, bail out |
| 1504 | * One exception: acpi=ht continues far enough to enumerate LAPICs | ||
| 1505 | */ | 1503 | */ |
| 1506 | if (acpi_disabled && !acpi_ht) | 1504 | if (acpi_disabled) |
| 1507 | return; | 1505 | return; |
| 1508 | 1506 | ||
| 1509 | /* | 1507 | /* |
| @@ -1534,9 +1532,8 @@ int __init early_acpi_boot_init(void) | |||
| 1534 | { | 1532 | { |
| 1535 | /* | 1533 | /* |
| 1536 | * If acpi_disabled, bail out | 1534 | * If acpi_disabled, bail out |
| 1537 | * One exception: acpi=ht continues far enough to enumerate LAPICs | ||
| 1538 | */ | 1535 | */ |
| 1539 | if (acpi_disabled && !acpi_ht) | 1536 | if (acpi_disabled) |
| 1540 | return 1; | 1537 | return 1; |
| 1541 | 1538 | ||
| 1542 | /* | 1539 | /* |
| @@ -1554,9 +1551,8 @@ int __init acpi_boot_init(void) | |||
| 1554 | 1551 | ||
| 1555 | /* | 1552 | /* |
| 1556 | * If acpi_disabled, bail out | 1553 | * If acpi_disabled, bail out |
| 1557 | * One exception: acpi=ht continues far enough to enumerate LAPICs | ||
| 1558 | */ | 1554 | */ |
| 1559 | if (acpi_disabled && !acpi_ht) | 1555 | if (acpi_disabled) |
| 1560 | return 1; | 1556 | return 1; |
| 1561 | 1557 | ||
| 1562 | acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf); | 1558 | acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf); |
| @@ -1591,21 +1587,12 @@ static int __init parse_acpi(char *arg) | |||
| 1591 | /* acpi=force to over-ride black-list */ | 1587 | /* acpi=force to over-ride black-list */ |
| 1592 | else if (strcmp(arg, "force") == 0) { | 1588 | else if (strcmp(arg, "force") == 0) { |
| 1593 | acpi_force = 1; | 1589 | acpi_force = 1; |
| 1594 | acpi_ht = 1; | ||
| 1595 | acpi_disabled = 0; | 1590 | acpi_disabled = 0; |
| 1596 | } | 1591 | } |
| 1597 | /* acpi=strict disables out-of-spec workarounds */ | 1592 | /* acpi=strict disables out-of-spec workarounds */ |
| 1598 | else if (strcmp(arg, "strict") == 0) { | 1593 | else if (strcmp(arg, "strict") == 0) { |
| 1599 | acpi_strict = 1; | 1594 | acpi_strict = 1; |
| 1600 | } | 1595 | } |
| 1601 | /* Limit ACPI just to boot-time to enable HT */ | ||
| 1602 | else if (strcmp(arg, "ht") == 0) { | ||
| 1603 | if (!acpi_force) { | ||
| 1604 | printk(KERN_WARNING "acpi=ht will be removed in Linux-2.6.35\n"); | ||
| 1605 | disable_acpi(); | ||
| 1606 | } | ||
| 1607 | acpi_ht = 1; | ||
| 1608 | } | ||
| 1609 | /* acpi=rsdt use RSDT instead of XSDT */ | 1596 | /* acpi=rsdt use RSDT instead of XSDT */ |
| 1610 | else if (strcmp(arg, "rsdt") == 0) { | 1597 | else if (strcmp(arg, "rsdt") == 0) { |
| 1611 | acpi_rsdt_forced = 1; | 1598 | acpi_rsdt_forced = 1; |
diff --git a/arch/x86/kernel/acpi/sleep.c b/arch/x86/kernel/acpi/sleep.c index f9961034e557..82e508677b91 100644 --- a/arch/x86/kernel/acpi/sleep.c +++ b/arch/x86/kernel/acpi/sleep.c | |||
| @@ -162,8 +162,6 @@ static int __init acpi_sleep_setup(char *str) | |||
| 162 | #endif | 162 | #endif |
| 163 | if (strncmp(str, "old_ordering", 12) == 0) | 163 | if (strncmp(str, "old_ordering", 12) == 0) |
| 164 | acpi_old_suspend_ordering(); | 164 | acpi_old_suspend_ordering(); |
| 165 | if (strncmp(str, "sci_force_enable", 16) == 0) | ||
| 166 | acpi_set_sci_en_on_resume(); | ||
| 167 | str = strchr(str, ','); | 165 | str = strchr(str, ','); |
| 168 | if (str != NULL) | 166 | if (str != NULL) |
| 169 | str += strspn(str, ", \t"); | 167 | str += strspn(str, ", \t"); |
diff --git a/arch/x86/kernel/acpi/wakeup_32.S b/arch/x86/kernel/acpi/wakeup_32.S index 8ded418b0593..13ab720573e3 100644 --- a/arch/x86/kernel/acpi/wakeup_32.S +++ b/arch/x86/kernel/acpi/wakeup_32.S | |||
| @@ -1,4 +1,4 @@ | |||
| 1 | .section .text.page_aligned | 1 | .section .text..page_aligned |
| 2 | #include <linux/linkage.h> | 2 | #include <linux/linkage.h> |
| 3 | #include <asm/segment.h> | 3 | #include <asm/segment.h> |
| 4 | #include <asm/page_types.h> | 4 | #include <asm/page_types.h> |
diff --git a/arch/x86/kernel/amd_iommu.c b/arch/x86/kernel/amd_iommu.c index fa5a1474cd18..0d20286d78c6 100644 --- a/arch/x86/kernel/amd_iommu.c +++ b/arch/x86/kernel/amd_iommu.c | |||
| @@ -1487,6 +1487,7 @@ static int __attach_device(struct device *dev, | |||
| 1487 | struct protection_domain *domain) | 1487 | struct protection_domain *domain) |
| 1488 | { | 1488 | { |
| 1489 | struct iommu_dev_data *dev_data, *alias_data; | 1489 | struct iommu_dev_data *dev_data, *alias_data; |
| 1490 | int ret; | ||
| 1490 | 1491 | ||
| 1491 | dev_data = get_dev_data(dev); | 1492 | dev_data = get_dev_data(dev); |
| 1492 | alias_data = get_dev_data(dev_data->alias); | 1493 | alias_data = get_dev_data(dev_data->alias); |
| @@ -1498,13 +1499,14 @@ static int __attach_device(struct device *dev, | |||
| 1498 | spin_lock(&domain->lock); | 1499 | spin_lock(&domain->lock); |
| 1499 | 1500 | ||
| 1500 | /* Some sanity checks */ | 1501 | /* Some sanity checks */ |
| 1502 | ret = -EBUSY; | ||
| 1501 | if (alias_data->domain != NULL && | 1503 | if (alias_data->domain != NULL && |
| 1502 | alias_data->domain != domain) | 1504 | alias_data->domain != domain) |
| 1503 | return -EBUSY; | 1505 | goto out_unlock; |
| 1504 | 1506 | ||
| 1505 | if (dev_data->domain != NULL && | 1507 | if (dev_data->domain != NULL && |
| 1506 | dev_data->domain != domain) | 1508 | dev_data->domain != domain) |
| 1507 | return -EBUSY; | 1509 | goto out_unlock; |
| 1508 | 1510 | ||
| 1509 | /* Do real assignment */ | 1511 | /* Do real assignment */ |
| 1510 | if (dev_data->alias != dev) { | 1512 | if (dev_data->alias != dev) { |
| @@ -1520,10 +1522,14 @@ static int __attach_device(struct device *dev, | |||
| 1520 | 1522 | ||
| 1521 | atomic_inc(&dev_data->bind); | 1523 | atomic_inc(&dev_data->bind); |
| 1522 | 1524 | ||
| 1525 | ret = 0; | ||
| 1526 | |||
| 1527 | out_unlock: | ||
| 1528 | |||
| 1523 | /* ready */ | 1529 | /* ready */ |
| 1524 | spin_unlock(&domain->lock); | 1530 | spin_unlock(&domain->lock); |
| 1525 | 1531 | ||
| 1526 | return 0; | 1532 | return ret; |
| 1527 | } | 1533 | } |
| 1528 | 1534 | ||
| 1529 | /* | 1535 | /* |
| @@ -2324,10 +2330,6 @@ int __init amd_iommu_init_dma_ops(void) | |||
| 2324 | 2330 | ||
| 2325 | iommu_detected = 1; | 2331 | iommu_detected = 1; |
| 2326 | swiotlb = 0; | 2332 | swiotlb = 0; |
| 2327 | #ifdef CONFIG_GART_IOMMU | ||
| 2328 | gart_iommu_aperture_disabled = 1; | ||
| 2329 | gart_iommu_aperture = 0; | ||
| 2330 | #endif | ||
| 2331 | 2333 | ||
| 2332 | /* Make the driver finally visible to the drivers */ | 2334 | /* Make the driver finally visible to the drivers */ |
| 2333 | dma_ops = &amd_iommu_dma_ops; | 2335 | dma_ops = &amd_iommu_dma_ops; |
diff --git a/arch/x86/kernel/amd_iommu_init.c b/arch/x86/kernel/amd_iommu_init.c index 3bacb4d0844c..3cc63e2b8dd4 100644 --- a/arch/x86/kernel/amd_iommu_init.c +++ b/arch/x86/kernel/amd_iommu_init.c | |||
| @@ -287,8 +287,12 @@ static u8 * __init iommu_map_mmio_space(u64 address) | |||
| 287 | { | 287 | { |
| 288 | u8 *ret; | 288 | u8 *ret; |
| 289 | 289 | ||
| 290 | if (!request_mem_region(address, MMIO_REGION_LENGTH, "amd_iommu")) | 290 | if (!request_mem_region(address, MMIO_REGION_LENGTH, "amd_iommu")) { |
| 291 | pr_err("AMD-Vi: Can not reserve memory region %llx for mmio\n", | ||
| 292 | address); | ||
| 293 | pr_err("AMD-Vi: This is a BIOS bug. Please contact your hardware vendor\n"); | ||
| 291 | return NULL; | 294 | return NULL; |
| 295 | } | ||
| 292 | 296 | ||
| 293 | ret = ioremap_nocache(address, MMIO_REGION_LENGTH); | 297 | ret = ioremap_nocache(address, MMIO_REGION_LENGTH); |
| 294 | if (ret != NULL) | 298 | if (ret != NULL) |
| @@ -1314,7 +1318,7 @@ static int __init amd_iommu_init(void) | |||
| 1314 | ret = amd_iommu_init_dma_ops(); | 1318 | ret = amd_iommu_init_dma_ops(); |
| 1315 | 1319 | ||
| 1316 | if (ret) | 1320 | if (ret) |
| 1317 | goto free; | 1321 | goto free_disable; |
| 1318 | 1322 | ||
| 1319 | amd_iommu_init_api(); | 1323 | amd_iommu_init_api(); |
| 1320 | 1324 | ||
| @@ -1332,9 +1336,10 @@ static int __init amd_iommu_init(void) | |||
| 1332 | out: | 1336 | out: |
| 1333 | return ret; | 1337 | return ret; |
| 1334 | 1338 | ||
| 1335 | free: | 1339 | free_disable: |
| 1336 | disable_iommus(); | 1340 | disable_iommus(); |
| 1337 | 1341 | ||
| 1342 | free: | ||
| 1338 | amd_iommu_uninit_devices(); | 1343 | amd_iommu_uninit_devices(); |
| 1339 | 1344 | ||
| 1340 | free_pages((unsigned long)amd_iommu_pd_alloc_bitmap, | 1345 | free_pages((unsigned long)amd_iommu_pd_alloc_bitmap, |
| @@ -1353,6 +1358,15 @@ free: | |||
| 1353 | 1358 | ||
| 1354 | free_unity_maps(); | 1359 | free_unity_maps(); |
| 1355 | 1360 | ||
| 1361 | #ifdef CONFIG_GART_IOMMU | ||
| 1362 | /* | ||
| 1363 | * We failed to initialize the AMD IOMMU - try fallback to GART | ||
| 1364 | * if possible. | ||
| 1365 | */ | ||
| 1366 | gart_iommu_init(); | ||
| 1367 | |||
| 1368 | #endif | ||
| 1369 | |||
| 1356 | goto out; | 1370 | goto out; |
| 1357 | } | 1371 | } |
| 1358 | 1372 | ||
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c index 192cd7ee35cc..0bcc5aeda998 100644 --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c | |||
| @@ -51,6 +51,7 @@ | |||
| 51 | #include <asm/smp.h> | 51 | #include <asm/smp.h> |
| 52 | #include <asm/mce.h> | 52 | #include <asm/mce.h> |
| 53 | #include <asm/kvm_para.h> | 53 | #include <asm/kvm_para.h> |
| 54 | #include <asm/tsc.h> | ||
| 54 | 55 | ||
| 55 | unsigned int num_processors; | 56 | unsigned int num_processors; |
| 56 | 57 | ||
| @@ -1151,8 +1152,13 @@ static void __cpuinit lapic_setup_esr(void) | |||
| 1151 | */ | 1152 | */ |
| 1152 | void __cpuinit setup_local_APIC(void) | 1153 | void __cpuinit setup_local_APIC(void) |
| 1153 | { | 1154 | { |
| 1154 | unsigned int value; | 1155 | unsigned int value, queued; |
| 1155 | int i, j; | 1156 | int i, j, acked = 0; |
| 1157 | unsigned long long tsc = 0, ntsc; | ||
| 1158 | long long max_loops = cpu_khz; | ||
| 1159 | |||
| 1160 | if (cpu_has_tsc) | ||
| 1161 | rdtscll(tsc); | ||
| 1156 | 1162 | ||
| 1157 | if (disable_apic) { | 1163 | if (disable_apic) { |
| 1158 | arch_disable_smp_support(); | 1164 | arch_disable_smp_support(); |
| @@ -1204,13 +1210,32 @@ void __cpuinit setup_local_APIC(void) | |||
| 1204 | * the interrupt. Hence a vector might get locked. It was noticed | 1210 | * the interrupt. Hence a vector might get locked. It was noticed |
| 1205 | * for timer irq (vector 0x31). Issue an extra EOI to clear ISR. | 1211 | * for timer irq (vector 0x31). Issue an extra EOI to clear ISR. |
| 1206 | */ | 1212 | */ |
| 1207 | for (i = APIC_ISR_NR - 1; i >= 0; i--) { | 1213 | do { |
| 1208 | value = apic_read(APIC_ISR + i*0x10); | 1214 | queued = 0; |
| 1209 | for (j = 31; j >= 0; j--) { | 1215 | for (i = APIC_ISR_NR - 1; i >= 0; i--) |
| 1210 | if (value & (1<<j)) | 1216 | queued |= apic_read(APIC_IRR + i*0x10); |
| 1211 | ack_APIC_irq(); | 1217 | |
| 1218 | for (i = APIC_ISR_NR - 1; i >= 0; i--) { | ||
| 1219 | value = apic_read(APIC_ISR + i*0x10); | ||
| 1220 | for (j = 31; j >= 0; j--) { | ||
| 1221 | if (value & (1<<j)) { | ||
| 1222 | ack_APIC_irq(); | ||
| 1223 | acked++; | ||
| 1224 | } | ||
| 1225 | } | ||
| 1212 | } | 1226 | } |
| 1213 | } | 1227 | if (acked > 256) { |
| 1228 | printk(KERN_ERR "LAPIC pending interrupts after %d EOI\n", | ||
| 1229 | acked); | ||
| 1230 | break; | ||
| 1231 | } | ||
| 1232 | if (cpu_has_tsc) { | ||
| 1233 | rdtscll(ntsc); | ||
| 1234 | max_loops = (cpu_khz << 10) - (ntsc - tsc); | ||
| 1235 | } else | ||
| 1236 | max_loops--; | ||
| 1237 | } while (queued && max_loops > 0); | ||
| 1238 | WARN_ON(max_loops <= 0); | ||
| 1214 | 1239 | ||
| 1215 | /* | 1240 | /* |
| 1216 | * Now that we are all set up, enable the APIC | 1241 | * Now that we are all set up, enable the APIC |
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index cc83a002786e..68e4a6f2211e 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c | |||
| @@ -1121,9 +1121,9 @@ void __cpuinit cpu_init(void) | |||
| 1121 | oist = &per_cpu(orig_ist, cpu); | 1121 | oist = &per_cpu(orig_ist, cpu); |
| 1122 | 1122 | ||
| 1123 | #ifdef CONFIG_NUMA | 1123 | #ifdef CONFIG_NUMA |
| 1124 | if (cpu != 0 && percpu_read(node_number) == 0 && | 1124 | if (cpu != 0 && percpu_read(numa_node) == 0 && |
| 1125 | cpu_to_node(cpu) != NUMA_NO_NODE) | 1125 | early_cpu_to_node(cpu) != NUMA_NO_NODE) |
| 1126 | percpu_write(node_number, cpu_to_node(cpu)); | 1126 | set_numa_node(early_cpu_to_node(cpu)); |
| 1127 | #endif | 1127 | #endif |
| 1128 | 1128 | ||
| 1129 | me = current; | 1129 | me = current; |
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c index 6f3dc8fbbfdc..7ec2123838e6 100644 --- a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c +++ b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c | |||
| @@ -1497,8 +1497,8 @@ static struct cpufreq_driver cpufreq_amd64_driver = { | |||
| 1497 | * simply keep the boost-disable flag in sync with the current global | 1497 | * simply keep the boost-disable flag in sync with the current global |
| 1498 | * state. | 1498 | * state. |
| 1499 | */ | 1499 | */ |
| 1500 | static int __cpuinit cpb_notify(struct notifier_block *nb, unsigned long action, | 1500 | static int cpb_notify(struct notifier_block *nb, unsigned long action, |
| 1501 | void *hcpu) | 1501 | void *hcpu) |
| 1502 | { | 1502 | { |
| 1503 | unsigned cpu = (long)hcpu; | 1503 | unsigned cpu = (long)hcpu; |
| 1504 | u32 lo, hi; | 1504 | u32 lo, hi; |
| @@ -1528,7 +1528,7 @@ static int __cpuinit cpb_notify(struct notifier_block *nb, unsigned long action, | |||
| 1528 | return NOTIFY_OK; | 1528 | return NOTIFY_OK; |
| 1529 | } | 1529 | } |
| 1530 | 1530 | ||
| 1531 | static struct notifier_block __cpuinitdata cpb_nb = { | 1531 | static struct notifier_block cpb_nb = { |
| 1532 | .notifier_call = cpb_notify, | 1532 | .notifier_call = cpb_notify, |
| 1533 | }; | 1533 | }; |
| 1534 | 1534 | ||
diff --git a/arch/x86/kernel/cpu/mcheck/Makefile b/arch/x86/kernel/cpu/mcheck/Makefile index 4ac6d48fe11b..bb34b03af252 100644 --- a/arch/x86/kernel/cpu/mcheck/Makefile +++ b/arch/x86/kernel/cpu/mcheck/Makefile | |||
| @@ -7,3 +7,5 @@ obj-$(CONFIG_X86_MCE_THRESHOLD) += threshold.o | |||
| 7 | obj-$(CONFIG_X86_MCE_INJECT) += mce-inject.o | 7 | obj-$(CONFIG_X86_MCE_INJECT) += mce-inject.o |
| 8 | 8 | ||
| 9 | obj-$(CONFIG_X86_THERMAL_VECTOR) += therm_throt.o | 9 | obj-$(CONFIG_X86_THERMAL_VECTOR) += therm_throt.o |
| 10 | |||
| 11 | obj-$(CONFIG_ACPI_APEI) += mce-apei.o | ||
diff --git a/arch/x86/kernel/cpu/mcheck/mce-apei.c b/arch/x86/kernel/cpu/mcheck/mce-apei.c new file mode 100644 index 000000000000..745b54f9be89 --- /dev/null +++ b/arch/x86/kernel/cpu/mcheck/mce-apei.c | |||
| @@ -0,0 +1,138 @@ | |||
| 1 | /* | ||
| 2 | * Bridge between MCE and APEI | ||
| 3 | * | ||
| 4 | * On some machine, corrected memory errors are reported via APEI | ||
| 5 | * generic hardware error source (GHES) instead of corrected Machine | ||
| 6 | * Check. These corrected memory errors can be reported to user space | ||
| 7 | * through /dev/mcelog via faking a corrected Machine Check, so that | ||
| 8 | * the error memory page can be offlined by /sbin/mcelog if the error | ||
| 9 | * count for one page is beyond the threshold. | ||
| 10 | * | ||
| 11 | * For fatal MCE, save MCE record into persistent storage via ERST, so | ||
| 12 | * that the MCE record can be logged after reboot via ERST. | ||
| 13 | * | ||
| 14 | * Copyright 2010 Intel Corp. | ||
| 15 | * Author: Huang Ying <ying.huang@intel.com> | ||
| 16 | * | ||
| 17 | * This program is free software; you can redistribute it and/or | ||
| 18 | * modify it under the terms of the GNU General Public License version | ||
| 19 | * 2 as published by the Free Software Foundation. | ||
| 20 | * | ||
| 21 | * This program is distributed in the hope that it will be useful, | ||
| 22 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 23 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 24 | * GNU General Public License for more details. | ||
| 25 | * | ||
| 26 | * You should have received a copy of the GNU General Public License | ||
| 27 | * along with this program; if not, write to the Free Software | ||
| 28 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 29 | */ | ||
| 30 | |||
| 31 | #include <linux/kernel.h> | ||
| 32 | #include <linux/acpi.h> | ||
| 33 | #include <linux/cper.h> | ||
| 34 | #include <acpi/apei.h> | ||
| 35 | #include <asm/mce.h> | ||
| 36 | |||
| 37 | #include "mce-internal.h" | ||
| 38 | |||
| 39 | void apei_mce_report_mem_error(int corrected, struct cper_sec_mem_err *mem_err) | ||
| 40 | { | ||
| 41 | struct mce m; | ||
| 42 | |||
| 43 | /* Only corrected MC is reported */ | ||
| 44 | if (!corrected) | ||
| 45 | return; | ||
| 46 | |||
| 47 | mce_setup(&m); | ||
| 48 | m.bank = 1; | ||
| 49 | /* Fake a memory read corrected error with unknown channel */ | ||
| 50 | m.status = MCI_STATUS_VAL | MCI_STATUS_EN | MCI_STATUS_ADDRV | 0x9f; | ||
| 51 | m.addr = mem_err->physical_addr; | ||
| 52 | mce_log(&m); | ||
| 53 | mce_notify_irq(); | ||
| 54 | } | ||
| 55 | EXPORT_SYMBOL_GPL(apei_mce_report_mem_error); | ||
| 56 | |||
| 57 | #define CPER_CREATOR_MCE \ | ||
| 58 | UUID_LE(0x75a574e3, 0x5052, 0x4b29, 0x8a, 0x8e, 0xbe, 0x2c, \ | ||
| 59 | 0x64, 0x90, 0xb8, 0x9d) | ||
| 60 | #define CPER_SECTION_TYPE_MCE \ | ||
| 61 | UUID_LE(0xfe08ffbe, 0x95e4, 0x4be7, 0xbc, 0x73, 0x40, 0x96, \ | ||
| 62 | 0x04, 0x4a, 0x38, 0xfc) | ||
| 63 | |||
| 64 | /* | ||
| 65 | * CPER specification (in UEFI specification 2.3 appendix N) requires | ||
| 66 | * byte-packed. | ||
| 67 | */ | ||
| 68 | struct cper_mce_record { | ||
| 69 | struct cper_record_header hdr; | ||
| 70 | struct cper_section_descriptor sec_hdr; | ||
| 71 | struct mce mce; | ||
| 72 | } __packed; | ||
| 73 | |||
| 74 | int apei_write_mce(struct mce *m) | ||
| 75 | { | ||
| 76 | struct cper_mce_record rcd; | ||
| 77 | |||
| 78 | memset(&rcd, 0, sizeof(rcd)); | ||
| 79 | memcpy(rcd.hdr.signature, CPER_SIG_RECORD, CPER_SIG_SIZE); | ||
| 80 | rcd.hdr.revision = CPER_RECORD_REV; | ||
| 81 | rcd.hdr.signature_end = CPER_SIG_END; | ||
| 82 | rcd.hdr.section_count = 1; | ||
| 83 | rcd.hdr.error_severity = CPER_SER_FATAL; | ||
| 84 | /* timestamp, platform_id, partition_id are all invalid */ | ||
| 85 | rcd.hdr.validation_bits = 0; | ||
| 86 | rcd.hdr.record_length = sizeof(rcd); | ||
| 87 | rcd.hdr.creator_id = CPER_CREATOR_MCE; | ||
| 88 | rcd.hdr.notification_type = CPER_NOTIFY_MCE; | ||
| 89 | rcd.hdr.record_id = cper_next_record_id(); | ||
| 90 | rcd.hdr.flags = CPER_HW_ERROR_FLAGS_PREVERR; | ||
| 91 | |||
| 92 | rcd.sec_hdr.section_offset = (void *)&rcd.mce - (void *)&rcd; | ||
| 93 | rcd.sec_hdr.section_length = sizeof(rcd.mce); | ||
| 94 | rcd.sec_hdr.revision = CPER_SEC_REV; | ||
| 95 | /* fru_id and fru_text is invalid */ | ||
| 96 | rcd.sec_hdr.validation_bits = 0; | ||
| 97 | rcd.sec_hdr.flags = CPER_SEC_PRIMARY; | ||
| 98 | rcd.sec_hdr.section_type = CPER_SECTION_TYPE_MCE; | ||
| 99 | rcd.sec_hdr.section_severity = CPER_SER_FATAL; | ||
| 100 | |||
| 101 | memcpy(&rcd.mce, m, sizeof(*m)); | ||
| 102 | |||
| 103 | return erst_write(&rcd.hdr); | ||
| 104 | } | ||
| 105 | |||
| 106 | ssize_t apei_read_mce(struct mce *m, u64 *record_id) | ||
| 107 | { | ||
| 108 | struct cper_mce_record rcd; | ||
| 109 | ssize_t len; | ||
| 110 | |||
| 111 | len = erst_read_next(&rcd.hdr, sizeof(rcd)); | ||
| 112 | if (len <= 0) | ||
| 113 | return len; | ||
| 114 | /* Can not skip other records in storage via ERST unless clear them */ | ||
| 115 | else if (len != sizeof(rcd) || | ||
| 116 | uuid_le_cmp(rcd.hdr.creator_id, CPER_CREATOR_MCE)) { | ||
| 117 | if (printk_ratelimit()) | ||
| 118 | pr_warning( | ||
| 119 | "MCE-APEI: Can not skip the unknown record in ERST"); | ||
| 120 | return -EIO; | ||
| 121 | } | ||
| 122 | |||
| 123 | memcpy(m, &rcd.mce, sizeof(*m)); | ||
| 124 | *record_id = rcd.hdr.record_id; | ||
| 125 | |||
| 126 | return sizeof(*m); | ||
| 127 | } | ||
| 128 | |||
| 129 | /* Check whether there is record in ERST */ | ||
| 130 | int apei_check_mce(void) | ||
| 131 | { | ||
| 132 | return erst_get_record_count(); | ||
| 133 | } | ||
| 134 | |||
| 135 | int apei_clear_mce(u64 record_id) | ||
| 136 | { | ||
| 137 | return erst_clear(record_id); | ||
| 138 | } | ||
diff --git a/arch/x86/kernel/cpu/mcheck/mce-internal.h b/arch/x86/kernel/cpu/mcheck/mce-internal.h index 32996f9fab67..fefcc69ee8b5 100644 --- a/arch/x86/kernel/cpu/mcheck/mce-internal.h +++ b/arch/x86/kernel/cpu/mcheck/mce-internal.h | |||
| @@ -28,3 +28,26 @@ extern int mce_ser; | |||
| 28 | 28 | ||
| 29 | extern struct mce_bank *mce_banks; | 29 | extern struct mce_bank *mce_banks; |
| 30 | 30 | ||
| 31 | #ifdef CONFIG_ACPI_APEI | ||
| 32 | int apei_write_mce(struct mce *m); | ||
| 33 | ssize_t apei_read_mce(struct mce *m, u64 *record_id); | ||
| 34 | int apei_check_mce(void); | ||
| 35 | int apei_clear_mce(u64 record_id); | ||
| 36 | #else | ||
| 37 | static inline int apei_write_mce(struct mce *m) | ||
| 38 | { | ||
| 39 | return -EINVAL; | ||
| 40 | } | ||
| 41 | static inline ssize_t apei_read_mce(struct mce *m, u64 *record_id) | ||
| 42 | { | ||
| 43 | return 0; | ||
| 44 | } | ||
| 45 | static inline int apei_check_mce(void) | ||
| 46 | { | ||
| 47 | return 0; | ||
| 48 | } | ||
| 49 | static inline int apei_clear_mce(u64 record_id) | ||
| 50 | { | ||
| 51 | return -EINVAL; | ||
| 52 | } | ||
| 53 | #endif | ||
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c index 7a355ddcc64b..18cc42562250 100644 --- a/arch/x86/kernel/cpu/mcheck/mce.c +++ b/arch/x86/kernel/cpu/mcheck/mce.c | |||
| @@ -36,6 +36,7 @@ | |||
| 36 | #include <linux/fs.h> | 36 | #include <linux/fs.h> |
| 37 | #include <linux/mm.h> | 37 | #include <linux/mm.h> |
| 38 | #include <linux/debugfs.h> | 38 | #include <linux/debugfs.h> |
| 39 | #include <linux/edac_mce.h> | ||
| 39 | 40 | ||
| 40 | #include <asm/processor.h> | 41 | #include <asm/processor.h> |
| 41 | #include <asm/hw_irq.h> | 42 | #include <asm/hw_irq.h> |
| @@ -169,6 +170,15 @@ void mce_log(struct mce *mce) | |||
| 169 | entry = rcu_dereference_check_mce(mcelog.next); | 170 | entry = rcu_dereference_check_mce(mcelog.next); |
| 170 | for (;;) { | 171 | for (;;) { |
| 171 | /* | 172 | /* |
| 173 | * If edac_mce is enabled, it will check the error type | ||
| 174 | * and will process it, if it is a known error. | ||
| 175 | * Otherwise, the error will be sent through mcelog | ||
| 176 | * interface | ||
| 177 | */ | ||
| 178 | if (edac_mce_parse(mce)) | ||
| 179 | return; | ||
| 180 | |||
| 181 | /* | ||
| 172 | * When the buffer fills up discard new entries. | 182 | * When the buffer fills up discard new entries. |
| 173 | * Assume that the earlier errors are the more | 183 | * Assume that the earlier errors are the more |
| 174 | * interesting ones: | 184 | * interesting ones: |
| @@ -264,7 +274,7 @@ static void wait_for_panic(void) | |||
| 264 | 274 | ||
| 265 | static void mce_panic(char *msg, struct mce *final, char *exp) | 275 | static void mce_panic(char *msg, struct mce *final, char *exp) |
| 266 | { | 276 | { |
| 267 | int i; | 277 | int i, apei_err = 0; |
| 268 | 278 | ||
| 269 | if (!fake_panic) { | 279 | if (!fake_panic) { |
| 270 | /* | 280 | /* |
| @@ -287,8 +297,11 @@ static void mce_panic(char *msg, struct mce *final, char *exp) | |||
| 287 | struct mce *m = &mcelog.entry[i]; | 297 | struct mce *m = &mcelog.entry[i]; |
| 288 | if (!(m->status & MCI_STATUS_VAL)) | 298 | if (!(m->status & MCI_STATUS_VAL)) |
| 289 | continue; | 299 | continue; |
| 290 | if (!(m->status & MCI_STATUS_UC)) | 300 | if (!(m->status & MCI_STATUS_UC)) { |
| 291 | print_mce(m); | 301 | print_mce(m); |
| 302 | if (!apei_err) | ||
| 303 | apei_err = apei_write_mce(m); | ||
| 304 | } | ||
| 292 | } | 305 | } |
| 293 | /* Now print uncorrected but with the final one last */ | 306 | /* Now print uncorrected but with the final one last */ |
| 294 | for (i = 0; i < MCE_LOG_LEN; i++) { | 307 | for (i = 0; i < MCE_LOG_LEN; i++) { |
| @@ -297,11 +310,17 @@ static void mce_panic(char *msg, struct mce *final, char *exp) | |||
| 297 | continue; | 310 | continue; |
| 298 | if (!(m->status & MCI_STATUS_UC)) | 311 | if (!(m->status & MCI_STATUS_UC)) |
| 299 | continue; | 312 | continue; |
| 300 | if (!final || memcmp(m, final, sizeof(struct mce))) | 313 | if (!final || memcmp(m, final, sizeof(struct mce))) { |
| 301 | print_mce(m); | 314 | print_mce(m); |
| 315 | if (!apei_err) | ||
| 316 | apei_err = apei_write_mce(m); | ||
| 317 | } | ||
| 302 | } | 318 | } |
| 303 | if (final) | 319 | if (final) { |
| 304 | print_mce(final); | 320 | print_mce(final); |
| 321 | if (!apei_err) | ||
| 322 | apei_err = apei_write_mce(final); | ||
| 323 | } | ||
| 305 | if (cpu_missing) | 324 | if (cpu_missing) |
| 306 | printk(KERN_EMERG "Some CPUs didn't answer in synchronization\n"); | 325 | printk(KERN_EMERG "Some CPUs didn't answer in synchronization\n"); |
| 307 | print_mce_tail(); | 326 | print_mce_tail(); |
| @@ -1493,6 +1512,43 @@ static void collect_tscs(void *data) | |||
| 1493 | rdtscll(cpu_tsc[smp_processor_id()]); | 1512 | rdtscll(cpu_tsc[smp_processor_id()]); |
| 1494 | } | 1513 | } |
| 1495 | 1514 | ||
| 1515 | static int mce_apei_read_done; | ||
| 1516 | |||
| 1517 | /* Collect MCE record of previous boot in persistent storage via APEI ERST. */ | ||
| 1518 | static int __mce_read_apei(char __user **ubuf, size_t usize) | ||
| 1519 | { | ||
| 1520 | int rc; | ||
| 1521 | u64 record_id; | ||
| 1522 | struct mce m; | ||
| 1523 | |||
| 1524 | if (usize < sizeof(struct mce)) | ||
| 1525 | return -EINVAL; | ||
| 1526 | |||
| 1527 | rc = apei_read_mce(&m, &record_id); | ||
| 1528 | /* Error or no more MCE record */ | ||
| 1529 | if (rc <= 0) { | ||
| 1530 | mce_apei_read_done = 1; | ||
| 1531 | return rc; | ||
| 1532 | } | ||
| 1533 | rc = -EFAULT; | ||
| 1534 | if (copy_to_user(*ubuf, &m, sizeof(struct mce))) | ||
| 1535 | return rc; | ||
| 1536 | /* | ||
| 1537 | * In fact, we should have cleared the record after that has | ||
| 1538 | * been flushed to the disk or sent to network in | ||
| 1539 | * /sbin/mcelog, but we have no interface to support that now, | ||
| 1540 | * so just clear it to avoid duplication. | ||
| 1541 | */ | ||
| 1542 | rc = apei_clear_mce(record_id); | ||
| 1543 | if (rc) { | ||
| 1544 | mce_apei_read_done = 1; | ||
| 1545 | return rc; | ||
| 1546 | } | ||
| 1547 | *ubuf += sizeof(struct mce); | ||
| 1548 | |||
| 1549 | return 0; | ||
| 1550 | } | ||
| 1551 | |||
| 1496 | static ssize_t mce_read(struct file *filp, char __user *ubuf, size_t usize, | 1552 | static ssize_t mce_read(struct file *filp, char __user *ubuf, size_t usize, |
| 1497 | loff_t *off) | 1553 | loff_t *off) |
| 1498 | { | 1554 | { |
| @@ -1506,15 +1562,19 @@ static ssize_t mce_read(struct file *filp, char __user *ubuf, size_t usize, | |||
| 1506 | return -ENOMEM; | 1562 | return -ENOMEM; |
| 1507 | 1563 | ||
| 1508 | mutex_lock(&mce_read_mutex); | 1564 | mutex_lock(&mce_read_mutex); |
| 1565 | |||
| 1566 | if (!mce_apei_read_done) { | ||
| 1567 | err = __mce_read_apei(&buf, usize); | ||
| 1568 | if (err || buf != ubuf) | ||
| 1569 | goto out; | ||
| 1570 | } | ||
| 1571 | |||
| 1509 | next = rcu_dereference_check_mce(mcelog.next); | 1572 | next = rcu_dereference_check_mce(mcelog.next); |
| 1510 | 1573 | ||
| 1511 | /* Only supports full reads right now */ | 1574 | /* Only supports full reads right now */ |
| 1512 | if (*off != 0 || usize < MCE_LOG_LEN*sizeof(struct mce)) { | 1575 | err = -EINVAL; |
| 1513 | mutex_unlock(&mce_read_mutex); | 1576 | if (*off != 0 || usize < MCE_LOG_LEN*sizeof(struct mce)) |
| 1514 | kfree(cpu_tsc); | 1577 | goto out; |
| 1515 | |||
| 1516 | return -EINVAL; | ||
| 1517 | } | ||
| 1518 | 1578 | ||
| 1519 | err = 0; | 1579 | err = 0; |
| 1520 | prev = 0; | 1580 | prev = 0; |
| @@ -1562,10 +1622,15 @@ timeout: | |||
| 1562 | memset(&mcelog.entry[i], 0, sizeof(struct mce)); | 1622 | memset(&mcelog.entry[i], 0, sizeof(struct mce)); |
| 1563 | } | 1623 | } |
| 1564 | } | 1624 | } |
| 1625 | |||
| 1626 | if (err) | ||
| 1627 | err = -EFAULT; | ||
| 1628 | |||
| 1629 | out: | ||
| 1565 | mutex_unlock(&mce_read_mutex); | 1630 | mutex_unlock(&mce_read_mutex); |
| 1566 | kfree(cpu_tsc); | 1631 | kfree(cpu_tsc); |
| 1567 | 1632 | ||
| 1568 | return err ? -EFAULT : buf - ubuf; | 1633 | return err ? err : buf - ubuf; |
| 1569 | } | 1634 | } |
| 1570 | 1635 | ||
| 1571 | static unsigned int mce_poll(struct file *file, poll_table *wait) | 1636 | static unsigned int mce_poll(struct file *file, poll_table *wait) |
| @@ -1573,6 +1638,8 @@ static unsigned int mce_poll(struct file *file, poll_table *wait) | |||
| 1573 | poll_wait(file, &mce_wait, wait); | 1638 | poll_wait(file, &mce_wait, wait); |
| 1574 | if (rcu_dereference_check_mce(mcelog.next)) | 1639 | if (rcu_dereference_check_mce(mcelog.next)) |
| 1575 | return POLLIN | POLLRDNORM; | 1640 | return POLLIN | POLLRDNORM; |
| 1641 | if (!mce_apei_read_done && apei_check_mce()) | ||
| 1642 | return POLLIN | POLLRDNORM; | ||
| 1576 | return 0; | 1643 | return 0; |
| 1577 | } | 1644 | } |
| 1578 | 1645 | ||
diff --git a/arch/x86/kernel/cpu/mcheck/therm_throt.c b/arch/x86/kernel/cpu/mcheck/therm_throt.c index 81c499eceb21..e1a0a3bf9716 100644 --- a/arch/x86/kernel/cpu/mcheck/therm_throt.c +++ b/arch/x86/kernel/cpu/mcheck/therm_throt.c | |||
| @@ -190,7 +190,7 @@ thermal_throttle_cpu_callback(struct notifier_block *nfb, | |||
| 190 | mutex_unlock(&therm_cpu_lock); | 190 | mutex_unlock(&therm_cpu_lock); |
| 191 | break; | 191 | break; |
| 192 | } | 192 | } |
| 193 | return err ? NOTIFY_BAD : NOTIFY_OK; | 193 | return notifier_from_errno(err); |
| 194 | } | 194 | } |
| 195 | 195 | ||
| 196 | static struct notifier_block thermal_throttle_cpu_notifier __cpuinitdata = | 196 | static struct notifier_block thermal_throttle_cpu_notifier __cpuinitdata = |
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c index fd4db0db3708..5db5b7d65a18 100644 --- a/arch/x86/kernel/cpu/perf_event.c +++ b/arch/x86/kernel/cpu/perf_event.c | |||
| @@ -106,6 +106,7 @@ struct cpu_hw_events { | |||
| 106 | 106 | ||
| 107 | int n_events; | 107 | int n_events; |
| 108 | int n_added; | 108 | int n_added; |
| 109 | int n_txn; | ||
| 109 | int assign[X86_PMC_IDX_MAX]; /* event to counter assignment */ | 110 | int assign[X86_PMC_IDX_MAX]; /* event to counter assignment */ |
| 110 | u64 tags[X86_PMC_IDX_MAX]; | 111 | u64 tags[X86_PMC_IDX_MAX]; |
| 111 | struct perf_event *event_list[X86_PMC_IDX_MAX]; /* in enabled order */ | 112 | struct perf_event *event_list[X86_PMC_IDX_MAX]; /* in enabled order */ |
| @@ -983,6 +984,7 @@ static int x86_pmu_enable(struct perf_event *event) | |||
| 983 | out: | 984 | out: |
| 984 | cpuc->n_events = n; | 985 | cpuc->n_events = n; |
| 985 | cpuc->n_added += n - n0; | 986 | cpuc->n_added += n - n0; |
| 987 | cpuc->n_txn += n - n0; | ||
| 986 | 988 | ||
| 987 | return 0; | 989 | return 0; |
| 988 | } | 990 | } |
| @@ -1089,6 +1091,14 @@ static void x86_pmu_disable(struct perf_event *event) | |||
| 1089 | struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); | 1091 | struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); |
| 1090 | int i; | 1092 | int i; |
| 1091 | 1093 | ||
| 1094 | /* | ||
| 1095 | * If we're called during a txn, we don't need to do anything. | ||
| 1096 | * The events never got scheduled and ->cancel_txn will truncate | ||
| 1097 | * the event_list. | ||
| 1098 | */ | ||
| 1099 | if (cpuc->group_flag & PERF_EVENT_TXN_STARTED) | ||
| 1100 | return; | ||
| 1101 | |||
| 1092 | x86_pmu_stop(event); | 1102 | x86_pmu_stop(event); |
| 1093 | 1103 | ||
| 1094 | for (i = 0; i < cpuc->n_events; i++) { | 1104 | for (i = 0; i < cpuc->n_events; i++) { |
| @@ -1379,6 +1389,7 @@ static void x86_pmu_start_txn(const struct pmu *pmu) | |||
| 1379 | struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); | 1389 | struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); |
| 1380 | 1390 | ||
| 1381 | cpuc->group_flag |= PERF_EVENT_TXN_STARTED; | 1391 | cpuc->group_flag |= PERF_EVENT_TXN_STARTED; |
| 1392 | cpuc->n_txn = 0; | ||
| 1382 | } | 1393 | } |
| 1383 | 1394 | ||
| 1384 | /* | 1395 | /* |
| @@ -1391,6 +1402,11 @@ static void x86_pmu_cancel_txn(const struct pmu *pmu) | |||
| 1391 | struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); | 1402 | struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); |
| 1392 | 1403 | ||
| 1393 | cpuc->group_flag &= ~PERF_EVENT_TXN_STARTED; | 1404 | cpuc->group_flag &= ~PERF_EVENT_TXN_STARTED; |
| 1405 | /* | ||
| 1406 | * Truncate the collected events. | ||
| 1407 | */ | ||
| 1408 | cpuc->n_added -= cpuc->n_txn; | ||
| 1409 | cpuc->n_events -= cpuc->n_txn; | ||
| 1394 | } | 1410 | } |
| 1395 | 1411 | ||
| 1396 | /* | 1412 | /* |
| @@ -1419,6 +1435,12 @@ static int x86_pmu_commit_txn(const struct pmu *pmu) | |||
| 1419 | */ | 1435 | */ |
| 1420 | memcpy(cpuc->assign, assign, n*sizeof(int)); | 1436 | memcpy(cpuc->assign, assign, n*sizeof(int)); |
| 1421 | 1437 | ||
| 1438 | /* | ||
| 1439 | * Clear out the txn count so that ->cancel_txn() which gets | ||
| 1440 | * run after ->commit_txn() doesn't undo things. | ||
| 1441 | */ | ||
| 1442 | cpuc->n_txn = 0; | ||
| 1443 | |||
| 1422 | return 0; | 1444 | return 0; |
| 1423 | } | 1445 | } |
| 1424 | 1446 | ||
| @@ -1717,7 +1739,11 @@ void perf_arch_fetch_caller_regs(struct pt_regs *regs, unsigned long ip, int ski | |||
| 1717 | */ | 1739 | */ |
| 1718 | regs->bp = rewind_frame_pointer(skip + 1); | 1740 | regs->bp = rewind_frame_pointer(skip + 1); |
| 1719 | regs->cs = __KERNEL_CS; | 1741 | regs->cs = __KERNEL_CS; |
| 1720 | local_save_flags(regs->flags); | 1742 | /* |
| 1743 | * We abuse bit 3 to pass exact information, see perf_misc_flags | ||
| 1744 | * and the comment with PERF_EFLAGS_EXACT. | ||
| 1745 | */ | ||
| 1746 | regs->flags = 0; | ||
| 1721 | } | 1747 | } |
| 1722 | 1748 | ||
| 1723 | unsigned long perf_instruction_pointer(struct pt_regs *regs) | 1749 | unsigned long perf_instruction_pointer(struct pt_regs *regs) |
diff --git a/arch/x86/kernel/cpu/perf_event_p4.c b/arch/x86/kernel/cpu/perf_event_p4.c index 424fc8de68e4..ae85d69644d1 100644 --- a/arch/x86/kernel/cpu/perf_event_p4.c +++ b/arch/x86/kernel/cpu/perf_event_p4.c | |||
| @@ -465,15 +465,21 @@ out: | |||
| 465 | return rc; | 465 | return rc; |
| 466 | } | 466 | } |
| 467 | 467 | ||
| 468 | static inline void p4_pmu_clear_cccr_ovf(struct hw_perf_event *hwc) | 468 | static inline int p4_pmu_clear_cccr_ovf(struct hw_perf_event *hwc) |
| 469 | { | 469 | { |
| 470 | unsigned long dummy; | 470 | int overflow = 0; |
| 471 | u32 low, high; | ||
| 471 | 472 | ||
| 472 | rdmsrl(hwc->config_base + hwc->idx, dummy); | 473 | rdmsr(hwc->config_base + hwc->idx, low, high); |
| 473 | if (dummy & P4_CCCR_OVF) { | 474 | |
| 475 | /* we need to check high bit for unflagged overflows */ | ||
| 476 | if ((low & P4_CCCR_OVF) || !(high & (1 << 31))) { | ||
| 477 | overflow = 1; | ||
| 474 | (void)checking_wrmsrl(hwc->config_base + hwc->idx, | 478 | (void)checking_wrmsrl(hwc->config_base + hwc->idx, |
| 475 | ((u64)dummy) & ~P4_CCCR_OVF); | 479 | ((u64)low) & ~P4_CCCR_OVF); |
| 476 | } | 480 | } |
| 481 | |||
| 482 | return overflow; | ||
| 477 | } | 483 | } |
| 478 | 484 | ||
| 479 | static inline void p4_pmu_disable_event(struct perf_event *event) | 485 | static inline void p4_pmu_disable_event(struct perf_event *event) |
| @@ -584,21 +590,15 @@ static int p4_pmu_handle_irq(struct pt_regs *regs) | |||
| 584 | 590 | ||
| 585 | WARN_ON_ONCE(hwc->idx != idx); | 591 | WARN_ON_ONCE(hwc->idx != idx); |
| 586 | 592 | ||
| 587 | /* | 593 | /* it might be unflagged overflow */ |
| 588 | * FIXME: Redundant call, actually not needed | 594 | handled = p4_pmu_clear_cccr_ovf(hwc); |
| 589 | * but just to check if we're screwed | ||
| 590 | */ | ||
| 591 | p4_pmu_clear_cccr_ovf(hwc); | ||
| 592 | 595 | ||
| 593 | val = x86_perf_event_update(event); | 596 | val = x86_perf_event_update(event); |
| 594 | if (val & (1ULL << (x86_pmu.cntval_bits - 1))) | 597 | if (!handled && (val & (1ULL << (x86_pmu.cntval_bits - 1)))) |
| 595 | continue; | 598 | continue; |
| 596 | 599 | ||
| 597 | /* | 600 | /* event overflow for sure */ |
| 598 | * event overflow | 601 | data.period = event->hw.last_period; |
| 599 | */ | ||
| 600 | handled = 1; | ||
| 601 | data.period = event->hw.last_period; | ||
| 602 | 602 | ||
| 603 | if (!x86_perf_event_set_period(event)) | 603 | if (!x86_perf_event_set_period(event)) |
| 604 | continue; | 604 | continue; |
| @@ -670,7 +670,7 @@ static void p4_pmu_swap_config_ts(struct hw_perf_event *hwc, int cpu) | |||
| 670 | 670 | ||
| 671 | /* | 671 | /* |
| 672 | * ESCR address hashing is tricky, ESCRs are not sequential | 672 | * ESCR address hashing is tricky, ESCRs are not sequential |
| 673 | * in memory but all starts from MSR_P4_BSU_ESCR0 (0x03e0) and | 673 | * in memory but all starts from MSR_P4_BSU_ESCR0 (0x03a0) and |
| 674 | * the metric between any ESCRs is laid in range [0xa0,0xe1] | 674 | * the metric between any ESCRs is laid in range [0xa0,0xe1] |
| 675 | * | 675 | * |
| 676 | * so we make ~70% filled hashtable | 676 | * so we make ~70% filled hashtable |
| @@ -735,8 +735,9 @@ static int p4_get_escr_idx(unsigned int addr) | |||
| 735 | { | 735 | { |
| 736 | unsigned int idx = P4_ESCR_MSR_IDX(addr); | 736 | unsigned int idx = P4_ESCR_MSR_IDX(addr); |
| 737 | 737 | ||
| 738 | if (unlikely(idx >= P4_ESCR_MSR_TABLE_SIZE || | 738 | if (unlikely(idx >= P4_ESCR_MSR_TABLE_SIZE || |
| 739 | !p4_escr_table[idx])) { | 739 | !p4_escr_table[idx] || |
| 740 | p4_escr_table[idx] != addr)) { | ||
| 740 | WARN_ONCE(1, "P4 PMU: Wrong address passed: %x\n", addr); | 741 | WARN_ONCE(1, "P4 PMU: Wrong address passed: %x\n", addr); |
| 741 | return -1; | 742 | return -1; |
| 742 | } | 743 | } |
| @@ -762,7 +763,7 @@ static int p4_pmu_schedule_events(struct cpu_hw_events *cpuc, int n, int *assign | |||
| 762 | { | 763 | { |
| 763 | unsigned long used_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)]; | 764 | unsigned long used_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)]; |
| 764 | unsigned long escr_mask[BITS_TO_LONGS(P4_ESCR_MSR_TABLE_SIZE)]; | 765 | unsigned long escr_mask[BITS_TO_LONGS(P4_ESCR_MSR_TABLE_SIZE)]; |
| 765 | int cpu = raw_smp_processor_id(); | 766 | int cpu = smp_processor_id(); |
| 766 | struct hw_perf_event *hwc; | 767 | struct hw_perf_event *hwc; |
| 767 | struct p4_event_bind *bind; | 768 | struct p4_event_bind *bind; |
| 768 | unsigned int i, thread, num; | 769 | unsigned int i, thread, num; |
diff --git a/arch/x86/kernel/cpuid.c b/arch/x86/kernel/cpuid.c index 8b862d5900fe..1b7b31ab7d86 100644 --- a/arch/x86/kernel/cpuid.c +++ b/arch/x86/kernel/cpuid.c | |||
| @@ -170,7 +170,7 @@ static int __cpuinit cpuid_class_cpu_callback(struct notifier_block *nfb, | |||
| 170 | cpuid_device_destroy(cpu); | 170 | cpuid_device_destroy(cpu); |
| 171 | break; | 171 | break; |
| 172 | } | 172 | } |
| 173 | return err ? NOTIFY_BAD : NOTIFY_OK; | 173 | return notifier_from_errno(err); |
| 174 | } | 174 | } |
| 175 | 175 | ||
| 176 | static struct notifier_block __refdata cpuid_class_cpu_notifier = | 176 | static struct notifier_block __refdata cpuid_class_cpu_notifier = |
diff --git a/arch/x86/kernel/init_task.c b/arch/x86/kernel/init_task.c index 3a54dcb9cd0e..43e9ccf44947 100644 --- a/arch/x86/kernel/init_task.c +++ b/arch/x86/kernel/init_task.c | |||
| @@ -34,7 +34,7 @@ EXPORT_SYMBOL(init_task); | |||
| 34 | /* | 34 | /* |
| 35 | * per-CPU TSS segments. Threads are completely 'soft' on Linux, | 35 | * per-CPU TSS segments. Threads are completely 'soft' on Linux, |
| 36 | * no more per-task TSS's. The TSS size is kept cacheline-aligned | 36 | * no more per-task TSS's. The TSS size is kept cacheline-aligned |
| 37 | * so they are allowed to end up in the .data.cacheline_aligned | 37 | * so they are allowed to end up in the .data..cacheline_aligned |
| 38 | * section. Since TSS's are completely CPU-local, we want them | 38 | * section. Since TSS's are completely CPU-local, we want them |
| 39 | * on exact cacheline boundaries, to eliminate cacheline ping-pong. | 39 | * on exact cacheline boundaries, to eliminate cacheline ping-pong. |
| 40 | */ | 40 | */ |
diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index feaeb0d3aa4f..eb9b76c716c2 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c | |||
| @@ -29,6 +29,8 @@ | |||
| 29 | #define KVM_SCALE 22 | 29 | #define KVM_SCALE 22 |
| 30 | 30 | ||
| 31 | static int kvmclock = 1; | 31 | static int kvmclock = 1; |
| 32 | static int msr_kvm_system_time = MSR_KVM_SYSTEM_TIME; | ||
| 33 | static int msr_kvm_wall_clock = MSR_KVM_WALL_CLOCK; | ||
| 32 | 34 | ||
| 33 | static int parse_no_kvmclock(char *arg) | 35 | static int parse_no_kvmclock(char *arg) |
| 34 | { | 36 | { |
| @@ -54,7 +56,8 @@ static unsigned long kvm_get_wallclock(void) | |||
| 54 | 56 | ||
| 55 | low = (int)__pa_symbol(&wall_clock); | 57 | low = (int)__pa_symbol(&wall_clock); |
| 56 | high = ((u64)__pa_symbol(&wall_clock) >> 32); | 58 | high = ((u64)__pa_symbol(&wall_clock) >> 32); |
| 57 | native_write_msr(MSR_KVM_WALL_CLOCK, low, high); | 59 | |
| 60 | native_write_msr(msr_kvm_wall_clock, low, high); | ||
| 58 | 61 | ||
| 59 | vcpu_time = &get_cpu_var(hv_clock); | 62 | vcpu_time = &get_cpu_var(hv_clock); |
| 60 | pvclock_read_wallclock(&wall_clock, vcpu_time, &ts); | 63 | pvclock_read_wallclock(&wall_clock, vcpu_time, &ts); |
| @@ -130,7 +133,8 @@ static int kvm_register_clock(char *txt) | |||
| 130 | high = ((u64)__pa(&per_cpu(hv_clock, cpu)) >> 32); | 133 | high = ((u64)__pa(&per_cpu(hv_clock, cpu)) >> 32); |
| 131 | printk(KERN_INFO "kvm-clock: cpu %d, msr %x:%x, %s\n", | 134 | printk(KERN_INFO "kvm-clock: cpu %d, msr %x:%x, %s\n", |
| 132 | cpu, high, low, txt); | 135 | cpu, high, low, txt); |
| 133 | return native_write_msr_safe(MSR_KVM_SYSTEM_TIME, low, high); | 136 | |
| 137 | return native_write_msr_safe(msr_kvm_system_time, low, high); | ||
| 134 | } | 138 | } |
| 135 | 139 | ||
| 136 | #ifdef CONFIG_X86_LOCAL_APIC | 140 | #ifdef CONFIG_X86_LOCAL_APIC |
| @@ -165,14 +169,14 @@ static void __init kvm_smp_prepare_boot_cpu(void) | |||
| 165 | #ifdef CONFIG_KEXEC | 169 | #ifdef CONFIG_KEXEC |
| 166 | static void kvm_crash_shutdown(struct pt_regs *regs) | 170 | static void kvm_crash_shutdown(struct pt_regs *regs) |
| 167 | { | 171 | { |
| 168 | native_write_msr_safe(MSR_KVM_SYSTEM_TIME, 0, 0); | 172 | native_write_msr(msr_kvm_system_time, 0, 0); |
| 169 | native_machine_crash_shutdown(regs); | 173 | native_machine_crash_shutdown(regs); |
| 170 | } | 174 | } |
| 171 | #endif | 175 | #endif |
| 172 | 176 | ||
| 173 | static void kvm_shutdown(void) | 177 | static void kvm_shutdown(void) |
| 174 | { | 178 | { |
| 175 | native_write_msr_safe(MSR_KVM_SYSTEM_TIME, 0, 0); | 179 | native_write_msr(msr_kvm_system_time, 0, 0); |
| 176 | native_machine_shutdown(); | 180 | native_machine_shutdown(); |
| 177 | } | 181 | } |
| 178 | 182 | ||
| @@ -181,27 +185,37 @@ void __init kvmclock_init(void) | |||
| 181 | if (!kvm_para_available()) | 185 | if (!kvm_para_available()) |
| 182 | return; | 186 | return; |
| 183 | 187 | ||
| 184 | if (kvmclock && kvm_para_has_feature(KVM_FEATURE_CLOCKSOURCE)) { | 188 | if (kvmclock && kvm_para_has_feature(KVM_FEATURE_CLOCKSOURCE2)) { |
| 185 | if (kvm_register_clock("boot clock")) | 189 | msr_kvm_system_time = MSR_KVM_SYSTEM_TIME_NEW; |
| 186 | return; | 190 | msr_kvm_wall_clock = MSR_KVM_WALL_CLOCK_NEW; |
| 187 | pv_time_ops.sched_clock = kvm_clock_read; | 191 | } else if (!(kvmclock && kvm_para_has_feature(KVM_FEATURE_CLOCKSOURCE))) |
| 188 | x86_platform.calibrate_tsc = kvm_get_tsc_khz; | 192 | return; |
| 189 | x86_platform.get_wallclock = kvm_get_wallclock; | 193 | |
| 190 | x86_platform.set_wallclock = kvm_set_wallclock; | 194 | printk(KERN_INFO "kvm-clock: Using msrs %x and %x", |
| 195 | msr_kvm_system_time, msr_kvm_wall_clock); | ||
| 196 | |||
| 197 | if (kvm_register_clock("boot clock")) | ||
| 198 | return; | ||
| 199 | pv_time_ops.sched_clock = kvm_clock_read; | ||
| 200 | x86_platform.calibrate_tsc = kvm_get_tsc_khz; | ||
| 201 | x86_platform.get_wallclock = kvm_get_wallclock; | ||
| 202 | x86_platform.set_wallclock = kvm_set_wallclock; | ||
| 191 | #ifdef CONFIG_X86_LOCAL_APIC | 203 | #ifdef CONFIG_X86_LOCAL_APIC |
| 192 | x86_cpuinit.setup_percpu_clockev = | 204 | x86_cpuinit.setup_percpu_clockev = |
| 193 | kvm_setup_secondary_clock; | 205 | kvm_setup_secondary_clock; |
| 194 | #endif | 206 | #endif |
| 195 | #ifdef CONFIG_SMP | 207 | #ifdef CONFIG_SMP |
| 196 | smp_ops.smp_prepare_boot_cpu = kvm_smp_prepare_boot_cpu; | 208 | smp_ops.smp_prepare_boot_cpu = kvm_smp_prepare_boot_cpu; |
| 197 | #endif | 209 | #endif |
| 198 | machine_ops.shutdown = kvm_shutdown; | 210 | machine_ops.shutdown = kvm_shutdown; |
| 199 | #ifdef CONFIG_KEXEC | 211 | #ifdef CONFIG_KEXEC |
| 200 | machine_ops.crash_shutdown = kvm_crash_shutdown; | 212 | machine_ops.crash_shutdown = kvm_crash_shutdown; |
| 201 | #endif | 213 | #endif |
| 202 | kvm_get_preset_lpj(); | 214 | kvm_get_preset_lpj(); |
| 203 | clocksource_register(&kvm_clock); | 215 | clocksource_register(&kvm_clock); |
| 204 | pv_info.paravirt_enabled = 1; | 216 | pv_info.paravirt_enabled = 1; |
| 205 | pv_info.name = "KVM"; | 217 | pv_info.name = "KVM"; |
| 206 | } | 218 | |
| 219 | if (kvm_para_has_feature(KVM_FEATURE_CLOCKSOURCE_STABLE_BIT)) | ||
| 220 | pvclock_set_flags(PVCLOCK_TSC_STABLE_BIT); | ||
| 207 | } | 221 | } |
diff --git a/arch/x86/kernel/microcode_core.c b/arch/x86/kernel/microcode_core.c index 2cd8c544e41a..fa6551d36c10 100644 --- a/arch/x86/kernel/microcode_core.c +++ b/arch/x86/kernel/microcode_core.c | |||
| @@ -260,6 +260,7 @@ static void microcode_dev_exit(void) | |||
| 260 | } | 260 | } |
| 261 | 261 | ||
| 262 | MODULE_ALIAS_MISCDEV(MICROCODE_MINOR); | 262 | MODULE_ALIAS_MISCDEV(MICROCODE_MINOR); |
| 263 | MODULE_ALIAS("devname:cpu/microcode"); | ||
| 263 | #else | 264 | #else |
| 264 | #define microcode_dev_init() 0 | 265 | #define microcode_dev_init() 0 |
| 265 | #define microcode_dev_exit() do { } while (0) | 266 | #define microcode_dev_exit() do { } while (0) |
diff --git a/arch/x86/kernel/msr.c b/arch/x86/kernel/msr.c index 4d4468e9f47c..7bf2dc4c8f70 100644 --- a/arch/x86/kernel/msr.c +++ b/arch/x86/kernel/msr.c | |||
| @@ -230,7 +230,7 @@ static int __cpuinit msr_class_cpu_callback(struct notifier_block *nfb, | |||
| 230 | msr_device_destroy(cpu); | 230 | msr_device_destroy(cpu); |
| 231 | break; | 231 | break; |
| 232 | } | 232 | } |
| 233 | return err ? NOTIFY_BAD : NOTIFY_OK; | 233 | return notifier_from_errno(err); |
| 234 | } | 234 | } |
| 235 | 235 | ||
| 236 | static struct notifier_block __refdata msr_class_cpu_notifier = { | 236 | static struct notifier_block __refdata msr_class_cpu_notifier = { |
diff --git a/arch/x86/kernel/pci-swiotlb.c b/arch/x86/kernel/pci-swiotlb.c index 7d2829dde20e..a5bc528d4328 100644 --- a/arch/x86/kernel/pci-swiotlb.c +++ b/arch/x86/kernel/pci-swiotlb.c | |||
| @@ -31,8 +31,6 @@ static struct dma_map_ops swiotlb_dma_ops = { | |||
| 31 | .free_coherent = swiotlb_free_coherent, | 31 | .free_coherent = swiotlb_free_coherent, |
| 32 | .sync_single_for_cpu = swiotlb_sync_single_for_cpu, | 32 | .sync_single_for_cpu = swiotlb_sync_single_for_cpu, |
| 33 | .sync_single_for_device = swiotlb_sync_single_for_device, | 33 | .sync_single_for_device = swiotlb_sync_single_for_device, |
| 34 | .sync_single_range_for_cpu = swiotlb_sync_single_range_for_cpu, | ||
| 35 | .sync_single_range_for_device = swiotlb_sync_single_range_for_device, | ||
| 36 | .sync_sg_for_cpu = swiotlb_sync_sg_for_cpu, | 34 | .sync_sg_for_cpu = swiotlb_sync_sg_for_cpu, |
| 37 | .sync_sg_for_device = swiotlb_sync_sg_for_device, | 35 | .sync_sg_for_device = swiotlb_sync_sg_for_device, |
| 38 | .map_sg = swiotlb_map_sg_attrs, | 36 | .map_sg = swiotlb_map_sg_attrs, |
diff --git a/arch/x86/kernel/pvclock.c b/arch/x86/kernel/pvclock.c index 03801f2f761f..239427ca02af 100644 --- a/arch/x86/kernel/pvclock.c +++ b/arch/x86/kernel/pvclock.c | |||
| @@ -31,8 +31,16 @@ struct pvclock_shadow_time { | |||
| 31 | u32 tsc_to_nsec_mul; | 31 | u32 tsc_to_nsec_mul; |
| 32 | int tsc_shift; | 32 | int tsc_shift; |
| 33 | u32 version; | 33 | u32 version; |
| 34 | u8 flags; | ||
| 34 | }; | 35 | }; |
| 35 | 36 | ||
| 37 | static u8 valid_flags __read_mostly = 0; | ||
| 38 | |||
| 39 | void pvclock_set_flags(u8 flags) | ||
| 40 | { | ||
| 41 | valid_flags = flags; | ||
| 42 | } | ||
| 43 | |||
| 36 | /* | 44 | /* |
| 37 | * Scale a 64-bit delta by scaling and multiplying by a 32-bit fraction, | 45 | * Scale a 64-bit delta by scaling and multiplying by a 32-bit fraction, |
| 38 | * yielding a 64-bit result. | 46 | * yielding a 64-bit result. |
| @@ -91,6 +99,7 @@ static unsigned pvclock_get_time_values(struct pvclock_shadow_time *dst, | |||
| 91 | dst->system_timestamp = src->system_time; | 99 | dst->system_timestamp = src->system_time; |
| 92 | dst->tsc_to_nsec_mul = src->tsc_to_system_mul; | 100 | dst->tsc_to_nsec_mul = src->tsc_to_system_mul; |
| 93 | dst->tsc_shift = src->tsc_shift; | 101 | dst->tsc_shift = src->tsc_shift; |
| 102 | dst->flags = src->flags; | ||
| 94 | rmb(); /* test version after fetching data */ | 103 | rmb(); /* test version after fetching data */ |
| 95 | } while ((src->version & 1) || (dst->version != src->version)); | 104 | } while ((src->version & 1) || (dst->version != src->version)); |
| 96 | 105 | ||
| @@ -109,11 +118,14 @@ unsigned long pvclock_tsc_khz(struct pvclock_vcpu_time_info *src) | |||
| 109 | return pv_tsc_khz; | 118 | return pv_tsc_khz; |
| 110 | } | 119 | } |
| 111 | 120 | ||
| 121 | static atomic64_t last_value = ATOMIC64_INIT(0); | ||
| 122 | |||
| 112 | cycle_t pvclock_clocksource_read(struct pvclock_vcpu_time_info *src) | 123 | cycle_t pvclock_clocksource_read(struct pvclock_vcpu_time_info *src) |
| 113 | { | 124 | { |
| 114 | struct pvclock_shadow_time shadow; | 125 | struct pvclock_shadow_time shadow; |
| 115 | unsigned version; | 126 | unsigned version; |
| 116 | cycle_t ret, offset; | 127 | cycle_t ret, offset; |
| 128 | u64 last; | ||
| 117 | 129 | ||
| 118 | do { | 130 | do { |
| 119 | version = pvclock_get_time_values(&shadow, src); | 131 | version = pvclock_get_time_values(&shadow, src); |
| @@ -123,6 +135,31 @@ cycle_t pvclock_clocksource_read(struct pvclock_vcpu_time_info *src) | |||
| 123 | barrier(); | 135 | barrier(); |
| 124 | } while (version != src->version); | 136 | } while (version != src->version); |
| 125 | 137 | ||
| 138 | if ((valid_flags & PVCLOCK_TSC_STABLE_BIT) && | ||
| 139 | (shadow.flags & PVCLOCK_TSC_STABLE_BIT)) | ||
| 140 | return ret; | ||
| 141 | |||
| 142 | /* | ||
| 143 | * Assumption here is that last_value, a global accumulator, always goes | ||
| 144 | * forward. If we are less than that, we should not be much smaller. | ||
| 145 | * We assume there is an error marging we're inside, and then the correction | ||
| 146 | * does not sacrifice accuracy. | ||
| 147 | * | ||
| 148 | * For reads: global may have changed between test and return, | ||
| 149 | * but this means someone else updated poked the clock at a later time. | ||
| 150 | * We just need to make sure we are not seeing a backwards event. | ||
| 151 | * | ||
| 152 | * For updates: last_value = ret is not enough, since two vcpus could be | ||
| 153 | * updating at the same time, and one of them could be slightly behind, | ||
| 154 | * making the assumption that last_value always go forward fail to hold. | ||
| 155 | */ | ||
| 156 | last = atomic64_read(&last_value); | ||
| 157 | do { | ||
| 158 | if (ret < last) | ||
| 159 | return last; | ||
| 160 | last = atomic64_cmpxchg(&last_value, last, ret); | ||
| 161 | } while (unlikely(last != ret)); | ||
| 162 | |||
| 126 | return ret; | 163 | return ret; |
| 127 | } | 164 | } |
| 128 | 165 | ||
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c index e8029896309a..b4ae4acbd031 100644 --- a/arch/x86/kernel/setup.c +++ b/arch/x86/kernel/setup.c | |||
| @@ -676,6 +676,17 @@ static struct dmi_system_id __initdata bad_bios_dmi_table[] = { | |||
| 676 | DMI_MATCH(DMI_BOARD_NAME, "DG45FC"), | 676 | DMI_MATCH(DMI_BOARD_NAME, "DG45FC"), |
| 677 | }, | 677 | }, |
| 678 | }, | 678 | }, |
| 679 | /* | ||
| 680 | * The Dell Inspiron Mini 1012 has DMI_BIOS_VENDOR = "Dell Inc.", so | ||
| 681 | * match on the product name. | ||
| 682 | */ | ||
| 683 | { | ||
| 684 | .callback = dmi_low_memory_corruption, | ||
| 685 | .ident = "Phoenix BIOS", | ||
| 686 | .matches = { | ||
| 687 | DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 1012"), | ||
| 688 | }, | ||
| 689 | }, | ||
| 679 | #endif | 690 | #endif |
| 680 | {} | 691 | {} |
| 681 | }; | 692 | }; |
diff --git a/arch/x86/kernel/setup_percpu.c b/arch/x86/kernel/setup_percpu.c index ef6370b00e70..de3b63ae3da2 100644 --- a/arch/x86/kernel/setup_percpu.c +++ b/arch/x86/kernel/setup_percpu.c | |||
| @@ -21,12 +21,6 @@ | |||
| 21 | #include <asm/cpu.h> | 21 | #include <asm/cpu.h> |
| 22 | #include <asm/stackprotector.h> | 22 | #include <asm/stackprotector.h> |
| 23 | 23 | ||
| 24 | #ifdef CONFIG_DEBUG_PER_CPU_MAPS | ||
| 25 | # define DBG(fmt, ...) pr_dbg(fmt, ##__VA_ARGS__) | ||
| 26 | #else | ||
| 27 | # define DBG(fmt, ...) do { if (0) pr_dbg(fmt, ##__VA_ARGS__); } while (0) | ||
| 28 | #endif | ||
| 29 | |||
| 30 | DEFINE_PER_CPU(int, cpu_number); | 24 | DEFINE_PER_CPU(int, cpu_number); |
| 31 | EXPORT_PER_CPU_SYMBOL(cpu_number); | 25 | EXPORT_PER_CPU_SYMBOL(cpu_number); |
| 32 | 26 | ||
| @@ -247,7 +241,7 @@ void __init setup_per_cpu_areas(void) | |||
| 247 | #endif | 241 | #endif |
| 248 | #endif | 242 | #endif |
| 249 | /* | 243 | /* |
| 250 | * Up to this point, the boot CPU has been using .data.init | 244 | * Up to this point, the boot CPU has been using .init.data |
| 251 | * area. Reload any changed state for the boot CPU. | 245 | * area. Reload any changed state for the boot CPU. |
| 252 | */ | 246 | */ |
| 253 | if (cpu == boot_cpu_id) | 247 | if (cpu == boot_cpu_id) |
| @@ -265,10 +259,10 @@ void __init setup_per_cpu_areas(void) | |||
| 265 | 259 | ||
| 266 | #if defined(CONFIG_X86_64) && defined(CONFIG_NUMA) | 260 | #if defined(CONFIG_X86_64) && defined(CONFIG_NUMA) |
| 267 | /* | 261 | /* |
| 268 | * make sure boot cpu node_number is right, when boot cpu is on the | 262 | * make sure boot cpu numa_node is right, when boot cpu is on the |
| 269 | * node that doesn't have mem installed | 263 | * node that doesn't have mem installed |
| 270 | */ | 264 | */ |
| 271 | per_cpu(node_number, boot_cpu_id) = cpu_to_node(boot_cpu_id); | 265 | set_cpu_numa_node(boot_cpu_id, early_cpu_to_node(boot_cpu_id)); |
| 272 | #endif | 266 | #endif |
| 273 | 267 | ||
| 274 | /* Setup node to cpumask map */ | 268 | /* Setup node to cpumask map */ |
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c index 763d815e27a0..c4f33b2e77d6 100644 --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c | |||
| @@ -686,7 +686,7 @@ static void __cpuinit do_fork_idle(struct work_struct *work) | |||
| 686 | static void __cpuinit announce_cpu(int cpu, int apicid) | 686 | static void __cpuinit announce_cpu(int cpu, int apicid) |
| 687 | { | 687 | { |
| 688 | static int current_node = -1; | 688 | static int current_node = -1; |
| 689 | int node = cpu_to_node(cpu); | 689 | int node = early_cpu_to_node(cpu); |
| 690 | 690 | ||
| 691 | if (system_state == SYSTEM_BOOTING) { | 691 | if (system_state == SYSTEM_BOOTING) { |
| 692 | if (node != current_node) { | 692 | if (node != current_node) { |
| @@ -1215,9 +1215,17 @@ __init void prefill_possible_map(void) | |||
| 1215 | if (!num_processors) | 1215 | if (!num_processors) |
| 1216 | num_processors = 1; | 1216 | num_processors = 1; |
| 1217 | 1217 | ||
| 1218 | if (setup_possible_cpus == -1) | 1218 | i = setup_max_cpus ?: 1; |
| 1219 | possible = num_processors + disabled_cpus; | 1219 | if (setup_possible_cpus == -1) { |
| 1220 | else | 1220 | possible = num_processors; |
| 1221 | #ifdef CONFIG_HOTPLUG_CPU | ||
| 1222 | if (setup_max_cpus) | ||
| 1223 | possible += disabled_cpus; | ||
| 1224 | #else | ||
| 1225 | if (possible > i) | ||
| 1226 | possible = i; | ||
| 1227 | #endif | ||
| 1228 | } else | ||
| 1221 | possible = setup_possible_cpus; | 1229 | possible = setup_possible_cpus; |
| 1222 | 1230 | ||
| 1223 | total_cpus = max_t(int, possible, num_processors + disabled_cpus); | 1231 | total_cpus = max_t(int, possible, num_processors + disabled_cpus); |
| @@ -1230,11 +1238,23 @@ __init void prefill_possible_map(void) | |||
| 1230 | possible = nr_cpu_ids; | 1238 | possible = nr_cpu_ids; |
| 1231 | } | 1239 | } |
| 1232 | 1240 | ||
| 1241 | #ifdef CONFIG_HOTPLUG_CPU | ||
| 1242 | if (!setup_max_cpus) | ||
| 1243 | #endif | ||
| 1244 | if (possible > i) { | ||
| 1245 | printk(KERN_WARNING | ||
| 1246 | "%d Processors exceeds max_cpus limit of %u\n", | ||
| 1247 | possible, setup_max_cpus); | ||
| 1248 | possible = i; | ||
| 1249 | } | ||
| 1250 | |||
| 1233 | printk(KERN_INFO "SMP: Allowing %d CPUs, %d hotplug CPUs\n", | 1251 | printk(KERN_INFO "SMP: Allowing %d CPUs, %d hotplug CPUs\n", |
| 1234 | possible, max_t(int, possible - num_processors, 0)); | 1252 | possible, max_t(int, possible - num_processors, 0)); |
| 1235 | 1253 | ||
| 1236 | for (i = 0; i < possible; i++) | 1254 | for (i = 0; i < possible; i++) |
| 1237 | set_cpu_possible(i, true); | 1255 | set_cpu_possible(i, true); |
| 1256 | for (; i < NR_CPUS; i++) | ||
| 1257 | set_cpu_possible(i, false); | ||
| 1238 | 1258 | ||
| 1239 | nr_cpu_ids = possible; | 1259 | nr_cpu_ids = possible; |
| 1240 | } | 1260 | } |
diff --git a/arch/x86/kernel/tboot.c b/arch/x86/kernel/tboot.c index cc2c60474fd0..c2f1b26141e2 100644 --- a/arch/x86/kernel/tboot.c +++ b/arch/x86/kernel/tboot.c | |||
| @@ -46,6 +46,7 @@ | |||
| 46 | 46 | ||
| 47 | /* Global pointer to shared data; NULL means no measured launch. */ | 47 | /* Global pointer to shared data; NULL means no measured launch. */ |
| 48 | struct tboot *tboot __read_mostly; | 48 | struct tboot *tboot __read_mostly; |
| 49 | EXPORT_SYMBOL(tboot); | ||
| 49 | 50 | ||
| 50 | /* timeout for APs (in secs) to enter wait-for-SIPI state during shutdown */ | 51 | /* timeout for APs (in secs) to enter wait-for-SIPI state during shutdown */ |
| 51 | #define AP_WAIT_TIMEOUT 1 | 52 | #define AP_WAIT_TIMEOUT 1 |
diff --git a/arch/x86/kernel/vmlinux.lds.S b/arch/x86/kernel/vmlinux.lds.S index 2cc249718c46..d0bb52296fa3 100644 --- a/arch/x86/kernel/vmlinux.lds.S +++ b/arch/x86/kernel/vmlinux.lds.S | |||
| @@ -97,7 +97,7 @@ SECTIONS | |||
| 97 | HEAD_TEXT | 97 | HEAD_TEXT |
| 98 | #ifdef CONFIG_X86_32 | 98 | #ifdef CONFIG_X86_32 |
| 99 | . = ALIGN(PAGE_SIZE); | 99 | . = ALIGN(PAGE_SIZE); |
| 100 | *(.text.page_aligned) | 100 | *(.text..page_aligned) |
| 101 | #endif | 101 | #endif |
| 102 | . = ALIGN(8); | 102 | . = ALIGN(8); |
| 103 | _stext = .; | 103 | _stext = .; |
| @@ -305,7 +305,7 @@ SECTIONS | |||
| 305 | . = ALIGN(PAGE_SIZE); | 305 | . = ALIGN(PAGE_SIZE); |
| 306 | .bss : AT(ADDR(.bss) - LOAD_OFFSET) { | 306 | .bss : AT(ADDR(.bss) - LOAD_OFFSET) { |
| 307 | __bss_start = .; | 307 | __bss_start = .; |
| 308 | *(.bss.page_aligned) | 308 | *(.bss..page_aligned) |
| 309 | *(.bss) | 309 | *(.bss) |
| 310 | . = ALIGN(4); | 310 | . = ALIGN(4); |
| 311 | __bss_stop = .; | 311 | __bss_stop = .; |
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c index 4dade6ac0827..5ac0bb465ed6 100644 --- a/arch/x86/kvm/emulate.c +++ b/arch/x86/kvm/emulate.c | |||
| @@ -33,6 +33,7 @@ | |||
| 33 | #include <asm/kvm_emulate.h> | 33 | #include <asm/kvm_emulate.h> |
| 34 | 34 | ||
| 35 | #include "x86.h" | 35 | #include "x86.h" |
| 36 | #include "tss.h" | ||
| 36 | 37 | ||
| 37 | /* | 38 | /* |
| 38 | * Opcode effective-address decode tables. | 39 | * Opcode effective-address decode tables. |
| @@ -50,6 +51,8 @@ | |||
| 50 | #define DstReg (2<<1) /* Register operand. */ | 51 | #define DstReg (2<<1) /* Register operand. */ |
| 51 | #define DstMem (3<<1) /* Memory operand. */ | 52 | #define DstMem (3<<1) /* Memory operand. */ |
| 52 | #define DstAcc (4<<1) /* Destination Accumulator */ | 53 | #define DstAcc (4<<1) /* Destination Accumulator */ |
| 54 | #define DstDI (5<<1) /* Destination is in ES:(E)DI */ | ||
| 55 | #define DstMem64 (6<<1) /* 64bit memory operand */ | ||
| 53 | #define DstMask (7<<1) | 56 | #define DstMask (7<<1) |
| 54 | /* Source operand type. */ | 57 | /* Source operand type. */ |
| 55 | #define SrcNone (0<<4) /* No source operand. */ | 58 | #define SrcNone (0<<4) /* No source operand. */ |
| @@ -63,6 +66,7 @@ | |||
| 63 | #define SrcOne (7<<4) /* Implied '1' */ | 66 | #define SrcOne (7<<4) /* Implied '1' */ |
| 64 | #define SrcImmUByte (8<<4) /* 8-bit unsigned immediate operand. */ | 67 | #define SrcImmUByte (8<<4) /* 8-bit unsigned immediate operand. */ |
| 65 | #define SrcImmU (9<<4) /* Immediate operand, unsigned */ | 68 | #define SrcImmU (9<<4) /* Immediate operand, unsigned */ |
| 69 | #define SrcSI (0xa<<4) /* Source is in the DS:RSI */ | ||
| 66 | #define SrcMask (0xf<<4) | 70 | #define SrcMask (0xf<<4) |
| 67 | /* Generic ModRM decode. */ | 71 | /* Generic ModRM decode. */ |
| 68 | #define ModRM (1<<8) | 72 | #define ModRM (1<<8) |
| @@ -85,6 +89,9 @@ | |||
| 85 | #define Src2ImmByte (2<<29) | 89 | #define Src2ImmByte (2<<29) |
| 86 | #define Src2One (3<<29) | 90 | #define Src2One (3<<29) |
| 87 | #define Src2Imm16 (4<<29) | 91 | #define Src2Imm16 (4<<29) |
| 92 | #define Src2Mem16 (5<<29) /* Used for Ep encoding. First argument has to be | ||
| 93 | in memory and second argument is located | ||
| 94 | immediately after the first one in memory. */ | ||
| 88 | #define Src2Mask (7<<29) | 95 | #define Src2Mask (7<<29) |
| 89 | 96 | ||
| 90 | enum { | 97 | enum { |
| @@ -147,8 +154,8 @@ static u32 opcode_table[256] = { | |||
| 147 | 0, 0, 0, 0, | 154 | 0, 0, 0, 0, |
| 148 | /* 0x68 - 0x6F */ | 155 | /* 0x68 - 0x6F */ |
| 149 | SrcImm | Mov | Stack, 0, SrcImmByte | Mov | Stack, 0, | 156 | SrcImm | Mov | Stack, 0, SrcImmByte | Mov | Stack, 0, |
| 150 | SrcNone | ByteOp | ImplicitOps, SrcNone | ImplicitOps, /* insb, insw/insd */ | 157 | DstDI | ByteOp | Mov | String, DstDI | Mov | String, /* insb, insw/insd */ |
| 151 | SrcNone | ByteOp | ImplicitOps, SrcNone | ImplicitOps, /* outsb, outsw/outsd */ | 158 | SrcSI | ByteOp | ImplicitOps | String, SrcSI | ImplicitOps | String, /* outsb, outsw/outsd */ |
| 152 | /* 0x70 - 0x77 */ | 159 | /* 0x70 - 0x77 */ |
| 153 | SrcImmByte, SrcImmByte, SrcImmByte, SrcImmByte, | 160 | SrcImmByte, SrcImmByte, SrcImmByte, SrcImmByte, |
| 154 | SrcImmByte, SrcImmByte, SrcImmByte, SrcImmByte, | 161 | SrcImmByte, SrcImmByte, SrcImmByte, SrcImmByte, |
| @@ -173,12 +180,12 @@ static u32 opcode_table[256] = { | |||
| 173 | /* 0xA0 - 0xA7 */ | 180 | /* 0xA0 - 0xA7 */ |
| 174 | ByteOp | DstReg | SrcMem | Mov | MemAbs, DstReg | SrcMem | Mov | MemAbs, | 181 | ByteOp | DstReg | SrcMem | Mov | MemAbs, DstReg | SrcMem | Mov | MemAbs, |
| 175 | ByteOp | DstMem | SrcReg | Mov | MemAbs, DstMem | SrcReg | Mov | MemAbs, | 182 | ByteOp | DstMem | SrcReg | Mov | MemAbs, DstMem | SrcReg | Mov | MemAbs, |
| 176 | ByteOp | ImplicitOps | Mov | String, ImplicitOps | Mov | String, | 183 | ByteOp | SrcSI | DstDI | Mov | String, SrcSI | DstDI | Mov | String, |
| 177 | ByteOp | ImplicitOps | String, ImplicitOps | String, | 184 | ByteOp | SrcSI | DstDI | String, SrcSI | DstDI | String, |
| 178 | /* 0xA8 - 0xAF */ | 185 | /* 0xA8 - 0xAF */ |
| 179 | 0, 0, ByteOp | ImplicitOps | Mov | String, ImplicitOps | Mov | String, | 186 | 0, 0, ByteOp | DstDI | Mov | String, DstDI | Mov | String, |
| 180 | ByteOp | ImplicitOps | Mov | String, ImplicitOps | Mov | String, | 187 | ByteOp | SrcSI | DstAcc | Mov | String, SrcSI | DstAcc | Mov | String, |
| 181 | ByteOp | ImplicitOps | String, ImplicitOps | String, | 188 | ByteOp | DstDI | String, DstDI | String, |
| 182 | /* 0xB0 - 0xB7 */ | 189 | /* 0xB0 - 0xB7 */ |
| 183 | ByteOp | DstReg | SrcImm | Mov, ByteOp | DstReg | SrcImm | Mov, | 190 | ByteOp | DstReg | SrcImm | Mov, ByteOp | DstReg | SrcImm | Mov, |
| 184 | ByteOp | DstReg | SrcImm | Mov, ByteOp | DstReg | SrcImm | Mov, | 191 | ByteOp | DstReg | SrcImm | Mov, ByteOp | DstReg | SrcImm | Mov, |
| @@ -204,13 +211,13 @@ static u32 opcode_table[256] = { | |||
| 204 | 0, 0, 0, 0, 0, 0, 0, 0, | 211 | 0, 0, 0, 0, 0, 0, 0, 0, |
| 205 | /* 0xE0 - 0xE7 */ | 212 | /* 0xE0 - 0xE7 */ |
| 206 | 0, 0, 0, 0, | 213 | 0, 0, 0, 0, |
| 207 | ByteOp | SrcImmUByte, SrcImmUByte, | 214 | ByteOp | SrcImmUByte | DstAcc, SrcImmUByte | DstAcc, |
| 208 | ByteOp | SrcImmUByte, SrcImmUByte, | 215 | ByteOp | SrcImmUByte | DstAcc, SrcImmUByte | DstAcc, |
| 209 | /* 0xE8 - 0xEF */ | 216 | /* 0xE8 - 0xEF */ |
| 210 | SrcImm | Stack, SrcImm | ImplicitOps, | 217 | SrcImm | Stack, SrcImm | ImplicitOps, |
| 211 | SrcImmU | Src2Imm16 | No64, SrcImmByte | ImplicitOps, | 218 | SrcImmU | Src2Imm16 | No64, SrcImmByte | ImplicitOps, |
| 212 | SrcNone | ByteOp | ImplicitOps, SrcNone | ImplicitOps, | 219 | SrcNone | ByteOp | DstAcc, SrcNone | DstAcc, |
| 213 | SrcNone | ByteOp | ImplicitOps, SrcNone | ImplicitOps, | 220 | SrcNone | ByteOp | DstAcc, SrcNone | DstAcc, |
| 214 | /* 0xF0 - 0xF7 */ | 221 | /* 0xF0 - 0xF7 */ |
| 215 | 0, 0, 0, 0, | 222 | 0, 0, 0, 0, |
| 216 | ImplicitOps | Priv, ImplicitOps, Group | Group3_Byte, Group | Group3, | 223 | ImplicitOps | Priv, ImplicitOps, Group | Group3_Byte, Group | Group3, |
| @@ -343,7 +350,8 @@ static u32 group_table[] = { | |||
| 343 | [Group5*8] = | 350 | [Group5*8] = |
| 344 | DstMem | SrcNone | ModRM, DstMem | SrcNone | ModRM, | 351 | DstMem | SrcNone | ModRM, DstMem | SrcNone | ModRM, |
| 345 | SrcMem | ModRM | Stack, 0, | 352 | SrcMem | ModRM | Stack, 0, |
| 346 | SrcMem | ModRM | Stack, 0, SrcMem | ModRM | Stack, 0, | 353 | SrcMem | ModRM | Stack, SrcMem | ModRM | Src2Mem16 | ImplicitOps, |
| 354 | SrcMem | ModRM | Stack, 0, | ||
| 347 | [Group7*8] = | 355 | [Group7*8] = |
| 348 | 0, 0, ModRM | SrcMem | Priv, ModRM | SrcMem | Priv, | 356 | 0, 0, ModRM | SrcMem | Priv, ModRM | SrcMem | Priv, |
| 349 | SrcNone | ModRM | DstMem | Mov, 0, | 357 | SrcNone | ModRM | DstMem | Mov, 0, |
| @@ -353,14 +361,14 @@ static u32 group_table[] = { | |||
| 353 | DstMem | SrcImmByte | ModRM, DstMem | SrcImmByte | ModRM | Lock, | 361 | DstMem | SrcImmByte | ModRM, DstMem | SrcImmByte | ModRM | Lock, |
| 354 | DstMem | SrcImmByte | ModRM | Lock, DstMem | SrcImmByte | ModRM | Lock, | 362 | DstMem | SrcImmByte | ModRM | Lock, DstMem | SrcImmByte | ModRM | Lock, |
| 355 | [Group9*8] = | 363 | [Group9*8] = |
| 356 | 0, ImplicitOps | ModRM | Lock, 0, 0, 0, 0, 0, 0, | 364 | 0, DstMem64 | ModRM | Lock, 0, 0, 0, 0, 0, 0, |
| 357 | }; | 365 | }; |
| 358 | 366 | ||
| 359 | static u32 group2_table[] = { | 367 | static u32 group2_table[] = { |
| 360 | [Group7*8] = | 368 | [Group7*8] = |
| 361 | SrcNone | ModRM | Priv, 0, 0, SrcNone | ModRM, | 369 | SrcNone | ModRM | Priv, 0, 0, SrcNone | ModRM | Priv, |
| 362 | SrcNone | ModRM | DstMem | Mov, 0, | 370 | SrcNone | ModRM | DstMem | Mov, 0, |
| 363 | SrcMem16 | ModRM | Mov, 0, | 371 | SrcMem16 | ModRM | Mov | Priv, 0, |
| 364 | [Group9*8] = | 372 | [Group9*8] = |
| 365 | 0, 0, 0, 0, 0, 0, 0, 0, | 373 | 0, 0, 0, 0, 0, 0, 0, 0, |
| 366 | }; | 374 | }; |
| @@ -562,7 +570,7 @@ static u32 group2_table[] = { | |||
| 562 | #define insn_fetch(_type, _size, _eip) \ | 570 | #define insn_fetch(_type, _size, _eip) \ |
| 563 | ({ unsigned long _x; \ | 571 | ({ unsigned long _x; \ |
| 564 | rc = do_insn_fetch(ctxt, ops, (_eip), &_x, (_size)); \ | 572 | rc = do_insn_fetch(ctxt, ops, (_eip), &_x, (_size)); \ |
| 565 | if (rc != 0) \ | 573 | if (rc != X86EMUL_CONTINUE) \ |
| 566 | goto done; \ | 574 | goto done; \ |
| 567 | (_eip) += (_size); \ | 575 | (_eip) += (_size); \ |
| 568 | (_type)_x; \ | 576 | (_type)_x; \ |
| @@ -638,40 +646,40 @@ static unsigned long ss_base(struct x86_emulate_ctxt *ctxt) | |||
| 638 | 646 | ||
| 639 | static int do_fetch_insn_byte(struct x86_emulate_ctxt *ctxt, | 647 | static int do_fetch_insn_byte(struct x86_emulate_ctxt *ctxt, |
| 640 | struct x86_emulate_ops *ops, | 648 | struct x86_emulate_ops *ops, |
| 641 | unsigned long linear, u8 *dest) | 649 | unsigned long eip, u8 *dest) |
| 642 | { | 650 | { |
| 643 | struct fetch_cache *fc = &ctxt->decode.fetch; | 651 | struct fetch_cache *fc = &ctxt->decode.fetch; |
| 644 | int rc; | 652 | int rc; |
| 645 | int size; | 653 | int size, cur_size; |
| 646 | 654 | ||
| 647 | if (linear < fc->start || linear >= fc->end) { | 655 | if (eip == fc->end) { |
| 648 | size = min(15UL, PAGE_SIZE - offset_in_page(linear)); | 656 | cur_size = fc->end - fc->start; |
| 649 | rc = ops->fetch(linear, fc->data, size, ctxt->vcpu, NULL); | 657 | size = min(15UL - cur_size, PAGE_SIZE - offset_in_page(eip)); |
| 650 | if (rc) | 658 | rc = ops->fetch(ctxt->cs_base + eip, fc->data + cur_size, |
| 659 | size, ctxt->vcpu, NULL); | ||
| 660 | if (rc != X86EMUL_CONTINUE) | ||
| 651 | return rc; | 661 | return rc; |
| 652 | fc->start = linear; | 662 | fc->end += size; |
| 653 | fc->end = linear + size; | ||
| 654 | } | 663 | } |
| 655 | *dest = fc->data[linear - fc->start]; | 664 | *dest = fc->data[eip - fc->start]; |
| 656 | return 0; | 665 | return X86EMUL_CONTINUE; |
| 657 | } | 666 | } |
| 658 | 667 | ||
| 659 | static int do_insn_fetch(struct x86_emulate_ctxt *ctxt, | 668 | static int do_insn_fetch(struct x86_emulate_ctxt *ctxt, |
| 660 | struct x86_emulate_ops *ops, | 669 | struct x86_emulate_ops *ops, |
| 661 | unsigned long eip, void *dest, unsigned size) | 670 | unsigned long eip, void *dest, unsigned size) |
| 662 | { | 671 | { |
| 663 | int rc = 0; | 672 | int rc; |
| 664 | 673 | ||
| 665 | /* x86 instructions are limited to 15 bytes. */ | 674 | /* x86 instructions are limited to 15 bytes. */ |
| 666 | if (eip + size - ctxt->decode.eip_orig > 15) | 675 | if (eip + size - ctxt->eip > 15) |
| 667 | return X86EMUL_UNHANDLEABLE; | 676 | return X86EMUL_UNHANDLEABLE; |
| 668 | eip += ctxt->cs_base; | ||
| 669 | while (size--) { | 677 | while (size--) { |
| 670 | rc = do_fetch_insn_byte(ctxt, ops, eip++, dest++); | 678 | rc = do_fetch_insn_byte(ctxt, ops, eip++, dest++); |
| 671 | if (rc) | 679 | if (rc != X86EMUL_CONTINUE) |
| 672 | return rc; | 680 | return rc; |
| 673 | } | 681 | } |
| 674 | return 0; | 682 | return X86EMUL_CONTINUE; |
| 675 | } | 683 | } |
| 676 | 684 | ||
| 677 | /* | 685 | /* |
| @@ -702,7 +710,7 @@ static int read_descriptor(struct x86_emulate_ctxt *ctxt, | |||
| 702 | *address = 0; | 710 | *address = 0; |
| 703 | rc = ops->read_std((unsigned long)ptr, (unsigned long *)size, 2, | 711 | rc = ops->read_std((unsigned long)ptr, (unsigned long *)size, 2, |
| 704 | ctxt->vcpu, NULL); | 712 | ctxt->vcpu, NULL); |
| 705 | if (rc) | 713 | if (rc != X86EMUL_CONTINUE) |
| 706 | return rc; | 714 | return rc; |
| 707 | rc = ops->read_std((unsigned long)ptr + 2, address, op_bytes, | 715 | rc = ops->read_std((unsigned long)ptr + 2, address, op_bytes, |
| 708 | ctxt->vcpu, NULL); | 716 | ctxt->vcpu, NULL); |
| @@ -782,7 +790,7 @@ static int decode_modrm(struct x86_emulate_ctxt *ctxt, | |||
| 782 | struct decode_cache *c = &ctxt->decode; | 790 | struct decode_cache *c = &ctxt->decode; |
| 783 | u8 sib; | 791 | u8 sib; |
| 784 | int index_reg = 0, base_reg = 0, scale; | 792 | int index_reg = 0, base_reg = 0, scale; |
| 785 | int rc = 0; | 793 | int rc = X86EMUL_CONTINUE; |
| 786 | 794 | ||
| 787 | if (c->rex_prefix) { | 795 | if (c->rex_prefix) { |
| 788 | c->modrm_reg = (c->rex_prefix & 4) << 1; /* REX.R */ | 796 | c->modrm_reg = (c->rex_prefix & 4) << 1; /* REX.R */ |
| @@ -895,7 +903,7 @@ static int decode_abs(struct x86_emulate_ctxt *ctxt, | |||
| 895 | struct x86_emulate_ops *ops) | 903 | struct x86_emulate_ops *ops) |
| 896 | { | 904 | { |
| 897 | struct decode_cache *c = &ctxt->decode; | 905 | struct decode_cache *c = &ctxt->decode; |
| 898 | int rc = 0; | 906 | int rc = X86EMUL_CONTINUE; |
| 899 | 907 | ||
| 900 | switch (c->ad_bytes) { | 908 | switch (c->ad_bytes) { |
| 901 | case 2: | 909 | case 2: |
| @@ -916,14 +924,18 @@ int | |||
| 916 | x86_decode_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops) | 924 | x86_decode_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops) |
| 917 | { | 925 | { |
| 918 | struct decode_cache *c = &ctxt->decode; | 926 | struct decode_cache *c = &ctxt->decode; |
| 919 | int rc = 0; | 927 | int rc = X86EMUL_CONTINUE; |
| 920 | int mode = ctxt->mode; | 928 | int mode = ctxt->mode; |
| 921 | int def_op_bytes, def_ad_bytes, group; | 929 | int def_op_bytes, def_ad_bytes, group; |
| 922 | 930 | ||
| 923 | /* Shadow copy of register state. Committed on successful emulation. */ | ||
| 924 | 931 | ||
| 932 | /* we cannot decode insn before we complete previous rep insn */ | ||
| 933 | WARN_ON(ctxt->restart); | ||
| 934 | |||
| 935 | /* Shadow copy of register state. Committed on successful emulation. */ | ||
| 925 | memset(c, 0, sizeof(struct decode_cache)); | 936 | memset(c, 0, sizeof(struct decode_cache)); |
| 926 | c->eip = c->eip_orig = kvm_rip_read(ctxt->vcpu); | 937 | c->eip = ctxt->eip; |
| 938 | c->fetch.start = c->fetch.end = c->eip; | ||
| 927 | ctxt->cs_base = seg_base(ctxt, VCPU_SREG_CS); | 939 | ctxt->cs_base = seg_base(ctxt, VCPU_SREG_CS); |
| 928 | memcpy(c->regs, ctxt->vcpu->arch.regs, sizeof c->regs); | 940 | memcpy(c->regs, ctxt->vcpu->arch.regs, sizeof c->regs); |
| 929 | 941 | ||
| @@ -1015,11 +1027,6 @@ done_prefixes: | |||
| 1015 | } | 1027 | } |
| 1016 | } | 1028 | } |
| 1017 | 1029 | ||
| 1018 | if (mode == X86EMUL_MODE_PROT64 && (c->d & No64)) { | ||
| 1019 | kvm_report_emulation_failure(ctxt->vcpu, "invalid x86/64 instruction"); | ||
| 1020 | return -1; | ||
| 1021 | } | ||
| 1022 | |||
| 1023 | if (c->d & Group) { | 1030 | if (c->d & Group) { |
| 1024 | group = c->d & GroupMask; | 1031 | group = c->d & GroupMask; |
| 1025 | c->modrm = insn_fetch(u8, 1, c->eip); | 1032 | c->modrm = insn_fetch(u8, 1, c->eip); |
| @@ -1046,7 +1053,7 @@ done_prefixes: | |||
| 1046 | rc = decode_modrm(ctxt, ops); | 1053 | rc = decode_modrm(ctxt, ops); |
| 1047 | else if (c->d & MemAbs) | 1054 | else if (c->d & MemAbs) |
| 1048 | rc = decode_abs(ctxt, ops); | 1055 | rc = decode_abs(ctxt, ops); |
| 1049 | if (rc) | 1056 | if (rc != X86EMUL_CONTINUE) |
| 1050 | goto done; | 1057 | goto done; |
| 1051 | 1058 | ||
| 1052 | if (!c->has_seg_override) | 1059 | if (!c->has_seg_override) |
| @@ -1057,6 +1064,10 @@ done_prefixes: | |||
| 1057 | 1064 | ||
| 1058 | if (c->ad_bytes != 8) | 1065 | if (c->ad_bytes != 8) |
| 1059 | c->modrm_ea = (u32)c->modrm_ea; | 1066 | c->modrm_ea = (u32)c->modrm_ea; |
| 1067 | |||
| 1068 | if (c->rip_relative) | ||
| 1069 | c->modrm_ea += c->eip; | ||
| 1070 | |||
| 1060 | /* | 1071 | /* |
| 1061 | * Decode and fetch the source operand: register, memory | 1072 | * Decode and fetch the source operand: register, memory |
| 1062 | * or immediate. | 1073 | * or immediate. |
| @@ -1091,6 +1102,8 @@ done_prefixes: | |||
| 1091 | break; | 1102 | break; |
| 1092 | } | 1103 | } |
| 1093 | c->src.type = OP_MEM; | 1104 | c->src.type = OP_MEM; |
| 1105 | c->src.ptr = (unsigned long *)c->modrm_ea; | ||
| 1106 | c->src.val = 0; | ||
| 1094 | break; | 1107 | break; |
| 1095 | case SrcImm: | 1108 | case SrcImm: |
| 1096 | case SrcImmU: | 1109 | case SrcImmU: |
| @@ -1139,6 +1152,14 @@ done_prefixes: | |||
| 1139 | c->src.bytes = 1; | 1152 | c->src.bytes = 1; |
| 1140 | c->src.val = 1; | 1153 | c->src.val = 1; |
| 1141 | break; | 1154 | break; |
| 1155 | case SrcSI: | ||
| 1156 | c->src.type = OP_MEM; | ||
| 1157 | c->src.bytes = (c->d & ByteOp) ? 1 : c->op_bytes; | ||
| 1158 | c->src.ptr = (unsigned long *) | ||
| 1159 | register_address(c, seg_override_base(ctxt, c), | ||
| 1160 | c->regs[VCPU_REGS_RSI]); | ||
| 1161 | c->src.val = 0; | ||
| 1162 | break; | ||
| 1142 | } | 1163 | } |
| 1143 | 1164 | ||
| 1144 | /* | 1165 | /* |
| @@ -1168,6 +1189,12 @@ done_prefixes: | |||
| 1168 | c->src2.bytes = 1; | 1189 | c->src2.bytes = 1; |
| 1169 | c->src2.val = 1; | 1190 | c->src2.val = 1; |
| 1170 | break; | 1191 | break; |
| 1192 | case Src2Mem16: | ||
| 1193 | c->src2.type = OP_MEM; | ||
| 1194 | c->src2.bytes = 2; | ||
| 1195 | c->src2.ptr = (unsigned long *)(c->modrm_ea + c->src.bytes); | ||
| 1196 | c->src2.val = 0; | ||
| 1197 | break; | ||
| 1171 | } | 1198 | } |
| 1172 | 1199 | ||
| 1173 | /* Decode and fetch the destination operand: register or memory. */ | 1200 | /* Decode and fetch the destination operand: register or memory. */ |
| @@ -1180,6 +1207,7 @@ done_prefixes: | |||
| 1180 | c->twobyte && (c->b == 0xb6 || c->b == 0xb7)); | 1207 | c->twobyte && (c->b == 0xb6 || c->b == 0xb7)); |
| 1181 | break; | 1208 | break; |
| 1182 | case DstMem: | 1209 | case DstMem: |
| 1210 | case DstMem64: | ||
| 1183 | if ((c->d & ModRM) && c->modrm_mod == 3) { | 1211 | if ((c->d & ModRM) && c->modrm_mod == 3) { |
| 1184 | c->dst.bytes = (c->d & ByteOp) ? 1 : c->op_bytes; | 1212 | c->dst.bytes = (c->d & ByteOp) ? 1 : c->op_bytes; |
| 1185 | c->dst.type = OP_REG; | 1213 | c->dst.type = OP_REG; |
| @@ -1188,12 +1216,24 @@ done_prefixes: | |||
| 1188 | break; | 1216 | break; |
| 1189 | } | 1217 | } |
| 1190 | c->dst.type = OP_MEM; | 1218 | c->dst.type = OP_MEM; |
| 1219 | c->dst.ptr = (unsigned long *)c->modrm_ea; | ||
| 1220 | if ((c->d & DstMask) == DstMem64) | ||
| 1221 | c->dst.bytes = 8; | ||
| 1222 | else | ||
| 1223 | c->dst.bytes = (c->d & ByteOp) ? 1 : c->op_bytes; | ||
| 1224 | c->dst.val = 0; | ||
| 1225 | if (c->d & BitOp) { | ||
| 1226 | unsigned long mask = ~(c->dst.bytes * 8 - 1); | ||
| 1227 | |||
| 1228 | c->dst.ptr = (void *)c->dst.ptr + | ||
| 1229 | (c->src.val & mask) / 8; | ||
| 1230 | } | ||
| 1191 | break; | 1231 | break; |
| 1192 | case DstAcc: | 1232 | case DstAcc: |
| 1193 | c->dst.type = OP_REG; | 1233 | c->dst.type = OP_REG; |
| 1194 | c->dst.bytes = c->op_bytes; | 1234 | c->dst.bytes = (c->d & ByteOp) ? 1 : c->op_bytes; |
| 1195 | c->dst.ptr = &c->regs[VCPU_REGS_RAX]; | 1235 | c->dst.ptr = &c->regs[VCPU_REGS_RAX]; |
| 1196 | switch (c->op_bytes) { | 1236 | switch (c->dst.bytes) { |
| 1197 | case 1: | 1237 | case 1: |
| 1198 | c->dst.val = *(u8 *)c->dst.ptr; | 1238 | c->dst.val = *(u8 *)c->dst.ptr; |
| 1199 | break; | 1239 | break; |
| @@ -1203,18 +1243,248 @@ done_prefixes: | |||
| 1203 | case 4: | 1243 | case 4: |
| 1204 | c->dst.val = *(u32 *)c->dst.ptr; | 1244 | c->dst.val = *(u32 *)c->dst.ptr; |
| 1205 | break; | 1245 | break; |
| 1246 | case 8: | ||
| 1247 | c->dst.val = *(u64 *)c->dst.ptr; | ||
| 1248 | break; | ||
| 1206 | } | 1249 | } |
| 1207 | c->dst.orig_val = c->dst.val; | 1250 | c->dst.orig_val = c->dst.val; |
| 1208 | break; | 1251 | break; |
| 1252 | case DstDI: | ||
| 1253 | c->dst.type = OP_MEM; | ||
| 1254 | c->dst.bytes = (c->d & ByteOp) ? 1 : c->op_bytes; | ||
| 1255 | c->dst.ptr = (unsigned long *) | ||
| 1256 | register_address(c, es_base(ctxt), | ||
| 1257 | c->regs[VCPU_REGS_RDI]); | ||
| 1258 | c->dst.val = 0; | ||
| 1259 | break; | ||
| 1209 | } | 1260 | } |
| 1210 | 1261 | ||
| 1211 | if (c->rip_relative) | ||
| 1212 | c->modrm_ea += c->eip; | ||
| 1213 | |||
| 1214 | done: | 1262 | done: |
| 1215 | return (rc == X86EMUL_UNHANDLEABLE) ? -1 : 0; | 1263 | return (rc == X86EMUL_UNHANDLEABLE) ? -1 : 0; |
| 1216 | } | 1264 | } |
| 1217 | 1265 | ||
| 1266 | static int pio_in_emulated(struct x86_emulate_ctxt *ctxt, | ||
| 1267 | struct x86_emulate_ops *ops, | ||
| 1268 | unsigned int size, unsigned short port, | ||
| 1269 | void *dest) | ||
| 1270 | { | ||
| 1271 | struct read_cache *rc = &ctxt->decode.io_read; | ||
| 1272 | |||
| 1273 | if (rc->pos == rc->end) { /* refill pio read ahead */ | ||
| 1274 | struct decode_cache *c = &ctxt->decode; | ||
| 1275 | unsigned int in_page, n; | ||
| 1276 | unsigned int count = c->rep_prefix ? | ||
| 1277 | address_mask(c, c->regs[VCPU_REGS_RCX]) : 1; | ||
| 1278 | in_page = (ctxt->eflags & EFLG_DF) ? | ||
| 1279 | offset_in_page(c->regs[VCPU_REGS_RDI]) : | ||
| 1280 | PAGE_SIZE - offset_in_page(c->regs[VCPU_REGS_RDI]); | ||
| 1281 | n = min(min(in_page, (unsigned int)sizeof(rc->data)) / size, | ||
| 1282 | count); | ||
| 1283 | if (n == 0) | ||
| 1284 | n = 1; | ||
| 1285 | rc->pos = rc->end = 0; | ||
| 1286 | if (!ops->pio_in_emulated(size, port, rc->data, n, ctxt->vcpu)) | ||
| 1287 | return 0; | ||
| 1288 | rc->end = n * size; | ||
| 1289 | } | ||
| 1290 | |||
| 1291 | memcpy(dest, rc->data + rc->pos, size); | ||
| 1292 | rc->pos += size; | ||
| 1293 | return 1; | ||
| 1294 | } | ||
| 1295 | |||
| 1296 | static u32 desc_limit_scaled(struct desc_struct *desc) | ||
| 1297 | { | ||
| 1298 | u32 limit = get_desc_limit(desc); | ||
| 1299 | |||
| 1300 | return desc->g ? (limit << 12) | 0xfff : limit; | ||
| 1301 | } | ||
| 1302 | |||
| 1303 | static void get_descriptor_table_ptr(struct x86_emulate_ctxt *ctxt, | ||
| 1304 | struct x86_emulate_ops *ops, | ||
| 1305 | u16 selector, struct desc_ptr *dt) | ||
| 1306 | { | ||
| 1307 | if (selector & 1 << 2) { | ||
| 1308 | struct desc_struct desc; | ||
| 1309 | memset (dt, 0, sizeof *dt); | ||
| 1310 | if (!ops->get_cached_descriptor(&desc, VCPU_SREG_LDTR, ctxt->vcpu)) | ||
| 1311 | return; | ||
| 1312 | |||
| 1313 | dt->size = desc_limit_scaled(&desc); /* what if limit > 65535? */ | ||
| 1314 | dt->address = get_desc_base(&desc); | ||
| 1315 | } else | ||
| 1316 | ops->get_gdt(dt, ctxt->vcpu); | ||
| 1317 | } | ||
| 1318 | |||
| 1319 | /* allowed just for 8 bytes segments */ | ||
| 1320 | static int read_segment_descriptor(struct x86_emulate_ctxt *ctxt, | ||
| 1321 | struct x86_emulate_ops *ops, | ||
| 1322 | u16 selector, struct desc_struct *desc) | ||
| 1323 | { | ||
| 1324 | struct desc_ptr dt; | ||
| 1325 | u16 index = selector >> 3; | ||
| 1326 | int ret; | ||
| 1327 | u32 err; | ||
| 1328 | ulong addr; | ||
| 1329 | |||
| 1330 | get_descriptor_table_ptr(ctxt, ops, selector, &dt); | ||
| 1331 | |||
| 1332 | if (dt.size < index * 8 + 7) { | ||
| 1333 | kvm_inject_gp(ctxt->vcpu, selector & 0xfffc); | ||
| 1334 | return X86EMUL_PROPAGATE_FAULT; | ||
| 1335 | } | ||
| 1336 | addr = dt.address + index * 8; | ||
| 1337 | ret = ops->read_std(addr, desc, sizeof *desc, ctxt->vcpu, &err); | ||
| 1338 | if (ret == X86EMUL_PROPAGATE_FAULT) | ||
| 1339 | kvm_inject_page_fault(ctxt->vcpu, addr, err); | ||
| 1340 | |||
| 1341 | return ret; | ||
| 1342 | } | ||
| 1343 | |||
| 1344 | /* allowed just for 8 bytes segments */ | ||
| 1345 | static int write_segment_descriptor(struct x86_emulate_ctxt *ctxt, | ||
| 1346 | struct x86_emulate_ops *ops, | ||
| 1347 | u16 selector, struct desc_struct *desc) | ||
| 1348 | { | ||
| 1349 | struct desc_ptr dt; | ||
| 1350 | u16 index = selector >> 3; | ||
| 1351 | u32 err; | ||
| 1352 | ulong addr; | ||
| 1353 | int ret; | ||
| 1354 | |||
| 1355 | get_descriptor_table_ptr(ctxt, ops, selector, &dt); | ||
| 1356 | |||
| 1357 | if (dt.size < index * 8 + 7) { | ||
| 1358 | kvm_inject_gp(ctxt->vcpu, selector & 0xfffc); | ||
| 1359 | return X86EMUL_PROPAGATE_FAULT; | ||
| 1360 | } | ||
| 1361 | |||
| 1362 | addr = dt.address + index * 8; | ||
| 1363 | ret = ops->write_std(addr, desc, sizeof *desc, ctxt->vcpu, &err); | ||
| 1364 | if (ret == X86EMUL_PROPAGATE_FAULT) | ||
| 1365 | kvm_inject_page_fault(ctxt->vcpu, addr, err); | ||
| 1366 | |||
| 1367 | return ret; | ||
| 1368 | } | ||
| 1369 | |||
| 1370 | static int load_segment_descriptor(struct x86_emulate_ctxt *ctxt, | ||
| 1371 | struct x86_emulate_ops *ops, | ||
| 1372 | u16 selector, int seg) | ||
| 1373 | { | ||
| 1374 | struct desc_struct seg_desc; | ||
| 1375 | u8 dpl, rpl, cpl; | ||
| 1376 | unsigned err_vec = GP_VECTOR; | ||
| 1377 | u32 err_code = 0; | ||
| 1378 | bool null_selector = !(selector & ~0x3); /* 0000-0003 are null */ | ||
| 1379 | int ret; | ||
| 1380 | |||
| 1381 | memset(&seg_desc, 0, sizeof seg_desc); | ||
| 1382 | |||
| 1383 | if ((seg <= VCPU_SREG_GS && ctxt->mode == X86EMUL_MODE_VM86) | ||
| 1384 | || ctxt->mode == X86EMUL_MODE_REAL) { | ||
| 1385 | /* set real mode segment descriptor */ | ||
| 1386 | set_desc_base(&seg_desc, selector << 4); | ||
| 1387 | set_desc_limit(&seg_desc, 0xffff); | ||
| 1388 | seg_desc.type = 3; | ||
| 1389 | seg_desc.p = 1; | ||
| 1390 | seg_desc.s = 1; | ||
| 1391 | goto load; | ||
| 1392 | } | ||
| 1393 | |||
| 1394 | /* NULL selector is not valid for TR, CS and SS */ | ||
| 1395 | if ((seg == VCPU_SREG_CS || seg == VCPU_SREG_SS || seg == VCPU_SREG_TR) | ||
| 1396 | && null_selector) | ||
| 1397 | goto exception; | ||
| 1398 | |||
| 1399 | /* TR should be in GDT only */ | ||
| 1400 | if (seg == VCPU_SREG_TR && (selector & (1 << 2))) | ||
| 1401 | goto exception; | ||
| 1402 | |||
| 1403 | if (null_selector) /* for NULL selector skip all following checks */ | ||
| 1404 | goto load; | ||
| 1405 | |||
| 1406 | ret = read_segment_descriptor(ctxt, ops, selector, &seg_desc); | ||
| 1407 | if (ret != X86EMUL_CONTINUE) | ||
| 1408 | return ret; | ||
| 1409 | |||
| 1410 | err_code = selector & 0xfffc; | ||
| 1411 | err_vec = GP_VECTOR; | ||
| 1412 | |||
| 1413 | /* can't load system descriptor into segment selecor */ | ||
| 1414 | if (seg <= VCPU_SREG_GS && !seg_desc.s) | ||
| 1415 | goto exception; | ||
| 1416 | |||
| 1417 | if (!seg_desc.p) { | ||
| 1418 | err_vec = (seg == VCPU_SREG_SS) ? SS_VECTOR : NP_VECTOR; | ||
| 1419 | goto exception; | ||
| 1420 | } | ||
| 1421 | |||
| 1422 | rpl = selector & 3; | ||
| 1423 | dpl = seg_desc.dpl; | ||
| 1424 | cpl = ops->cpl(ctxt->vcpu); | ||
| 1425 | |||
| 1426 | switch (seg) { | ||
| 1427 | case VCPU_SREG_SS: | ||
| 1428 | /* | ||
| 1429 | * segment is not a writable data segment or segment | ||
| 1430 | * selector's RPL != CPL or segment selector's RPL != CPL | ||
| 1431 | */ | ||
| 1432 | if (rpl != cpl || (seg_desc.type & 0xa) != 0x2 || dpl != cpl) | ||
| 1433 | goto exception; | ||
| 1434 | break; | ||
| 1435 | case VCPU_SREG_CS: | ||
| 1436 | if (!(seg_desc.type & 8)) | ||
| 1437 | goto exception; | ||
| 1438 | |||
| 1439 | if (seg_desc.type & 4) { | ||
| 1440 | /* conforming */ | ||
| 1441 | if (dpl > cpl) | ||
| 1442 | goto exception; | ||
| 1443 | } else { | ||
| 1444 | /* nonconforming */ | ||
| 1445 | if (rpl > cpl || dpl != cpl) | ||
| 1446 | goto exception; | ||
| 1447 | } | ||
| 1448 | /* CS(RPL) <- CPL */ | ||
| 1449 | selector = (selector & 0xfffc) | cpl; | ||
| 1450 | break; | ||
| 1451 | case VCPU_SREG_TR: | ||
| 1452 | if (seg_desc.s || (seg_desc.type != 1 && seg_desc.type != 9)) | ||
| 1453 | goto exception; | ||
| 1454 | break; | ||
| 1455 | case VCPU_SREG_LDTR: | ||
| 1456 | if (seg_desc.s || seg_desc.type != 2) | ||
| 1457 | goto exception; | ||
| 1458 | break; | ||
| 1459 | default: /* DS, ES, FS, or GS */ | ||
| 1460 | /* | ||
| 1461 | * segment is not a data or readable code segment or | ||
| 1462 | * ((segment is a data or nonconforming code segment) | ||
| 1463 | * and (both RPL and CPL > DPL)) | ||
| 1464 | */ | ||
| 1465 | if ((seg_desc.type & 0xa) == 0x8 || | ||
| 1466 | (((seg_desc.type & 0xc) != 0xc) && | ||
| 1467 | (rpl > dpl && cpl > dpl))) | ||
| 1468 | goto exception; | ||
| 1469 | break; | ||
| 1470 | } | ||
| 1471 | |||
| 1472 | if (seg_desc.s) { | ||
| 1473 | /* mark segment as accessed */ | ||
| 1474 | seg_desc.type |= 1; | ||
| 1475 | ret = write_segment_descriptor(ctxt, ops, selector, &seg_desc); | ||
| 1476 | if (ret != X86EMUL_CONTINUE) | ||
| 1477 | return ret; | ||
| 1478 | } | ||
| 1479 | load: | ||
| 1480 | ops->set_segment_selector(selector, seg, ctxt->vcpu); | ||
| 1481 | ops->set_cached_descriptor(&seg_desc, seg, ctxt->vcpu); | ||
| 1482 | return X86EMUL_CONTINUE; | ||
| 1483 | exception: | ||
| 1484 | kvm_queue_exception_e(ctxt->vcpu, err_vec, err_code); | ||
| 1485 | return X86EMUL_PROPAGATE_FAULT; | ||
| 1486 | } | ||
| 1487 | |||
| 1218 | static inline void emulate_push(struct x86_emulate_ctxt *ctxt) | 1488 | static inline void emulate_push(struct x86_emulate_ctxt *ctxt) |
| 1219 | { | 1489 | { |
| 1220 | struct decode_cache *c = &ctxt->decode; | 1490 | struct decode_cache *c = &ctxt->decode; |
| @@ -1251,7 +1521,7 @@ static int emulate_popf(struct x86_emulate_ctxt *ctxt, | |||
| 1251 | int rc; | 1521 | int rc; |
| 1252 | unsigned long val, change_mask; | 1522 | unsigned long val, change_mask; |
| 1253 | int iopl = (ctxt->eflags & X86_EFLAGS_IOPL) >> IOPL_SHIFT; | 1523 | int iopl = (ctxt->eflags & X86_EFLAGS_IOPL) >> IOPL_SHIFT; |
| 1254 | int cpl = kvm_x86_ops->get_cpl(ctxt->vcpu); | 1524 | int cpl = ops->cpl(ctxt->vcpu); |
| 1255 | 1525 | ||
| 1256 | rc = emulate_pop(ctxt, ops, &val, len); | 1526 | rc = emulate_pop(ctxt, ops, &val, len); |
| 1257 | if (rc != X86EMUL_CONTINUE) | 1527 | if (rc != X86EMUL_CONTINUE) |
| @@ -1306,10 +1576,10 @@ static int emulate_pop_sreg(struct x86_emulate_ctxt *ctxt, | |||
| 1306 | int rc; | 1576 | int rc; |
| 1307 | 1577 | ||
| 1308 | rc = emulate_pop(ctxt, ops, &selector, c->op_bytes); | 1578 | rc = emulate_pop(ctxt, ops, &selector, c->op_bytes); |
| 1309 | if (rc != 0) | 1579 | if (rc != X86EMUL_CONTINUE) |
| 1310 | return rc; | 1580 | return rc; |
| 1311 | 1581 | ||
| 1312 | rc = kvm_load_segment_descriptor(ctxt->vcpu, (u16)selector, seg); | 1582 | rc = load_segment_descriptor(ctxt, ops, (u16)selector, seg); |
| 1313 | return rc; | 1583 | return rc; |
| 1314 | } | 1584 | } |
| 1315 | 1585 | ||
| @@ -1332,7 +1602,7 @@ static int emulate_popa(struct x86_emulate_ctxt *ctxt, | |||
| 1332 | struct x86_emulate_ops *ops) | 1602 | struct x86_emulate_ops *ops) |
| 1333 | { | 1603 | { |
| 1334 | struct decode_cache *c = &ctxt->decode; | 1604 | struct decode_cache *c = &ctxt->decode; |
| 1335 | int rc = 0; | 1605 | int rc = X86EMUL_CONTINUE; |
| 1336 | int reg = VCPU_REGS_RDI; | 1606 | int reg = VCPU_REGS_RDI; |
| 1337 | 1607 | ||
| 1338 | while (reg >= VCPU_REGS_RAX) { | 1608 | while (reg >= VCPU_REGS_RAX) { |
| @@ -1343,7 +1613,7 @@ static int emulate_popa(struct x86_emulate_ctxt *ctxt, | |||
| 1343 | } | 1613 | } |
| 1344 | 1614 | ||
| 1345 | rc = emulate_pop(ctxt, ops, &c->regs[reg], c->op_bytes); | 1615 | rc = emulate_pop(ctxt, ops, &c->regs[reg], c->op_bytes); |
| 1346 | if (rc != 0) | 1616 | if (rc != X86EMUL_CONTINUE) |
| 1347 | break; | 1617 | break; |
| 1348 | --reg; | 1618 | --reg; |
| 1349 | } | 1619 | } |
| @@ -1354,12 +1624,8 @@ static inline int emulate_grp1a(struct x86_emulate_ctxt *ctxt, | |||
| 1354 | struct x86_emulate_ops *ops) | 1624 | struct x86_emulate_ops *ops) |
| 1355 | { | 1625 | { |
| 1356 | struct decode_cache *c = &ctxt->decode; | 1626 | struct decode_cache *c = &ctxt->decode; |
| 1357 | int rc; | ||
| 1358 | 1627 | ||
| 1359 | rc = emulate_pop(ctxt, ops, &c->dst.val, c->dst.bytes); | 1628 | return emulate_pop(ctxt, ops, &c->dst.val, c->dst.bytes); |
| 1360 | if (rc != 0) | ||
| 1361 | return rc; | ||
| 1362 | return 0; | ||
| 1363 | } | 1629 | } |
| 1364 | 1630 | ||
| 1365 | static inline void emulate_grp2(struct x86_emulate_ctxt *ctxt) | 1631 | static inline void emulate_grp2(struct x86_emulate_ctxt *ctxt) |
| @@ -1395,7 +1661,6 @@ static inline int emulate_grp3(struct x86_emulate_ctxt *ctxt, | |||
| 1395 | struct x86_emulate_ops *ops) | 1661 | struct x86_emulate_ops *ops) |
| 1396 | { | 1662 | { |
| 1397 | struct decode_cache *c = &ctxt->decode; | 1663 | struct decode_cache *c = &ctxt->decode; |
| 1398 | int rc = 0; | ||
| 1399 | 1664 | ||
| 1400 | switch (c->modrm_reg) { | 1665 | switch (c->modrm_reg) { |
| 1401 | case 0 ... 1: /* test */ | 1666 | case 0 ... 1: /* test */ |
| @@ -1408,11 +1673,9 @@ static inline int emulate_grp3(struct x86_emulate_ctxt *ctxt, | |||
| 1408 | emulate_1op("neg", c->dst, ctxt->eflags); | 1673 | emulate_1op("neg", c->dst, ctxt->eflags); |
| 1409 | break; | 1674 | break; |
| 1410 | default: | 1675 | default: |
| 1411 | DPRINTF("Cannot emulate %02x\n", c->b); | 1676 | return 0; |
| 1412 | rc = X86EMUL_UNHANDLEABLE; | ||
| 1413 | break; | ||
| 1414 | } | 1677 | } |
| 1415 | return rc; | 1678 | return 1; |
| 1416 | } | 1679 | } |
| 1417 | 1680 | ||
| 1418 | static inline int emulate_grp45(struct x86_emulate_ctxt *ctxt, | 1681 | static inline int emulate_grp45(struct x86_emulate_ctxt *ctxt, |
| @@ -1442,20 +1705,14 @@ static inline int emulate_grp45(struct x86_emulate_ctxt *ctxt, | |||
| 1442 | emulate_push(ctxt); | 1705 | emulate_push(ctxt); |
| 1443 | break; | 1706 | break; |
| 1444 | } | 1707 | } |
| 1445 | return 0; | 1708 | return X86EMUL_CONTINUE; |
| 1446 | } | 1709 | } |
| 1447 | 1710 | ||
| 1448 | static inline int emulate_grp9(struct x86_emulate_ctxt *ctxt, | 1711 | static inline int emulate_grp9(struct x86_emulate_ctxt *ctxt, |
| 1449 | struct x86_emulate_ops *ops, | 1712 | struct x86_emulate_ops *ops) |
| 1450 | unsigned long memop) | ||
| 1451 | { | 1713 | { |
| 1452 | struct decode_cache *c = &ctxt->decode; | 1714 | struct decode_cache *c = &ctxt->decode; |
| 1453 | u64 old, new; | 1715 | u64 old = c->dst.orig_val; |
| 1454 | int rc; | ||
| 1455 | |||
| 1456 | rc = ops->read_emulated(memop, &old, 8, ctxt->vcpu); | ||
| 1457 | if (rc != X86EMUL_CONTINUE) | ||
| 1458 | return rc; | ||
| 1459 | 1716 | ||
| 1460 | if (((u32) (old >> 0) != (u32) c->regs[VCPU_REGS_RAX]) || | 1717 | if (((u32) (old >> 0) != (u32) c->regs[VCPU_REGS_RAX]) || |
| 1461 | ((u32) (old >> 32) != (u32) c->regs[VCPU_REGS_RDX])) { | 1718 | ((u32) (old >> 32) != (u32) c->regs[VCPU_REGS_RDX])) { |
| @@ -1463,17 +1720,13 @@ static inline int emulate_grp9(struct x86_emulate_ctxt *ctxt, | |||
| 1463 | c->regs[VCPU_REGS_RAX] = (u32) (old >> 0); | 1720 | c->regs[VCPU_REGS_RAX] = (u32) (old >> 0); |
| 1464 | c->regs[VCPU_REGS_RDX] = (u32) (old >> 32); | 1721 | c->regs[VCPU_REGS_RDX] = (u32) (old >> 32); |
| 1465 | ctxt->eflags &= ~EFLG_ZF; | 1722 | ctxt->eflags &= ~EFLG_ZF; |
| 1466 | |||
| 1467 | } else { | 1723 | } else { |
| 1468 | new = ((u64)c->regs[VCPU_REGS_RCX] << 32) | | 1724 | c->dst.val = ((u64)c->regs[VCPU_REGS_RCX] << 32) | |
| 1469 | (u32) c->regs[VCPU_REGS_RBX]; | 1725 | (u32) c->regs[VCPU_REGS_RBX]; |
| 1470 | 1726 | ||
| 1471 | rc = ops->cmpxchg_emulated(memop, &old, &new, 8, ctxt->vcpu); | ||
| 1472 | if (rc != X86EMUL_CONTINUE) | ||
| 1473 | return rc; | ||
| 1474 | ctxt->eflags |= EFLG_ZF; | 1727 | ctxt->eflags |= EFLG_ZF; |
| 1475 | } | 1728 | } |
| 1476 | return 0; | 1729 | return X86EMUL_CONTINUE; |
| 1477 | } | 1730 | } |
| 1478 | 1731 | ||
| 1479 | static int emulate_ret_far(struct x86_emulate_ctxt *ctxt, | 1732 | static int emulate_ret_far(struct x86_emulate_ctxt *ctxt, |
| @@ -1484,14 +1737,14 @@ static int emulate_ret_far(struct x86_emulate_ctxt *ctxt, | |||
| 1484 | unsigned long cs; | 1737 | unsigned long cs; |
| 1485 | 1738 | ||
| 1486 | rc = emulate_pop(ctxt, ops, &c->eip, c->op_bytes); | 1739 | rc = emulate_pop(ctxt, ops, &c->eip, c->op_bytes); |
| 1487 | if (rc) | 1740 | if (rc != X86EMUL_CONTINUE) |
| 1488 | return rc; | 1741 | return rc; |
| 1489 | if (c->op_bytes == 4) | 1742 | if (c->op_bytes == 4) |
| 1490 | c->eip = (u32)c->eip; | 1743 | c->eip = (u32)c->eip; |
| 1491 | rc = emulate_pop(ctxt, ops, &cs, c->op_bytes); | 1744 | rc = emulate_pop(ctxt, ops, &cs, c->op_bytes); |
| 1492 | if (rc) | 1745 | if (rc != X86EMUL_CONTINUE) |
| 1493 | return rc; | 1746 | return rc; |
| 1494 | rc = kvm_load_segment_descriptor(ctxt->vcpu, (u16)cs, VCPU_SREG_CS); | 1747 | rc = load_segment_descriptor(ctxt, ops, (u16)cs, VCPU_SREG_CS); |
| 1495 | return rc; | 1748 | return rc; |
| 1496 | } | 1749 | } |
| 1497 | 1750 | ||
| @@ -1544,7 +1797,7 @@ static inline int writeback(struct x86_emulate_ctxt *ctxt, | |||
| 1544 | default: | 1797 | default: |
| 1545 | break; | 1798 | break; |
| 1546 | } | 1799 | } |
| 1547 | return 0; | 1800 | return X86EMUL_CONTINUE; |
| 1548 | } | 1801 | } |
| 1549 | 1802 | ||
| 1550 | static void toggle_interruptibility(struct x86_emulate_ctxt *ctxt, u32 mask) | 1803 | static void toggle_interruptibility(struct x86_emulate_ctxt *ctxt, u32 mask) |
| @@ -1598,8 +1851,11 @@ emulate_syscall(struct x86_emulate_ctxt *ctxt) | |||
| 1598 | u64 msr_data; | 1851 | u64 msr_data; |
| 1599 | 1852 | ||
| 1600 | /* syscall is not available in real mode */ | 1853 | /* syscall is not available in real mode */ |
| 1601 | if (ctxt->mode == X86EMUL_MODE_REAL || ctxt->mode == X86EMUL_MODE_VM86) | 1854 | if (ctxt->mode == X86EMUL_MODE_REAL || |
| 1602 | return X86EMUL_UNHANDLEABLE; | 1855 | ctxt->mode == X86EMUL_MODE_VM86) { |
| 1856 | kvm_queue_exception(ctxt->vcpu, UD_VECTOR); | ||
| 1857 | return X86EMUL_PROPAGATE_FAULT; | ||
| 1858 | } | ||
| 1603 | 1859 | ||
| 1604 | setup_syscalls_segments(ctxt, &cs, &ss); | 1860 | setup_syscalls_segments(ctxt, &cs, &ss); |
| 1605 | 1861 | ||
| @@ -1649,14 +1905,16 @@ emulate_sysenter(struct x86_emulate_ctxt *ctxt) | |||
| 1649 | /* inject #GP if in real mode */ | 1905 | /* inject #GP if in real mode */ |
| 1650 | if (ctxt->mode == X86EMUL_MODE_REAL) { | 1906 | if (ctxt->mode == X86EMUL_MODE_REAL) { |
| 1651 | kvm_inject_gp(ctxt->vcpu, 0); | 1907 | kvm_inject_gp(ctxt->vcpu, 0); |
| 1652 | return X86EMUL_UNHANDLEABLE; | 1908 | return X86EMUL_PROPAGATE_FAULT; |
| 1653 | } | 1909 | } |
| 1654 | 1910 | ||
| 1655 | /* XXX sysenter/sysexit have not been tested in 64bit mode. | 1911 | /* XXX sysenter/sysexit have not been tested in 64bit mode. |
| 1656 | * Therefore, we inject an #UD. | 1912 | * Therefore, we inject an #UD. |
| 1657 | */ | 1913 | */ |
| 1658 | if (ctxt->mode == X86EMUL_MODE_PROT64) | 1914 | if (ctxt->mode == X86EMUL_MODE_PROT64) { |
| 1659 | return X86EMUL_UNHANDLEABLE; | 1915 | kvm_queue_exception(ctxt->vcpu, UD_VECTOR); |
| 1916 | return X86EMUL_PROPAGATE_FAULT; | ||
| 1917 | } | ||
| 1660 | 1918 | ||
| 1661 | setup_syscalls_segments(ctxt, &cs, &ss); | 1919 | setup_syscalls_segments(ctxt, &cs, &ss); |
| 1662 | 1920 | ||
| @@ -1711,7 +1969,7 @@ emulate_sysexit(struct x86_emulate_ctxt *ctxt) | |||
| 1711 | if (ctxt->mode == X86EMUL_MODE_REAL || | 1969 | if (ctxt->mode == X86EMUL_MODE_REAL || |
| 1712 | ctxt->mode == X86EMUL_MODE_VM86) { | 1970 | ctxt->mode == X86EMUL_MODE_VM86) { |
| 1713 | kvm_inject_gp(ctxt->vcpu, 0); | 1971 | kvm_inject_gp(ctxt->vcpu, 0); |
| 1714 | return X86EMUL_UNHANDLEABLE; | 1972 | return X86EMUL_PROPAGATE_FAULT; |
| 1715 | } | 1973 | } |
| 1716 | 1974 | ||
| 1717 | setup_syscalls_segments(ctxt, &cs, &ss); | 1975 | setup_syscalls_segments(ctxt, &cs, &ss); |
| @@ -1756,7 +2014,8 @@ emulate_sysexit(struct x86_emulate_ctxt *ctxt) | |||
| 1756 | return X86EMUL_CONTINUE; | 2014 | return X86EMUL_CONTINUE; |
| 1757 | } | 2015 | } |
| 1758 | 2016 | ||
| 1759 | static bool emulator_bad_iopl(struct x86_emulate_ctxt *ctxt) | 2017 | static bool emulator_bad_iopl(struct x86_emulate_ctxt *ctxt, |
| 2018 | struct x86_emulate_ops *ops) | ||
| 1760 | { | 2019 | { |
| 1761 | int iopl; | 2020 | int iopl; |
| 1762 | if (ctxt->mode == X86EMUL_MODE_REAL) | 2021 | if (ctxt->mode == X86EMUL_MODE_REAL) |
| @@ -1764,7 +2023,7 @@ static bool emulator_bad_iopl(struct x86_emulate_ctxt *ctxt) | |||
| 1764 | if (ctxt->mode == X86EMUL_MODE_VM86) | 2023 | if (ctxt->mode == X86EMUL_MODE_VM86) |
| 1765 | return true; | 2024 | return true; |
| 1766 | iopl = (ctxt->eflags & X86_EFLAGS_IOPL) >> IOPL_SHIFT; | 2025 | iopl = (ctxt->eflags & X86_EFLAGS_IOPL) >> IOPL_SHIFT; |
| 1767 | return kvm_x86_ops->get_cpl(ctxt->vcpu) > iopl; | 2026 | return ops->cpl(ctxt->vcpu) > iopl; |
| 1768 | } | 2027 | } |
| 1769 | 2028 | ||
| 1770 | static bool emulator_io_port_access_allowed(struct x86_emulate_ctxt *ctxt, | 2029 | static bool emulator_io_port_access_allowed(struct x86_emulate_ctxt *ctxt, |
| @@ -1801,22 +2060,419 @@ static bool emulator_io_permited(struct x86_emulate_ctxt *ctxt, | |||
| 1801 | struct x86_emulate_ops *ops, | 2060 | struct x86_emulate_ops *ops, |
| 1802 | u16 port, u16 len) | 2061 | u16 port, u16 len) |
| 1803 | { | 2062 | { |
| 1804 | if (emulator_bad_iopl(ctxt)) | 2063 | if (emulator_bad_iopl(ctxt, ops)) |
| 1805 | if (!emulator_io_port_access_allowed(ctxt, ops, port, len)) | 2064 | if (!emulator_io_port_access_allowed(ctxt, ops, port, len)) |
| 1806 | return false; | 2065 | return false; |
| 1807 | return true; | 2066 | return true; |
| 1808 | } | 2067 | } |
| 1809 | 2068 | ||
| 2069 | static u32 get_cached_descriptor_base(struct x86_emulate_ctxt *ctxt, | ||
| 2070 | struct x86_emulate_ops *ops, | ||
| 2071 | int seg) | ||
| 2072 | { | ||
| 2073 | struct desc_struct desc; | ||
| 2074 | if (ops->get_cached_descriptor(&desc, seg, ctxt->vcpu)) | ||
| 2075 | return get_desc_base(&desc); | ||
| 2076 | else | ||
| 2077 | return ~0; | ||
| 2078 | } | ||
| 2079 | |||
| 2080 | static void save_state_to_tss16(struct x86_emulate_ctxt *ctxt, | ||
| 2081 | struct x86_emulate_ops *ops, | ||
| 2082 | struct tss_segment_16 *tss) | ||
| 2083 | { | ||
| 2084 | struct decode_cache *c = &ctxt->decode; | ||
| 2085 | |||
| 2086 | tss->ip = c->eip; | ||
| 2087 | tss->flag = ctxt->eflags; | ||
| 2088 | tss->ax = c->regs[VCPU_REGS_RAX]; | ||
| 2089 | tss->cx = c->regs[VCPU_REGS_RCX]; | ||
| 2090 | tss->dx = c->regs[VCPU_REGS_RDX]; | ||
| 2091 | tss->bx = c->regs[VCPU_REGS_RBX]; | ||
| 2092 | tss->sp = c->regs[VCPU_REGS_RSP]; | ||
| 2093 | tss->bp = c->regs[VCPU_REGS_RBP]; | ||
| 2094 | tss->si = c->regs[VCPU_REGS_RSI]; | ||
| 2095 | tss->di = c->regs[VCPU_REGS_RDI]; | ||
| 2096 | |||
| 2097 | tss->es = ops->get_segment_selector(VCPU_SREG_ES, ctxt->vcpu); | ||
| 2098 | tss->cs = ops->get_segment_selector(VCPU_SREG_CS, ctxt->vcpu); | ||
| 2099 | tss->ss = ops->get_segment_selector(VCPU_SREG_SS, ctxt->vcpu); | ||
| 2100 | tss->ds = ops->get_segment_selector(VCPU_SREG_DS, ctxt->vcpu); | ||
| 2101 | tss->ldt = ops->get_segment_selector(VCPU_SREG_LDTR, ctxt->vcpu); | ||
| 2102 | } | ||
| 2103 | |||
| 2104 | static int load_state_from_tss16(struct x86_emulate_ctxt *ctxt, | ||
| 2105 | struct x86_emulate_ops *ops, | ||
| 2106 | struct tss_segment_16 *tss) | ||
| 2107 | { | ||
| 2108 | struct decode_cache *c = &ctxt->decode; | ||
| 2109 | int ret; | ||
| 2110 | |||
| 2111 | c->eip = tss->ip; | ||
| 2112 | ctxt->eflags = tss->flag | 2; | ||
| 2113 | c->regs[VCPU_REGS_RAX] = tss->ax; | ||
| 2114 | c->regs[VCPU_REGS_RCX] = tss->cx; | ||
| 2115 | c->regs[VCPU_REGS_RDX] = tss->dx; | ||
| 2116 | c->regs[VCPU_REGS_RBX] = tss->bx; | ||
| 2117 | c->regs[VCPU_REGS_RSP] = tss->sp; | ||
| 2118 | c->regs[VCPU_REGS_RBP] = tss->bp; | ||
| 2119 | c->regs[VCPU_REGS_RSI] = tss->si; | ||
| 2120 | c->regs[VCPU_REGS_RDI] = tss->di; | ||
| 2121 | |||
| 2122 | /* | ||
| 2123 | * SDM says that segment selectors are loaded before segment | ||
| 2124 | * descriptors | ||
| 2125 | */ | ||
| 2126 | ops->set_segment_selector(tss->ldt, VCPU_SREG_LDTR, ctxt->vcpu); | ||
| 2127 | ops->set_segment_selector(tss->es, VCPU_SREG_ES, ctxt->vcpu); | ||
| 2128 | ops->set_segment_selector(tss->cs, VCPU_SREG_CS, ctxt->vcpu); | ||
| 2129 | ops->set_segment_selector(tss->ss, VCPU_SREG_SS, ctxt->vcpu); | ||
| 2130 | ops->set_segment_selector(tss->ds, VCPU_SREG_DS, ctxt->vcpu); | ||
| 2131 | |||
| 2132 | /* | ||
| 2133 | * Now load segment descriptors. If fault happenes at this stage | ||
| 2134 | * it is handled in a context of new task | ||
| 2135 | */ | ||
| 2136 | ret = load_segment_descriptor(ctxt, ops, tss->ldt, VCPU_SREG_LDTR); | ||
| 2137 | if (ret != X86EMUL_CONTINUE) | ||
| 2138 | return ret; | ||
| 2139 | ret = load_segment_descriptor(ctxt, ops, tss->es, VCPU_SREG_ES); | ||
| 2140 | if (ret != X86EMUL_CONTINUE) | ||
| 2141 | return ret; | ||
| 2142 | ret = load_segment_descriptor(ctxt, ops, tss->cs, VCPU_SREG_CS); | ||
| 2143 | if (ret != X86EMUL_CONTINUE) | ||
| 2144 | return ret; | ||
| 2145 | ret = load_segment_descriptor(ctxt, ops, tss->ss, VCPU_SREG_SS); | ||
| 2146 | if (ret != X86EMUL_CONTINUE) | ||
| 2147 | return ret; | ||
| 2148 | ret = load_segment_descriptor(ctxt, ops, tss->ds, VCPU_SREG_DS); | ||
| 2149 | if (ret != X86EMUL_CONTINUE) | ||
| 2150 | return ret; | ||
| 2151 | |||
| 2152 | return X86EMUL_CONTINUE; | ||
| 2153 | } | ||
| 2154 | |||
| 2155 | static int task_switch_16(struct x86_emulate_ctxt *ctxt, | ||
| 2156 | struct x86_emulate_ops *ops, | ||
| 2157 | u16 tss_selector, u16 old_tss_sel, | ||
| 2158 | ulong old_tss_base, struct desc_struct *new_desc) | ||
| 2159 | { | ||
| 2160 | struct tss_segment_16 tss_seg; | ||
| 2161 | int ret; | ||
| 2162 | u32 err, new_tss_base = get_desc_base(new_desc); | ||
| 2163 | |||
| 2164 | ret = ops->read_std(old_tss_base, &tss_seg, sizeof tss_seg, ctxt->vcpu, | ||
| 2165 | &err); | ||
| 2166 | if (ret == X86EMUL_PROPAGATE_FAULT) { | ||
| 2167 | /* FIXME: need to provide precise fault address */ | ||
| 2168 | kvm_inject_page_fault(ctxt->vcpu, old_tss_base, err); | ||
| 2169 | return ret; | ||
| 2170 | } | ||
| 2171 | |||
| 2172 | save_state_to_tss16(ctxt, ops, &tss_seg); | ||
| 2173 | |||
| 2174 | ret = ops->write_std(old_tss_base, &tss_seg, sizeof tss_seg, ctxt->vcpu, | ||
| 2175 | &err); | ||
| 2176 | if (ret == X86EMUL_PROPAGATE_FAULT) { | ||
| 2177 | /* FIXME: need to provide precise fault address */ | ||
| 2178 | kvm_inject_page_fault(ctxt->vcpu, old_tss_base, err); | ||
| 2179 | return ret; | ||
| 2180 | } | ||
| 2181 | |||
| 2182 | ret = ops->read_std(new_tss_base, &tss_seg, sizeof tss_seg, ctxt->vcpu, | ||
| 2183 | &err); | ||
| 2184 | if (ret == X86EMUL_PROPAGATE_FAULT) { | ||
| 2185 | /* FIXME: need to provide precise fault address */ | ||
| 2186 | kvm_inject_page_fault(ctxt->vcpu, new_tss_base, err); | ||
| 2187 | return ret; | ||
| 2188 | } | ||
| 2189 | |||
| 2190 | if (old_tss_sel != 0xffff) { | ||
| 2191 | tss_seg.prev_task_link = old_tss_sel; | ||
| 2192 | |||
| 2193 | ret = ops->write_std(new_tss_base, | ||
| 2194 | &tss_seg.prev_task_link, | ||
| 2195 | sizeof tss_seg.prev_task_link, | ||
| 2196 | ctxt->vcpu, &err); | ||
| 2197 | if (ret == X86EMUL_PROPAGATE_FAULT) { | ||
| 2198 | /* FIXME: need to provide precise fault address */ | ||
| 2199 | kvm_inject_page_fault(ctxt->vcpu, new_tss_base, err); | ||
| 2200 | return ret; | ||
| 2201 | } | ||
| 2202 | } | ||
| 2203 | |||
| 2204 | return load_state_from_tss16(ctxt, ops, &tss_seg); | ||
| 2205 | } | ||
| 2206 | |||
| 2207 | static void save_state_to_tss32(struct x86_emulate_ctxt *ctxt, | ||
| 2208 | struct x86_emulate_ops *ops, | ||
| 2209 | struct tss_segment_32 *tss) | ||
| 2210 | { | ||
| 2211 | struct decode_cache *c = &ctxt->decode; | ||
| 2212 | |||
| 2213 | tss->cr3 = ops->get_cr(3, ctxt->vcpu); | ||
| 2214 | tss->eip = c->eip; | ||
| 2215 | tss->eflags = ctxt->eflags; | ||
| 2216 | tss->eax = c->regs[VCPU_REGS_RAX]; | ||
| 2217 | tss->ecx = c->regs[VCPU_REGS_RCX]; | ||
| 2218 | tss->edx = c->regs[VCPU_REGS_RDX]; | ||
| 2219 | tss->ebx = c->regs[VCPU_REGS_RBX]; | ||
| 2220 | tss->esp = c->regs[VCPU_REGS_RSP]; | ||
| 2221 | tss->ebp = c->regs[VCPU_REGS_RBP]; | ||
| 2222 | tss->esi = c->regs[VCPU_REGS_RSI]; | ||
| 2223 | tss->edi = c->regs[VCPU_REGS_RDI]; | ||
| 2224 | |||
| 2225 | tss->es = ops->get_segment_selector(VCPU_SREG_ES, ctxt->vcpu); | ||
| 2226 | tss->cs = ops->get_segment_selector(VCPU_SREG_CS, ctxt->vcpu); | ||
| 2227 | tss->ss = ops->get_segment_selector(VCPU_SREG_SS, ctxt->vcpu); | ||
| 2228 | tss->ds = ops->get_segment_selector(VCPU_SREG_DS, ctxt->vcpu); | ||
| 2229 | tss->fs = ops->get_segment_selector(VCPU_SREG_FS, ctxt->vcpu); | ||
| 2230 | tss->gs = ops->get_segment_selector(VCPU_SREG_GS, ctxt->vcpu); | ||
| 2231 | tss->ldt_selector = ops->get_segment_selector(VCPU_SREG_LDTR, ctxt->vcpu); | ||
| 2232 | } | ||
| 2233 | |||
| 2234 | static int load_state_from_tss32(struct x86_emulate_ctxt *ctxt, | ||
| 2235 | struct x86_emulate_ops *ops, | ||
| 2236 | struct tss_segment_32 *tss) | ||
| 2237 | { | ||
| 2238 | struct decode_cache *c = &ctxt->decode; | ||
| 2239 | int ret; | ||
| 2240 | |||
| 2241 | ops->set_cr(3, tss->cr3, ctxt->vcpu); | ||
| 2242 | c->eip = tss->eip; | ||
| 2243 | ctxt->eflags = tss->eflags | 2; | ||
| 2244 | c->regs[VCPU_REGS_RAX] = tss->eax; | ||
| 2245 | c->regs[VCPU_REGS_RCX] = tss->ecx; | ||
| 2246 | c->regs[VCPU_REGS_RDX] = tss->edx; | ||
| 2247 | c->regs[VCPU_REGS_RBX] = tss->ebx; | ||
| 2248 | c->regs[VCPU_REGS_RSP] = tss->esp; | ||
| 2249 | c->regs[VCPU_REGS_RBP] = tss->ebp; | ||
| 2250 | c->regs[VCPU_REGS_RSI] = tss->esi; | ||
| 2251 | c->regs[VCPU_REGS_RDI] = tss->edi; | ||
| 2252 | |||
| 2253 | /* | ||
| 2254 | * SDM says that segment selectors are loaded before segment | ||
| 2255 | * descriptors | ||
| 2256 | */ | ||
| 2257 | ops->set_segment_selector(tss->ldt_selector, VCPU_SREG_LDTR, ctxt->vcpu); | ||
| 2258 | ops->set_segment_selector(tss->es, VCPU_SREG_ES, ctxt->vcpu); | ||
| 2259 | ops->set_segment_selector(tss->cs, VCPU_SREG_CS, ctxt->vcpu); | ||
| 2260 | ops->set_segment_selector(tss->ss, VCPU_SREG_SS, ctxt->vcpu); | ||
| 2261 | ops->set_segment_selector(tss->ds, VCPU_SREG_DS, ctxt->vcpu); | ||
| 2262 | ops->set_segment_selector(tss->fs, VCPU_SREG_FS, ctxt->vcpu); | ||
| 2263 | ops->set_segment_selector(tss->gs, VCPU_SREG_GS, ctxt->vcpu); | ||
| 2264 | |||
| 2265 | /* | ||
| 2266 | * Now load segment descriptors. If fault happenes at this stage | ||
| 2267 | * it is handled in a context of new task | ||
| 2268 | */ | ||
| 2269 | ret = load_segment_descriptor(ctxt, ops, tss->ldt_selector, VCPU_SREG_LDTR); | ||
| 2270 | if (ret != X86EMUL_CONTINUE) | ||
| 2271 | return ret; | ||
| 2272 | ret = load_segment_descriptor(ctxt, ops, tss->es, VCPU_SREG_ES); | ||
| 2273 | if (ret != X86EMUL_CONTINUE) | ||
| 2274 | return ret; | ||
| 2275 | ret = load_segment_descriptor(ctxt, ops, tss->cs, VCPU_SREG_CS); | ||
| 2276 | if (ret != X86EMUL_CONTINUE) | ||
| 2277 | return ret; | ||
| 2278 | ret = load_segment_descriptor(ctxt, ops, tss->ss, VCPU_SREG_SS); | ||
| 2279 | if (ret != X86EMUL_CONTINUE) | ||
| 2280 | return ret; | ||
| 2281 | ret = load_segment_descriptor(ctxt, ops, tss->ds, VCPU_SREG_DS); | ||
| 2282 | if (ret != X86EMUL_CONTINUE) | ||
| 2283 | return ret; | ||
| 2284 | ret = load_segment_descriptor(ctxt, ops, tss->fs, VCPU_SREG_FS); | ||
| 2285 | if (ret != X86EMUL_CONTINUE) | ||
| 2286 | return ret; | ||
| 2287 | ret = load_segment_descriptor(ctxt, ops, tss->gs, VCPU_SREG_GS); | ||
| 2288 | if (ret != X86EMUL_CONTINUE) | ||
| 2289 | return ret; | ||
| 2290 | |||
| 2291 | return X86EMUL_CONTINUE; | ||
| 2292 | } | ||
| 2293 | |||
| 2294 | static int task_switch_32(struct x86_emulate_ctxt *ctxt, | ||
| 2295 | struct x86_emulate_ops *ops, | ||
| 2296 | u16 tss_selector, u16 old_tss_sel, | ||
| 2297 | ulong old_tss_base, struct desc_struct *new_desc) | ||
| 2298 | { | ||
| 2299 | struct tss_segment_32 tss_seg; | ||
| 2300 | int ret; | ||
| 2301 | u32 err, new_tss_base = get_desc_base(new_desc); | ||
| 2302 | |||
| 2303 | ret = ops->read_std(old_tss_base, &tss_seg, sizeof tss_seg, ctxt->vcpu, | ||
| 2304 | &err); | ||
| 2305 | if (ret == X86EMUL_PROPAGATE_FAULT) { | ||
| 2306 | /* FIXME: need to provide precise fault address */ | ||
| 2307 | kvm_inject_page_fault(ctxt->vcpu, old_tss_base, err); | ||
| 2308 | return ret; | ||
| 2309 | } | ||
| 2310 | |||
| 2311 | save_state_to_tss32(ctxt, ops, &tss_seg); | ||
| 2312 | |||
| 2313 | ret = ops->write_std(old_tss_base, &tss_seg, sizeof tss_seg, ctxt->vcpu, | ||
| 2314 | &err); | ||
| 2315 | if (ret == X86EMUL_PROPAGATE_FAULT) { | ||
| 2316 | /* FIXME: need to provide precise fault address */ | ||
| 2317 | kvm_inject_page_fault(ctxt->vcpu, old_tss_base, err); | ||
| 2318 | return ret; | ||
| 2319 | } | ||
| 2320 | |||
| 2321 | ret = ops->read_std(new_tss_base, &tss_seg, sizeof tss_seg, ctxt->vcpu, | ||
| 2322 | &err); | ||
| 2323 | if (ret == X86EMUL_PROPAGATE_FAULT) { | ||
| 2324 | /* FIXME: need to provide precise fault address */ | ||
| 2325 | kvm_inject_page_fault(ctxt->vcpu, new_tss_base, err); | ||
| 2326 | return ret; | ||
| 2327 | } | ||
| 2328 | |||
| 2329 | if (old_tss_sel != 0xffff) { | ||
| 2330 | tss_seg.prev_task_link = old_tss_sel; | ||
| 2331 | |||
| 2332 | ret = ops->write_std(new_tss_base, | ||
| 2333 | &tss_seg.prev_task_link, | ||
| 2334 | sizeof tss_seg.prev_task_link, | ||
| 2335 | ctxt->vcpu, &err); | ||
| 2336 | if (ret == X86EMUL_PROPAGATE_FAULT) { | ||
| 2337 | /* FIXME: need to provide precise fault address */ | ||
| 2338 | kvm_inject_page_fault(ctxt->vcpu, new_tss_base, err); | ||
| 2339 | return ret; | ||
| 2340 | } | ||
| 2341 | } | ||
| 2342 | |||
| 2343 | return load_state_from_tss32(ctxt, ops, &tss_seg); | ||
| 2344 | } | ||
| 2345 | |||
| 2346 | static int emulator_do_task_switch(struct x86_emulate_ctxt *ctxt, | ||
| 2347 | struct x86_emulate_ops *ops, | ||
| 2348 | u16 tss_selector, int reason, | ||
| 2349 | bool has_error_code, u32 error_code) | ||
| 2350 | { | ||
| 2351 | struct desc_struct curr_tss_desc, next_tss_desc; | ||
| 2352 | int ret; | ||
| 2353 | u16 old_tss_sel = ops->get_segment_selector(VCPU_SREG_TR, ctxt->vcpu); | ||
| 2354 | ulong old_tss_base = | ||
| 2355 | get_cached_descriptor_base(ctxt, ops, VCPU_SREG_TR); | ||
| 2356 | u32 desc_limit; | ||
| 2357 | |||
| 2358 | /* FIXME: old_tss_base == ~0 ? */ | ||
| 2359 | |||
| 2360 | ret = read_segment_descriptor(ctxt, ops, tss_selector, &next_tss_desc); | ||
| 2361 | if (ret != X86EMUL_CONTINUE) | ||
| 2362 | return ret; | ||
| 2363 | ret = read_segment_descriptor(ctxt, ops, old_tss_sel, &curr_tss_desc); | ||
| 2364 | if (ret != X86EMUL_CONTINUE) | ||
| 2365 | return ret; | ||
| 2366 | |||
| 2367 | /* FIXME: check that next_tss_desc is tss */ | ||
| 2368 | |||
| 2369 | if (reason != TASK_SWITCH_IRET) { | ||
| 2370 | if ((tss_selector & 3) > next_tss_desc.dpl || | ||
| 2371 | ops->cpl(ctxt->vcpu) > next_tss_desc.dpl) { | ||
| 2372 | kvm_inject_gp(ctxt->vcpu, 0); | ||
| 2373 | return X86EMUL_PROPAGATE_FAULT; | ||
| 2374 | } | ||
| 2375 | } | ||
| 2376 | |||
| 2377 | desc_limit = desc_limit_scaled(&next_tss_desc); | ||
| 2378 | if (!next_tss_desc.p || | ||
| 2379 | ((desc_limit < 0x67 && (next_tss_desc.type & 8)) || | ||
| 2380 | desc_limit < 0x2b)) { | ||
| 2381 | kvm_queue_exception_e(ctxt->vcpu, TS_VECTOR, | ||
| 2382 | tss_selector & 0xfffc); | ||
| 2383 | return X86EMUL_PROPAGATE_FAULT; | ||
| 2384 | } | ||
| 2385 | |||
| 2386 | if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) { | ||
| 2387 | curr_tss_desc.type &= ~(1 << 1); /* clear busy flag */ | ||
| 2388 | write_segment_descriptor(ctxt, ops, old_tss_sel, | ||
| 2389 | &curr_tss_desc); | ||
| 2390 | } | ||
| 2391 | |||
| 2392 | if (reason == TASK_SWITCH_IRET) | ||
| 2393 | ctxt->eflags = ctxt->eflags & ~X86_EFLAGS_NT; | ||
| 2394 | |||
| 2395 | /* set back link to prev task only if NT bit is set in eflags | ||
| 2396 | note that old_tss_sel is not used afetr this point */ | ||
| 2397 | if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE) | ||
| 2398 | old_tss_sel = 0xffff; | ||
| 2399 | |||
| 2400 | if (next_tss_desc.type & 8) | ||
| 2401 | ret = task_switch_32(ctxt, ops, tss_selector, old_tss_sel, | ||
| 2402 | old_tss_base, &next_tss_desc); | ||
| 2403 | else | ||
| 2404 | ret = task_switch_16(ctxt, ops, tss_selector, old_tss_sel, | ||
| 2405 | old_tss_base, &next_tss_desc); | ||
| 2406 | if (ret != X86EMUL_CONTINUE) | ||
| 2407 | return ret; | ||
| 2408 | |||
| 2409 | if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) | ||
| 2410 | ctxt->eflags = ctxt->eflags | X86_EFLAGS_NT; | ||
| 2411 | |||
| 2412 | if (reason != TASK_SWITCH_IRET) { | ||
| 2413 | next_tss_desc.type |= (1 << 1); /* set busy flag */ | ||
| 2414 | write_segment_descriptor(ctxt, ops, tss_selector, | ||
| 2415 | &next_tss_desc); | ||
| 2416 | } | ||
| 2417 | |||
| 2418 | ops->set_cr(0, ops->get_cr(0, ctxt->vcpu) | X86_CR0_TS, ctxt->vcpu); | ||
| 2419 | ops->set_cached_descriptor(&next_tss_desc, VCPU_SREG_TR, ctxt->vcpu); | ||
| 2420 | ops->set_segment_selector(tss_selector, VCPU_SREG_TR, ctxt->vcpu); | ||
| 2421 | |||
| 2422 | if (has_error_code) { | ||
| 2423 | struct decode_cache *c = &ctxt->decode; | ||
| 2424 | |||
| 2425 | c->op_bytes = c->ad_bytes = (next_tss_desc.type & 8) ? 4 : 2; | ||
| 2426 | c->lock_prefix = 0; | ||
| 2427 | c->src.val = (unsigned long) error_code; | ||
| 2428 | emulate_push(ctxt); | ||
| 2429 | } | ||
| 2430 | |||
| 2431 | return ret; | ||
| 2432 | } | ||
| 2433 | |||
| 2434 | int emulator_task_switch(struct x86_emulate_ctxt *ctxt, | ||
| 2435 | struct x86_emulate_ops *ops, | ||
| 2436 | u16 tss_selector, int reason, | ||
| 2437 | bool has_error_code, u32 error_code) | ||
| 2438 | { | ||
| 2439 | struct decode_cache *c = &ctxt->decode; | ||
| 2440 | int rc; | ||
| 2441 | |||
| 2442 | memset(c, 0, sizeof(struct decode_cache)); | ||
| 2443 | c->eip = ctxt->eip; | ||
| 2444 | memcpy(c->regs, ctxt->vcpu->arch.regs, sizeof c->regs); | ||
| 2445 | c->dst.type = OP_NONE; | ||
| 2446 | |||
| 2447 | rc = emulator_do_task_switch(ctxt, ops, tss_selector, reason, | ||
| 2448 | has_error_code, error_code); | ||
| 2449 | |||
| 2450 | if (rc == X86EMUL_CONTINUE) { | ||
| 2451 | memcpy(ctxt->vcpu->arch.regs, c->regs, sizeof c->regs); | ||
| 2452 | kvm_rip_write(ctxt->vcpu, c->eip); | ||
| 2453 | rc = writeback(ctxt, ops); | ||
| 2454 | } | ||
| 2455 | |||
| 2456 | return (rc == X86EMUL_UNHANDLEABLE) ? -1 : 0; | ||
| 2457 | } | ||
| 2458 | |||
| 2459 | static void string_addr_inc(struct x86_emulate_ctxt *ctxt, unsigned long base, | ||
| 2460 | int reg, struct operand *op) | ||
| 2461 | { | ||
| 2462 | struct decode_cache *c = &ctxt->decode; | ||
| 2463 | int df = (ctxt->eflags & EFLG_DF) ? -1 : 1; | ||
| 2464 | |||
| 2465 | register_address_increment(c, &c->regs[reg], df * op->bytes); | ||
| 2466 | op->ptr = (unsigned long *)register_address(c, base, c->regs[reg]); | ||
| 2467 | } | ||
| 2468 | |||
| 1810 | int | 2469 | int |
| 1811 | x86_emulate_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops) | 2470 | x86_emulate_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops) |
| 1812 | { | 2471 | { |
| 1813 | unsigned long memop = 0; | ||
| 1814 | u64 msr_data; | 2472 | u64 msr_data; |
| 1815 | unsigned long saved_eip = 0; | ||
| 1816 | struct decode_cache *c = &ctxt->decode; | 2473 | struct decode_cache *c = &ctxt->decode; |
| 1817 | unsigned int port; | 2474 | int rc = X86EMUL_CONTINUE; |
| 1818 | int io_dir_in; | 2475 | int saved_dst_type = c->dst.type; |
| 1819 | int rc = 0; | ||
| 1820 | 2476 | ||
| 1821 | ctxt->interruptibility = 0; | 2477 | ctxt->interruptibility = 0; |
| 1822 | 2478 | ||
| @@ -1826,26 +2482,30 @@ x86_emulate_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops) | |||
| 1826 | */ | 2482 | */ |
| 1827 | 2483 | ||
| 1828 | memcpy(c->regs, ctxt->vcpu->arch.regs, sizeof c->regs); | 2484 | memcpy(c->regs, ctxt->vcpu->arch.regs, sizeof c->regs); |
| 1829 | saved_eip = c->eip; | 2485 | |
| 2486 | if (ctxt->mode == X86EMUL_MODE_PROT64 && (c->d & No64)) { | ||
| 2487 | kvm_queue_exception(ctxt->vcpu, UD_VECTOR); | ||
| 2488 | goto done; | ||
| 2489 | } | ||
| 1830 | 2490 | ||
| 1831 | /* LOCK prefix is allowed only with some instructions */ | 2491 | /* LOCK prefix is allowed only with some instructions */ |
| 1832 | if (c->lock_prefix && !(c->d & Lock)) { | 2492 | if (c->lock_prefix && (!(c->d & Lock) || c->dst.type != OP_MEM)) { |
| 1833 | kvm_queue_exception(ctxt->vcpu, UD_VECTOR); | 2493 | kvm_queue_exception(ctxt->vcpu, UD_VECTOR); |
| 1834 | goto done; | 2494 | goto done; |
| 1835 | } | 2495 | } |
| 1836 | 2496 | ||
| 1837 | /* Privileged instruction can be executed only in CPL=0 */ | 2497 | /* Privileged instruction can be executed only in CPL=0 */ |
| 1838 | if ((c->d & Priv) && kvm_x86_ops->get_cpl(ctxt->vcpu)) { | 2498 | if ((c->d & Priv) && ops->cpl(ctxt->vcpu)) { |
| 1839 | kvm_inject_gp(ctxt->vcpu, 0); | 2499 | kvm_inject_gp(ctxt->vcpu, 0); |
| 1840 | goto done; | 2500 | goto done; |
| 1841 | } | 2501 | } |
| 1842 | 2502 | ||
| 1843 | if (((c->d & ModRM) && (c->modrm_mod != 3)) || (c->d & MemAbs)) | ||
| 1844 | memop = c->modrm_ea; | ||
| 1845 | |||
| 1846 | if (c->rep_prefix && (c->d & String)) { | 2503 | if (c->rep_prefix && (c->d & String)) { |
| 2504 | ctxt->restart = true; | ||
| 1847 | /* All REP prefixes have the same first termination condition */ | 2505 | /* All REP prefixes have the same first termination condition */ |
| 1848 | if (c->regs[VCPU_REGS_RCX] == 0) { | 2506 | if (address_mask(c, c->regs[VCPU_REGS_RCX]) == 0) { |
| 2507 | string_done: | ||
| 2508 | ctxt->restart = false; | ||
| 1849 | kvm_rip_write(ctxt->vcpu, c->eip); | 2509 | kvm_rip_write(ctxt->vcpu, c->eip); |
| 1850 | goto done; | 2510 | goto done; |
| 1851 | } | 2511 | } |
| @@ -1857,25 +2517,18 @@ x86_emulate_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops) | |||
| 1857 | * - if REPNE/REPNZ and ZF = 1 then done | 2517 | * - if REPNE/REPNZ and ZF = 1 then done |
| 1858 | */ | 2518 | */ |
| 1859 | if ((c->b == 0xa6) || (c->b == 0xa7) || | 2519 | if ((c->b == 0xa6) || (c->b == 0xa7) || |
| 1860 | (c->b == 0xae) || (c->b == 0xaf)) { | 2520 | (c->b == 0xae) || (c->b == 0xaf)) { |
| 1861 | if ((c->rep_prefix == REPE_PREFIX) && | 2521 | if ((c->rep_prefix == REPE_PREFIX) && |
| 1862 | ((ctxt->eflags & EFLG_ZF) == 0)) { | 2522 | ((ctxt->eflags & EFLG_ZF) == 0)) |
| 1863 | kvm_rip_write(ctxt->vcpu, c->eip); | 2523 | goto string_done; |
| 1864 | goto done; | ||
| 1865 | } | ||
| 1866 | if ((c->rep_prefix == REPNE_PREFIX) && | 2524 | if ((c->rep_prefix == REPNE_PREFIX) && |
| 1867 | ((ctxt->eflags & EFLG_ZF) == EFLG_ZF)) { | 2525 | ((ctxt->eflags & EFLG_ZF) == EFLG_ZF)) |
| 1868 | kvm_rip_write(ctxt->vcpu, c->eip); | 2526 | goto string_done; |
| 1869 | goto done; | ||
| 1870 | } | ||
| 1871 | } | 2527 | } |
| 1872 | c->regs[VCPU_REGS_RCX]--; | 2528 | c->eip = ctxt->eip; |
| 1873 | c->eip = kvm_rip_read(ctxt->vcpu); | ||
| 1874 | } | 2529 | } |
| 1875 | 2530 | ||
| 1876 | if (c->src.type == OP_MEM) { | 2531 | if (c->src.type == OP_MEM) { |
| 1877 | c->src.ptr = (unsigned long *)memop; | ||
| 1878 | c->src.val = 0; | ||
| 1879 | rc = ops->read_emulated((unsigned long)c->src.ptr, | 2532 | rc = ops->read_emulated((unsigned long)c->src.ptr, |
| 1880 | &c->src.val, | 2533 | &c->src.val, |
| 1881 | c->src.bytes, | 2534 | c->src.bytes, |
| @@ -1885,29 +2538,25 @@ x86_emulate_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops) | |||
| 1885 | c->src.orig_val = c->src.val; | 2538 | c->src.orig_val = c->src.val; |
| 1886 | } | 2539 | } |
| 1887 | 2540 | ||
| 2541 | if (c->src2.type == OP_MEM) { | ||
| 2542 | rc = ops->read_emulated((unsigned long)c->src2.ptr, | ||
| 2543 | &c->src2.val, | ||
| 2544 | c->src2.bytes, | ||
| 2545 | ctxt->vcpu); | ||
| 2546 | if (rc != X86EMUL_CONTINUE) | ||
| 2547 | goto done; | ||
| 2548 | } | ||
| 2549 | |||
| 1888 | if ((c->d & DstMask) == ImplicitOps) | 2550 | if ((c->d & DstMask) == ImplicitOps) |
| 1889 | goto special_insn; | 2551 | goto special_insn; |
| 1890 | 2552 | ||
| 1891 | 2553 | ||
| 1892 | if (c->dst.type == OP_MEM) { | 2554 | if ((c->dst.type == OP_MEM) && !(c->d & Mov)) { |
| 1893 | c->dst.ptr = (unsigned long *)memop; | 2555 | /* optimisation - avoid slow emulated read if Mov */ |
| 1894 | c->dst.bytes = (c->d & ByteOp) ? 1 : c->op_bytes; | 2556 | rc = ops->read_emulated((unsigned long)c->dst.ptr, &c->dst.val, |
| 1895 | c->dst.val = 0; | 2557 | c->dst.bytes, ctxt->vcpu); |
| 1896 | if (c->d & BitOp) { | 2558 | if (rc != X86EMUL_CONTINUE) |
| 1897 | unsigned long mask = ~(c->dst.bytes * 8 - 1); | 2559 | goto done; |
| 1898 | |||
| 1899 | c->dst.ptr = (void *)c->dst.ptr + | ||
| 1900 | (c->src.val & mask) / 8; | ||
| 1901 | } | ||
| 1902 | if (!(c->d & Mov)) { | ||
| 1903 | /* optimisation - avoid slow emulated read */ | ||
| 1904 | rc = ops->read_emulated((unsigned long)c->dst.ptr, | ||
| 1905 | &c->dst.val, | ||
| 1906 | c->dst.bytes, | ||
| 1907 | ctxt->vcpu); | ||
| 1908 | if (rc != X86EMUL_CONTINUE) | ||
| 1909 | goto done; | ||
| 1910 | } | ||
| 1911 | } | 2560 | } |
| 1912 | c->dst.orig_val = c->dst.val; | 2561 | c->dst.orig_val = c->dst.val; |
| 1913 | 2562 | ||
| @@ -1926,7 +2575,7 @@ special_insn: | |||
| 1926 | break; | 2575 | break; |
| 1927 | case 0x07: /* pop es */ | 2576 | case 0x07: /* pop es */ |
| 1928 | rc = emulate_pop_sreg(ctxt, ops, VCPU_SREG_ES); | 2577 | rc = emulate_pop_sreg(ctxt, ops, VCPU_SREG_ES); |
| 1929 | if (rc != 0) | 2578 | if (rc != X86EMUL_CONTINUE) |
| 1930 | goto done; | 2579 | goto done; |
| 1931 | break; | 2580 | break; |
| 1932 | case 0x08 ... 0x0d: | 2581 | case 0x08 ... 0x0d: |
| @@ -1945,7 +2594,7 @@ special_insn: | |||
| 1945 | break; | 2594 | break; |
| 1946 | case 0x17: /* pop ss */ | 2595 | case 0x17: /* pop ss */ |
| 1947 | rc = emulate_pop_sreg(ctxt, ops, VCPU_SREG_SS); | 2596 | rc = emulate_pop_sreg(ctxt, ops, VCPU_SREG_SS); |
| 1948 | if (rc != 0) | 2597 | if (rc != X86EMUL_CONTINUE) |
| 1949 | goto done; | 2598 | goto done; |
| 1950 | break; | 2599 | break; |
| 1951 | case 0x18 ... 0x1d: | 2600 | case 0x18 ... 0x1d: |
| @@ -1957,7 +2606,7 @@ special_insn: | |||
| 1957 | break; | 2606 | break; |
| 1958 | case 0x1f: /* pop ds */ | 2607 | case 0x1f: /* pop ds */ |
| 1959 | rc = emulate_pop_sreg(ctxt, ops, VCPU_SREG_DS); | 2608 | rc = emulate_pop_sreg(ctxt, ops, VCPU_SREG_DS); |
| 1960 | if (rc != 0) | 2609 | if (rc != X86EMUL_CONTINUE) |
| 1961 | goto done; | 2610 | goto done; |
| 1962 | break; | 2611 | break; |
| 1963 | case 0x20 ... 0x25: | 2612 | case 0x20 ... 0x25: |
| @@ -1988,7 +2637,7 @@ special_insn: | |||
| 1988 | case 0x58 ... 0x5f: /* pop reg */ | 2637 | case 0x58 ... 0x5f: /* pop reg */ |
| 1989 | pop_instruction: | 2638 | pop_instruction: |
| 1990 | rc = emulate_pop(ctxt, ops, &c->dst.val, c->op_bytes); | 2639 | rc = emulate_pop(ctxt, ops, &c->dst.val, c->op_bytes); |
| 1991 | if (rc != 0) | 2640 | if (rc != X86EMUL_CONTINUE) |
| 1992 | goto done; | 2641 | goto done; |
| 1993 | break; | 2642 | break; |
| 1994 | case 0x60: /* pusha */ | 2643 | case 0x60: /* pusha */ |
| @@ -1996,7 +2645,7 @@ special_insn: | |||
| 1996 | break; | 2645 | break; |
| 1997 | case 0x61: /* popa */ | 2646 | case 0x61: /* popa */ |
| 1998 | rc = emulate_popa(ctxt, ops); | 2647 | rc = emulate_popa(ctxt, ops); |
| 1999 | if (rc != 0) | 2648 | if (rc != X86EMUL_CONTINUE) |
| 2000 | goto done; | 2649 | goto done; |
| 2001 | break; | 2650 | break; |
| 2002 | case 0x63: /* movsxd */ | 2651 | case 0x63: /* movsxd */ |
| @@ -2010,47 +2659,29 @@ special_insn: | |||
| 2010 | break; | 2659 | break; |
| 2011 | case 0x6c: /* insb */ | 2660 | case 0x6c: /* insb */ |
| 2012 | case 0x6d: /* insw/insd */ | 2661 | case 0x6d: /* insw/insd */ |
| 2662 | c->dst.bytes = min(c->dst.bytes, 4u); | ||
| 2013 | if (!emulator_io_permited(ctxt, ops, c->regs[VCPU_REGS_RDX], | 2663 | if (!emulator_io_permited(ctxt, ops, c->regs[VCPU_REGS_RDX], |
| 2014 | (c->d & ByteOp) ? 1 : c->op_bytes)) { | 2664 | c->dst.bytes)) { |
| 2015 | kvm_inject_gp(ctxt->vcpu, 0); | 2665 | kvm_inject_gp(ctxt->vcpu, 0); |
| 2016 | goto done; | 2666 | goto done; |
| 2017 | } | 2667 | } |
| 2018 | if (kvm_emulate_pio_string(ctxt->vcpu, | 2668 | if (!pio_in_emulated(ctxt, ops, c->dst.bytes, |
| 2019 | 1, | 2669 | c->regs[VCPU_REGS_RDX], &c->dst.val)) |
| 2020 | (c->d & ByteOp) ? 1 : c->op_bytes, | 2670 | goto done; /* IO is needed, skip writeback */ |
| 2021 | c->rep_prefix ? | 2671 | break; |
| 2022 | address_mask(c, c->regs[VCPU_REGS_RCX]) : 1, | ||
| 2023 | (ctxt->eflags & EFLG_DF), | ||
| 2024 | register_address(c, es_base(ctxt), | ||
| 2025 | c->regs[VCPU_REGS_RDI]), | ||
| 2026 | c->rep_prefix, | ||
| 2027 | c->regs[VCPU_REGS_RDX]) == 0) { | ||
| 2028 | c->eip = saved_eip; | ||
| 2029 | return -1; | ||
| 2030 | } | ||
| 2031 | return 0; | ||
| 2032 | case 0x6e: /* outsb */ | 2672 | case 0x6e: /* outsb */ |
| 2033 | case 0x6f: /* outsw/outsd */ | 2673 | case 0x6f: /* outsw/outsd */ |
| 2674 | c->src.bytes = min(c->src.bytes, 4u); | ||
| 2034 | if (!emulator_io_permited(ctxt, ops, c->regs[VCPU_REGS_RDX], | 2675 | if (!emulator_io_permited(ctxt, ops, c->regs[VCPU_REGS_RDX], |
| 2035 | (c->d & ByteOp) ? 1 : c->op_bytes)) { | 2676 | c->src.bytes)) { |
| 2036 | kvm_inject_gp(ctxt->vcpu, 0); | 2677 | kvm_inject_gp(ctxt->vcpu, 0); |
| 2037 | goto done; | 2678 | goto done; |
| 2038 | } | 2679 | } |
| 2039 | if (kvm_emulate_pio_string(ctxt->vcpu, | 2680 | ops->pio_out_emulated(c->src.bytes, c->regs[VCPU_REGS_RDX], |
| 2040 | 0, | 2681 | &c->src.val, 1, ctxt->vcpu); |
| 2041 | (c->d & ByteOp) ? 1 : c->op_bytes, | 2682 | |
| 2042 | c->rep_prefix ? | 2683 | c->dst.type = OP_NONE; /* nothing to writeback */ |
| 2043 | address_mask(c, c->regs[VCPU_REGS_RCX]) : 1, | 2684 | break; |
| 2044 | (ctxt->eflags & EFLG_DF), | ||
| 2045 | register_address(c, | ||
| 2046 | seg_override_base(ctxt, c), | ||
| 2047 | c->regs[VCPU_REGS_RSI]), | ||
| 2048 | c->rep_prefix, | ||
| 2049 | c->regs[VCPU_REGS_RDX]) == 0) { | ||
| 2050 | c->eip = saved_eip; | ||
| 2051 | return -1; | ||
| 2052 | } | ||
| 2053 | return 0; | ||
| 2054 | case 0x70 ... 0x7f: /* jcc (short) */ | 2685 | case 0x70 ... 0x7f: /* jcc (short) */ |
| 2055 | if (test_cc(c->b, ctxt->eflags)) | 2686 | if (test_cc(c->b, ctxt->eflags)) |
| 2056 | jmp_rel(c, c->src.val); | 2687 | jmp_rel(c, c->src.val); |
| @@ -2107,12 +2738,11 @@ special_insn: | |||
| 2107 | case 0x8c: { /* mov r/m, sreg */ | 2738 | case 0x8c: { /* mov r/m, sreg */ |
| 2108 | struct kvm_segment segreg; | 2739 | struct kvm_segment segreg; |
| 2109 | 2740 | ||
| 2110 | if (c->modrm_reg <= 5) | 2741 | if (c->modrm_reg <= VCPU_SREG_GS) |
| 2111 | kvm_get_segment(ctxt->vcpu, &segreg, c->modrm_reg); | 2742 | kvm_get_segment(ctxt->vcpu, &segreg, c->modrm_reg); |
| 2112 | else { | 2743 | else { |
| 2113 | printk(KERN_INFO "0x8c: Invalid segreg in modrm byte 0x%02x\n", | 2744 | kvm_queue_exception(ctxt->vcpu, UD_VECTOR); |
| 2114 | c->modrm); | 2745 | goto done; |
| 2115 | goto cannot_emulate; | ||
| 2116 | } | 2746 | } |
| 2117 | c->dst.val = segreg.selector; | 2747 | c->dst.val = segreg.selector; |
| 2118 | break; | 2748 | break; |
| @@ -2132,16 +2762,16 @@ special_insn: | |||
| 2132 | } | 2762 | } |
| 2133 | 2763 | ||
| 2134 | if (c->modrm_reg == VCPU_SREG_SS) | 2764 | if (c->modrm_reg == VCPU_SREG_SS) |
| 2135 | toggle_interruptibility(ctxt, X86_SHADOW_INT_MOV_SS); | 2765 | toggle_interruptibility(ctxt, KVM_X86_SHADOW_INT_MOV_SS); |
| 2136 | 2766 | ||
| 2137 | rc = kvm_load_segment_descriptor(ctxt->vcpu, sel, c->modrm_reg); | 2767 | rc = load_segment_descriptor(ctxt, ops, sel, c->modrm_reg); |
| 2138 | 2768 | ||
| 2139 | c->dst.type = OP_NONE; /* Disable writeback. */ | 2769 | c->dst.type = OP_NONE; /* Disable writeback. */ |
| 2140 | break; | 2770 | break; |
| 2141 | } | 2771 | } |
| 2142 | case 0x8f: /* pop (sole member of Grp1a) */ | 2772 | case 0x8f: /* pop (sole member of Grp1a) */ |
| 2143 | rc = emulate_grp1a(ctxt, ops); | 2773 | rc = emulate_grp1a(ctxt, ops); |
| 2144 | if (rc != 0) | 2774 | if (rc != X86EMUL_CONTINUE) |
| 2145 | goto done; | 2775 | goto done; |
| 2146 | break; | 2776 | break; |
| 2147 | case 0x90: /* nop / xchg r8,rax */ | 2777 | case 0x90: /* nop / xchg r8,rax */ |
| @@ -2175,89 +2805,16 @@ special_insn: | |||
| 2175 | c->dst.val = (unsigned long)c->regs[VCPU_REGS_RAX]; | 2805 | c->dst.val = (unsigned long)c->regs[VCPU_REGS_RAX]; |
| 2176 | break; | 2806 | break; |
| 2177 | case 0xa4 ... 0xa5: /* movs */ | 2807 | case 0xa4 ... 0xa5: /* movs */ |
| 2178 | c->dst.type = OP_MEM; | 2808 | goto mov; |
| 2179 | c->dst.bytes = (c->d & ByteOp) ? 1 : c->op_bytes; | ||
| 2180 | c->dst.ptr = (unsigned long *)register_address(c, | ||
| 2181 | es_base(ctxt), | ||
| 2182 | c->regs[VCPU_REGS_RDI]); | ||
| 2183 | rc = ops->read_emulated(register_address(c, | ||
| 2184 | seg_override_base(ctxt, c), | ||
| 2185 | c->regs[VCPU_REGS_RSI]), | ||
| 2186 | &c->dst.val, | ||
| 2187 | c->dst.bytes, ctxt->vcpu); | ||
| 2188 | if (rc != X86EMUL_CONTINUE) | ||
| 2189 | goto done; | ||
| 2190 | register_address_increment(c, &c->regs[VCPU_REGS_RSI], | ||
| 2191 | (ctxt->eflags & EFLG_DF) ? -c->dst.bytes | ||
| 2192 | : c->dst.bytes); | ||
| 2193 | register_address_increment(c, &c->regs[VCPU_REGS_RDI], | ||
| 2194 | (ctxt->eflags & EFLG_DF) ? -c->dst.bytes | ||
| 2195 | : c->dst.bytes); | ||
| 2196 | break; | ||
| 2197 | case 0xa6 ... 0xa7: /* cmps */ | 2809 | case 0xa6 ... 0xa7: /* cmps */ |
| 2198 | c->src.type = OP_NONE; /* Disable writeback. */ | ||
| 2199 | c->src.bytes = (c->d & ByteOp) ? 1 : c->op_bytes; | ||
| 2200 | c->src.ptr = (unsigned long *)register_address(c, | ||
| 2201 | seg_override_base(ctxt, c), | ||
| 2202 | c->regs[VCPU_REGS_RSI]); | ||
| 2203 | rc = ops->read_emulated((unsigned long)c->src.ptr, | ||
| 2204 | &c->src.val, | ||
| 2205 | c->src.bytes, | ||
| 2206 | ctxt->vcpu); | ||
| 2207 | if (rc != X86EMUL_CONTINUE) | ||
| 2208 | goto done; | ||
| 2209 | |||
| 2210 | c->dst.type = OP_NONE; /* Disable writeback. */ | 2810 | c->dst.type = OP_NONE; /* Disable writeback. */ |
| 2211 | c->dst.bytes = (c->d & ByteOp) ? 1 : c->op_bytes; | ||
| 2212 | c->dst.ptr = (unsigned long *)register_address(c, | ||
| 2213 | es_base(ctxt), | ||
| 2214 | c->regs[VCPU_REGS_RDI]); | ||
| 2215 | rc = ops->read_emulated((unsigned long)c->dst.ptr, | ||
| 2216 | &c->dst.val, | ||
| 2217 | c->dst.bytes, | ||
| 2218 | ctxt->vcpu); | ||
| 2219 | if (rc != X86EMUL_CONTINUE) | ||
| 2220 | goto done; | ||
| 2221 | |||
| 2222 | DPRINTF("cmps: mem1=0x%p mem2=0x%p\n", c->src.ptr, c->dst.ptr); | 2811 | DPRINTF("cmps: mem1=0x%p mem2=0x%p\n", c->src.ptr, c->dst.ptr); |
| 2223 | 2812 | goto cmp; | |
| 2224 | emulate_2op_SrcV("cmp", c->src, c->dst, ctxt->eflags); | ||
| 2225 | |||
| 2226 | register_address_increment(c, &c->regs[VCPU_REGS_RSI], | ||
| 2227 | (ctxt->eflags & EFLG_DF) ? -c->src.bytes | ||
| 2228 | : c->src.bytes); | ||
| 2229 | register_address_increment(c, &c->regs[VCPU_REGS_RDI], | ||
| 2230 | (ctxt->eflags & EFLG_DF) ? -c->dst.bytes | ||
| 2231 | : c->dst.bytes); | ||
| 2232 | |||
| 2233 | break; | ||
| 2234 | case 0xaa ... 0xab: /* stos */ | 2813 | case 0xaa ... 0xab: /* stos */ |
| 2235 | c->dst.type = OP_MEM; | ||
| 2236 | c->dst.bytes = (c->d & ByteOp) ? 1 : c->op_bytes; | ||
| 2237 | c->dst.ptr = (unsigned long *)register_address(c, | ||
| 2238 | es_base(ctxt), | ||
| 2239 | c->regs[VCPU_REGS_RDI]); | ||
| 2240 | c->dst.val = c->regs[VCPU_REGS_RAX]; | 2814 | c->dst.val = c->regs[VCPU_REGS_RAX]; |
| 2241 | register_address_increment(c, &c->regs[VCPU_REGS_RDI], | ||
| 2242 | (ctxt->eflags & EFLG_DF) ? -c->dst.bytes | ||
| 2243 | : c->dst.bytes); | ||
| 2244 | break; | 2815 | break; |
| 2245 | case 0xac ... 0xad: /* lods */ | 2816 | case 0xac ... 0xad: /* lods */ |
| 2246 | c->dst.type = OP_REG; | 2817 | goto mov; |
| 2247 | c->dst.bytes = (c->d & ByteOp) ? 1 : c->op_bytes; | ||
| 2248 | c->dst.ptr = (unsigned long *)&c->regs[VCPU_REGS_RAX]; | ||
| 2249 | rc = ops->read_emulated(register_address(c, | ||
| 2250 | seg_override_base(ctxt, c), | ||
| 2251 | c->regs[VCPU_REGS_RSI]), | ||
| 2252 | &c->dst.val, | ||
| 2253 | c->dst.bytes, | ||
| 2254 | ctxt->vcpu); | ||
| 2255 | if (rc != X86EMUL_CONTINUE) | ||
| 2256 | goto done; | ||
| 2257 | register_address_increment(c, &c->regs[VCPU_REGS_RSI], | ||
| 2258 | (ctxt->eflags & EFLG_DF) ? -c->dst.bytes | ||
| 2259 | : c->dst.bytes); | ||
| 2260 | break; | ||
| 2261 | case 0xae ... 0xaf: /* scas */ | 2818 | case 0xae ... 0xaf: /* scas */ |
| 2262 | DPRINTF("Urk! I don't handle SCAS.\n"); | 2819 | DPRINTF("Urk! I don't handle SCAS.\n"); |
| 2263 | goto cannot_emulate; | 2820 | goto cannot_emulate; |
| @@ -2277,7 +2834,7 @@ special_insn: | |||
| 2277 | break; | 2834 | break; |
| 2278 | case 0xcb: /* ret far */ | 2835 | case 0xcb: /* ret far */ |
| 2279 | rc = emulate_ret_far(ctxt, ops); | 2836 | rc = emulate_ret_far(ctxt, ops); |
| 2280 | if (rc) | 2837 | if (rc != X86EMUL_CONTINUE) |
| 2281 | goto done; | 2838 | goto done; |
| 2282 | break; | 2839 | break; |
| 2283 | case 0xd0 ... 0xd1: /* Grp2 */ | 2840 | case 0xd0 ... 0xd1: /* Grp2 */ |
| @@ -2290,14 +2847,10 @@ special_insn: | |||
| 2290 | break; | 2847 | break; |
| 2291 | case 0xe4: /* inb */ | 2848 | case 0xe4: /* inb */ |
| 2292 | case 0xe5: /* in */ | 2849 | case 0xe5: /* in */ |
| 2293 | port = c->src.val; | 2850 | goto do_io_in; |
| 2294 | io_dir_in = 1; | ||
| 2295 | goto do_io; | ||
| 2296 | case 0xe6: /* outb */ | 2851 | case 0xe6: /* outb */ |
| 2297 | case 0xe7: /* out */ | 2852 | case 0xe7: /* out */ |
| 2298 | port = c->src.val; | 2853 | goto do_io_out; |
| 2299 | io_dir_in = 0; | ||
| 2300 | goto do_io; | ||
| 2301 | case 0xe8: /* call (near) */ { | 2854 | case 0xe8: /* call (near) */ { |
| 2302 | long int rel = c->src.val; | 2855 | long int rel = c->src.val; |
| 2303 | c->src.val = (unsigned long) c->eip; | 2856 | c->src.val = (unsigned long) c->eip; |
| @@ -2308,8 +2861,9 @@ special_insn: | |||
| 2308 | case 0xe9: /* jmp rel */ | 2861 | case 0xe9: /* jmp rel */ |
| 2309 | goto jmp; | 2862 | goto jmp; |
| 2310 | case 0xea: /* jmp far */ | 2863 | case 0xea: /* jmp far */ |
| 2311 | if (kvm_load_segment_descriptor(ctxt->vcpu, c->src2.val, | 2864 | jump_far: |
| 2312 | VCPU_SREG_CS)) | 2865 | if (load_segment_descriptor(ctxt, ops, c->src2.val, |
| 2866 | VCPU_SREG_CS)) | ||
| 2313 | goto done; | 2867 | goto done; |
| 2314 | 2868 | ||
| 2315 | c->eip = c->src.val; | 2869 | c->eip = c->src.val; |
| @@ -2321,25 +2875,29 @@ special_insn: | |||
| 2321 | break; | 2875 | break; |
| 2322 | case 0xec: /* in al,dx */ | 2876 | case 0xec: /* in al,dx */ |
| 2323 | case 0xed: /* in (e/r)ax,dx */ | 2877 | case 0xed: /* in (e/r)ax,dx */ |
| 2324 | port = c->regs[VCPU_REGS_RDX]; | 2878 | c->src.val = c->regs[VCPU_REGS_RDX]; |
| 2325 | io_dir_in = 1; | 2879 | do_io_in: |
| 2326 | goto do_io; | 2880 | c->dst.bytes = min(c->dst.bytes, 4u); |
| 2881 | if (!emulator_io_permited(ctxt, ops, c->src.val, c->dst.bytes)) { | ||
| 2882 | kvm_inject_gp(ctxt->vcpu, 0); | ||
| 2883 | goto done; | ||
| 2884 | } | ||
| 2885 | if (!pio_in_emulated(ctxt, ops, c->dst.bytes, c->src.val, | ||
| 2886 | &c->dst.val)) | ||
| 2887 | goto done; /* IO is needed */ | ||
| 2888 | break; | ||
| 2327 | case 0xee: /* out al,dx */ | 2889 | case 0xee: /* out al,dx */ |
| 2328 | case 0xef: /* out (e/r)ax,dx */ | 2890 | case 0xef: /* out (e/r)ax,dx */ |
| 2329 | port = c->regs[VCPU_REGS_RDX]; | 2891 | c->src.val = c->regs[VCPU_REGS_RDX]; |
| 2330 | io_dir_in = 0; | 2892 | do_io_out: |
| 2331 | do_io: | 2893 | c->dst.bytes = min(c->dst.bytes, 4u); |
| 2332 | if (!emulator_io_permited(ctxt, ops, port, | 2894 | if (!emulator_io_permited(ctxt, ops, c->src.val, c->dst.bytes)) { |
| 2333 | (c->d & ByteOp) ? 1 : c->op_bytes)) { | ||
| 2334 | kvm_inject_gp(ctxt->vcpu, 0); | 2895 | kvm_inject_gp(ctxt->vcpu, 0); |
| 2335 | goto done; | 2896 | goto done; |
| 2336 | } | 2897 | } |
| 2337 | if (kvm_emulate_pio(ctxt->vcpu, io_dir_in, | 2898 | ops->pio_out_emulated(c->dst.bytes, c->src.val, &c->dst.val, 1, |
| 2338 | (c->d & ByteOp) ? 1 : c->op_bytes, | 2899 | ctxt->vcpu); |
| 2339 | port) != 0) { | 2900 | c->dst.type = OP_NONE; /* Disable writeback. */ |
| 2340 | c->eip = saved_eip; | ||
| 2341 | goto cannot_emulate; | ||
| 2342 | } | ||
| 2343 | break; | 2901 | break; |
| 2344 | case 0xf4: /* hlt */ | 2902 | case 0xf4: /* hlt */ |
| 2345 | ctxt->vcpu->arch.halt_request = 1; | 2903 | ctxt->vcpu->arch.halt_request = 1; |
| @@ -2350,16 +2908,15 @@ special_insn: | |||
| 2350 | c->dst.type = OP_NONE; /* Disable writeback. */ | 2908 | c->dst.type = OP_NONE; /* Disable writeback. */ |
| 2351 | break; | 2909 | break; |
| 2352 | case 0xf6 ... 0xf7: /* Grp3 */ | 2910 | case 0xf6 ... 0xf7: /* Grp3 */ |
| 2353 | rc = emulate_grp3(ctxt, ops); | 2911 | if (!emulate_grp3(ctxt, ops)) |
| 2354 | if (rc != 0) | 2912 | goto cannot_emulate; |
| 2355 | goto done; | ||
| 2356 | break; | 2913 | break; |
| 2357 | case 0xf8: /* clc */ | 2914 | case 0xf8: /* clc */ |
| 2358 | ctxt->eflags &= ~EFLG_CF; | 2915 | ctxt->eflags &= ~EFLG_CF; |
| 2359 | c->dst.type = OP_NONE; /* Disable writeback. */ | 2916 | c->dst.type = OP_NONE; /* Disable writeback. */ |
| 2360 | break; | 2917 | break; |
| 2361 | case 0xfa: /* cli */ | 2918 | case 0xfa: /* cli */ |
| 2362 | if (emulator_bad_iopl(ctxt)) | 2919 | if (emulator_bad_iopl(ctxt, ops)) |
| 2363 | kvm_inject_gp(ctxt->vcpu, 0); | 2920 | kvm_inject_gp(ctxt->vcpu, 0); |
| 2364 | else { | 2921 | else { |
| 2365 | ctxt->eflags &= ~X86_EFLAGS_IF; | 2922 | ctxt->eflags &= ~X86_EFLAGS_IF; |
| @@ -2367,10 +2924,10 @@ special_insn: | |||
| 2367 | } | 2924 | } |
| 2368 | break; | 2925 | break; |
| 2369 | case 0xfb: /* sti */ | 2926 | case 0xfb: /* sti */ |
| 2370 | if (emulator_bad_iopl(ctxt)) | 2927 | if (emulator_bad_iopl(ctxt, ops)) |
| 2371 | kvm_inject_gp(ctxt->vcpu, 0); | 2928 | kvm_inject_gp(ctxt->vcpu, 0); |
| 2372 | else { | 2929 | else { |
| 2373 | toggle_interruptibility(ctxt, X86_SHADOW_INT_STI); | 2930 | toggle_interruptibility(ctxt, KVM_X86_SHADOW_INT_STI); |
| 2374 | ctxt->eflags |= X86_EFLAGS_IF; | 2931 | ctxt->eflags |= X86_EFLAGS_IF; |
| 2375 | c->dst.type = OP_NONE; /* Disable writeback. */ | 2932 | c->dst.type = OP_NONE; /* Disable writeback. */ |
| 2376 | } | 2933 | } |
| @@ -2383,28 +2940,55 @@ special_insn: | |||
| 2383 | ctxt->eflags |= EFLG_DF; | 2940 | ctxt->eflags |= EFLG_DF; |
| 2384 | c->dst.type = OP_NONE; /* Disable writeback. */ | 2941 | c->dst.type = OP_NONE; /* Disable writeback. */ |
| 2385 | break; | 2942 | break; |
| 2386 | case 0xfe ... 0xff: /* Grp4/Grp5 */ | 2943 | case 0xfe: /* Grp4 */ |
| 2944 | grp45: | ||
| 2387 | rc = emulate_grp45(ctxt, ops); | 2945 | rc = emulate_grp45(ctxt, ops); |
| 2388 | if (rc != 0) | 2946 | if (rc != X86EMUL_CONTINUE) |
| 2389 | goto done; | 2947 | goto done; |
| 2390 | break; | 2948 | break; |
| 2949 | case 0xff: /* Grp5 */ | ||
| 2950 | if (c->modrm_reg == 5) | ||
| 2951 | goto jump_far; | ||
| 2952 | goto grp45; | ||
| 2391 | } | 2953 | } |
| 2392 | 2954 | ||
| 2393 | writeback: | 2955 | writeback: |
| 2394 | rc = writeback(ctxt, ops); | 2956 | rc = writeback(ctxt, ops); |
| 2395 | if (rc != 0) | 2957 | if (rc != X86EMUL_CONTINUE) |
| 2396 | goto done; | 2958 | goto done; |
| 2397 | 2959 | ||
| 2960 | /* | ||
| 2961 | * restore dst type in case the decoding will be reused | ||
| 2962 | * (happens for string instruction ) | ||
| 2963 | */ | ||
| 2964 | c->dst.type = saved_dst_type; | ||
| 2965 | |||
| 2966 | if ((c->d & SrcMask) == SrcSI) | ||
| 2967 | string_addr_inc(ctxt, seg_override_base(ctxt, c), VCPU_REGS_RSI, | ||
| 2968 | &c->src); | ||
| 2969 | |||
| 2970 | if ((c->d & DstMask) == DstDI) | ||
| 2971 | string_addr_inc(ctxt, es_base(ctxt), VCPU_REGS_RDI, &c->dst); | ||
| 2972 | |||
| 2973 | if (c->rep_prefix && (c->d & String)) { | ||
| 2974 | struct read_cache *rc = &ctxt->decode.io_read; | ||
| 2975 | register_address_increment(c, &c->regs[VCPU_REGS_RCX], -1); | ||
| 2976 | /* | ||
| 2977 | * Re-enter guest when pio read ahead buffer is empty or, | ||
| 2978 | * if it is not used, after each 1024 iteration. | ||
| 2979 | */ | ||
| 2980 | if ((rc->end == 0 && !(c->regs[VCPU_REGS_RCX] & 0x3ff)) || | ||
| 2981 | (rc->end != 0 && rc->end == rc->pos)) | ||
| 2982 | ctxt->restart = false; | ||
| 2983 | } | ||
| 2984 | |||
| 2398 | /* Commit shadow register state. */ | 2985 | /* Commit shadow register state. */ |
| 2399 | memcpy(ctxt->vcpu->arch.regs, c->regs, sizeof c->regs); | 2986 | memcpy(ctxt->vcpu->arch.regs, c->regs, sizeof c->regs); |
| 2400 | kvm_rip_write(ctxt->vcpu, c->eip); | 2987 | kvm_rip_write(ctxt->vcpu, c->eip); |
| 2988 | ops->set_rflags(ctxt->vcpu, ctxt->eflags); | ||
| 2401 | 2989 | ||
| 2402 | done: | 2990 | done: |
| 2403 | if (rc == X86EMUL_UNHANDLEABLE) { | 2991 | return (rc == X86EMUL_UNHANDLEABLE) ? -1 : 0; |
| 2404 | c->eip = saved_eip; | ||
| 2405 | return -1; | ||
| 2406 | } | ||
| 2407 | return 0; | ||
| 2408 | 2992 | ||
| 2409 | twobyte_insn: | 2993 | twobyte_insn: |
| 2410 | switch (c->b) { | 2994 | switch (c->b) { |
| @@ -2418,18 +3002,18 @@ twobyte_insn: | |||
| 2418 | goto cannot_emulate; | 3002 | goto cannot_emulate; |
| 2419 | 3003 | ||
| 2420 | rc = kvm_fix_hypercall(ctxt->vcpu); | 3004 | rc = kvm_fix_hypercall(ctxt->vcpu); |
| 2421 | if (rc) | 3005 | if (rc != X86EMUL_CONTINUE) |
| 2422 | goto done; | 3006 | goto done; |
| 2423 | 3007 | ||
| 2424 | /* Let the processor re-execute the fixed hypercall */ | 3008 | /* Let the processor re-execute the fixed hypercall */ |
| 2425 | c->eip = kvm_rip_read(ctxt->vcpu); | 3009 | c->eip = ctxt->eip; |
| 2426 | /* Disable writeback. */ | 3010 | /* Disable writeback. */ |
| 2427 | c->dst.type = OP_NONE; | 3011 | c->dst.type = OP_NONE; |
| 2428 | break; | 3012 | break; |
| 2429 | case 2: /* lgdt */ | 3013 | case 2: /* lgdt */ |
| 2430 | rc = read_descriptor(ctxt, ops, c->src.ptr, | 3014 | rc = read_descriptor(ctxt, ops, c->src.ptr, |
| 2431 | &size, &address, c->op_bytes); | 3015 | &size, &address, c->op_bytes); |
| 2432 | if (rc) | 3016 | if (rc != X86EMUL_CONTINUE) |
| 2433 | goto done; | 3017 | goto done; |
| 2434 | realmode_lgdt(ctxt->vcpu, size, address); | 3018 | realmode_lgdt(ctxt->vcpu, size, address); |
| 2435 | /* Disable writeback. */ | 3019 | /* Disable writeback. */ |
| @@ -2440,7 +3024,7 @@ twobyte_insn: | |||
| 2440 | switch (c->modrm_rm) { | 3024 | switch (c->modrm_rm) { |
| 2441 | case 1: | 3025 | case 1: |
| 2442 | rc = kvm_fix_hypercall(ctxt->vcpu); | 3026 | rc = kvm_fix_hypercall(ctxt->vcpu); |
| 2443 | if (rc) | 3027 | if (rc != X86EMUL_CONTINUE) |
| 2444 | goto done; | 3028 | goto done; |
| 2445 | break; | 3029 | break; |
| 2446 | default: | 3030 | default: |
| @@ -2450,7 +3034,7 @@ twobyte_insn: | |||
| 2450 | rc = read_descriptor(ctxt, ops, c->src.ptr, | 3034 | rc = read_descriptor(ctxt, ops, c->src.ptr, |
| 2451 | &size, &address, | 3035 | &size, &address, |
| 2452 | c->op_bytes); | 3036 | c->op_bytes); |
| 2453 | if (rc) | 3037 | if (rc != X86EMUL_CONTINUE) |
| 2454 | goto done; | 3038 | goto done; |
| 2455 | realmode_lidt(ctxt->vcpu, size, address); | 3039 | realmode_lidt(ctxt->vcpu, size, address); |
| 2456 | } | 3040 | } |
| @@ -2459,15 +3043,18 @@ twobyte_insn: | |||
| 2459 | break; | 3043 | break; |
| 2460 | case 4: /* smsw */ | 3044 | case 4: /* smsw */ |
| 2461 | c->dst.bytes = 2; | 3045 | c->dst.bytes = 2; |
| 2462 | c->dst.val = realmode_get_cr(ctxt->vcpu, 0); | 3046 | c->dst.val = ops->get_cr(0, ctxt->vcpu); |
| 2463 | break; | 3047 | break; |
| 2464 | case 6: /* lmsw */ | 3048 | case 6: /* lmsw */ |
| 2465 | realmode_lmsw(ctxt->vcpu, (u16)c->src.val, | 3049 | ops->set_cr(0, (ops->get_cr(0, ctxt->vcpu) & ~0x0ful) | |
| 2466 | &ctxt->eflags); | 3050 | (c->src.val & 0x0f), ctxt->vcpu); |
| 2467 | c->dst.type = OP_NONE; | 3051 | c->dst.type = OP_NONE; |
| 2468 | break; | 3052 | break; |
| 3053 | case 5: /* not defined */ | ||
| 3054 | kvm_queue_exception(ctxt->vcpu, UD_VECTOR); | ||
| 3055 | goto done; | ||
| 2469 | case 7: /* invlpg*/ | 3056 | case 7: /* invlpg*/ |
| 2470 | emulate_invlpg(ctxt->vcpu, memop); | 3057 | emulate_invlpg(ctxt->vcpu, c->modrm_ea); |
| 2471 | /* Disable writeback. */ | 3058 | /* Disable writeback. */ |
| 2472 | c->dst.type = OP_NONE; | 3059 | c->dst.type = OP_NONE; |
| 2473 | break; | 3060 | break; |
| @@ -2493,54 +3080,54 @@ twobyte_insn: | |||
| 2493 | c->dst.type = OP_NONE; | 3080 | c->dst.type = OP_NONE; |
| 2494 | break; | 3081 | break; |
| 2495 | case 0x20: /* mov cr, reg */ | 3082 | case 0x20: /* mov cr, reg */ |
| 2496 | if (c->modrm_mod != 3) | 3083 | switch (c->modrm_reg) { |
| 2497 | goto cannot_emulate; | 3084 | case 1: |
| 2498 | c->regs[c->modrm_rm] = | 3085 | case 5 ... 7: |
| 2499 | realmode_get_cr(ctxt->vcpu, c->modrm_reg); | 3086 | case 9 ... 15: |
| 3087 | kvm_queue_exception(ctxt->vcpu, UD_VECTOR); | ||
| 3088 | goto done; | ||
| 3089 | } | ||
| 3090 | c->regs[c->modrm_rm] = ops->get_cr(c->modrm_reg, ctxt->vcpu); | ||
| 2500 | c->dst.type = OP_NONE; /* no writeback */ | 3091 | c->dst.type = OP_NONE; /* no writeback */ |
| 2501 | break; | 3092 | break; |
| 2502 | case 0x21: /* mov from dr to reg */ | 3093 | case 0x21: /* mov from dr to reg */ |
| 2503 | if (c->modrm_mod != 3) | 3094 | if ((ops->get_cr(4, ctxt->vcpu) & X86_CR4_DE) && |
| 2504 | goto cannot_emulate; | 3095 | (c->modrm_reg == 4 || c->modrm_reg == 5)) { |
| 2505 | rc = emulator_get_dr(ctxt, c->modrm_reg, &c->regs[c->modrm_rm]); | 3096 | kvm_queue_exception(ctxt->vcpu, UD_VECTOR); |
| 2506 | if (rc) | 3097 | goto done; |
| 2507 | goto cannot_emulate; | 3098 | } |
| 3099 | emulator_get_dr(ctxt, c->modrm_reg, &c->regs[c->modrm_rm]); | ||
| 2508 | c->dst.type = OP_NONE; /* no writeback */ | 3100 | c->dst.type = OP_NONE; /* no writeback */ |
| 2509 | break; | 3101 | break; |
| 2510 | case 0x22: /* mov reg, cr */ | 3102 | case 0x22: /* mov reg, cr */ |
| 2511 | if (c->modrm_mod != 3) | 3103 | ops->set_cr(c->modrm_reg, c->modrm_val, ctxt->vcpu); |
| 2512 | goto cannot_emulate; | ||
| 2513 | realmode_set_cr(ctxt->vcpu, | ||
| 2514 | c->modrm_reg, c->modrm_val, &ctxt->eflags); | ||
| 2515 | c->dst.type = OP_NONE; | 3104 | c->dst.type = OP_NONE; |
| 2516 | break; | 3105 | break; |
| 2517 | case 0x23: /* mov from reg to dr */ | 3106 | case 0x23: /* mov from reg to dr */ |
| 2518 | if (c->modrm_mod != 3) | 3107 | if ((ops->get_cr(4, ctxt->vcpu) & X86_CR4_DE) && |
| 2519 | goto cannot_emulate; | 3108 | (c->modrm_reg == 4 || c->modrm_reg == 5)) { |
| 2520 | rc = emulator_set_dr(ctxt, c->modrm_reg, | 3109 | kvm_queue_exception(ctxt->vcpu, UD_VECTOR); |
| 2521 | c->regs[c->modrm_rm]); | 3110 | goto done; |
| 2522 | if (rc) | 3111 | } |
| 2523 | goto cannot_emulate; | 3112 | emulator_set_dr(ctxt, c->modrm_reg, c->regs[c->modrm_rm]); |
| 2524 | c->dst.type = OP_NONE; /* no writeback */ | 3113 | c->dst.type = OP_NONE; /* no writeback */ |
| 2525 | break; | 3114 | break; |
| 2526 | case 0x30: | 3115 | case 0x30: |
| 2527 | /* wrmsr */ | 3116 | /* wrmsr */ |
| 2528 | msr_data = (u32)c->regs[VCPU_REGS_RAX] | 3117 | msr_data = (u32)c->regs[VCPU_REGS_RAX] |
| 2529 | | ((u64)c->regs[VCPU_REGS_RDX] << 32); | 3118 | | ((u64)c->regs[VCPU_REGS_RDX] << 32); |
| 2530 | rc = kvm_set_msr(ctxt->vcpu, c->regs[VCPU_REGS_RCX], msr_data); | 3119 | if (kvm_set_msr(ctxt->vcpu, c->regs[VCPU_REGS_RCX], msr_data)) { |
| 2531 | if (rc) { | ||
| 2532 | kvm_inject_gp(ctxt->vcpu, 0); | 3120 | kvm_inject_gp(ctxt->vcpu, 0); |
| 2533 | c->eip = kvm_rip_read(ctxt->vcpu); | 3121 | goto done; |
| 2534 | } | 3122 | } |
| 2535 | rc = X86EMUL_CONTINUE; | 3123 | rc = X86EMUL_CONTINUE; |
| 2536 | c->dst.type = OP_NONE; | 3124 | c->dst.type = OP_NONE; |
| 2537 | break; | 3125 | break; |
| 2538 | case 0x32: | 3126 | case 0x32: |
| 2539 | /* rdmsr */ | 3127 | /* rdmsr */ |
| 2540 | rc = kvm_get_msr(ctxt->vcpu, c->regs[VCPU_REGS_RCX], &msr_data); | 3128 | if (kvm_get_msr(ctxt->vcpu, c->regs[VCPU_REGS_RCX], &msr_data)) { |
| 2541 | if (rc) { | ||
| 2542 | kvm_inject_gp(ctxt->vcpu, 0); | 3129 | kvm_inject_gp(ctxt->vcpu, 0); |
| 2543 | c->eip = kvm_rip_read(ctxt->vcpu); | 3130 | goto done; |
| 2544 | } else { | 3131 | } else { |
| 2545 | c->regs[VCPU_REGS_RAX] = (u32)msr_data; | 3132 | c->regs[VCPU_REGS_RAX] = (u32)msr_data; |
| 2546 | c->regs[VCPU_REGS_RDX] = msr_data >> 32; | 3133 | c->regs[VCPU_REGS_RDX] = msr_data >> 32; |
| @@ -2577,7 +3164,7 @@ twobyte_insn: | |||
| 2577 | break; | 3164 | break; |
| 2578 | case 0xa1: /* pop fs */ | 3165 | case 0xa1: /* pop fs */ |
| 2579 | rc = emulate_pop_sreg(ctxt, ops, VCPU_SREG_FS); | 3166 | rc = emulate_pop_sreg(ctxt, ops, VCPU_SREG_FS); |
| 2580 | if (rc != 0) | 3167 | if (rc != X86EMUL_CONTINUE) |
| 2581 | goto done; | 3168 | goto done; |
| 2582 | break; | 3169 | break; |
| 2583 | case 0xa3: | 3170 | case 0xa3: |
| @@ -2596,7 +3183,7 @@ twobyte_insn: | |||
| 2596 | break; | 3183 | break; |
| 2597 | case 0xa9: /* pop gs */ | 3184 | case 0xa9: /* pop gs */ |
| 2598 | rc = emulate_pop_sreg(ctxt, ops, VCPU_SREG_GS); | 3185 | rc = emulate_pop_sreg(ctxt, ops, VCPU_SREG_GS); |
| 2599 | if (rc != 0) | 3186 | if (rc != X86EMUL_CONTINUE) |
| 2600 | goto done; | 3187 | goto done; |
| 2601 | break; | 3188 | break; |
| 2602 | case 0xab: | 3189 | case 0xab: |
| @@ -2668,16 +3255,14 @@ twobyte_insn: | |||
| 2668 | (u64) c->src.val; | 3255 | (u64) c->src.val; |
| 2669 | break; | 3256 | break; |
| 2670 | case 0xc7: /* Grp9 (cmpxchg8b) */ | 3257 | case 0xc7: /* Grp9 (cmpxchg8b) */ |
| 2671 | rc = emulate_grp9(ctxt, ops, memop); | 3258 | rc = emulate_grp9(ctxt, ops); |
| 2672 | if (rc != 0) | 3259 | if (rc != X86EMUL_CONTINUE) |
| 2673 | goto done; | 3260 | goto done; |
| 2674 | c->dst.type = OP_NONE; | ||
| 2675 | break; | 3261 | break; |
| 2676 | } | 3262 | } |
| 2677 | goto writeback; | 3263 | goto writeback; |
| 2678 | 3264 | ||
| 2679 | cannot_emulate: | 3265 | cannot_emulate: |
| 2680 | DPRINTF("Cannot emulate %02x\n", c->b); | 3266 | DPRINTF("Cannot emulate %02x\n", c->b); |
| 2681 | c->eip = saved_eip; | ||
| 2682 | return -1; | 3267 | return -1; |
| 2683 | } | 3268 | } |
diff --git a/arch/x86/kvm/i8259.c b/arch/x86/kvm/i8259.c index a790fa128a9f..93825ff3338f 100644 --- a/arch/x86/kvm/i8259.c +++ b/arch/x86/kvm/i8259.c | |||
| @@ -33,6 +33,29 @@ | |||
| 33 | #include <linux/kvm_host.h> | 33 | #include <linux/kvm_host.h> |
| 34 | #include "trace.h" | 34 | #include "trace.h" |
| 35 | 35 | ||
| 36 | static void pic_lock(struct kvm_pic *s) | ||
| 37 | __acquires(&s->lock) | ||
| 38 | { | ||
| 39 | raw_spin_lock(&s->lock); | ||
| 40 | } | ||
| 41 | |||
| 42 | static void pic_unlock(struct kvm_pic *s) | ||
| 43 | __releases(&s->lock) | ||
| 44 | { | ||
| 45 | bool wakeup = s->wakeup_needed; | ||
| 46 | struct kvm_vcpu *vcpu; | ||
| 47 | |||
| 48 | s->wakeup_needed = false; | ||
| 49 | |||
| 50 | raw_spin_unlock(&s->lock); | ||
| 51 | |||
| 52 | if (wakeup) { | ||
| 53 | vcpu = s->kvm->bsp_vcpu; | ||
| 54 | if (vcpu) | ||
| 55 | kvm_vcpu_kick(vcpu); | ||
| 56 | } | ||
| 57 | } | ||
| 58 | |||
| 36 | static void pic_clear_isr(struct kvm_kpic_state *s, int irq) | 59 | static void pic_clear_isr(struct kvm_kpic_state *s, int irq) |
| 37 | { | 60 | { |
| 38 | s->isr &= ~(1 << irq); | 61 | s->isr &= ~(1 << irq); |
| @@ -45,19 +68,19 @@ static void pic_clear_isr(struct kvm_kpic_state *s, int irq) | |||
| 45 | * Other interrupt may be delivered to PIC while lock is dropped but | 68 | * Other interrupt may be delivered to PIC while lock is dropped but |
| 46 | * it should be safe since PIC state is already updated at this stage. | 69 | * it should be safe since PIC state is already updated at this stage. |
| 47 | */ | 70 | */ |
| 48 | raw_spin_unlock(&s->pics_state->lock); | 71 | pic_unlock(s->pics_state); |
| 49 | kvm_notify_acked_irq(s->pics_state->kvm, SELECT_PIC(irq), irq); | 72 | kvm_notify_acked_irq(s->pics_state->kvm, SELECT_PIC(irq), irq); |
| 50 | raw_spin_lock(&s->pics_state->lock); | 73 | pic_lock(s->pics_state); |
| 51 | } | 74 | } |
| 52 | 75 | ||
| 53 | void kvm_pic_clear_isr_ack(struct kvm *kvm) | 76 | void kvm_pic_clear_isr_ack(struct kvm *kvm) |
| 54 | { | 77 | { |
| 55 | struct kvm_pic *s = pic_irqchip(kvm); | 78 | struct kvm_pic *s = pic_irqchip(kvm); |
| 56 | 79 | ||
| 57 | raw_spin_lock(&s->lock); | 80 | pic_lock(s); |
| 58 | s->pics[0].isr_ack = 0xff; | 81 | s->pics[0].isr_ack = 0xff; |
| 59 | s->pics[1].isr_ack = 0xff; | 82 | s->pics[1].isr_ack = 0xff; |
| 60 | raw_spin_unlock(&s->lock); | 83 | pic_unlock(s); |
| 61 | } | 84 | } |
| 62 | 85 | ||
| 63 | /* | 86 | /* |
| @@ -158,9 +181,9 @@ static void pic_update_irq(struct kvm_pic *s) | |||
| 158 | 181 | ||
| 159 | void kvm_pic_update_irq(struct kvm_pic *s) | 182 | void kvm_pic_update_irq(struct kvm_pic *s) |
| 160 | { | 183 | { |
| 161 | raw_spin_lock(&s->lock); | 184 | pic_lock(s); |
| 162 | pic_update_irq(s); | 185 | pic_update_irq(s); |
| 163 | raw_spin_unlock(&s->lock); | 186 | pic_unlock(s); |
| 164 | } | 187 | } |
| 165 | 188 | ||
| 166 | int kvm_pic_set_irq(void *opaque, int irq, int level) | 189 | int kvm_pic_set_irq(void *opaque, int irq, int level) |
| @@ -168,14 +191,14 @@ int kvm_pic_set_irq(void *opaque, int irq, int level) | |||
| 168 | struct kvm_pic *s = opaque; | 191 | struct kvm_pic *s = opaque; |
| 169 | int ret = -1; | 192 | int ret = -1; |
| 170 | 193 | ||
| 171 | raw_spin_lock(&s->lock); | 194 | pic_lock(s); |
| 172 | if (irq >= 0 && irq < PIC_NUM_PINS) { | 195 | if (irq >= 0 && irq < PIC_NUM_PINS) { |
| 173 | ret = pic_set_irq1(&s->pics[irq >> 3], irq & 7, level); | 196 | ret = pic_set_irq1(&s->pics[irq >> 3], irq & 7, level); |
| 174 | pic_update_irq(s); | 197 | pic_update_irq(s); |
| 175 | trace_kvm_pic_set_irq(irq >> 3, irq & 7, s->pics[irq >> 3].elcr, | 198 | trace_kvm_pic_set_irq(irq >> 3, irq & 7, s->pics[irq >> 3].elcr, |
| 176 | s->pics[irq >> 3].imr, ret == 0); | 199 | s->pics[irq >> 3].imr, ret == 0); |
| 177 | } | 200 | } |
| 178 | raw_spin_unlock(&s->lock); | 201 | pic_unlock(s); |
| 179 | 202 | ||
| 180 | return ret; | 203 | return ret; |
| 181 | } | 204 | } |
| @@ -205,7 +228,7 @@ int kvm_pic_read_irq(struct kvm *kvm) | |||
| 205 | int irq, irq2, intno; | 228 | int irq, irq2, intno; |
| 206 | struct kvm_pic *s = pic_irqchip(kvm); | 229 | struct kvm_pic *s = pic_irqchip(kvm); |
| 207 | 230 | ||
| 208 | raw_spin_lock(&s->lock); | 231 | pic_lock(s); |
| 209 | irq = pic_get_irq(&s->pics[0]); | 232 | irq = pic_get_irq(&s->pics[0]); |
| 210 | if (irq >= 0) { | 233 | if (irq >= 0) { |
| 211 | pic_intack(&s->pics[0], irq); | 234 | pic_intack(&s->pics[0], irq); |
| @@ -230,7 +253,7 @@ int kvm_pic_read_irq(struct kvm *kvm) | |||
| 230 | intno = s->pics[0].irq_base + irq; | 253 | intno = s->pics[0].irq_base + irq; |
| 231 | } | 254 | } |
| 232 | pic_update_irq(s); | 255 | pic_update_irq(s); |
| 233 | raw_spin_unlock(&s->lock); | 256 | pic_unlock(s); |
| 234 | 257 | ||
| 235 | return intno; | 258 | return intno; |
| 236 | } | 259 | } |
| @@ -444,7 +467,7 @@ static int picdev_write(struct kvm_io_device *this, | |||
| 444 | printk(KERN_ERR "PIC: non byte write\n"); | 467 | printk(KERN_ERR "PIC: non byte write\n"); |
| 445 | return 0; | 468 | return 0; |
| 446 | } | 469 | } |
| 447 | raw_spin_lock(&s->lock); | 470 | pic_lock(s); |
| 448 | switch (addr) { | 471 | switch (addr) { |
| 449 | case 0x20: | 472 | case 0x20: |
| 450 | case 0x21: | 473 | case 0x21: |
| @@ -457,7 +480,7 @@ static int picdev_write(struct kvm_io_device *this, | |||
| 457 | elcr_ioport_write(&s->pics[addr & 1], addr, data); | 480 | elcr_ioport_write(&s->pics[addr & 1], addr, data); |
| 458 | break; | 481 | break; |
| 459 | } | 482 | } |
| 460 | raw_spin_unlock(&s->lock); | 483 | pic_unlock(s); |
| 461 | return 0; | 484 | return 0; |
| 462 | } | 485 | } |
| 463 | 486 | ||
| @@ -474,7 +497,7 @@ static int picdev_read(struct kvm_io_device *this, | |||
| 474 | printk(KERN_ERR "PIC: non byte read\n"); | 497 | printk(KERN_ERR "PIC: non byte read\n"); |
| 475 | return 0; | 498 | return 0; |
| 476 | } | 499 | } |
| 477 | raw_spin_lock(&s->lock); | 500 | pic_lock(s); |
| 478 | switch (addr) { | 501 | switch (addr) { |
| 479 | case 0x20: | 502 | case 0x20: |
| 480 | case 0x21: | 503 | case 0x21: |
| @@ -488,7 +511,7 @@ static int picdev_read(struct kvm_io_device *this, | |||
| 488 | break; | 511 | break; |
| 489 | } | 512 | } |
| 490 | *(unsigned char *)val = data; | 513 | *(unsigned char *)val = data; |
| 491 | raw_spin_unlock(&s->lock); | 514 | pic_unlock(s); |
| 492 | return 0; | 515 | return 0; |
| 493 | } | 516 | } |
| 494 | 517 | ||
| @@ -505,7 +528,7 @@ static void pic_irq_request(void *opaque, int level) | |||
| 505 | s->output = level; | 528 | s->output = level; |
| 506 | if (vcpu && level && (s->pics[0].isr_ack & (1 << irq))) { | 529 | if (vcpu && level && (s->pics[0].isr_ack & (1 << irq))) { |
| 507 | s->pics[0].isr_ack &= ~(1 << irq); | 530 | s->pics[0].isr_ack &= ~(1 << irq); |
| 508 | kvm_vcpu_kick(vcpu); | 531 | s->wakeup_needed = true; |
| 509 | } | 532 | } |
| 510 | } | 533 | } |
| 511 | 534 | ||
diff --git a/arch/x86/kvm/irq.h b/arch/x86/kvm/irq.h index 34b15915754d..cd1f362f413d 100644 --- a/arch/x86/kvm/irq.h +++ b/arch/x86/kvm/irq.h | |||
| @@ -63,6 +63,7 @@ struct kvm_kpic_state { | |||
| 63 | 63 | ||
| 64 | struct kvm_pic { | 64 | struct kvm_pic { |
| 65 | raw_spinlock_t lock; | 65 | raw_spinlock_t lock; |
| 66 | bool wakeup_needed; | ||
| 66 | unsigned pending_acks; | 67 | unsigned pending_acks; |
| 67 | struct kvm *kvm; | 68 | struct kvm *kvm; |
| 68 | struct kvm_kpic_state pics[2]; /* 0 is master pic, 1 is slave pic */ | 69 | struct kvm_kpic_state pics[2]; /* 0 is master pic, 1 is slave pic */ |
diff --git a/arch/x86/kvm/kvm_timer.h b/arch/x86/kvm/kvm_timer.h index 55c7524dda54..64bc6ea78d90 100644 --- a/arch/x86/kvm/kvm_timer.h +++ b/arch/x86/kvm/kvm_timer.h | |||
| @@ -10,9 +10,7 @@ struct kvm_timer { | |||
| 10 | }; | 10 | }; |
| 11 | 11 | ||
| 12 | struct kvm_timer_ops { | 12 | struct kvm_timer_ops { |
| 13 | bool (*is_periodic)(struct kvm_timer *); | 13 | bool (*is_periodic)(struct kvm_timer *); |
| 14 | }; | 14 | }; |
| 15 | 15 | ||
| 16 | |||
| 17 | enum hrtimer_restart kvm_timer_fn(struct hrtimer *data); | 16 | enum hrtimer_restart kvm_timer_fn(struct hrtimer *data); |
| 18 | |||
diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c index 19a8906bcaa2..a6f695d76928 100644 --- a/arch/x86/kvm/mmu.c +++ b/arch/x86/kvm/mmu.c | |||
| @@ -148,7 +148,6 @@ module_param(oos_shadow, bool, 0644); | |||
| 148 | 148 | ||
| 149 | #include <trace/events/kvm.h> | 149 | #include <trace/events/kvm.h> |
| 150 | 150 | ||
| 151 | #undef TRACE_INCLUDE_FILE | ||
| 152 | #define CREATE_TRACE_POINTS | 151 | #define CREATE_TRACE_POINTS |
| 153 | #include "mmutrace.h" | 152 | #include "mmutrace.h" |
| 154 | 153 | ||
| @@ -174,12 +173,7 @@ struct kvm_shadow_walk_iterator { | |||
| 174 | shadow_walk_okay(&(_walker)); \ | 173 | shadow_walk_okay(&(_walker)); \ |
| 175 | shadow_walk_next(&(_walker))) | 174 | shadow_walk_next(&(_walker))) |
| 176 | 175 | ||
| 177 | 176 | typedef int (*mmu_parent_walk_fn) (struct kvm_mmu_page *sp); | |
| 178 | struct kvm_unsync_walk { | ||
| 179 | int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk); | ||
| 180 | }; | ||
| 181 | |||
| 182 | typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp); | ||
| 183 | 177 | ||
| 184 | static struct kmem_cache *pte_chain_cache; | 178 | static struct kmem_cache *pte_chain_cache; |
| 185 | static struct kmem_cache *rmap_desc_cache; | 179 | static struct kmem_cache *rmap_desc_cache; |
| @@ -223,7 +217,7 @@ void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, | |||
| 223 | } | 217 | } |
| 224 | EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes); | 218 | EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes); |
| 225 | 219 | ||
| 226 | static int is_write_protection(struct kvm_vcpu *vcpu) | 220 | static bool is_write_protection(struct kvm_vcpu *vcpu) |
| 227 | { | 221 | { |
| 228 | return kvm_read_cr0_bits(vcpu, X86_CR0_WP); | 222 | return kvm_read_cr0_bits(vcpu, X86_CR0_WP); |
| 229 | } | 223 | } |
| @@ -327,7 +321,6 @@ static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache, | |||
| 327 | page = alloc_page(GFP_KERNEL); | 321 | page = alloc_page(GFP_KERNEL); |
| 328 | if (!page) | 322 | if (!page) |
| 329 | return -ENOMEM; | 323 | return -ENOMEM; |
| 330 | set_page_private(page, 0); | ||
| 331 | cache->objects[cache->nobjs++] = page_address(page); | 324 | cache->objects[cache->nobjs++] = page_address(page); |
| 332 | } | 325 | } |
| 333 | return 0; | 326 | return 0; |
| @@ -438,9 +431,9 @@ static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn) | |||
| 438 | int i; | 431 | int i; |
| 439 | 432 | ||
| 440 | gfn = unalias_gfn(kvm, gfn); | 433 | gfn = unalias_gfn(kvm, gfn); |
| 434 | slot = gfn_to_memslot_unaliased(kvm, gfn); | ||
| 441 | for (i = PT_DIRECTORY_LEVEL; | 435 | for (i = PT_DIRECTORY_LEVEL; |
| 442 | i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) { | 436 | i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) { |
| 443 | slot = gfn_to_memslot_unaliased(kvm, gfn); | ||
| 444 | write_count = slot_largepage_idx(gfn, slot, i); | 437 | write_count = slot_largepage_idx(gfn, slot, i); |
| 445 | *write_count -= 1; | 438 | *write_count -= 1; |
| 446 | WARN_ON(*write_count < 0); | 439 | WARN_ON(*write_count < 0); |
| @@ -654,7 +647,6 @@ static void rmap_remove(struct kvm *kvm, u64 *spte) | |||
| 654 | static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte) | 647 | static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte) |
| 655 | { | 648 | { |
| 656 | struct kvm_rmap_desc *desc; | 649 | struct kvm_rmap_desc *desc; |
| 657 | struct kvm_rmap_desc *prev_desc; | ||
| 658 | u64 *prev_spte; | 650 | u64 *prev_spte; |
| 659 | int i; | 651 | int i; |
| 660 | 652 | ||
| @@ -666,7 +658,6 @@ static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte) | |||
| 666 | return NULL; | 658 | return NULL; |
| 667 | } | 659 | } |
| 668 | desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul); | 660 | desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul); |
| 669 | prev_desc = NULL; | ||
| 670 | prev_spte = NULL; | 661 | prev_spte = NULL; |
| 671 | while (desc) { | 662 | while (desc) { |
| 672 | for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) { | 663 | for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) { |
| @@ -794,7 +785,7 @@ static int kvm_handle_hva(struct kvm *kvm, unsigned long hva, | |||
| 794 | int retval = 0; | 785 | int retval = 0; |
| 795 | struct kvm_memslots *slots; | 786 | struct kvm_memslots *slots; |
| 796 | 787 | ||
| 797 | slots = rcu_dereference(kvm->memslots); | 788 | slots = kvm_memslots(kvm); |
| 798 | 789 | ||
| 799 | for (i = 0; i < slots->nmemslots; i++) { | 790 | for (i = 0; i < slots->nmemslots; i++) { |
| 800 | struct kvm_memory_slot *memslot = &slots->memslots[i]; | 791 | struct kvm_memory_slot *memslot = &slots->memslots[i]; |
| @@ -925,7 +916,6 @@ static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu, | |||
| 925 | sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE); | 916 | sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE); |
| 926 | set_page_private(virt_to_page(sp->spt), (unsigned long)sp); | 917 | set_page_private(virt_to_page(sp->spt), (unsigned long)sp); |
| 927 | list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages); | 918 | list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages); |
| 928 | INIT_LIST_HEAD(&sp->oos_link); | ||
| 929 | bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS); | 919 | bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS); |
| 930 | sp->multimapped = 0; | 920 | sp->multimapped = 0; |
| 931 | sp->parent_pte = parent_pte; | 921 | sp->parent_pte = parent_pte; |
| @@ -1009,8 +999,7 @@ static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp, | |||
| 1009 | } | 999 | } |
| 1010 | 1000 | ||
| 1011 | 1001 | ||
| 1012 | static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, | 1002 | static void mmu_parent_walk(struct kvm_mmu_page *sp, mmu_parent_walk_fn fn) |
| 1013 | mmu_parent_walk_fn fn) | ||
| 1014 | { | 1003 | { |
| 1015 | struct kvm_pte_chain *pte_chain; | 1004 | struct kvm_pte_chain *pte_chain; |
| 1016 | struct hlist_node *node; | 1005 | struct hlist_node *node; |
| @@ -1019,8 +1008,8 @@ static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, | |||
| 1019 | 1008 | ||
| 1020 | if (!sp->multimapped && sp->parent_pte) { | 1009 | if (!sp->multimapped && sp->parent_pte) { |
| 1021 | parent_sp = page_header(__pa(sp->parent_pte)); | 1010 | parent_sp = page_header(__pa(sp->parent_pte)); |
| 1022 | fn(vcpu, parent_sp); | 1011 | fn(parent_sp); |
| 1023 | mmu_parent_walk(vcpu, parent_sp, fn); | 1012 | mmu_parent_walk(parent_sp, fn); |
| 1024 | return; | 1013 | return; |
| 1025 | } | 1014 | } |
| 1026 | hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) | 1015 | hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) |
| @@ -1028,8 +1017,8 @@ static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, | |||
| 1028 | if (!pte_chain->parent_ptes[i]) | 1017 | if (!pte_chain->parent_ptes[i]) |
| 1029 | break; | 1018 | break; |
| 1030 | parent_sp = page_header(__pa(pte_chain->parent_ptes[i])); | 1019 | parent_sp = page_header(__pa(pte_chain->parent_ptes[i])); |
| 1031 | fn(vcpu, parent_sp); | 1020 | fn(parent_sp); |
| 1032 | mmu_parent_walk(vcpu, parent_sp, fn); | 1021 | mmu_parent_walk(parent_sp, fn); |
| 1033 | } | 1022 | } |
| 1034 | } | 1023 | } |
| 1035 | 1024 | ||
| @@ -1066,16 +1055,15 @@ static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp) | |||
| 1066 | } | 1055 | } |
| 1067 | } | 1056 | } |
| 1068 | 1057 | ||
| 1069 | static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp) | 1058 | static int unsync_walk_fn(struct kvm_mmu_page *sp) |
| 1070 | { | 1059 | { |
| 1071 | kvm_mmu_update_parents_unsync(sp); | 1060 | kvm_mmu_update_parents_unsync(sp); |
| 1072 | return 1; | 1061 | return 1; |
| 1073 | } | 1062 | } |
| 1074 | 1063 | ||
| 1075 | static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu, | 1064 | static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp) |
| 1076 | struct kvm_mmu_page *sp) | ||
| 1077 | { | 1065 | { |
| 1078 | mmu_parent_walk(vcpu, sp, unsync_walk_fn); | 1066 | mmu_parent_walk(sp, unsync_walk_fn); |
| 1079 | kvm_mmu_update_parents_unsync(sp); | 1067 | kvm_mmu_update_parents_unsync(sp); |
| 1080 | } | 1068 | } |
| 1081 | 1069 | ||
| @@ -1201,6 +1189,7 @@ static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn) | |||
| 1201 | static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp) | 1189 | static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp) |
| 1202 | { | 1190 | { |
| 1203 | WARN_ON(!sp->unsync); | 1191 | WARN_ON(!sp->unsync); |
| 1192 | trace_kvm_mmu_sync_page(sp); | ||
| 1204 | sp->unsync = 0; | 1193 | sp->unsync = 0; |
| 1205 | --kvm->stat.mmu_unsync; | 1194 | --kvm->stat.mmu_unsync; |
| 1206 | } | 1195 | } |
| @@ -1209,12 +1198,11 @@ static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp); | |||
| 1209 | 1198 | ||
| 1210 | static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp) | 1199 | static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp) |
| 1211 | { | 1200 | { |
| 1212 | if (sp->role.glevels != vcpu->arch.mmu.root_level) { | 1201 | if (sp->role.cr4_pae != !!is_pae(vcpu)) { |
| 1213 | kvm_mmu_zap_page(vcpu->kvm, sp); | 1202 | kvm_mmu_zap_page(vcpu->kvm, sp); |
| 1214 | return 1; | 1203 | return 1; |
| 1215 | } | 1204 | } |
| 1216 | 1205 | ||
| 1217 | trace_kvm_mmu_sync_page(sp); | ||
| 1218 | if (rmap_write_protect(vcpu->kvm, sp->gfn)) | 1206 | if (rmap_write_protect(vcpu->kvm, sp->gfn)) |
| 1219 | kvm_flush_remote_tlbs(vcpu->kvm); | 1207 | kvm_flush_remote_tlbs(vcpu->kvm); |
| 1220 | kvm_unlink_unsync_page(vcpu->kvm, sp); | 1208 | kvm_unlink_unsync_page(vcpu->kvm, sp); |
| @@ -1331,6 +1319,8 @@ static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu, | |||
| 1331 | role = vcpu->arch.mmu.base_role; | 1319 | role = vcpu->arch.mmu.base_role; |
| 1332 | role.level = level; | 1320 | role.level = level; |
| 1333 | role.direct = direct; | 1321 | role.direct = direct; |
| 1322 | if (role.direct) | ||
| 1323 | role.cr4_pae = 0; | ||
| 1334 | role.access = access; | 1324 | role.access = access; |
| 1335 | if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) { | 1325 | if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) { |
| 1336 | quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level)); | 1326 | quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level)); |
| @@ -1351,7 +1341,7 @@ static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu, | |||
| 1351 | mmu_page_add_parent_pte(vcpu, sp, parent_pte); | 1341 | mmu_page_add_parent_pte(vcpu, sp, parent_pte); |
| 1352 | if (sp->unsync_children) { | 1342 | if (sp->unsync_children) { |
| 1353 | set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests); | 1343 | set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests); |
| 1354 | kvm_mmu_mark_parents_unsync(vcpu, sp); | 1344 | kvm_mmu_mark_parents_unsync(sp); |
| 1355 | } | 1345 | } |
| 1356 | trace_kvm_mmu_get_page(sp, false); | 1346 | trace_kvm_mmu_get_page(sp, false); |
| 1357 | return sp; | 1347 | return sp; |
| @@ -1573,13 +1563,14 @@ static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn) | |||
| 1573 | r = 0; | 1563 | r = 0; |
| 1574 | index = kvm_page_table_hashfn(gfn); | 1564 | index = kvm_page_table_hashfn(gfn); |
| 1575 | bucket = &kvm->arch.mmu_page_hash[index]; | 1565 | bucket = &kvm->arch.mmu_page_hash[index]; |
| 1566 | restart: | ||
| 1576 | hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) | 1567 | hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) |
| 1577 | if (sp->gfn == gfn && !sp->role.direct) { | 1568 | if (sp->gfn == gfn && !sp->role.direct) { |
| 1578 | pgprintk("%s: gfn %lx role %x\n", __func__, gfn, | 1569 | pgprintk("%s: gfn %lx role %x\n", __func__, gfn, |
| 1579 | sp->role.word); | 1570 | sp->role.word); |
| 1580 | r = 1; | 1571 | r = 1; |
| 1581 | if (kvm_mmu_zap_page(kvm, sp)) | 1572 | if (kvm_mmu_zap_page(kvm, sp)) |
| 1582 | n = bucket->first; | 1573 | goto restart; |
| 1583 | } | 1574 | } |
| 1584 | return r; | 1575 | return r; |
| 1585 | } | 1576 | } |
| @@ -1593,13 +1584,14 @@ static void mmu_unshadow(struct kvm *kvm, gfn_t gfn) | |||
| 1593 | 1584 | ||
| 1594 | index = kvm_page_table_hashfn(gfn); | 1585 | index = kvm_page_table_hashfn(gfn); |
| 1595 | bucket = &kvm->arch.mmu_page_hash[index]; | 1586 | bucket = &kvm->arch.mmu_page_hash[index]; |
| 1587 | restart: | ||
| 1596 | hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) { | 1588 | hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) { |
| 1597 | if (sp->gfn == gfn && !sp->role.direct | 1589 | if (sp->gfn == gfn && !sp->role.direct |
| 1598 | && !sp->role.invalid) { | 1590 | && !sp->role.invalid) { |
| 1599 | pgprintk("%s: zap %lx %x\n", | 1591 | pgprintk("%s: zap %lx %x\n", |
| 1600 | __func__, gfn, sp->role.word); | 1592 | __func__, gfn, sp->role.word); |
| 1601 | if (kvm_mmu_zap_page(kvm, sp)) | 1593 | if (kvm_mmu_zap_page(kvm, sp)) |
| 1602 | nn = bucket->first; | 1594 | goto restart; |
| 1603 | } | 1595 | } |
| 1604 | } | 1596 | } |
| 1605 | } | 1597 | } |
| @@ -1626,20 +1618,6 @@ static void mmu_convert_notrap(struct kvm_mmu_page *sp) | |||
| 1626 | } | 1618 | } |
| 1627 | } | 1619 | } |
| 1628 | 1620 | ||
| 1629 | struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva) | ||
| 1630 | { | ||
| 1631 | struct page *page; | ||
| 1632 | |||
| 1633 | gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL); | ||
| 1634 | |||
| 1635 | if (gpa == UNMAPPED_GVA) | ||
| 1636 | return NULL; | ||
| 1637 | |||
| 1638 | page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT); | ||
| 1639 | |||
| 1640 | return page; | ||
| 1641 | } | ||
| 1642 | |||
| 1643 | /* | 1621 | /* |
| 1644 | * The function is based on mtrr_type_lookup() in | 1622 | * The function is based on mtrr_type_lookup() in |
| 1645 | * arch/x86/kernel/cpu/mtrr/generic.c | 1623 | * arch/x86/kernel/cpu/mtrr/generic.c |
| @@ -1752,7 +1730,6 @@ static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp) | |||
| 1752 | struct kvm_mmu_page *s; | 1730 | struct kvm_mmu_page *s; |
| 1753 | struct hlist_node *node, *n; | 1731 | struct hlist_node *node, *n; |
| 1754 | 1732 | ||
| 1755 | trace_kvm_mmu_unsync_page(sp); | ||
| 1756 | index = kvm_page_table_hashfn(sp->gfn); | 1733 | index = kvm_page_table_hashfn(sp->gfn); |
| 1757 | bucket = &vcpu->kvm->arch.mmu_page_hash[index]; | 1734 | bucket = &vcpu->kvm->arch.mmu_page_hash[index]; |
| 1758 | /* don't unsync if pagetable is shadowed with multiple roles */ | 1735 | /* don't unsync if pagetable is shadowed with multiple roles */ |
| @@ -1762,10 +1739,11 @@ static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp) | |||
| 1762 | if (s->role.word != sp->role.word) | 1739 | if (s->role.word != sp->role.word) |
| 1763 | return 1; | 1740 | return 1; |
| 1764 | } | 1741 | } |
| 1742 | trace_kvm_mmu_unsync_page(sp); | ||
| 1765 | ++vcpu->kvm->stat.mmu_unsync; | 1743 | ++vcpu->kvm->stat.mmu_unsync; |
| 1766 | sp->unsync = 1; | 1744 | sp->unsync = 1; |
| 1767 | 1745 | ||
| 1768 | kvm_mmu_mark_parents_unsync(vcpu, sp); | 1746 | kvm_mmu_mark_parents_unsync(sp); |
| 1769 | 1747 | ||
| 1770 | mmu_convert_notrap(sp); | 1748 | mmu_convert_notrap(sp); |
| 1771 | return 0; | 1749 | return 0; |
| @@ -1837,6 +1815,9 @@ static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep, | |||
| 1837 | 1815 | ||
| 1838 | spte |= PT_WRITABLE_MASK; | 1816 | spte |= PT_WRITABLE_MASK; |
| 1839 | 1817 | ||
| 1818 | if (!tdp_enabled && !(pte_access & ACC_WRITE_MASK)) | ||
| 1819 | spte &= ~PT_USER_MASK; | ||
| 1820 | |||
| 1840 | /* | 1821 | /* |
| 1841 | * Optimization: for pte sync, if spte was writable the hash | 1822 | * Optimization: for pte sync, if spte was writable the hash |
| 1842 | * lookup is unnecessary (and expensive). Write protection | 1823 | * lookup is unnecessary (and expensive). Write protection |
| @@ -1892,6 +1873,8 @@ static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep, | |||
| 1892 | 1873 | ||
| 1893 | child = page_header(pte & PT64_BASE_ADDR_MASK); | 1874 | child = page_header(pte & PT64_BASE_ADDR_MASK); |
| 1894 | mmu_page_remove_parent_pte(child, sptep); | 1875 | mmu_page_remove_parent_pte(child, sptep); |
| 1876 | __set_spte(sptep, shadow_trap_nonpresent_pte); | ||
| 1877 | kvm_flush_remote_tlbs(vcpu->kvm); | ||
| 1895 | } else if (pfn != spte_to_pfn(*sptep)) { | 1878 | } else if (pfn != spte_to_pfn(*sptep)) { |
| 1896 | pgprintk("hfn old %lx new %lx\n", | 1879 | pgprintk("hfn old %lx new %lx\n", |
| 1897 | spte_to_pfn(*sptep), pfn); | 1880 | spte_to_pfn(*sptep), pfn); |
| @@ -2081,21 +2064,23 @@ static int mmu_alloc_roots(struct kvm_vcpu *vcpu) | |||
| 2081 | hpa_t root = vcpu->arch.mmu.root_hpa; | 2064 | hpa_t root = vcpu->arch.mmu.root_hpa; |
| 2082 | 2065 | ||
| 2083 | ASSERT(!VALID_PAGE(root)); | 2066 | ASSERT(!VALID_PAGE(root)); |
| 2084 | if (tdp_enabled) | ||
| 2085 | direct = 1; | ||
| 2086 | if (mmu_check_root(vcpu, root_gfn)) | 2067 | if (mmu_check_root(vcpu, root_gfn)) |
| 2087 | return 1; | 2068 | return 1; |
| 2069 | if (tdp_enabled) { | ||
| 2070 | direct = 1; | ||
| 2071 | root_gfn = 0; | ||
| 2072 | } | ||
| 2073 | spin_lock(&vcpu->kvm->mmu_lock); | ||
| 2088 | sp = kvm_mmu_get_page(vcpu, root_gfn, 0, | 2074 | sp = kvm_mmu_get_page(vcpu, root_gfn, 0, |
| 2089 | PT64_ROOT_LEVEL, direct, | 2075 | PT64_ROOT_LEVEL, direct, |
| 2090 | ACC_ALL, NULL); | 2076 | ACC_ALL, NULL); |
| 2091 | root = __pa(sp->spt); | 2077 | root = __pa(sp->spt); |
| 2092 | ++sp->root_count; | 2078 | ++sp->root_count; |
| 2079 | spin_unlock(&vcpu->kvm->mmu_lock); | ||
| 2093 | vcpu->arch.mmu.root_hpa = root; | 2080 | vcpu->arch.mmu.root_hpa = root; |
| 2094 | return 0; | 2081 | return 0; |
| 2095 | } | 2082 | } |
| 2096 | direct = !is_paging(vcpu); | 2083 | direct = !is_paging(vcpu); |
| 2097 | if (tdp_enabled) | ||
| 2098 | direct = 1; | ||
| 2099 | for (i = 0; i < 4; ++i) { | 2084 | for (i = 0; i < 4; ++i) { |
| 2100 | hpa_t root = vcpu->arch.mmu.pae_root[i]; | 2085 | hpa_t root = vcpu->arch.mmu.pae_root[i]; |
| 2101 | 2086 | ||
| @@ -2111,11 +2096,18 @@ static int mmu_alloc_roots(struct kvm_vcpu *vcpu) | |||
| 2111 | root_gfn = 0; | 2096 | root_gfn = 0; |
| 2112 | if (mmu_check_root(vcpu, root_gfn)) | 2097 | if (mmu_check_root(vcpu, root_gfn)) |
| 2113 | return 1; | 2098 | return 1; |
| 2099 | if (tdp_enabled) { | ||
| 2100 | direct = 1; | ||
| 2101 | root_gfn = i << 30; | ||
| 2102 | } | ||
| 2103 | spin_lock(&vcpu->kvm->mmu_lock); | ||
| 2114 | sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30, | 2104 | sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30, |
| 2115 | PT32_ROOT_LEVEL, direct, | 2105 | PT32_ROOT_LEVEL, direct, |
| 2116 | ACC_ALL, NULL); | 2106 | ACC_ALL, NULL); |
| 2117 | root = __pa(sp->spt); | 2107 | root = __pa(sp->spt); |
| 2118 | ++sp->root_count; | 2108 | ++sp->root_count; |
| 2109 | spin_unlock(&vcpu->kvm->mmu_lock); | ||
| 2110 | |||
| 2119 | vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK; | 2111 | vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK; |
| 2120 | } | 2112 | } |
| 2121 | vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root); | 2113 | vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root); |
| @@ -2299,13 +2291,19 @@ static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level) | |||
| 2299 | /* no rsvd bits for 2 level 4K page table entries */ | 2291 | /* no rsvd bits for 2 level 4K page table entries */ |
| 2300 | context->rsvd_bits_mask[0][1] = 0; | 2292 | context->rsvd_bits_mask[0][1] = 0; |
| 2301 | context->rsvd_bits_mask[0][0] = 0; | 2293 | context->rsvd_bits_mask[0][0] = 0; |
| 2294 | context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0]; | ||
| 2295 | |||
| 2296 | if (!is_pse(vcpu)) { | ||
| 2297 | context->rsvd_bits_mask[1][1] = 0; | ||
| 2298 | break; | ||
| 2299 | } | ||
| 2300 | |||
| 2302 | if (is_cpuid_PSE36()) | 2301 | if (is_cpuid_PSE36()) |
| 2303 | /* 36bits PSE 4MB page */ | 2302 | /* 36bits PSE 4MB page */ |
| 2304 | context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21); | 2303 | context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21); |
| 2305 | else | 2304 | else |
| 2306 | /* 32 bits PSE 4MB page */ | 2305 | /* 32 bits PSE 4MB page */ |
| 2307 | context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21); | 2306 | context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21); |
| 2308 | context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0]; | ||
| 2309 | break; | 2307 | break; |
| 2310 | case PT32E_ROOT_LEVEL: | 2308 | case PT32E_ROOT_LEVEL: |
| 2311 | context->rsvd_bits_mask[0][2] = | 2309 | context->rsvd_bits_mask[0][2] = |
| @@ -2318,7 +2316,7 @@ static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level) | |||
| 2318 | context->rsvd_bits_mask[1][1] = exb_bit_rsvd | | 2316 | context->rsvd_bits_mask[1][1] = exb_bit_rsvd | |
| 2319 | rsvd_bits(maxphyaddr, 62) | | 2317 | rsvd_bits(maxphyaddr, 62) | |
| 2320 | rsvd_bits(13, 20); /* large page */ | 2318 | rsvd_bits(13, 20); /* large page */ |
| 2321 | context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0]; | 2319 | context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0]; |
| 2322 | break; | 2320 | break; |
| 2323 | case PT64_ROOT_LEVEL: | 2321 | case PT64_ROOT_LEVEL: |
| 2324 | context->rsvd_bits_mask[0][3] = exb_bit_rsvd | | 2322 | context->rsvd_bits_mask[0][3] = exb_bit_rsvd | |
| @@ -2336,7 +2334,7 @@ static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level) | |||
| 2336 | context->rsvd_bits_mask[1][1] = exb_bit_rsvd | | 2334 | context->rsvd_bits_mask[1][1] = exb_bit_rsvd | |
| 2337 | rsvd_bits(maxphyaddr, 51) | | 2335 | rsvd_bits(maxphyaddr, 51) | |
| 2338 | rsvd_bits(13, 20); /* large page */ | 2336 | rsvd_bits(13, 20); /* large page */ |
| 2339 | context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0]; | 2337 | context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0]; |
| 2340 | break; | 2338 | break; |
| 2341 | } | 2339 | } |
| 2342 | } | 2340 | } |
| @@ -2438,7 +2436,8 @@ static int init_kvm_softmmu(struct kvm_vcpu *vcpu) | |||
| 2438 | else | 2436 | else |
| 2439 | r = paging32_init_context(vcpu); | 2437 | r = paging32_init_context(vcpu); |
| 2440 | 2438 | ||
| 2441 | vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level; | 2439 | vcpu->arch.mmu.base_role.cr4_pae = !!is_pae(vcpu); |
| 2440 | vcpu->arch.mmu.base_role.cr0_wp = is_write_protection(vcpu); | ||
| 2442 | 2441 | ||
| 2443 | return r; | 2442 | return r; |
| 2444 | } | 2443 | } |
| @@ -2478,7 +2477,9 @@ int kvm_mmu_load(struct kvm_vcpu *vcpu) | |||
| 2478 | goto out; | 2477 | goto out; |
| 2479 | spin_lock(&vcpu->kvm->mmu_lock); | 2478 | spin_lock(&vcpu->kvm->mmu_lock); |
| 2480 | kvm_mmu_free_some_pages(vcpu); | 2479 | kvm_mmu_free_some_pages(vcpu); |
| 2480 | spin_unlock(&vcpu->kvm->mmu_lock); | ||
| 2481 | r = mmu_alloc_roots(vcpu); | 2481 | r = mmu_alloc_roots(vcpu); |
| 2482 | spin_lock(&vcpu->kvm->mmu_lock); | ||
| 2482 | mmu_sync_roots(vcpu); | 2483 | mmu_sync_roots(vcpu); |
| 2483 | spin_unlock(&vcpu->kvm->mmu_lock); | 2484 | spin_unlock(&vcpu->kvm->mmu_lock); |
| 2484 | if (r) | 2485 | if (r) |
| @@ -2527,7 +2528,7 @@ static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu, | |||
| 2527 | } | 2528 | } |
| 2528 | 2529 | ||
| 2529 | ++vcpu->kvm->stat.mmu_pte_updated; | 2530 | ++vcpu->kvm->stat.mmu_pte_updated; |
| 2530 | if (sp->role.glevels == PT32_ROOT_LEVEL) | 2531 | if (!sp->role.cr4_pae) |
| 2531 | paging32_update_pte(vcpu, sp, spte, new); | 2532 | paging32_update_pte(vcpu, sp, spte, new); |
| 2532 | else | 2533 | else |
| 2533 | paging64_update_pte(vcpu, sp, spte, new); | 2534 | paging64_update_pte(vcpu, sp, spte, new); |
| @@ -2562,36 +2563,11 @@ static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu) | |||
| 2562 | } | 2563 | } |
| 2563 | 2564 | ||
| 2564 | static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, | 2565 | static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, |
| 2565 | const u8 *new, int bytes) | 2566 | u64 gpte) |
| 2566 | { | 2567 | { |
| 2567 | gfn_t gfn; | 2568 | gfn_t gfn; |
| 2568 | int r; | ||
| 2569 | u64 gpte = 0; | ||
| 2570 | pfn_t pfn; | 2569 | pfn_t pfn; |
| 2571 | 2570 | ||
| 2572 | if (bytes != 4 && bytes != 8) | ||
| 2573 | return; | ||
| 2574 | |||
| 2575 | /* | ||
| 2576 | * Assume that the pte write on a page table of the same type | ||
| 2577 | * as the current vcpu paging mode. This is nearly always true | ||
| 2578 | * (might be false while changing modes). Note it is verified later | ||
| 2579 | * by update_pte(). | ||
| 2580 | */ | ||
| 2581 | if (is_pae(vcpu)) { | ||
| 2582 | /* Handle a 32-bit guest writing two halves of a 64-bit gpte */ | ||
| 2583 | if ((bytes == 4) && (gpa % 4 == 0)) { | ||
| 2584 | r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8); | ||
| 2585 | if (r) | ||
| 2586 | return; | ||
| 2587 | memcpy((void *)&gpte + (gpa % 8), new, 4); | ||
| 2588 | } else if ((bytes == 8) && (gpa % 8 == 0)) { | ||
| 2589 | memcpy((void *)&gpte, new, 8); | ||
| 2590 | } | ||
| 2591 | } else { | ||
| 2592 | if ((bytes == 4) && (gpa % 4 == 0)) | ||
| 2593 | memcpy((void *)&gpte, new, 4); | ||
| 2594 | } | ||
| 2595 | if (!is_present_gpte(gpte)) | 2571 | if (!is_present_gpte(gpte)) |
| 2596 | return; | 2572 | return; |
| 2597 | gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT; | 2573 | gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT; |
| @@ -2640,10 +2616,46 @@ void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, | |||
| 2640 | int flooded = 0; | 2616 | int flooded = 0; |
| 2641 | int npte; | 2617 | int npte; |
| 2642 | int r; | 2618 | int r; |
| 2619 | int invlpg_counter; | ||
| 2643 | 2620 | ||
| 2644 | pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes); | 2621 | pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes); |
| 2645 | mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes); | 2622 | |
| 2623 | invlpg_counter = atomic_read(&vcpu->kvm->arch.invlpg_counter); | ||
| 2624 | |||
| 2625 | /* | ||
| 2626 | * Assume that the pte write on a page table of the same type | ||
| 2627 | * as the current vcpu paging mode. This is nearly always true | ||
| 2628 | * (might be false while changing modes). Note it is verified later | ||
| 2629 | * by update_pte(). | ||
| 2630 | */ | ||
| 2631 | if ((is_pae(vcpu) && bytes == 4) || !new) { | ||
| 2632 | /* Handle a 32-bit guest writing two halves of a 64-bit gpte */ | ||
| 2633 | if (is_pae(vcpu)) { | ||
| 2634 | gpa &= ~(gpa_t)7; | ||
| 2635 | bytes = 8; | ||
| 2636 | } | ||
| 2637 | r = kvm_read_guest(vcpu->kvm, gpa, &gentry, min(bytes, 8)); | ||
| 2638 | if (r) | ||
| 2639 | gentry = 0; | ||
| 2640 | new = (const u8 *)&gentry; | ||
| 2641 | } | ||
| 2642 | |||
| 2643 | switch (bytes) { | ||
| 2644 | case 4: | ||
| 2645 | gentry = *(const u32 *)new; | ||
| 2646 | break; | ||
| 2647 | case 8: | ||
| 2648 | gentry = *(const u64 *)new; | ||
| 2649 | break; | ||
| 2650 | default: | ||
| 2651 | gentry = 0; | ||
| 2652 | break; | ||
| 2653 | } | ||
| 2654 | |||
| 2655 | mmu_guess_page_from_pte_write(vcpu, gpa, gentry); | ||
| 2646 | spin_lock(&vcpu->kvm->mmu_lock); | 2656 | spin_lock(&vcpu->kvm->mmu_lock); |
| 2657 | if (atomic_read(&vcpu->kvm->arch.invlpg_counter) != invlpg_counter) | ||
| 2658 | gentry = 0; | ||
| 2647 | kvm_mmu_access_page(vcpu, gfn); | 2659 | kvm_mmu_access_page(vcpu, gfn); |
| 2648 | kvm_mmu_free_some_pages(vcpu); | 2660 | kvm_mmu_free_some_pages(vcpu); |
| 2649 | ++vcpu->kvm->stat.mmu_pte_write; | 2661 | ++vcpu->kvm->stat.mmu_pte_write; |
| @@ -2662,10 +2674,12 @@ void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, | |||
| 2662 | } | 2674 | } |
| 2663 | index = kvm_page_table_hashfn(gfn); | 2675 | index = kvm_page_table_hashfn(gfn); |
| 2664 | bucket = &vcpu->kvm->arch.mmu_page_hash[index]; | 2676 | bucket = &vcpu->kvm->arch.mmu_page_hash[index]; |
| 2677 | |||
| 2678 | restart: | ||
| 2665 | hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) { | 2679 | hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) { |
| 2666 | if (sp->gfn != gfn || sp->role.direct || sp->role.invalid) | 2680 | if (sp->gfn != gfn || sp->role.direct || sp->role.invalid) |
| 2667 | continue; | 2681 | continue; |
| 2668 | pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8; | 2682 | pte_size = sp->role.cr4_pae ? 8 : 4; |
| 2669 | misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1); | 2683 | misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1); |
| 2670 | misaligned |= bytes < 4; | 2684 | misaligned |= bytes < 4; |
| 2671 | if (misaligned || flooded) { | 2685 | if (misaligned || flooded) { |
| @@ -2682,14 +2696,14 @@ void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, | |||
| 2682 | pgprintk("misaligned: gpa %llx bytes %d role %x\n", | 2696 | pgprintk("misaligned: gpa %llx bytes %d role %x\n", |
| 2683 | gpa, bytes, sp->role.word); | 2697 | gpa, bytes, sp->role.word); |
| 2684 | if (kvm_mmu_zap_page(vcpu->kvm, sp)) | 2698 | if (kvm_mmu_zap_page(vcpu->kvm, sp)) |
| 2685 | n = bucket->first; | 2699 | goto restart; |
| 2686 | ++vcpu->kvm->stat.mmu_flooded; | 2700 | ++vcpu->kvm->stat.mmu_flooded; |
| 2687 | continue; | 2701 | continue; |
| 2688 | } | 2702 | } |
| 2689 | page_offset = offset; | 2703 | page_offset = offset; |
| 2690 | level = sp->role.level; | 2704 | level = sp->role.level; |
| 2691 | npte = 1; | 2705 | npte = 1; |
| 2692 | if (sp->role.glevels == PT32_ROOT_LEVEL) { | 2706 | if (!sp->role.cr4_pae) { |
| 2693 | page_offset <<= 1; /* 32->64 */ | 2707 | page_offset <<= 1; /* 32->64 */ |
| 2694 | /* | 2708 | /* |
| 2695 | * A 32-bit pde maps 4MB while the shadow pdes map | 2709 | * A 32-bit pde maps 4MB while the shadow pdes map |
| @@ -2707,20 +2721,11 @@ void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, | |||
| 2707 | continue; | 2721 | continue; |
| 2708 | } | 2722 | } |
| 2709 | spte = &sp->spt[page_offset / sizeof(*spte)]; | 2723 | spte = &sp->spt[page_offset / sizeof(*spte)]; |
| 2710 | if ((gpa & (pte_size - 1)) || (bytes < pte_size)) { | ||
| 2711 | gentry = 0; | ||
| 2712 | r = kvm_read_guest_atomic(vcpu->kvm, | ||
| 2713 | gpa & ~(u64)(pte_size - 1), | ||
| 2714 | &gentry, pte_size); | ||
| 2715 | new = (const void *)&gentry; | ||
| 2716 | if (r < 0) | ||
| 2717 | new = NULL; | ||
| 2718 | } | ||
| 2719 | while (npte--) { | 2724 | while (npte--) { |
| 2720 | entry = *spte; | 2725 | entry = *spte; |
| 2721 | mmu_pte_write_zap_pte(vcpu, sp, spte); | 2726 | mmu_pte_write_zap_pte(vcpu, sp, spte); |
| 2722 | if (new) | 2727 | if (gentry) |
| 2723 | mmu_pte_write_new_pte(vcpu, sp, spte, new); | 2728 | mmu_pte_write_new_pte(vcpu, sp, spte, &gentry); |
| 2724 | mmu_pte_write_flush_tlb(vcpu, entry, *spte); | 2729 | mmu_pte_write_flush_tlb(vcpu, entry, *spte); |
| 2725 | ++spte; | 2730 | ++spte; |
| 2726 | } | 2731 | } |
| @@ -2900,22 +2905,23 @@ void kvm_mmu_zap_all(struct kvm *kvm) | |||
| 2900 | struct kvm_mmu_page *sp, *node; | 2905 | struct kvm_mmu_page *sp, *node; |
| 2901 | 2906 | ||
| 2902 | spin_lock(&kvm->mmu_lock); | 2907 | spin_lock(&kvm->mmu_lock); |
| 2908 | restart: | ||
| 2903 | list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link) | 2909 | list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link) |
| 2904 | if (kvm_mmu_zap_page(kvm, sp)) | 2910 | if (kvm_mmu_zap_page(kvm, sp)) |
| 2905 | node = container_of(kvm->arch.active_mmu_pages.next, | 2911 | goto restart; |
| 2906 | struct kvm_mmu_page, link); | 2912 | |
| 2907 | spin_unlock(&kvm->mmu_lock); | 2913 | spin_unlock(&kvm->mmu_lock); |
| 2908 | 2914 | ||
| 2909 | kvm_flush_remote_tlbs(kvm); | 2915 | kvm_flush_remote_tlbs(kvm); |
| 2910 | } | 2916 | } |
| 2911 | 2917 | ||
| 2912 | static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm) | 2918 | static int kvm_mmu_remove_some_alloc_mmu_pages(struct kvm *kvm) |
| 2913 | { | 2919 | { |
| 2914 | struct kvm_mmu_page *page; | 2920 | struct kvm_mmu_page *page; |
| 2915 | 2921 | ||
| 2916 | page = container_of(kvm->arch.active_mmu_pages.prev, | 2922 | page = container_of(kvm->arch.active_mmu_pages.prev, |
| 2917 | struct kvm_mmu_page, link); | 2923 | struct kvm_mmu_page, link); |
| 2918 | kvm_mmu_zap_page(kvm, page); | 2924 | return kvm_mmu_zap_page(kvm, page) + 1; |
| 2919 | } | 2925 | } |
| 2920 | 2926 | ||
| 2921 | static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask) | 2927 | static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask) |
| @@ -2927,7 +2933,7 @@ static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask) | |||
| 2927 | spin_lock(&kvm_lock); | 2933 | spin_lock(&kvm_lock); |
| 2928 | 2934 | ||
| 2929 | list_for_each_entry(kvm, &vm_list, vm_list) { | 2935 | list_for_each_entry(kvm, &vm_list, vm_list) { |
| 2930 | int npages, idx; | 2936 | int npages, idx, freed_pages; |
| 2931 | 2937 | ||
| 2932 | idx = srcu_read_lock(&kvm->srcu); | 2938 | idx = srcu_read_lock(&kvm->srcu); |
| 2933 | spin_lock(&kvm->mmu_lock); | 2939 | spin_lock(&kvm->mmu_lock); |
| @@ -2935,8 +2941,8 @@ static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask) | |||
| 2935 | kvm->arch.n_free_mmu_pages; | 2941 | kvm->arch.n_free_mmu_pages; |
| 2936 | cache_count += npages; | 2942 | cache_count += npages; |
| 2937 | if (!kvm_freed && nr_to_scan > 0 && npages > 0) { | 2943 | if (!kvm_freed && nr_to_scan > 0 && npages > 0) { |
| 2938 | kvm_mmu_remove_one_alloc_mmu_page(kvm); | 2944 | freed_pages = kvm_mmu_remove_some_alloc_mmu_pages(kvm); |
| 2939 | cache_count--; | 2945 | cache_count -= freed_pages; |
| 2940 | kvm_freed = kvm; | 2946 | kvm_freed = kvm; |
| 2941 | } | 2947 | } |
| 2942 | nr_to_scan--; | 2948 | nr_to_scan--; |
| @@ -3011,7 +3017,8 @@ unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm) | |||
| 3011 | unsigned int nr_pages = 0; | 3017 | unsigned int nr_pages = 0; |
| 3012 | struct kvm_memslots *slots; | 3018 | struct kvm_memslots *slots; |
| 3013 | 3019 | ||
| 3014 | slots = rcu_dereference(kvm->memslots); | 3020 | slots = kvm_memslots(kvm); |
| 3021 | |||
| 3015 | for (i = 0; i < slots->nmemslots; i++) | 3022 | for (i = 0; i < slots->nmemslots; i++) |
| 3016 | nr_pages += slots->memslots[i].npages; | 3023 | nr_pages += slots->memslots[i].npages; |
| 3017 | 3024 | ||
| @@ -3174,8 +3181,7 @@ static gva_t canonicalize(gva_t gva) | |||
| 3174 | } | 3181 | } |
| 3175 | 3182 | ||
| 3176 | 3183 | ||
| 3177 | typedef void (*inspect_spte_fn) (struct kvm *kvm, struct kvm_mmu_page *sp, | 3184 | typedef void (*inspect_spte_fn) (struct kvm *kvm, u64 *sptep); |
| 3178 | u64 *sptep); | ||
| 3179 | 3185 | ||
| 3180 | static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp, | 3186 | static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp, |
| 3181 | inspect_spte_fn fn) | 3187 | inspect_spte_fn fn) |
| @@ -3191,7 +3197,7 @@ static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp, | |||
| 3191 | child = page_header(ent & PT64_BASE_ADDR_MASK); | 3197 | child = page_header(ent & PT64_BASE_ADDR_MASK); |
| 3192 | __mmu_spte_walk(kvm, child, fn); | 3198 | __mmu_spte_walk(kvm, child, fn); |
| 3193 | } else | 3199 | } else |
| 3194 | fn(kvm, sp, &sp->spt[i]); | 3200 | fn(kvm, &sp->spt[i]); |
| 3195 | } | 3201 | } |
| 3196 | } | 3202 | } |
| 3197 | } | 3203 | } |
| @@ -3282,11 +3288,13 @@ static void audit_mappings(struct kvm_vcpu *vcpu) | |||
| 3282 | 3288 | ||
| 3283 | static int count_rmaps(struct kvm_vcpu *vcpu) | 3289 | static int count_rmaps(struct kvm_vcpu *vcpu) |
| 3284 | { | 3290 | { |
| 3291 | struct kvm *kvm = vcpu->kvm; | ||
| 3292 | struct kvm_memslots *slots; | ||
| 3285 | int nmaps = 0; | 3293 | int nmaps = 0; |
| 3286 | int i, j, k, idx; | 3294 | int i, j, k, idx; |
| 3287 | 3295 | ||
| 3288 | idx = srcu_read_lock(&kvm->srcu); | 3296 | idx = srcu_read_lock(&kvm->srcu); |
| 3289 | slots = rcu_dereference(kvm->memslots); | 3297 | slots = kvm_memslots(kvm); |
| 3290 | for (i = 0; i < KVM_MEMORY_SLOTS; ++i) { | 3298 | for (i = 0; i < KVM_MEMORY_SLOTS; ++i) { |
| 3291 | struct kvm_memory_slot *m = &slots->memslots[i]; | 3299 | struct kvm_memory_slot *m = &slots->memslots[i]; |
| 3292 | struct kvm_rmap_desc *d; | 3300 | struct kvm_rmap_desc *d; |
| @@ -3315,7 +3323,7 @@ static int count_rmaps(struct kvm_vcpu *vcpu) | |||
| 3315 | return nmaps; | 3323 | return nmaps; |
| 3316 | } | 3324 | } |
| 3317 | 3325 | ||
| 3318 | void inspect_spte_has_rmap(struct kvm *kvm, struct kvm_mmu_page *sp, u64 *sptep) | 3326 | void inspect_spte_has_rmap(struct kvm *kvm, u64 *sptep) |
| 3319 | { | 3327 | { |
| 3320 | unsigned long *rmapp; | 3328 | unsigned long *rmapp; |
| 3321 | struct kvm_mmu_page *rev_sp; | 3329 | struct kvm_mmu_page *rev_sp; |
| @@ -3331,14 +3339,14 @@ void inspect_spte_has_rmap(struct kvm *kvm, struct kvm_mmu_page *sp, u64 *sptep) | |||
| 3331 | printk(KERN_ERR "%s: no memslot for gfn %ld\n", | 3339 | printk(KERN_ERR "%s: no memslot for gfn %ld\n", |
| 3332 | audit_msg, gfn); | 3340 | audit_msg, gfn); |
| 3333 | printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n", | 3341 | printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n", |
| 3334 | audit_msg, sptep - rev_sp->spt, | 3342 | audit_msg, (long int)(sptep - rev_sp->spt), |
| 3335 | rev_sp->gfn); | 3343 | rev_sp->gfn); |
| 3336 | dump_stack(); | 3344 | dump_stack(); |
| 3337 | return; | 3345 | return; |
| 3338 | } | 3346 | } |
| 3339 | 3347 | ||
| 3340 | rmapp = gfn_to_rmap(kvm, rev_sp->gfns[sptep - rev_sp->spt], | 3348 | rmapp = gfn_to_rmap(kvm, rev_sp->gfns[sptep - rev_sp->spt], |
| 3341 | is_large_pte(*sptep)); | 3349 | rev_sp->role.level); |
| 3342 | if (!*rmapp) { | 3350 | if (!*rmapp) { |
| 3343 | if (!printk_ratelimit()) | 3351 | if (!printk_ratelimit()) |
| 3344 | return; | 3352 | return; |
| @@ -3373,7 +3381,7 @@ static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu) | |||
| 3373 | continue; | 3381 | continue; |
| 3374 | if (!(ent & PT_WRITABLE_MASK)) | 3382 | if (!(ent & PT_WRITABLE_MASK)) |
| 3375 | continue; | 3383 | continue; |
| 3376 | inspect_spte_has_rmap(vcpu->kvm, sp, &pt[i]); | 3384 | inspect_spte_has_rmap(vcpu->kvm, &pt[i]); |
| 3377 | } | 3385 | } |
| 3378 | } | 3386 | } |
| 3379 | return; | 3387 | return; |
diff --git a/arch/x86/kvm/mmutrace.h b/arch/x86/kvm/mmutrace.h index 3e4a5c6ca2a9..42f07b1bfbc9 100644 --- a/arch/x86/kvm/mmutrace.h +++ b/arch/x86/kvm/mmutrace.h | |||
| @@ -6,14 +6,12 @@ | |||
| 6 | 6 | ||
| 7 | #undef TRACE_SYSTEM | 7 | #undef TRACE_SYSTEM |
| 8 | #define TRACE_SYSTEM kvmmmu | 8 | #define TRACE_SYSTEM kvmmmu |
| 9 | #define TRACE_INCLUDE_PATH . | ||
| 10 | #define TRACE_INCLUDE_FILE mmutrace | ||
| 11 | 9 | ||
| 12 | #define KVM_MMU_PAGE_FIELDS \ | 10 | #define KVM_MMU_PAGE_FIELDS \ |
| 13 | __field(__u64, gfn) \ | 11 | __field(__u64, gfn) \ |
| 14 | __field(__u32, role) \ | 12 | __field(__u32, role) \ |
| 15 | __field(__u32, root_count) \ | 13 | __field(__u32, root_count) \ |
| 16 | __field(__u32, unsync) | 14 | __field(bool, unsync) |
| 17 | 15 | ||
| 18 | #define KVM_MMU_PAGE_ASSIGN(sp) \ | 16 | #define KVM_MMU_PAGE_ASSIGN(sp) \ |
| 19 | __entry->gfn = sp->gfn; \ | 17 | __entry->gfn = sp->gfn; \ |
| @@ -30,14 +28,14 @@ | |||
| 30 | \ | 28 | \ |
| 31 | role.word = __entry->role; \ | 29 | role.word = __entry->role; \ |
| 32 | \ | 30 | \ |
| 33 | trace_seq_printf(p, "sp gfn %llx %u/%u q%u%s %s%s %spge" \ | 31 | trace_seq_printf(p, "sp gfn %llx %u%s q%u%s %s%s" \ |
| 34 | " %snxe root %u %s%c", \ | 32 | " %snxe root %u %s%c", \ |
| 35 | __entry->gfn, role.level, role.glevels, \ | 33 | __entry->gfn, role.level, \ |
| 34 | role.cr4_pae ? " pae" : "", \ | ||
| 36 | role.quadrant, \ | 35 | role.quadrant, \ |
| 37 | role.direct ? " direct" : "", \ | 36 | role.direct ? " direct" : "", \ |
| 38 | access_str[role.access], \ | 37 | access_str[role.access], \ |
| 39 | role.invalid ? " invalid" : "", \ | 38 | role.invalid ? " invalid" : "", \ |
| 40 | role.cr4_pge ? "" : "!", \ | ||
| 41 | role.nxe ? "" : "!", \ | 39 | role.nxe ? "" : "!", \ |
| 42 | __entry->root_count, \ | 40 | __entry->root_count, \ |
| 43 | __entry->unsync ? "unsync" : "sync", 0); \ | 41 | __entry->unsync ? "unsync" : "sync", 0); \ |
| @@ -94,15 +92,15 @@ TRACE_EVENT( | |||
| 94 | TP_printk("pte %llx level %u", __entry->pte, __entry->level) | 92 | TP_printk("pte %llx level %u", __entry->pte, __entry->level) |
| 95 | ); | 93 | ); |
| 96 | 94 | ||
| 97 | /* We set a pte accessed bit */ | 95 | DECLARE_EVENT_CLASS(kvm_mmu_set_bit_class, |
| 98 | TRACE_EVENT( | 96 | |
| 99 | kvm_mmu_set_accessed_bit, | ||
| 100 | TP_PROTO(unsigned long table_gfn, unsigned index, unsigned size), | 97 | TP_PROTO(unsigned long table_gfn, unsigned index, unsigned size), |
| 98 | |||
| 101 | TP_ARGS(table_gfn, index, size), | 99 | TP_ARGS(table_gfn, index, size), |
| 102 | 100 | ||
| 103 | TP_STRUCT__entry( | 101 | TP_STRUCT__entry( |
| 104 | __field(__u64, gpa) | 102 | __field(__u64, gpa) |
| 105 | ), | 103 | ), |
| 106 | 104 | ||
| 107 | TP_fast_assign( | 105 | TP_fast_assign( |
| 108 | __entry->gpa = ((u64)table_gfn << PAGE_SHIFT) | 106 | __entry->gpa = ((u64)table_gfn << PAGE_SHIFT) |
| @@ -112,22 +110,20 @@ TRACE_EVENT( | |||
| 112 | TP_printk("gpa %llx", __entry->gpa) | 110 | TP_printk("gpa %llx", __entry->gpa) |
| 113 | ); | 111 | ); |
| 114 | 112 | ||
| 115 | /* We set a pte dirty bit */ | 113 | /* We set a pte accessed bit */ |
| 116 | TRACE_EVENT( | 114 | DEFINE_EVENT(kvm_mmu_set_bit_class, kvm_mmu_set_accessed_bit, |
| 117 | kvm_mmu_set_dirty_bit, | 115 | |
| 118 | TP_PROTO(unsigned long table_gfn, unsigned index, unsigned size), | 116 | TP_PROTO(unsigned long table_gfn, unsigned index, unsigned size), |
| 119 | TP_ARGS(table_gfn, index, size), | ||
| 120 | 117 | ||
| 121 | TP_STRUCT__entry( | 118 | TP_ARGS(table_gfn, index, size) |
| 122 | __field(__u64, gpa) | 119 | ); |
| 123 | ), | ||
| 124 | 120 | ||
| 125 | TP_fast_assign( | 121 | /* We set a pte dirty bit */ |
| 126 | __entry->gpa = ((u64)table_gfn << PAGE_SHIFT) | 122 | DEFINE_EVENT(kvm_mmu_set_bit_class, kvm_mmu_set_dirty_bit, |
| 127 | + index * size; | ||
| 128 | ), | ||
| 129 | 123 | ||
| 130 | TP_printk("gpa %llx", __entry->gpa) | 124 | TP_PROTO(unsigned long table_gfn, unsigned index, unsigned size), |
| 125 | |||
| 126 | TP_ARGS(table_gfn, index, size) | ||
| 131 | ); | 127 | ); |
| 132 | 128 | ||
| 133 | TRACE_EVENT( | 129 | TRACE_EVENT( |
| @@ -166,55 +162,45 @@ TRACE_EVENT( | |||
| 166 | __entry->created ? "new" : "existing") | 162 | __entry->created ? "new" : "existing") |
| 167 | ); | 163 | ); |
| 168 | 164 | ||
| 169 | TRACE_EVENT( | 165 | DECLARE_EVENT_CLASS(kvm_mmu_page_class, |
| 170 | kvm_mmu_sync_page, | 166 | |
| 171 | TP_PROTO(struct kvm_mmu_page *sp), | 167 | TP_PROTO(struct kvm_mmu_page *sp), |
| 172 | TP_ARGS(sp), | 168 | TP_ARGS(sp), |
| 173 | 169 | ||
| 174 | TP_STRUCT__entry( | 170 | TP_STRUCT__entry( |
| 175 | KVM_MMU_PAGE_FIELDS | 171 | KVM_MMU_PAGE_FIELDS |
| 176 | ), | 172 | ), |
| 177 | 173 | ||
| 178 | TP_fast_assign( | 174 | TP_fast_assign( |
| 179 | KVM_MMU_PAGE_ASSIGN(sp) | 175 | KVM_MMU_PAGE_ASSIGN(sp) |
| 180 | ), | 176 | ), |
| 181 | 177 | ||
| 182 | TP_printk("%s", KVM_MMU_PAGE_PRINTK()) | 178 | TP_printk("%s", KVM_MMU_PAGE_PRINTK()) |
| 183 | ); | 179 | ); |
| 184 | 180 | ||
| 185 | TRACE_EVENT( | 181 | DEFINE_EVENT(kvm_mmu_page_class, kvm_mmu_sync_page, |
| 186 | kvm_mmu_unsync_page, | ||
| 187 | TP_PROTO(struct kvm_mmu_page *sp), | 182 | TP_PROTO(struct kvm_mmu_page *sp), |
| 188 | TP_ARGS(sp), | ||
| 189 | |||
| 190 | TP_STRUCT__entry( | ||
| 191 | KVM_MMU_PAGE_FIELDS | ||
| 192 | ), | ||
| 193 | 183 | ||
| 194 | TP_fast_assign( | 184 | TP_ARGS(sp) |
| 195 | KVM_MMU_PAGE_ASSIGN(sp) | ||
| 196 | ), | ||
| 197 | |||
| 198 | TP_printk("%s", KVM_MMU_PAGE_PRINTK()) | ||
| 199 | ); | 185 | ); |
| 200 | 186 | ||
| 201 | TRACE_EVENT( | 187 | DEFINE_EVENT(kvm_mmu_page_class, kvm_mmu_unsync_page, |
| 202 | kvm_mmu_zap_page, | ||
| 203 | TP_PROTO(struct kvm_mmu_page *sp), | 188 | TP_PROTO(struct kvm_mmu_page *sp), |
| 204 | TP_ARGS(sp), | ||
| 205 | 189 | ||
| 206 | TP_STRUCT__entry( | 190 | TP_ARGS(sp) |
| 207 | KVM_MMU_PAGE_FIELDS | 191 | ); |
| 208 | ), | ||
| 209 | 192 | ||
| 210 | TP_fast_assign( | 193 | DEFINE_EVENT(kvm_mmu_page_class, kvm_mmu_zap_page, |
| 211 | KVM_MMU_PAGE_ASSIGN(sp) | 194 | TP_PROTO(struct kvm_mmu_page *sp), |
| 212 | ), | ||
| 213 | 195 | ||
| 214 | TP_printk("%s", KVM_MMU_PAGE_PRINTK()) | 196 | TP_ARGS(sp) |
| 215 | ); | 197 | ); |
| 216 | |||
| 217 | #endif /* _TRACE_KVMMMU_H */ | 198 | #endif /* _TRACE_KVMMMU_H */ |
| 218 | 199 | ||
| 200 | #undef TRACE_INCLUDE_PATH | ||
| 201 | #define TRACE_INCLUDE_PATH . | ||
| 202 | #undef TRACE_INCLUDE_FILE | ||
| 203 | #define TRACE_INCLUDE_FILE mmutrace | ||
| 204 | |||
| 219 | /* This part must be outside protection */ | 205 | /* This part must be outside protection */ |
| 220 | #include <trace/define_trace.h> | 206 | #include <trace/define_trace.h> |
diff --git a/arch/x86/kvm/paging_tmpl.h b/arch/x86/kvm/paging_tmpl.h index 81eab9a50e6a..89d66ca4d87c 100644 --- a/arch/x86/kvm/paging_tmpl.h +++ b/arch/x86/kvm/paging_tmpl.h | |||
| @@ -170,7 +170,7 @@ walk: | |||
| 170 | goto access_error; | 170 | goto access_error; |
| 171 | 171 | ||
| 172 | #if PTTYPE == 64 | 172 | #if PTTYPE == 64 |
| 173 | if (fetch_fault && is_nx(vcpu) && (pte & PT64_NX_MASK)) | 173 | if (fetch_fault && (pte & PT64_NX_MASK)) |
| 174 | goto access_error; | 174 | goto access_error; |
| 175 | #endif | 175 | #endif |
| 176 | 176 | ||
| @@ -190,10 +190,10 @@ walk: | |||
| 190 | 190 | ||
| 191 | if ((walker->level == PT_PAGE_TABLE_LEVEL) || | 191 | if ((walker->level == PT_PAGE_TABLE_LEVEL) || |
| 192 | ((walker->level == PT_DIRECTORY_LEVEL) && | 192 | ((walker->level == PT_DIRECTORY_LEVEL) && |
| 193 | (pte & PT_PAGE_SIZE_MASK) && | 193 | is_large_pte(pte) && |
| 194 | (PTTYPE == 64 || is_pse(vcpu))) || | 194 | (PTTYPE == 64 || is_pse(vcpu))) || |
| 195 | ((walker->level == PT_PDPE_LEVEL) && | 195 | ((walker->level == PT_PDPE_LEVEL) && |
| 196 | (pte & PT_PAGE_SIZE_MASK) && | 196 | is_large_pte(pte) && |
| 197 | is_long_mode(vcpu))) { | 197 | is_long_mode(vcpu))) { |
| 198 | int lvl = walker->level; | 198 | int lvl = walker->level; |
| 199 | 199 | ||
| @@ -258,11 +258,17 @@ static void FNAME(update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *page, | |||
| 258 | pt_element_t gpte; | 258 | pt_element_t gpte; |
| 259 | unsigned pte_access; | 259 | unsigned pte_access; |
| 260 | pfn_t pfn; | 260 | pfn_t pfn; |
| 261 | u64 new_spte; | ||
| 261 | 262 | ||
| 262 | gpte = *(const pt_element_t *)pte; | 263 | gpte = *(const pt_element_t *)pte; |
| 263 | if (~gpte & (PT_PRESENT_MASK | PT_ACCESSED_MASK)) { | 264 | if (~gpte & (PT_PRESENT_MASK | PT_ACCESSED_MASK)) { |
| 264 | if (!is_present_gpte(gpte)) | 265 | if (!is_present_gpte(gpte)) { |
| 265 | __set_spte(spte, shadow_notrap_nonpresent_pte); | 266 | if (page->unsync) |
| 267 | new_spte = shadow_trap_nonpresent_pte; | ||
| 268 | else | ||
| 269 | new_spte = shadow_notrap_nonpresent_pte; | ||
| 270 | __set_spte(spte, new_spte); | ||
| 271 | } | ||
| 266 | return; | 272 | return; |
| 267 | } | 273 | } |
| 268 | pgprintk("%s: gpte %llx spte %p\n", __func__, (u64)gpte, spte); | 274 | pgprintk("%s: gpte %llx spte %p\n", __func__, (u64)gpte, spte); |
| @@ -457,6 +463,7 @@ out_unlock: | |||
| 457 | static void FNAME(invlpg)(struct kvm_vcpu *vcpu, gva_t gva) | 463 | static void FNAME(invlpg)(struct kvm_vcpu *vcpu, gva_t gva) |
| 458 | { | 464 | { |
| 459 | struct kvm_shadow_walk_iterator iterator; | 465 | struct kvm_shadow_walk_iterator iterator; |
| 466 | gpa_t pte_gpa = -1; | ||
| 460 | int level; | 467 | int level; |
| 461 | u64 *sptep; | 468 | u64 *sptep; |
| 462 | int need_flush = 0; | 469 | int need_flush = 0; |
| @@ -467,9 +474,16 @@ static void FNAME(invlpg)(struct kvm_vcpu *vcpu, gva_t gva) | |||
| 467 | level = iterator.level; | 474 | level = iterator.level; |
| 468 | sptep = iterator.sptep; | 475 | sptep = iterator.sptep; |
| 469 | 476 | ||
| 470 | if (level == PT_PAGE_TABLE_LEVEL || | 477 | if (is_last_spte(*sptep, level)) { |
| 471 | ((level == PT_DIRECTORY_LEVEL && is_large_pte(*sptep))) || | 478 | struct kvm_mmu_page *sp = page_header(__pa(sptep)); |
| 472 | ((level == PT_PDPE_LEVEL && is_large_pte(*sptep)))) { | 479 | int offset, shift; |
| 480 | |||
| 481 | shift = PAGE_SHIFT - | ||
| 482 | (PT_LEVEL_BITS - PT64_LEVEL_BITS) * level; | ||
| 483 | offset = sp->role.quadrant << shift; | ||
| 484 | |||
| 485 | pte_gpa = (sp->gfn << PAGE_SHIFT) + offset; | ||
| 486 | pte_gpa += (sptep - sp->spt) * sizeof(pt_element_t); | ||
| 473 | 487 | ||
| 474 | if (is_shadow_present_pte(*sptep)) { | 488 | if (is_shadow_present_pte(*sptep)) { |
| 475 | rmap_remove(vcpu->kvm, sptep); | 489 | rmap_remove(vcpu->kvm, sptep); |
| @@ -487,7 +501,17 @@ static void FNAME(invlpg)(struct kvm_vcpu *vcpu, gva_t gva) | |||
| 487 | 501 | ||
| 488 | if (need_flush) | 502 | if (need_flush) |
| 489 | kvm_flush_remote_tlbs(vcpu->kvm); | 503 | kvm_flush_remote_tlbs(vcpu->kvm); |
| 504 | |||
| 505 | atomic_inc(&vcpu->kvm->arch.invlpg_counter); | ||
| 506 | |||
| 490 | spin_unlock(&vcpu->kvm->mmu_lock); | 507 | spin_unlock(&vcpu->kvm->mmu_lock); |
| 508 | |||
| 509 | if (pte_gpa == -1) | ||
| 510 | return; | ||
| 511 | |||
| 512 | if (mmu_topup_memory_caches(vcpu)) | ||
| 513 | return; | ||
| 514 | kvm_mmu_pte_write(vcpu, pte_gpa, NULL, sizeof(pt_element_t), 0); | ||
| 491 | } | 515 | } |
| 492 | 516 | ||
| 493 | static gpa_t FNAME(gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t vaddr, u32 access, | 517 | static gpa_t FNAME(gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t vaddr, u32 access, |
| @@ -551,12 +575,15 @@ static int FNAME(sync_page)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp) | |||
| 551 | { | 575 | { |
| 552 | int i, offset, nr_present; | 576 | int i, offset, nr_present; |
| 553 | bool reset_host_protection; | 577 | bool reset_host_protection; |
| 578 | gpa_t first_pte_gpa; | ||
| 554 | 579 | ||
| 555 | offset = nr_present = 0; | 580 | offset = nr_present = 0; |
| 556 | 581 | ||
| 557 | if (PTTYPE == 32) | 582 | if (PTTYPE == 32) |
| 558 | offset = sp->role.quadrant << PT64_LEVEL_BITS; | 583 | offset = sp->role.quadrant << PT64_LEVEL_BITS; |
| 559 | 584 | ||
| 585 | first_pte_gpa = gfn_to_gpa(sp->gfn) + offset * sizeof(pt_element_t); | ||
| 586 | |||
| 560 | for (i = 0; i < PT64_ENT_PER_PAGE; i++) { | 587 | for (i = 0; i < PT64_ENT_PER_PAGE; i++) { |
| 561 | unsigned pte_access; | 588 | unsigned pte_access; |
| 562 | pt_element_t gpte; | 589 | pt_element_t gpte; |
| @@ -566,8 +593,7 @@ static int FNAME(sync_page)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp) | |||
| 566 | if (!is_shadow_present_pte(sp->spt[i])) | 593 | if (!is_shadow_present_pte(sp->spt[i])) |
| 567 | continue; | 594 | continue; |
| 568 | 595 | ||
| 569 | pte_gpa = gfn_to_gpa(sp->gfn); | 596 | pte_gpa = first_pte_gpa + i * sizeof(pt_element_t); |
| 570 | pte_gpa += (i+offset) * sizeof(pt_element_t); | ||
| 571 | 597 | ||
| 572 | if (kvm_read_guest_atomic(vcpu->kvm, pte_gpa, &gpte, | 598 | if (kvm_read_guest_atomic(vcpu->kvm, pte_gpa, &gpte, |
| 573 | sizeof(pt_element_t))) | 599 | sizeof(pt_element_t))) |
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c index 737361fcd503..ce438e0fdd26 100644 --- a/arch/x86/kvm/svm.c +++ b/arch/x86/kvm/svm.c | |||
| @@ -28,6 +28,7 @@ | |||
| 28 | #include <linux/ftrace_event.h> | 28 | #include <linux/ftrace_event.h> |
| 29 | #include <linux/slab.h> | 29 | #include <linux/slab.h> |
| 30 | 30 | ||
| 31 | #include <asm/tlbflush.h> | ||
| 31 | #include <asm/desc.h> | 32 | #include <asm/desc.h> |
| 32 | 33 | ||
| 33 | #include <asm/virtext.h> | 34 | #include <asm/virtext.h> |
| @@ -44,10 +45,11 @@ MODULE_LICENSE("GPL"); | |||
| 44 | #define SEG_TYPE_LDT 2 | 45 | #define SEG_TYPE_LDT 2 |
| 45 | #define SEG_TYPE_BUSY_TSS16 3 | 46 | #define SEG_TYPE_BUSY_TSS16 3 |
| 46 | 47 | ||
| 47 | #define SVM_FEATURE_NPT (1 << 0) | 48 | #define SVM_FEATURE_NPT (1 << 0) |
| 48 | #define SVM_FEATURE_LBRV (1 << 1) | 49 | #define SVM_FEATURE_LBRV (1 << 1) |
| 49 | #define SVM_FEATURE_SVML (1 << 2) | 50 | #define SVM_FEATURE_SVML (1 << 2) |
| 50 | #define SVM_FEATURE_PAUSE_FILTER (1 << 10) | 51 | #define SVM_FEATURE_NRIP (1 << 3) |
| 52 | #define SVM_FEATURE_PAUSE_FILTER (1 << 10) | ||
| 51 | 53 | ||
| 52 | #define NESTED_EXIT_HOST 0 /* Exit handled on host level */ | 54 | #define NESTED_EXIT_HOST 0 /* Exit handled on host level */ |
| 53 | #define NESTED_EXIT_DONE 1 /* Exit caused nested vmexit */ | 55 | #define NESTED_EXIT_DONE 1 /* Exit caused nested vmexit */ |
| @@ -55,6 +57,8 @@ MODULE_LICENSE("GPL"); | |||
| 55 | 57 | ||
| 56 | #define DEBUGCTL_RESERVED_BITS (~(0x3fULL)) | 58 | #define DEBUGCTL_RESERVED_BITS (~(0x3fULL)) |
| 57 | 59 | ||
| 60 | static bool erratum_383_found __read_mostly; | ||
| 61 | |||
| 58 | static const u32 host_save_user_msrs[] = { | 62 | static const u32 host_save_user_msrs[] = { |
| 59 | #ifdef CONFIG_X86_64 | 63 | #ifdef CONFIG_X86_64 |
| 60 | MSR_STAR, MSR_LSTAR, MSR_CSTAR, MSR_SYSCALL_MASK, MSR_KERNEL_GS_BASE, | 64 | MSR_STAR, MSR_LSTAR, MSR_CSTAR, MSR_SYSCALL_MASK, MSR_KERNEL_GS_BASE, |
| @@ -70,6 +74,7 @@ struct kvm_vcpu; | |||
| 70 | struct nested_state { | 74 | struct nested_state { |
| 71 | struct vmcb *hsave; | 75 | struct vmcb *hsave; |
| 72 | u64 hsave_msr; | 76 | u64 hsave_msr; |
| 77 | u64 vm_cr_msr; | ||
| 73 | u64 vmcb; | 78 | u64 vmcb; |
| 74 | 79 | ||
| 75 | /* These are the merged vectors */ | 80 | /* These are the merged vectors */ |
| @@ -77,6 +82,7 @@ struct nested_state { | |||
| 77 | 82 | ||
| 78 | /* gpa pointers to the real vectors */ | 83 | /* gpa pointers to the real vectors */ |
| 79 | u64 vmcb_msrpm; | 84 | u64 vmcb_msrpm; |
| 85 | u64 vmcb_iopm; | ||
| 80 | 86 | ||
| 81 | /* A VMEXIT is required but not yet emulated */ | 87 | /* A VMEXIT is required but not yet emulated */ |
| 82 | bool exit_required; | 88 | bool exit_required; |
| @@ -91,6 +97,9 @@ struct nested_state { | |||
| 91 | 97 | ||
| 92 | }; | 98 | }; |
| 93 | 99 | ||
| 100 | #define MSRPM_OFFSETS 16 | ||
| 101 | static u32 msrpm_offsets[MSRPM_OFFSETS] __read_mostly; | ||
| 102 | |||
| 94 | struct vcpu_svm { | 103 | struct vcpu_svm { |
| 95 | struct kvm_vcpu vcpu; | 104 | struct kvm_vcpu vcpu; |
| 96 | struct vmcb *vmcb; | 105 | struct vmcb *vmcb; |
| @@ -110,13 +119,39 @@ struct vcpu_svm { | |||
| 110 | struct nested_state nested; | 119 | struct nested_state nested; |
| 111 | 120 | ||
| 112 | bool nmi_singlestep; | 121 | bool nmi_singlestep; |
| 122 | |||
| 123 | unsigned int3_injected; | ||
| 124 | unsigned long int3_rip; | ||
| 125 | }; | ||
| 126 | |||
| 127 | #define MSR_INVALID 0xffffffffU | ||
| 128 | |||
| 129 | static struct svm_direct_access_msrs { | ||
| 130 | u32 index; /* Index of the MSR */ | ||
| 131 | bool always; /* True if intercept is always on */ | ||
| 132 | } direct_access_msrs[] = { | ||
| 133 | { .index = MSR_K6_STAR, .always = true }, | ||
| 134 | { .index = MSR_IA32_SYSENTER_CS, .always = true }, | ||
| 135 | #ifdef CONFIG_X86_64 | ||
| 136 | { .index = MSR_GS_BASE, .always = true }, | ||
| 137 | { .index = MSR_FS_BASE, .always = true }, | ||
| 138 | { .index = MSR_KERNEL_GS_BASE, .always = true }, | ||
| 139 | { .index = MSR_LSTAR, .always = true }, | ||
| 140 | { .index = MSR_CSTAR, .always = true }, | ||
| 141 | { .index = MSR_SYSCALL_MASK, .always = true }, | ||
| 142 | #endif | ||
| 143 | { .index = MSR_IA32_LASTBRANCHFROMIP, .always = false }, | ||
| 144 | { .index = MSR_IA32_LASTBRANCHTOIP, .always = false }, | ||
| 145 | { .index = MSR_IA32_LASTINTFROMIP, .always = false }, | ||
| 146 | { .index = MSR_IA32_LASTINTTOIP, .always = false }, | ||
| 147 | { .index = MSR_INVALID, .always = false }, | ||
| 113 | }; | 148 | }; |
| 114 | 149 | ||
| 115 | /* enable NPT for AMD64 and X86 with PAE */ | 150 | /* enable NPT for AMD64 and X86 with PAE */ |
| 116 | #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE) | 151 | #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE) |
| 117 | static bool npt_enabled = true; | 152 | static bool npt_enabled = true; |
| 118 | #else | 153 | #else |
| 119 | static bool npt_enabled = false; | 154 | static bool npt_enabled; |
| 120 | #endif | 155 | #endif |
| 121 | static int npt = 1; | 156 | static int npt = 1; |
| 122 | 157 | ||
| @@ -129,6 +164,7 @@ static void svm_flush_tlb(struct kvm_vcpu *vcpu); | |||
| 129 | static void svm_complete_interrupts(struct vcpu_svm *svm); | 164 | static void svm_complete_interrupts(struct vcpu_svm *svm); |
| 130 | 165 | ||
| 131 | static int nested_svm_exit_handled(struct vcpu_svm *svm); | 166 | static int nested_svm_exit_handled(struct vcpu_svm *svm); |
| 167 | static int nested_svm_intercept(struct vcpu_svm *svm); | ||
| 132 | static int nested_svm_vmexit(struct vcpu_svm *svm); | 168 | static int nested_svm_vmexit(struct vcpu_svm *svm); |
| 133 | static int nested_svm_check_exception(struct vcpu_svm *svm, unsigned nr, | 169 | static int nested_svm_check_exception(struct vcpu_svm *svm, unsigned nr, |
| 134 | bool has_error_code, u32 error_code); | 170 | bool has_error_code, u32 error_code); |
| @@ -163,8 +199,8 @@ static unsigned long iopm_base; | |||
| 163 | struct kvm_ldttss_desc { | 199 | struct kvm_ldttss_desc { |
| 164 | u16 limit0; | 200 | u16 limit0; |
| 165 | u16 base0; | 201 | u16 base0; |
| 166 | unsigned base1 : 8, type : 5, dpl : 2, p : 1; | 202 | unsigned base1:8, type:5, dpl:2, p:1; |
| 167 | unsigned limit1 : 4, zero0 : 3, g : 1, base2 : 8; | 203 | unsigned limit1:4, zero0:3, g:1, base2:8; |
| 168 | u32 base3; | 204 | u32 base3; |
| 169 | u32 zero1; | 205 | u32 zero1; |
| 170 | } __attribute__((packed)); | 206 | } __attribute__((packed)); |
| @@ -194,6 +230,27 @@ static u32 msrpm_ranges[] = {0, 0xc0000000, 0xc0010000}; | |||
| 194 | #define MSRS_RANGE_SIZE 2048 | 230 | #define MSRS_RANGE_SIZE 2048 |
| 195 | #define MSRS_IN_RANGE (MSRS_RANGE_SIZE * 8 / 2) | 231 | #define MSRS_IN_RANGE (MSRS_RANGE_SIZE * 8 / 2) |
| 196 | 232 | ||
| 233 | static u32 svm_msrpm_offset(u32 msr) | ||
| 234 | { | ||
| 235 | u32 offset; | ||
| 236 | int i; | ||
| 237 | |||
| 238 | for (i = 0; i < NUM_MSR_MAPS; i++) { | ||
| 239 | if (msr < msrpm_ranges[i] || | ||
| 240 | msr >= msrpm_ranges[i] + MSRS_IN_RANGE) | ||
| 241 | continue; | ||
| 242 | |||
| 243 | offset = (msr - msrpm_ranges[i]) / 4; /* 4 msrs per u8 */ | ||
| 244 | offset += (i * MSRS_RANGE_SIZE); /* add range offset */ | ||
| 245 | |||
| 246 | /* Now we have the u8 offset - but need the u32 offset */ | ||
| 247 | return offset / 4; | ||
| 248 | } | ||
| 249 | |||
| 250 | /* MSR not in any range */ | ||
| 251 | return MSR_INVALID; | ||
| 252 | } | ||
| 253 | |||
| 197 | #define MAX_INST_SIZE 15 | 254 | #define MAX_INST_SIZE 15 |
| 198 | 255 | ||
| 199 | static inline u32 svm_has(u32 feat) | 256 | static inline u32 svm_has(u32 feat) |
| @@ -213,7 +270,7 @@ static inline void stgi(void) | |||
| 213 | 270 | ||
| 214 | static inline void invlpga(unsigned long addr, u32 asid) | 271 | static inline void invlpga(unsigned long addr, u32 asid) |
| 215 | { | 272 | { |
| 216 | asm volatile (__ex(SVM_INVLPGA) :: "a"(addr), "c"(asid)); | 273 | asm volatile (__ex(SVM_INVLPGA) : : "a"(addr), "c"(asid)); |
| 217 | } | 274 | } |
| 218 | 275 | ||
| 219 | static inline void force_new_asid(struct kvm_vcpu *vcpu) | 276 | static inline void force_new_asid(struct kvm_vcpu *vcpu) |
| @@ -235,23 +292,6 @@ static void svm_set_efer(struct kvm_vcpu *vcpu, u64 efer) | |||
| 235 | vcpu->arch.efer = efer; | 292 | vcpu->arch.efer = efer; |
| 236 | } | 293 | } |
| 237 | 294 | ||
| 238 | static void svm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr, | ||
| 239 | bool has_error_code, u32 error_code) | ||
| 240 | { | ||
| 241 | struct vcpu_svm *svm = to_svm(vcpu); | ||
| 242 | |||
| 243 | /* If we are within a nested VM we'd better #VMEXIT and let the | ||
| 244 | guest handle the exception */ | ||
| 245 | if (nested_svm_check_exception(svm, nr, has_error_code, error_code)) | ||
| 246 | return; | ||
| 247 | |||
| 248 | svm->vmcb->control.event_inj = nr | ||
| 249 | | SVM_EVTINJ_VALID | ||
| 250 | | (has_error_code ? SVM_EVTINJ_VALID_ERR : 0) | ||
| 251 | | SVM_EVTINJ_TYPE_EXEPT; | ||
| 252 | svm->vmcb->control.event_inj_err = error_code; | ||
| 253 | } | ||
| 254 | |||
| 255 | static int is_external_interrupt(u32 info) | 295 | static int is_external_interrupt(u32 info) |
| 256 | { | 296 | { |
| 257 | info &= SVM_EVTINJ_TYPE_MASK | SVM_EVTINJ_VALID; | 297 | info &= SVM_EVTINJ_TYPE_MASK | SVM_EVTINJ_VALID; |
| @@ -264,7 +304,7 @@ static u32 svm_get_interrupt_shadow(struct kvm_vcpu *vcpu, int mask) | |||
| 264 | u32 ret = 0; | 304 | u32 ret = 0; |
| 265 | 305 | ||
| 266 | if (svm->vmcb->control.int_state & SVM_INTERRUPT_SHADOW_MASK) | 306 | if (svm->vmcb->control.int_state & SVM_INTERRUPT_SHADOW_MASK) |
| 267 | ret |= X86_SHADOW_INT_STI | X86_SHADOW_INT_MOV_SS; | 307 | ret |= KVM_X86_SHADOW_INT_STI | KVM_X86_SHADOW_INT_MOV_SS; |
| 268 | return ret & mask; | 308 | return ret & mask; |
| 269 | } | 309 | } |
| 270 | 310 | ||
| @@ -283,6 +323,9 @@ static void skip_emulated_instruction(struct kvm_vcpu *vcpu) | |||
| 283 | { | 323 | { |
| 284 | struct vcpu_svm *svm = to_svm(vcpu); | 324 | struct vcpu_svm *svm = to_svm(vcpu); |
| 285 | 325 | ||
| 326 | if (svm->vmcb->control.next_rip != 0) | ||
| 327 | svm->next_rip = svm->vmcb->control.next_rip; | ||
| 328 | |||
| 286 | if (!svm->next_rip) { | 329 | if (!svm->next_rip) { |
| 287 | if (emulate_instruction(vcpu, 0, 0, EMULTYPE_SKIP) != | 330 | if (emulate_instruction(vcpu, 0, 0, EMULTYPE_SKIP) != |
| 288 | EMULATE_DONE) | 331 | EMULATE_DONE) |
| @@ -297,6 +340,68 @@ static void skip_emulated_instruction(struct kvm_vcpu *vcpu) | |||
| 297 | svm_set_interrupt_shadow(vcpu, 0); | 340 | svm_set_interrupt_shadow(vcpu, 0); |
| 298 | } | 341 | } |
| 299 | 342 | ||
| 343 | static void svm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr, | ||
| 344 | bool has_error_code, u32 error_code, | ||
| 345 | bool reinject) | ||
| 346 | { | ||
| 347 | struct vcpu_svm *svm = to_svm(vcpu); | ||
| 348 | |||
| 349 | /* | ||
| 350 | * If we are within a nested VM we'd better #VMEXIT and let the guest | ||
| 351 | * handle the exception | ||
| 352 | */ | ||
| 353 | if (!reinject && | ||
| 354 | nested_svm_check_exception(svm, nr, has_error_code, error_code)) | ||
| 355 | return; | ||
| 356 | |||
| 357 | if (nr == BP_VECTOR && !svm_has(SVM_FEATURE_NRIP)) { | ||
| 358 | unsigned long rip, old_rip = kvm_rip_read(&svm->vcpu); | ||
| 359 | |||
| 360 | /* | ||
| 361 | * For guest debugging where we have to reinject #BP if some | ||
| 362 | * INT3 is guest-owned: | ||
| 363 | * Emulate nRIP by moving RIP forward. Will fail if injection | ||
| 364 | * raises a fault that is not intercepted. Still better than | ||
| 365 | * failing in all cases. | ||
| 366 | */ | ||
| 367 | skip_emulated_instruction(&svm->vcpu); | ||
| 368 | rip = kvm_rip_read(&svm->vcpu); | ||
| 369 | svm->int3_rip = rip + svm->vmcb->save.cs.base; | ||
| 370 | svm->int3_injected = rip - old_rip; | ||
| 371 | } | ||
| 372 | |||
| 373 | svm->vmcb->control.event_inj = nr | ||
| 374 | | SVM_EVTINJ_VALID | ||
| 375 | | (has_error_code ? SVM_EVTINJ_VALID_ERR : 0) | ||
| 376 | | SVM_EVTINJ_TYPE_EXEPT; | ||
| 377 | svm->vmcb->control.event_inj_err = error_code; | ||
| 378 | } | ||
| 379 | |||
| 380 | static void svm_init_erratum_383(void) | ||
| 381 | { | ||
| 382 | u32 low, high; | ||
| 383 | int err; | ||
| 384 | u64 val; | ||
| 385 | |||
| 386 | /* Only Fam10h is affected */ | ||
| 387 | if (boot_cpu_data.x86 != 0x10) | ||
| 388 | return; | ||
| 389 | |||
| 390 | /* Use _safe variants to not break nested virtualization */ | ||
| 391 | val = native_read_msr_safe(MSR_AMD64_DC_CFG, &err); | ||
| 392 | if (err) | ||
| 393 | return; | ||
| 394 | |||
| 395 | val |= (1ULL << 47); | ||
| 396 | |||
| 397 | low = lower_32_bits(val); | ||
| 398 | high = upper_32_bits(val); | ||
| 399 | |||
| 400 | native_write_msr_safe(MSR_AMD64_DC_CFG, low, high); | ||
| 401 | |||
| 402 | erratum_383_found = true; | ||
| 403 | } | ||
| 404 | |||
| 300 | static int has_svm(void) | 405 | static int has_svm(void) |
| 301 | { | 406 | { |
| 302 | const char *msg; | 407 | const char *msg; |
| @@ -319,7 +424,7 @@ static int svm_hardware_enable(void *garbage) | |||
| 319 | 424 | ||
| 320 | struct svm_cpu_data *sd; | 425 | struct svm_cpu_data *sd; |
| 321 | uint64_t efer; | 426 | uint64_t efer; |
| 322 | struct descriptor_table gdt_descr; | 427 | struct desc_ptr gdt_descr; |
| 323 | struct desc_struct *gdt; | 428 | struct desc_struct *gdt; |
| 324 | int me = raw_smp_processor_id(); | 429 | int me = raw_smp_processor_id(); |
| 325 | 430 | ||
| @@ -344,14 +449,16 @@ static int svm_hardware_enable(void *garbage) | |||
| 344 | sd->max_asid = cpuid_ebx(SVM_CPUID_FUNC) - 1; | 449 | sd->max_asid = cpuid_ebx(SVM_CPUID_FUNC) - 1; |
| 345 | sd->next_asid = sd->max_asid + 1; | 450 | sd->next_asid = sd->max_asid + 1; |
| 346 | 451 | ||
| 347 | kvm_get_gdt(&gdt_descr); | 452 | native_store_gdt(&gdt_descr); |
| 348 | gdt = (struct desc_struct *)gdt_descr.base; | 453 | gdt = (struct desc_struct *)gdt_descr.address; |
| 349 | sd->tss_desc = (struct kvm_ldttss_desc *)(gdt + GDT_ENTRY_TSS); | 454 | sd->tss_desc = (struct kvm_ldttss_desc *)(gdt + GDT_ENTRY_TSS); |
| 350 | 455 | ||
| 351 | wrmsrl(MSR_EFER, efer | EFER_SVME); | 456 | wrmsrl(MSR_EFER, efer | EFER_SVME); |
| 352 | 457 | ||
| 353 | wrmsrl(MSR_VM_HSAVE_PA, page_to_pfn(sd->save_area) << PAGE_SHIFT); | 458 | wrmsrl(MSR_VM_HSAVE_PA, page_to_pfn(sd->save_area) << PAGE_SHIFT); |
| 354 | 459 | ||
| 460 | svm_init_erratum_383(); | ||
| 461 | |||
| 355 | return 0; | 462 | return 0; |
| 356 | } | 463 | } |
| 357 | 464 | ||
| @@ -391,42 +498,98 @@ err_1: | |||
| 391 | 498 | ||
| 392 | } | 499 | } |
| 393 | 500 | ||
| 501 | static bool valid_msr_intercept(u32 index) | ||
| 502 | { | ||
| 503 | int i; | ||
| 504 | |||
| 505 | for (i = 0; direct_access_msrs[i].index != MSR_INVALID; i++) | ||
| 506 | if (direct_access_msrs[i].index == index) | ||
| 507 | return true; | ||
| 508 | |||
| 509 | return false; | ||
| 510 | } | ||
| 511 | |||
| 394 | static void set_msr_interception(u32 *msrpm, unsigned msr, | 512 | static void set_msr_interception(u32 *msrpm, unsigned msr, |
| 395 | int read, int write) | 513 | int read, int write) |
| 396 | { | 514 | { |
| 515 | u8 bit_read, bit_write; | ||
| 516 | unsigned long tmp; | ||
| 517 | u32 offset; | ||
| 518 | |||
| 519 | /* | ||
| 520 | * If this warning triggers extend the direct_access_msrs list at the | ||
| 521 | * beginning of the file | ||
| 522 | */ | ||
| 523 | WARN_ON(!valid_msr_intercept(msr)); | ||
| 524 | |||
| 525 | offset = svm_msrpm_offset(msr); | ||
| 526 | bit_read = 2 * (msr & 0x0f); | ||
| 527 | bit_write = 2 * (msr & 0x0f) + 1; | ||
| 528 | tmp = msrpm[offset]; | ||
| 529 | |||
| 530 | BUG_ON(offset == MSR_INVALID); | ||
| 531 | |||
| 532 | read ? clear_bit(bit_read, &tmp) : set_bit(bit_read, &tmp); | ||
| 533 | write ? clear_bit(bit_write, &tmp) : set_bit(bit_write, &tmp); | ||
| 534 | |||
| 535 | msrpm[offset] = tmp; | ||
| 536 | } | ||
| 537 | |||
| 538 | static void svm_vcpu_init_msrpm(u32 *msrpm) | ||
| 539 | { | ||
| 397 | int i; | 540 | int i; |
| 398 | 541 | ||
| 399 | for (i = 0; i < NUM_MSR_MAPS; i++) { | 542 | memset(msrpm, 0xff, PAGE_SIZE * (1 << MSRPM_ALLOC_ORDER)); |
| 400 | if (msr >= msrpm_ranges[i] && | 543 | |
| 401 | msr < msrpm_ranges[i] + MSRS_IN_RANGE) { | 544 | for (i = 0; direct_access_msrs[i].index != MSR_INVALID; i++) { |
| 402 | u32 msr_offset = (i * MSRS_IN_RANGE + msr - | 545 | if (!direct_access_msrs[i].always) |
| 403 | msrpm_ranges[i]) * 2; | 546 | continue; |
| 404 | 547 | ||
| 405 | u32 *base = msrpm + (msr_offset / 32); | 548 | set_msr_interception(msrpm, direct_access_msrs[i].index, 1, 1); |
| 406 | u32 msr_shift = msr_offset % 32; | 549 | } |
| 407 | u32 mask = ((write) ? 0 : 2) | ((read) ? 0 : 1); | 550 | } |
| 408 | *base = (*base & ~(0x3 << msr_shift)) | | 551 | |
| 409 | (mask << msr_shift); | 552 | static void add_msr_offset(u32 offset) |
| 553 | { | ||
| 554 | int i; | ||
| 555 | |||
| 556 | for (i = 0; i < MSRPM_OFFSETS; ++i) { | ||
| 557 | |||
| 558 | /* Offset already in list? */ | ||
| 559 | if (msrpm_offsets[i] == offset) | ||
| 410 | return; | 560 | return; |
| 411 | } | 561 | |
| 562 | /* Slot used by another offset? */ | ||
| 563 | if (msrpm_offsets[i] != MSR_INVALID) | ||
| 564 | continue; | ||
| 565 | |||
| 566 | /* Add offset to list */ | ||
| 567 | msrpm_offsets[i] = offset; | ||
| 568 | |||
| 569 | return; | ||
| 412 | } | 570 | } |
| 571 | |||
| 572 | /* | ||
| 573 | * If this BUG triggers the msrpm_offsets table has an overflow. Just | ||
| 574 | * increase MSRPM_OFFSETS in this case. | ||
| 575 | */ | ||
| 413 | BUG(); | 576 | BUG(); |
| 414 | } | 577 | } |
| 415 | 578 | ||
| 416 | static void svm_vcpu_init_msrpm(u32 *msrpm) | 579 | static void init_msrpm_offsets(void) |
| 417 | { | 580 | { |
| 418 | memset(msrpm, 0xff, PAGE_SIZE * (1 << MSRPM_ALLOC_ORDER)); | 581 | int i; |
| 419 | 582 | ||
| 420 | #ifdef CONFIG_X86_64 | 583 | memset(msrpm_offsets, 0xff, sizeof(msrpm_offsets)); |
| 421 | set_msr_interception(msrpm, MSR_GS_BASE, 1, 1); | 584 | |
| 422 | set_msr_interception(msrpm, MSR_FS_BASE, 1, 1); | 585 | for (i = 0; direct_access_msrs[i].index != MSR_INVALID; i++) { |
| 423 | set_msr_interception(msrpm, MSR_KERNEL_GS_BASE, 1, 1); | 586 | u32 offset; |
| 424 | set_msr_interception(msrpm, MSR_LSTAR, 1, 1); | 587 | |
| 425 | set_msr_interception(msrpm, MSR_CSTAR, 1, 1); | 588 | offset = svm_msrpm_offset(direct_access_msrs[i].index); |
| 426 | set_msr_interception(msrpm, MSR_SYSCALL_MASK, 1, 1); | 589 | BUG_ON(offset == MSR_INVALID); |
| 427 | #endif | 590 | |
| 428 | set_msr_interception(msrpm, MSR_K6_STAR, 1, 1); | 591 | add_msr_offset(offset); |
| 429 | set_msr_interception(msrpm, MSR_IA32_SYSENTER_CS, 1, 1); | 592 | } |
| 430 | } | 593 | } |
| 431 | 594 | ||
| 432 | static void svm_enable_lbrv(struct vcpu_svm *svm) | 595 | static void svm_enable_lbrv(struct vcpu_svm *svm) |
| @@ -467,6 +630,8 @@ static __init int svm_hardware_setup(void) | |||
| 467 | memset(iopm_va, 0xff, PAGE_SIZE * (1 << IOPM_ALLOC_ORDER)); | 630 | memset(iopm_va, 0xff, PAGE_SIZE * (1 << IOPM_ALLOC_ORDER)); |
| 468 | iopm_base = page_to_pfn(iopm_pages) << PAGE_SHIFT; | 631 | iopm_base = page_to_pfn(iopm_pages) << PAGE_SHIFT; |
| 469 | 632 | ||
| 633 | init_msrpm_offsets(); | ||
| 634 | |||
| 470 | if (boot_cpu_has(X86_FEATURE_NX)) | 635 | if (boot_cpu_has(X86_FEATURE_NX)) |
| 471 | kvm_enable_efer_bits(EFER_NX); | 636 | kvm_enable_efer_bits(EFER_NX); |
| 472 | 637 | ||
| @@ -523,7 +688,7 @@ static void init_seg(struct vmcb_seg *seg) | |||
| 523 | { | 688 | { |
| 524 | seg->selector = 0; | 689 | seg->selector = 0; |
| 525 | seg->attrib = SVM_SELECTOR_P_MASK | SVM_SELECTOR_S_MASK | | 690 | seg->attrib = SVM_SELECTOR_P_MASK | SVM_SELECTOR_S_MASK | |
| 526 | SVM_SELECTOR_WRITE_MASK; /* Read/Write Data Segment */ | 691 | SVM_SELECTOR_WRITE_MASK; /* Read/Write Data Segment */ |
| 527 | seg->limit = 0xffff; | 692 | seg->limit = 0xffff; |
| 528 | seg->base = 0; | 693 | seg->base = 0; |
| 529 | } | 694 | } |
| @@ -543,16 +708,16 @@ static void init_vmcb(struct vcpu_svm *svm) | |||
| 543 | 708 | ||
| 544 | svm->vcpu.fpu_active = 1; | 709 | svm->vcpu.fpu_active = 1; |
| 545 | 710 | ||
| 546 | control->intercept_cr_read = INTERCEPT_CR0_MASK | | 711 | control->intercept_cr_read = INTERCEPT_CR0_MASK | |
| 547 | INTERCEPT_CR3_MASK | | 712 | INTERCEPT_CR3_MASK | |
| 548 | INTERCEPT_CR4_MASK; | 713 | INTERCEPT_CR4_MASK; |
| 549 | 714 | ||
| 550 | control->intercept_cr_write = INTERCEPT_CR0_MASK | | 715 | control->intercept_cr_write = INTERCEPT_CR0_MASK | |
| 551 | INTERCEPT_CR3_MASK | | 716 | INTERCEPT_CR3_MASK | |
| 552 | INTERCEPT_CR4_MASK | | 717 | INTERCEPT_CR4_MASK | |
| 553 | INTERCEPT_CR8_MASK; | 718 | INTERCEPT_CR8_MASK; |
| 554 | 719 | ||
| 555 | control->intercept_dr_read = INTERCEPT_DR0_MASK | | 720 | control->intercept_dr_read = INTERCEPT_DR0_MASK | |
| 556 | INTERCEPT_DR1_MASK | | 721 | INTERCEPT_DR1_MASK | |
| 557 | INTERCEPT_DR2_MASK | | 722 | INTERCEPT_DR2_MASK | |
| 558 | INTERCEPT_DR3_MASK | | 723 | INTERCEPT_DR3_MASK | |
| @@ -561,7 +726,7 @@ static void init_vmcb(struct vcpu_svm *svm) | |||
| 561 | INTERCEPT_DR6_MASK | | 726 | INTERCEPT_DR6_MASK | |
| 562 | INTERCEPT_DR7_MASK; | 727 | INTERCEPT_DR7_MASK; |
| 563 | 728 | ||
| 564 | control->intercept_dr_write = INTERCEPT_DR0_MASK | | 729 | control->intercept_dr_write = INTERCEPT_DR0_MASK | |
| 565 | INTERCEPT_DR1_MASK | | 730 | INTERCEPT_DR1_MASK | |
| 566 | INTERCEPT_DR2_MASK | | 731 | INTERCEPT_DR2_MASK | |
| 567 | INTERCEPT_DR3_MASK | | 732 | INTERCEPT_DR3_MASK | |
| @@ -575,7 +740,7 @@ static void init_vmcb(struct vcpu_svm *svm) | |||
| 575 | (1 << MC_VECTOR); | 740 | (1 << MC_VECTOR); |
| 576 | 741 | ||
| 577 | 742 | ||
| 578 | control->intercept = (1ULL << INTERCEPT_INTR) | | 743 | control->intercept = (1ULL << INTERCEPT_INTR) | |
| 579 | (1ULL << INTERCEPT_NMI) | | 744 | (1ULL << INTERCEPT_NMI) | |
| 580 | (1ULL << INTERCEPT_SMI) | | 745 | (1ULL << INTERCEPT_SMI) | |
| 581 | (1ULL << INTERCEPT_SELECTIVE_CR0) | | 746 | (1ULL << INTERCEPT_SELECTIVE_CR0) | |
| @@ -636,7 +801,8 @@ static void init_vmcb(struct vcpu_svm *svm) | |||
| 636 | save->rip = 0x0000fff0; | 801 | save->rip = 0x0000fff0; |
| 637 | svm->vcpu.arch.regs[VCPU_REGS_RIP] = save->rip; | 802 | svm->vcpu.arch.regs[VCPU_REGS_RIP] = save->rip; |
| 638 | 803 | ||
| 639 | /* This is the guest-visible cr0 value. | 804 | /* |
| 805 | * This is the guest-visible cr0 value. | ||
| 640 | * svm_set_cr0() sets PG and WP and clears NW and CD on save->cr0. | 806 | * svm_set_cr0() sets PG and WP and clears NW and CD on save->cr0. |
| 641 | */ | 807 | */ |
| 642 | svm->vcpu.arch.cr0 = X86_CR0_NW | X86_CR0_CD | X86_CR0_ET; | 808 | svm->vcpu.arch.cr0 = X86_CR0_NW | X86_CR0_CD | X86_CR0_ET; |
| @@ -729,6 +895,7 @@ static struct kvm_vcpu *svm_create_vcpu(struct kvm *kvm, unsigned int id) | |||
| 729 | svm_vcpu_init_msrpm(svm->msrpm); | 895 | svm_vcpu_init_msrpm(svm->msrpm); |
| 730 | 896 | ||
| 731 | svm->nested.msrpm = page_address(nested_msrpm_pages); | 897 | svm->nested.msrpm = page_address(nested_msrpm_pages); |
| 898 | svm_vcpu_init_msrpm(svm->nested.msrpm); | ||
| 732 | 899 | ||
| 733 | svm->vmcb = page_address(page); | 900 | svm->vmcb = page_address(page); |
| 734 | clear_page(svm->vmcb); | 901 | clear_page(svm->vmcb); |
| @@ -882,7 +1049,8 @@ static void svm_get_segment(struct kvm_vcpu *vcpu, | |||
| 882 | var->db = (s->attrib >> SVM_SELECTOR_DB_SHIFT) & 1; | 1049 | var->db = (s->attrib >> SVM_SELECTOR_DB_SHIFT) & 1; |
| 883 | var->g = (s->attrib >> SVM_SELECTOR_G_SHIFT) & 1; | 1050 | var->g = (s->attrib >> SVM_SELECTOR_G_SHIFT) & 1; |
| 884 | 1051 | ||
| 885 | /* AMD's VMCB does not have an explicit unusable field, so emulate it | 1052 | /* |
| 1053 | * AMD's VMCB does not have an explicit unusable field, so emulate it | ||
| 886 | * for cross vendor migration purposes by "not present" | 1054 | * for cross vendor migration purposes by "not present" |
| 887 | */ | 1055 | */ |
| 888 | var->unusable = !var->present || (var->type == 0); | 1056 | var->unusable = !var->present || (var->type == 0); |
| @@ -918,7 +1086,8 @@ static void svm_get_segment(struct kvm_vcpu *vcpu, | |||
| 918 | var->type |= 0x1; | 1086 | var->type |= 0x1; |
| 919 | break; | 1087 | break; |
| 920 | case VCPU_SREG_SS: | 1088 | case VCPU_SREG_SS: |
| 921 | /* On AMD CPUs sometimes the DB bit in the segment | 1089 | /* |
| 1090 | * On AMD CPUs sometimes the DB bit in the segment | ||
| 922 | * descriptor is left as 1, although the whole segment has | 1091 | * descriptor is left as 1, although the whole segment has |
| 923 | * been made unusable. Clear it here to pass an Intel VMX | 1092 | * been made unusable. Clear it here to pass an Intel VMX |
| 924 | * entry check when cross vendor migrating. | 1093 | * entry check when cross vendor migrating. |
| @@ -936,36 +1105,36 @@ static int svm_get_cpl(struct kvm_vcpu *vcpu) | |||
| 936 | return save->cpl; | 1105 | return save->cpl; |
| 937 | } | 1106 | } |
| 938 | 1107 | ||
| 939 | static void svm_get_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt) | 1108 | static void svm_get_idt(struct kvm_vcpu *vcpu, struct desc_ptr *dt) |
| 940 | { | 1109 | { |
| 941 | struct vcpu_svm *svm = to_svm(vcpu); | 1110 | struct vcpu_svm *svm = to_svm(vcpu); |
| 942 | 1111 | ||
| 943 | dt->limit = svm->vmcb->save.idtr.limit; | 1112 | dt->size = svm->vmcb->save.idtr.limit; |
| 944 | dt->base = svm->vmcb->save.idtr.base; | 1113 | dt->address = svm->vmcb->save.idtr.base; |
| 945 | } | 1114 | } |
| 946 | 1115 | ||
| 947 | static void svm_set_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt) | 1116 | static void svm_set_idt(struct kvm_vcpu *vcpu, struct desc_ptr *dt) |
| 948 | { | 1117 | { |
| 949 | struct vcpu_svm *svm = to_svm(vcpu); | 1118 | struct vcpu_svm *svm = to_svm(vcpu); |
| 950 | 1119 | ||
| 951 | svm->vmcb->save.idtr.limit = dt->limit; | 1120 | svm->vmcb->save.idtr.limit = dt->size; |
| 952 | svm->vmcb->save.idtr.base = dt->base ; | 1121 | svm->vmcb->save.idtr.base = dt->address ; |
| 953 | } | 1122 | } |
| 954 | 1123 | ||
| 955 | static void svm_get_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt) | 1124 | static void svm_get_gdt(struct kvm_vcpu *vcpu, struct desc_ptr *dt) |
| 956 | { | 1125 | { |
| 957 | struct vcpu_svm *svm = to_svm(vcpu); | 1126 | struct vcpu_svm *svm = to_svm(vcpu); |
| 958 | 1127 | ||
| 959 | dt->limit = svm->vmcb->save.gdtr.limit; | 1128 | dt->size = svm->vmcb->save.gdtr.limit; |
| 960 | dt->base = svm->vmcb->save.gdtr.base; | 1129 | dt->address = svm->vmcb->save.gdtr.base; |
| 961 | } | 1130 | } |
| 962 | 1131 | ||
| 963 | static void svm_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt) | 1132 | static void svm_set_gdt(struct kvm_vcpu *vcpu, struct desc_ptr *dt) |
| 964 | { | 1133 | { |
| 965 | struct vcpu_svm *svm = to_svm(vcpu); | 1134 | struct vcpu_svm *svm = to_svm(vcpu); |
| 966 | 1135 | ||
| 967 | svm->vmcb->save.gdtr.limit = dt->limit; | 1136 | svm->vmcb->save.gdtr.limit = dt->size; |
| 968 | svm->vmcb->save.gdtr.base = dt->base ; | 1137 | svm->vmcb->save.gdtr.base = dt->address ; |
| 969 | } | 1138 | } |
| 970 | 1139 | ||
| 971 | static void svm_decache_cr0_guest_bits(struct kvm_vcpu *vcpu) | 1140 | static void svm_decache_cr0_guest_bits(struct kvm_vcpu *vcpu) |
| @@ -978,6 +1147,7 @@ static void svm_decache_cr4_guest_bits(struct kvm_vcpu *vcpu) | |||
| 978 | 1147 | ||
| 979 | static void update_cr0_intercept(struct vcpu_svm *svm) | 1148 | static void update_cr0_intercept(struct vcpu_svm *svm) |
| 980 | { | 1149 | { |
| 1150 | struct vmcb *vmcb = svm->vmcb; | ||
| 981 | ulong gcr0 = svm->vcpu.arch.cr0; | 1151 | ulong gcr0 = svm->vcpu.arch.cr0; |
| 982 | u64 *hcr0 = &svm->vmcb->save.cr0; | 1152 | u64 *hcr0 = &svm->vmcb->save.cr0; |
| 983 | 1153 | ||
| @@ -989,11 +1159,25 @@ static void update_cr0_intercept(struct vcpu_svm *svm) | |||
| 989 | 1159 | ||
| 990 | 1160 | ||
| 991 | if (gcr0 == *hcr0 && svm->vcpu.fpu_active) { | 1161 | if (gcr0 == *hcr0 && svm->vcpu.fpu_active) { |
| 992 | svm->vmcb->control.intercept_cr_read &= ~INTERCEPT_CR0_MASK; | 1162 | vmcb->control.intercept_cr_read &= ~INTERCEPT_CR0_MASK; |
| 993 | svm->vmcb->control.intercept_cr_write &= ~INTERCEPT_CR0_MASK; | 1163 | vmcb->control.intercept_cr_write &= ~INTERCEPT_CR0_MASK; |
| 1164 | if (is_nested(svm)) { | ||
| 1165 | struct vmcb *hsave = svm->nested.hsave; | ||
| 1166 | |||
| 1167 | hsave->control.intercept_cr_read &= ~INTERCEPT_CR0_MASK; | ||
| 1168 | hsave->control.intercept_cr_write &= ~INTERCEPT_CR0_MASK; | ||
| 1169 | vmcb->control.intercept_cr_read |= svm->nested.intercept_cr_read; | ||
| 1170 | vmcb->control.intercept_cr_write |= svm->nested.intercept_cr_write; | ||
| 1171 | } | ||
| 994 | } else { | 1172 | } else { |
| 995 | svm->vmcb->control.intercept_cr_read |= INTERCEPT_CR0_MASK; | 1173 | svm->vmcb->control.intercept_cr_read |= INTERCEPT_CR0_MASK; |
| 996 | svm->vmcb->control.intercept_cr_write |= INTERCEPT_CR0_MASK; | 1174 | svm->vmcb->control.intercept_cr_write |= INTERCEPT_CR0_MASK; |
| 1175 | if (is_nested(svm)) { | ||
| 1176 | struct vmcb *hsave = svm->nested.hsave; | ||
| 1177 | |||
| 1178 | hsave->control.intercept_cr_read |= INTERCEPT_CR0_MASK; | ||
| 1179 | hsave->control.intercept_cr_write |= INTERCEPT_CR0_MASK; | ||
| 1180 | } | ||
| 997 | } | 1181 | } |
| 998 | } | 1182 | } |
| 999 | 1183 | ||
| @@ -1001,6 +1185,27 @@ static void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0) | |||
| 1001 | { | 1185 | { |
| 1002 | struct vcpu_svm *svm = to_svm(vcpu); | 1186 | struct vcpu_svm *svm = to_svm(vcpu); |
| 1003 | 1187 | ||
| 1188 | if (is_nested(svm)) { | ||
| 1189 | /* | ||
| 1190 | * We are here because we run in nested mode, the host kvm | ||
| 1191 | * intercepts cr0 writes but the l1 hypervisor does not. | ||
| 1192 | * But the L1 hypervisor may intercept selective cr0 writes. | ||
| 1193 | * This needs to be checked here. | ||
| 1194 | */ | ||
| 1195 | unsigned long old, new; | ||
| 1196 | |||
| 1197 | /* Remove bits that would trigger a real cr0 write intercept */ | ||
| 1198 | old = vcpu->arch.cr0 & SVM_CR0_SELECTIVE_MASK; | ||
| 1199 | new = cr0 & SVM_CR0_SELECTIVE_MASK; | ||
| 1200 | |||
| 1201 | if (old == new) { | ||
| 1202 | /* cr0 write with ts and mp unchanged */ | ||
| 1203 | svm->vmcb->control.exit_code = SVM_EXIT_CR0_SEL_WRITE; | ||
| 1204 | if (nested_svm_exit_handled(svm) == NESTED_EXIT_DONE) | ||
| 1205 | return; | ||
| 1206 | } | ||
| 1207 | } | ||
| 1208 | |||
| 1004 | #ifdef CONFIG_X86_64 | 1209 | #ifdef CONFIG_X86_64 |
| 1005 | if (vcpu->arch.efer & EFER_LME) { | 1210 | if (vcpu->arch.efer & EFER_LME) { |
| 1006 | if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) { | 1211 | if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) { |
| @@ -1134,70 +1339,11 @@ static void new_asid(struct vcpu_svm *svm, struct svm_cpu_data *sd) | |||
| 1134 | svm->vmcb->control.asid = sd->next_asid++; | 1339 | svm->vmcb->control.asid = sd->next_asid++; |
| 1135 | } | 1340 | } |
| 1136 | 1341 | ||
| 1137 | static int svm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *dest) | 1342 | static void svm_set_dr7(struct kvm_vcpu *vcpu, unsigned long value) |
| 1138 | { | 1343 | { |
| 1139 | struct vcpu_svm *svm = to_svm(vcpu); | 1344 | struct vcpu_svm *svm = to_svm(vcpu); |
| 1140 | 1345 | ||
| 1141 | switch (dr) { | 1346 | svm->vmcb->save.dr7 = value; |
| 1142 | case 0 ... 3: | ||
| 1143 | *dest = vcpu->arch.db[dr]; | ||
| 1144 | break; | ||
| 1145 | case 4: | ||
| 1146 | if (kvm_read_cr4_bits(vcpu, X86_CR4_DE)) | ||
| 1147 | return EMULATE_FAIL; /* will re-inject UD */ | ||
| 1148 | /* fall through */ | ||
| 1149 | case 6: | ||
| 1150 | if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) | ||
| 1151 | *dest = vcpu->arch.dr6; | ||
| 1152 | else | ||
| 1153 | *dest = svm->vmcb->save.dr6; | ||
| 1154 | break; | ||
| 1155 | case 5: | ||
| 1156 | if (kvm_read_cr4_bits(vcpu, X86_CR4_DE)) | ||
| 1157 | return EMULATE_FAIL; /* will re-inject UD */ | ||
| 1158 | /* fall through */ | ||
| 1159 | case 7: | ||
| 1160 | if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) | ||
| 1161 | *dest = vcpu->arch.dr7; | ||
| 1162 | else | ||
| 1163 | *dest = svm->vmcb->save.dr7; | ||
| 1164 | break; | ||
| 1165 | } | ||
| 1166 | |||
| 1167 | return EMULATE_DONE; | ||
| 1168 | } | ||
| 1169 | |||
| 1170 | static int svm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long value) | ||
| 1171 | { | ||
| 1172 | struct vcpu_svm *svm = to_svm(vcpu); | ||
| 1173 | |||
| 1174 | switch (dr) { | ||
| 1175 | case 0 ... 3: | ||
| 1176 | vcpu->arch.db[dr] = value; | ||
| 1177 | if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) | ||
| 1178 | vcpu->arch.eff_db[dr] = value; | ||
| 1179 | break; | ||
| 1180 | case 4: | ||
| 1181 | if (kvm_read_cr4_bits(vcpu, X86_CR4_DE)) | ||
| 1182 | return EMULATE_FAIL; /* will re-inject UD */ | ||
| 1183 | /* fall through */ | ||
| 1184 | case 6: | ||
| 1185 | vcpu->arch.dr6 = (value & DR6_VOLATILE) | DR6_FIXED_1; | ||
| 1186 | break; | ||
| 1187 | case 5: | ||
| 1188 | if (kvm_read_cr4_bits(vcpu, X86_CR4_DE)) | ||
| 1189 | return EMULATE_FAIL; /* will re-inject UD */ | ||
| 1190 | /* fall through */ | ||
| 1191 | case 7: | ||
| 1192 | vcpu->arch.dr7 = (value & DR7_VOLATILE) | DR7_FIXED_1; | ||
| 1193 | if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) { | ||
| 1194 | svm->vmcb->save.dr7 = vcpu->arch.dr7; | ||
| 1195 | vcpu->arch.switch_db_regs = (value & DR7_BP_EN_MASK); | ||
| 1196 | } | ||
| 1197 | break; | ||
| 1198 | } | ||
| 1199 | |||
| 1200 | return EMULATE_DONE; | ||
| 1201 | } | 1347 | } |
| 1202 | 1348 | ||
| 1203 | static int pf_interception(struct vcpu_svm *svm) | 1349 | static int pf_interception(struct vcpu_svm *svm) |
| @@ -1234,7 +1380,7 @@ static int db_interception(struct vcpu_svm *svm) | |||
| 1234 | } | 1380 | } |
| 1235 | 1381 | ||
| 1236 | if (svm->vcpu.guest_debug & | 1382 | if (svm->vcpu.guest_debug & |
| 1237 | (KVM_GUESTDBG_SINGLESTEP | KVM_GUESTDBG_USE_HW_BP)){ | 1383 | (KVM_GUESTDBG_SINGLESTEP | KVM_GUESTDBG_USE_HW_BP)) { |
| 1238 | kvm_run->exit_reason = KVM_EXIT_DEBUG; | 1384 | kvm_run->exit_reason = KVM_EXIT_DEBUG; |
| 1239 | kvm_run->debug.arch.pc = | 1385 | kvm_run->debug.arch.pc = |
| 1240 | svm->vmcb->save.cs.base + svm->vmcb->save.rip; | 1386 | svm->vmcb->save.cs.base + svm->vmcb->save.rip; |
| @@ -1268,7 +1414,22 @@ static int ud_interception(struct vcpu_svm *svm) | |||
| 1268 | static void svm_fpu_activate(struct kvm_vcpu *vcpu) | 1414 | static void svm_fpu_activate(struct kvm_vcpu *vcpu) |
| 1269 | { | 1415 | { |
| 1270 | struct vcpu_svm *svm = to_svm(vcpu); | 1416 | struct vcpu_svm *svm = to_svm(vcpu); |
| 1271 | svm->vmcb->control.intercept_exceptions &= ~(1 << NM_VECTOR); | 1417 | u32 excp; |
| 1418 | |||
| 1419 | if (is_nested(svm)) { | ||
| 1420 | u32 h_excp, n_excp; | ||
| 1421 | |||
| 1422 | h_excp = svm->nested.hsave->control.intercept_exceptions; | ||
| 1423 | n_excp = svm->nested.intercept_exceptions; | ||
| 1424 | h_excp &= ~(1 << NM_VECTOR); | ||
| 1425 | excp = h_excp | n_excp; | ||
| 1426 | } else { | ||
| 1427 | excp = svm->vmcb->control.intercept_exceptions; | ||
| 1428 | excp &= ~(1 << NM_VECTOR); | ||
| 1429 | } | ||
| 1430 | |||
| 1431 | svm->vmcb->control.intercept_exceptions = excp; | ||
| 1432 | |||
| 1272 | svm->vcpu.fpu_active = 1; | 1433 | svm->vcpu.fpu_active = 1; |
| 1273 | update_cr0_intercept(svm); | 1434 | update_cr0_intercept(svm); |
| 1274 | } | 1435 | } |
| @@ -1279,8 +1440,59 @@ static int nm_interception(struct vcpu_svm *svm) | |||
| 1279 | return 1; | 1440 | return 1; |
| 1280 | } | 1441 | } |
| 1281 | 1442 | ||
| 1282 | static int mc_interception(struct vcpu_svm *svm) | 1443 | static bool is_erratum_383(void) |
| 1283 | { | 1444 | { |
| 1445 | int err, i; | ||
| 1446 | u64 value; | ||
| 1447 | |||
| 1448 | if (!erratum_383_found) | ||
| 1449 | return false; | ||
| 1450 | |||
| 1451 | value = native_read_msr_safe(MSR_IA32_MC0_STATUS, &err); | ||
| 1452 | if (err) | ||
| 1453 | return false; | ||
| 1454 | |||
| 1455 | /* Bit 62 may or may not be set for this mce */ | ||
| 1456 | value &= ~(1ULL << 62); | ||
| 1457 | |||
| 1458 | if (value != 0xb600000000010015ULL) | ||
| 1459 | return false; | ||
| 1460 | |||
| 1461 | /* Clear MCi_STATUS registers */ | ||
| 1462 | for (i = 0; i < 6; ++i) | ||
| 1463 | native_write_msr_safe(MSR_IA32_MCx_STATUS(i), 0, 0); | ||
| 1464 | |||
| 1465 | value = native_read_msr_safe(MSR_IA32_MCG_STATUS, &err); | ||
| 1466 | if (!err) { | ||
| 1467 | u32 low, high; | ||
| 1468 | |||
| 1469 | value &= ~(1ULL << 2); | ||
| 1470 | low = lower_32_bits(value); | ||
| 1471 | high = upper_32_bits(value); | ||
| 1472 | |||
| 1473 | native_write_msr_safe(MSR_IA32_MCG_STATUS, low, high); | ||
| 1474 | } | ||
| 1475 | |||
| 1476 | /* Flush tlb to evict multi-match entries */ | ||
| 1477 | __flush_tlb_all(); | ||
| 1478 | |||
| 1479 | return true; | ||
| 1480 | } | ||
| 1481 | |||
| 1482 | static void svm_handle_mce(struct vcpu_svm *svm) | ||
| 1483 | { | ||
| 1484 | if (is_erratum_383()) { | ||
| 1485 | /* | ||
| 1486 | * Erratum 383 triggered. Guest state is corrupt so kill the | ||
| 1487 | * guest. | ||
| 1488 | */ | ||
| 1489 | pr_err("KVM: Guest triggered AMD Erratum 383\n"); | ||
| 1490 | |||
| 1491 | set_bit(KVM_REQ_TRIPLE_FAULT, &svm->vcpu.requests); | ||
| 1492 | |||
| 1493 | return; | ||
| 1494 | } | ||
| 1495 | |||
| 1284 | /* | 1496 | /* |
| 1285 | * On an #MC intercept the MCE handler is not called automatically in | 1497 | * On an #MC intercept the MCE handler is not called automatically in |
| 1286 | * the host. So do it by hand here. | 1498 | * the host. So do it by hand here. |
| @@ -1289,6 +1501,11 @@ static int mc_interception(struct vcpu_svm *svm) | |||
| 1289 | "int $0x12\n"); | 1501 | "int $0x12\n"); |
| 1290 | /* not sure if we ever come back to this point */ | 1502 | /* not sure if we ever come back to this point */ |
| 1291 | 1503 | ||
| 1504 | return; | ||
| 1505 | } | ||
| 1506 | |||
| 1507 | static int mc_interception(struct vcpu_svm *svm) | ||
| 1508 | { | ||
| 1292 | return 1; | 1509 | return 1; |
| 1293 | } | 1510 | } |
| 1294 | 1511 | ||
| @@ -1309,29 +1526,23 @@ static int shutdown_interception(struct vcpu_svm *svm) | |||
| 1309 | 1526 | ||
| 1310 | static int io_interception(struct vcpu_svm *svm) | 1527 | static int io_interception(struct vcpu_svm *svm) |
| 1311 | { | 1528 | { |
| 1529 | struct kvm_vcpu *vcpu = &svm->vcpu; | ||
| 1312 | u32 io_info = svm->vmcb->control.exit_info_1; /* address size bug? */ | 1530 | u32 io_info = svm->vmcb->control.exit_info_1; /* address size bug? */ |
| 1313 | int size, in, string; | 1531 | int size, in, string; |
| 1314 | unsigned port; | 1532 | unsigned port; |
| 1315 | 1533 | ||
| 1316 | ++svm->vcpu.stat.io_exits; | 1534 | ++svm->vcpu.stat.io_exits; |
| 1317 | |||
| 1318 | svm->next_rip = svm->vmcb->control.exit_info_2; | ||
| 1319 | |||
| 1320 | string = (io_info & SVM_IOIO_STR_MASK) != 0; | 1535 | string = (io_info & SVM_IOIO_STR_MASK) != 0; |
| 1321 | |||
| 1322 | if (string) { | ||
| 1323 | if (emulate_instruction(&svm->vcpu, | ||
| 1324 | 0, 0, 0) == EMULATE_DO_MMIO) | ||
| 1325 | return 0; | ||
| 1326 | return 1; | ||
| 1327 | } | ||
| 1328 | |||
| 1329 | in = (io_info & SVM_IOIO_TYPE_MASK) != 0; | 1536 | in = (io_info & SVM_IOIO_TYPE_MASK) != 0; |
| 1537 | if (string || in) | ||
| 1538 | return !(emulate_instruction(vcpu, 0, 0, 0) == EMULATE_DO_MMIO); | ||
| 1539 | |||
| 1330 | port = io_info >> 16; | 1540 | port = io_info >> 16; |
| 1331 | size = (io_info & SVM_IOIO_SIZE_MASK) >> SVM_IOIO_SIZE_SHIFT; | 1541 | size = (io_info & SVM_IOIO_SIZE_MASK) >> SVM_IOIO_SIZE_SHIFT; |
| 1332 | 1542 | svm->next_rip = svm->vmcb->control.exit_info_2; | |
| 1333 | skip_emulated_instruction(&svm->vcpu); | 1543 | skip_emulated_instruction(&svm->vcpu); |
| 1334 | return kvm_emulate_pio(&svm->vcpu, in, size, port); | 1544 | |
| 1545 | return kvm_fast_pio_out(vcpu, size, port); | ||
| 1335 | } | 1546 | } |
| 1336 | 1547 | ||
| 1337 | static int nmi_interception(struct vcpu_svm *svm) | 1548 | static int nmi_interception(struct vcpu_svm *svm) |
| @@ -1384,6 +1595,8 @@ static int nested_svm_check_permissions(struct vcpu_svm *svm) | |||
| 1384 | static int nested_svm_check_exception(struct vcpu_svm *svm, unsigned nr, | 1595 | static int nested_svm_check_exception(struct vcpu_svm *svm, unsigned nr, |
| 1385 | bool has_error_code, u32 error_code) | 1596 | bool has_error_code, u32 error_code) |
| 1386 | { | 1597 | { |
| 1598 | int vmexit; | ||
| 1599 | |||
| 1387 | if (!is_nested(svm)) | 1600 | if (!is_nested(svm)) |
| 1388 | return 0; | 1601 | return 0; |
| 1389 | 1602 | ||
| @@ -1392,21 +1605,28 @@ static int nested_svm_check_exception(struct vcpu_svm *svm, unsigned nr, | |||
| 1392 | svm->vmcb->control.exit_info_1 = error_code; | 1605 | svm->vmcb->control.exit_info_1 = error_code; |
| 1393 | svm->vmcb->control.exit_info_2 = svm->vcpu.arch.cr2; | 1606 | svm->vmcb->control.exit_info_2 = svm->vcpu.arch.cr2; |
| 1394 | 1607 | ||
| 1395 | return nested_svm_exit_handled(svm); | 1608 | vmexit = nested_svm_intercept(svm); |
| 1609 | if (vmexit == NESTED_EXIT_DONE) | ||
| 1610 | svm->nested.exit_required = true; | ||
| 1611 | |||
| 1612 | return vmexit; | ||
| 1396 | } | 1613 | } |
| 1397 | 1614 | ||
| 1398 | static inline int nested_svm_intr(struct vcpu_svm *svm) | 1615 | /* This function returns true if it is save to enable the irq window */ |
| 1616 | static inline bool nested_svm_intr(struct vcpu_svm *svm) | ||
| 1399 | { | 1617 | { |
| 1400 | if (!is_nested(svm)) | 1618 | if (!is_nested(svm)) |
| 1401 | return 0; | 1619 | return true; |
| 1402 | 1620 | ||
| 1403 | if (!(svm->vcpu.arch.hflags & HF_VINTR_MASK)) | 1621 | if (!(svm->vcpu.arch.hflags & HF_VINTR_MASK)) |
| 1404 | return 0; | 1622 | return true; |
| 1405 | 1623 | ||
| 1406 | if (!(svm->vcpu.arch.hflags & HF_HIF_MASK)) | 1624 | if (!(svm->vcpu.arch.hflags & HF_HIF_MASK)) |
| 1407 | return 0; | 1625 | return false; |
| 1408 | 1626 | ||
| 1409 | svm->vmcb->control.exit_code = SVM_EXIT_INTR; | 1627 | svm->vmcb->control.exit_code = SVM_EXIT_INTR; |
| 1628 | svm->vmcb->control.exit_info_1 = 0; | ||
| 1629 | svm->vmcb->control.exit_info_2 = 0; | ||
| 1410 | 1630 | ||
| 1411 | if (svm->nested.intercept & 1ULL) { | 1631 | if (svm->nested.intercept & 1ULL) { |
| 1412 | /* | 1632 | /* |
| @@ -1417,21 +1637,40 @@ static inline int nested_svm_intr(struct vcpu_svm *svm) | |||
| 1417 | */ | 1637 | */ |
| 1418 | svm->nested.exit_required = true; | 1638 | svm->nested.exit_required = true; |
| 1419 | trace_kvm_nested_intr_vmexit(svm->vmcb->save.rip); | 1639 | trace_kvm_nested_intr_vmexit(svm->vmcb->save.rip); |
| 1420 | return 1; | 1640 | return false; |
| 1421 | } | 1641 | } |
| 1422 | 1642 | ||
| 1423 | return 0; | 1643 | return true; |
| 1424 | } | 1644 | } |
| 1425 | 1645 | ||
| 1426 | static void *nested_svm_map(struct vcpu_svm *svm, u64 gpa, enum km_type idx) | 1646 | /* This function returns true if it is save to enable the nmi window */ |
| 1647 | static inline bool nested_svm_nmi(struct vcpu_svm *svm) | ||
| 1648 | { | ||
| 1649 | if (!is_nested(svm)) | ||
| 1650 | return true; | ||
| 1651 | |||
| 1652 | if (!(svm->nested.intercept & (1ULL << INTERCEPT_NMI))) | ||
| 1653 | return true; | ||
| 1654 | |||
| 1655 | svm->vmcb->control.exit_code = SVM_EXIT_NMI; | ||
| 1656 | svm->nested.exit_required = true; | ||
| 1657 | |||
| 1658 | return false; | ||
| 1659 | } | ||
| 1660 | |||
| 1661 | static void *nested_svm_map(struct vcpu_svm *svm, u64 gpa, struct page **_page) | ||
| 1427 | { | 1662 | { |
| 1428 | struct page *page; | 1663 | struct page *page; |
| 1429 | 1664 | ||
| 1665 | might_sleep(); | ||
| 1666 | |||
| 1430 | page = gfn_to_page(svm->vcpu.kvm, gpa >> PAGE_SHIFT); | 1667 | page = gfn_to_page(svm->vcpu.kvm, gpa >> PAGE_SHIFT); |
| 1431 | if (is_error_page(page)) | 1668 | if (is_error_page(page)) |
| 1432 | goto error; | 1669 | goto error; |
| 1433 | 1670 | ||
| 1434 | return kmap_atomic(page, idx); | 1671 | *_page = page; |
| 1672 | |||
| 1673 | return kmap(page); | ||
| 1435 | 1674 | ||
| 1436 | error: | 1675 | error: |
| 1437 | kvm_release_page_clean(page); | 1676 | kvm_release_page_clean(page); |
| @@ -1440,61 +1679,55 @@ error: | |||
| 1440 | return NULL; | 1679 | return NULL; |
| 1441 | } | 1680 | } |
| 1442 | 1681 | ||
| 1443 | static void nested_svm_unmap(void *addr, enum km_type idx) | 1682 | static void nested_svm_unmap(struct page *page) |
| 1444 | { | 1683 | { |
| 1445 | struct page *page; | 1684 | kunmap(page); |
| 1685 | kvm_release_page_dirty(page); | ||
| 1686 | } | ||
| 1446 | 1687 | ||
| 1447 | if (!addr) | 1688 | static int nested_svm_intercept_ioio(struct vcpu_svm *svm) |
| 1448 | return; | 1689 | { |
| 1690 | unsigned port; | ||
| 1691 | u8 val, bit; | ||
| 1692 | u64 gpa; | ||
| 1449 | 1693 | ||
| 1450 | page = kmap_atomic_to_page(addr); | 1694 | if (!(svm->nested.intercept & (1ULL << INTERCEPT_IOIO_PROT))) |
| 1695 | return NESTED_EXIT_HOST; | ||
| 1451 | 1696 | ||
| 1452 | kunmap_atomic(addr, idx); | 1697 | port = svm->vmcb->control.exit_info_1 >> 16; |
| 1453 | kvm_release_page_dirty(page); | 1698 | gpa = svm->nested.vmcb_iopm + (port / 8); |
| 1699 | bit = port % 8; | ||
| 1700 | val = 0; | ||
| 1701 | |||
| 1702 | if (kvm_read_guest(svm->vcpu.kvm, gpa, &val, 1)) | ||
| 1703 | val &= (1 << bit); | ||
| 1704 | |||
| 1705 | return val ? NESTED_EXIT_DONE : NESTED_EXIT_HOST; | ||
| 1454 | } | 1706 | } |
| 1455 | 1707 | ||
| 1456 | static bool nested_svm_exit_handled_msr(struct vcpu_svm *svm) | 1708 | static int nested_svm_exit_handled_msr(struct vcpu_svm *svm) |
| 1457 | { | 1709 | { |
| 1458 | u32 param = svm->vmcb->control.exit_info_1 & 1; | 1710 | u32 offset, msr, value; |
| 1459 | u32 msr = svm->vcpu.arch.regs[VCPU_REGS_RCX]; | 1711 | int write, mask; |
| 1460 | bool ret = false; | ||
| 1461 | u32 t0, t1; | ||
| 1462 | u8 *msrpm; | ||
| 1463 | 1712 | ||
| 1464 | if (!(svm->nested.intercept & (1ULL << INTERCEPT_MSR_PROT))) | 1713 | if (!(svm->nested.intercept & (1ULL << INTERCEPT_MSR_PROT))) |
| 1465 | return false; | 1714 | return NESTED_EXIT_HOST; |
| 1466 | 1715 | ||
| 1467 | msrpm = nested_svm_map(svm, svm->nested.vmcb_msrpm, KM_USER0); | 1716 | msr = svm->vcpu.arch.regs[VCPU_REGS_RCX]; |
| 1717 | offset = svm_msrpm_offset(msr); | ||
| 1718 | write = svm->vmcb->control.exit_info_1 & 1; | ||
| 1719 | mask = 1 << ((2 * (msr & 0xf)) + write); | ||
| 1468 | 1720 | ||
| 1469 | if (!msrpm) | 1721 | if (offset == MSR_INVALID) |
| 1470 | goto out; | 1722 | return NESTED_EXIT_DONE; |
| 1471 | 1723 | ||
| 1472 | switch (msr) { | 1724 | /* Offset is in 32 bit units but need in 8 bit units */ |
| 1473 | case 0 ... 0x1fff: | 1725 | offset *= 4; |
| 1474 | t0 = (msr * 2) % 8; | ||
| 1475 | t1 = msr / 8; | ||
| 1476 | break; | ||
| 1477 | case 0xc0000000 ... 0xc0001fff: | ||
| 1478 | t0 = (8192 + msr - 0xc0000000) * 2; | ||
| 1479 | t1 = (t0 / 8); | ||
| 1480 | t0 %= 8; | ||
| 1481 | break; | ||
| 1482 | case 0xc0010000 ... 0xc0011fff: | ||
| 1483 | t0 = (16384 + msr - 0xc0010000) * 2; | ||
| 1484 | t1 = (t0 / 8); | ||
| 1485 | t0 %= 8; | ||
| 1486 | break; | ||
| 1487 | default: | ||
| 1488 | ret = true; | ||
| 1489 | goto out; | ||
| 1490 | } | ||
| 1491 | |||
| 1492 | ret = msrpm[t1] & ((1 << param) << t0); | ||
| 1493 | 1726 | ||
| 1494 | out: | 1727 | if (kvm_read_guest(svm->vcpu.kvm, svm->nested.vmcb_msrpm + offset, &value, 4)) |
| 1495 | nested_svm_unmap(msrpm, KM_USER0); | 1728 | return NESTED_EXIT_DONE; |
| 1496 | 1729 | ||
| 1497 | return ret; | 1730 | return (value & mask) ? NESTED_EXIT_DONE : NESTED_EXIT_HOST; |
| 1498 | } | 1731 | } |
| 1499 | 1732 | ||
| 1500 | static int nested_svm_exit_special(struct vcpu_svm *svm) | 1733 | static int nested_svm_exit_special(struct vcpu_svm *svm) |
| @@ -1504,17 +1737,21 @@ static int nested_svm_exit_special(struct vcpu_svm *svm) | |||
| 1504 | switch (exit_code) { | 1737 | switch (exit_code) { |
| 1505 | case SVM_EXIT_INTR: | 1738 | case SVM_EXIT_INTR: |
| 1506 | case SVM_EXIT_NMI: | 1739 | case SVM_EXIT_NMI: |
| 1740 | case SVM_EXIT_EXCP_BASE + MC_VECTOR: | ||
| 1507 | return NESTED_EXIT_HOST; | 1741 | return NESTED_EXIT_HOST; |
| 1508 | /* For now we are always handling NPFs when using them */ | ||
| 1509 | case SVM_EXIT_NPF: | 1742 | case SVM_EXIT_NPF: |
| 1743 | /* For now we are always handling NPFs when using them */ | ||
| 1510 | if (npt_enabled) | 1744 | if (npt_enabled) |
| 1511 | return NESTED_EXIT_HOST; | 1745 | return NESTED_EXIT_HOST; |
| 1512 | break; | 1746 | break; |
| 1513 | /* When we're shadowing, trap PFs */ | ||
| 1514 | case SVM_EXIT_EXCP_BASE + PF_VECTOR: | 1747 | case SVM_EXIT_EXCP_BASE + PF_VECTOR: |
| 1748 | /* When we're shadowing, trap PFs */ | ||
| 1515 | if (!npt_enabled) | 1749 | if (!npt_enabled) |
| 1516 | return NESTED_EXIT_HOST; | 1750 | return NESTED_EXIT_HOST; |
| 1517 | break; | 1751 | break; |
| 1752 | case SVM_EXIT_EXCP_BASE + NM_VECTOR: | ||
| 1753 | nm_interception(svm); | ||
| 1754 | break; | ||
| 1518 | default: | 1755 | default: |
| 1519 | break; | 1756 | break; |
| 1520 | } | 1757 | } |
| @@ -1525,7 +1762,7 @@ static int nested_svm_exit_special(struct vcpu_svm *svm) | |||
| 1525 | /* | 1762 | /* |
| 1526 | * If this function returns true, this #vmexit was already handled | 1763 | * If this function returns true, this #vmexit was already handled |
| 1527 | */ | 1764 | */ |
| 1528 | static int nested_svm_exit_handled(struct vcpu_svm *svm) | 1765 | static int nested_svm_intercept(struct vcpu_svm *svm) |
| 1529 | { | 1766 | { |
| 1530 | u32 exit_code = svm->vmcb->control.exit_code; | 1767 | u32 exit_code = svm->vmcb->control.exit_code; |
| 1531 | int vmexit = NESTED_EXIT_HOST; | 1768 | int vmexit = NESTED_EXIT_HOST; |
| @@ -1534,6 +1771,9 @@ static int nested_svm_exit_handled(struct vcpu_svm *svm) | |||
| 1534 | case SVM_EXIT_MSR: | 1771 | case SVM_EXIT_MSR: |
| 1535 | vmexit = nested_svm_exit_handled_msr(svm); | 1772 | vmexit = nested_svm_exit_handled_msr(svm); |
| 1536 | break; | 1773 | break; |
| 1774 | case SVM_EXIT_IOIO: | ||
| 1775 | vmexit = nested_svm_intercept_ioio(svm); | ||
| 1776 | break; | ||
| 1537 | case SVM_EXIT_READ_CR0 ... SVM_EXIT_READ_CR8: { | 1777 | case SVM_EXIT_READ_CR0 ... SVM_EXIT_READ_CR8: { |
| 1538 | u32 cr_bits = 1 << (exit_code - SVM_EXIT_READ_CR0); | 1778 | u32 cr_bits = 1 << (exit_code - SVM_EXIT_READ_CR0); |
| 1539 | if (svm->nested.intercept_cr_read & cr_bits) | 1779 | if (svm->nested.intercept_cr_read & cr_bits) |
| @@ -1564,6 +1804,10 @@ static int nested_svm_exit_handled(struct vcpu_svm *svm) | |||
| 1564 | vmexit = NESTED_EXIT_DONE; | 1804 | vmexit = NESTED_EXIT_DONE; |
| 1565 | break; | 1805 | break; |
| 1566 | } | 1806 | } |
| 1807 | case SVM_EXIT_ERR: { | ||
| 1808 | vmexit = NESTED_EXIT_DONE; | ||
| 1809 | break; | ||
| 1810 | } | ||
| 1567 | default: { | 1811 | default: { |
| 1568 | u64 exit_bits = 1ULL << (exit_code - SVM_EXIT_INTR); | 1812 | u64 exit_bits = 1ULL << (exit_code - SVM_EXIT_INTR); |
| 1569 | if (svm->nested.intercept & exit_bits) | 1813 | if (svm->nested.intercept & exit_bits) |
| @@ -1571,9 +1815,17 @@ static int nested_svm_exit_handled(struct vcpu_svm *svm) | |||
| 1571 | } | 1815 | } |
| 1572 | } | 1816 | } |
| 1573 | 1817 | ||
| 1574 | if (vmexit == NESTED_EXIT_DONE) { | 1818 | return vmexit; |
| 1819 | } | ||
| 1820 | |||
| 1821 | static int nested_svm_exit_handled(struct vcpu_svm *svm) | ||
| 1822 | { | ||
| 1823 | int vmexit; | ||
| 1824 | |||
| 1825 | vmexit = nested_svm_intercept(svm); | ||
| 1826 | |||
| 1827 | if (vmexit == NESTED_EXIT_DONE) | ||
| 1575 | nested_svm_vmexit(svm); | 1828 | nested_svm_vmexit(svm); |
| 1576 | } | ||
| 1577 | 1829 | ||
| 1578 | return vmexit; | 1830 | return vmexit; |
| 1579 | } | 1831 | } |
| @@ -1615,6 +1867,7 @@ static int nested_svm_vmexit(struct vcpu_svm *svm) | |||
| 1615 | struct vmcb *nested_vmcb; | 1867 | struct vmcb *nested_vmcb; |
| 1616 | struct vmcb *hsave = svm->nested.hsave; | 1868 | struct vmcb *hsave = svm->nested.hsave; |
| 1617 | struct vmcb *vmcb = svm->vmcb; | 1869 | struct vmcb *vmcb = svm->vmcb; |
| 1870 | struct page *page; | ||
| 1618 | 1871 | ||
| 1619 | trace_kvm_nested_vmexit_inject(vmcb->control.exit_code, | 1872 | trace_kvm_nested_vmexit_inject(vmcb->control.exit_code, |
| 1620 | vmcb->control.exit_info_1, | 1873 | vmcb->control.exit_info_1, |
| @@ -1622,10 +1875,13 @@ static int nested_svm_vmexit(struct vcpu_svm *svm) | |||
| 1622 | vmcb->control.exit_int_info, | 1875 | vmcb->control.exit_int_info, |
| 1623 | vmcb->control.exit_int_info_err); | 1876 | vmcb->control.exit_int_info_err); |
| 1624 | 1877 | ||
| 1625 | nested_vmcb = nested_svm_map(svm, svm->nested.vmcb, KM_USER0); | 1878 | nested_vmcb = nested_svm_map(svm, svm->nested.vmcb, &page); |
| 1626 | if (!nested_vmcb) | 1879 | if (!nested_vmcb) |
| 1627 | return 1; | 1880 | return 1; |
| 1628 | 1881 | ||
| 1882 | /* Exit nested SVM mode */ | ||
| 1883 | svm->nested.vmcb = 0; | ||
| 1884 | |||
| 1629 | /* Give the current vmcb to the guest */ | 1885 | /* Give the current vmcb to the guest */ |
| 1630 | disable_gif(svm); | 1886 | disable_gif(svm); |
| 1631 | 1887 | ||
| @@ -1635,9 +1891,10 @@ static int nested_svm_vmexit(struct vcpu_svm *svm) | |||
| 1635 | nested_vmcb->save.ds = vmcb->save.ds; | 1891 | nested_vmcb->save.ds = vmcb->save.ds; |
| 1636 | nested_vmcb->save.gdtr = vmcb->save.gdtr; | 1892 | nested_vmcb->save.gdtr = vmcb->save.gdtr; |
| 1637 | nested_vmcb->save.idtr = vmcb->save.idtr; | 1893 | nested_vmcb->save.idtr = vmcb->save.idtr; |
| 1638 | if (npt_enabled) | 1894 | nested_vmcb->save.cr0 = kvm_read_cr0(&svm->vcpu); |
| 1639 | nested_vmcb->save.cr3 = vmcb->save.cr3; | 1895 | nested_vmcb->save.cr3 = svm->vcpu.arch.cr3; |
| 1640 | nested_vmcb->save.cr2 = vmcb->save.cr2; | 1896 | nested_vmcb->save.cr2 = vmcb->save.cr2; |
| 1897 | nested_vmcb->save.cr4 = svm->vcpu.arch.cr4; | ||
| 1641 | nested_vmcb->save.rflags = vmcb->save.rflags; | 1898 | nested_vmcb->save.rflags = vmcb->save.rflags; |
| 1642 | nested_vmcb->save.rip = vmcb->save.rip; | 1899 | nested_vmcb->save.rip = vmcb->save.rip; |
| 1643 | nested_vmcb->save.rsp = vmcb->save.rsp; | 1900 | nested_vmcb->save.rsp = vmcb->save.rsp; |
| @@ -1709,10 +1966,7 @@ static int nested_svm_vmexit(struct vcpu_svm *svm) | |||
| 1709 | svm->vmcb->save.cpl = 0; | 1966 | svm->vmcb->save.cpl = 0; |
| 1710 | svm->vmcb->control.exit_int_info = 0; | 1967 | svm->vmcb->control.exit_int_info = 0; |
| 1711 | 1968 | ||
| 1712 | /* Exit nested SVM mode */ | 1969 | nested_svm_unmap(page); |
| 1713 | svm->nested.vmcb = 0; | ||
| 1714 | |||
| 1715 | nested_svm_unmap(nested_vmcb, KM_USER0); | ||
| 1716 | 1970 | ||
| 1717 | kvm_mmu_reset_context(&svm->vcpu); | 1971 | kvm_mmu_reset_context(&svm->vcpu); |
| 1718 | kvm_mmu_load(&svm->vcpu); | 1972 | kvm_mmu_load(&svm->vcpu); |
| @@ -1722,19 +1976,33 @@ static int nested_svm_vmexit(struct vcpu_svm *svm) | |||
| 1722 | 1976 | ||
| 1723 | static bool nested_svm_vmrun_msrpm(struct vcpu_svm *svm) | 1977 | static bool nested_svm_vmrun_msrpm(struct vcpu_svm *svm) |
| 1724 | { | 1978 | { |
| 1725 | u32 *nested_msrpm; | 1979 | /* |
| 1980 | * This function merges the msr permission bitmaps of kvm and the | ||
| 1981 | * nested vmcb. It is omptimized in that it only merges the parts where | ||
| 1982 | * the kvm msr permission bitmap may contain zero bits | ||
| 1983 | */ | ||
| 1726 | int i; | 1984 | int i; |
| 1727 | 1985 | ||
| 1728 | nested_msrpm = nested_svm_map(svm, svm->nested.vmcb_msrpm, KM_USER0); | 1986 | if (!(svm->nested.intercept & (1ULL << INTERCEPT_MSR_PROT))) |
| 1729 | if (!nested_msrpm) | 1987 | return true; |
| 1730 | return false; | ||
| 1731 | 1988 | ||
| 1732 | for (i=0; i< PAGE_SIZE * (1 << MSRPM_ALLOC_ORDER) / 4; i++) | 1989 | for (i = 0; i < MSRPM_OFFSETS; i++) { |
| 1733 | svm->nested.msrpm[i] = svm->msrpm[i] | nested_msrpm[i]; | 1990 | u32 value, p; |
| 1991 | u64 offset; | ||
| 1734 | 1992 | ||
| 1735 | svm->vmcb->control.msrpm_base_pa = __pa(svm->nested.msrpm); | 1993 | if (msrpm_offsets[i] == 0xffffffff) |
| 1994 | break; | ||
| 1995 | |||
| 1996 | p = msrpm_offsets[i]; | ||
| 1997 | offset = svm->nested.vmcb_msrpm + (p * 4); | ||
| 1736 | 1998 | ||
| 1737 | nested_svm_unmap(nested_msrpm, KM_USER0); | 1999 | if (kvm_read_guest(svm->vcpu.kvm, offset, &value, 4)) |
| 2000 | return false; | ||
| 2001 | |||
| 2002 | svm->nested.msrpm[p] = svm->msrpm[p] | value; | ||
| 2003 | } | ||
| 2004 | |||
| 2005 | svm->vmcb->control.msrpm_base_pa = __pa(svm->nested.msrpm); | ||
| 1738 | 2006 | ||
| 1739 | return true; | 2007 | return true; |
| 1740 | } | 2008 | } |
| @@ -1744,26 +2012,34 @@ static bool nested_svm_vmrun(struct vcpu_svm *svm) | |||
| 1744 | struct vmcb *nested_vmcb; | 2012 | struct vmcb *nested_vmcb; |
| 1745 | struct vmcb *hsave = svm->nested.hsave; | 2013 | struct vmcb *hsave = svm->nested.hsave; |
| 1746 | struct vmcb *vmcb = svm->vmcb; | 2014 | struct vmcb *vmcb = svm->vmcb; |
| 2015 | struct page *page; | ||
| 2016 | u64 vmcb_gpa; | ||
| 2017 | |||
| 2018 | vmcb_gpa = svm->vmcb->save.rax; | ||
| 1747 | 2019 | ||
| 1748 | nested_vmcb = nested_svm_map(svm, svm->vmcb->save.rax, KM_USER0); | 2020 | nested_vmcb = nested_svm_map(svm, svm->vmcb->save.rax, &page); |
| 1749 | if (!nested_vmcb) | 2021 | if (!nested_vmcb) |
| 1750 | return false; | 2022 | return false; |
| 1751 | 2023 | ||
| 1752 | /* nested_vmcb is our indicator if nested SVM is activated */ | 2024 | trace_kvm_nested_vmrun(svm->vmcb->save.rip - 3, vmcb_gpa, |
| 1753 | svm->nested.vmcb = svm->vmcb->save.rax; | ||
| 1754 | |||
| 1755 | trace_kvm_nested_vmrun(svm->vmcb->save.rip - 3, svm->nested.vmcb, | ||
| 1756 | nested_vmcb->save.rip, | 2025 | nested_vmcb->save.rip, |
| 1757 | nested_vmcb->control.int_ctl, | 2026 | nested_vmcb->control.int_ctl, |
| 1758 | nested_vmcb->control.event_inj, | 2027 | nested_vmcb->control.event_inj, |
| 1759 | nested_vmcb->control.nested_ctl); | 2028 | nested_vmcb->control.nested_ctl); |
| 1760 | 2029 | ||
| 2030 | trace_kvm_nested_intercepts(nested_vmcb->control.intercept_cr_read, | ||
| 2031 | nested_vmcb->control.intercept_cr_write, | ||
| 2032 | nested_vmcb->control.intercept_exceptions, | ||
| 2033 | nested_vmcb->control.intercept); | ||
| 2034 | |||
| 1761 | /* Clear internal status */ | 2035 | /* Clear internal status */ |
| 1762 | kvm_clear_exception_queue(&svm->vcpu); | 2036 | kvm_clear_exception_queue(&svm->vcpu); |
| 1763 | kvm_clear_interrupt_queue(&svm->vcpu); | 2037 | kvm_clear_interrupt_queue(&svm->vcpu); |
| 1764 | 2038 | ||
| 1765 | /* Save the old vmcb, so we don't need to pick what we save, but | 2039 | /* |
| 1766 | can restore everything when a VMEXIT occurs */ | 2040 | * Save the old vmcb, so we don't need to pick what we save, but can |
| 2041 | * restore everything when a VMEXIT occurs | ||
| 2042 | */ | ||
| 1767 | hsave->save.es = vmcb->save.es; | 2043 | hsave->save.es = vmcb->save.es; |
| 1768 | hsave->save.cs = vmcb->save.cs; | 2044 | hsave->save.cs = vmcb->save.cs; |
| 1769 | hsave->save.ss = vmcb->save.ss; | 2045 | hsave->save.ss = vmcb->save.ss; |
| @@ -1803,14 +2079,17 @@ static bool nested_svm_vmrun(struct vcpu_svm *svm) | |||
| 1803 | if (npt_enabled) { | 2079 | if (npt_enabled) { |
| 1804 | svm->vmcb->save.cr3 = nested_vmcb->save.cr3; | 2080 | svm->vmcb->save.cr3 = nested_vmcb->save.cr3; |
| 1805 | svm->vcpu.arch.cr3 = nested_vmcb->save.cr3; | 2081 | svm->vcpu.arch.cr3 = nested_vmcb->save.cr3; |
| 1806 | } else { | 2082 | } else |
| 1807 | kvm_set_cr3(&svm->vcpu, nested_vmcb->save.cr3); | 2083 | kvm_set_cr3(&svm->vcpu, nested_vmcb->save.cr3); |
| 1808 | kvm_mmu_reset_context(&svm->vcpu); | 2084 | |
| 1809 | } | 2085 | /* Guest paging mode is active - reset mmu */ |
| 2086 | kvm_mmu_reset_context(&svm->vcpu); | ||
| 2087 | |||
| 1810 | svm->vmcb->save.cr2 = svm->vcpu.arch.cr2 = nested_vmcb->save.cr2; | 2088 | svm->vmcb->save.cr2 = svm->vcpu.arch.cr2 = nested_vmcb->save.cr2; |
| 1811 | kvm_register_write(&svm->vcpu, VCPU_REGS_RAX, nested_vmcb->save.rax); | 2089 | kvm_register_write(&svm->vcpu, VCPU_REGS_RAX, nested_vmcb->save.rax); |
| 1812 | kvm_register_write(&svm->vcpu, VCPU_REGS_RSP, nested_vmcb->save.rsp); | 2090 | kvm_register_write(&svm->vcpu, VCPU_REGS_RSP, nested_vmcb->save.rsp); |
| 1813 | kvm_register_write(&svm->vcpu, VCPU_REGS_RIP, nested_vmcb->save.rip); | 2091 | kvm_register_write(&svm->vcpu, VCPU_REGS_RIP, nested_vmcb->save.rip); |
| 2092 | |||
| 1814 | /* In case we don't even reach vcpu_run, the fields are not updated */ | 2093 | /* In case we don't even reach vcpu_run, the fields are not updated */ |
| 1815 | svm->vmcb->save.rax = nested_vmcb->save.rax; | 2094 | svm->vmcb->save.rax = nested_vmcb->save.rax; |
| 1816 | svm->vmcb->save.rsp = nested_vmcb->save.rsp; | 2095 | svm->vmcb->save.rsp = nested_vmcb->save.rsp; |
| @@ -1819,22 +2098,8 @@ static bool nested_svm_vmrun(struct vcpu_svm *svm) | |||
| 1819 | svm->vmcb->save.dr6 = nested_vmcb->save.dr6; | 2098 | svm->vmcb->save.dr6 = nested_vmcb->save.dr6; |
| 1820 | svm->vmcb->save.cpl = nested_vmcb->save.cpl; | 2099 | svm->vmcb->save.cpl = nested_vmcb->save.cpl; |
| 1821 | 2100 | ||
| 1822 | /* We don't want a nested guest to be more powerful than the guest, | 2101 | svm->nested.vmcb_msrpm = nested_vmcb->control.msrpm_base_pa & ~0x0fffULL; |
| 1823 | so all intercepts are ORed */ | 2102 | svm->nested.vmcb_iopm = nested_vmcb->control.iopm_base_pa & ~0x0fffULL; |
| 1824 | svm->vmcb->control.intercept_cr_read |= | ||
| 1825 | nested_vmcb->control.intercept_cr_read; | ||
| 1826 | svm->vmcb->control.intercept_cr_write |= | ||
| 1827 | nested_vmcb->control.intercept_cr_write; | ||
| 1828 | svm->vmcb->control.intercept_dr_read |= | ||
| 1829 | nested_vmcb->control.intercept_dr_read; | ||
| 1830 | svm->vmcb->control.intercept_dr_write |= | ||
| 1831 | nested_vmcb->control.intercept_dr_write; | ||
| 1832 | svm->vmcb->control.intercept_exceptions |= | ||
| 1833 | nested_vmcb->control.intercept_exceptions; | ||
| 1834 | |||
| 1835 | svm->vmcb->control.intercept |= nested_vmcb->control.intercept; | ||
| 1836 | |||
| 1837 | svm->nested.vmcb_msrpm = nested_vmcb->control.msrpm_base_pa; | ||
| 1838 | 2103 | ||
| 1839 | /* cache intercepts */ | 2104 | /* cache intercepts */ |
| 1840 | svm->nested.intercept_cr_read = nested_vmcb->control.intercept_cr_read; | 2105 | svm->nested.intercept_cr_read = nested_vmcb->control.intercept_cr_read; |
| @@ -1851,13 +2116,43 @@ static bool nested_svm_vmrun(struct vcpu_svm *svm) | |||
| 1851 | else | 2116 | else |
| 1852 | svm->vcpu.arch.hflags &= ~HF_VINTR_MASK; | 2117 | svm->vcpu.arch.hflags &= ~HF_VINTR_MASK; |
| 1853 | 2118 | ||
| 2119 | if (svm->vcpu.arch.hflags & HF_VINTR_MASK) { | ||
| 2120 | /* We only want the cr8 intercept bits of the guest */ | ||
| 2121 | svm->vmcb->control.intercept_cr_read &= ~INTERCEPT_CR8_MASK; | ||
| 2122 | svm->vmcb->control.intercept_cr_write &= ~INTERCEPT_CR8_MASK; | ||
| 2123 | } | ||
| 2124 | |||
| 2125 | /* We don't want to see VMMCALLs from a nested guest */ | ||
| 2126 | svm->vmcb->control.intercept &= ~(1ULL << INTERCEPT_VMMCALL); | ||
| 2127 | |||
| 2128 | /* | ||
| 2129 | * We don't want a nested guest to be more powerful than the guest, so | ||
| 2130 | * all intercepts are ORed | ||
| 2131 | */ | ||
| 2132 | svm->vmcb->control.intercept_cr_read |= | ||
| 2133 | nested_vmcb->control.intercept_cr_read; | ||
| 2134 | svm->vmcb->control.intercept_cr_write |= | ||
| 2135 | nested_vmcb->control.intercept_cr_write; | ||
| 2136 | svm->vmcb->control.intercept_dr_read |= | ||
| 2137 | nested_vmcb->control.intercept_dr_read; | ||
| 2138 | svm->vmcb->control.intercept_dr_write |= | ||
| 2139 | nested_vmcb->control.intercept_dr_write; | ||
| 2140 | svm->vmcb->control.intercept_exceptions |= | ||
| 2141 | nested_vmcb->control.intercept_exceptions; | ||
| 2142 | |||
| 2143 | svm->vmcb->control.intercept |= nested_vmcb->control.intercept; | ||
| 2144 | |||
| 2145 | svm->vmcb->control.lbr_ctl = nested_vmcb->control.lbr_ctl; | ||
| 1854 | svm->vmcb->control.int_vector = nested_vmcb->control.int_vector; | 2146 | svm->vmcb->control.int_vector = nested_vmcb->control.int_vector; |
| 1855 | svm->vmcb->control.int_state = nested_vmcb->control.int_state; | 2147 | svm->vmcb->control.int_state = nested_vmcb->control.int_state; |
| 1856 | svm->vmcb->control.tsc_offset += nested_vmcb->control.tsc_offset; | 2148 | svm->vmcb->control.tsc_offset += nested_vmcb->control.tsc_offset; |
| 1857 | svm->vmcb->control.event_inj = nested_vmcb->control.event_inj; | 2149 | svm->vmcb->control.event_inj = nested_vmcb->control.event_inj; |
| 1858 | svm->vmcb->control.event_inj_err = nested_vmcb->control.event_inj_err; | 2150 | svm->vmcb->control.event_inj_err = nested_vmcb->control.event_inj_err; |
| 1859 | 2151 | ||
| 1860 | nested_svm_unmap(nested_vmcb, KM_USER0); | 2152 | nested_svm_unmap(page); |
| 2153 | |||
| 2154 | /* nested_vmcb is our indicator if nested SVM is activated */ | ||
| 2155 | svm->nested.vmcb = vmcb_gpa; | ||
| 1861 | 2156 | ||
| 1862 | enable_gif(svm); | 2157 | enable_gif(svm); |
| 1863 | 2158 | ||
| @@ -1883,6 +2178,7 @@ static void nested_svm_vmloadsave(struct vmcb *from_vmcb, struct vmcb *to_vmcb) | |||
| 1883 | static int vmload_interception(struct vcpu_svm *svm) | 2178 | static int vmload_interception(struct vcpu_svm *svm) |
| 1884 | { | 2179 | { |
| 1885 | struct vmcb *nested_vmcb; | 2180 | struct vmcb *nested_vmcb; |
| 2181 | struct page *page; | ||
| 1886 | 2182 | ||
| 1887 | if (nested_svm_check_permissions(svm)) | 2183 | if (nested_svm_check_permissions(svm)) |
| 1888 | return 1; | 2184 | return 1; |
| @@ -1890,12 +2186,12 @@ static int vmload_interception(struct vcpu_svm *svm) | |||
| 1890 | svm->next_rip = kvm_rip_read(&svm->vcpu) + 3; | 2186 | svm->next_rip = kvm_rip_read(&svm->vcpu) + 3; |
| 1891 | skip_emulated_instruction(&svm->vcpu); | 2187 | skip_emulated_instruction(&svm->vcpu); |
| 1892 | 2188 | ||
| 1893 | nested_vmcb = nested_svm_map(svm, svm->vmcb->save.rax, KM_USER0); | 2189 | nested_vmcb = nested_svm_map(svm, svm->vmcb->save.rax, &page); |
| 1894 | if (!nested_vmcb) | 2190 | if (!nested_vmcb) |
| 1895 | return 1; | 2191 | return 1; |
| 1896 | 2192 | ||
| 1897 | nested_svm_vmloadsave(nested_vmcb, svm->vmcb); | 2193 | nested_svm_vmloadsave(nested_vmcb, svm->vmcb); |
| 1898 | nested_svm_unmap(nested_vmcb, KM_USER0); | 2194 | nested_svm_unmap(page); |
| 1899 | 2195 | ||
| 1900 | return 1; | 2196 | return 1; |
| 1901 | } | 2197 | } |
| @@ -1903,6 +2199,7 @@ static int vmload_interception(struct vcpu_svm *svm) | |||
| 1903 | static int vmsave_interception(struct vcpu_svm *svm) | 2199 | static int vmsave_interception(struct vcpu_svm *svm) |
| 1904 | { | 2200 | { |
| 1905 | struct vmcb *nested_vmcb; | 2201 | struct vmcb *nested_vmcb; |
| 2202 | struct page *page; | ||
| 1906 | 2203 | ||
| 1907 | if (nested_svm_check_permissions(svm)) | 2204 | if (nested_svm_check_permissions(svm)) |
| 1908 | return 1; | 2205 | return 1; |
| @@ -1910,12 +2207,12 @@ static int vmsave_interception(struct vcpu_svm *svm) | |||
| 1910 | svm->next_rip = kvm_rip_read(&svm->vcpu) + 3; | 2207 | svm->next_rip = kvm_rip_read(&svm->vcpu) + 3; |
| 1911 | skip_emulated_instruction(&svm->vcpu); | 2208 | skip_emulated_instruction(&svm->vcpu); |
| 1912 | 2209 | ||
| 1913 | nested_vmcb = nested_svm_map(svm, svm->vmcb->save.rax, KM_USER0); | 2210 | nested_vmcb = nested_svm_map(svm, svm->vmcb->save.rax, &page); |
| 1914 | if (!nested_vmcb) | 2211 | if (!nested_vmcb) |
| 1915 | return 1; | 2212 | return 1; |
| 1916 | 2213 | ||
| 1917 | nested_svm_vmloadsave(svm->vmcb, nested_vmcb); | 2214 | nested_svm_vmloadsave(svm->vmcb, nested_vmcb); |
| 1918 | nested_svm_unmap(nested_vmcb, KM_USER0); | 2215 | nested_svm_unmap(page); |
| 1919 | 2216 | ||
| 1920 | return 1; | 2217 | return 1; |
| 1921 | } | 2218 | } |
| @@ -2018,6 +2315,8 @@ static int task_switch_interception(struct vcpu_svm *svm) | |||
| 2018 | svm->vmcb->control.exit_int_info & SVM_EXITINTINFO_TYPE_MASK; | 2315 | svm->vmcb->control.exit_int_info & SVM_EXITINTINFO_TYPE_MASK; |
| 2019 | uint32_t idt_v = | 2316 | uint32_t idt_v = |
| 2020 | svm->vmcb->control.exit_int_info & SVM_EXITINTINFO_VALID; | 2317 | svm->vmcb->control.exit_int_info & SVM_EXITINTINFO_VALID; |
| 2318 | bool has_error_code = false; | ||
| 2319 | u32 error_code = 0; | ||
| 2021 | 2320 | ||
| 2022 | tss_selector = (u16)svm->vmcb->control.exit_info_1; | 2321 | tss_selector = (u16)svm->vmcb->control.exit_info_1; |
| 2023 | 2322 | ||
| @@ -2038,6 +2337,12 @@ static int task_switch_interception(struct vcpu_svm *svm) | |||
| 2038 | svm->vcpu.arch.nmi_injected = false; | 2337 | svm->vcpu.arch.nmi_injected = false; |
| 2039 | break; | 2338 | break; |
| 2040 | case SVM_EXITINTINFO_TYPE_EXEPT: | 2339 | case SVM_EXITINTINFO_TYPE_EXEPT: |
| 2340 | if (svm->vmcb->control.exit_info_2 & | ||
| 2341 | (1ULL << SVM_EXITINFOSHIFT_TS_HAS_ERROR_CODE)) { | ||
| 2342 | has_error_code = true; | ||
| 2343 | error_code = | ||
| 2344 | (u32)svm->vmcb->control.exit_info_2; | ||
| 2345 | } | ||
| 2041 | kvm_clear_exception_queue(&svm->vcpu); | 2346 | kvm_clear_exception_queue(&svm->vcpu); |
| 2042 | break; | 2347 | break; |
| 2043 | case SVM_EXITINTINFO_TYPE_INTR: | 2348 | case SVM_EXITINTINFO_TYPE_INTR: |
| @@ -2054,7 +2359,14 @@ static int task_switch_interception(struct vcpu_svm *svm) | |||
| 2054 | (int_vec == OF_VECTOR || int_vec == BP_VECTOR))) | 2359 | (int_vec == OF_VECTOR || int_vec == BP_VECTOR))) |
| 2055 | skip_emulated_instruction(&svm->vcpu); | 2360 | skip_emulated_instruction(&svm->vcpu); |
| 2056 | 2361 | ||
| 2057 | return kvm_task_switch(&svm->vcpu, tss_selector, reason); | 2362 | if (kvm_task_switch(&svm->vcpu, tss_selector, reason, |
| 2363 | has_error_code, error_code) == EMULATE_FAIL) { | ||
| 2364 | svm->vcpu.run->exit_reason = KVM_EXIT_INTERNAL_ERROR; | ||
| 2365 | svm->vcpu.run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION; | ||
| 2366 | svm->vcpu.run->internal.ndata = 0; | ||
| 2367 | return 0; | ||
| 2368 | } | ||
| 2369 | return 1; | ||
| 2058 | } | 2370 | } |
| 2059 | 2371 | ||
| 2060 | static int cpuid_interception(struct vcpu_svm *svm) | 2372 | static int cpuid_interception(struct vcpu_svm *svm) |
| @@ -2145,9 +2457,11 @@ static int svm_get_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 *data) | |||
| 2145 | case MSR_IA32_SYSENTER_ESP: | 2457 | case MSR_IA32_SYSENTER_ESP: |
| 2146 | *data = svm->sysenter_esp; | 2458 | *data = svm->sysenter_esp; |
| 2147 | break; | 2459 | break; |
| 2148 | /* Nobody will change the following 5 values in the VMCB so | 2460 | /* |
| 2149 | we can safely return them on rdmsr. They will always be 0 | 2461 | * Nobody will change the following 5 values in the VMCB so we can |
| 2150 | until LBRV is implemented. */ | 2462 | * safely return them on rdmsr. They will always be 0 until LBRV is |
| 2463 | * implemented. | ||
| 2464 | */ | ||
| 2151 | case MSR_IA32_DEBUGCTLMSR: | 2465 | case MSR_IA32_DEBUGCTLMSR: |
| 2152 | *data = svm->vmcb->save.dbgctl; | 2466 | *data = svm->vmcb->save.dbgctl; |
| 2153 | break; | 2467 | break; |
| @@ -2167,7 +2481,7 @@ static int svm_get_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 *data) | |||
| 2167 | *data = svm->nested.hsave_msr; | 2481 | *data = svm->nested.hsave_msr; |
| 2168 | break; | 2482 | break; |
| 2169 | case MSR_VM_CR: | 2483 | case MSR_VM_CR: |
| 2170 | *data = 0; | 2484 | *data = svm->nested.vm_cr_msr; |
| 2171 | break; | 2485 | break; |
| 2172 | case MSR_IA32_UCODE_REV: | 2486 | case MSR_IA32_UCODE_REV: |
| 2173 | *data = 0x01000065; | 2487 | *data = 0x01000065; |
| @@ -2197,6 +2511,31 @@ static int rdmsr_interception(struct vcpu_svm *svm) | |||
| 2197 | return 1; | 2511 | return 1; |
| 2198 | } | 2512 | } |
| 2199 | 2513 | ||
| 2514 | static int svm_set_vm_cr(struct kvm_vcpu *vcpu, u64 data) | ||
| 2515 | { | ||
| 2516 | struct vcpu_svm *svm = to_svm(vcpu); | ||
| 2517 | int svm_dis, chg_mask; | ||
| 2518 | |||
| 2519 | if (data & ~SVM_VM_CR_VALID_MASK) | ||
| 2520 | return 1; | ||
| 2521 | |||
| 2522 | chg_mask = SVM_VM_CR_VALID_MASK; | ||
| 2523 | |||
| 2524 | if (svm->nested.vm_cr_msr & SVM_VM_CR_SVM_DIS_MASK) | ||
| 2525 | chg_mask &= ~(SVM_VM_CR_SVM_LOCK_MASK | SVM_VM_CR_SVM_DIS_MASK); | ||
| 2526 | |||
| 2527 | svm->nested.vm_cr_msr &= ~chg_mask; | ||
| 2528 | svm->nested.vm_cr_msr |= (data & chg_mask); | ||
| 2529 | |||
| 2530 | svm_dis = svm->nested.vm_cr_msr & SVM_VM_CR_SVM_DIS_MASK; | ||
| 2531 | |||
| 2532 | /* check for svm_disable while efer.svme is set */ | ||
| 2533 | if (svm_dis && (vcpu->arch.efer & EFER_SVME)) | ||
| 2534 | return 1; | ||
| 2535 | |||
| 2536 | return 0; | ||
| 2537 | } | ||
| 2538 | |||
| 2200 | static int svm_set_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 data) | 2539 | static int svm_set_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 data) |
| 2201 | { | 2540 | { |
| 2202 | struct vcpu_svm *svm = to_svm(vcpu); | 2541 | struct vcpu_svm *svm = to_svm(vcpu); |
| @@ -2263,6 +2602,7 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 data) | |||
| 2263 | svm->nested.hsave_msr = data; | 2602 | svm->nested.hsave_msr = data; |
| 2264 | break; | 2603 | break; |
| 2265 | case MSR_VM_CR: | 2604 | case MSR_VM_CR: |
| 2605 | return svm_set_vm_cr(vcpu, data); | ||
| 2266 | case MSR_VM_IGNNE: | 2606 | case MSR_VM_IGNNE: |
| 2267 | pr_unimpl(vcpu, "unimplemented wrmsr: 0x%x data 0x%llx\n", ecx, data); | 2607 | pr_unimpl(vcpu, "unimplemented wrmsr: 0x%x data 0x%llx\n", ecx, data); |
| 2268 | break; | 2608 | break; |
| @@ -2326,16 +2666,16 @@ static int pause_interception(struct vcpu_svm *svm) | |||
| 2326 | } | 2666 | } |
| 2327 | 2667 | ||
| 2328 | static int (*svm_exit_handlers[])(struct vcpu_svm *svm) = { | 2668 | static int (*svm_exit_handlers[])(struct vcpu_svm *svm) = { |
| 2329 | [SVM_EXIT_READ_CR0] = emulate_on_interception, | 2669 | [SVM_EXIT_READ_CR0] = emulate_on_interception, |
| 2330 | [SVM_EXIT_READ_CR3] = emulate_on_interception, | 2670 | [SVM_EXIT_READ_CR3] = emulate_on_interception, |
| 2331 | [SVM_EXIT_READ_CR4] = emulate_on_interception, | 2671 | [SVM_EXIT_READ_CR4] = emulate_on_interception, |
| 2332 | [SVM_EXIT_READ_CR8] = emulate_on_interception, | 2672 | [SVM_EXIT_READ_CR8] = emulate_on_interception, |
| 2333 | [SVM_EXIT_CR0_SEL_WRITE] = emulate_on_interception, | 2673 | [SVM_EXIT_CR0_SEL_WRITE] = emulate_on_interception, |
| 2334 | [SVM_EXIT_WRITE_CR0] = emulate_on_interception, | 2674 | [SVM_EXIT_WRITE_CR0] = emulate_on_interception, |
| 2335 | [SVM_EXIT_WRITE_CR3] = emulate_on_interception, | 2675 | [SVM_EXIT_WRITE_CR3] = emulate_on_interception, |
| 2336 | [SVM_EXIT_WRITE_CR4] = emulate_on_interception, | 2676 | [SVM_EXIT_WRITE_CR4] = emulate_on_interception, |
| 2337 | [SVM_EXIT_WRITE_CR8] = cr8_write_interception, | 2677 | [SVM_EXIT_WRITE_CR8] = cr8_write_interception, |
| 2338 | [SVM_EXIT_READ_DR0] = emulate_on_interception, | 2678 | [SVM_EXIT_READ_DR0] = emulate_on_interception, |
| 2339 | [SVM_EXIT_READ_DR1] = emulate_on_interception, | 2679 | [SVM_EXIT_READ_DR1] = emulate_on_interception, |
| 2340 | [SVM_EXIT_READ_DR2] = emulate_on_interception, | 2680 | [SVM_EXIT_READ_DR2] = emulate_on_interception, |
| 2341 | [SVM_EXIT_READ_DR3] = emulate_on_interception, | 2681 | [SVM_EXIT_READ_DR3] = emulate_on_interception, |
| @@ -2354,15 +2694,14 @@ static int (*svm_exit_handlers[])(struct vcpu_svm *svm) = { | |||
| 2354 | [SVM_EXIT_EXCP_BASE + DB_VECTOR] = db_interception, | 2694 | [SVM_EXIT_EXCP_BASE + DB_VECTOR] = db_interception, |
| 2355 | [SVM_EXIT_EXCP_BASE + BP_VECTOR] = bp_interception, | 2695 | [SVM_EXIT_EXCP_BASE + BP_VECTOR] = bp_interception, |
| 2356 | [SVM_EXIT_EXCP_BASE + UD_VECTOR] = ud_interception, | 2696 | [SVM_EXIT_EXCP_BASE + UD_VECTOR] = ud_interception, |
| 2357 | [SVM_EXIT_EXCP_BASE + PF_VECTOR] = pf_interception, | 2697 | [SVM_EXIT_EXCP_BASE + PF_VECTOR] = pf_interception, |
| 2358 | [SVM_EXIT_EXCP_BASE + NM_VECTOR] = nm_interception, | 2698 | [SVM_EXIT_EXCP_BASE + NM_VECTOR] = nm_interception, |
| 2359 | [SVM_EXIT_EXCP_BASE + MC_VECTOR] = mc_interception, | 2699 | [SVM_EXIT_EXCP_BASE + MC_VECTOR] = mc_interception, |
| 2360 | [SVM_EXIT_INTR] = intr_interception, | 2700 | [SVM_EXIT_INTR] = intr_interception, |
| 2361 | [SVM_EXIT_NMI] = nmi_interception, | 2701 | [SVM_EXIT_NMI] = nmi_interception, |
| 2362 | [SVM_EXIT_SMI] = nop_on_interception, | 2702 | [SVM_EXIT_SMI] = nop_on_interception, |
| 2363 | [SVM_EXIT_INIT] = nop_on_interception, | 2703 | [SVM_EXIT_INIT] = nop_on_interception, |
| 2364 | [SVM_EXIT_VINTR] = interrupt_window_interception, | 2704 | [SVM_EXIT_VINTR] = interrupt_window_interception, |
| 2365 | /* [SVM_EXIT_CR0_SEL_WRITE] = emulate_on_interception, */ | ||
| 2366 | [SVM_EXIT_CPUID] = cpuid_interception, | 2705 | [SVM_EXIT_CPUID] = cpuid_interception, |
| 2367 | [SVM_EXIT_IRET] = iret_interception, | 2706 | [SVM_EXIT_IRET] = iret_interception, |
| 2368 | [SVM_EXIT_INVD] = emulate_on_interception, | 2707 | [SVM_EXIT_INVD] = emulate_on_interception, |
| @@ -2370,7 +2709,7 @@ static int (*svm_exit_handlers[])(struct vcpu_svm *svm) = { | |||
| 2370 | [SVM_EXIT_HLT] = halt_interception, | 2709 | [SVM_EXIT_HLT] = halt_interception, |
| 2371 | [SVM_EXIT_INVLPG] = invlpg_interception, | 2710 | [SVM_EXIT_INVLPG] = invlpg_interception, |
| 2372 | [SVM_EXIT_INVLPGA] = invlpga_interception, | 2711 | [SVM_EXIT_INVLPGA] = invlpga_interception, |
| 2373 | [SVM_EXIT_IOIO] = io_interception, | 2712 | [SVM_EXIT_IOIO] = io_interception, |
| 2374 | [SVM_EXIT_MSR] = msr_interception, | 2713 | [SVM_EXIT_MSR] = msr_interception, |
| 2375 | [SVM_EXIT_TASK_SWITCH] = task_switch_interception, | 2714 | [SVM_EXIT_TASK_SWITCH] = task_switch_interception, |
| 2376 | [SVM_EXIT_SHUTDOWN] = shutdown_interception, | 2715 | [SVM_EXIT_SHUTDOWN] = shutdown_interception, |
| @@ -2393,7 +2732,12 @@ static int handle_exit(struct kvm_vcpu *vcpu) | |||
| 2393 | struct kvm_run *kvm_run = vcpu->run; | 2732 | struct kvm_run *kvm_run = vcpu->run; |
| 2394 | u32 exit_code = svm->vmcb->control.exit_code; | 2733 | u32 exit_code = svm->vmcb->control.exit_code; |
| 2395 | 2734 | ||
| 2396 | trace_kvm_exit(exit_code, svm->vmcb->save.rip); | 2735 | trace_kvm_exit(exit_code, vcpu); |
| 2736 | |||
| 2737 | if (!(svm->vmcb->control.intercept_cr_write & INTERCEPT_CR0_MASK)) | ||
| 2738 | vcpu->arch.cr0 = svm->vmcb->save.cr0; | ||
| 2739 | if (npt_enabled) | ||
| 2740 | vcpu->arch.cr3 = svm->vmcb->save.cr3; | ||
| 2397 | 2741 | ||
| 2398 | if (unlikely(svm->nested.exit_required)) { | 2742 | if (unlikely(svm->nested.exit_required)) { |
| 2399 | nested_svm_vmexit(svm); | 2743 | nested_svm_vmexit(svm); |
| @@ -2422,11 +2766,6 @@ static int handle_exit(struct kvm_vcpu *vcpu) | |||
| 2422 | 2766 | ||
| 2423 | svm_complete_interrupts(svm); | 2767 | svm_complete_interrupts(svm); |
| 2424 | 2768 | ||
| 2425 | if (!(svm->vmcb->control.intercept_cr_write & INTERCEPT_CR0_MASK)) | ||
| 2426 | vcpu->arch.cr0 = svm->vmcb->save.cr0; | ||
| 2427 | if (npt_enabled) | ||
| 2428 | vcpu->arch.cr3 = svm->vmcb->save.cr3; | ||
| 2429 | |||
| 2430 | if (svm->vmcb->control.exit_code == SVM_EXIT_ERR) { | 2769 | if (svm->vmcb->control.exit_code == SVM_EXIT_ERR) { |
| 2431 | kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY; | 2770 | kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY; |
| 2432 | kvm_run->fail_entry.hardware_entry_failure_reason | 2771 | kvm_run->fail_entry.hardware_entry_failure_reason |
| @@ -2511,6 +2850,9 @@ static void update_cr8_intercept(struct kvm_vcpu *vcpu, int tpr, int irr) | |||
| 2511 | { | 2850 | { |
| 2512 | struct vcpu_svm *svm = to_svm(vcpu); | 2851 | struct vcpu_svm *svm = to_svm(vcpu); |
| 2513 | 2852 | ||
| 2853 | if (is_nested(svm) && (vcpu->arch.hflags & HF_VINTR_MASK)) | ||
| 2854 | return; | ||
| 2855 | |||
| 2514 | if (irr == -1) | 2856 | if (irr == -1) |
| 2515 | return; | 2857 | return; |
| 2516 | 2858 | ||
| @@ -2522,8 +2864,12 @@ static int svm_nmi_allowed(struct kvm_vcpu *vcpu) | |||
| 2522 | { | 2864 | { |
| 2523 | struct vcpu_svm *svm = to_svm(vcpu); | 2865 | struct vcpu_svm *svm = to_svm(vcpu); |
| 2524 | struct vmcb *vmcb = svm->vmcb; | 2866 | struct vmcb *vmcb = svm->vmcb; |
| 2525 | return !(vmcb->control.int_state & SVM_INTERRUPT_SHADOW_MASK) && | 2867 | int ret; |
| 2526 | !(svm->vcpu.arch.hflags & HF_NMI_MASK); | 2868 | ret = !(vmcb->control.int_state & SVM_INTERRUPT_SHADOW_MASK) && |
| 2869 | !(svm->vcpu.arch.hflags & HF_NMI_MASK); | ||
| 2870 | ret = ret && gif_set(svm) && nested_svm_nmi(svm); | ||
| 2871 | |||
| 2872 | return ret; | ||
| 2527 | } | 2873 | } |
| 2528 | 2874 | ||
| 2529 | static bool svm_get_nmi_mask(struct kvm_vcpu *vcpu) | 2875 | static bool svm_get_nmi_mask(struct kvm_vcpu *vcpu) |
| @@ -2568,13 +2914,13 @@ static void enable_irq_window(struct kvm_vcpu *vcpu) | |||
| 2568 | { | 2914 | { |
| 2569 | struct vcpu_svm *svm = to_svm(vcpu); | 2915 | struct vcpu_svm *svm = to_svm(vcpu); |
| 2570 | 2916 | ||
| 2571 | nested_svm_intr(svm); | 2917 | /* |
| 2572 | 2918 | * In case GIF=0 we can't rely on the CPU to tell us when GIF becomes | |
| 2573 | /* In case GIF=0 we can't rely on the CPU to tell us when | 2919 | * 1, because that's a separate STGI/VMRUN intercept. The next time we |
| 2574 | * GIF becomes 1, because that's a separate STGI/VMRUN intercept. | 2920 | * get that intercept, this function will be called again though and |
| 2575 | * The next time we get that intercept, this function will be | 2921 | * we'll get the vintr intercept. |
| 2576 | * called again though and we'll get the vintr intercept. */ | 2922 | */ |
| 2577 | if (gif_set(svm)) { | 2923 | if (gif_set(svm) && nested_svm_intr(svm)) { |
| 2578 | svm_set_vintr(svm); | 2924 | svm_set_vintr(svm); |
| 2579 | svm_inject_irq(svm, 0x0); | 2925 | svm_inject_irq(svm, 0x0); |
| 2580 | } | 2926 | } |
| @@ -2588,9 +2934,10 @@ static void enable_nmi_window(struct kvm_vcpu *vcpu) | |||
| 2588 | == HF_NMI_MASK) | 2934 | == HF_NMI_MASK) |
| 2589 | return; /* IRET will cause a vm exit */ | 2935 | return; /* IRET will cause a vm exit */ |
| 2590 | 2936 | ||
| 2591 | /* Something prevents NMI from been injected. Single step over | 2937 | /* |
| 2592 | possible problem (IRET or exception injection or interrupt | 2938 | * Something prevents NMI from been injected. Single step over possible |
| 2593 | shadow) */ | 2939 | * problem (IRET or exception injection or interrupt shadow) |
| 2940 | */ | ||
| 2594 | svm->nmi_singlestep = true; | 2941 | svm->nmi_singlestep = true; |
| 2595 | svm->vmcb->save.rflags |= (X86_EFLAGS_TF | X86_EFLAGS_RF); | 2942 | svm->vmcb->save.rflags |= (X86_EFLAGS_TF | X86_EFLAGS_RF); |
| 2596 | update_db_intercept(vcpu); | 2943 | update_db_intercept(vcpu); |
| @@ -2614,6 +2961,9 @@ static inline void sync_cr8_to_lapic(struct kvm_vcpu *vcpu) | |||
| 2614 | { | 2961 | { |
| 2615 | struct vcpu_svm *svm = to_svm(vcpu); | 2962 | struct vcpu_svm *svm = to_svm(vcpu); |
| 2616 | 2963 | ||
| 2964 | if (is_nested(svm) && (vcpu->arch.hflags & HF_VINTR_MASK)) | ||
| 2965 | return; | ||
| 2966 | |||
| 2617 | if (!(svm->vmcb->control.intercept_cr_write & INTERCEPT_CR8_MASK)) { | 2967 | if (!(svm->vmcb->control.intercept_cr_write & INTERCEPT_CR8_MASK)) { |
| 2618 | int cr8 = svm->vmcb->control.int_ctl & V_TPR_MASK; | 2968 | int cr8 = svm->vmcb->control.int_ctl & V_TPR_MASK; |
| 2619 | kvm_set_cr8(vcpu, cr8); | 2969 | kvm_set_cr8(vcpu, cr8); |
| @@ -2625,6 +2975,9 @@ static inline void sync_lapic_to_cr8(struct kvm_vcpu *vcpu) | |||
| 2625 | struct vcpu_svm *svm = to_svm(vcpu); | 2975 | struct vcpu_svm *svm = to_svm(vcpu); |
| 2626 | u64 cr8; | 2976 | u64 cr8; |
| 2627 | 2977 | ||
| 2978 | if (is_nested(svm) && (vcpu->arch.hflags & HF_VINTR_MASK)) | ||
| 2979 | return; | ||
| 2980 | |||
| 2628 | cr8 = kvm_get_cr8(vcpu); | 2981 | cr8 = kvm_get_cr8(vcpu); |
| 2629 | svm->vmcb->control.int_ctl &= ~V_TPR_MASK; | 2982 | svm->vmcb->control.int_ctl &= ~V_TPR_MASK; |
| 2630 | svm->vmcb->control.int_ctl |= cr8 & V_TPR_MASK; | 2983 | svm->vmcb->control.int_ctl |= cr8 & V_TPR_MASK; |
| @@ -2635,6 +2988,9 @@ static void svm_complete_interrupts(struct vcpu_svm *svm) | |||
| 2635 | u8 vector; | 2988 | u8 vector; |
| 2636 | int type; | 2989 | int type; |
| 2637 | u32 exitintinfo = svm->vmcb->control.exit_int_info; | 2990 | u32 exitintinfo = svm->vmcb->control.exit_int_info; |
| 2991 | unsigned int3_injected = svm->int3_injected; | ||
| 2992 | |||
| 2993 | svm->int3_injected = 0; | ||
| 2638 | 2994 | ||
| 2639 | if (svm->vcpu.arch.hflags & HF_IRET_MASK) | 2995 | if (svm->vcpu.arch.hflags & HF_IRET_MASK) |
| 2640 | svm->vcpu.arch.hflags &= ~(HF_NMI_MASK | HF_IRET_MASK); | 2996 | svm->vcpu.arch.hflags &= ~(HF_NMI_MASK | HF_IRET_MASK); |
| @@ -2654,18 +3010,25 @@ static void svm_complete_interrupts(struct vcpu_svm *svm) | |||
| 2654 | svm->vcpu.arch.nmi_injected = true; | 3010 | svm->vcpu.arch.nmi_injected = true; |
| 2655 | break; | 3011 | break; |
| 2656 | case SVM_EXITINTINFO_TYPE_EXEPT: | 3012 | case SVM_EXITINTINFO_TYPE_EXEPT: |
| 2657 | /* In case of software exception do not reinject an exception | 3013 | /* |
| 2658 | vector, but re-execute and instruction instead */ | 3014 | * In case of software exceptions, do not reinject the vector, |
| 2659 | if (is_nested(svm)) | 3015 | * but re-execute the instruction instead. Rewind RIP first |
| 2660 | break; | 3016 | * if we emulated INT3 before. |
| 2661 | if (kvm_exception_is_soft(vector)) | 3017 | */ |
| 3018 | if (kvm_exception_is_soft(vector)) { | ||
| 3019 | if (vector == BP_VECTOR && int3_injected && | ||
| 3020 | kvm_is_linear_rip(&svm->vcpu, svm->int3_rip)) | ||
| 3021 | kvm_rip_write(&svm->vcpu, | ||
| 3022 | kvm_rip_read(&svm->vcpu) - | ||
| 3023 | int3_injected); | ||
| 2662 | break; | 3024 | break; |
| 3025 | } | ||
| 2663 | if (exitintinfo & SVM_EXITINTINFO_VALID_ERR) { | 3026 | if (exitintinfo & SVM_EXITINTINFO_VALID_ERR) { |
| 2664 | u32 err = svm->vmcb->control.exit_int_info_err; | 3027 | u32 err = svm->vmcb->control.exit_int_info_err; |
| 2665 | kvm_queue_exception_e(&svm->vcpu, vector, err); | 3028 | kvm_requeue_exception_e(&svm->vcpu, vector, err); |
| 2666 | 3029 | ||
| 2667 | } else | 3030 | } else |
| 2668 | kvm_queue_exception(&svm->vcpu, vector); | 3031 | kvm_requeue_exception(&svm->vcpu, vector); |
| 2669 | break; | 3032 | break; |
| 2670 | case SVM_EXITINTINFO_TYPE_INTR: | 3033 | case SVM_EXITINTINFO_TYPE_INTR: |
| 2671 | kvm_queue_interrupt(&svm->vcpu, vector, false); | 3034 | kvm_queue_interrupt(&svm->vcpu, vector, false); |
| @@ -2688,6 +3051,10 @@ static void svm_vcpu_run(struct kvm_vcpu *vcpu) | |||
| 2688 | u16 gs_selector; | 3051 | u16 gs_selector; |
| 2689 | u16 ldt_selector; | 3052 | u16 ldt_selector; |
| 2690 | 3053 | ||
| 3054 | svm->vmcb->save.rax = vcpu->arch.regs[VCPU_REGS_RAX]; | ||
| 3055 | svm->vmcb->save.rsp = vcpu->arch.regs[VCPU_REGS_RSP]; | ||
| 3056 | svm->vmcb->save.rip = vcpu->arch.regs[VCPU_REGS_RIP]; | ||
| 3057 | |||
| 2691 | /* | 3058 | /* |
| 2692 | * A vmexit emulation is required before the vcpu can be executed | 3059 | * A vmexit emulation is required before the vcpu can be executed |
| 2693 | * again. | 3060 | * again. |
| @@ -2695,10 +3062,6 @@ static void svm_vcpu_run(struct kvm_vcpu *vcpu) | |||
| 2695 | if (unlikely(svm->nested.exit_required)) | 3062 | if (unlikely(svm->nested.exit_required)) |
| 2696 | return; | 3063 | return; |
| 2697 | 3064 | ||
| 2698 | svm->vmcb->save.rax = vcpu->arch.regs[VCPU_REGS_RAX]; | ||
| 2699 | svm->vmcb->save.rsp = vcpu->arch.regs[VCPU_REGS_RSP]; | ||
| 2700 | svm->vmcb->save.rip = vcpu->arch.regs[VCPU_REGS_RIP]; | ||
| 2701 | |||
| 2702 | pre_svm_run(svm); | 3065 | pre_svm_run(svm); |
| 2703 | 3066 | ||
| 2704 | sync_lapic_to_cr8(vcpu); | 3067 | sync_lapic_to_cr8(vcpu); |
| @@ -2811,6 +3174,14 @@ static void svm_vcpu_run(struct kvm_vcpu *vcpu) | |||
| 2811 | vcpu->arch.regs_avail &= ~(1 << VCPU_EXREG_PDPTR); | 3174 | vcpu->arch.regs_avail &= ~(1 << VCPU_EXREG_PDPTR); |
| 2812 | vcpu->arch.regs_dirty &= ~(1 << VCPU_EXREG_PDPTR); | 3175 | vcpu->arch.regs_dirty &= ~(1 << VCPU_EXREG_PDPTR); |
| 2813 | } | 3176 | } |
| 3177 | |||
| 3178 | /* | ||
| 3179 | * We need to handle MC intercepts here before the vcpu has a chance to | ||
| 3180 | * change the physical cpu | ||
| 3181 | */ | ||
| 3182 | if (unlikely(svm->vmcb->control.exit_code == | ||
| 3183 | SVM_EXIT_EXCP_BASE + MC_VECTOR)) | ||
| 3184 | svm_handle_mce(svm); | ||
| 2814 | } | 3185 | } |
| 2815 | 3186 | ||
| 2816 | #undef R | 3187 | #undef R |
| @@ -2879,25 +3250,39 @@ static void svm_cpuid_update(struct kvm_vcpu *vcpu) | |||
| 2879 | { | 3250 | { |
| 2880 | } | 3251 | } |
| 2881 | 3252 | ||
| 3253 | static void svm_set_supported_cpuid(u32 func, struct kvm_cpuid_entry2 *entry) | ||
| 3254 | { | ||
| 3255 | switch (func) { | ||
| 3256 | case 0x8000000A: | ||
| 3257 | entry->eax = 1; /* SVM revision 1 */ | ||
| 3258 | entry->ebx = 8; /* Lets support 8 ASIDs in case we add proper | ||
| 3259 | ASID emulation to nested SVM */ | ||
| 3260 | entry->ecx = 0; /* Reserved */ | ||
| 3261 | entry->edx = 0; /* Do not support any additional features */ | ||
| 3262 | |||
| 3263 | break; | ||
| 3264 | } | ||
| 3265 | } | ||
| 3266 | |||
| 2882 | static const struct trace_print_flags svm_exit_reasons_str[] = { | 3267 | static const struct trace_print_flags svm_exit_reasons_str[] = { |
| 2883 | { SVM_EXIT_READ_CR0, "read_cr0" }, | 3268 | { SVM_EXIT_READ_CR0, "read_cr0" }, |
| 2884 | { SVM_EXIT_READ_CR3, "read_cr3" }, | 3269 | { SVM_EXIT_READ_CR3, "read_cr3" }, |
| 2885 | { SVM_EXIT_READ_CR4, "read_cr4" }, | 3270 | { SVM_EXIT_READ_CR4, "read_cr4" }, |
| 2886 | { SVM_EXIT_READ_CR8, "read_cr8" }, | 3271 | { SVM_EXIT_READ_CR8, "read_cr8" }, |
| 2887 | { SVM_EXIT_WRITE_CR0, "write_cr0" }, | 3272 | { SVM_EXIT_WRITE_CR0, "write_cr0" }, |
| 2888 | { SVM_EXIT_WRITE_CR3, "write_cr3" }, | 3273 | { SVM_EXIT_WRITE_CR3, "write_cr3" }, |
| 2889 | { SVM_EXIT_WRITE_CR4, "write_cr4" }, | 3274 | { SVM_EXIT_WRITE_CR4, "write_cr4" }, |
| 2890 | { SVM_EXIT_WRITE_CR8, "write_cr8" }, | 3275 | { SVM_EXIT_WRITE_CR8, "write_cr8" }, |
| 2891 | { SVM_EXIT_READ_DR0, "read_dr0" }, | 3276 | { SVM_EXIT_READ_DR0, "read_dr0" }, |
| 2892 | { SVM_EXIT_READ_DR1, "read_dr1" }, | 3277 | { SVM_EXIT_READ_DR1, "read_dr1" }, |
| 2893 | { SVM_EXIT_READ_DR2, "read_dr2" }, | 3278 | { SVM_EXIT_READ_DR2, "read_dr2" }, |
| 2894 | { SVM_EXIT_READ_DR3, "read_dr3" }, | 3279 | { SVM_EXIT_READ_DR3, "read_dr3" }, |
| 2895 | { SVM_EXIT_WRITE_DR0, "write_dr0" }, | 3280 | { SVM_EXIT_WRITE_DR0, "write_dr0" }, |
| 2896 | { SVM_EXIT_WRITE_DR1, "write_dr1" }, | 3281 | { SVM_EXIT_WRITE_DR1, "write_dr1" }, |
| 2897 | { SVM_EXIT_WRITE_DR2, "write_dr2" }, | 3282 | { SVM_EXIT_WRITE_DR2, "write_dr2" }, |
| 2898 | { SVM_EXIT_WRITE_DR3, "write_dr3" }, | 3283 | { SVM_EXIT_WRITE_DR3, "write_dr3" }, |
| 2899 | { SVM_EXIT_WRITE_DR5, "write_dr5" }, | 3284 | { SVM_EXIT_WRITE_DR5, "write_dr5" }, |
| 2900 | { SVM_EXIT_WRITE_DR7, "write_dr7" }, | 3285 | { SVM_EXIT_WRITE_DR7, "write_dr7" }, |
| 2901 | { SVM_EXIT_EXCP_BASE + DB_VECTOR, "DB excp" }, | 3286 | { SVM_EXIT_EXCP_BASE + DB_VECTOR, "DB excp" }, |
| 2902 | { SVM_EXIT_EXCP_BASE + BP_VECTOR, "BP excp" }, | 3287 | { SVM_EXIT_EXCP_BASE + BP_VECTOR, "BP excp" }, |
| 2903 | { SVM_EXIT_EXCP_BASE + UD_VECTOR, "UD excp" }, | 3288 | { SVM_EXIT_EXCP_BASE + UD_VECTOR, "UD excp" }, |
| @@ -2946,8 +3331,10 @@ static void svm_fpu_deactivate(struct kvm_vcpu *vcpu) | |||
| 2946 | { | 3331 | { |
| 2947 | struct vcpu_svm *svm = to_svm(vcpu); | 3332 | struct vcpu_svm *svm = to_svm(vcpu); |
| 2948 | 3333 | ||
| 2949 | update_cr0_intercept(svm); | ||
| 2950 | svm->vmcb->control.intercept_exceptions |= 1 << NM_VECTOR; | 3334 | svm->vmcb->control.intercept_exceptions |= 1 << NM_VECTOR; |
| 3335 | if (is_nested(svm)) | ||
| 3336 | svm->nested.hsave->control.intercept_exceptions |= 1 << NM_VECTOR; | ||
| 3337 | update_cr0_intercept(svm); | ||
| 2951 | } | 3338 | } |
| 2952 | 3339 | ||
| 2953 | static struct kvm_x86_ops svm_x86_ops = { | 3340 | static struct kvm_x86_ops svm_x86_ops = { |
| @@ -2986,8 +3373,7 @@ static struct kvm_x86_ops svm_x86_ops = { | |||
| 2986 | .set_idt = svm_set_idt, | 3373 | .set_idt = svm_set_idt, |
| 2987 | .get_gdt = svm_get_gdt, | 3374 | .get_gdt = svm_get_gdt, |
| 2988 | .set_gdt = svm_set_gdt, | 3375 | .set_gdt = svm_set_gdt, |
| 2989 | .get_dr = svm_get_dr, | 3376 | .set_dr7 = svm_set_dr7, |
| 2990 | .set_dr = svm_set_dr, | ||
| 2991 | .cache_reg = svm_cache_reg, | 3377 | .cache_reg = svm_cache_reg, |
| 2992 | .get_rflags = svm_get_rflags, | 3378 | .get_rflags = svm_get_rflags, |
| 2993 | .set_rflags = svm_set_rflags, | 3379 | .set_rflags = svm_set_rflags, |
| @@ -3023,12 +3409,14 @@ static struct kvm_x86_ops svm_x86_ops = { | |||
| 3023 | .cpuid_update = svm_cpuid_update, | 3409 | .cpuid_update = svm_cpuid_update, |
| 3024 | 3410 | ||
| 3025 | .rdtscp_supported = svm_rdtscp_supported, | 3411 | .rdtscp_supported = svm_rdtscp_supported, |
| 3412 | |||
| 3413 | .set_supported_cpuid = svm_set_supported_cpuid, | ||
| 3026 | }; | 3414 | }; |
| 3027 | 3415 | ||
| 3028 | static int __init svm_init(void) | 3416 | static int __init svm_init(void) |
| 3029 | { | 3417 | { |
| 3030 | return kvm_init(&svm_x86_ops, sizeof(struct vcpu_svm), | 3418 | return kvm_init(&svm_x86_ops, sizeof(struct vcpu_svm), |
| 3031 | THIS_MODULE); | 3419 | __alignof__(struct vcpu_svm), THIS_MODULE); |
| 3032 | } | 3420 | } |
| 3033 | 3421 | ||
| 3034 | static void __exit svm_exit(void) | 3422 | static void __exit svm_exit(void) |
diff --git a/arch/x86/kvm/timer.c b/arch/x86/kvm/timer.c index eea40439066c..4ddadb1a5ffe 100644 --- a/arch/x86/kvm/timer.c +++ b/arch/x86/kvm/timer.c | |||
| @@ -12,7 +12,8 @@ static int __kvm_timer_fn(struct kvm_vcpu *vcpu, struct kvm_timer *ktimer) | |||
| 12 | /* | 12 | /* |
| 13 | * There is a race window between reading and incrementing, but we do | 13 | * There is a race window between reading and incrementing, but we do |
| 14 | * not care about potentially loosing timer events in the !reinject | 14 | * not care about potentially loosing timer events in the !reinject |
| 15 | * case anyway. | 15 | * case anyway. Note: KVM_REQ_PENDING_TIMER is implicitly checked |
| 16 | * in vcpu_enter_guest. | ||
| 16 | */ | 17 | */ |
| 17 | if (ktimer->reinject || !atomic_read(&ktimer->pending)) { | 18 | if (ktimer->reinject || !atomic_read(&ktimer->pending)) { |
| 18 | atomic_inc(&ktimer->pending); | 19 | atomic_inc(&ktimer->pending); |
diff --git a/arch/x86/kvm/trace.h b/arch/x86/kvm/trace.h index 6ad30a29f044..a6544b8e7c0f 100644 --- a/arch/x86/kvm/trace.h +++ b/arch/x86/kvm/trace.h | |||
| @@ -5,8 +5,6 @@ | |||
| 5 | 5 | ||
| 6 | #undef TRACE_SYSTEM | 6 | #undef TRACE_SYSTEM |
| 7 | #define TRACE_SYSTEM kvm | 7 | #define TRACE_SYSTEM kvm |
| 8 | #define TRACE_INCLUDE_PATH arch/x86/kvm | ||
| 9 | #define TRACE_INCLUDE_FILE trace | ||
| 10 | 8 | ||
| 11 | /* | 9 | /* |
| 12 | * Tracepoint for guest mode entry. | 10 | * Tracepoint for guest mode entry. |
| @@ -184,8 +182,8 @@ TRACE_EVENT(kvm_apic, | |||
| 184 | * Tracepoint for kvm guest exit: | 182 | * Tracepoint for kvm guest exit: |
| 185 | */ | 183 | */ |
| 186 | TRACE_EVENT(kvm_exit, | 184 | TRACE_EVENT(kvm_exit, |
| 187 | TP_PROTO(unsigned int exit_reason, unsigned long guest_rip), | 185 | TP_PROTO(unsigned int exit_reason, struct kvm_vcpu *vcpu), |
| 188 | TP_ARGS(exit_reason, guest_rip), | 186 | TP_ARGS(exit_reason, vcpu), |
| 189 | 187 | ||
| 190 | TP_STRUCT__entry( | 188 | TP_STRUCT__entry( |
| 191 | __field( unsigned int, exit_reason ) | 189 | __field( unsigned int, exit_reason ) |
| @@ -194,7 +192,7 @@ TRACE_EVENT(kvm_exit, | |||
| 194 | 192 | ||
| 195 | TP_fast_assign( | 193 | TP_fast_assign( |
| 196 | __entry->exit_reason = exit_reason; | 194 | __entry->exit_reason = exit_reason; |
| 197 | __entry->guest_rip = guest_rip; | 195 | __entry->guest_rip = kvm_rip_read(vcpu); |
| 198 | ), | 196 | ), |
| 199 | 197 | ||
| 200 | TP_printk("reason %s rip 0x%lx", | 198 | TP_printk("reason %s rip 0x%lx", |
| @@ -221,6 +219,38 @@ TRACE_EVENT(kvm_inj_virq, | |||
| 221 | TP_printk("irq %u", __entry->irq) | 219 | TP_printk("irq %u", __entry->irq) |
| 222 | ); | 220 | ); |
| 223 | 221 | ||
| 222 | #define EXS(x) { x##_VECTOR, "#" #x } | ||
| 223 | |||
| 224 | #define kvm_trace_sym_exc \ | ||
| 225 | EXS(DE), EXS(DB), EXS(BP), EXS(OF), EXS(BR), EXS(UD), EXS(NM), \ | ||
| 226 | EXS(DF), EXS(TS), EXS(NP), EXS(SS), EXS(GP), EXS(PF), \ | ||
| 227 | EXS(MF), EXS(MC) | ||
| 228 | |||
| 229 | /* | ||
| 230 | * Tracepoint for kvm interrupt injection: | ||
| 231 | */ | ||
| 232 | TRACE_EVENT(kvm_inj_exception, | ||
| 233 | TP_PROTO(unsigned exception, bool has_error, unsigned error_code), | ||
| 234 | TP_ARGS(exception, has_error, error_code), | ||
| 235 | |||
| 236 | TP_STRUCT__entry( | ||
| 237 | __field( u8, exception ) | ||
| 238 | __field( u8, has_error ) | ||
| 239 | __field( u32, error_code ) | ||
| 240 | ), | ||
| 241 | |||
| 242 | TP_fast_assign( | ||
| 243 | __entry->exception = exception; | ||
| 244 | __entry->has_error = has_error; | ||
| 245 | __entry->error_code = error_code; | ||
| 246 | ), | ||
| 247 | |||
| 248 | TP_printk("%s (0x%x)", | ||
| 249 | __print_symbolic(__entry->exception, kvm_trace_sym_exc), | ||
| 250 | /* FIXME: don't print error_code if not present */ | ||
| 251 | __entry->has_error ? __entry->error_code : 0) | ||
| 252 | ); | ||
| 253 | |||
| 224 | /* | 254 | /* |
| 225 | * Tracepoint for page fault. | 255 | * Tracepoint for page fault. |
| 226 | */ | 256 | */ |
| @@ -413,12 +443,34 @@ TRACE_EVENT(kvm_nested_vmrun, | |||
| 413 | ), | 443 | ), |
| 414 | 444 | ||
| 415 | TP_printk("rip: 0x%016llx vmcb: 0x%016llx nrip: 0x%016llx int_ctl: 0x%08x " | 445 | TP_printk("rip: 0x%016llx vmcb: 0x%016llx nrip: 0x%016llx int_ctl: 0x%08x " |
| 416 | "event_inj: 0x%08x npt: %s\n", | 446 | "event_inj: 0x%08x npt: %s", |
| 417 | __entry->rip, __entry->vmcb, __entry->nested_rip, | 447 | __entry->rip, __entry->vmcb, __entry->nested_rip, |
| 418 | __entry->int_ctl, __entry->event_inj, | 448 | __entry->int_ctl, __entry->event_inj, |
| 419 | __entry->npt ? "on" : "off") | 449 | __entry->npt ? "on" : "off") |
| 420 | ); | 450 | ); |
| 421 | 451 | ||
| 452 | TRACE_EVENT(kvm_nested_intercepts, | ||
| 453 | TP_PROTO(__u16 cr_read, __u16 cr_write, __u32 exceptions, __u64 intercept), | ||
| 454 | TP_ARGS(cr_read, cr_write, exceptions, intercept), | ||
| 455 | |||
| 456 | TP_STRUCT__entry( | ||
| 457 | __field( __u16, cr_read ) | ||
| 458 | __field( __u16, cr_write ) | ||
| 459 | __field( __u32, exceptions ) | ||
| 460 | __field( __u64, intercept ) | ||
| 461 | ), | ||
| 462 | |||
| 463 | TP_fast_assign( | ||
| 464 | __entry->cr_read = cr_read; | ||
| 465 | __entry->cr_write = cr_write; | ||
| 466 | __entry->exceptions = exceptions; | ||
| 467 | __entry->intercept = intercept; | ||
| 468 | ), | ||
| 469 | |||
| 470 | TP_printk("cr_read: %04x cr_write: %04x excp: %08x intercept: %016llx", | ||
| 471 | __entry->cr_read, __entry->cr_write, __entry->exceptions, | ||
| 472 | __entry->intercept) | ||
| 473 | ); | ||
| 422 | /* | 474 | /* |
| 423 | * Tracepoint for #VMEXIT while nested | 475 | * Tracepoint for #VMEXIT while nested |
| 424 | */ | 476 | */ |
| @@ -447,7 +499,7 @@ TRACE_EVENT(kvm_nested_vmexit, | |||
| 447 | __entry->exit_int_info_err = exit_int_info_err; | 499 | __entry->exit_int_info_err = exit_int_info_err; |
| 448 | ), | 500 | ), |
| 449 | TP_printk("rip: 0x%016llx reason: %s ext_inf1: 0x%016llx " | 501 | TP_printk("rip: 0x%016llx reason: %s ext_inf1: 0x%016llx " |
| 450 | "ext_inf2: 0x%016llx ext_int: 0x%08x ext_int_err: 0x%08x\n", | 502 | "ext_inf2: 0x%016llx ext_int: 0x%08x ext_int_err: 0x%08x", |
| 451 | __entry->rip, | 503 | __entry->rip, |
| 452 | ftrace_print_symbols_seq(p, __entry->exit_code, | 504 | ftrace_print_symbols_seq(p, __entry->exit_code, |
| 453 | kvm_x86_ops->exit_reasons_str), | 505 | kvm_x86_ops->exit_reasons_str), |
| @@ -482,7 +534,7 @@ TRACE_EVENT(kvm_nested_vmexit_inject, | |||
| 482 | ), | 534 | ), |
| 483 | 535 | ||
| 484 | TP_printk("reason: %s ext_inf1: 0x%016llx " | 536 | TP_printk("reason: %s ext_inf1: 0x%016llx " |
| 485 | "ext_inf2: 0x%016llx ext_int: 0x%08x ext_int_err: 0x%08x\n", | 537 | "ext_inf2: 0x%016llx ext_int: 0x%08x ext_int_err: 0x%08x", |
| 486 | ftrace_print_symbols_seq(p, __entry->exit_code, | 538 | ftrace_print_symbols_seq(p, __entry->exit_code, |
| 487 | kvm_x86_ops->exit_reasons_str), | 539 | kvm_x86_ops->exit_reasons_str), |
| 488 | __entry->exit_info1, __entry->exit_info2, | 540 | __entry->exit_info1, __entry->exit_info2, |
| @@ -504,7 +556,7 @@ TRACE_EVENT(kvm_nested_intr_vmexit, | |||
| 504 | __entry->rip = rip | 556 | __entry->rip = rip |
| 505 | ), | 557 | ), |
| 506 | 558 | ||
| 507 | TP_printk("rip: 0x%016llx\n", __entry->rip) | 559 | TP_printk("rip: 0x%016llx", __entry->rip) |
| 508 | ); | 560 | ); |
| 509 | 561 | ||
| 510 | /* | 562 | /* |
| @@ -526,7 +578,7 @@ TRACE_EVENT(kvm_invlpga, | |||
| 526 | __entry->address = address; | 578 | __entry->address = address; |
| 527 | ), | 579 | ), |
| 528 | 580 | ||
| 529 | TP_printk("rip: 0x%016llx asid: %d address: 0x%016llx\n", | 581 | TP_printk("rip: 0x%016llx asid: %d address: 0x%016llx", |
| 530 | __entry->rip, __entry->asid, __entry->address) | 582 | __entry->rip, __entry->asid, __entry->address) |
| 531 | ); | 583 | ); |
| 532 | 584 | ||
| @@ -547,11 +599,102 @@ TRACE_EVENT(kvm_skinit, | |||
| 547 | __entry->slb = slb; | 599 | __entry->slb = slb; |
| 548 | ), | 600 | ), |
| 549 | 601 | ||
| 550 | TP_printk("rip: 0x%016llx slb: 0x%08x\n", | 602 | TP_printk("rip: 0x%016llx slb: 0x%08x", |
| 551 | __entry->rip, __entry->slb) | 603 | __entry->rip, __entry->slb) |
| 552 | ); | 604 | ); |
| 553 | 605 | ||
| 606 | #define __print_insn(insn, ilen) ({ \ | ||
| 607 | int i; \ | ||
| 608 | const char *ret = p->buffer + p->len; \ | ||
| 609 | \ | ||
| 610 | for (i = 0; i < ilen; ++i) \ | ||
| 611 | trace_seq_printf(p, " %02x", insn[i]); \ | ||
| 612 | trace_seq_printf(p, "%c", 0); \ | ||
| 613 | ret; \ | ||
| 614 | }) | ||
| 615 | |||
| 616 | #define KVM_EMUL_INSN_F_CR0_PE (1 << 0) | ||
| 617 | #define KVM_EMUL_INSN_F_EFL_VM (1 << 1) | ||
| 618 | #define KVM_EMUL_INSN_F_CS_D (1 << 2) | ||
| 619 | #define KVM_EMUL_INSN_F_CS_L (1 << 3) | ||
| 620 | |||
| 621 | #define kvm_trace_symbol_emul_flags \ | ||
| 622 | { 0, "real" }, \ | ||
| 623 | { KVM_EMUL_INSN_F_CR0_PE \ | ||
| 624 | | KVM_EMUL_INSN_F_EFL_VM, "vm16" }, \ | ||
| 625 | { KVM_EMUL_INSN_F_CR0_PE, "prot16" }, \ | ||
| 626 | { KVM_EMUL_INSN_F_CR0_PE \ | ||
| 627 | | KVM_EMUL_INSN_F_CS_D, "prot32" }, \ | ||
| 628 | { KVM_EMUL_INSN_F_CR0_PE \ | ||
| 629 | | KVM_EMUL_INSN_F_CS_L, "prot64" } | ||
| 630 | |||
| 631 | #define kei_decode_mode(mode) ({ \ | ||
| 632 | u8 flags = 0xff; \ | ||
| 633 | switch (mode) { \ | ||
| 634 | case X86EMUL_MODE_REAL: \ | ||
| 635 | flags = 0; \ | ||
| 636 | break; \ | ||
| 637 | case X86EMUL_MODE_VM86: \ | ||
| 638 | flags = KVM_EMUL_INSN_F_EFL_VM; \ | ||
| 639 | break; \ | ||
| 640 | case X86EMUL_MODE_PROT16: \ | ||
| 641 | flags = KVM_EMUL_INSN_F_CR0_PE; \ | ||
| 642 | break; \ | ||
| 643 | case X86EMUL_MODE_PROT32: \ | ||
| 644 | flags = KVM_EMUL_INSN_F_CR0_PE \ | ||
| 645 | | KVM_EMUL_INSN_F_CS_D; \ | ||
| 646 | break; \ | ||
| 647 | case X86EMUL_MODE_PROT64: \ | ||
| 648 | flags = KVM_EMUL_INSN_F_CR0_PE \ | ||
| 649 | | KVM_EMUL_INSN_F_CS_L; \ | ||
| 650 | break; \ | ||
| 651 | } \ | ||
| 652 | flags; \ | ||
| 653 | }) | ||
| 654 | |||
| 655 | TRACE_EVENT(kvm_emulate_insn, | ||
| 656 | TP_PROTO(struct kvm_vcpu *vcpu, __u8 failed), | ||
| 657 | TP_ARGS(vcpu, failed), | ||
| 658 | |||
| 659 | TP_STRUCT__entry( | ||
| 660 | __field( __u64, rip ) | ||
| 661 | __field( __u32, csbase ) | ||
| 662 | __field( __u8, len ) | ||
| 663 | __array( __u8, insn, 15 ) | ||
| 664 | __field( __u8, flags ) | ||
| 665 | __field( __u8, failed ) | ||
| 666 | ), | ||
| 667 | |||
| 668 | TP_fast_assign( | ||
| 669 | __entry->rip = vcpu->arch.emulate_ctxt.decode.fetch.start; | ||
| 670 | __entry->csbase = kvm_x86_ops->get_segment_base(vcpu, VCPU_SREG_CS); | ||
| 671 | __entry->len = vcpu->arch.emulate_ctxt.decode.eip | ||
| 672 | - vcpu->arch.emulate_ctxt.decode.fetch.start; | ||
| 673 | memcpy(__entry->insn, | ||
| 674 | vcpu->arch.emulate_ctxt.decode.fetch.data, | ||
| 675 | 15); | ||
| 676 | __entry->flags = kei_decode_mode(vcpu->arch.emulate_ctxt.mode); | ||
| 677 | __entry->failed = failed; | ||
| 678 | ), | ||
| 679 | |||
| 680 | TP_printk("%x:%llx:%s (%s)%s", | ||
| 681 | __entry->csbase, __entry->rip, | ||
| 682 | __print_insn(__entry->insn, __entry->len), | ||
| 683 | __print_symbolic(__entry->flags, | ||
| 684 | kvm_trace_symbol_emul_flags), | ||
| 685 | __entry->failed ? " failed" : "" | ||
| 686 | ) | ||
| 687 | ); | ||
| 688 | |||
| 689 | #define trace_kvm_emulate_insn_start(vcpu) trace_kvm_emulate_insn(vcpu, 0) | ||
| 690 | #define trace_kvm_emulate_insn_failed(vcpu) trace_kvm_emulate_insn(vcpu, 1) | ||
| 691 | |||
| 554 | #endif /* _TRACE_KVM_H */ | 692 | #endif /* _TRACE_KVM_H */ |
| 555 | 693 | ||
| 694 | #undef TRACE_INCLUDE_PATH | ||
| 695 | #define TRACE_INCLUDE_PATH arch/x86/kvm | ||
| 696 | #undef TRACE_INCLUDE_FILE | ||
| 697 | #define TRACE_INCLUDE_FILE trace | ||
| 698 | |||
| 556 | /* This part must be outside protection */ | 699 | /* This part must be outside protection */ |
| 557 | #include <trace/define_trace.h> | 700 | #include <trace/define_trace.h> |
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c index edca080407a5..859a01a07dbf 100644 --- a/arch/x86/kvm/vmx.c +++ b/arch/x86/kvm/vmx.c | |||
| @@ -27,6 +27,7 @@ | |||
| 27 | #include <linux/moduleparam.h> | 27 | #include <linux/moduleparam.h> |
| 28 | #include <linux/ftrace_event.h> | 28 | #include <linux/ftrace_event.h> |
| 29 | #include <linux/slab.h> | 29 | #include <linux/slab.h> |
| 30 | #include <linux/tboot.h> | ||
| 30 | #include "kvm_cache_regs.h" | 31 | #include "kvm_cache_regs.h" |
| 31 | #include "x86.h" | 32 | #include "x86.h" |
| 32 | 33 | ||
| @@ -98,6 +99,8 @@ module_param(ple_gap, int, S_IRUGO); | |||
| 98 | static int ple_window = KVM_VMX_DEFAULT_PLE_WINDOW; | 99 | static int ple_window = KVM_VMX_DEFAULT_PLE_WINDOW; |
| 99 | module_param(ple_window, int, S_IRUGO); | 100 | module_param(ple_window, int, S_IRUGO); |
| 100 | 101 | ||
| 102 | #define NR_AUTOLOAD_MSRS 1 | ||
| 103 | |||
| 101 | struct vmcs { | 104 | struct vmcs { |
| 102 | u32 revision_id; | 105 | u32 revision_id; |
| 103 | u32 abort; | 106 | u32 abort; |
| @@ -125,6 +128,11 @@ struct vcpu_vmx { | |||
| 125 | u64 msr_guest_kernel_gs_base; | 128 | u64 msr_guest_kernel_gs_base; |
| 126 | #endif | 129 | #endif |
| 127 | struct vmcs *vmcs; | 130 | struct vmcs *vmcs; |
| 131 | struct msr_autoload { | ||
| 132 | unsigned nr; | ||
| 133 | struct vmx_msr_entry guest[NR_AUTOLOAD_MSRS]; | ||
| 134 | struct vmx_msr_entry host[NR_AUTOLOAD_MSRS]; | ||
| 135 | } msr_autoload; | ||
| 128 | struct { | 136 | struct { |
| 129 | int loaded; | 137 | int loaded; |
| 130 | u16 fs_sel, gs_sel, ldt_sel; | 138 | u16 fs_sel, gs_sel, ldt_sel; |
| @@ -234,56 +242,56 @@ static const u32 vmx_msr_index[] = { | |||
| 234 | }; | 242 | }; |
| 235 | #define NR_VMX_MSR ARRAY_SIZE(vmx_msr_index) | 243 | #define NR_VMX_MSR ARRAY_SIZE(vmx_msr_index) |
| 236 | 244 | ||
| 237 | static inline int is_page_fault(u32 intr_info) | 245 | static inline bool is_page_fault(u32 intr_info) |
| 238 | { | 246 | { |
| 239 | return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK | | 247 | return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK | |
| 240 | INTR_INFO_VALID_MASK)) == | 248 | INTR_INFO_VALID_MASK)) == |
| 241 | (INTR_TYPE_HARD_EXCEPTION | PF_VECTOR | INTR_INFO_VALID_MASK); | 249 | (INTR_TYPE_HARD_EXCEPTION | PF_VECTOR | INTR_INFO_VALID_MASK); |
| 242 | } | 250 | } |
| 243 | 251 | ||
| 244 | static inline int is_no_device(u32 intr_info) | 252 | static inline bool is_no_device(u32 intr_info) |
| 245 | { | 253 | { |
| 246 | return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK | | 254 | return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK | |
| 247 | INTR_INFO_VALID_MASK)) == | 255 | INTR_INFO_VALID_MASK)) == |
| 248 | (INTR_TYPE_HARD_EXCEPTION | NM_VECTOR | INTR_INFO_VALID_MASK); | 256 | (INTR_TYPE_HARD_EXCEPTION | NM_VECTOR | INTR_INFO_VALID_MASK); |
| 249 | } | 257 | } |
| 250 | 258 | ||
| 251 | static inline int is_invalid_opcode(u32 intr_info) | 259 | static inline bool is_invalid_opcode(u32 intr_info) |
| 252 | { | 260 | { |
| 253 | return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK | | 261 | return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK | |
| 254 | INTR_INFO_VALID_MASK)) == | 262 | INTR_INFO_VALID_MASK)) == |
| 255 | (INTR_TYPE_HARD_EXCEPTION | UD_VECTOR | INTR_INFO_VALID_MASK); | 263 | (INTR_TYPE_HARD_EXCEPTION | UD_VECTOR | INTR_INFO_VALID_MASK); |
| 256 | } | 264 | } |
| 257 | 265 | ||
| 258 | static inline int is_external_interrupt(u32 intr_info) | 266 | static inline bool is_external_interrupt(u32 intr_info) |
| 259 | { | 267 | { |
| 260 | return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VALID_MASK)) | 268 | return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VALID_MASK)) |
| 261 | == (INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK); | 269 | == (INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK); |
| 262 | } | 270 | } |
| 263 | 271 | ||
| 264 | static inline int is_machine_check(u32 intr_info) | 272 | static inline bool is_machine_check(u32 intr_info) |
| 265 | { | 273 | { |
| 266 | return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK | | 274 | return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK | |
| 267 | INTR_INFO_VALID_MASK)) == | 275 | INTR_INFO_VALID_MASK)) == |
| 268 | (INTR_TYPE_HARD_EXCEPTION | MC_VECTOR | INTR_INFO_VALID_MASK); | 276 | (INTR_TYPE_HARD_EXCEPTION | MC_VECTOR | INTR_INFO_VALID_MASK); |
| 269 | } | 277 | } |
| 270 | 278 | ||
| 271 | static inline int cpu_has_vmx_msr_bitmap(void) | 279 | static inline bool cpu_has_vmx_msr_bitmap(void) |
| 272 | { | 280 | { |
| 273 | return vmcs_config.cpu_based_exec_ctrl & CPU_BASED_USE_MSR_BITMAPS; | 281 | return vmcs_config.cpu_based_exec_ctrl & CPU_BASED_USE_MSR_BITMAPS; |
| 274 | } | 282 | } |
| 275 | 283 | ||
| 276 | static inline int cpu_has_vmx_tpr_shadow(void) | 284 | static inline bool cpu_has_vmx_tpr_shadow(void) |
| 277 | { | 285 | { |
| 278 | return vmcs_config.cpu_based_exec_ctrl & CPU_BASED_TPR_SHADOW; | 286 | return vmcs_config.cpu_based_exec_ctrl & CPU_BASED_TPR_SHADOW; |
| 279 | } | 287 | } |
| 280 | 288 | ||
| 281 | static inline int vm_need_tpr_shadow(struct kvm *kvm) | 289 | static inline bool vm_need_tpr_shadow(struct kvm *kvm) |
| 282 | { | 290 | { |
| 283 | return (cpu_has_vmx_tpr_shadow()) && (irqchip_in_kernel(kvm)); | 291 | return (cpu_has_vmx_tpr_shadow()) && (irqchip_in_kernel(kvm)); |
| 284 | } | 292 | } |
| 285 | 293 | ||
| 286 | static inline int cpu_has_secondary_exec_ctrls(void) | 294 | static inline bool cpu_has_secondary_exec_ctrls(void) |
| 287 | { | 295 | { |
| 288 | return vmcs_config.cpu_based_exec_ctrl & | 296 | return vmcs_config.cpu_based_exec_ctrl & |
| 289 | CPU_BASED_ACTIVATE_SECONDARY_CONTROLS; | 297 | CPU_BASED_ACTIVATE_SECONDARY_CONTROLS; |
| @@ -303,80 +311,80 @@ static inline bool cpu_has_vmx_flexpriority(void) | |||
| 303 | 311 | ||
| 304 | static inline bool cpu_has_vmx_ept_execute_only(void) | 312 | static inline bool cpu_has_vmx_ept_execute_only(void) |
| 305 | { | 313 | { |
| 306 | return !!(vmx_capability.ept & VMX_EPT_EXECUTE_ONLY_BIT); | 314 | return vmx_capability.ept & VMX_EPT_EXECUTE_ONLY_BIT; |
| 307 | } | 315 | } |
| 308 | 316 | ||
| 309 | static inline bool cpu_has_vmx_eptp_uncacheable(void) | 317 | static inline bool cpu_has_vmx_eptp_uncacheable(void) |
| 310 | { | 318 | { |
| 311 | return !!(vmx_capability.ept & VMX_EPTP_UC_BIT); | 319 | return vmx_capability.ept & VMX_EPTP_UC_BIT; |
| 312 | } | 320 | } |
| 313 | 321 | ||
| 314 | static inline bool cpu_has_vmx_eptp_writeback(void) | 322 | static inline bool cpu_has_vmx_eptp_writeback(void) |
| 315 | { | 323 | { |
| 316 | return !!(vmx_capability.ept & VMX_EPTP_WB_BIT); | 324 | return vmx_capability.ept & VMX_EPTP_WB_BIT; |
| 317 | } | 325 | } |
| 318 | 326 | ||
| 319 | static inline bool cpu_has_vmx_ept_2m_page(void) | 327 | static inline bool cpu_has_vmx_ept_2m_page(void) |
| 320 | { | 328 | { |
| 321 | return !!(vmx_capability.ept & VMX_EPT_2MB_PAGE_BIT); | 329 | return vmx_capability.ept & VMX_EPT_2MB_PAGE_BIT; |
| 322 | } | 330 | } |
| 323 | 331 | ||
| 324 | static inline bool cpu_has_vmx_ept_1g_page(void) | 332 | static inline bool cpu_has_vmx_ept_1g_page(void) |
| 325 | { | 333 | { |
| 326 | return !!(vmx_capability.ept & VMX_EPT_1GB_PAGE_BIT); | 334 | return vmx_capability.ept & VMX_EPT_1GB_PAGE_BIT; |
| 327 | } | 335 | } |
| 328 | 336 | ||
| 329 | static inline int cpu_has_vmx_invept_individual_addr(void) | 337 | static inline bool cpu_has_vmx_invept_individual_addr(void) |
| 330 | { | 338 | { |
| 331 | return !!(vmx_capability.ept & VMX_EPT_EXTENT_INDIVIDUAL_BIT); | 339 | return vmx_capability.ept & VMX_EPT_EXTENT_INDIVIDUAL_BIT; |
| 332 | } | 340 | } |
| 333 | 341 | ||
| 334 | static inline int cpu_has_vmx_invept_context(void) | 342 | static inline bool cpu_has_vmx_invept_context(void) |
| 335 | { | 343 | { |
| 336 | return !!(vmx_capability.ept & VMX_EPT_EXTENT_CONTEXT_BIT); | 344 | return vmx_capability.ept & VMX_EPT_EXTENT_CONTEXT_BIT; |
| 337 | } | 345 | } |
| 338 | 346 | ||
| 339 | static inline int cpu_has_vmx_invept_global(void) | 347 | static inline bool cpu_has_vmx_invept_global(void) |
| 340 | { | 348 | { |
| 341 | return !!(vmx_capability.ept & VMX_EPT_EXTENT_GLOBAL_BIT); | 349 | return vmx_capability.ept & VMX_EPT_EXTENT_GLOBAL_BIT; |
| 342 | } | 350 | } |
| 343 | 351 | ||
| 344 | static inline int cpu_has_vmx_ept(void) | 352 | static inline bool cpu_has_vmx_ept(void) |
| 345 | { | 353 | { |
| 346 | return vmcs_config.cpu_based_2nd_exec_ctrl & | 354 | return vmcs_config.cpu_based_2nd_exec_ctrl & |
| 347 | SECONDARY_EXEC_ENABLE_EPT; | 355 | SECONDARY_EXEC_ENABLE_EPT; |
| 348 | } | 356 | } |
| 349 | 357 | ||
| 350 | static inline int cpu_has_vmx_unrestricted_guest(void) | 358 | static inline bool cpu_has_vmx_unrestricted_guest(void) |
| 351 | { | 359 | { |
| 352 | return vmcs_config.cpu_based_2nd_exec_ctrl & | 360 | return vmcs_config.cpu_based_2nd_exec_ctrl & |
| 353 | SECONDARY_EXEC_UNRESTRICTED_GUEST; | 361 | SECONDARY_EXEC_UNRESTRICTED_GUEST; |
| 354 | } | 362 | } |
| 355 | 363 | ||
| 356 | static inline int cpu_has_vmx_ple(void) | 364 | static inline bool cpu_has_vmx_ple(void) |
| 357 | { | 365 | { |
| 358 | return vmcs_config.cpu_based_2nd_exec_ctrl & | 366 | return vmcs_config.cpu_based_2nd_exec_ctrl & |
| 359 | SECONDARY_EXEC_PAUSE_LOOP_EXITING; | 367 | SECONDARY_EXEC_PAUSE_LOOP_EXITING; |
| 360 | } | 368 | } |
| 361 | 369 | ||
| 362 | static inline int vm_need_virtualize_apic_accesses(struct kvm *kvm) | 370 | static inline bool vm_need_virtualize_apic_accesses(struct kvm *kvm) |
| 363 | { | 371 | { |
| 364 | return flexpriority_enabled && irqchip_in_kernel(kvm); | 372 | return flexpriority_enabled && irqchip_in_kernel(kvm); |
| 365 | } | 373 | } |
| 366 | 374 | ||
| 367 | static inline int cpu_has_vmx_vpid(void) | 375 | static inline bool cpu_has_vmx_vpid(void) |
| 368 | { | 376 | { |
| 369 | return vmcs_config.cpu_based_2nd_exec_ctrl & | 377 | return vmcs_config.cpu_based_2nd_exec_ctrl & |
| 370 | SECONDARY_EXEC_ENABLE_VPID; | 378 | SECONDARY_EXEC_ENABLE_VPID; |
| 371 | } | 379 | } |
| 372 | 380 | ||
| 373 | static inline int cpu_has_vmx_rdtscp(void) | 381 | static inline bool cpu_has_vmx_rdtscp(void) |
| 374 | { | 382 | { |
| 375 | return vmcs_config.cpu_based_2nd_exec_ctrl & | 383 | return vmcs_config.cpu_based_2nd_exec_ctrl & |
| 376 | SECONDARY_EXEC_RDTSCP; | 384 | SECONDARY_EXEC_RDTSCP; |
| 377 | } | 385 | } |
| 378 | 386 | ||
| 379 | static inline int cpu_has_virtual_nmis(void) | 387 | static inline bool cpu_has_virtual_nmis(void) |
| 380 | { | 388 | { |
| 381 | return vmcs_config.pin_based_exec_ctrl & PIN_BASED_VIRTUAL_NMIS; | 389 | return vmcs_config.pin_based_exec_ctrl & PIN_BASED_VIRTUAL_NMIS; |
| 382 | } | 390 | } |
| @@ -595,16 +603,56 @@ static void update_exception_bitmap(struct kvm_vcpu *vcpu) | |||
| 595 | vmcs_write32(EXCEPTION_BITMAP, eb); | 603 | vmcs_write32(EXCEPTION_BITMAP, eb); |
| 596 | } | 604 | } |
| 597 | 605 | ||
| 606 | static void clear_atomic_switch_msr(struct vcpu_vmx *vmx, unsigned msr) | ||
| 607 | { | ||
| 608 | unsigned i; | ||
| 609 | struct msr_autoload *m = &vmx->msr_autoload; | ||
| 610 | |||
| 611 | for (i = 0; i < m->nr; ++i) | ||
| 612 | if (m->guest[i].index == msr) | ||
| 613 | break; | ||
| 614 | |||
| 615 | if (i == m->nr) | ||
| 616 | return; | ||
| 617 | --m->nr; | ||
| 618 | m->guest[i] = m->guest[m->nr]; | ||
| 619 | m->host[i] = m->host[m->nr]; | ||
| 620 | vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, m->nr); | ||
| 621 | vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, m->nr); | ||
| 622 | } | ||
| 623 | |||
| 624 | static void add_atomic_switch_msr(struct vcpu_vmx *vmx, unsigned msr, | ||
| 625 | u64 guest_val, u64 host_val) | ||
| 626 | { | ||
| 627 | unsigned i; | ||
| 628 | struct msr_autoload *m = &vmx->msr_autoload; | ||
| 629 | |||
| 630 | for (i = 0; i < m->nr; ++i) | ||
| 631 | if (m->guest[i].index == msr) | ||
| 632 | break; | ||
| 633 | |||
| 634 | if (i == m->nr) { | ||
| 635 | ++m->nr; | ||
| 636 | vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, m->nr); | ||
| 637 | vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, m->nr); | ||
| 638 | } | ||
| 639 | |||
| 640 | m->guest[i].index = msr; | ||
| 641 | m->guest[i].value = guest_val; | ||
| 642 | m->host[i].index = msr; | ||
| 643 | m->host[i].value = host_val; | ||
| 644 | } | ||
| 645 | |||
| 598 | static void reload_tss(void) | 646 | static void reload_tss(void) |
| 599 | { | 647 | { |
| 600 | /* | 648 | /* |
| 601 | * VT restores TR but not its size. Useless. | 649 | * VT restores TR but not its size. Useless. |
| 602 | */ | 650 | */ |
| 603 | struct descriptor_table gdt; | 651 | struct desc_ptr gdt; |
| 604 | struct desc_struct *descs; | 652 | struct desc_struct *descs; |
| 605 | 653 | ||
| 606 | kvm_get_gdt(&gdt); | 654 | native_store_gdt(&gdt); |
| 607 | descs = (void *)gdt.base; | 655 | descs = (void *)gdt.address; |
| 608 | descs[GDT_ENTRY_TSS].type = 9; /* available TSS */ | 656 | descs[GDT_ENTRY_TSS].type = 9; /* available TSS */ |
| 609 | load_TR_desc(); | 657 | load_TR_desc(); |
| 610 | } | 658 | } |
| @@ -631,9 +679,57 @@ static bool update_transition_efer(struct vcpu_vmx *vmx, int efer_offset) | |||
| 631 | guest_efer |= host_efer & ignore_bits; | 679 | guest_efer |= host_efer & ignore_bits; |
| 632 | vmx->guest_msrs[efer_offset].data = guest_efer; | 680 | vmx->guest_msrs[efer_offset].data = guest_efer; |
| 633 | vmx->guest_msrs[efer_offset].mask = ~ignore_bits; | 681 | vmx->guest_msrs[efer_offset].mask = ~ignore_bits; |
| 682 | |||
| 683 | clear_atomic_switch_msr(vmx, MSR_EFER); | ||
| 684 | /* On ept, can't emulate nx, and must switch nx atomically */ | ||
| 685 | if (enable_ept && ((vmx->vcpu.arch.efer ^ host_efer) & EFER_NX)) { | ||
| 686 | guest_efer = vmx->vcpu.arch.efer; | ||
| 687 | if (!(guest_efer & EFER_LMA)) | ||
| 688 | guest_efer &= ~EFER_LME; | ||
| 689 | add_atomic_switch_msr(vmx, MSR_EFER, guest_efer, host_efer); | ||
| 690 | return false; | ||
| 691 | } | ||
| 692 | |||
| 634 | return true; | 693 | return true; |
| 635 | } | 694 | } |
| 636 | 695 | ||
| 696 | static unsigned long segment_base(u16 selector) | ||
| 697 | { | ||
| 698 | struct desc_ptr gdt; | ||
| 699 | struct desc_struct *d; | ||
| 700 | unsigned long table_base; | ||
| 701 | unsigned long v; | ||
| 702 | |||
| 703 | if (!(selector & ~3)) | ||
| 704 | return 0; | ||
| 705 | |||
| 706 | native_store_gdt(&gdt); | ||
| 707 | table_base = gdt.address; | ||
| 708 | |||
| 709 | if (selector & 4) { /* from ldt */ | ||
| 710 | u16 ldt_selector = kvm_read_ldt(); | ||
| 711 | |||
| 712 | if (!(ldt_selector & ~3)) | ||
| 713 | return 0; | ||
| 714 | |||
| 715 | table_base = segment_base(ldt_selector); | ||
| 716 | } | ||
| 717 | d = (struct desc_struct *)(table_base + (selector & ~7)); | ||
| 718 | v = get_desc_base(d); | ||
| 719 | #ifdef CONFIG_X86_64 | ||
| 720 | if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11)) | ||
| 721 | v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32; | ||
| 722 | #endif | ||
| 723 | return v; | ||
| 724 | } | ||
| 725 | |||
| 726 | static inline unsigned long kvm_read_tr_base(void) | ||
| 727 | { | ||
| 728 | u16 tr; | ||
| 729 | asm("str %0" : "=g"(tr)); | ||
| 730 | return segment_base(tr); | ||
| 731 | } | ||
| 732 | |||
| 637 | static void vmx_save_host_state(struct kvm_vcpu *vcpu) | 733 | static void vmx_save_host_state(struct kvm_vcpu *vcpu) |
| 638 | { | 734 | { |
| 639 | struct vcpu_vmx *vmx = to_vmx(vcpu); | 735 | struct vcpu_vmx *vmx = to_vmx(vcpu); |
| @@ -758,7 +854,7 @@ static void vmx_vcpu_load(struct kvm_vcpu *vcpu, int cpu) | |||
| 758 | } | 854 | } |
| 759 | 855 | ||
| 760 | if (vcpu->cpu != cpu) { | 856 | if (vcpu->cpu != cpu) { |
| 761 | struct descriptor_table dt; | 857 | struct desc_ptr dt; |
| 762 | unsigned long sysenter_esp; | 858 | unsigned long sysenter_esp; |
| 763 | 859 | ||
| 764 | vcpu->cpu = cpu; | 860 | vcpu->cpu = cpu; |
| @@ -767,8 +863,8 @@ static void vmx_vcpu_load(struct kvm_vcpu *vcpu, int cpu) | |||
| 767 | * processors. | 863 | * processors. |
| 768 | */ | 864 | */ |
| 769 | vmcs_writel(HOST_TR_BASE, kvm_read_tr_base()); /* 22.2.4 */ | 865 | vmcs_writel(HOST_TR_BASE, kvm_read_tr_base()); /* 22.2.4 */ |
| 770 | kvm_get_gdt(&dt); | 866 | native_store_gdt(&dt); |
| 771 | vmcs_writel(HOST_GDTR_BASE, dt.base); /* 22.2.4 */ | 867 | vmcs_writel(HOST_GDTR_BASE, dt.address); /* 22.2.4 */ |
| 772 | 868 | ||
| 773 | rdmsrl(MSR_IA32_SYSENTER_ESP, sysenter_esp); | 869 | rdmsrl(MSR_IA32_SYSENTER_ESP, sysenter_esp); |
| 774 | vmcs_writel(HOST_IA32_SYSENTER_ESP, sysenter_esp); /* 22.2.3 */ | 870 | vmcs_writel(HOST_IA32_SYSENTER_ESP, sysenter_esp); /* 22.2.3 */ |
| @@ -846,9 +942,9 @@ static u32 vmx_get_interrupt_shadow(struct kvm_vcpu *vcpu, int mask) | |||
| 846 | int ret = 0; | 942 | int ret = 0; |
| 847 | 943 | ||
| 848 | if (interruptibility & GUEST_INTR_STATE_STI) | 944 | if (interruptibility & GUEST_INTR_STATE_STI) |
| 849 | ret |= X86_SHADOW_INT_STI; | 945 | ret |= KVM_X86_SHADOW_INT_STI; |
| 850 | if (interruptibility & GUEST_INTR_STATE_MOV_SS) | 946 | if (interruptibility & GUEST_INTR_STATE_MOV_SS) |
| 851 | ret |= X86_SHADOW_INT_MOV_SS; | 947 | ret |= KVM_X86_SHADOW_INT_MOV_SS; |
| 852 | 948 | ||
| 853 | return ret & mask; | 949 | return ret & mask; |
| 854 | } | 950 | } |
| @@ -860,9 +956,9 @@ static void vmx_set_interrupt_shadow(struct kvm_vcpu *vcpu, int mask) | |||
| 860 | 956 | ||
| 861 | interruptibility &= ~(GUEST_INTR_STATE_STI | GUEST_INTR_STATE_MOV_SS); | 957 | interruptibility &= ~(GUEST_INTR_STATE_STI | GUEST_INTR_STATE_MOV_SS); |
| 862 | 958 | ||
| 863 | if (mask & X86_SHADOW_INT_MOV_SS) | 959 | if (mask & KVM_X86_SHADOW_INT_MOV_SS) |
| 864 | interruptibility |= GUEST_INTR_STATE_MOV_SS; | 960 | interruptibility |= GUEST_INTR_STATE_MOV_SS; |
| 865 | if (mask & X86_SHADOW_INT_STI) | 961 | else if (mask & KVM_X86_SHADOW_INT_STI) |
| 866 | interruptibility |= GUEST_INTR_STATE_STI; | 962 | interruptibility |= GUEST_INTR_STATE_STI; |
| 867 | 963 | ||
| 868 | if ((interruptibility != interruptibility_old)) | 964 | if ((interruptibility != interruptibility_old)) |
| @@ -882,7 +978,8 @@ static void skip_emulated_instruction(struct kvm_vcpu *vcpu) | |||
| 882 | } | 978 | } |
| 883 | 979 | ||
| 884 | static void vmx_queue_exception(struct kvm_vcpu *vcpu, unsigned nr, | 980 | static void vmx_queue_exception(struct kvm_vcpu *vcpu, unsigned nr, |
| 885 | bool has_error_code, u32 error_code) | 981 | bool has_error_code, u32 error_code, |
| 982 | bool reinject) | ||
| 886 | { | 983 | { |
| 887 | struct vcpu_vmx *vmx = to_vmx(vcpu); | 984 | struct vcpu_vmx *vmx = to_vmx(vcpu); |
| 888 | u32 intr_info = nr | INTR_INFO_VALID_MASK; | 985 | u32 intr_info = nr | INTR_INFO_VALID_MASK; |
| @@ -1176,9 +1273,16 @@ static __init int vmx_disabled_by_bios(void) | |||
| 1176 | u64 msr; | 1273 | u64 msr; |
| 1177 | 1274 | ||
| 1178 | rdmsrl(MSR_IA32_FEATURE_CONTROL, msr); | 1275 | rdmsrl(MSR_IA32_FEATURE_CONTROL, msr); |
| 1179 | return (msr & (FEATURE_CONTROL_LOCKED | | 1276 | if (msr & FEATURE_CONTROL_LOCKED) { |
| 1180 | FEATURE_CONTROL_VMXON_ENABLED)) | 1277 | if (!(msr & FEATURE_CONTROL_VMXON_ENABLED_INSIDE_SMX) |
| 1181 | == FEATURE_CONTROL_LOCKED; | 1278 | && tboot_enabled()) |
| 1279 | return 1; | ||
| 1280 | if (!(msr & FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX) | ||
| 1281 | && !tboot_enabled()) | ||
| 1282 | return 1; | ||
| 1283 | } | ||
| 1284 | |||
| 1285 | return 0; | ||
| 1182 | /* locked but not enabled */ | 1286 | /* locked but not enabled */ |
| 1183 | } | 1287 | } |
| 1184 | 1288 | ||
| @@ -1186,21 +1290,23 @@ static int hardware_enable(void *garbage) | |||
| 1186 | { | 1290 | { |
| 1187 | int cpu = raw_smp_processor_id(); | 1291 | int cpu = raw_smp_processor_id(); |
| 1188 | u64 phys_addr = __pa(per_cpu(vmxarea, cpu)); | 1292 | u64 phys_addr = __pa(per_cpu(vmxarea, cpu)); |
| 1189 | u64 old; | 1293 | u64 old, test_bits; |
| 1190 | 1294 | ||
| 1191 | if (read_cr4() & X86_CR4_VMXE) | 1295 | if (read_cr4() & X86_CR4_VMXE) |
| 1192 | return -EBUSY; | 1296 | return -EBUSY; |
| 1193 | 1297 | ||
| 1194 | INIT_LIST_HEAD(&per_cpu(vcpus_on_cpu, cpu)); | 1298 | INIT_LIST_HEAD(&per_cpu(vcpus_on_cpu, cpu)); |
| 1195 | rdmsrl(MSR_IA32_FEATURE_CONTROL, old); | 1299 | rdmsrl(MSR_IA32_FEATURE_CONTROL, old); |
| 1196 | if ((old & (FEATURE_CONTROL_LOCKED | | 1300 | |
| 1197 | FEATURE_CONTROL_VMXON_ENABLED)) | 1301 | test_bits = FEATURE_CONTROL_LOCKED; |
| 1198 | != (FEATURE_CONTROL_LOCKED | | 1302 | test_bits |= FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX; |
| 1199 | FEATURE_CONTROL_VMXON_ENABLED)) | 1303 | if (tboot_enabled()) |
| 1304 | test_bits |= FEATURE_CONTROL_VMXON_ENABLED_INSIDE_SMX; | ||
| 1305 | |||
| 1306 | if ((old & test_bits) != test_bits) { | ||
| 1200 | /* enable and lock */ | 1307 | /* enable and lock */ |
| 1201 | wrmsrl(MSR_IA32_FEATURE_CONTROL, old | | 1308 | wrmsrl(MSR_IA32_FEATURE_CONTROL, old | test_bits); |
| 1202 | FEATURE_CONTROL_LOCKED | | 1309 | } |
| 1203 | FEATURE_CONTROL_VMXON_ENABLED); | ||
| 1204 | write_cr4(read_cr4() | X86_CR4_VMXE); /* FIXME: not cpu hotplug safe */ | 1310 | write_cr4(read_cr4() | X86_CR4_VMXE); /* FIXME: not cpu hotplug safe */ |
| 1205 | asm volatile (ASM_VMX_VMXON_RAX | 1311 | asm volatile (ASM_VMX_VMXON_RAX |
| 1206 | : : "a"(&phys_addr), "m"(phys_addr) | 1312 | : : "a"(&phys_addr), "m"(phys_addr) |
| @@ -1521,7 +1627,7 @@ static gva_t rmode_tss_base(struct kvm *kvm) | |||
| 1521 | struct kvm_memslots *slots; | 1627 | struct kvm_memslots *slots; |
| 1522 | gfn_t base_gfn; | 1628 | gfn_t base_gfn; |
| 1523 | 1629 | ||
| 1524 | slots = rcu_dereference(kvm->memslots); | 1630 | slots = kvm_memslots(kvm); |
| 1525 | base_gfn = kvm->memslots->memslots[0].base_gfn + | 1631 | base_gfn = kvm->memslots->memslots[0].base_gfn + |
| 1526 | kvm->memslots->memslots[0].npages - 3; | 1632 | kvm->memslots->memslots[0].npages - 3; |
| 1527 | return base_gfn << PAGE_SHIFT; | 1633 | return base_gfn << PAGE_SHIFT; |
| @@ -1649,6 +1755,7 @@ static void exit_lmode(struct kvm_vcpu *vcpu) | |||
| 1649 | vmcs_write32(VM_ENTRY_CONTROLS, | 1755 | vmcs_write32(VM_ENTRY_CONTROLS, |
| 1650 | vmcs_read32(VM_ENTRY_CONTROLS) | 1756 | vmcs_read32(VM_ENTRY_CONTROLS) |
| 1651 | & ~VM_ENTRY_IA32E_MODE); | 1757 | & ~VM_ENTRY_IA32E_MODE); |
| 1758 | vmx_set_efer(vcpu, vcpu->arch.efer); | ||
| 1652 | } | 1759 | } |
| 1653 | 1760 | ||
| 1654 | #endif | 1761 | #endif |
| @@ -1934,28 +2041,28 @@ static void vmx_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l) | |||
| 1934 | *l = (ar >> 13) & 1; | 2041 | *l = (ar >> 13) & 1; |
| 1935 | } | 2042 | } |
| 1936 | 2043 | ||
| 1937 | static void vmx_get_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt) | 2044 | static void vmx_get_idt(struct kvm_vcpu *vcpu, struct desc_ptr *dt) |
| 1938 | { | 2045 | { |
| 1939 | dt->limit = vmcs_read32(GUEST_IDTR_LIMIT); | 2046 | dt->size = vmcs_read32(GUEST_IDTR_LIMIT); |
| 1940 | dt->base = vmcs_readl(GUEST_IDTR_BASE); | 2047 | dt->address = vmcs_readl(GUEST_IDTR_BASE); |
| 1941 | } | 2048 | } |
| 1942 | 2049 | ||
| 1943 | static void vmx_set_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt) | 2050 | static void vmx_set_idt(struct kvm_vcpu *vcpu, struct desc_ptr *dt) |
| 1944 | { | 2051 | { |
| 1945 | vmcs_write32(GUEST_IDTR_LIMIT, dt->limit); | 2052 | vmcs_write32(GUEST_IDTR_LIMIT, dt->size); |
| 1946 | vmcs_writel(GUEST_IDTR_BASE, dt->base); | 2053 | vmcs_writel(GUEST_IDTR_BASE, dt->address); |
| 1947 | } | 2054 | } |
| 1948 | 2055 | ||
| 1949 | static void vmx_get_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt) | 2056 | static void vmx_get_gdt(struct kvm_vcpu *vcpu, struct desc_ptr *dt) |
| 1950 | { | 2057 | { |
| 1951 | dt->limit = vmcs_read32(GUEST_GDTR_LIMIT); | 2058 | dt->size = vmcs_read32(GUEST_GDTR_LIMIT); |
| 1952 | dt->base = vmcs_readl(GUEST_GDTR_BASE); | 2059 | dt->address = vmcs_readl(GUEST_GDTR_BASE); |
| 1953 | } | 2060 | } |
| 1954 | 2061 | ||
| 1955 | static void vmx_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt) | 2062 | static void vmx_set_gdt(struct kvm_vcpu *vcpu, struct desc_ptr *dt) |
| 1956 | { | 2063 | { |
| 1957 | vmcs_write32(GUEST_GDTR_LIMIT, dt->limit); | 2064 | vmcs_write32(GUEST_GDTR_LIMIT, dt->size); |
| 1958 | vmcs_writel(GUEST_GDTR_BASE, dt->base); | 2065 | vmcs_writel(GUEST_GDTR_BASE, dt->address); |
| 1959 | } | 2066 | } |
| 1960 | 2067 | ||
| 1961 | static bool rmode_segment_valid(struct kvm_vcpu *vcpu, int seg) | 2068 | static bool rmode_segment_valid(struct kvm_vcpu *vcpu, int seg) |
| @@ -2296,6 +2403,16 @@ static void allocate_vpid(struct vcpu_vmx *vmx) | |||
| 2296 | spin_unlock(&vmx_vpid_lock); | 2403 | spin_unlock(&vmx_vpid_lock); |
| 2297 | } | 2404 | } |
| 2298 | 2405 | ||
| 2406 | static void free_vpid(struct vcpu_vmx *vmx) | ||
| 2407 | { | ||
| 2408 | if (!enable_vpid) | ||
| 2409 | return; | ||
| 2410 | spin_lock(&vmx_vpid_lock); | ||
| 2411 | if (vmx->vpid != 0) | ||
| 2412 | __clear_bit(vmx->vpid, vmx_vpid_bitmap); | ||
| 2413 | spin_unlock(&vmx_vpid_lock); | ||
| 2414 | } | ||
| 2415 | |||
| 2299 | static void __vmx_disable_intercept_for_msr(unsigned long *msr_bitmap, u32 msr) | 2416 | static void __vmx_disable_intercept_for_msr(unsigned long *msr_bitmap, u32 msr) |
| 2300 | { | 2417 | { |
| 2301 | int f = sizeof(unsigned long); | 2418 | int f = sizeof(unsigned long); |
| @@ -2334,7 +2451,7 @@ static int vmx_vcpu_setup(struct vcpu_vmx *vmx) | |||
| 2334 | u32 junk; | 2451 | u32 junk; |
| 2335 | u64 host_pat, tsc_this, tsc_base; | 2452 | u64 host_pat, tsc_this, tsc_base; |
| 2336 | unsigned long a; | 2453 | unsigned long a; |
| 2337 | struct descriptor_table dt; | 2454 | struct desc_ptr dt; |
| 2338 | int i; | 2455 | int i; |
| 2339 | unsigned long kvm_vmx_return; | 2456 | unsigned long kvm_vmx_return; |
| 2340 | u32 exec_control; | 2457 | u32 exec_control; |
| @@ -2415,14 +2532,16 @@ static int vmx_vcpu_setup(struct vcpu_vmx *vmx) | |||
| 2415 | 2532 | ||
| 2416 | vmcs_write16(HOST_TR_SELECTOR, GDT_ENTRY_TSS*8); /* 22.2.4 */ | 2533 | vmcs_write16(HOST_TR_SELECTOR, GDT_ENTRY_TSS*8); /* 22.2.4 */ |
| 2417 | 2534 | ||
| 2418 | kvm_get_idt(&dt); | 2535 | native_store_idt(&dt); |
| 2419 | vmcs_writel(HOST_IDTR_BASE, dt.base); /* 22.2.4 */ | 2536 | vmcs_writel(HOST_IDTR_BASE, dt.address); /* 22.2.4 */ |
| 2420 | 2537 | ||
| 2421 | asm("mov $.Lkvm_vmx_return, %0" : "=r"(kvm_vmx_return)); | 2538 | asm("mov $.Lkvm_vmx_return, %0" : "=r"(kvm_vmx_return)); |
| 2422 | vmcs_writel(HOST_RIP, kvm_vmx_return); /* 22.2.5 */ | 2539 | vmcs_writel(HOST_RIP, kvm_vmx_return); /* 22.2.5 */ |
| 2423 | vmcs_write32(VM_EXIT_MSR_STORE_COUNT, 0); | 2540 | vmcs_write32(VM_EXIT_MSR_STORE_COUNT, 0); |
| 2424 | vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, 0); | 2541 | vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, 0); |
| 2542 | vmcs_write64(VM_EXIT_MSR_LOAD_ADDR, __pa(vmx->msr_autoload.host)); | ||
| 2425 | vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, 0); | 2543 | vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, 0); |
| 2544 | vmcs_write64(VM_ENTRY_MSR_LOAD_ADDR, __pa(vmx->msr_autoload.guest)); | ||
| 2426 | 2545 | ||
| 2427 | rdmsr(MSR_IA32_SYSENTER_CS, host_sysenter_cs, junk); | 2546 | rdmsr(MSR_IA32_SYSENTER_CS, host_sysenter_cs, junk); |
| 2428 | vmcs_write32(HOST_IA32_SYSENTER_CS, host_sysenter_cs); | 2547 | vmcs_write32(HOST_IA32_SYSENTER_CS, host_sysenter_cs); |
| @@ -2947,22 +3066,20 @@ static int handle_io(struct kvm_vcpu *vcpu) | |||
| 2947 | int size, in, string; | 3066 | int size, in, string; |
| 2948 | unsigned port; | 3067 | unsigned port; |
| 2949 | 3068 | ||
| 2950 | ++vcpu->stat.io_exits; | ||
| 2951 | exit_qualification = vmcs_readl(EXIT_QUALIFICATION); | 3069 | exit_qualification = vmcs_readl(EXIT_QUALIFICATION); |
| 2952 | string = (exit_qualification & 16) != 0; | 3070 | string = (exit_qualification & 16) != 0; |
| 3071 | in = (exit_qualification & 8) != 0; | ||
| 2953 | 3072 | ||
| 2954 | if (string) { | 3073 | ++vcpu->stat.io_exits; |
| 2955 | if (emulate_instruction(vcpu, 0, 0, 0) == EMULATE_DO_MMIO) | ||
| 2956 | return 0; | ||
| 2957 | return 1; | ||
| 2958 | } | ||
| 2959 | 3074 | ||
| 2960 | size = (exit_qualification & 7) + 1; | 3075 | if (string || in) |
| 2961 | in = (exit_qualification & 8) != 0; | 3076 | return !(emulate_instruction(vcpu, 0, 0, 0) == EMULATE_DO_MMIO); |
| 2962 | port = exit_qualification >> 16; | ||
| 2963 | 3077 | ||
| 3078 | port = exit_qualification >> 16; | ||
| 3079 | size = (exit_qualification & 7) + 1; | ||
| 2964 | skip_emulated_instruction(vcpu); | 3080 | skip_emulated_instruction(vcpu); |
| 2965 | return kvm_emulate_pio(vcpu, in, size, port); | 3081 | |
| 3082 | return kvm_fast_pio_out(vcpu, size, port); | ||
| 2966 | } | 3083 | } |
| 2967 | 3084 | ||
| 2968 | static void | 3085 | static void |
| @@ -3053,19 +3170,9 @@ static int handle_cr(struct kvm_vcpu *vcpu) | |||
| 3053 | return 0; | 3170 | return 0; |
| 3054 | } | 3171 | } |
| 3055 | 3172 | ||
| 3056 | static int check_dr_alias(struct kvm_vcpu *vcpu) | ||
| 3057 | { | ||
| 3058 | if (kvm_read_cr4_bits(vcpu, X86_CR4_DE)) { | ||
| 3059 | kvm_queue_exception(vcpu, UD_VECTOR); | ||
| 3060 | return -1; | ||
| 3061 | } | ||
| 3062 | return 0; | ||
| 3063 | } | ||
| 3064 | |||
| 3065 | static int handle_dr(struct kvm_vcpu *vcpu) | 3173 | static int handle_dr(struct kvm_vcpu *vcpu) |
| 3066 | { | 3174 | { |
| 3067 | unsigned long exit_qualification; | 3175 | unsigned long exit_qualification; |
| 3068 | unsigned long val; | ||
| 3069 | int dr, reg; | 3176 | int dr, reg; |
| 3070 | 3177 | ||
| 3071 | /* Do not handle if the CPL > 0, will trigger GP on re-entry */ | 3178 | /* Do not handle if the CPL > 0, will trigger GP on re-entry */ |
| @@ -3100,67 +3207,20 @@ static int handle_dr(struct kvm_vcpu *vcpu) | |||
| 3100 | dr = exit_qualification & DEBUG_REG_ACCESS_NUM; | 3207 | dr = exit_qualification & DEBUG_REG_ACCESS_NUM; |
| 3101 | reg = DEBUG_REG_ACCESS_REG(exit_qualification); | 3208 | reg = DEBUG_REG_ACCESS_REG(exit_qualification); |
| 3102 | if (exit_qualification & TYPE_MOV_FROM_DR) { | 3209 | if (exit_qualification & TYPE_MOV_FROM_DR) { |
| 3103 | switch (dr) { | 3210 | unsigned long val; |
| 3104 | case 0 ... 3: | 3211 | if (!kvm_get_dr(vcpu, dr, &val)) |
| 3105 | val = vcpu->arch.db[dr]; | 3212 | kvm_register_write(vcpu, reg, val); |
| 3106 | break; | 3213 | } else |
| 3107 | case 4: | 3214 | kvm_set_dr(vcpu, dr, vcpu->arch.regs[reg]); |
| 3108 | if (check_dr_alias(vcpu) < 0) | ||
| 3109 | return 1; | ||
| 3110 | /* fall through */ | ||
| 3111 | case 6: | ||
| 3112 | val = vcpu->arch.dr6; | ||
| 3113 | break; | ||
| 3114 | case 5: | ||
| 3115 | if (check_dr_alias(vcpu) < 0) | ||
| 3116 | return 1; | ||
| 3117 | /* fall through */ | ||
| 3118 | default: /* 7 */ | ||
| 3119 | val = vcpu->arch.dr7; | ||
| 3120 | break; | ||
| 3121 | } | ||
| 3122 | kvm_register_write(vcpu, reg, val); | ||
| 3123 | } else { | ||
| 3124 | val = vcpu->arch.regs[reg]; | ||
| 3125 | switch (dr) { | ||
| 3126 | case 0 ... 3: | ||
| 3127 | vcpu->arch.db[dr] = val; | ||
| 3128 | if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) | ||
| 3129 | vcpu->arch.eff_db[dr] = val; | ||
| 3130 | break; | ||
| 3131 | case 4: | ||
| 3132 | if (check_dr_alias(vcpu) < 0) | ||
| 3133 | return 1; | ||
| 3134 | /* fall through */ | ||
| 3135 | case 6: | ||
| 3136 | if (val & 0xffffffff00000000ULL) { | ||
| 3137 | kvm_inject_gp(vcpu, 0); | ||
| 3138 | return 1; | ||
| 3139 | } | ||
| 3140 | vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1; | ||
| 3141 | break; | ||
| 3142 | case 5: | ||
| 3143 | if (check_dr_alias(vcpu) < 0) | ||
| 3144 | return 1; | ||
| 3145 | /* fall through */ | ||
| 3146 | default: /* 7 */ | ||
| 3147 | if (val & 0xffffffff00000000ULL) { | ||
| 3148 | kvm_inject_gp(vcpu, 0); | ||
| 3149 | return 1; | ||
| 3150 | } | ||
| 3151 | vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1; | ||
| 3152 | if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) { | ||
| 3153 | vmcs_writel(GUEST_DR7, vcpu->arch.dr7); | ||
| 3154 | vcpu->arch.switch_db_regs = | ||
| 3155 | (val & DR7_BP_EN_MASK); | ||
| 3156 | } | ||
| 3157 | break; | ||
| 3158 | } | ||
| 3159 | } | ||
| 3160 | skip_emulated_instruction(vcpu); | 3215 | skip_emulated_instruction(vcpu); |
| 3161 | return 1; | 3216 | return 1; |
| 3162 | } | 3217 | } |
| 3163 | 3218 | ||
| 3219 | static void vmx_set_dr7(struct kvm_vcpu *vcpu, unsigned long val) | ||
| 3220 | { | ||
| 3221 | vmcs_writel(GUEST_DR7, val); | ||
| 3222 | } | ||
| 3223 | |||
| 3164 | static int handle_cpuid(struct kvm_vcpu *vcpu) | 3224 | static int handle_cpuid(struct kvm_vcpu *vcpu) |
| 3165 | { | 3225 | { |
| 3166 | kvm_emulate_cpuid(vcpu); | 3226 | kvm_emulate_cpuid(vcpu); |
| @@ -3292,6 +3352,8 @@ static int handle_task_switch(struct kvm_vcpu *vcpu) | |||
| 3292 | { | 3352 | { |
| 3293 | struct vcpu_vmx *vmx = to_vmx(vcpu); | 3353 | struct vcpu_vmx *vmx = to_vmx(vcpu); |
| 3294 | unsigned long exit_qualification; | 3354 | unsigned long exit_qualification; |
| 3355 | bool has_error_code = false; | ||
| 3356 | u32 error_code = 0; | ||
| 3295 | u16 tss_selector; | 3357 | u16 tss_selector; |
| 3296 | int reason, type, idt_v; | 3358 | int reason, type, idt_v; |
| 3297 | 3359 | ||
| @@ -3314,6 +3376,13 @@ static int handle_task_switch(struct kvm_vcpu *vcpu) | |||
| 3314 | kvm_clear_interrupt_queue(vcpu); | 3376 | kvm_clear_interrupt_queue(vcpu); |
| 3315 | break; | 3377 | break; |
| 3316 | case INTR_TYPE_HARD_EXCEPTION: | 3378 | case INTR_TYPE_HARD_EXCEPTION: |
| 3379 | if (vmx->idt_vectoring_info & | ||
| 3380 | VECTORING_INFO_DELIVER_CODE_MASK) { | ||
| 3381 | has_error_code = true; | ||
| 3382 | error_code = | ||
| 3383 | vmcs_read32(IDT_VECTORING_ERROR_CODE); | ||
| 3384 | } | ||
| 3385 | /* fall through */ | ||
| 3317 | case INTR_TYPE_SOFT_EXCEPTION: | 3386 | case INTR_TYPE_SOFT_EXCEPTION: |
| 3318 | kvm_clear_exception_queue(vcpu); | 3387 | kvm_clear_exception_queue(vcpu); |
| 3319 | break; | 3388 | break; |
| @@ -3328,8 +3397,13 @@ static int handle_task_switch(struct kvm_vcpu *vcpu) | |||
| 3328 | type != INTR_TYPE_NMI_INTR)) | 3397 | type != INTR_TYPE_NMI_INTR)) |
| 3329 | skip_emulated_instruction(vcpu); | 3398 | skip_emulated_instruction(vcpu); |
| 3330 | 3399 | ||
| 3331 | if (!kvm_task_switch(vcpu, tss_selector, reason)) | 3400 | if (kvm_task_switch(vcpu, tss_selector, reason, |
| 3401 | has_error_code, error_code) == EMULATE_FAIL) { | ||
| 3402 | vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR; | ||
| 3403 | vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION; | ||
| 3404 | vcpu->run->internal.ndata = 0; | ||
| 3332 | return 0; | 3405 | return 0; |
| 3406 | } | ||
| 3333 | 3407 | ||
| 3334 | /* clear all local breakpoint enable flags */ | 3408 | /* clear all local breakpoint enable flags */ |
| 3335 | vmcs_writel(GUEST_DR7, vmcs_readl(GUEST_DR7) & ~55); | 3409 | vmcs_writel(GUEST_DR7, vmcs_readl(GUEST_DR7) & ~55); |
| @@ -3574,7 +3648,7 @@ static int vmx_handle_exit(struct kvm_vcpu *vcpu) | |||
| 3574 | u32 exit_reason = vmx->exit_reason; | 3648 | u32 exit_reason = vmx->exit_reason; |
| 3575 | u32 vectoring_info = vmx->idt_vectoring_info; | 3649 | u32 vectoring_info = vmx->idt_vectoring_info; |
| 3576 | 3650 | ||
| 3577 | trace_kvm_exit(exit_reason, kvm_rip_read(vcpu)); | 3651 | trace_kvm_exit(exit_reason, vcpu); |
| 3578 | 3652 | ||
| 3579 | /* If guest state is invalid, start emulating */ | 3653 | /* If guest state is invalid, start emulating */ |
| 3580 | if (vmx->emulation_required && emulate_invalid_guest_state) | 3654 | if (vmx->emulation_required && emulate_invalid_guest_state) |
| @@ -3923,10 +3997,7 @@ static void vmx_free_vcpu(struct kvm_vcpu *vcpu) | |||
| 3923 | { | 3997 | { |
| 3924 | struct vcpu_vmx *vmx = to_vmx(vcpu); | 3998 | struct vcpu_vmx *vmx = to_vmx(vcpu); |
| 3925 | 3999 | ||
| 3926 | spin_lock(&vmx_vpid_lock); | 4000 | free_vpid(vmx); |
| 3927 | if (vmx->vpid != 0) | ||
| 3928 | __clear_bit(vmx->vpid, vmx_vpid_bitmap); | ||
| 3929 | spin_unlock(&vmx_vpid_lock); | ||
| 3930 | vmx_free_vmcs(vcpu); | 4001 | vmx_free_vmcs(vcpu); |
| 3931 | kfree(vmx->guest_msrs); | 4002 | kfree(vmx->guest_msrs); |
| 3932 | kvm_vcpu_uninit(vcpu); | 4003 | kvm_vcpu_uninit(vcpu); |
| @@ -3988,6 +4059,7 @@ free_msrs: | |||
| 3988 | uninit_vcpu: | 4059 | uninit_vcpu: |
| 3989 | kvm_vcpu_uninit(&vmx->vcpu); | 4060 | kvm_vcpu_uninit(&vmx->vcpu); |
| 3990 | free_vcpu: | 4061 | free_vcpu: |
| 4062 | free_vpid(vmx); | ||
| 3991 | kmem_cache_free(kvm_vcpu_cache, vmx); | 4063 | kmem_cache_free(kvm_vcpu_cache, vmx); |
| 3992 | return ERR_PTR(err); | 4064 | return ERR_PTR(err); |
| 3993 | } | 4065 | } |
| @@ -4118,6 +4190,10 @@ static void vmx_cpuid_update(struct kvm_vcpu *vcpu) | |||
| 4118 | } | 4190 | } |
| 4119 | } | 4191 | } |
| 4120 | 4192 | ||
| 4193 | static void vmx_set_supported_cpuid(u32 func, struct kvm_cpuid_entry2 *entry) | ||
| 4194 | { | ||
| 4195 | } | ||
| 4196 | |||
| 4121 | static struct kvm_x86_ops vmx_x86_ops = { | 4197 | static struct kvm_x86_ops vmx_x86_ops = { |
| 4122 | .cpu_has_kvm_support = cpu_has_kvm_support, | 4198 | .cpu_has_kvm_support = cpu_has_kvm_support, |
| 4123 | .disabled_by_bios = vmx_disabled_by_bios, | 4199 | .disabled_by_bios = vmx_disabled_by_bios, |
| @@ -4154,6 +4230,7 @@ static struct kvm_x86_ops vmx_x86_ops = { | |||
| 4154 | .set_idt = vmx_set_idt, | 4230 | .set_idt = vmx_set_idt, |
| 4155 | .get_gdt = vmx_get_gdt, | 4231 | .get_gdt = vmx_get_gdt, |
| 4156 | .set_gdt = vmx_set_gdt, | 4232 | .set_gdt = vmx_set_gdt, |
| 4233 | .set_dr7 = vmx_set_dr7, | ||
| 4157 | .cache_reg = vmx_cache_reg, | 4234 | .cache_reg = vmx_cache_reg, |
| 4158 | .get_rflags = vmx_get_rflags, | 4235 | .get_rflags = vmx_get_rflags, |
| 4159 | .set_rflags = vmx_set_rflags, | 4236 | .set_rflags = vmx_set_rflags, |
| @@ -4189,6 +4266,8 @@ static struct kvm_x86_ops vmx_x86_ops = { | |||
| 4189 | .cpuid_update = vmx_cpuid_update, | 4266 | .cpuid_update = vmx_cpuid_update, |
| 4190 | 4267 | ||
| 4191 | .rdtscp_supported = vmx_rdtscp_supported, | 4268 | .rdtscp_supported = vmx_rdtscp_supported, |
| 4269 | |||
| 4270 | .set_supported_cpuid = vmx_set_supported_cpuid, | ||
| 4192 | }; | 4271 | }; |
| 4193 | 4272 | ||
| 4194 | static int __init vmx_init(void) | 4273 | static int __init vmx_init(void) |
| @@ -4236,7 +4315,8 @@ static int __init vmx_init(void) | |||
| 4236 | 4315 | ||
| 4237 | set_bit(0, vmx_vpid_bitmap); /* 0 is reserved for host */ | 4316 | set_bit(0, vmx_vpid_bitmap); /* 0 is reserved for host */ |
| 4238 | 4317 | ||
| 4239 | r = kvm_init(&vmx_x86_ops, sizeof(struct vcpu_vmx), THIS_MODULE); | 4318 | r = kvm_init(&vmx_x86_ops, sizeof(struct vcpu_vmx), |
| 4319 | __alignof__(struct vcpu_vmx), THIS_MODULE); | ||
| 4240 | if (r) | 4320 | if (r) |
| 4241 | goto out3; | 4321 | goto out3; |
| 4242 | 4322 | ||
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index dd9bc8fb81ab..05d571f6f196 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c | |||
| @@ -42,7 +42,7 @@ | |||
| 42 | #include <linux/slab.h> | 42 | #include <linux/slab.h> |
| 43 | #include <linux/perf_event.h> | 43 | #include <linux/perf_event.h> |
| 44 | #include <trace/events/kvm.h> | 44 | #include <trace/events/kvm.h> |
| 45 | #undef TRACE_INCLUDE_FILE | 45 | |
| 46 | #define CREATE_TRACE_POINTS | 46 | #define CREATE_TRACE_POINTS |
| 47 | #include "trace.h" | 47 | #include "trace.h" |
| 48 | 48 | ||
| @@ -224,34 +224,6 @@ static void drop_user_return_notifiers(void *ignore) | |||
| 224 | kvm_on_user_return(&smsr->urn); | 224 | kvm_on_user_return(&smsr->urn); |
| 225 | } | 225 | } |
| 226 | 226 | ||
| 227 | unsigned long segment_base(u16 selector) | ||
| 228 | { | ||
| 229 | struct descriptor_table gdt; | ||
| 230 | struct desc_struct *d; | ||
| 231 | unsigned long table_base; | ||
| 232 | unsigned long v; | ||
| 233 | |||
| 234 | if (selector == 0) | ||
| 235 | return 0; | ||
| 236 | |||
| 237 | kvm_get_gdt(&gdt); | ||
| 238 | table_base = gdt.base; | ||
| 239 | |||
| 240 | if (selector & 4) { /* from ldt */ | ||
| 241 | u16 ldt_selector = kvm_read_ldt(); | ||
| 242 | |||
| 243 | table_base = segment_base(ldt_selector); | ||
| 244 | } | ||
| 245 | d = (struct desc_struct *)(table_base + (selector & ~7)); | ||
| 246 | v = get_desc_base(d); | ||
| 247 | #ifdef CONFIG_X86_64 | ||
| 248 | if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11)) | ||
| 249 | v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32; | ||
| 250 | #endif | ||
| 251 | return v; | ||
| 252 | } | ||
| 253 | EXPORT_SYMBOL_GPL(segment_base); | ||
| 254 | |||
| 255 | u64 kvm_get_apic_base(struct kvm_vcpu *vcpu) | 227 | u64 kvm_get_apic_base(struct kvm_vcpu *vcpu) |
| 256 | { | 228 | { |
| 257 | if (irqchip_in_kernel(vcpu->kvm)) | 229 | if (irqchip_in_kernel(vcpu->kvm)) |
| @@ -293,7 +265,8 @@ static int exception_class(int vector) | |||
| 293 | } | 265 | } |
| 294 | 266 | ||
| 295 | static void kvm_multiple_exception(struct kvm_vcpu *vcpu, | 267 | static void kvm_multiple_exception(struct kvm_vcpu *vcpu, |
| 296 | unsigned nr, bool has_error, u32 error_code) | 268 | unsigned nr, bool has_error, u32 error_code, |
| 269 | bool reinject) | ||
| 297 | { | 270 | { |
| 298 | u32 prev_nr; | 271 | u32 prev_nr; |
| 299 | int class1, class2; | 272 | int class1, class2; |
| @@ -304,6 +277,7 @@ static void kvm_multiple_exception(struct kvm_vcpu *vcpu, | |||
| 304 | vcpu->arch.exception.has_error_code = has_error; | 277 | vcpu->arch.exception.has_error_code = has_error; |
| 305 | vcpu->arch.exception.nr = nr; | 278 | vcpu->arch.exception.nr = nr; |
| 306 | vcpu->arch.exception.error_code = error_code; | 279 | vcpu->arch.exception.error_code = error_code; |
| 280 | vcpu->arch.exception.reinject = reinject; | ||
| 307 | return; | 281 | return; |
| 308 | } | 282 | } |
| 309 | 283 | ||
| @@ -332,10 +306,16 @@ static void kvm_multiple_exception(struct kvm_vcpu *vcpu, | |||
| 332 | 306 | ||
| 333 | void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr) | 307 | void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr) |
| 334 | { | 308 | { |
| 335 | kvm_multiple_exception(vcpu, nr, false, 0); | 309 | kvm_multiple_exception(vcpu, nr, false, 0, false); |
| 336 | } | 310 | } |
| 337 | EXPORT_SYMBOL_GPL(kvm_queue_exception); | 311 | EXPORT_SYMBOL_GPL(kvm_queue_exception); |
| 338 | 312 | ||
| 313 | void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr) | ||
| 314 | { | ||
| 315 | kvm_multiple_exception(vcpu, nr, false, 0, true); | ||
| 316 | } | ||
| 317 | EXPORT_SYMBOL_GPL(kvm_requeue_exception); | ||
| 318 | |||
| 339 | void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr, | 319 | void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr, |
| 340 | u32 error_code) | 320 | u32 error_code) |
| 341 | { | 321 | { |
| @@ -352,10 +332,16 @@ EXPORT_SYMBOL_GPL(kvm_inject_nmi); | |||
| 352 | 332 | ||
| 353 | void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code) | 333 | void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code) |
| 354 | { | 334 | { |
| 355 | kvm_multiple_exception(vcpu, nr, true, error_code); | 335 | kvm_multiple_exception(vcpu, nr, true, error_code, false); |
| 356 | } | 336 | } |
| 357 | EXPORT_SYMBOL_GPL(kvm_queue_exception_e); | 337 | EXPORT_SYMBOL_GPL(kvm_queue_exception_e); |
| 358 | 338 | ||
| 339 | void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code) | ||
| 340 | { | ||
| 341 | kvm_multiple_exception(vcpu, nr, true, error_code, true); | ||
| 342 | } | ||
| 343 | EXPORT_SYMBOL_GPL(kvm_requeue_exception_e); | ||
| 344 | |||
| 359 | /* | 345 | /* |
| 360 | * Checks if cpl <= required_cpl; if true, return true. Otherwise queue | 346 | * Checks if cpl <= required_cpl; if true, return true. Otherwise queue |
| 361 | * a #GP and return false. | 347 | * a #GP and return false. |
| @@ -476,7 +462,6 @@ void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0) | |||
| 476 | } | 462 | } |
| 477 | 463 | ||
| 478 | kvm_x86_ops->set_cr0(vcpu, cr0); | 464 | kvm_x86_ops->set_cr0(vcpu, cr0); |
| 479 | vcpu->arch.cr0 = cr0; | ||
| 480 | 465 | ||
| 481 | kvm_mmu_reset_context(vcpu); | 466 | kvm_mmu_reset_context(vcpu); |
| 482 | return; | 467 | return; |
| @@ -485,7 +470,7 @@ EXPORT_SYMBOL_GPL(kvm_set_cr0); | |||
| 485 | 470 | ||
| 486 | void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw) | 471 | void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw) |
| 487 | { | 472 | { |
| 488 | kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0ful) | (msw & 0x0f)); | 473 | kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f)); |
| 489 | } | 474 | } |
| 490 | EXPORT_SYMBOL_GPL(kvm_lmsw); | 475 | EXPORT_SYMBOL_GPL(kvm_lmsw); |
| 491 | 476 | ||
| @@ -517,7 +502,6 @@ void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4) | |||
| 517 | } | 502 | } |
| 518 | kvm_x86_ops->set_cr4(vcpu, cr4); | 503 | kvm_x86_ops->set_cr4(vcpu, cr4); |
| 519 | vcpu->arch.cr4 = cr4; | 504 | vcpu->arch.cr4 = cr4; |
| 520 | vcpu->arch.mmu.base_role.cr4_pge = (cr4 & X86_CR4_PGE) && !tdp_enabled; | ||
| 521 | kvm_mmu_reset_context(vcpu); | 505 | kvm_mmu_reset_context(vcpu); |
| 522 | } | 506 | } |
| 523 | EXPORT_SYMBOL_GPL(kvm_set_cr4); | 507 | EXPORT_SYMBOL_GPL(kvm_set_cr4); |
| @@ -592,6 +576,80 @@ unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu) | |||
| 592 | } | 576 | } |
| 593 | EXPORT_SYMBOL_GPL(kvm_get_cr8); | 577 | EXPORT_SYMBOL_GPL(kvm_get_cr8); |
| 594 | 578 | ||
| 579 | int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val) | ||
| 580 | { | ||
| 581 | switch (dr) { | ||
| 582 | case 0 ... 3: | ||
| 583 | vcpu->arch.db[dr] = val; | ||
| 584 | if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) | ||
| 585 | vcpu->arch.eff_db[dr] = val; | ||
| 586 | break; | ||
| 587 | case 4: | ||
| 588 | if (kvm_read_cr4_bits(vcpu, X86_CR4_DE)) { | ||
| 589 | kvm_queue_exception(vcpu, UD_VECTOR); | ||
| 590 | return 1; | ||
| 591 | } | ||
| 592 | /* fall through */ | ||
| 593 | case 6: | ||
| 594 | if (val & 0xffffffff00000000ULL) { | ||
| 595 | kvm_inject_gp(vcpu, 0); | ||
| 596 | return 1; | ||
| 597 | } | ||
| 598 | vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1; | ||
| 599 | break; | ||
| 600 | case 5: | ||
| 601 | if (kvm_read_cr4_bits(vcpu, X86_CR4_DE)) { | ||
| 602 | kvm_queue_exception(vcpu, UD_VECTOR); | ||
| 603 | return 1; | ||
| 604 | } | ||
| 605 | /* fall through */ | ||
| 606 | default: /* 7 */ | ||
| 607 | if (val & 0xffffffff00000000ULL) { | ||
| 608 | kvm_inject_gp(vcpu, 0); | ||
| 609 | return 1; | ||
| 610 | } | ||
| 611 | vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1; | ||
| 612 | if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) { | ||
| 613 | kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7); | ||
| 614 | vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK); | ||
| 615 | } | ||
| 616 | break; | ||
| 617 | } | ||
| 618 | |||
| 619 | return 0; | ||
| 620 | } | ||
| 621 | EXPORT_SYMBOL_GPL(kvm_set_dr); | ||
| 622 | |||
| 623 | int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val) | ||
| 624 | { | ||
| 625 | switch (dr) { | ||
| 626 | case 0 ... 3: | ||
| 627 | *val = vcpu->arch.db[dr]; | ||
| 628 | break; | ||
| 629 | case 4: | ||
| 630 | if (kvm_read_cr4_bits(vcpu, X86_CR4_DE)) { | ||
| 631 | kvm_queue_exception(vcpu, UD_VECTOR); | ||
| 632 | return 1; | ||
| 633 | } | ||
| 634 | /* fall through */ | ||
| 635 | case 6: | ||
| 636 | *val = vcpu->arch.dr6; | ||
| 637 | break; | ||
| 638 | case 5: | ||
| 639 | if (kvm_read_cr4_bits(vcpu, X86_CR4_DE)) { | ||
| 640 | kvm_queue_exception(vcpu, UD_VECTOR); | ||
| 641 | return 1; | ||
| 642 | } | ||
| 643 | /* fall through */ | ||
| 644 | default: /* 7 */ | ||
| 645 | *val = vcpu->arch.dr7; | ||
| 646 | break; | ||
| 647 | } | ||
| 648 | |||
| 649 | return 0; | ||
| 650 | } | ||
| 651 | EXPORT_SYMBOL_GPL(kvm_get_dr); | ||
| 652 | |||
| 595 | static inline u32 bit(int bitno) | 653 | static inline u32 bit(int bitno) |
| 596 | { | 654 | { |
| 597 | return 1 << (bitno & 31); | 655 | return 1 << (bitno & 31); |
| @@ -606,9 +664,10 @@ static inline u32 bit(int bitno) | |||
| 606 | * kvm-specific. Those are put in the beginning of the list. | 664 | * kvm-specific. Those are put in the beginning of the list. |
| 607 | */ | 665 | */ |
| 608 | 666 | ||
| 609 | #define KVM_SAVE_MSRS_BEGIN 5 | 667 | #define KVM_SAVE_MSRS_BEGIN 7 |
| 610 | static u32 msrs_to_save[] = { | 668 | static u32 msrs_to_save[] = { |
| 611 | MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK, | 669 | MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK, |
| 670 | MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW, | ||
| 612 | HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL, | 671 | HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL, |
| 613 | HV_X64_MSR_APIC_ASSIST_PAGE, | 672 | HV_X64_MSR_APIC_ASSIST_PAGE, |
| 614 | MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP, | 673 | MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP, |
| @@ -625,48 +684,42 @@ static u32 emulated_msrs[] = { | |||
| 625 | MSR_IA32_MISC_ENABLE, | 684 | MSR_IA32_MISC_ENABLE, |
| 626 | }; | 685 | }; |
| 627 | 686 | ||
| 628 | static void set_efer(struct kvm_vcpu *vcpu, u64 efer) | 687 | static int set_efer(struct kvm_vcpu *vcpu, u64 efer) |
| 629 | { | 688 | { |
| 630 | if (efer & efer_reserved_bits) { | 689 | if (efer & efer_reserved_bits) |
| 631 | kvm_inject_gp(vcpu, 0); | 690 | return 1; |
| 632 | return; | ||
| 633 | } | ||
| 634 | 691 | ||
| 635 | if (is_paging(vcpu) | 692 | if (is_paging(vcpu) |
| 636 | && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME)) { | 693 | && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME)) |
| 637 | kvm_inject_gp(vcpu, 0); | 694 | return 1; |
| 638 | return; | ||
| 639 | } | ||
| 640 | 695 | ||
| 641 | if (efer & EFER_FFXSR) { | 696 | if (efer & EFER_FFXSR) { |
| 642 | struct kvm_cpuid_entry2 *feat; | 697 | struct kvm_cpuid_entry2 *feat; |
| 643 | 698 | ||
| 644 | feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0); | 699 | feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0); |
| 645 | if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) { | 700 | if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) |
| 646 | kvm_inject_gp(vcpu, 0); | 701 | return 1; |
| 647 | return; | ||
| 648 | } | ||
| 649 | } | 702 | } |
| 650 | 703 | ||
| 651 | if (efer & EFER_SVME) { | 704 | if (efer & EFER_SVME) { |
| 652 | struct kvm_cpuid_entry2 *feat; | 705 | struct kvm_cpuid_entry2 *feat; |
| 653 | 706 | ||
| 654 | feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0); | 707 | feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0); |
| 655 | if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) { | 708 | if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) |
| 656 | kvm_inject_gp(vcpu, 0); | 709 | return 1; |
| 657 | return; | ||
| 658 | } | ||
| 659 | } | 710 | } |
| 660 | 711 | ||
| 661 | kvm_x86_ops->set_efer(vcpu, efer); | ||
| 662 | |||
| 663 | efer &= ~EFER_LMA; | 712 | efer &= ~EFER_LMA; |
| 664 | efer |= vcpu->arch.efer & EFER_LMA; | 713 | efer |= vcpu->arch.efer & EFER_LMA; |
| 665 | 714 | ||
| 715 | kvm_x86_ops->set_efer(vcpu, efer); | ||
| 716 | |||
| 666 | vcpu->arch.efer = efer; | 717 | vcpu->arch.efer = efer; |
| 667 | 718 | ||
| 668 | vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled; | 719 | vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled; |
| 669 | kvm_mmu_reset_context(vcpu); | 720 | kvm_mmu_reset_context(vcpu); |
| 721 | |||
| 722 | return 0; | ||
| 670 | } | 723 | } |
| 671 | 724 | ||
| 672 | void kvm_enable_efer_bits(u64 mask) | 725 | void kvm_enable_efer_bits(u64 mask) |
| @@ -696,14 +749,22 @@ static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data) | |||
| 696 | 749 | ||
| 697 | static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock) | 750 | static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock) |
| 698 | { | 751 | { |
| 699 | static int version; | 752 | int version; |
| 753 | int r; | ||
| 700 | struct pvclock_wall_clock wc; | 754 | struct pvclock_wall_clock wc; |
| 701 | struct timespec boot; | 755 | struct timespec boot; |
| 702 | 756 | ||
| 703 | if (!wall_clock) | 757 | if (!wall_clock) |
| 704 | return; | 758 | return; |
| 705 | 759 | ||
| 706 | version++; | 760 | r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version)); |
| 761 | if (r) | ||
| 762 | return; | ||
| 763 | |||
| 764 | if (version & 1) | ||
| 765 | ++version; /* first time write, random junk */ | ||
| 766 | |||
| 767 | ++version; | ||
| 707 | 768 | ||
| 708 | kvm_write_guest(kvm, wall_clock, &version, sizeof(version)); | 769 | kvm_write_guest(kvm, wall_clock, &version, sizeof(version)); |
| 709 | 770 | ||
| @@ -796,6 +857,8 @@ static void kvm_write_guest_time(struct kvm_vcpu *v) | |||
| 796 | vcpu->hv_clock.system_time = ts.tv_nsec + | 857 | vcpu->hv_clock.system_time = ts.tv_nsec + |
| 797 | (NSEC_PER_SEC * (u64)ts.tv_sec) + v->kvm->arch.kvmclock_offset; | 858 | (NSEC_PER_SEC * (u64)ts.tv_sec) + v->kvm->arch.kvmclock_offset; |
| 798 | 859 | ||
| 860 | vcpu->hv_clock.flags = 0; | ||
| 861 | |||
| 799 | /* | 862 | /* |
| 800 | * The interface expects us to write an even number signaling that the | 863 | * The interface expects us to write an even number signaling that the |
| 801 | * update is finished. Since the guest won't see the intermediate | 864 | * update is finished. Since the guest won't see the intermediate |
| @@ -1087,10 +1150,10 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data) | |||
| 1087 | { | 1150 | { |
| 1088 | switch (msr) { | 1151 | switch (msr) { |
| 1089 | case MSR_EFER: | 1152 | case MSR_EFER: |
| 1090 | set_efer(vcpu, data); | 1153 | return set_efer(vcpu, data); |
| 1091 | break; | ||
| 1092 | case MSR_K7_HWCR: | 1154 | case MSR_K7_HWCR: |
| 1093 | data &= ~(u64)0x40; /* ignore flush filter disable */ | 1155 | data &= ~(u64)0x40; /* ignore flush filter disable */ |
| 1156 | data &= ~(u64)0x100; /* ignore ignne emulation enable */ | ||
| 1094 | if (data != 0) { | 1157 | if (data != 0) { |
| 1095 | pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n", | 1158 | pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n", |
| 1096 | data); | 1159 | data); |
| @@ -1133,10 +1196,12 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data) | |||
| 1133 | case MSR_IA32_MISC_ENABLE: | 1196 | case MSR_IA32_MISC_ENABLE: |
| 1134 | vcpu->arch.ia32_misc_enable_msr = data; | 1197 | vcpu->arch.ia32_misc_enable_msr = data; |
| 1135 | break; | 1198 | break; |
| 1199 | case MSR_KVM_WALL_CLOCK_NEW: | ||
| 1136 | case MSR_KVM_WALL_CLOCK: | 1200 | case MSR_KVM_WALL_CLOCK: |
| 1137 | vcpu->kvm->arch.wall_clock = data; | 1201 | vcpu->kvm->arch.wall_clock = data; |
| 1138 | kvm_write_wall_clock(vcpu->kvm, data); | 1202 | kvm_write_wall_clock(vcpu->kvm, data); |
| 1139 | break; | 1203 | break; |
| 1204 | case MSR_KVM_SYSTEM_TIME_NEW: | ||
| 1140 | case MSR_KVM_SYSTEM_TIME: { | 1205 | case MSR_KVM_SYSTEM_TIME: { |
| 1141 | if (vcpu->arch.time_page) { | 1206 | if (vcpu->arch.time_page) { |
| 1142 | kvm_release_page_dirty(vcpu->arch.time_page); | 1207 | kvm_release_page_dirty(vcpu->arch.time_page); |
| @@ -1408,9 +1473,11 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata) | |||
| 1408 | data = vcpu->arch.efer; | 1473 | data = vcpu->arch.efer; |
| 1409 | break; | 1474 | break; |
| 1410 | case MSR_KVM_WALL_CLOCK: | 1475 | case MSR_KVM_WALL_CLOCK: |
| 1476 | case MSR_KVM_WALL_CLOCK_NEW: | ||
| 1411 | data = vcpu->kvm->arch.wall_clock; | 1477 | data = vcpu->kvm->arch.wall_clock; |
| 1412 | break; | 1478 | break; |
| 1413 | case MSR_KVM_SYSTEM_TIME: | 1479 | case MSR_KVM_SYSTEM_TIME: |
| 1480 | case MSR_KVM_SYSTEM_TIME_NEW: | ||
| 1414 | data = vcpu->arch.time; | 1481 | data = vcpu->arch.time; |
| 1415 | break; | 1482 | break; |
| 1416 | case MSR_IA32_P5_MC_ADDR: | 1483 | case MSR_IA32_P5_MC_ADDR: |
| @@ -1549,6 +1616,7 @@ int kvm_dev_ioctl_check_extension(long ext) | |||
| 1549 | case KVM_CAP_HYPERV_VAPIC: | 1616 | case KVM_CAP_HYPERV_VAPIC: |
| 1550 | case KVM_CAP_HYPERV_SPIN: | 1617 | case KVM_CAP_HYPERV_SPIN: |
| 1551 | case KVM_CAP_PCI_SEGMENT: | 1618 | case KVM_CAP_PCI_SEGMENT: |
| 1619 | case KVM_CAP_DEBUGREGS: | ||
| 1552 | case KVM_CAP_X86_ROBUST_SINGLESTEP: | 1620 | case KVM_CAP_X86_ROBUST_SINGLESTEP: |
| 1553 | r = 1; | 1621 | r = 1; |
| 1554 | break; | 1622 | break; |
| @@ -1769,6 +1837,7 @@ static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu, | |||
| 1769 | { | 1837 | { |
| 1770 | int r; | 1838 | int r; |
| 1771 | 1839 | ||
| 1840 | vcpu_load(vcpu); | ||
| 1772 | r = -E2BIG; | 1841 | r = -E2BIG; |
| 1773 | if (cpuid->nent < vcpu->arch.cpuid_nent) | 1842 | if (cpuid->nent < vcpu->arch.cpuid_nent) |
| 1774 | goto out; | 1843 | goto out; |
| @@ -1780,6 +1849,7 @@ static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu, | |||
| 1780 | 1849 | ||
| 1781 | out: | 1850 | out: |
| 1782 | cpuid->nent = vcpu->arch.cpuid_nent; | 1851 | cpuid->nent = vcpu->arch.cpuid_nent; |
| 1852 | vcpu_put(vcpu); | ||
| 1783 | return r; | 1853 | return r; |
| 1784 | } | 1854 | } |
| 1785 | 1855 | ||
| @@ -1910,6 +1980,24 @@ static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function, | |||
| 1910 | } | 1980 | } |
| 1911 | break; | 1981 | break; |
| 1912 | } | 1982 | } |
| 1983 | case KVM_CPUID_SIGNATURE: { | ||
| 1984 | char signature[12] = "KVMKVMKVM\0\0"; | ||
| 1985 | u32 *sigptr = (u32 *)signature; | ||
| 1986 | entry->eax = 0; | ||
| 1987 | entry->ebx = sigptr[0]; | ||
| 1988 | entry->ecx = sigptr[1]; | ||
| 1989 | entry->edx = sigptr[2]; | ||
| 1990 | break; | ||
| 1991 | } | ||
| 1992 | case KVM_CPUID_FEATURES: | ||
| 1993 | entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) | | ||
| 1994 | (1 << KVM_FEATURE_NOP_IO_DELAY) | | ||
| 1995 | (1 << KVM_FEATURE_CLOCKSOURCE2) | | ||
| 1996 | (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT); | ||
| 1997 | entry->ebx = 0; | ||
| 1998 | entry->ecx = 0; | ||
| 1999 | entry->edx = 0; | ||
| 2000 | break; | ||
| 1913 | case 0x80000000: | 2001 | case 0x80000000: |
| 1914 | entry->eax = min(entry->eax, 0x8000001a); | 2002 | entry->eax = min(entry->eax, 0x8000001a); |
| 1915 | break; | 2003 | break; |
| @@ -1918,6 +2006,9 @@ static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function, | |||
| 1918 | entry->ecx &= kvm_supported_word6_x86_features; | 2006 | entry->ecx &= kvm_supported_word6_x86_features; |
| 1919 | break; | 2007 | break; |
| 1920 | } | 2008 | } |
| 2009 | |||
| 2010 | kvm_x86_ops->set_supported_cpuid(function, entry); | ||
| 2011 | |||
| 1921 | put_cpu(); | 2012 | put_cpu(); |
| 1922 | } | 2013 | } |
| 1923 | 2014 | ||
| @@ -1953,6 +2044,23 @@ static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid, | |||
| 1953 | for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func) | 2044 | for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func) |
| 1954 | do_cpuid_ent(&cpuid_entries[nent], func, 0, | 2045 | do_cpuid_ent(&cpuid_entries[nent], func, 0, |
| 1955 | &nent, cpuid->nent); | 2046 | &nent, cpuid->nent); |
| 2047 | |||
| 2048 | |||
| 2049 | |||
| 2050 | r = -E2BIG; | ||
| 2051 | if (nent >= cpuid->nent) | ||
| 2052 | goto out_free; | ||
| 2053 | |||
| 2054 | do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent, | ||
| 2055 | cpuid->nent); | ||
| 2056 | |||
| 2057 | r = -E2BIG; | ||
| 2058 | if (nent >= cpuid->nent) | ||
| 2059 | goto out_free; | ||
| 2060 | |||
| 2061 | do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent, | ||
| 2062 | cpuid->nent); | ||
| 2063 | |||
| 1956 | r = -E2BIG; | 2064 | r = -E2BIG; |
| 1957 | if (nent >= cpuid->nent) | 2065 | if (nent >= cpuid->nent) |
| 1958 | goto out_free; | 2066 | goto out_free; |
| @@ -2032,6 +2140,7 @@ static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu, | |||
| 2032 | int r; | 2140 | int r; |
| 2033 | unsigned bank_num = mcg_cap & 0xff, bank; | 2141 | unsigned bank_num = mcg_cap & 0xff, bank; |
| 2034 | 2142 | ||
| 2143 | vcpu_load(vcpu); | ||
| 2035 | r = -EINVAL; | 2144 | r = -EINVAL; |
| 2036 | if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS) | 2145 | if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS) |
| 2037 | goto out; | 2146 | goto out; |
| @@ -2046,6 +2155,7 @@ static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu, | |||
| 2046 | for (bank = 0; bank < bank_num; bank++) | 2155 | for (bank = 0; bank < bank_num; bank++) |
| 2047 | vcpu->arch.mce_banks[bank*4] = ~(u64)0; | 2156 | vcpu->arch.mce_banks[bank*4] = ~(u64)0; |
| 2048 | out: | 2157 | out: |
| 2158 | vcpu_put(vcpu); | ||
| 2049 | return r; | 2159 | return r; |
| 2050 | } | 2160 | } |
| 2051 | 2161 | ||
| @@ -2105,14 +2215,20 @@ static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu, | |||
| 2105 | { | 2215 | { |
| 2106 | vcpu_load(vcpu); | 2216 | vcpu_load(vcpu); |
| 2107 | 2217 | ||
| 2108 | events->exception.injected = vcpu->arch.exception.pending; | 2218 | events->exception.injected = |
| 2219 | vcpu->arch.exception.pending && | ||
| 2220 | !kvm_exception_is_soft(vcpu->arch.exception.nr); | ||
| 2109 | events->exception.nr = vcpu->arch.exception.nr; | 2221 | events->exception.nr = vcpu->arch.exception.nr; |
| 2110 | events->exception.has_error_code = vcpu->arch.exception.has_error_code; | 2222 | events->exception.has_error_code = vcpu->arch.exception.has_error_code; |
| 2111 | events->exception.error_code = vcpu->arch.exception.error_code; | 2223 | events->exception.error_code = vcpu->arch.exception.error_code; |
| 2112 | 2224 | ||
| 2113 | events->interrupt.injected = vcpu->arch.interrupt.pending; | 2225 | events->interrupt.injected = |
| 2226 | vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft; | ||
| 2114 | events->interrupt.nr = vcpu->arch.interrupt.nr; | 2227 | events->interrupt.nr = vcpu->arch.interrupt.nr; |
| 2115 | events->interrupt.soft = vcpu->arch.interrupt.soft; | 2228 | events->interrupt.soft = 0; |
| 2229 | events->interrupt.shadow = | ||
| 2230 | kvm_x86_ops->get_interrupt_shadow(vcpu, | ||
| 2231 | KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI); | ||
| 2116 | 2232 | ||
| 2117 | events->nmi.injected = vcpu->arch.nmi_injected; | 2233 | events->nmi.injected = vcpu->arch.nmi_injected; |
| 2118 | events->nmi.pending = vcpu->arch.nmi_pending; | 2234 | events->nmi.pending = vcpu->arch.nmi_pending; |
| @@ -2121,7 +2237,8 @@ static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu, | |||
| 2121 | events->sipi_vector = vcpu->arch.sipi_vector; | 2237 | events->sipi_vector = vcpu->arch.sipi_vector; |
| 2122 | 2238 | ||
| 2123 | events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING | 2239 | events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING |
| 2124 | | KVM_VCPUEVENT_VALID_SIPI_VECTOR); | 2240 | | KVM_VCPUEVENT_VALID_SIPI_VECTOR |
| 2241 | | KVM_VCPUEVENT_VALID_SHADOW); | ||
| 2125 | 2242 | ||
| 2126 | vcpu_put(vcpu); | 2243 | vcpu_put(vcpu); |
| 2127 | } | 2244 | } |
| @@ -2130,7 +2247,8 @@ static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu, | |||
| 2130 | struct kvm_vcpu_events *events) | 2247 | struct kvm_vcpu_events *events) |
| 2131 | { | 2248 | { |
| 2132 | if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING | 2249 | if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING |
| 2133 | | KVM_VCPUEVENT_VALID_SIPI_VECTOR)) | 2250 | | KVM_VCPUEVENT_VALID_SIPI_VECTOR |
| 2251 | | KVM_VCPUEVENT_VALID_SHADOW)) | ||
| 2134 | return -EINVAL; | 2252 | return -EINVAL; |
| 2135 | 2253 | ||
| 2136 | vcpu_load(vcpu); | 2254 | vcpu_load(vcpu); |
| @@ -2145,6 +2263,9 @@ static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu, | |||
| 2145 | vcpu->arch.interrupt.soft = events->interrupt.soft; | 2263 | vcpu->arch.interrupt.soft = events->interrupt.soft; |
| 2146 | if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm)) | 2264 | if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm)) |
| 2147 | kvm_pic_clear_isr_ack(vcpu->kvm); | 2265 | kvm_pic_clear_isr_ack(vcpu->kvm); |
| 2266 | if (events->flags & KVM_VCPUEVENT_VALID_SHADOW) | ||
| 2267 | kvm_x86_ops->set_interrupt_shadow(vcpu, | ||
| 2268 | events->interrupt.shadow); | ||
| 2148 | 2269 | ||
| 2149 | vcpu->arch.nmi_injected = events->nmi.injected; | 2270 | vcpu->arch.nmi_injected = events->nmi.injected; |
| 2150 | if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING) | 2271 | if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING) |
| @@ -2159,6 +2280,36 @@ static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu, | |||
| 2159 | return 0; | 2280 | return 0; |
| 2160 | } | 2281 | } |
| 2161 | 2282 | ||
| 2283 | static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu, | ||
| 2284 | struct kvm_debugregs *dbgregs) | ||
| 2285 | { | ||
| 2286 | vcpu_load(vcpu); | ||
| 2287 | |||
| 2288 | memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db)); | ||
| 2289 | dbgregs->dr6 = vcpu->arch.dr6; | ||
| 2290 | dbgregs->dr7 = vcpu->arch.dr7; | ||
| 2291 | dbgregs->flags = 0; | ||
| 2292 | |||
| 2293 | vcpu_put(vcpu); | ||
| 2294 | } | ||
| 2295 | |||
| 2296 | static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu, | ||
| 2297 | struct kvm_debugregs *dbgregs) | ||
| 2298 | { | ||
| 2299 | if (dbgregs->flags) | ||
| 2300 | return -EINVAL; | ||
| 2301 | |||
| 2302 | vcpu_load(vcpu); | ||
| 2303 | |||
| 2304 | memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db)); | ||
| 2305 | vcpu->arch.dr6 = dbgregs->dr6; | ||
| 2306 | vcpu->arch.dr7 = dbgregs->dr7; | ||
| 2307 | |||
| 2308 | vcpu_put(vcpu); | ||
| 2309 | |||
| 2310 | return 0; | ||
| 2311 | } | ||
| 2312 | |||
| 2162 | long kvm_arch_vcpu_ioctl(struct file *filp, | 2313 | long kvm_arch_vcpu_ioctl(struct file *filp, |
| 2163 | unsigned int ioctl, unsigned long arg) | 2314 | unsigned int ioctl, unsigned long arg) |
| 2164 | { | 2315 | { |
| @@ -2313,7 +2464,9 @@ long kvm_arch_vcpu_ioctl(struct file *filp, | |||
| 2313 | r = -EFAULT; | 2464 | r = -EFAULT; |
| 2314 | if (copy_from_user(&mce, argp, sizeof mce)) | 2465 | if (copy_from_user(&mce, argp, sizeof mce)) |
| 2315 | goto out; | 2466 | goto out; |
| 2467 | vcpu_load(vcpu); | ||
| 2316 | r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce); | 2468 | r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce); |
| 2469 | vcpu_put(vcpu); | ||
| 2317 | break; | 2470 | break; |
| 2318 | } | 2471 | } |
| 2319 | case KVM_GET_VCPU_EVENTS: { | 2472 | case KVM_GET_VCPU_EVENTS: { |
| @@ -2337,6 +2490,29 @@ long kvm_arch_vcpu_ioctl(struct file *filp, | |||
| 2337 | r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events); | 2490 | r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events); |
| 2338 | break; | 2491 | break; |
| 2339 | } | 2492 | } |
| 2493 | case KVM_GET_DEBUGREGS: { | ||
| 2494 | struct kvm_debugregs dbgregs; | ||
| 2495 | |||
| 2496 | kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs); | ||
| 2497 | |||
| 2498 | r = -EFAULT; | ||
| 2499 | if (copy_to_user(argp, &dbgregs, | ||
| 2500 | sizeof(struct kvm_debugregs))) | ||
| 2501 | break; | ||
| 2502 | r = 0; | ||
| 2503 | break; | ||
| 2504 | } | ||
| 2505 | case KVM_SET_DEBUGREGS: { | ||
| 2506 | struct kvm_debugregs dbgregs; | ||
| 2507 | |||
| 2508 | r = -EFAULT; | ||
| 2509 | if (copy_from_user(&dbgregs, argp, | ||
| 2510 | sizeof(struct kvm_debugregs))) | ||
| 2511 | break; | ||
| 2512 | |||
| 2513 | r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs); | ||
| 2514 | break; | ||
| 2515 | } | ||
| 2340 | default: | 2516 | default: |
| 2341 | r = -EINVAL; | 2517 | r = -EINVAL; |
| 2342 | } | 2518 | } |
| @@ -2390,7 +2566,7 @@ gfn_t unalias_gfn_instantiation(struct kvm *kvm, gfn_t gfn) | |||
| 2390 | struct kvm_mem_alias *alias; | 2566 | struct kvm_mem_alias *alias; |
| 2391 | struct kvm_mem_aliases *aliases; | 2567 | struct kvm_mem_aliases *aliases; |
| 2392 | 2568 | ||
| 2393 | aliases = rcu_dereference(kvm->arch.aliases); | 2569 | aliases = kvm_aliases(kvm); |
| 2394 | 2570 | ||
| 2395 | for (i = 0; i < aliases->naliases; ++i) { | 2571 | for (i = 0; i < aliases->naliases; ++i) { |
| 2396 | alias = &aliases->aliases[i]; | 2572 | alias = &aliases->aliases[i]; |
| @@ -2409,7 +2585,7 @@ gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn) | |||
| 2409 | struct kvm_mem_alias *alias; | 2585 | struct kvm_mem_alias *alias; |
| 2410 | struct kvm_mem_aliases *aliases; | 2586 | struct kvm_mem_aliases *aliases; |
| 2411 | 2587 | ||
| 2412 | aliases = rcu_dereference(kvm->arch.aliases); | 2588 | aliases = kvm_aliases(kvm); |
| 2413 | 2589 | ||
| 2414 | for (i = 0; i < aliases->naliases; ++i) { | 2590 | for (i = 0; i < aliases->naliases; ++i) { |
| 2415 | alias = &aliases->aliases[i]; | 2591 | alias = &aliases->aliases[i]; |
| @@ -2804,11 +2980,13 @@ long kvm_arch_vm_ioctl(struct file *filp, | |||
| 2804 | r = -EFAULT; | 2980 | r = -EFAULT; |
| 2805 | if (copy_from_user(&irq_event, argp, sizeof irq_event)) | 2981 | if (copy_from_user(&irq_event, argp, sizeof irq_event)) |
| 2806 | goto out; | 2982 | goto out; |
| 2983 | r = -ENXIO; | ||
| 2807 | if (irqchip_in_kernel(kvm)) { | 2984 | if (irqchip_in_kernel(kvm)) { |
| 2808 | __s32 status; | 2985 | __s32 status; |
| 2809 | status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID, | 2986 | status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID, |
| 2810 | irq_event.irq, irq_event.level); | 2987 | irq_event.irq, irq_event.level); |
| 2811 | if (ioctl == KVM_IRQ_LINE_STATUS) { | 2988 | if (ioctl == KVM_IRQ_LINE_STATUS) { |
| 2989 | r = -EFAULT; | ||
| 2812 | irq_event.status = status; | 2990 | irq_event.status = status; |
| 2813 | if (copy_to_user(argp, &irq_event, | 2991 | if (copy_to_user(argp, &irq_event, |
| 2814 | sizeof irq_event)) | 2992 | sizeof irq_event)) |
| @@ -3024,6 +3202,18 @@ static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v) | |||
| 3024 | return kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, len, v); | 3202 | return kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, len, v); |
| 3025 | } | 3203 | } |
| 3026 | 3204 | ||
| 3205 | static void kvm_set_segment(struct kvm_vcpu *vcpu, | ||
| 3206 | struct kvm_segment *var, int seg) | ||
| 3207 | { | ||
| 3208 | kvm_x86_ops->set_segment(vcpu, var, seg); | ||
| 3209 | } | ||
| 3210 | |||
| 3211 | void kvm_get_segment(struct kvm_vcpu *vcpu, | ||
| 3212 | struct kvm_segment *var, int seg) | ||
| 3213 | { | ||
| 3214 | kvm_x86_ops->get_segment(vcpu, var, seg); | ||
| 3215 | } | ||
| 3216 | |||
| 3027 | gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, u32 *error) | 3217 | gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, u32 *error) |
| 3028 | { | 3218 | { |
| 3029 | u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0; | 3219 | u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0; |
| @@ -3104,14 +3294,17 @@ static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes, | |||
| 3104 | return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, error); | 3294 | return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, error); |
| 3105 | } | 3295 | } |
| 3106 | 3296 | ||
| 3107 | static int kvm_write_guest_virt(gva_t addr, void *val, unsigned int bytes, | 3297 | static int kvm_write_guest_virt_system(gva_t addr, void *val, |
| 3108 | struct kvm_vcpu *vcpu, u32 *error) | 3298 | unsigned int bytes, |
| 3299 | struct kvm_vcpu *vcpu, | ||
| 3300 | u32 *error) | ||
| 3109 | { | 3301 | { |
| 3110 | void *data = val; | 3302 | void *data = val; |
| 3111 | int r = X86EMUL_CONTINUE; | 3303 | int r = X86EMUL_CONTINUE; |
| 3112 | 3304 | ||
| 3113 | while (bytes) { | 3305 | while (bytes) { |
| 3114 | gpa_t gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, error); | 3306 | gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr, |
| 3307 | PFERR_WRITE_MASK, error); | ||
| 3115 | unsigned offset = addr & (PAGE_SIZE-1); | 3308 | unsigned offset = addr & (PAGE_SIZE-1); |
| 3116 | unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset); | 3309 | unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset); |
| 3117 | int ret; | 3310 | int ret; |
| @@ -3134,7 +3327,6 @@ out: | |||
| 3134 | return r; | 3327 | return r; |
| 3135 | } | 3328 | } |
| 3136 | 3329 | ||
| 3137 | |||
| 3138 | static int emulator_read_emulated(unsigned long addr, | 3330 | static int emulator_read_emulated(unsigned long addr, |
| 3139 | void *val, | 3331 | void *val, |
| 3140 | unsigned int bytes, | 3332 | unsigned int bytes, |
| @@ -3237,9 +3429,9 @@ mmio: | |||
| 3237 | } | 3429 | } |
| 3238 | 3430 | ||
| 3239 | int emulator_write_emulated(unsigned long addr, | 3431 | int emulator_write_emulated(unsigned long addr, |
| 3240 | const void *val, | 3432 | const void *val, |
| 3241 | unsigned int bytes, | 3433 | unsigned int bytes, |
| 3242 | struct kvm_vcpu *vcpu) | 3434 | struct kvm_vcpu *vcpu) |
| 3243 | { | 3435 | { |
| 3244 | /* Crossing a page boundary? */ | 3436 | /* Crossing a page boundary? */ |
| 3245 | if (((addr + bytes - 1) ^ addr) & PAGE_MASK) { | 3437 | if (((addr + bytes - 1) ^ addr) & PAGE_MASK) { |
| @@ -3257,45 +3449,150 @@ int emulator_write_emulated(unsigned long addr, | |||
| 3257 | } | 3449 | } |
| 3258 | EXPORT_SYMBOL_GPL(emulator_write_emulated); | 3450 | EXPORT_SYMBOL_GPL(emulator_write_emulated); |
| 3259 | 3451 | ||
| 3452 | #define CMPXCHG_TYPE(t, ptr, old, new) \ | ||
| 3453 | (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old)) | ||
| 3454 | |||
| 3455 | #ifdef CONFIG_X86_64 | ||
| 3456 | # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new) | ||
| 3457 | #else | ||
| 3458 | # define CMPXCHG64(ptr, old, new) \ | ||
| 3459 | (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old)) | ||
| 3460 | #endif | ||
| 3461 | |||
| 3260 | static int emulator_cmpxchg_emulated(unsigned long addr, | 3462 | static int emulator_cmpxchg_emulated(unsigned long addr, |
| 3261 | const void *old, | 3463 | const void *old, |
| 3262 | const void *new, | 3464 | const void *new, |
| 3263 | unsigned int bytes, | 3465 | unsigned int bytes, |
| 3264 | struct kvm_vcpu *vcpu) | 3466 | struct kvm_vcpu *vcpu) |
| 3265 | { | 3467 | { |
| 3266 | printk_once(KERN_WARNING "kvm: emulating exchange as write\n"); | 3468 | gpa_t gpa; |
| 3267 | #ifndef CONFIG_X86_64 | 3469 | struct page *page; |
| 3268 | /* guests cmpxchg8b have to be emulated atomically */ | 3470 | char *kaddr; |
| 3269 | if (bytes == 8) { | 3471 | bool exchanged; |
| 3270 | gpa_t gpa; | ||
| 3271 | struct page *page; | ||
| 3272 | char *kaddr; | ||
| 3273 | u64 val; | ||
| 3274 | 3472 | ||
| 3275 | gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL); | 3473 | /* guests cmpxchg8b have to be emulated atomically */ |
| 3474 | if (bytes > 8 || (bytes & (bytes - 1))) | ||
| 3475 | goto emul_write; | ||
| 3276 | 3476 | ||
| 3277 | if (gpa == UNMAPPED_GVA || | 3477 | gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL); |
| 3278 | (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE) | ||
| 3279 | goto emul_write; | ||
| 3280 | 3478 | ||
| 3281 | if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK)) | 3479 | if (gpa == UNMAPPED_GVA || |
| 3282 | goto emul_write; | 3480 | (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE) |
| 3481 | goto emul_write; | ||
| 3283 | 3482 | ||
| 3284 | val = *(u64 *)new; | 3483 | if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK)) |
| 3484 | goto emul_write; | ||
| 3285 | 3485 | ||
| 3286 | page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT); | 3486 | page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT); |
| 3287 | 3487 | ||
| 3288 | kaddr = kmap_atomic(page, KM_USER0); | 3488 | kaddr = kmap_atomic(page, KM_USER0); |
| 3289 | set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val); | 3489 | kaddr += offset_in_page(gpa); |
| 3290 | kunmap_atomic(kaddr, KM_USER0); | 3490 | switch (bytes) { |
| 3291 | kvm_release_page_dirty(page); | 3491 | case 1: |
| 3492 | exchanged = CMPXCHG_TYPE(u8, kaddr, old, new); | ||
| 3493 | break; | ||
| 3494 | case 2: | ||
| 3495 | exchanged = CMPXCHG_TYPE(u16, kaddr, old, new); | ||
| 3496 | break; | ||
| 3497 | case 4: | ||
| 3498 | exchanged = CMPXCHG_TYPE(u32, kaddr, old, new); | ||
| 3499 | break; | ||
| 3500 | case 8: | ||
| 3501 | exchanged = CMPXCHG64(kaddr, old, new); | ||
| 3502 | break; | ||
| 3503 | default: | ||
| 3504 | BUG(); | ||
| 3292 | } | 3505 | } |
| 3506 | kunmap_atomic(kaddr, KM_USER0); | ||
| 3507 | kvm_release_page_dirty(page); | ||
| 3508 | |||
| 3509 | if (!exchanged) | ||
| 3510 | return X86EMUL_CMPXCHG_FAILED; | ||
| 3511 | |||
| 3512 | kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1); | ||
| 3513 | |||
| 3514 | return X86EMUL_CONTINUE; | ||
| 3515 | |||
| 3293 | emul_write: | 3516 | emul_write: |
| 3294 | #endif | 3517 | printk_once(KERN_WARNING "kvm: emulating exchange as write\n"); |
| 3295 | 3518 | ||
| 3296 | return emulator_write_emulated(addr, new, bytes, vcpu); | 3519 | return emulator_write_emulated(addr, new, bytes, vcpu); |
| 3297 | } | 3520 | } |
| 3298 | 3521 | ||
| 3522 | static int kernel_pio(struct kvm_vcpu *vcpu, void *pd) | ||
| 3523 | { | ||
| 3524 | /* TODO: String I/O for in kernel device */ | ||
| 3525 | int r; | ||
| 3526 | |||
| 3527 | if (vcpu->arch.pio.in) | ||
| 3528 | r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port, | ||
| 3529 | vcpu->arch.pio.size, pd); | ||
| 3530 | else | ||
| 3531 | r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS, | ||
| 3532 | vcpu->arch.pio.port, vcpu->arch.pio.size, | ||
| 3533 | pd); | ||
| 3534 | return r; | ||
| 3535 | } | ||
| 3536 | |||
| 3537 | |||
| 3538 | static int emulator_pio_in_emulated(int size, unsigned short port, void *val, | ||
| 3539 | unsigned int count, struct kvm_vcpu *vcpu) | ||
| 3540 | { | ||
| 3541 | if (vcpu->arch.pio.count) | ||
| 3542 | goto data_avail; | ||
| 3543 | |||
| 3544 | trace_kvm_pio(1, port, size, 1); | ||
| 3545 | |||
| 3546 | vcpu->arch.pio.port = port; | ||
| 3547 | vcpu->arch.pio.in = 1; | ||
| 3548 | vcpu->arch.pio.count = count; | ||
| 3549 | vcpu->arch.pio.size = size; | ||
| 3550 | |||
| 3551 | if (!kernel_pio(vcpu, vcpu->arch.pio_data)) { | ||
| 3552 | data_avail: | ||
| 3553 | memcpy(val, vcpu->arch.pio_data, size * count); | ||
| 3554 | vcpu->arch.pio.count = 0; | ||
| 3555 | return 1; | ||
| 3556 | } | ||
| 3557 | |||
| 3558 | vcpu->run->exit_reason = KVM_EXIT_IO; | ||
| 3559 | vcpu->run->io.direction = KVM_EXIT_IO_IN; | ||
| 3560 | vcpu->run->io.size = size; | ||
| 3561 | vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE; | ||
| 3562 | vcpu->run->io.count = count; | ||
| 3563 | vcpu->run->io.port = port; | ||
| 3564 | |||
| 3565 | return 0; | ||
| 3566 | } | ||
| 3567 | |||
| 3568 | static int emulator_pio_out_emulated(int size, unsigned short port, | ||
| 3569 | const void *val, unsigned int count, | ||
| 3570 | struct kvm_vcpu *vcpu) | ||
| 3571 | { | ||
| 3572 | trace_kvm_pio(0, port, size, 1); | ||
| 3573 | |||
| 3574 | vcpu->arch.pio.port = port; | ||
| 3575 | vcpu->arch.pio.in = 0; | ||
| 3576 | vcpu->arch.pio.count = count; | ||
| 3577 | vcpu->arch.pio.size = size; | ||
| 3578 | |||
| 3579 | memcpy(vcpu->arch.pio_data, val, size * count); | ||
| 3580 | |||
| 3581 | if (!kernel_pio(vcpu, vcpu->arch.pio_data)) { | ||
| 3582 | vcpu->arch.pio.count = 0; | ||
| 3583 | return 1; | ||
| 3584 | } | ||
| 3585 | |||
| 3586 | vcpu->run->exit_reason = KVM_EXIT_IO; | ||
| 3587 | vcpu->run->io.direction = KVM_EXIT_IO_OUT; | ||
| 3588 | vcpu->run->io.size = size; | ||
| 3589 | vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE; | ||
| 3590 | vcpu->run->io.count = count; | ||
| 3591 | vcpu->run->io.port = port; | ||
| 3592 | |||
| 3593 | return 0; | ||
| 3594 | } | ||
| 3595 | |||
| 3299 | static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg) | 3596 | static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg) |
| 3300 | { | 3597 | { |
| 3301 | return kvm_x86_ops->get_segment_base(vcpu, seg); | 3598 | return kvm_x86_ops->get_segment_base(vcpu, seg); |
| @@ -3316,14 +3613,14 @@ int emulate_clts(struct kvm_vcpu *vcpu) | |||
| 3316 | 3613 | ||
| 3317 | int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest) | 3614 | int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest) |
| 3318 | { | 3615 | { |
| 3319 | return kvm_x86_ops->get_dr(ctxt->vcpu, dr, dest); | 3616 | return kvm_get_dr(ctxt->vcpu, dr, dest); |
| 3320 | } | 3617 | } |
| 3321 | 3618 | ||
| 3322 | int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value) | 3619 | int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value) |
| 3323 | { | 3620 | { |
| 3324 | unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U; | 3621 | unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U; |
| 3325 | 3622 | ||
| 3326 | return kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask); | 3623 | return kvm_set_dr(ctxt->vcpu, dr, value & mask); |
| 3327 | } | 3624 | } |
| 3328 | 3625 | ||
| 3329 | void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context) | 3626 | void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context) |
| @@ -3344,12 +3641,167 @@ void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context) | |||
| 3344 | } | 3641 | } |
| 3345 | EXPORT_SYMBOL_GPL(kvm_report_emulation_failure); | 3642 | EXPORT_SYMBOL_GPL(kvm_report_emulation_failure); |
| 3346 | 3643 | ||
| 3644 | static u64 mk_cr_64(u64 curr_cr, u32 new_val) | ||
| 3645 | { | ||
| 3646 | return (curr_cr & ~((1ULL << 32) - 1)) | new_val; | ||
| 3647 | } | ||
| 3648 | |||
| 3649 | static unsigned long emulator_get_cr(int cr, struct kvm_vcpu *vcpu) | ||
| 3650 | { | ||
| 3651 | unsigned long value; | ||
| 3652 | |||
| 3653 | switch (cr) { | ||
| 3654 | case 0: | ||
| 3655 | value = kvm_read_cr0(vcpu); | ||
| 3656 | break; | ||
| 3657 | case 2: | ||
| 3658 | value = vcpu->arch.cr2; | ||
| 3659 | break; | ||
| 3660 | case 3: | ||
| 3661 | value = vcpu->arch.cr3; | ||
| 3662 | break; | ||
| 3663 | case 4: | ||
| 3664 | value = kvm_read_cr4(vcpu); | ||
| 3665 | break; | ||
| 3666 | case 8: | ||
| 3667 | value = kvm_get_cr8(vcpu); | ||
| 3668 | break; | ||
| 3669 | default: | ||
| 3670 | vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr); | ||
| 3671 | return 0; | ||
| 3672 | } | ||
| 3673 | |||
| 3674 | return value; | ||
| 3675 | } | ||
| 3676 | |||
| 3677 | static void emulator_set_cr(int cr, unsigned long val, struct kvm_vcpu *vcpu) | ||
| 3678 | { | ||
| 3679 | switch (cr) { | ||
| 3680 | case 0: | ||
| 3681 | kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val)); | ||
| 3682 | break; | ||
| 3683 | case 2: | ||
| 3684 | vcpu->arch.cr2 = val; | ||
| 3685 | break; | ||
| 3686 | case 3: | ||
| 3687 | kvm_set_cr3(vcpu, val); | ||
| 3688 | break; | ||
| 3689 | case 4: | ||
| 3690 | kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val)); | ||
| 3691 | break; | ||
| 3692 | case 8: | ||
| 3693 | kvm_set_cr8(vcpu, val & 0xfUL); | ||
| 3694 | break; | ||
| 3695 | default: | ||
| 3696 | vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr); | ||
| 3697 | } | ||
| 3698 | } | ||
| 3699 | |||
| 3700 | static int emulator_get_cpl(struct kvm_vcpu *vcpu) | ||
| 3701 | { | ||
| 3702 | return kvm_x86_ops->get_cpl(vcpu); | ||
| 3703 | } | ||
| 3704 | |||
| 3705 | static void emulator_get_gdt(struct desc_ptr *dt, struct kvm_vcpu *vcpu) | ||
| 3706 | { | ||
| 3707 | kvm_x86_ops->get_gdt(vcpu, dt); | ||
| 3708 | } | ||
| 3709 | |||
| 3710 | static bool emulator_get_cached_descriptor(struct desc_struct *desc, int seg, | ||
| 3711 | struct kvm_vcpu *vcpu) | ||
| 3712 | { | ||
| 3713 | struct kvm_segment var; | ||
| 3714 | |||
| 3715 | kvm_get_segment(vcpu, &var, seg); | ||
| 3716 | |||
| 3717 | if (var.unusable) | ||
| 3718 | return false; | ||
| 3719 | |||
| 3720 | if (var.g) | ||
| 3721 | var.limit >>= 12; | ||
| 3722 | set_desc_limit(desc, var.limit); | ||
| 3723 | set_desc_base(desc, (unsigned long)var.base); | ||
| 3724 | desc->type = var.type; | ||
| 3725 | desc->s = var.s; | ||
| 3726 | desc->dpl = var.dpl; | ||
| 3727 | desc->p = var.present; | ||
| 3728 | desc->avl = var.avl; | ||
| 3729 | desc->l = var.l; | ||
| 3730 | desc->d = var.db; | ||
| 3731 | desc->g = var.g; | ||
| 3732 | |||
| 3733 | return true; | ||
| 3734 | } | ||
| 3735 | |||
| 3736 | static void emulator_set_cached_descriptor(struct desc_struct *desc, int seg, | ||
| 3737 | struct kvm_vcpu *vcpu) | ||
| 3738 | { | ||
| 3739 | struct kvm_segment var; | ||
| 3740 | |||
| 3741 | /* needed to preserve selector */ | ||
| 3742 | kvm_get_segment(vcpu, &var, seg); | ||
| 3743 | |||
| 3744 | var.base = get_desc_base(desc); | ||
| 3745 | var.limit = get_desc_limit(desc); | ||
| 3746 | if (desc->g) | ||
| 3747 | var.limit = (var.limit << 12) | 0xfff; | ||
| 3748 | var.type = desc->type; | ||
| 3749 | var.present = desc->p; | ||
| 3750 | var.dpl = desc->dpl; | ||
| 3751 | var.db = desc->d; | ||
| 3752 | var.s = desc->s; | ||
| 3753 | var.l = desc->l; | ||
| 3754 | var.g = desc->g; | ||
| 3755 | var.avl = desc->avl; | ||
| 3756 | var.present = desc->p; | ||
| 3757 | var.unusable = !var.present; | ||
| 3758 | var.padding = 0; | ||
| 3759 | |||
| 3760 | kvm_set_segment(vcpu, &var, seg); | ||
| 3761 | return; | ||
| 3762 | } | ||
| 3763 | |||
| 3764 | static u16 emulator_get_segment_selector(int seg, struct kvm_vcpu *vcpu) | ||
| 3765 | { | ||
| 3766 | struct kvm_segment kvm_seg; | ||
| 3767 | |||
| 3768 | kvm_get_segment(vcpu, &kvm_seg, seg); | ||
| 3769 | return kvm_seg.selector; | ||
| 3770 | } | ||
| 3771 | |||
| 3772 | static void emulator_set_segment_selector(u16 sel, int seg, | ||
| 3773 | struct kvm_vcpu *vcpu) | ||
| 3774 | { | ||
| 3775 | struct kvm_segment kvm_seg; | ||
| 3776 | |||
| 3777 | kvm_get_segment(vcpu, &kvm_seg, seg); | ||
| 3778 | kvm_seg.selector = sel; | ||
| 3779 | kvm_set_segment(vcpu, &kvm_seg, seg); | ||
| 3780 | } | ||
| 3781 | |||
| 3782 | static void emulator_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags) | ||
| 3783 | { | ||
| 3784 | kvm_x86_ops->set_rflags(vcpu, rflags); | ||
| 3785 | } | ||
| 3786 | |||
| 3347 | static struct x86_emulate_ops emulate_ops = { | 3787 | static struct x86_emulate_ops emulate_ops = { |
| 3348 | .read_std = kvm_read_guest_virt_system, | 3788 | .read_std = kvm_read_guest_virt_system, |
| 3789 | .write_std = kvm_write_guest_virt_system, | ||
| 3349 | .fetch = kvm_fetch_guest_virt, | 3790 | .fetch = kvm_fetch_guest_virt, |
| 3350 | .read_emulated = emulator_read_emulated, | 3791 | .read_emulated = emulator_read_emulated, |
| 3351 | .write_emulated = emulator_write_emulated, | 3792 | .write_emulated = emulator_write_emulated, |
| 3352 | .cmpxchg_emulated = emulator_cmpxchg_emulated, | 3793 | .cmpxchg_emulated = emulator_cmpxchg_emulated, |
| 3794 | .pio_in_emulated = emulator_pio_in_emulated, | ||
| 3795 | .pio_out_emulated = emulator_pio_out_emulated, | ||
| 3796 | .get_cached_descriptor = emulator_get_cached_descriptor, | ||
| 3797 | .set_cached_descriptor = emulator_set_cached_descriptor, | ||
| 3798 | .get_segment_selector = emulator_get_segment_selector, | ||
| 3799 | .set_segment_selector = emulator_set_segment_selector, | ||
| 3800 | .get_gdt = emulator_get_gdt, | ||
| 3801 | .get_cr = emulator_get_cr, | ||
| 3802 | .set_cr = emulator_set_cr, | ||
| 3803 | .cpl = emulator_get_cpl, | ||
| 3804 | .set_rflags = emulator_set_rflags, | ||
| 3353 | }; | 3805 | }; |
| 3354 | 3806 | ||
| 3355 | static void cache_all_regs(struct kvm_vcpu *vcpu) | 3807 | static void cache_all_regs(struct kvm_vcpu *vcpu) |
| @@ -3380,14 +3832,14 @@ int emulate_instruction(struct kvm_vcpu *vcpu, | |||
| 3380 | cache_all_regs(vcpu); | 3832 | cache_all_regs(vcpu); |
| 3381 | 3833 | ||
| 3382 | vcpu->mmio_is_write = 0; | 3834 | vcpu->mmio_is_write = 0; |
| 3383 | vcpu->arch.pio.string = 0; | ||
| 3384 | 3835 | ||
| 3385 | if (!(emulation_type & EMULTYPE_NO_DECODE)) { | 3836 | if (!(emulation_type & EMULTYPE_NO_DECODE)) { |
| 3386 | int cs_db, cs_l; | 3837 | int cs_db, cs_l; |
| 3387 | kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l); | 3838 | kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l); |
| 3388 | 3839 | ||
| 3389 | vcpu->arch.emulate_ctxt.vcpu = vcpu; | 3840 | vcpu->arch.emulate_ctxt.vcpu = vcpu; |
| 3390 | vcpu->arch.emulate_ctxt.eflags = kvm_get_rflags(vcpu); | 3841 | vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu); |
| 3842 | vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu); | ||
| 3391 | vcpu->arch.emulate_ctxt.mode = | 3843 | vcpu->arch.emulate_ctxt.mode = |
| 3392 | (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL : | 3844 | (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL : |
| 3393 | (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM) | 3845 | (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM) |
| @@ -3396,6 +3848,7 @@ int emulate_instruction(struct kvm_vcpu *vcpu, | |||
| 3396 | ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16; | 3848 | ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16; |
| 3397 | 3849 | ||
| 3398 | r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops); | 3850 | r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops); |
| 3851 | trace_kvm_emulate_insn_start(vcpu); | ||
| 3399 | 3852 | ||
| 3400 | /* Only allow emulation of specific instructions on #UD | 3853 | /* Only allow emulation of specific instructions on #UD |
| 3401 | * (namely VMMCALL, sysenter, sysexit, syscall)*/ | 3854 | * (namely VMMCALL, sysenter, sysexit, syscall)*/ |
| @@ -3428,6 +3881,7 @@ int emulate_instruction(struct kvm_vcpu *vcpu, | |||
| 3428 | ++vcpu->stat.insn_emulation; | 3881 | ++vcpu->stat.insn_emulation; |
| 3429 | if (r) { | 3882 | if (r) { |
| 3430 | ++vcpu->stat.insn_emulation_fail; | 3883 | ++vcpu->stat.insn_emulation_fail; |
| 3884 | trace_kvm_emulate_insn_failed(vcpu); | ||
| 3431 | if (kvm_mmu_unprotect_page_virt(vcpu, cr2)) | 3885 | if (kvm_mmu_unprotect_page_virt(vcpu, cr2)) |
| 3432 | return EMULATE_DONE; | 3886 | return EMULATE_DONE; |
| 3433 | return EMULATE_FAIL; | 3887 | return EMULATE_FAIL; |
| @@ -3439,16 +3893,20 @@ int emulate_instruction(struct kvm_vcpu *vcpu, | |||
| 3439 | return EMULATE_DONE; | 3893 | return EMULATE_DONE; |
| 3440 | } | 3894 | } |
| 3441 | 3895 | ||
| 3896 | restart: | ||
| 3442 | r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops); | 3897 | r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops); |
| 3443 | shadow_mask = vcpu->arch.emulate_ctxt.interruptibility; | 3898 | shadow_mask = vcpu->arch.emulate_ctxt.interruptibility; |
| 3444 | 3899 | ||
| 3445 | if (r == 0) | 3900 | if (r == 0) |
| 3446 | kvm_x86_ops->set_interrupt_shadow(vcpu, shadow_mask); | 3901 | kvm_x86_ops->set_interrupt_shadow(vcpu, shadow_mask); |
| 3447 | 3902 | ||
| 3448 | if (vcpu->arch.pio.string) | 3903 | if (vcpu->arch.pio.count) { |
| 3904 | if (!vcpu->arch.pio.in) | ||
| 3905 | vcpu->arch.pio.count = 0; | ||
| 3449 | return EMULATE_DO_MMIO; | 3906 | return EMULATE_DO_MMIO; |
| 3907 | } | ||
| 3450 | 3908 | ||
| 3451 | if ((r || vcpu->mmio_is_write) && run) { | 3909 | if (r || vcpu->mmio_is_write) { |
| 3452 | run->exit_reason = KVM_EXIT_MMIO; | 3910 | run->exit_reason = KVM_EXIT_MMIO; |
| 3453 | run->mmio.phys_addr = vcpu->mmio_phys_addr; | 3911 | run->mmio.phys_addr = vcpu->mmio_phys_addr; |
| 3454 | memcpy(run->mmio.data, vcpu->mmio_data, 8); | 3912 | memcpy(run->mmio.data, vcpu->mmio_data, 8); |
| @@ -3458,222 +3916,41 @@ int emulate_instruction(struct kvm_vcpu *vcpu, | |||
| 3458 | 3916 | ||
| 3459 | if (r) { | 3917 | if (r) { |
| 3460 | if (kvm_mmu_unprotect_page_virt(vcpu, cr2)) | 3918 | if (kvm_mmu_unprotect_page_virt(vcpu, cr2)) |
| 3461 | return EMULATE_DONE; | 3919 | goto done; |
| 3462 | if (!vcpu->mmio_needed) { | 3920 | if (!vcpu->mmio_needed) { |
| 3921 | ++vcpu->stat.insn_emulation_fail; | ||
| 3922 | trace_kvm_emulate_insn_failed(vcpu); | ||
| 3463 | kvm_report_emulation_failure(vcpu, "mmio"); | 3923 | kvm_report_emulation_failure(vcpu, "mmio"); |
| 3464 | return EMULATE_FAIL; | 3924 | return EMULATE_FAIL; |
| 3465 | } | 3925 | } |
| 3466 | return EMULATE_DO_MMIO; | 3926 | return EMULATE_DO_MMIO; |
| 3467 | } | 3927 | } |
| 3468 | 3928 | ||
| 3469 | kvm_set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags); | ||
| 3470 | |||
| 3471 | if (vcpu->mmio_is_write) { | 3929 | if (vcpu->mmio_is_write) { |
| 3472 | vcpu->mmio_needed = 0; | 3930 | vcpu->mmio_needed = 0; |
| 3473 | return EMULATE_DO_MMIO; | 3931 | return EMULATE_DO_MMIO; |
| 3474 | } | 3932 | } |
| 3475 | 3933 | ||
| 3476 | return EMULATE_DONE; | 3934 | done: |
| 3477 | } | 3935 | if (vcpu->arch.exception.pending) |
| 3478 | EXPORT_SYMBOL_GPL(emulate_instruction); | 3936 | vcpu->arch.emulate_ctxt.restart = false; |
| 3479 | |||
| 3480 | static int pio_copy_data(struct kvm_vcpu *vcpu) | ||
| 3481 | { | ||
| 3482 | void *p = vcpu->arch.pio_data; | ||
| 3483 | gva_t q = vcpu->arch.pio.guest_gva; | ||
| 3484 | unsigned bytes; | ||
| 3485 | int ret; | ||
| 3486 | u32 error_code; | ||
| 3487 | |||
| 3488 | bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count; | ||
| 3489 | if (vcpu->arch.pio.in) | ||
| 3490 | ret = kvm_write_guest_virt(q, p, bytes, vcpu, &error_code); | ||
| 3491 | else | ||
| 3492 | ret = kvm_read_guest_virt(q, p, bytes, vcpu, &error_code); | ||
| 3493 | |||
| 3494 | if (ret == X86EMUL_PROPAGATE_FAULT) | ||
| 3495 | kvm_inject_page_fault(vcpu, q, error_code); | ||
| 3496 | |||
| 3497 | return ret; | ||
| 3498 | } | ||
| 3499 | |||
| 3500 | int complete_pio(struct kvm_vcpu *vcpu) | ||
| 3501 | { | ||
| 3502 | struct kvm_pio_request *io = &vcpu->arch.pio; | ||
| 3503 | long delta; | ||
| 3504 | int r; | ||
| 3505 | unsigned long val; | ||
| 3506 | |||
| 3507 | if (!io->string) { | ||
| 3508 | if (io->in) { | ||
| 3509 | val = kvm_register_read(vcpu, VCPU_REGS_RAX); | ||
| 3510 | memcpy(&val, vcpu->arch.pio_data, io->size); | ||
| 3511 | kvm_register_write(vcpu, VCPU_REGS_RAX, val); | ||
| 3512 | } | ||
| 3513 | } else { | ||
| 3514 | if (io->in) { | ||
| 3515 | r = pio_copy_data(vcpu); | ||
| 3516 | if (r) | ||
| 3517 | goto out; | ||
| 3518 | } | ||
| 3519 | |||
| 3520 | delta = 1; | ||
| 3521 | if (io->rep) { | ||
| 3522 | delta *= io->cur_count; | ||
| 3523 | /* | ||
| 3524 | * The size of the register should really depend on | ||
| 3525 | * current address size. | ||
| 3526 | */ | ||
| 3527 | val = kvm_register_read(vcpu, VCPU_REGS_RCX); | ||
| 3528 | val -= delta; | ||
| 3529 | kvm_register_write(vcpu, VCPU_REGS_RCX, val); | ||
| 3530 | } | ||
| 3531 | if (io->down) | ||
| 3532 | delta = -delta; | ||
| 3533 | delta *= io->size; | ||
| 3534 | if (io->in) { | ||
| 3535 | val = kvm_register_read(vcpu, VCPU_REGS_RDI); | ||
| 3536 | val += delta; | ||
| 3537 | kvm_register_write(vcpu, VCPU_REGS_RDI, val); | ||
| 3538 | } else { | ||
| 3539 | val = kvm_register_read(vcpu, VCPU_REGS_RSI); | ||
| 3540 | val += delta; | ||
| 3541 | kvm_register_write(vcpu, VCPU_REGS_RSI, val); | ||
| 3542 | } | ||
| 3543 | } | ||
| 3544 | out: | ||
| 3545 | io->count -= io->cur_count; | ||
| 3546 | io->cur_count = 0; | ||
| 3547 | |||
| 3548 | return 0; | ||
| 3549 | } | ||
| 3550 | |||
| 3551 | static int kernel_pio(struct kvm_vcpu *vcpu, void *pd) | ||
| 3552 | { | ||
| 3553 | /* TODO: String I/O for in kernel device */ | ||
| 3554 | int r; | ||
| 3555 | |||
| 3556 | if (vcpu->arch.pio.in) | ||
| 3557 | r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port, | ||
| 3558 | vcpu->arch.pio.size, pd); | ||
| 3559 | else | ||
| 3560 | r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS, | ||
| 3561 | vcpu->arch.pio.port, vcpu->arch.pio.size, | ||
| 3562 | pd); | ||
| 3563 | return r; | ||
| 3564 | } | ||
| 3565 | 3937 | ||
| 3566 | static int pio_string_write(struct kvm_vcpu *vcpu) | 3938 | if (vcpu->arch.emulate_ctxt.restart) |
| 3567 | { | 3939 | goto restart; |
| 3568 | struct kvm_pio_request *io = &vcpu->arch.pio; | ||
| 3569 | void *pd = vcpu->arch.pio_data; | ||
| 3570 | int i, r = 0; | ||
| 3571 | 3940 | ||
| 3572 | for (i = 0; i < io->cur_count; i++) { | 3941 | return EMULATE_DONE; |
| 3573 | if (kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS, | ||
| 3574 | io->port, io->size, pd)) { | ||
| 3575 | r = -EOPNOTSUPP; | ||
| 3576 | break; | ||
| 3577 | } | ||
| 3578 | pd += io->size; | ||
| 3579 | } | ||
| 3580 | return r; | ||
| 3581 | } | ||
| 3582 | |||
| 3583 | int kvm_emulate_pio(struct kvm_vcpu *vcpu, int in, int size, unsigned port) | ||
| 3584 | { | ||
| 3585 | unsigned long val; | ||
| 3586 | |||
| 3587 | trace_kvm_pio(!in, port, size, 1); | ||
| 3588 | |||
| 3589 | vcpu->run->exit_reason = KVM_EXIT_IO; | ||
| 3590 | vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT; | ||
| 3591 | vcpu->run->io.size = vcpu->arch.pio.size = size; | ||
| 3592 | vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE; | ||
| 3593 | vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1; | ||
| 3594 | vcpu->run->io.port = vcpu->arch.pio.port = port; | ||
| 3595 | vcpu->arch.pio.in = in; | ||
| 3596 | vcpu->arch.pio.string = 0; | ||
| 3597 | vcpu->arch.pio.down = 0; | ||
| 3598 | vcpu->arch.pio.rep = 0; | ||
| 3599 | |||
| 3600 | if (!vcpu->arch.pio.in) { | ||
| 3601 | val = kvm_register_read(vcpu, VCPU_REGS_RAX); | ||
| 3602 | memcpy(vcpu->arch.pio_data, &val, 4); | ||
| 3603 | } | ||
| 3604 | |||
| 3605 | if (!kernel_pio(vcpu, vcpu->arch.pio_data)) { | ||
| 3606 | complete_pio(vcpu); | ||
| 3607 | return 1; | ||
| 3608 | } | ||
| 3609 | return 0; | ||
| 3610 | } | 3942 | } |
| 3611 | EXPORT_SYMBOL_GPL(kvm_emulate_pio); | 3943 | EXPORT_SYMBOL_GPL(emulate_instruction); |
| 3612 | 3944 | ||
| 3613 | int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, int in, | 3945 | int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port) |
| 3614 | int size, unsigned long count, int down, | ||
| 3615 | gva_t address, int rep, unsigned port) | ||
| 3616 | { | 3946 | { |
| 3617 | unsigned now, in_page; | 3947 | unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX); |
| 3618 | int ret = 0; | 3948 | int ret = emulator_pio_out_emulated(size, port, &val, 1, vcpu); |
| 3619 | 3949 | /* do not return to emulator after return from userspace */ | |
| 3620 | trace_kvm_pio(!in, port, size, count); | 3950 | vcpu->arch.pio.count = 0; |
| 3621 | |||
| 3622 | vcpu->run->exit_reason = KVM_EXIT_IO; | ||
| 3623 | vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT; | ||
| 3624 | vcpu->run->io.size = vcpu->arch.pio.size = size; | ||
| 3625 | vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE; | ||
| 3626 | vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count; | ||
| 3627 | vcpu->run->io.port = vcpu->arch.pio.port = port; | ||
| 3628 | vcpu->arch.pio.in = in; | ||
| 3629 | vcpu->arch.pio.string = 1; | ||
| 3630 | vcpu->arch.pio.down = down; | ||
| 3631 | vcpu->arch.pio.rep = rep; | ||
| 3632 | |||
| 3633 | if (!count) { | ||
| 3634 | kvm_x86_ops->skip_emulated_instruction(vcpu); | ||
| 3635 | return 1; | ||
| 3636 | } | ||
| 3637 | |||
| 3638 | if (!down) | ||
| 3639 | in_page = PAGE_SIZE - offset_in_page(address); | ||
| 3640 | else | ||
| 3641 | in_page = offset_in_page(address) + size; | ||
| 3642 | now = min(count, (unsigned long)in_page / size); | ||
| 3643 | if (!now) | ||
| 3644 | now = 1; | ||
| 3645 | if (down) { | ||
| 3646 | /* | ||
| 3647 | * String I/O in reverse. Yuck. Kill the guest, fix later. | ||
| 3648 | */ | ||
| 3649 | pr_unimpl(vcpu, "guest string pio down\n"); | ||
| 3650 | kvm_inject_gp(vcpu, 0); | ||
| 3651 | return 1; | ||
| 3652 | } | ||
| 3653 | vcpu->run->io.count = now; | ||
| 3654 | vcpu->arch.pio.cur_count = now; | ||
| 3655 | |||
| 3656 | if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count) | ||
| 3657 | kvm_x86_ops->skip_emulated_instruction(vcpu); | ||
| 3658 | |||
| 3659 | vcpu->arch.pio.guest_gva = address; | ||
| 3660 | |||
| 3661 | if (!vcpu->arch.pio.in) { | ||
| 3662 | /* string PIO write */ | ||
| 3663 | ret = pio_copy_data(vcpu); | ||
| 3664 | if (ret == X86EMUL_PROPAGATE_FAULT) | ||
| 3665 | return 1; | ||
| 3666 | if (ret == 0 && !pio_string_write(vcpu)) { | ||
| 3667 | complete_pio(vcpu); | ||
| 3668 | if (vcpu->arch.pio.count == 0) | ||
| 3669 | ret = 1; | ||
| 3670 | } | ||
| 3671 | } | ||
| 3672 | /* no string PIO read support yet */ | ||
| 3673 | |||
| 3674 | return ret; | 3951 | return ret; |
| 3675 | } | 3952 | } |
| 3676 | EXPORT_SYMBOL_GPL(kvm_emulate_pio_string); | 3953 | EXPORT_SYMBOL_GPL(kvm_fast_pio_out); |
| 3677 | 3954 | ||
| 3678 | static void bounce_off(void *info) | 3955 | static void bounce_off(void *info) |
| 3679 | { | 3956 | { |
| @@ -3996,85 +4273,20 @@ int kvm_fix_hypercall(struct kvm_vcpu *vcpu) | |||
| 3996 | return emulator_write_emulated(rip, instruction, 3, vcpu); | 4273 | return emulator_write_emulated(rip, instruction, 3, vcpu); |
| 3997 | } | 4274 | } |
| 3998 | 4275 | ||
| 3999 | static u64 mk_cr_64(u64 curr_cr, u32 new_val) | ||
| 4000 | { | ||
| 4001 | return (curr_cr & ~((1ULL << 32) - 1)) | new_val; | ||
| 4002 | } | ||
| 4003 | |||
| 4004 | void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base) | 4276 | void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base) |
| 4005 | { | 4277 | { |
| 4006 | struct descriptor_table dt = { limit, base }; | 4278 | struct desc_ptr dt = { limit, base }; |
| 4007 | 4279 | ||
| 4008 | kvm_x86_ops->set_gdt(vcpu, &dt); | 4280 | kvm_x86_ops->set_gdt(vcpu, &dt); |
| 4009 | } | 4281 | } |
| 4010 | 4282 | ||
| 4011 | void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base) | 4283 | void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base) |
| 4012 | { | 4284 | { |
| 4013 | struct descriptor_table dt = { limit, base }; | 4285 | struct desc_ptr dt = { limit, base }; |
| 4014 | 4286 | ||
| 4015 | kvm_x86_ops->set_idt(vcpu, &dt); | 4287 | kvm_x86_ops->set_idt(vcpu, &dt); |
| 4016 | } | 4288 | } |
| 4017 | 4289 | ||
| 4018 | void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw, | ||
| 4019 | unsigned long *rflags) | ||
| 4020 | { | ||
| 4021 | kvm_lmsw(vcpu, msw); | ||
| 4022 | *rflags = kvm_get_rflags(vcpu); | ||
| 4023 | } | ||
| 4024 | |||
| 4025 | unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr) | ||
| 4026 | { | ||
| 4027 | unsigned long value; | ||
| 4028 | |||
| 4029 | switch (cr) { | ||
| 4030 | case 0: | ||
| 4031 | value = kvm_read_cr0(vcpu); | ||
| 4032 | break; | ||
| 4033 | case 2: | ||
| 4034 | value = vcpu->arch.cr2; | ||
| 4035 | break; | ||
| 4036 | case 3: | ||
| 4037 | value = vcpu->arch.cr3; | ||
| 4038 | break; | ||
| 4039 | case 4: | ||
| 4040 | value = kvm_read_cr4(vcpu); | ||
| 4041 | break; | ||
| 4042 | case 8: | ||
| 4043 | value = kvm_get_cr8(vcpu); | ||
| 4044 | break; | ||
| 4045 | default: | ||
| 4046 | vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr); | ||
| 4047 | return 0; | ||
| 4048 | } | ||
| 4049 | |||
| 4050 | return value; | ||
| 4051 | } | ||
| 4052 | |||
| 4053 | void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val, | ||
| 4054 | unsigned long *rflags) | ||
| 4055 | { | ||
| 4056 | switch (cr) { | ||
| 4057 | case 0: | ||
| 4058 | kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val)); | ||
| 4059 | *rflags = kvm_get_rflags(vcpu); | ||
| 4060 | break; | ||
| 4061 | case 2: | ||
| 4062 | vcpu->arch.cr2 = val; | ||
| 4063 | break; | ||
| 4064 | case 3: | ||
| 4065 | kvm_set_cr3(vcpu, val); | ||
| 4066 | break; | ||
| 4067 | case 4: | ||
| 4068 | kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val)); | ||
| 4069 | break; | ||
| 4070 | case 8: | ||
| 4071 | kvm_set_cr8(vcpu, val & 0xfUL); | ||
| 4072 | break; | ||
| 4073 | default: | ||
| 4074 | vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr); | ||
| 4075 | } | ||
| 4076 | } | ||
| 4077 | |||
| 4078 | static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i) | 4290 | static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i) |
| 4079 | { | 4291 | { |
| 4080 | struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i]; | 4292 | struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i]; |
| @@ -4138,9 +4350,13 @@ int cpuid_maxphyaddr(struct kvm_vcpu *vcpu) | |||
| 4138 | { | 4350 | { |
| 4139 | struct kvm_cpuid_entry2 *best; | 4351 | struct kvm_cpuid_entry2 *best; |
| 4140 | 4352 | ||
| 4353 | best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0); | ||
| 4354 | if (!best || best->eax < 0x80000008) | ||
| 4355 | goto not_found; | ||
| 4141 | best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0); | 4356 | best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0); |
| 4142 | if (best) | 4357 | if (best) |
| 4143 | return best->eax & 0xff; | 4358 | return best->eax & 0xff; |
| 4359 | not_found: | ||
| 4144 | return 36; | 4360 | return 36; |
| 4145 | } | 4361 | } |
| 4146 | 4362 | ||
| @@ -4254,9 +4470,13 @@ static void inject_pending_event(struct kvm_vcpu *vcpu) | |||
| 4254 | { | 4470 | { |
| 4255 | /* try to reinject previous events if any */ | 4471 | /* try to reinject previous events if any */ |
| 4256 | if (vcpu->arch.exception.pending) { | 4472 | if (vcpu->arch.exception.pending) { |
| 4473 | trace_kvm_inj_exception(vcpu->arch.exception.nr, | ||
| 4474 | vcpu->arch.exception.has_error_code, | ||
| 4475 | vcpu->arch.exception.error_code); | ||
| 4257 | kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr, | 4476 | kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr, |
| 4258 | vcpu->arch.exception.has_error_code, | 4477 | vcpu->arch.exception.has_error_code, |
| 4259 | vcpu->arch.exception.error_code); | 4478 | vcpu->arch.exception.error_code, |
| 4479 | vcpu->arch.exception.reinject); | ||
| 4260 | return; | 4480 | return; |
| 4261 | } | 4481 | } |
| 4262 | 4482 | ||
| @@ -4486,7 +4706,6 @@ static int __vcpu_run(struct kvm_vcpu *vcpu) | |||
| 4486 | } | 4706 | } |
| 4487 | 4707 | ||
| 4488 | srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx); | 4708 | srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx); |
| 4489 | post_kvm_run_save(vcpu); | ||
| 4490 | 4709 | ||
| 4491 | vapic_exit(vcpu); | 4710 | vapic_exit(vcpu); |
| 4492 | 4711 | ||
| @@ -4514,26 +4733,17 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run) | |||
| 4514 | if (!irqchip_in_kernel(vcpu->kvm)) | 4733 | if (!irqchip_in_kernel(vcpu->kvm)) |
| 4515 | kvm_set_cr8(vcpu, kvm_run->cr8); | 4734 | kvm_set_cr8(vcpu, kvm_run->cr8); |
| 4516 | 4735 | ||
| 4517 | if (vcpu->arch.pio.cur_count) { | 4736 | if (vcpu->arch.pio.count || vcpu->mmio_needed || |
| 4518 | vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); | 4737 | vcpu->arch.emulate_ctxt.restart) { |
| 4519 | r = complete_pio(vcpu); | 4738 | if (vcpu->mmio_needed) { |
| 4520 | srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx); | 4739 | memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8); |
| 4521 | if (r) | 4740 | vcpu->mmio_read_completed = 1; |
| 4522 | goto out; | 4741 | vcpu->mmio_needed = 0; |
| 4523 | } | 4742 | } |
| 4524 | if (vcpu->mmio_needed) { | ||
| 4525 | memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8); | ||
| 4526 | vcpu->mmio_read_completed = 1; | ||
| 4527 | vcpu->mmio_needed = 0; | ||
| 4528 | |||
| 4529 | vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); | 4743 | vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); |
| 4530 | r = emulate_instruction(vcpu, vcpu->arch.mmio_fault_cr2, 0, | 4744 | r = emulate_instruction(vcpu, 0, 0, EMULTYPE_NO_DECODE); |
| 4531 | EMULTYPE_NO_DECODE); | ||
| 4532 | srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx); | 4745 | srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx); |
| 4533 | if (r == EMULATE_DO_MMIO) { | 4746 | if (r == EMULATE_DO_MMIO) { |
| 4534 | /* | ||
| 4535 | * Read-modify-write. Back to userspace. | ||
| 4536 | */ | ||
| 4537 | r = 0; | 4747 | r = 0; |
| 4538 | goto out; | 4748 | goto out; |
| 4539 | } | 4749 | } |
| @@ -4545,6 +4755,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run) | |||
| 4545 | r = __vcpu_run(vcpu); | 4755 | r = __vcpu_run(vcpu); |
| 4546 | 4756 | ||
| 4547 | out: | 4757 | out: |
| 4758 | post_kvm_run_save(vcpu); | ||
| 4548 | if (vcpu->sigset_active) | 4759 | if (vcpu->sigset_active) |
| 4549 | sigprocmask(SIG_SETMASK, &sigsaved, NULL); | 4760 | sigprocmask(SIG_SETMASK, &sigsaved, NULL); |
| 4550 | 4761 | ||
| @@ -4616,12 +4827,6 @@ int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) | |||
| 4616 | return 0; | 4827 | return 0; |
| 4617 | } | 4828 | } |
| 4618 | 4829 | ||
| 4619 | void kvm_get_segment(struct kvm_vcpu *vcpu, | ||
| 4620 | struct kvm_segment *var, int seg) | ||
| 4621 | { | ||
| 4622 | kvm_x86_ops->get_segment(vcpu, var, seg); | ||
| 4623 | } | ||
| 4624 | |||
| 4625 | void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l) | 4830 | void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l) |
| 4626 | { | 4831 | { |
| 4627 | struct kvm_segment cs; | 4832 | struct kvm_segment cs; |
| @@ -4635,7 +4840,7 @@ EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits); | |||
| 4635 | int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, | 4840 | int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, |
| 4636 | struct kvm_sregs *sregs) | 4841 | struct kvm_sregs *sregs) |
| 4637 | { | 4842 | { |
| 4638 | struct descriptor_table dt; | 4843 | struct desc_ptr dt; |
| 4639 | 4844 | ||
| 4640 | vcpu_load(vcpu); | 4845 | vcpu_load(vcpu); |
| 4641 | 4846 | ||
| @@ -4650,11 +4855,11 @@ int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, | |||
| 4650 | kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR); | 4855 | kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR); |
| 4651 | 4856 | ||
| 4652 | kvm_x86_ops->get_idt(vcpu, &dt); | 4857 | kvm_x86_ops->get_idt(vcpu, &dt); |
| 4653 | sregs->idt.limit = dt.limit; | 4858 | sregs->idt.limit = dt.size; |
| 4654 | sregs->idt.base = dt.base; | 4859 | sregs->idt.base = dt.address; |
| 4655 | kvm_x86_ops->get_gdt(vcpu, &dt); | 4860 | kvm_x86_ops->get_gdt(vcpu, &dt); |
| 4656 | sregs->gdt.limit = dt.limit; | 4861 | sregs->gdt.limit = dt.size; |
| 4657 | sregs->gdt.base = dt.base; | 4862 | sregs->gdt.base = dt.address; |
| 4658 | 4863 | ||
| 4659 | sregs->cr0 = kvm_read_cr0(vcpu); | 4864 | sregs->cr0 = kvm_read_cr0(vcpu); |
| 4660 | sregs->cr2 = vcpu->arch.cr2; | 4865 | sregs->cr2 = vcpu->arch.cr2; |
| @@ -4693,563 +4898,33 @@ int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu, | |||
| 4693 | return 0; | 4898 | return 0; |
| 4694 | } | 4899 | } |
| 4695 | 4900 | ||
| 4696 | static void kvm_set_segment(struct kvm_vcpu *vcpu, | 4901 | int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason, |
| 4697 | struct kvm_segment *var, int seg) | 4902 | bool has_error_code, u32 error_code) |
| 4698 | { | ||
| 4699 | kvm_x86_ops->set_segment(vcpu, var, seg); | ||
| 4700 | } | ||
| 4701 | |||
| 4702 | static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector, | ||
| 4703 | struct kvm_segment *kvm_desct) | ||
| 4704 | { | ||
| 4705 | kvm_desct->base = get_desc_base(seg_desc); | ||
| 4706 | kvm_desct->limit = get_desc_limit(seg_desc); | ||
| 4707 | if (seg_desc->g) { | ||
| 4708 | kvm_desct->limit <<= 12; | ||
| 4709 | kvm_desct->limit |= 0xfff; | ||
| 4710 | } | ||
| 4711 | kvm_desct->selector = selector; | ||
| 4712 | kvm_desct->type = seg_desc->type; | ||
| 4713 | kvm_desct->present = seg_desc->p; | ||
| 4714 | kvm_desct->dpl = seg_desc->dpl; | ||
| 4715 | kvm_desct->db = seg_desc->d; | ||
| 4716 | kvm_desct->s = seg_desc->s; | ||
| 4717 | kvm_desct->l = seg_desc->l; | ||
| 4718 | kvm_desct->g = seg_desc->g; | ||
| 4719 | kvm_desct->avl = seg_desc->avl; | ||
| 4720 | if (!selector) | ||
| 4721 | kvm_desct->unusable = 1; | ||
| 4722 | else | ||
| 4723 | kvm_desct->unusable = 0; | ||
| 4724 | kvm_desct->padding = 0; | ||
| 4725 | } | ||
| 4726 | |||
| 4727 | static void get_segment_descriptor_dtable(struct kvm_vcpu *vcpu, | ||
| 4728 | u16 selector, | ||
| 4729 | struct descriptor_table *dtable) | ||
| 4730 | { | ||
| 4731 | if (selector & 1 << 2) { | ||
| 4732 | struct kvm_segment kvm_seg; | ||
| 4733 | |||
| 4734 | kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR); | ||
| 4735 | |||
| 4736 | if (kvm_seg.unusable) | ||
| 4737 | dtable->limit = 0; | ||
| 4738 | else | ||
| 4739 | dtable->limit = kvm_seg.limit; | ||
| 4740 | dtable->base = kvm_seg.base; | ||
| 4741 | } | ||
| 4742 | else | ||
| 4743 | kvm_x86_ops->get_gdt(vcpu, dtable); | ||
| 4744 | } | ||
| 4745 | |||
| 4746 | /* allowed just for 8 bytes segments */ | ||
| 4747 | static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, | ||
| 4748 | struct desc_struct *seg_desc) | ||
| 4749 | { | ||
| 4750 | struct descriptor_table dtable; | ||
| 4751 | u16 index = selector >> 3; | ||
| 4752 | int ret; | ||
| 4753 | u32 err; | ||
| 4754 | gva_t addr; | ||
| 4755 | |||
| 4756 | get_segment_descriptor_dtable(vcpu, selector, &dtable); | ||
| 4757 | |||
| 4758 | if (dtable.limit < index * 8 + 7) { | ||
| 4759 | kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc); | ||
| 4760 | return X86EMUL_PROPAGATE_FAULT; | ||
| 4761 | } | ||
| 4762 | addr = dtable.base + index * 8; | ||
| 4763 | ret = kvm_read_guest_virt_system(addr, seg_desc, sizeof(*seg_desc), | ||
| 4764 | vcpu, &err); | ||
| 4765 | if (ret == X86EMUL_PROPAGATE_FAULT) | ||
| 4766 | kvm_inject_page_fault(vcpu, addr, err); | ||
| 4767 | |||
| 4768 | return ret; | ||
| 4769 | } | ||
| 4770 | |||
| 4771 | /* allowed just for 8 bytes segments */ | ||
| 4772 | static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, | ||
| 4773 | struct desc_struct *seg_desc) | ||
| 4774 | { | ||
| 4775 | struct descriptor_table dtable; | ||
| 4776 | u16 index = selector >> 3; | ||
| 4777 | |||
| 4778 | get_segment_descriptor_dtable(vcpu, selector, &dtable); | ||
| 4779 | |||
| 4780 | if (dtable.limit < index * 8 + 7) | ||
| 4781 | return 1; | ||
| 4782 | return kvm_write_guest_virt(dtable.base + index*8, seg_desc, sizeof(*seg_desc), vcpu, NULL); | ||
| 4783 | } | ||
| 4784 | |||
| 4785 | static gpa_t get_tss_base_addr_write(struct kvm_vcpu *vcpu, | ||
| 4786 | struct desc_struct *seg_desc) | ||
| 4787 | { | ||
| 4788 | u32 base_addr = get_desc_base(seg_desc); | ||
| 4789 | |||
| 4790 | return kvm_mmu_gva_to_gpa_write(vcpu, base_addr, NULL); | ||
| 4791 | } | ||
| 4792 | |||
| 4793 | static gpa_t get_tss_base_addr_read(struct kvm_vcpu *vcpu, | ||
| 4794 | struct desc_struct *seg_desc) | ||
| 4795 | { | ||
| 4796 | u32 base_addr = get_desc_base(seg_desc); | ||
| 4797 | |||
| 4798 | return kvm_mmu_gva_to_gpa_read(vcpu, base_addr, NULL); | ||
| 4799 | } | ||
| 4800 | |||
| 4801 | static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg) | ||
| 4802 | { | ||
| 4803 | struct kvm_segment kvm_seg; | ||
| 4804 | |||
| 4805 | kvm_get_segment(vcpu, &kvm_seg, seg); | ||
| 4806 | return kvm_seg.selector; | ||
| 4807 | } | ||
| 4808 | |||
| 4809 | static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg) | ||
| 4810 | { | ||
| 4811 | struct kvm_segment segvar = { | ||
| 4812 | .base = selector << 4, | ||
| 4813 | .limit = 0xffff, | ||
| 4814 | .selector = selector, | ||
| 4815 | .type = 3, | ||
| 4816 | .present = 1, | ||
| 4817 | .dpl = 3, | ||
| 4818 | .db = 0, | ||
| 4819 | .s = 1, | ||
| 4820 | .l = 0, | ||
| 4821 | .g = 0, | ||
| 4822 | .avl = 0, | ||
| 4823 | .unusable = 0, | ||
| 4824 | }; | ||
| 4825 | kvm_x86_ops->set_segment(vcpu, &segvar, seg); | ||
| 4826 | return X86EMUL_CONTINUE; | ||
| 4827 | } | ||
| 4828 | |||
| 4829 | static int is_vm86_segment(struct kvm_vcpu *vcpu, int seg) | ||
| 4830 | { | 4903 | { |
| 4831 | return (seg != VCPU_SREG_LDTR) && | 4904 | int cs_db, cs_l, ret; |
| 4832 | (seg != VCPU_SREG_TR) && | 4905 | cache_all_regs(vcpu); |
| 4833 | (kvm_get_rflags(vcpu) & X86_EFLAGS_VM); | ||
| 4834 | } | ||
| 4835 | |||
| 4836 | int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg) | ||
| 4837 | { | ||
| 4838 | struct kvm_segment kvm_seg; | ||
| 4839 | struct desc_struct seg_desc; | ||
| 4840 | u8 dpl, rpl, cpl; | ||
| 4841 | unsigned err_vec = GP_VECTOR; | ||
| 4842 | u32 err_code = 0; | ||
| 4843 | bool null_selector = !(selector & ~0x3); /* 0000-0003 are null */ | ||
| 4844 | int ret; | ||
| 4845 | 4906 | ||
| 4846 | if (is_vm86_segment(vcpu, seg) || !is_protmode(vcpu)) | 4907 | kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l); |
| 4847 | return kvm_load_realmode_segment(vcpu, selector, seg); | ||
| 4848 | 4908 | ||
| 4849 | /* NULL selector is not valid for TR, CS and SS */ | 4909 | vcpu->arch.emulate_ctxt.vcpu = vcpu; |
| 4850 | if ((seg == VCPU_SREG_CS || seg == VCPU_SREG_SS || seg == VCPU_SREG_TR) | 4910 | vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu); |
| 4851 | && null_selector) | 4911 | vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu); |
| 4852 | goto exception; | 4912 | vcpu->arch.emulate_ctxt.mode = |
| 4913 | (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL : | ||
| 4914 | (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM) | ||
| 4915 | ? X86EMUL_MODE_VM86 : cs_l | ||
| 4916 | ? X86EMUL_MODE_PROT64 : cs_db | ||
| 4917 | ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16; | ||
| 4853 | 4918 | ||
| 4854 | /* TR should be in GDT only */ | 4919 | ret = emulator_task_switch(&vcpu->arch.emulate_ctxt, &emulate_ops, |
| 4855 | if (seg == VCPU_SREG_TR && (selector & (1 << 2))) | 4920 | tss_selector, reason, has_error_code, |
| 4856 | goto exception; | 4921 | error_code); |
| 4857 | 4922 | ||
| 4858 | ret = load_guest_segment_descriptor(vcpu, selector, &seg_desc); | ||
| 4859 | if (ret) | 4923 | if (ret) |
| 4860 | return ret; | 4924 | return EMULATE_FAIL; |
| 4861 | |||
| 4862 | seg_desct_to_kvm_desct(&seg_desc, selector, &kvm_seg); | ||
| 4863 | |||
| 4864 | if (null_selector) { /* for NULL selector skip all following checks */ | ||
| 4865 | kvm_seg.unusable = 1; | ||
| 4866 | goto load; | ||
| 4867 | } | ||
| 4868 | |||
| 4869 | err_code = selector & 0xfffc; | ||
| 4870 | err_vec = GP_VECTOR; | ||
| 4871 | |||
| 4872 | /* can't load system descriptor into segment selecor */ | ||
| 4873 | if (seg <= VCPU_SREG_GS && !kvm_seg.s) | ||
| 4874 | goto exception; | ||
| 4875 | |||
| 4876 | if (!kvm_seg.present) { | ||
| 4877 | err_vec = (seg == VCPU_SREG_SS) ? SS_VECTOR : NP_VECTOR; | ||
| 4878 | goto exception; | ||
| 4879 | } | ||
| 4880 | |||
| 4881 | rpl = selector & 3; | ||
| 4882 | dpl = kvm_seg.dpl; | ||
| 4883 | cpl = kvm_x86_ops->get_cpl(vcpu); | ||
| 4884 | |||
| 4885 | switch (seg) { | ||
| 4886 | case VCPU_SREG_SS: | ||
| 4887 | /* | ||
| 4888 | * segment is not a writable data segment or segment | ||
| 4889 | * selector's RPL != CPL or segment selector's RPL != CPL | ||
| 4890 | */ | ||
| 4891 | if (rpl != cpl || (kvm_seg.type & 0xa) != 0x2 || dpl != cpl) | ||
| 4892 | goto exception; | ||
| 4893 | break; | ||
| 4894 | case VCPU_SREG_CS: | ||
| 4895 | if (!(kvm_seg.type & 8)) | ||
| 4896 | goto exception; | ||
| 4897 | |||
| 4898 | if (kvm_seg.type & 4) { | ||
| 4899 | /* conforming */ | ||
| 4900 | if (dpl > cpl) | ||
| 4901 | goto exception; | ||
| 4902 | } else { | ||
| 4903 | /* nonconforming */ | ||
| 4904 | if (rpl > cpl || dpl != cpl) | ||
| 4905 | goto exception; | ||
| 4906 | } | ||
| 4907 | /* CS(RPL) <- CPL */ | ||
| 4908 | selector = (selector & 0xfffc) | cpl; | ||
| 4909 | break; | ||
| 4910 | case VCPU_SREG_TR: | ||
| 4911 | if (kvm_seg.s || (kvm_seg.type != 1 && kvm_seg.type != 9)) | ||
| 4912 | goto exception; | ||
| 4913 | break; | ||
| 4914 | case VCPU_SREG_LDTR: | ||
| 4915 | if (kvm_seg.s || kvm_seg.type != 2) | ||
| 4916 | goto exception; | ||
| 4917 | break; | ||
| 4918 | default: /* DS, ES, FS, or GS */ | ||
| 4919 | /* | ||
| 4920 | * segment is not a data or readable code segment or | ||
| 4921 | * ((segment is a data or nonconforming code segment) | ||
| 4922 | * and (both RPL and CPL > DPL)) | ||
| 4923 | */ | ||
| 4924 | if ((kvm_seg.type & 0xa) == 0x8 || | ||
| 4925 | (((kvm_seg.type & 0xc) != 0xc) && (rpl > dpl && cpl > dpl))) | ||
| 4926 | goto exception; | ||
| 4927 | break; | ||
| 4928 | } | ||
| 4929 | |||
| 4930 | if (!kvm_seg.unusable && kvm_seg.s) { | ||
| 4931 | /* mark segment as accessed */ | ||
| 4932 | kvm_seg.type |= 1; | ||
| 4933 | seg_desc.type |= 1; | ||
| 4934 | save_guest_segment_descriptor(vcpu, selector, &seg_desc); | ||
| 4935 | } | ||
| 4936 | load: | ||
| 4937 | kvm_set_segment(vcpu, &kvm_seg, seg); | ||
| 4938 | return X86EMUL_CONTINUE; | ||
| 4939 | exception: | ||
| 4940 | kvm_queue_exception_e(vcpu, err_vec, err_code); | ||
| 4941 | return X86EMUL_PROPAGATE_FAULT; | ||
| 4942 | } | ||
| 4943 | |||
| 4944 | static void save_state_to_tss32(struct kvm_vcpu *vcpu, | ||
| 4945 | struct tss_segment_32 *tss) | ||
| 4946 | { | ||
| 4947 | tss->cr3 = vcpu->arch.cr3; | ||
| 4948 | tss->eip = kvm_rip_read(vcpu); | ||
| 4949 | tss->eflags = kvm_get_rflags(vcpu); | ||
| 4950 | tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX); | ||
| 4951 | tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX); | ||
| 4952 | tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX); | ||
| 4953 | tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX); | ||
| 4954 | tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP); | ||
| 4955 | tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP); | ||
| 4956 | tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI); | ||
| 4957 | tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI); | ||
| 4958 | tss->es = get_segment_selector(vcpu, VCPU_SREG_ES); | ||
| 4959 | tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS); | ||
| 4960 | tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS); | ||
| 4961 | tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS); | ||
| 4962 | tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS); | ||
| 4963 | tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS); | ||
| 4964 | tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR); | ||
| 4965 | } | ||
| 4966 | |||
| 4967 | static void kvm_load_segment_selector(struct kvm_vcpu *vcpu, u16 sel, int seg) | ||
| 4968 | { | ||
| 4969 | struct kvm_segment kvm_seg; | ||
| 4970 | kvm_get_segment(vcpu, &kvm_seg, seg); | ||
| 4971 | kvm_seg.selector = sel; | ||
| 4972 | kvm_set_segment(vcpu, &kvm_seg, seg); | ||
| 4973 | } | ||
| 4974 | |||
| 4975 | static int load_state_from_tss32(struct kvm_vcpu *vcpu, | ||
| 4976 | struct tss_segment_32 *tss) | ||
| 4977 | { | ||
| 4978 | kvm_set_cr3(vcpu, tss->cr3); | ||
| 4979 | |||
| 4980 | kvm_rip_write(vcpu, tss->eip); | ||
| 4981 | kvm_set_rflags(vcpu, tss->eflags | 2); | ||
| 4982 | |||
| 4983 | kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax); | ||
| 4984 | kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx); | ||
| 4985 | kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx); | ||
| 4986 | kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx); | ||
| 4987 | kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp); | ||
| 4988 | kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp); | ||
| 4989 | kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi); | ||
| 4990 | kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi); | ||
| 4991 | |||
| 4992 | /* | ||
| 4993 | * SDM says that segment selectors are loaded before segment | ||
| 4994 | * descriptors | ||
| 4995 | */ | ||
| 4996 | kvm_load_segment_selector(vcpu, tss->ldt_selector, VCPU_SREG_LDTR); | ||
| 4997 | kvm_load_segment_selector(vcpu, tss->es, VCPU_SREG_ES); | ||
| 4998 | kvm_load_segment_selector(vcpu, tss->cs, VCPU_SREG_CS); | ||
| 4999 | kvm_load_segment_selector(vcpu, tss->ss, VCPU_SREG_SS); | ||
| 5000 | kvm_load_segment_selector(vcpu, tss->ds, VCPU_SREG_DS); | ||
| 5001 | kvm_load_segment_selector(vcpu, tss->fs, VCPU_SREG_FS); | ||
| 5002 | kvm_load_segment_selector(vcpu, tss->gs, VCPU_SREG_GS); | ||
| 5003 | |||
| 5004 | /* | ||
| 5005 | * Now load segment descriptors. If fault happenes at this stage | ||
| 5006 | * it is handled in a context of new task | ||
| 5007 | */ | ||
| 5008 | if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, VCPU_SREG_LDTR)) | ||
| 5009 | return 1; | ||
| 5010 | |||
| 5011 | if (kvm_load_segment_descriptor(vcpu, tss->es, VCPU_SREG_ES)) | ||
| 5012 | return 1; | ||
| 5013 | 4925 | ||
| 5014 | if (kvm_load_segment_descriptor(vcpu, tss->cs, VCPU_SREG_CS)) | 4926 | kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags); |
| 5015 | return 1; | 4927 | return EMULATE_DONE; |
| 5016 | |||
| 5017 | if (kvm_load_segment_descriptor(vcpu, tss->ss, VCPU_SREG_SS)) | ||
| 5018 | return 1; | ||
| 5019 | |||
| 5020 | if (kvm_load_segment_descriptor(vcpu, tss->ds, VCPU_SREG_DS)) | ||
| 5021 | return 1; | ||
| 5022 | |||
| 5023 | if (kvm_load_segment_descriptor(vcpu, tss->fs, VCPU_SREG_FS)) | ||
| 5024 | return 1; | ||
| 5025 | |||
| 5026 | if (kvm_load_segment_descriptor(vcpu, tss->gs, VCPU_SREG_GS)) | ||
| 5027 | return 1; | ||
| 5028 | return 0; | ||
| 5029 | } | ||
| 5030 | |||
| 5031 | static void save_state_to_tss16(struct kvm_vcpu *vcpu, | ||
| 5032 | struct tss_segment_16 *tss) | ||
| 5033 | { | ||
| 5034 | tss->ip = kvm_rip_read(vcpu); | ||
| 5035 | tss->flag = kvm_get_rflags(vcpu); | ||
| 5036 | tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX); | ||
| 5037 | tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX); | ||
| 5038 | tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX); | ||
| 5039 | tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX); | ||
| 5040 | tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP); | ||
| 5041 | tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP); | ||
| 5042 | tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI); | ||
| 5043 | tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI); | ||
| 5044 | |||
| 5045 | tss->es = get_segment_selector(vcpu, VCPU_SREG_ES); | ||
| 5046 | tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS); | ||
| 5047 | tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS); | ||
| 5048 | tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS); | ||
| 5049 | tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR); | ||
| 5050 | } | ||
| 5051 | |||
| 5052 | static int load_state_from_tss16(struct kvm_vcpu *vcpu, | ||
| 5053 | struct tss_segment_16 *tss) | ||
| 5054 | { | ||
| 5055 | kvm_rip_write(vcpu, tss->ip); | ||
| 5056 | kvm_set_rflags(vcpu, tss->flag | 2); | ||
| 5057 | kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax); | ||
| 5058 | kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx); | ||
| 5059 | kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx); | ||
| 5060 | kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx); | ||
| 5061 | kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp); | ||
| 5062 | kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp); | ||
| 5063 | kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si); | ||
| 5064 | kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di); | ||
| 5065 | |||
| 5066 | /* | ||
| 5067 | * SDM says that segment selectors are loaded before segment | ||
| 5068 | * descriptors | ||
| 5069 | */ | ||
| 5070 | kvm_load_segment_selector(vcpu, tss->ldt, VCPU_SREG_LDTR); | ||
| 5071 | kvm_load_segment_selector(vcpu, tss->es, VCPU_SREG_ES); | ||
| 5072 | kvm_load_segment_selector(vcpu, tss->cs, VCPU_SREG_CS); | ||
| 5073 | kvm_load_segment_selector(vcpu, tss->ss, VCPU_SREG_SS); | ||
| 5074 | kvm_load_segment_selector(vcpu, tss->ds, VCPU_SREG_DS); | ||
| 5075 | |||
| 5076 | /* | ||
| 5077 | * Now load segment descriptors. If fault happenes at this stage | ||
| 5078 | * it is handled in a context of new task | ||
| 5079 | */ | ||
| 5080 | if (kvm_load_segment_descriptor(vcpu, tss->ldt, VCPU_SREG_LDTR)) | ||
| 5081 | return 1; | ||
| 5082 | |||
| 5083 | if (kvm_load_segment_descriptor(vcpu, tss->es, VCPU_SREG_ES)) | ||
| 5084 | return 1; | ||
| 5085 | |||
| 5086 | if (kvm_load_segment_descriptor(vcpu, tss->cs, VCPU_SREG_CS)) | ||
| 5087 | return 1; | ||
| 5088 | |||
| 5089 | if (kvm_load_segment_descriptor(vcpu, tss->ss, VCPU_SREG_SS)) | ||
| 5090 | return 1; | ||
| 5091 | |||
| 5092 | if (kvm_load_segment_descriptor(vcpu, tss->ds, VCPU_SREG_DS)) | ||
| 5093 | return 1; | ||
| 5094 | return 0; | ||
| 5095 | } | ||
| 5096 | |||
| 5097 | static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector, | ||
| 5098 | u16 old_tss_sel, u32 old_tss_base, | ||
| 5099 | struct desc_struct *nseg_desc) | ||
| 5100 | { | ||
| 5101 | struct tss_segment_16 tss_segment_16; | ||
| 5102 | int ret = 0; | ||
| 5103 | |||
| 5104 | if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16, | ||
| 5105 | sizeof tss_segment_16)) | ||
| 5106 | goto out; | ||
| 5107 | |||
| 5108 | save_state_to_tss16(vcpu, &tss_segment_16); | ||
| 5109 | |||
| 5110 | if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16, | ||
| 5111 | sizeof tss_segment_16)) | ||
| 5112 | goto out; | ||
| 5113 | |||
| 5114 | if (kvm_read_guest(vcpu->kvm, get_tss_base_addr_read(vcpu, nseg_desc), | ||
| 5115 | &tss_segment_16, sizeof tss_segment_16)) | ||
| 5116 | goto out; | ||
| 5117 | |||
| 5118 | if (old_tss_sel != 0xffff) { | ||
| 5119 | tss_segment_16.prev_task_link = old_tss_sel; | ||
| 5120 | |||
| 5121 | if (kvm_write_guest(vcpu->kvm, | ||
| 5122 | get_tss_base_addr_write(vcpu, nseg_desc), | ||
| 5123 | &tss_segment_16.prev_task_link, | ||
| 5124 | sizeof tss_segment_16.prev_task_link)) | ||
| 5125 | goto out; | ||
| 5126 | } | ||
| 5127 | |||
| 5128 | if (load_state_from_tss16(vcpu, &tss_segment_16)) | ||
| 5129 | goto out; | ||
| 5130 | |||
| 5131 | ret = 1; | ||
| 5132 | out: | ||
| 5133 | return ret; | ||
| 5134 | } | ||
| 5135 | |||
| 5136 | static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector, | ||
| 5137 | u16 old_tss_sel, u32 old_tss_base, | ||
| 5138 | struct desc_struct *nseg_desc) | ||
| 5139 | { | ||
| 5140 | struct tss_segment_32 tss_segment_32; | ||
| 5141 | int ret = 0; | ||
| 5142 | |||
| 5143 | if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32, | ||
| 5144 | sizeof tss_segment_32)) | ||
| 5145 | goto out; | ||
| 5146 | |||
| 5147 | save_state_to_tss32(vcpu, &tss_segment_32); | ||
| 5148 | |||
| 5149 | if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32, | ||
| 5150 | sizeof tss_segment_32)) | ||
| 5151 | goto out; | ||
| 5152 | |||
| 5153 | if (kvm_read_guest(vcpu->kvm, get_tss_base_addr_read(vcpu, nseg_desc), | ||
| 5154 | &tss_segment_32, sizeof tss_segment_32)) | ||
| 5155 | goto out; | ||
| 5156 | |||
| 5157 | if (old_tss_sel != 0xffff) { | ||
| 5158 | tss_segment_32.prev_task_link = old_tss_sel; | ||
| 5159 | |||
| 5160 | if (kvm_write_guest(vcpu->kvm, | ||
| 5161 | get_tss_base_addr_write(vcpu, nseg_desc), | ||
| 5162 | &tss_segment_32.prev_task_link, | ||
| 5163 | sizeof tss_segment_32.prev_task_link)) | ||
| 5164 | goto out; | ||
| 5165 | } | ||
| 5166 | |||
| 5167 | if (load_state_from_tss32(vcpu, &tss_segment_32)) | ||
| 5168 | goto out; | ||
| 5169 | |||
| 5170 | ret = 1; | ||
| 5171 | out: | ||
| 5172 | return ret; | ||
| 5173 | } | ||
| 5174 | |||
| 5175 | int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason) | ||
| 5176 | { | ||
| 5177 | struct kvm_segment tr_seg; | ||
| 5178 | struct desc_struct cseg_desc; | ||
| 5179 | struct desc_struct nseg_desc; | ||
| 5180 | int ret = 0; | ||
| 5181 | u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR); | ||
| 5182 | u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR); | ||
| 5183 | u32 desc_limit; | ||
| 5184 | |||
| 5185 | old_tss_base = kvm_mmu_gva_to_gpa_write(vcpu, old_tss_base, NULL); | ||
| 5186 | |||
| 5187 | /* FIXME: Handle errors. Failure to read either TSS or their | ||
| 5188 | * descriptors should generate a pagefault. | ||
| 5189 | */ | ||
| 5190 | if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc)) | ||
| 5191 | goto out; | ||
| 5192 | |||
| 5193 | if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc)) | ||
| 5194 | goto out; | ||
| 5195 | |||
| 5196 | if (reason != TASK_SWITCH_IRET) { | ||
| 5197 | int cpl; | ||
| 5198 | |||
| 5199 | cpl = kvm_x86_ops->get_cpl(vcpu); | ||
| 5200 | if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) { | ||
| 5201 | kvm_queue_exception_e(vcpu, GP_VECTOR, 0); | ||
| 5202 | return 1; | ||
| 5203 | } | ||
| 5204 | } | ||
| 5205 | |||
| 5206 | desc_limit = get_desc_limit(&nseg_desc); | ||
| 5207 | if (!nseg_desc.p || | ||
| 5208 | ((desc_limit < 0x67 && (nseg_desc.type & 8)) || | ||
| 5209 | desc_limit < 0x2b)) { | ||
| 5210 | kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc); | ||
| 5211 | return 1; | ||
| 5212 | } | ||
| 5213 | |||
| 5214 | if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) { | ||
| 5215 | cseg_desc.type &= ~(1 << 1); //clear the B flag | ||
| 5216 | save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc); | ||
| 5217 | } | ||
| 5218 | |||
| 5219 | if (reason == TASK_SWITCH_IRET) { | ||
| 5220 | u32 eflags = kvm_get_rflags(vcpu); | ||
| 5221 | kvm_set_rflags(vcpu, eflags & ~X86_EFLAGS_NT); | ||
| 5222 | } | ||
| 5223 | |||
| 5224 | /* set back link to prev task only if NT bit is set in eflags | ||
| 5225 | note that old_tss_sel is not used afetr this point */ | ||
| 5226 | if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE) | ||
| 5227 | old_tss_sel = 0xffff; | ||
| 5228 | |||
| 5229 | if (nseg_desc.type & 8) | ||
| 5230 | ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_sel, | ||
| 5231 | old_tss_base, &nseg_desc); | ||
| 5232 | else | ||
| 5233 | ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_sel, | ||
| 5234 | old_tss_base, &nseg_desc); | ||
| 5235 | |||
| 5236 | if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) { | ||
| 5237 | u32 eflags = kvm_get_rflags(vcpu); | ||
| 5238 | kvm_set_rflags(vcpu, eflags | X86_EFLAGS_NT); | ||
| 5239 | } | ||
| 5240 | |||
| 5241 | if (reason != TASK_SWITCH_IRET) { | ||
| 5242 | nseg_desc.type |= (1 << 1); | ||
| 5243 | save_guest_segment_descriptor(vcpu, tss_selector, | ||
| 5244 | &nseg_desc); | ||
| 5245 | } | ||
| 5246 | |||
| 5247 | kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0(vcpu) | X86_CR0_TS); | ||
| 5248 | seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg); | ||
| 5249 | tr_seg.type = 11; | ||
| 5250 | kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR); | ||
| 5251 | out: | ||
| 5252 | return ret; | ||
| 5253 | } | 4928 | } |
| 5254 | EXPORT_SYMBOL_GPL(kvm_task_switch); | 4929 | EXPORT_SYMBOL_GPL(kvm_task_switch); |
| 5255 | 4930 | ||
| @@ -5258,15 +4933,15 @@ int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, | |||
| 5258 | { | 4933 | { |
| 5259 | int mmu_reset_needed = 0; | 4934 | int mmu_reset_needed = 0; |
| 5260 | int pending_vec, max_bits; | 4935 | int pending_vec, max_bits; |
| 5261 | struct descriptor_table dt; | 4936 | struct desc_ptr dt; |
| 5262 | 4937 | ||
| 5263 | vcpu_load(vcpu); | 4938 | vcpu_load(vcpu); |
| 5264 | 4939 | ||
| 5265 | dt.limit = sregs->idt.limit; | 4940 | dt.size = sregs->idt.limit; |
| 5266 | dt.base = sregs->idt.base; | 4941 | dt.address = sregs->idt.base; |
| 5267 | kvm_x86_ops->set_idt(vcpu, &dt); | 4942 | kvm_x86_ops->set_idt(vcpu, &dt); |
| 5268 | dt.limit = sregs->gdt.limit; | 4943 | dt.size = sregs->gdt.limit; |
| 5269 | dt.base = sregs->gdt.base; | 4944 | dt.address = sregs->gdt.base; |
| 5270 | kvm_x86_ops->set_gdt(vcpu, &dt); | 4945 | kvm_x86_ops->set_gdt(vcpu, &dt); |
| 5271 | 4946 | ||
| 5272 | vcpu->arch.cr2 = sregs->cr2; | 4947 | vcpu->arch.cr2 = sregs->cr2; |
| @@ -5365,11 +5040,9 @@ int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu, | |||
| 5365 | vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK); | 5040 | vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK); |
| 5366 | } | 5041 | } |
| 5367 | 5042 | ||
| 5368 | if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) { | 5043 | if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) |
| 5369 | vcpu->arch.singlestep_cs = | 5044 | vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) + |
| 5370 | get_segment_selector(vcpu, VCPU_SREG_CS); | 5045 | get_segment_base(vcpu, VCPU_SREG_CS); |
| 5371 | vcpu->arch.singlestep_rip = kvm_rip_read(vcpu); | ||
| 5372 | } | ||
| 5373 | 5046 | ||
| 5374 | /* | 5047 | /* |
| 5375 | * Trigger an rflags update that will inject or remove the trace | 5048 | * Trigger an rflags update that will inject or remove the trace |
| @@ -5860,13 +5533,22 @@ int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu) | |||
| 5860 | return kvm_x86_ops->interrupt_allowed(vcpu); | 5533 | return kvm_x86_ops->interrupt_allowed(vcpu); |
| 5861 | } | 5534 | } |
| 5862 | 5535 | ||
| 5536 | bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip) | ||
| 5537 | { | ||
| 5538 | unsigned long current_rip = kvm_rip_read(vcpu) + | ||
| 5539 | get_segment_base(vcpu, VCPU_SREG_CS); | ||
| 5540 | |||
| 5541 | return current_rip == linear_rip; | ||
| 5542 | } | ||
| 5543 | EXPORT_SYMBOL_GPL(kvm_is_linear_rip); | ||
| 5544 | |||
| 5863 | unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu) | 5545 | unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu) |
| 5864 | { | 5546 | { |
| 5865 | unsigned long rflags; | 5547 | unsigned long rflags; |
| 5866 | 5548 | ||
| 5867 | rflags = kvm_x86_ops->get_rflags(vcpu); | 5549 | rflags = kvm_x86_ops->get_rflags(vcpu); |
| 5868 | if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) | 5550 | if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) |
| 5869 | rflags &= ~(unsigned long)(X86_EFLAGS_TF | X86_EFLAGS_RF); | 5551 | rflags &= ~X86_EFLAGS_TF; |
| 5870 | return rflags; | 5552 | return rflags; |
| 5871 | } | 5553 | } |
| 5872 | EXPORT_SYMBOL_GPL(kvm_get_rflags); | 5554 | EXPORT_SYMBOL_GPL(kvm_get_rflags); |
| @@ -5874,10 +5556,8 @@ EXPORT_SYMBOL_GPL(kvm_get_rflags); | |||
| 5874 | void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags) | 5556 | void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags) |
| 5875 | { | 5557 | { |
| 5876 | if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP && | 5558 | if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP && |
| 5877 | vcpu->arch.singlestep_cs == | 5559 | kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip)) |
| 5878 | get_segment_selector(vcpu, VCPU_SREG_CS) && | 5560 | rflags |= X86_EFLAGS_TF; |
| 5879 | vcpu->arch.singlestep_rip == kvm_rip_read(vcpu)) | ||
| 5880 | rflags |= X86_EFLAGS_TF | X86_EFLAGS_RF; | ||
| 5881 | kvm_x86_ops->set_rflags(vcpu, rflags); | 5561 | kvm_x86_ops->set_rflags(vcpu, rflags); |
| 5882 | } | 5562 | } |
| 5883 | EXPORT_SYMBOL_GPL(kvm_set_rflags); | 5563 | EXPORT_SYMBOL_GPL(kvm_set_rflags); |
| @@ -5893,3 +5573,4 @@ EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject); | |||
| 5893 | EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit); | 5573 | EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit); |
| 5894 | EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga); | 5574 | EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga); |
| 5895 | EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit); | 5575 | EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit); |
| 5576 | EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts); | ||
diff --git a/arch/x86/kvm/x86.h b/arch/x86/kvm/x86.h index b7a404722d2b..f4b54458285b 100644 --- a/arch/x86/kvm/x86.h +++ b/arch/x86/kvm/x86.h | |||
| @@ -65,6 +65,13 @@ static inline int is_paging(struct kvm_vcpu *vcpu) | |||
| 65 | return kvm_read_cr0_bits(vcpu, X86_CR0_PG); | 65 | return kvm_read_cr0_bits(vcpu, X86_CR0_PG); |
| 66 | } | 66 | } |
| 67 | 67 | ||
| 68 | static inline struct kvm_mem_aliases *kvm_aliases(struct kvm *kvm) | ||
| 69 | { | ||
| 70 | return rcu_dereference_check(kvm->arch.aliases, | ||
| 71 | srcu_read_lock_held(&kvm->srcu) | ||
| 72 | || lockdep_is_held(&kvm->slots_lock)); | ||
| 73 | } | ||
| 74 | |||
| 68 | void kvm_before_handle_nmi(struct kvm_vcpu *vcpu); | 75 | void kvm_before_handle_nmi(struct kvm_vcpu *vcpu); |
| 69 | void kvm_after_handle_nmi(struct kvm_vcpu *vcpu); | 76 | void kvm_after_handle_nmi(struct kvm_vcpu *vcpu); |
| 70 | 77 | ||
diff --git a/arch/x86/lguest/boot.c b/arch/x86/lguest/boot.c index 2bdf628066bd..9257510b4836 100644 --- a/arch/x86/lguest/boot.c +++ b/arch/x86/lguest/boot.c | |||
| @@ -1390,7 +1390,6 @@ __init void lguest_init(void) | |||
| 1390 | #endif | 1390 | #endif |
| 1391 | #ifdef CONFIG_ACPI | 1391 | #ifdef CONFIG_ACPI |
| 1392 | acpi_disabled = 1; | 1392 | acpi_disabled = 1; |
| 1393 | acpi_ht = 0; | ||
| 1394 | #endif | 1393 | #endif |
| 1395 | 1394 | ||
| 1396 | /* | 1395 | /* |
diff --git a/arch/x86/mm/numa.c b/arch/x86/mm/numa.c index 550df481accd..787c52ca49c3 100644 --- a/arch/x86/mm/numa.c +++ b/arch/x86/mm/numa.c | |||
| @@ -3,12 +3,6 @@ | |||
| 3 | #include <linux/module.h> | 3 | #include <linux/module.h> |
| 4 | #include <linux/bootmem.h> | 4 | #include <linux/bootmem.h> |
| 5 | 5 | ||
| 6 | #ifdef CONFIG_DEBUG_PER_CPU_MAPS | ||
| 7 | # define DBG(x...) printk(KERN_DEBUG x) | ||
| 8 | #else | ||
| 9 | # define DBG(x...) | ||
| 10 | #endif | ||
| 11 | |||
| 12 | /* | 6 | /* |
| 13 | * Which logical CPUs are on which nodes | 7 | * Which logical CPUs are on which nodes |
| 14 | */ | 8 | */ |
diff --git a/arch/x86/mm/numa_64.c b/arch/x86/mm/numa_64.c index 8948f47fde05..a7bcc23ef96c 100644 --- a/arch/x86/mm/numa_64.c +++ b/arch/x86/mm/numa_64.c | |||
| @@ -33,9 +33,6 @@ int numa_off __initdata; | |||
| 33 | static unsigned long __initdata nodemap_addr; | 33 | static unsigned long __initdata nodemap_addr; |
| 34 | static unsigned long __initdata nodemap_size; | 34 | static unsigned long __initdata nodemap_size; |
| 35 | 35 | ||
| 36 | DEFINE_PER_CPU(int, node_number) = 0; | ||
| 37 | EXPORT_PER_CPU_SYMBOL(node_number); | ||
| 38 | |||
| 39 | /* | 36 | /* |
| 40 | * Map cpu index to node index | 37 | * Map cpu index to node index |
| 41 | */ | 38 | */ |
| @@ -809,7 +806,7 @@ void __cpuinit numa_set_node(int cpu, int node) | |||
| 809 | per_cpu(x86_cpu_to_node_map, cpu) = node; | 806 | per_cpu(x86_cpu_to_node_map, cpu) = node; |
| 810 | 807 | ||
| 811 | if (node != NUMA_NO_NODE) | 808 | if (node != NUMA_NO_NODE) |
| 812 | per_cpu(node_number, cpu) = node; | 809 | set_cpu_numa_node(cpu, node); |
| 813 | } | 810 | } |
| 814 | 811 | ||
| 815 | void __cpuinit numa_clear_node(int cpu) | 812 | void __cpuinit numa_clear_node(int cpu) |
| @@ -867,7 +864,7 @@ void __cpuinit numa_remove_cpu(int cpu) | |||
| 867 | numa_set_cpumask(cpu, 0); | 864 | numa_set_cpumask(cpu, 0); |
| 868 | } | 865 | } |
| 869 | 866 | ||
| 870 | int cpu_to_node(int cpu) | 867 | int __cpu_to_node(int cpu) |
| 871 | { | 868 | { |
| 872 | if (early_per_cpu_ptr(x86_cpu_to_node_map)) { | 869 | if (early_per_cpu_ptr(x86_cpu_to_node_map)) { |
| 873 | printk(KERN_WARNING | 870 | printk(KERN_WARNING |
| @@ -877,7 +874,7 @@ int cpu_to_node(int cpu) | |||
| 877 | } | 874 | } |
| 878 | return per_cpu(x86_cpu_to_node_map, cpu); | 875 | return per_cpu(x86_cpu_to_node_map, cpu); |
| 879 | } | 876 | } |
| 880 | EXPORT_SYMBOL(cpu_to_node); | 877 | EXPORT_SYMBOL(__cpu_to_node); |
| 881 | 878 | ||
| 882 | /* | 879 | /* |
| 883 | * Same function as cpu_to_node() but used if called before the | 880 | * Same function as cpu_to_node() but used if called before the |
diff --git a/arch/x86/mm/pat.c b/arch/x86/mm/pat.c index bbe5502ee1cb..acc15b23b743 100644 --- a/arch/x86/mm/pat.c +++ b/arch/x86/mm/pat.c | |||
| @@ -336,6 +336,7 @@ int free_memtype(u64 start, u64 end) | |||
| 336 | { | 336 | { |
| 337 | int err = -EINVAL; | 337 | int err = -EINVAL; |
| 338 | int is_range_ram; | 338 | int is_range_ram; |
| 339 | struct memtype *entry; | ||
| 339 | 340 | ||
| 340 | if (!pat_enabled) | 341 | if (!pat_enabled) |
| 341 | return 0; | 342 | return 0; |
| @@ -355,17 +356,20 @@ int free_memtype(u64 start, u64 end) | |||
| 355 | } | 356 | } |
| 356 | 357 | ||
| 357 | spin_lock(&memtype_lock); | 358 | spin_lock(&memtype_lock); |
| 358 | err = rbt_memtype_erase(start, end); | 359 | entry = rbt_memtype_erase(start, end); |
| 359 | spin_unlock(&memtype_lock); | 360 | spin_unlock(&memtype_lock); |
| 360 | 361 | ||
| 361 | if (err) { | 362 | if (!entry) { |
| 362 | printk(KERN_INFO "%s:%d freeing invalid memtype %Lx-%Lx\n", | 363 | printk(KERN_INFO "%s:%d freeing invalid memtype %Lx-%Lx\n", |
| 363 | current->comm, current->pid, start, end); | 364 | current->comm, current->pid, start, end); |
| 365 | return -EINVAL; | ||
| 364 | } | 366 | } |
| 365 | 367 | ||
| 368 | kfree(entry); | ||
| 369 | |||
| 366 | dprintk("free_memtype request 0x%Lx-0x%Lx\n", start, end); | 370 | dprintk("free_memtype request 0x%Lx-0x%Lx\n", start, end); |
| 367 | 371 | ||
| 368 | return err; | 372 | return 0; |
| 369 | } | 373 | } |
| 370 | 374 | ||
| 371 | 375 | ||
diff --git a/arch/x86/mm/pat_internal.h b/arch/x86/mm/pat_internal.h index 4f39eefa3e61..77e5ba153fac 100644 --- a/arch/x86/mm/pat_internal.h +++ b/arch/x86/mm/pat_internal.h | |||
| @@ -28,15 +28,15 @@ static inline char *cattr_name(unsigned long flags) | |||
| 28 | #ifdef CONFIG_X86_PAT | 28 | #ifdef CONFIG_X86_PAT |
| 29 | extern int rbt_memtype_check_insert(struct memtype *new, | 29 | extern int rbt_memtype_check_insert(struct memtype *new, |
| 30 | unsigned long *new_type); | 30 | unsigned long *new_type); |
| 31 | extern int rbt_memtype_erase(u64 start, u64 end); | 31 | extern struct memtype *rbt_memtype_erase(u64 start, u64 end); |
| 32 | extern struct memtype *rbt_memtype_lookup(u64 addr); | 32 | extern struct memtype *rbt_memtype_lookup(u64 addr); |
| 33 | extern int rbt_memtype_copy_nth_element(struct memtype *out, loff_t pos); | 33 | extern int rbt_memtype_copy_nth_element(struct memtype *out, loff_t pos); |
| 34 | #else | 34 | #else |
| 35 | static inline int rbt_memtype_check_insert(struct memtype *new, | 35 | static inline int rbt_memtype_check_insert(struct memtype *new, |
| 36 | unsigned long *new_type) | 36 | unsigned long *new_type) |
| 37 | { return 0; } | 37 | { return 0; } |
| 38 | static inline int rbt_memtype_erase(u64 start, u64 end) | 38 | static inline struct memtype *rbt_memtype_erase(u64 start, u64 end) |
| 39 | { return 0; } | 39 | { return NULL; } |
| 40 | static inline struct memtype *rbt_memtype_lookup(u64 addr) | 40 | static inline struct memtype *rbt_memtype_lookup(u64 addr) |
| 41 | { return NULL; } | 41 | { return NULL; } |
| 42 | static inline int rbt_memtype_copy_nth_element(struct memtype *out, loff_t pos) | 42 | static inline int rbt_memtype_copy_nth_element(struct memtype *out, loff_t pos) |
diff --git a/arch/x86/mm/pat_rbtree.c b/arch/x86/mm/pat_rbtree.c index 07de4cb8cc30..f537087bb740 100644 --- a/arch/x86/mm/pat_rbtree.c +++ b/arch/x86/mm/pat_rbtree.c | |||
| @@ -231,16 +231,17 @@ int rbt_memtype_check_insert(struct memtype *new, unsigned long *ret_type) | |||
| 231 | return err; | 231 | return err; |
| 232 | } | 232 | } |
| 233 | 233 | ||
| 234 | int rbt_memtype_erase(u64 start, u64 end) | 234 | struct memtype *rbt_memtype_erase(u64 start, u64 end) |
| 235 | { | 235 | { |
| 236 | struct memtype *data; | 236 | struct memtype *data; |
| 237 | 237 | ||
| 238 | data = memtype_rb_exact_match(&memtype_rbroot, start, end); | 238 | data = memtype_rb_exact_match(&memtype_rbroot, start, end); |
| 239 | if (!data) | 239 | if (!data) |
| 240 | return -EINVAL; | 240 | goto out; |
| 241 | 241 | ||
| 242 | rb_erase(&data->rb, &memtype_rbroot); | 242 | rb_erase(&data->rb, &memtype_rbroot); |
| 243 | return 0; | 243 | out: |
| 244 | return data; | ||
| 244 | } | 245 | } |
| 245 | 246 | ||
| 246 | struct memtype *rbt_memtype_lookup(u64 addr) | 247 | struct memtype *rbt_memtype_lookup(u64 addr) |
diff --git a/arch/x86/mm/pf_in.c b/arch/x86/mm/pf_in.c index df3d5c861cda..308e32570d84 100644 --- a/arch/x86/mm/pf_in.c +++ b/arch/x86/mm/pf_in.c | |||
| @@ -34,7 +34,7 @@ | |||
| 34 | /* IA32 Manual 3, 2-1 */ | 34 | /* IA32 Manual 3, 2-1 */ |
| 35 | static unsigned char prefix_codes[] = { | 35 | static unsigned char prefix_codes[] = { |
| 36 | 0xF0, 0xF2, 0xF3, 0x2E, 0x36, 0x3E, 0x26, 0x64, | 36 | 0xF0, 0xF2, 0xF3, 0x2E, 0x36, 0x3E, 0x26, 0x64, |
| 37 | 0x65, 0x2E, 0x3E, 0x66, 0x67 | 37 | 0x65, 0x66, 0x67 |
| 38 | }; | 38 | }; |
| 39 | /* IA32 Manual 3, 3-432*/ | 39 | /* IA32 Manual 3, 3-432*/ |
| 40 | static unsigned int reg_rop[] = { | 40 | static unsigned int reg_rop[] = { |
diff --git a/arch/x86/mm/pgtable_32.c b/arch/x86/mm/pgtable_32.c index 792854003ed3..cac718499256 100644 --- a/arch/x86/mm/pgtable_32.c +++ b/arch/x86/mm/pgtable_32.c | |||
| @@ -9,7 +9,6 @@ | |||
| 9 | #include <linux/pagemap.h> | 9 | #include <linux/pagemap.h> |
| 10 | #include <linux/spinlock.h> | 10 | #include <linux/spinlock.h> |
| 11 | #include <linux/module.h> | 11 | #include <linux/module.h> |
| 12 | #include <linux/quicklist.h> | ||
| 13 | 12 | ||
| 14 | #include <asm/system.h> | 13 | #include <asm/system.h> |
| 15 | #include <asm/pgtable.h> | 14 | #include <asm/pgtable.h> |
diff --git a/arch/x86/pci/Makefile b/arch/x86/pci/Makefile index b110d97fb925..a0207a7fdf39 100644 --- a/arch/x86/pci/Makefile +++ b/arch/x86/pci/Makefile | |||
| @@ -18,6 +18,8 @@ obj-$(CONFIG_X86_MRST) += mrst.o | |||
| 18 | obj-y += common.o early.o | 18 | obj-y += common.o early.o |
| 19 | obj-y += amd_bus.o bus_numa.o | 19 | obj-y += amd_bus.o bus_numa.o |
| 20 | 20 | ||
| 21 | obj-$(CONFIG_PCI_CNB20LE_QUIRK) += broadcom_bus.o | ||
| 22 | |||
| 21 | ifeq ($(CONFIG_PCI_DEBUG),y) | 23 | ifeq ($(CONFIG_PCI_DEBUG),y) |
| 22 | EXTRA_CFLAGS += -DDEBUG | 24 | EXTRA_CFLAGS += -DDEBUG |
| 23 | endif | 25 | endif |
diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c index 31930fd30ea9..2ec04c424a62 100644 --- a/arch/x86/pci/acpi.c +++ b/arch/x86/pci/acpi.c | |||
| @@ -207,10 +207,9 @@ get_current_resources(struct acpi_device *device, int busnum, | |||
| 207 | if (!info.res) | 207 | if (!info.res) |
| 208 | goto res_alloc_fail; | 208 | goto res_alloc_fail; |
| 209 | 209 | ||
| 210 | info.name = kmalloc(16, GFP_KERNEL); | 210 | info.name = kasprintf(GFP_KERNEL, "PCI Bus %04x:%02x", domain, busnum); |
| 211 | if (!info.name) | 211 | if (!info.name) |
| 212 | goto name_alloc_fail; | 212 | goto name_alloc_fail; |
| 213 | sprintf(info.name, "PCI Bus %04x:%02x", domain, busnum); | ||
| 214 | 213 | ||
| 215 | info.res_num = 0; | 214 | info.res_num = 0; |
| 216 | acpi_walk_resources(device->handle, METHOD_NAME__CRS, setup_resource, | 215 | acpi_walk_resources(device->handle, METHOD_NAME__CRS, setup_resource, |
| @@ -224,8 +223,11 @@ res_alloc_fail: | |||
| 224 | return; | 223 | return; |
| 225 | } | 224 | } |
| 226 | 225 | ||
| 227 | struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_device *device, int domain, int busnum) | 226 | struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_pci_root *root) |
| 228 | { | 227 | { |
| 228 | struct acpi_device *device = root->device; | ||
| 229 | int domain = root->segment; | ||
| 230 | int busnum = root->secondary.start; | ||
| 229 | struct pci_bus *bus; | 231 | struct pci_bus *bus; |
| 230 | struct pci_sysdata *sd; | 232 | struct pci_sysdata *sd; |
| 231 | int node; | 233 | int node; |
diff --git a/arch/x86/pci/broadcom_bus.c b/arch/x86/pci/broadcom_bus.c new file mode 100644 index 000000000000..0846a5bbbfbd --- /dev/null +++ b/arch/x86/pci/broadcom_bus.c | |||
| @@ -0,0 +1,101 @@ | |||
| 1 | /* | ||
| 2 | * Read address ranges from a Broadcom CNB20LE Host Bridge | ||
| 3 | * | ||
| 4 | * Copyright (c) 2010 Ira W. Snyder <iws@ovro.caltech.edu> | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify it | ||
| 7 | * under the terms of the GNU General Public License as published by the | ||
| 8 | * Free Software Foundation; either version 2 of the License, or (at your | ||
| 9 | * option) any later version. | ||
| 10 | */ | ||
| 11 | |||
| 12 | #include <linux/delay.h> | ||
| 13 | #include <linux/dmi.h> | ||
| 14 | #include <linux/pci.h> | ||
| 15 | #include <linux/init.h> | ||
| 16 | #include <asm/pci_x86.h> | ||
| 17 | |||
| 18 | #include "bus_numa.h" | ||
| 19 | |||
| 20 | static void __devinit cnb20le_res(struct pci_dev *dev) | ||
| 21 | { | ||
| 22 | struct pci_root_info *info; | ||
| 23 | struct resource res; | ||
| 24 | u16 word1, word2; | ||
| 25 | u8 fbus, lbus; | ||
| 26 | int i; | ||
| 27 | |||
| 28 | /* | ||
| 29 | * The x86_pci_root_bus_res_quirks() function already refuses to use | ||
| 30 | * this information if ACPI _CRS was used. Therefore, we don't bother | ||
| 31 | * checking if ACPI is enabled, and just generate the information | ||
| 32 | * for both the ACPI _CRS and no ACPI cases. | ||
| 33 | */ | ||
| 34 | |||
| 35 | info = &pci_root_info[pci_root_num]; | ||
| 36 | pci_root_num++; | ||
| 37 | |||
| 38 | /* read the PCI bus numbers */ | ||
| 39 | pci_read_config_byte(dev, 0x44, &fbus); | ||
| 40 | pci_read_config_byte(dev, 0x45, &lbus); | ||
| 41 | info->bus_min = fbus; | ||
| 42 | info->bus_max = lbus; | ||
| 43 | |||
| 44 | /* | ||
| 45 | * Add the legacy IDE ports on bus 0 | ||
| 46 | * | ||
| 47 | * These do not exist anywhere in the bridge registers, AFAICT. I do | ||
| 48 | * not have the datasheet, so this is the best I can do. | ||
| 49 | */ | ||
| 50 | if (fbus == 0) { | ||
| 51 | update_res(info, 0x01f0, 0x01f7, IORESOURCE_IO, 0); | ||
| 52 | update_res(info, 0x03f6, 0x03f6, IORESOURCE_IO, 0); | ||
| 53 | update_res(info, 0x0170, 0x0177, IORESOURCE_IO, 0); | ||
| 54 | update_res(info, 0x0376, 0x0376, IORESOURCE_IO, 0); | ||
| 55 | update_res(info, 0xffa0, 0xffaf, IORESOURCE_IO, 0); | ||
| 56 | } | ||
| 57 | |||
| 58 | /* read the non-prefetchable memory window */ | ||
| 59 | pci_read_config_word(dev, 0xc0, &word1); | ||
| 60 | pci_read_config_word(dev, 0xc2, &word2); | ||
| 61 | if (word1 != word2) { | ||
| 62 | res.start = (word1 << 16) | 0x0000; | ||
| 63 | res.end = (word2 << 16) | 0xffff; | ||
| 64 | res.flags = IORESOURCE_MEM; | ||
| 65 | update_res(info, res.start, res.end, res.flags, 0); | ||
| 66 | } | ||
| 67 | |||
| 68 | /* read the prefetchable memory window */ | ||
| 69 | pci_read_config_word(dev, 0xc4, &word1); | ||
| 70 | pci_read_config_word(dev, 0xc6, &word2); | ||
| 71 | if (word1 != word2) { | ||
| 72 | res.start = (word1 << 16) | 0x0000; | ||
| 73 | res.end = (word2 << 16) | 0xffff; | ||
| 74 | res.flags = IORESOURCE_MEM | IORESOURCE_PREFETCH; | ||
| 75 | update_res(info, res.start, res.end, res.flags, 0); | ||
| 76 | } | ||
| 77 | |||
| 78 | /* read the IO port window */ | ||
| 79 | pci_read_config_word(dev, 0xd0, &word1); | ||
| 80 | pci_read_config_word(dev, 0xd2, &word2); | ||
| 81 | if (word1 != word2) { | ||
| 82 | res.start = word1; | ||
| 83 | res.end = word2; | ||
| 84 | res.flags = IORESOURCE_IO; | ||
| 85 | update_res(info, res.start, res.end, res.flags, 0); | ||
| 86 | } | ||
| 87 | |||
| 88 | /* print information about this host bridge */ | ||
| 89 | res.start = fbus; | ||
| 90 | res.end = lbus; | ||
| 91 | res.flags = IORESOURCE_BUS; | ||
| 92 | dev_info(&dev->dev, "CNB20LE PCI Host Bridge (domain %04x %pR)\n", | ||
| 93 | pci_domain_nr(dev->bus), &res); | ||
| 94 | |||
| 95 | for (i = 0; i < info->res_num; i++) | ||
| 96 | dev_info(&dev->dev, "host bridge window %pR\n", &info->res[i]); | ||
| 97 | } | ||
| 98 | |||
| 99 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_LE, | ||
| 100 | cnb20le_res); | ||
| 101 | |||
diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c index cf2e93869c48..215a27ae050d 100644 --- a/arch/x86/pci/common.c +++ b/arch/x86/pci/common.c | |||
| @@ -76,7 +76,7 @@ struct pci_ops pci_root_ops = { | |||
| 76 | * This interrupt-safe spinlock protects all accesses to PCI | 76 | * This interrupt-safe spinlock protects all accesses to PCI |
| 77 | * configuration space. | 77 | * configuration space. |
| 78 | */ | 78 | */ |
| 79 | DEFINE_SPINLOCK(pci_config_lock); | 79 | DEFINE_RAW_SPINLOCK(pci_config_lock); |
| 80 | 80 | ||
| 81 | static int __devinit can_skip_ioresource_align(const struct dmi_system_id *d) | 81 | static int __devinit can_skip_ioresource_align(const struct dmi_system_id *d) |
| 82 | { | 82 | { |
diff --git a/arch/x86/pci/direct.c b/arch/x86/pci/direct.c index 347d882b3bb3..bd33620b0071 100644 --- a/arch/x86/pci/direct.c +++ b/arch/x86/pci/direct.c | |||
| @@ -27,7 +27,7 @@ static int pci_conf1_read(unsigned int seg, unsigned int bus, | |||
| 27 | return -EINVAL; | 27 | return -EINVAL; |
| 28 | } | 28 | } |
| 29 | 29 | ||
| 30 | spin_lock_irqsave(&pci_config_lock, flags); | 30 | raw_spin_lock_irqsave(&pci_config_lock, flags); |
| 31 | 31 | ||
| 32 | outl(PCI_CONF1_ADDRESS(bus, devfn, reg), 0xCF8); | 32 | outl(PCI_CONF1_ADDRESS(bus, devfn, reg), 0xCF8); |
| 33 | 33 | ||
| @@ -43,7 +43,7 @@ static int pci_conf1_read(unsigned int seg, unsigned int bus, | |||
| 43 | break; | 43 | break; |
| 44 | } | 44 | } |
| 45 | 45 | ||
| 46 | spin_unlock_irqrestore(&pci_config_lock, flags); | 46 | raw_spin_unlock_irqrestore(&pci_config_lock, flags); |
| 47 | 47 | ||
| 48 | return 0; | 48 | return 0; |
| 49 | } | 49 | } |
| @@ -56,7 +56,7 @@ static int pci_conf1_write(unsigned int seg, unsigned int bus, | |||
| 56 | if ((bus > 255) || (devfn > 255) || (reg > 4095)) | 56 | if ((bus > 255) || (devfn > 255) || (reg > 4095)) |
| 57 | return -EINVAL; | 57 | return -EINVAL; |
| 58 | 58 | ||
| 59 | spin_lock_irqsave(&pci_config_lock, flags); | 59 | raw_spin_lock_irqsave(&pci_config_lock, flags); |
| 60 | 60 | ||
| 61 | outl(PCI_CONF1_ADDRESS(bus, devfn, reg), 0xCF8); | 61 | outl(PCI_CONF1_ADDRESS(bus, devfn, reg), 0xCF8); |
| 62 | 62 | ||
| @@ -72,7 +72,7 @@ static int pci_conf1_write(unsigned int seg, unsigned int bus, | |||
| 72 | break; | 72 | break; |
| 73 | } | 73 | } |
| 74 | 74 | ||
| 75 | spin_unlock_irqrestore(&pci_config_lock, flags); | 75 | raw_spin_unlock_irqrestore(&pci_config_lock, flags); |
| 76 | 76 | ||
| 77 | return 0; | 77 | return 0; |
| 78 | } | 78 | } |
| @@ -108,7 +108,7 @@ static int pci_conf2_read(unsigned int seg, unsigned int bus, | |||
| 108 | if (dev & 0x10) | 108 | if (dev & 0x10) |
| 109 | return PCIBIOS_DEVICE_NOT_FOUND; | 109 | return PCIBIOS_DEVICE_NOT_FOUND; |
| 110 | 110 | ||
| 111 | spin_lock_irqsave(&pci_config_lock, flags); | 111 | raw_spin_lock_irqsave(&pci_config_lock, flags); |
| 112 | 112 | ||
| 113 | outb((u8)(0xF0 | (fn << 1)), 0xCF8); | 113 | outb((u8)(0xF0 | (fn << 1)), 0xCF8); |
| 114 | outb((u8)bus, 0xCFA); | 114 | outb((u8)bus, 0xCFA); |
| @@ -127,7 +127,7 @@ static int pci_conf2_read(unsigned int seg, unsigned int bus, | |||
| 127 | 127 | ||
| 128 | outb(0, 0xCF8); | 128 | outb(0, 0xCF8); |
| 129 | 129 | ||
| 130 | spin_unlock_irqrestore(&pci_config_lock, flags); | 130 | raw_spin_unlock_irqrestore(&pci_config_lock, flags); |
| 131 | 131 | ||
| 132 | return 0; | 132 | return 0; |
| 133 | } | 133 | } |
| @@ -147,7 +147,7 @@ static int pci_conf2_write(unsigned int seg, unsigned int bus, | |||
| 147 | if (dev & 0x10) | 147 | if (dev & 0x10) |
| 148 | return PCIBIOS_DEVICE_NOT_FOUND; | 148 | return PCIBIOS_DEVICE_NOT_FOUND; |
| 149 | 149 | ||
| 150 | spin_lock_irqsave(&pci_config_lock, flags); | 150 | raw_spin_lock_irqsave(&pci_config_lock, flags); |
| 151 | 151 | ||
| 152 | outb((u8)(0xF0 | (fn << 1)), 0xCF8); | 152 | outb((u8)(0xF0 | (fn << 1)), 0xCF8); |
| 153 | outb((u8)bus, 0xCFA); | 153 | outb((u8)bus, 0xCFA); |
| @@ -166,7 +166,7 @@ static int pci_conf2_write(unsigned int seg, unsigned int bus, | |||
| 166 | 166 | ||
| 167 | outb(0, 0xCF8); | 167 | outb(0, 0xCF8); |
| 168 | 168 | ||
| 169 | spin_unlock_irqrestore(&pci_config_lock, flags); | 169 | raw_spin_unlock_irqrestore(&pci_config_lock, flags); |
| 170 | 170 | ||
| 171 | return 0; | 171 | return 0; |
| 172 | } | 172 | } |
diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c index 97da2ba9344b..6fdb3ec30c31 100644 --- a/arch/x86/pci/i386.c +++ b/arch/x86/pci/i386.c | |||
| @@ -96,6 +96,7 @@ EXPORT_SYMBOL(pcibios_align_resource); | |||
| 96 | * the fact the PCI specs explicitly allow address decoders to be | 96 | * the fact the PCI specs explicitly allow address decoders to be |
| 97 | * shared between expansion ROMs and other resource regions, it's | 97 | * shared between expansion ROMs and other resource regions, it's |
| 98 | * at least dangerous) | 98 | * at least dangerous) |
| 99 | * - bad resource sizes or overlaps with other regions | ||
| 99 | * | 100 | * |
| 100 | * Our solution: | 101 | * Our solution: |
| 101 | * (1) Allocate resources for all buses behind PCI-to-PCI bridges. | 102 | * (1) Allocate resources for all buses behind PCI-to-PCI bridges. |
| @@ -136,6 +137,7 @@ static void __init pcibios_allocate_bus_resources(struct list_head *bus_list) | |||
| 136 | * child resource allocations in this | 137 | * child resource allocations in this |
| 137 | * range. | 138 | * range. |
| 138 | */ | 139 | */ |
| 140 | r->start = r->end = 0; | ||
| 139 | r->flags = 0; | 141 | r->flags = 0; |
| 140 | } | 142 | } |
| 141 | } | 143 | } |
diff --git a/arch/x86/pci/irq.c b/arch/x86/pci/irq.c index 5d362b5ba06f..9810a0f76c91 100644 --- a/arch/x86/pci/irq.c +++ b/arch/x86/pci/irq.c | |||
| @@ -589,8 +589,6 @@ static __init int intel_router_probe(struct irq_router *r, struct pci_dev *route | |||
| 589 | case PCI_DEVICE_ID_INTEL_ICH10_1: | 589 | case PCI_DEVICE_ID_INTEL_ICH10_1: |
| 590 | case PCI_DEVICE_ID_INTEL_ICH10_2: | 590 | case PCI_DEVICE_ID_INTEL_ICH10_2: |
| 591 | case PCI_DEVICE_ID_INTEL_ICH10_3: | 591 | case PCI_DEVICE_ID_INTEL_ICH10_3: |
| 592 | case PCI_DEVICE_ID_INTEL_CPT_LPC1: | ||
| 593 | case PCI_DEVICE_ID_INTEL_CPT_LPC2: | ||
| 594 | r->name = "PIIX/ICH"; | 592 | r->name = "PIIX/ICH"; |
| 595 | r->get = pirq_piix_get; | 593 | r->get = pirq_piix_get; |
| 596 | r->set = pirq_piix_set; | 594 | r->set = pirq_piix_set; |
| @@ -605,6 +603,13 @@ static __init int intel_router_probe(struct irq_router *r, struct pci_dev *route | |||
| 605 | return 1; | 603 | return 1; |
| 606 | } | 604 | } |
| 607 | 605 | ||
| 606 | if ((device >= PCI_DEVICE_ID_INTEL_CPT_LPC_MIN) && | ||
| 607 | (device <= PCI_DEVICE_ID_INTEL_CPT_LPC_MAX)) { | ||
| 608 | r->name = "PIIX/ICH"; | ||
| 609 | r->get = pirq_piix_get; | ||
| 610 | r->set = pirq_piix_set; | ||
| 611 | return 1; | ||
| 612 | } | ||
| 608 | return 0; | 613 | return 0; |
| 609 | } | 614 | } |
| 610 | 615 | ||
diff --git a/arch/x86/pci/legacy.c b/arch/x86/pci/legacy.c index 0db5eaf54560..8d460eaf524f 100644 --- a/arch/x86/pci/legacy.c +++ b/arch/x86/pci/legacy.c | |||
| @@ -11,28 +11,14 @@ | |||
| 11 | */ | 11 | */ |
| 12 | static void __devinit pcibios_fixup_peer_bridges(void) | 12 | static void __devinit pcibios_fixup_peer_bridges(void) |
| 13 | { | 13 | { |
| 14 | int n, devfn; | 14 | int n; |
| 15 | long node; | ||
| 16 | 15 | ||
| 17 | if (pcibios_last_bus <= 0 || pcibios_last_bus > 0xff) | 16 | if (pcibios_last_bus <= 0 || pcibios_last_bus > 0xff) |
| 18 | return; | 17 | return; |
| 19 | DBG("PCI: Peer bridge fixup\n"); | 18 | DBG("PCI: Peer bridge fixup\n"); |
| 20 | 19 | ||
| 21 | for (n=0; n <= pcibios_last_bus; n++) { | 20 | for (n=0; n <= pcibios_last_bus; n++) |
| 22 | u32 l; | 21 | pcibios_scan_specific_bus(n); |
| 23 | if (pci_find_bus(0, n)) | ||
| 24 | continue; | ||
| 25 | node = get_mp_bus_to_node(n); | ||
| 26 | for (devfn = 0; devfn < 256; devfn += 8) { | ||
| 27 | if (!raw_pci_read(0, n, devfn, PCI_VENDOR_ID, 2, &l) && | ||
| 28 | l != 0x0000 && l != 0xffff) { | ||
| 29 | DBG("Found device at %02x:%02x [%04x]\n", n, devfn, l); | ||
| 30 | printk(KERN_INFO "PCI: Discovered peer bus %02x\n", n); | ||
| 31 | pci_scan_bus_on_node(n, &pci_root_ops, node); | ||
| 32 | break; | ||
| 33 | } | ||
| 34 | } | ||
| 35 | } | ||
| 36 | } | 22 | } |
| 37 | 23 | ||
| 38 | int __init pci_legacy_init(void) | 24 | int __init pci_legacy_init(void) |
| @@ -50,6 +36,28 @@ int __init pci_legacy_init(void) | |||
| 50 | return 0; | 36 | return 0; |
| 51 | } | 37 | } |
| 52 | 38 | ||
| 39 | void pcibios_scan_specific_bus(int busn) | ||
| 40 | { | ||
| 41 | int devfn; | ||
| 42 | long node; | ||
| 43 | u32 l; | ||
| 44 | |||
| 45 | if (pci_find_bus(0, busn)) | ||
| 46 | return; | ||
| 47 | |||
| 48 | node = get_mp_bus_to_node(busn); | ||
| 49 | for (devfn = 0; devfn < 256; devfn += 8) { | ||
| 50 | if (!raw_pci_read(0, busn, devfn, PCI_VENDOR_ID, 2, &l) && | ||
| 51 | l != 0x0000 && l != 0xffff) { | ||
| 52 | DBG("Found device at %02x:%02x [%04x]\n", busn, devfn, l); | ||
| 53 | printk(KERN_INFO "PCI: Discovered peer bus %02x\n", busn); | ||
| 54 | pci_scan_bus_on_node(busn, &pci_root_ops, node); | ||
| 55 | return; | ||
| 56 | } | ||
| 57 | } | ||
| 58 | } | ||
| 59 | EXPORT_SYMBOL_GPL(pcibios_scan_specific_bus); | ||
| 60 | |||
| 53 | int __init pci_subsys_init(void) | 61 | int __init pci_subsys_init(void) |
| 54 | { | 62 | { |
| 55 | /* | 63 | /* |
diff --git a/arch/x86/pci/mmconfig-shared.c b/arch/x86/pci/mmconfig-shared.c index 39b9ebe8f886..a918553ebc75 100644 --- a/arch/x86/pci/mmconfig-shared.c +++ b/arch/x86/pci/mmconfig-shared.c | |||
| @@ -483,16 +483,17 @@ static void __init pci_mmcfg_reject_broken(int early) | |||
| 483 | list_for_each_entry(cfg, &pci_mmcfg_list, list) { | 483 | list_for_each_entry(cfg, &pci_mmcfg_list, list) { |
| 484 | int valid = 0; | 484 | int valid = 0; |
| 485 | 485 | ||
| 486 | if (!early && !acpi_disabled) | 486 | if (!early && !acpi_disabled) { |
| 487 | valid = is_mmconf_reserved(is_acpi_reserved, cfg, 0); | 487 | valid = is_mmconf_reserved(is_acpi_reserved, cfg, 0); |
| 488 | 488 | ||
| 489 | if (valid) | 489 | if (valid) |
| 490 | continue; | 490 | continue; |
| 491 | 491 | else | |
| 492 | if (!early) | 492 | printk(KERN_ERR FW_BUG PREFIX |
| 493 | printk(KERN_ERR FW_BUG PREFIX | 493 | "MMCONFIG at %pR not reserved in " |
| 494 | "MMCONFIG at %pR not reserved in " | 494 | "ACPI motherboard resources\n", |
| 495 | "ACPI motherboard resources\n", &cfg->res); | 495 | &cfg->res); |
| 496 | } | ||
| 496 | 497 | ||
| 497 | /* Don't try to do this check unless configuration | 498 | /* Don't try to do this check unless configuration |
| 498 | type 1 is available. how about type 2 ?*/ | 499 | type 1 is available. how about type 2 ?*/ |
diff --git a/arch/x86/pci/mmconfig_32.c b/arch/x86/pci/mmconfig_32.c index 90d5fd476ed4..a3d9c54792ae 100644 --- a/arch/x86/pci/mmconfig_32.c +++ b/arch/x86/pci/mmconfig_32.c | |||
| @@ -64,7 +64,7 @@ err: *value = -1; | |||
| 64 | if (!base) | 64 | if (!base) |
| 65 | goto err; | 65 | goto err; |
| 66 | 66 | ||
| 67 | spin_lock_irqsave(&pci_config_lock, flags); | 67 | raw_spin_lock_irqsave(&pci_config_lock, flags); |
| 68 | 68 | ||
| 69 | pci_exp_set_dev_base(base, bus, devfn); | 69 | pci_exp_set_dev_base(base, bus, devfn); |
| 70 | 70 | ||
| @@ -79,7 +79,7 @@ err: *value = -1; | |||
| 79 | *value = mmio_config_readl(mmcfg_virt_addr + reg); | 79 | *value = mmio_config_readl(mmcfg_virt_addr + reg); |
| 80 | break; | 80 | break; |
| 81 | } | 81 | } |
| 82 | spin_unlock_irqrestore(&pci_config_lock, flags); | 82 | raw_spin_unlock_irqrestore(&pci_config_lock, flags); |
| 83 | 83 | ||
| 84 | return 0; | 84 | return 0; |
| 85 | } | 85 | } |
| @@ -97,7 +97,7 @@ static int pci_mmcfg_write(unsigned int seg, unsigned int bus, | |||
| 97 | if (!base) | 97 | if (!base) |
| 98 | return -EINVAL; | 98 | return -EINVAL; |
| 99 | 99 | ||
| 100 | spin_lock_irqsave(&pci_config_lock, flags); | 100 | raw_spin_lock_irqsave(&pci_config_lock, flags); |
| 101 | 101 | ||
| 102 | pci_exp_set_dev_base(base, bus, devfn); | 102 | pci_exp_set_dev_base(base, bus, devfn); |
| 103 | 103 | ||
| @@ -112,7 +112,7 @@ static int pci_mmcfg_write(unsigned int seg, unsigned int bus, | |||
| 112 | mmio_config_writel(mmcfg_virt_addr + reg, value); | 112 | mmio_config_writel(mmcfg_virt_addr + reg, value); |
| 113 | break; | 113 | break; |
| 114 | } | 114 | } |
| 115 | spin_unlock_irqrestore(&pci_config_lock, flags); | 115 | raw_spin_unlock_irqrestore(&pci_config_lock, flags); |
| 116 | 116 | ||
| 117 | return 0; | 117 | return 0; |
| 118 | } | 118 | } |
diff --git a/arch/x86/pci/numaq_32.c b/arch/x86/pci/numaq_32.c index 8223738ad806..5c9e2458df4e 100644 --- a/arch/x86/pci/numaq_32.c +++ b/arch/x86/pci/numaq_32.c | |||
| @@ -37,7 +37,7 @@ static int pci_conf1_mq_read(unsigned int seg, unsigned int bus, | |||
| 37 | if (!value || (bus >= MAX_MP_BUSSES) || (devfn > 255) || (reg > 255)) | 37 | if (!value || (bus >= MAX_MP_BUSSES) || (devfn > 255) || (reg > 255)) |
| 38 | return -EINVAL; | 38 | return -EINVAL; |
| 39 | 39 | ||
| 40 | spin_lock_irqsave(&pci_config_lock, flags); | 40 | raw_spin_lock_irqsave(&pci_config_lock, flags); |
| 41 | 41 | ||
| 42 | write_cf8(bus, devfn, reg); | 42 | write_cf8(bus, devfn, reg); |
| 43 | 43 | ||
| @@ -62,7 +62,7 @@ static int pci_conf1_mq_read(unsigned int seg, unsigned int bus, | |||
| 62 | break; | 62 | break; |
| 63 | } | 63 | } |
| 64 | 64 | ||
| 65 | spin_unlock_irqrestore(&pci_config_lock, flags); | 65 | raw_spin_unlock_irqrestore(&pci_config_lock, flags); |
| 66 | 66 | ||
| 67 | return 0; | 67 | return 0; |
| 68 | } | 68 | } |
| @@ -76,7 +76,7 @@ static int pci_conf1_mq_write(unsigned int seg, unsigned int bus, | |||
| 76 | if ((bus >= MAX_MP_BUSSES) || (devfn > 255) || (reg > 255)) | 76 | if ((bus >= MAX_MP_BUSSES) || (devfn > 255) || (reg > 255)) |
| 77 | return -EINVAL; | 77 | return -EINVAL; |
| 78 | 78 | ||
| 79 | spin_lock_irqsave(&pci_config_lock, flags); | 79 | raw_spin_lock_irqsave(&pci_config_lock, flags); |
| 80 | 80 | ||
| 81 | write_cf8(bus, devfn, reg); | 81 | write_cf8(bus, devfn, reg); |
| 82 | 82 | ||
| @@ -101,7 +101,7 @@ static int pci_conf1_mq_write(unsigned int seg, unsigned int bus, | |||
| 101 | break; | 101 | break; |
| 102 | } | 102 | } |
| 103 | 103 | ||
| 104 | spin_unlock_irqrestore(&pci_config_lock, flags); | 104 | raw_spin_unlock_irqrestore(&pci_config_lock, flags); |
| 105 | 105 | ||
| 106 | return 0; | 106 | return 0; |
| 107 | } | 107 | } |
diff --git a/arch/x86/pci/pcbios.c b/arch/x86/pci/pcbios.c index 59a225c17b84..2492d165096a 100644 --- a/arch/x86/pci/pcbios.c +++ b/arch/x86/pci/pcbios.c | |||
| @@ -162,7 +162,7 @@ static int pci_bios_read(unsigned int seg, unsigned int bus, | |||
| 162 | if (!value || (bus > 255) || (devfn > 255) || (reg > 255)) | 162 | if (!value || (bus > 255) || (devfn > 255) || (reg > 255)) |
| 163 | return -EINVAL; | 163 | return -EINVAL; |
| 164 | 164 | ||
| 165 | spin_lock_irqsave(&pci_config_lock, flags); | 165 | raw_spin_lock_irqsave(&pci_config_lock, flags); |
| 166 | 166 | ||
| 167 | switch (len) { | 167 | switch (len) { |
| 168 | case 1: | 168 | case 1: |
| @@ -213,7 +213,7 @@ static int pci_bios_read(unsigned int seg, unsigned int bus, | |||
| 213 | break; | 213 | break; |
| 214 | } | 214 | } |
| 215 | 215 | ||
| 216 | spin_unlock_irqrestore(&pci_config_lock, flags); | 216 | raw_spin_unlock_irqrestore(&pci_config_lock, flags); |
| 217 | 217 | ||
| 218 | return (int)((result & 0xff00) >> 8); | 218 | return (int)((result & 0xff00) >> 8); |
| 219 | } | 219 | } |
| @@ -228,7 +228,7 @@ static int pci_bios_write(unsigned int seg, unsigned int bus, | |||
| 228 | if ((bus > 255) || (devfn > 255) || (reg > 255)) | 228 | if ((bus > 255) || (devfn > 255) || (reg > 255)) |
| 229 | return -EINVAL; | 229 | return -EINVAL; |
| 230 | 230 | ||
| 231 | spin_lock_irqsave(&pci_config_lock, flags); | 231 | raw_spin_lock_irqsave(&pci_config_lock, flags); |
| 232 | 232 | ||
| 233 | switch (len) { | 233 | switch (len) { |
| 234 | case 1: | 234 | case 1: |
| @@ -269,7 +269,7 @@ static int pci_bios_write(unsigned int seg, unsigned int bus, | |||
| 269 | break; | 269 | break; |
| 270 | } | 270 | } |
| 271 | 271 | ||
| 272 | spin_unlock_irqrestore(&pci_config_lock, flags); | 272 | raw_spin_unlock_irqrestore(&pci_config_lock, flags); |
| 273 | 273 | ||
| 274 | return (int)((result & 0xff00) >> 8); | 274 | return (int)((result & 0xff00) >> 8); |
| 275 | } | 275 | } |
diff --git a/arch/x86/power/cpu.c b/arch/x86/power/cpu.c index 0a979f3e5b8a..1290ba54b350 100644 --- a/arch/x86/power/cpu.c +++ b/arch/x86/power/cpu.c | |||
| @@ -105,6 +105,8 @@ static void __save_processor_state(struct saved_context *ctxt) | |||
| 105 | ctxt->cr4 = read_cr4(); | 105 | ctxt->cr4 = read_cr4(); |
| 106 | ctxt->cr8 = read_cr8(); | 106 | ctxt->cr8 = read_cr8(); |
| 107 | #endif | 107 | #endif |
| 108 | ctxt->misc_enable_saved = !rdmsrl_safe(MSR_IA32_MISC_ENABLE, | ||
| 109 | &ctxt->misc_enable); | ||
| 108 | } | 110 | } |
| 109 | 111 | ||
| 110 | /* Needed by apm.c */ | 112 | /* Needed by apm.c */ |
| @@ -152,6 +154,8 @@ static void fix_processor_context(void) | |||
| 152 | */ | 154 | */ |
| 153 | static void __restore_processor_state(struct saved_context *ctxt) | 155 | static void __restore_processor_state(struct saved_context *ctxt) |
| 154 | { | 156 | { |
| 157 | if (ctxt->misc_enable_saved) | ||
| 158 | wrmsrl(MSR_IA32_MISC_ENABLE, ctxt->misc_enable); | ||
| 155 | /* | 159 | /* |
| 156 | * control registers | 160 | * control registers |
| 157 | */ | 161 | */ |
diff --git a/arch/x86/xen/suspend.c b/arch/x86/xen/suspend.c index 987267f79bf5..a9c661108034 100644 --- a/arch/x86/xen/suspend.c +++ b/arch/x86/xen/suspend.c | |||
| @@ -60,6 +60,6 @@ static void xen_vcpu_notify_restore(void *data) | |||
| 60 | 60 | ||
| 61 | void xen_arch_resume(void) | 61 | void xen_arch_resume(void) |
| 62 | { | 62 | { |
| 63 | smp_call_function(xen_vcpu_notify_restore, | 63 | on_each_cpu(xen_vcpu_notify_restore, |
| 64 | (void *)CLOCK_EVT_NOTIFY_RESUME, 1); | 64 | (void *)CLOCK_EVT_NOTIFY_RESUME, 1); |
| 65 | } | 65 | } |
diff --git a/arch/xtensa/include/asm/cache.h b/arch/xtensa/include/asm/cache.h index f04c9891142f..ed8cd3cbd499 100644 --- a/arch/xtensa/include/asm/cache.h +++ b/arch/xtensa/include/asm/cache.h | |||
| @@ -29,5 +29,6 @@ | |||
| 29 | # define CACHE_WAY_SIZE ICACHE_WAY_SIZE | 29 | # define CACHE_WAY_SIZE ICACHE_WAY_SIZE |
| 30 | #endif | 30 | #endif |
| 31 | 31 | ||
| 32 | #define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES | ||
| 32 | 33 | ||
| 33 | #endif /* _XTENSA_CACHE_H */ | 34 | #endif /* _XTENSA_CACHE_H */ |
diff --git a/arch/xtensa/include/asm/hardirq.h b/arch/xtensa/include/asm/hardirq.h index 87cb19d1b10c..26664cef8f11 100644 --- a/arch/xtensa/include/asm/hardirq.h +++ b/arch/xtensa/include/asm/hardirq.h | |||
| @@ -11,18 +11,9 @@ | |||
| 11 | #ifndef _XTENSA_HARDIRQ_H | 11 | #ifndef _XTENSA_HARDIRQ_H |
| 12 | #define _XTENSA_HARDIRQ_H | 12 | #define _XTENSA_HARDIRQ_H |
| 13 | 13 | ||
| 14 | #include <linux/cache.h> | ||
| 15 | #include <asm/irq.h> | ||
| 16 | |||
| 17 | /* headers.S is sensitive to the offsets of these fields */ | ||
| 18 | typedef struct { | ||
| 19 | unsigned int __softirq_pending; | ||
| 20 | unsigned int __syscall_count; | ||
| 21 | struct task_struct * __ksoftirqd_task; /* waitqueue is too large */ | ||
| 22 | unsigned int __nmi_count; /* arch dependent */ | ||
| 23 | } ____cacheline_aligned irq_cpustat_t; | ||
| 24 | |||
| 25 | void ack_bad_irq(unsigned int irq); | 14 | void ack_bad_irq(unsigned int irq); |
| 26 | #include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */ | 15 | #define ack_bad_irq ack_bad_irq |
| 16 | |||
| 17 | #include <asm-generic/hardirq.h> | ||
| 27 | 18 | ||
| 28 | #endif /* _XTENSA_HARDIRQ_H */ | 19 | #endif /* _XTENSA_HARDIRQ_H */ |
diff --git a/arch/xtensa/include/asm/scatterlist.h b/arch/xtensa/include/asm/scatterlist.h index 810080bb0a2b..b1f9fdc1d5ba 100644 --- a/arch/xtensa/include/asm/scatterlist.h +++ b/arch/xtensa/include/asm/scatterlist.h | |||
| @@ -11,28 +11,7 @@ | |||
| 11 | #ifndef _XTENSA_SCATTERLIST_H | 11 | #ifndef _XTENSA_SCATTERLIST_H |
| 12 | #define _XTENSA_SCATTERLIST_H | 12 | #define _XTENSA_SCATTERLIST_H |
| 13 | 13 | ||
| 14 | #include <asm/types.h> | 14 | #include <asm-generic/scatterlist.h> |
| 15 | |||
| 16 | struct scatterlist { | ||
| 17 | #ifdef CONFIG_DEBUG_SG | ||
| 18 | unsigned long sg_magic; | ||
| 19 | #endif | ||
| 20 | unsigned long page_link; | ||
| 21 | unsigned int offset; | ||
| 22 | dma_addr_t dma_address; | ||
| 23 | unsigned int length; | ||
| 24 | }; | ||
| 25 | |||
| 26 | /* | ||
| 27 | * These macros should be used after a pci_map_sg call has been done | ||
| 28 | * to get bus addresses of each of the SG entries and their lengths. | ||
| 29 | * You should only work with the number of sg entries pci_map_sg | ||
| 30 | * returns, or alternatively stop on the first sg_dma_len(sg) which | ||
| 31 | * is 0. | ||
| 32 | */ | ||
| 33 | #define sg_dma_address(sg) ((sg)->dma_address) | ||
| 34 | #define sg_dma_len(sg) ((sg)->length) | ||
| 35 | |||
| 36 | 15 | ||
| 37 | #define ISA_DMA_THRESHOLD (~0UL) | 16 | #define ISA_DMA_THRESHOLD (~0UL) |
| 38 | 17 | ||
diff --git a/arch/xtensa/kernel/irq.c b/arch/xtensa/kernel/irq.c index 8cd38484e130..c64a5d387de5 100644 --- a/arch/xtensa/kernel/irq.c +++ b/arch/xtensa/kernel/irq.c | |||
| @@ -27,15 +27,6 @@ static unsigned int cached_irq_mask; | |||
| 27 | atomic_t irq_err_count; | 27 | atomic_t irq_err_count; |
| 28 | 28 | ||
| 29 | /* | 29 | /* |
| 30 | * 'what should we do if we get a hw irq event on an illegal vector'. | ||
| 31 | * each architecture has to answer this themselves. | ||
| 32 | */ | ||
| 33 | void ack_bad_irq(unsigned int irq) | ||
| 34 | { | ||
| 35 | printk("unexpected IRQ trap at vector %02x\n", irq); | ||
| 36 | } | ||
| 37 | |||
| 38 | /* | ||
| 39 | * do_IRQ handles all normal device IRQ's (the special | 30 | * do_IRQ handles all normal device IRQ's (the special |
| 40 | * SMP cross-CPU interrupts have their own specific | 31 | * SMP cross-CPU interrupts have their own specific |
| 41 | * handlers). | 32 | * handlers). |
diff --git a/arch/xtensa/kernel/vectors.S b/arch/xtensa/kernel/vectors.S index 74a7518faf16..70066e3582d0 100644 --- a/arch/xtensa/kernel/vectors.S +++ b/arch/xtensa/kernel/vectors.S | |||
| @@ -44,14 +44,12 @@ | |||
| 44 | 44 | ||
| 45 | #include <linux/linkage.h> | 45 | #include <linux/linkage.h> |
| 46 | #include <asm/ptrace.h> | 46 | #include <asm/ptrace.h> |
| 47 | #include <asm/ptrace.h> | ||
| 48 | #include <asm/current.h> | 47 | #include <asm/current.h> |
| 49 | #include <asm/asm-offsets.h> | 48 | #include <asm/asm-offsets.h> |
| 50 | #include <asm/pgtable.h> | 49 | #include <asm/pgtable.h> |
| 51 | #include <asm/processor.h> | 50 | #include <asm/processor.h> |
| 52 | #include <asm/page.h> | 51 | #include <asm/page.h> |
| 53 | #include <asm/thread_info.h> | 52 | #include <asm/thread_info.h> |
| 54 | #include <asm/processor.h> | ||
| 55 | 53 | ||
| 56 | #define WINDOW_VECTORS_SIZE 0x180 | 54 | #define WINDOW_VECTORS_SIZE 0x180 |
| 57 | 55 | ||
diff --git a/arch/xtensa/mm/fault.c b/arch/xtensa/mm/fault.c index bc0733359a88..e367e3026436 100644 --- a/arch/xtensa/mm/fault.c +++ b/arch/xtensa/mm/fault.c | |||
| @@ -105,7 +105,6 @@ good_area: | |||
| 105 | * make sure we exit gracefully rather than endlessly redo | 105 | * make sure we exit gracefully rather than endlessly redo |
| 106 | * the fault. | 106 | * the fault. |
| 107 | */ | 107 | */ |
| 108 | survive: | ||
| 109 | fault = handle_mm_fault(mm, vma, address, is_write ? FAULT_FLAG_WRITE : 0); | 108 | fault = handle_mm_fault(mm, vma, address, is_write ? FAULT_FLAG_WRITE : 0); |
| 110 | if (unlikely(fault & VM_FAULT_ERROR)) { | 109 | if (unlikely(fault & VM_FAULT_ERROR)) { |
| 111 | if (fault & VM_FAULT_OOM) | 110 | if (fault & VM_FAULT_OOM) |
| @@ -146,15 +145,10 @@ bad_area: | |||
| 146 | */ | 145 | */ |
| 147 | out_of_memory: | 146 | out_of_memory: |
| 148 | up_read(&mm->mmap_sem); | 147 | up_read(&mm->mmap_sem); |
| 149 | if (is_global_init(current)) { | 148 | if (!user_mode(regs)) |
| 150 | yield(); | 149 | bad_page_fault(regs, address, SIGKILL); |
| 151 | down_read(&mm->mmap_sem); | 150 | else |
| 152 | goto survive; | 151 | pagefault_out_of_memory(); |
| 153 | } | ||
| 154 | printk("VM: killing process %s\n", current->comm); | ||
| 155 | if (user_mode(regs)) | ||
| 156 | do_group_exit(SIGKILL); | ||
| 157 | bad_page_fault(regs, address, SIGKILL); | ||
| 158 | return; | 152 | return; |
| 159 | 153 | ||
| 160 | do_sigbus: | 154 | do_sigbus: |