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Diffstat (limited to 'arch/x86/kernel/cpu/cpufreq/speedstep-ich.c')
-rw-r--r--arch/x86/kernel/cpu/cpufreq/speedstep-ich.c28
1 files changed, 12 insertions, 16 deletions
diff --git a/arch/x86/kernel/cpu/cpufreq/speedstep-ich.c b/arch/x86/kernel/cpu/cpufreq/speedstep-ich.c
index 561758e95180..a748ce782fee 100644
--- a/arch/x86/kernel/cpu/cpufreq/speedstep-ich.c
+++ b/arch/x86/kernel/cpu/cpufreq/speedstep-ich.c
@@ -53,10 +53,6 @@ static struct cpufreq_frequency_table speedstep_freqs[] = {
53}; 53};
54 54
55 55
56#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
57 "speedstep-ich", msg)
58
59
60/** 56/**
61 * speedstep_find_register - read the PMBASE address 57 * speedstep_find_register - read the PMBASE address
62 * 58 *
@@ -80,7 +76,7 @@ static int speedstep_find_register(void)
80 return -ENODEV; 76 return -ENODEV;
81 } 77 }
82 78
83 dprintk("pmbase is 0x%x\n", pmbase); 79 pr_debug("pmbase is 0x%x\n", pmbase);
84 return 0; 80 return 0;
85} 81}
86 82
@@ -106,13 +102,13 @@ static void speedstep_set_state(unsigned int state)
106 /* read state */ 102 /* read state */
107 value = inb(pmbase + 0x50); 103 value = inb(pmbase + 0x50);
108 104
109 dprintk("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value); 105 pr_debug("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value);
110 106
111 /* write new state */ 107 /* write new state */
112 value &= 0xFE; 108 value &= 0xFE;
113 value |= state; 109 value |= state;
114 110
115 dprintk("writing 0x%x to pmbase 0x%x + 0x50\n", value, pmbase); 111 pr_debug("writing 0x%x to pmbase 0x%x + 0x50\n", value, pmbase);
116 112
117 /* Disable bus master arbitration */ 113 /* Disable bus master arbitration */
118 pm2_blk = inb(pmbase + 0x20); 114 pm2_blk = inb(pmbase + 0x20);
@@ -132,10 +128,10 @@ static void speedstep_set_state(unsigned int state)
132 /* Enable IRQs */ 128 /* Enable IRQs */
133 local_irq_restore(flags); 129 local_irq_restore(flags);
134 130
135 dprintk("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value); 131 pr_debug("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value);
136 132
137 if (state == (value & 0x1)) 133 if (state == (value & 0x1))
138 dprintk("change to %u MHz succeeded\n", 134 pr_debug("change to %u MHz succeeded\n",
139 speedstep_get_frequency(speedstep_processor) / 1000); 135 speedstep_get_frequency(speedstep_processor) / 1000);
140 else 136 else
141 printk(KERN_ERR "cpufreq: change failed - I/O error\n"); 137 printk(KERN_ERR "cpufreq: change failed - I/O error\n");
@@ -165,7 +161,7 @@ static int speedstep_activate(void)
165 pci_read_config_word(speedstep_chipset_dev, 0x00A0, &value); 161 pci_read_config_word(speedstep_chipset_dev, 0x00A0, &value);
166 if (!(value & 0x08)) { 162 if (!(value & 0x08)) {
167 value |= 0x08; 163 value |= 0x08;
168 dprintk("activating SpeedStep (TM) registers\n"); 164 pr_debug("activating SpeedStep (TM) registers\n");
169 pci_write_config_word(speedstep_chipset_dev, 0x00A0, value); 165 pci_write_config_word(speedstep_chipset_dev, 0x00A0, value);
170 } 166 }
171 167
@@ -218,7 +214,7 @@ static unsigned int speedstep_detect_chipset(void)
218 return 2; /* 2-M */ 214 return 2; /* 2-M */
219 215
220 if (hostbridge->revision < 5) { 216 if (hostbridge->revision < 5) {
221 dprintk("hostbridge does not support speedstep\n"); 217 pr_debug("hostbridge does not support speedstep\n");
222 speedstep_chipset_dev = NULL; 218 speedstep_chipset_dev = NULL;
223 pci_dev_put(hostbridge); 219 pci_dev_put(hostbridge);
224 return 0; 220 return 0;
@@ -246,7 +242,7 @@ static unsigned int speedstep_get(unsigned int cpu)
246 if (smp_call_function_single(cpu, get_freq_data, &speed, 1) != 0) 242 if (smp_call_function_single(cpu, get_freq_data, &speed, 1) != 0)
247 BUG(); 243 BUG();
248 244
249 dprintk("detected %u kHz as current frequency\n", speed); 245 pr_debug("detected %u kHz as current frequency\n", speed);
250 return speed; 246 return speed;
251} 247}
252 248
@@ -276,7 +272,7 @@ static int speedstep_target(struct cpufreq_policy *policy,
276 freqs.new = speedstep_freqs[newstate].frequency; 272 freqs.new = speedstep_freqs[newstate].frequency;
277 freqs.cpu = policy->cpu; 273 freqs.cpu = policy->cpu;
278 274
279 dprintk("transiting from %u to %u kHz\n", freqs.old, freqs.new); 275 pr_debug("transiting from %u to %u kHz\n", freqs.old, freqs.new);
280 276
281 /* no transition necessary */ 277 /* no transition necessary */
282 if (freqs.old == freqs.new) 278 if (freqs.old == freqs.new)
@@ -351,7 +347,7 @@ static int speedstep_cpu_init(struct cpufreq_policy *policy)
351 if (!speed) 347 if (!speed)
352 return -EIO; 348 return -EIO;
353 349
354 dprintk("currently at %s speed setting - %i MHz\n", 350 pr_debug("currently at %s speed setting - %i MHz\n",
355 (speed == speedstep_freqs[SPEEDSTEP_LOW].frequency) 351 (speed == speedstep_freqs[SPEEDSTEP_LOW].frequency)
356 ? "low" : "high", 352 ? "low" : "high",
357 (speed / 1000)); 353 (speed / 1000));
@@ -405,14 +401,14 @@ static int __init speedstep_init(void)
405 /* detect processor */ 401 /* detect processor */
406 speedstep_processor = speedstep_detect_processor(); 402 speedstep_processor = speedstep_detect_processor();
407 if (!speedstep_processor) { 403 if (!speedstep_processor) {
408 dprintk("Intel(R) SpeedStep(TM) capable processor " 404 pr_debug("Intel(R) SpeedStep(TM) capable processor "
409 "not found\n"); 405 "not found\n");
410 return -ENODEV; 406 return -ENODEV;
411 } 407 }
412 408
413 /* detect chipset */ 409 /* detect chipset */
414 if (!speedstep_detect_chipset()) { 410 if (!speedstep_detect_chipset()) {
415 dprintk("Intel(R) SpeedStep(TM) for this chipset not " 411 pr_debug("Intel(R) SpeedStep(TM) for this chipset not "
416 "(yet) available.\n"); 412 "(yet) available.\n");
417 return -ENODEV; 413 return -ENODEV;
418 } 414 }