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-rw-r--r--arch/sh/kernel/setup.c144
1 files changed, 0 insertions, 144 deletions
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index d6b018c7ebdc..4f267160c515 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -12,7 +12,6 @@
12#include <linux/initrd.h> 12#include <linux/initrd.h>
13#include <linux/bootmem.h> 13#include <linux/bootmem.h>
14#include <linux/console.h> 14#include <linux/console.h>
15#include <linux/seq_file.h>
16#include <linux/root_dev.h> 15#include <linux/root_dev.h>
17#include <linux/utsname.h> 16#include <linux/utsname.h>
18#include <linux/nodemask.h> 17#include <linux/nodemask.h>
@@ -319,146 +318,3 @@ int test_mode_pin(int pin)
319{ 318{
320 return sh_mv.mv_mode_pins() & pin; 319 return sh_mv.mv_mode_pins() & pin;
321} 320}
322
323static const char *cpu_name[] = {
324 [CPU_SH7201] = "SH7201",
325 [CPU_SH7203] = "SH7203", [CPU_SH7263] = "SH7263",
326 [CPU_SH7206] = "SH7206", [CPU_SH7619] = "SH7619",
327 [CPU_SH7705] = "SH7705", [CPU_SH7706] = "SH7706",
328 [CPU_SH7707] = "SH7707", [CPU_SH7708] = "SH7708",
329 [CPU_SH7709] = "SH7709", [CPU_SH7710] = "SH7710",
330 [CPU_SH7712] = "SH7712", [CPU_SH7720] = "SH7720",
331 [CPU_SH7721] = "SH7721", [CPU_SH7729] = "SH7729",
332 [CPU_SH7750] = "SH7750", [CPU_SH7750S] = "SH7750S",
333 [CPU_SH7750R] = "SH7750R", [CPU_SH7751] = "SH7751",
334 [CPU_SH7751R] = "SH7751R", [CPU_SH7760] = "SH7760",
335 [CPU_SH4_202] = "SH4-202", [CPU_SH4_501] = "SH4-501",
336 [CPU_SH7763] = "SH7763", [CPU_SH7770] = "SH7770",
337 [CPU_SH7780] = "SH7780", [CPU_SH7781] = "SH7781",
338 [CPU_SH7343] = "SH7343", [CPU_SH7785] = "SH7785",
339 [CPU_SH7786] = "SH7786", [CPU_SH7757] = "SH7757",
340 [CPU_SH7722] = "SH7722", [CPU_SHX3] = "SH-X3",
341 [CPU_SH5_101] = "SH5-101", [CPU_SH5_103] = "SH5-103",
342 [CPU_MXG] = "MX-G", [CPU_SH7723] = "SH7723",
343 [CPU_SH7366] = "SH7366", [CPU_SH7724] = "SH7724",
344 [CPU_SH_NONE] = "Unknown"
345};
346
347const char *get_cpu_subtype(struct sh_cpuinfo *c)
348{
349 return cpu_name[c->type];
350}
351EXPORT_SYMBOL(get_cpu_subtype);
352
353#ifdef CONFIG_PROC_FS
354/* Symbolic CPU flags, keep in sync with asm/cpu-features.h */
355static const char *cpu_flags[] = {
356 "none", "fpu", "p2flush", "mmuassoc", "dsp", "perfctr",
357 "ptea", "llsc", "l2", "op32", "pteaex", NULL
358};
359
360static void show_cpuflags(struct seq_file *m, struct sh_cpuinfo *c)
361{
362 unsigned long i;
363
364 seq_printf(m, "cpu flags\t:");
365
366 if (!c->flags) {
367 seq_printf(m, " %s\n", cpu_flags[0]);
368 return;
369 }
370
371 for (i = 0; cpu_flags[i]; i++)
372 if ((c->flags & (1 << i)))
373 seq_printf(m, " %s", cpu_flags[i+1]);
374
375 seq_printf(m, "\n");
376}
377
378static void show_cacheinfo(struct seq_file *m, const char *type,
379 struct cache_info info)
380{
381 unsigned int cache_size;
382
383 cache_size = info.ways * info.sets * info.linesz;
384
385 seq_printf(m, "%s size\t: %2dKiB (%d-way)\n",
386 type, cache_size >> 10, info.ways);
387}
388
389/*
390 * Get CPU information for use by the procfs.
391 */
392static int show_cpuinfo(struct seq_file *m, void *v)
393{
394 struct sh_cpuinfo *c = v;
395 unsigned int cpu = c - cpu_data;
396
397 if (!cpu_online(cpu))
398 return 0;
399
400 if (cpu == 0)
401 seq_printf(m, "machine\t\t: %s\n", get_system_type());
402 else
403 seq_printf(m, "\n");
404
405 seq_printf(m, "processor\t: %d\n", cpu);
406 seq_printf(m, "cpu family\t: %s\n", init_utsname()->machine);
407 seq_printf(m, "cpu type\t: %s\n", get_cpu_subtype(c));
408 if (c->cut_major == -1)
409 seq_printf(m, "cut\t\t: unknown\n");
410 else if (c->cut_minor == -1)
411 seq_printf(m, "cut\t\t: %d.x\n", c->cut_major);
412 else
413 seq_printf(m, "cut\t\t: %d.%d\n", c->cut_major, c->cut_minor);
414
415 show_cpuflags(m, c);
416
417 seq_printf(m, "cache type\t: ");
418
419 /*
420 * Check for what type of cache we have, we support both the
421 * unified cache on the SH-2 and SH-3, as well as the harvard
422 * style cache on the SH-4.
423 */
424 if (c->icache.flags & SH_CACHE_COMBINED) {
425 seq_printf(m, "unified\n");
426 show_cacheinfo(m, "cache", c->icache);
427 } else {
428 seq_printf(m, "split (harvard)\n");
429 show_cacheinfo(m, "icache", c->icache);
430 show_cacheinfo(m, "dcache", c->dcache);
431 }
432
433 /* Optional secondary cache */
434 if (c->flags & CPU_HAS_L2_CACHE)
435 show_cacheinfo(m, "scache", c->scache);
436
437 seq_printf(m, "address sizes\t: %u bits physical\n", c->phys_bits);
438
439 seq_printf(m, "bogomips\t: %lu.%02lu\n",
440 c->loops_per_jiffy/(500000/HZ),
441 (c->loops_per_jiffy/(5000/HZ)) % 100);
442
443 return 0;
444}
445
446static void *c_start(struct seq_file *m, loff_t *pos)
447{
448 return *pos < NR_CPUS ? cpu_data + *pos : NULL;
449}
450static void *c_next(struct seq_file *m, void *v, loff_t *pos)
451{
452 ++*pos;
453 return c_start(m, pos);
454}
455static void c_stop(struct seq_file *m, void *v)
456{
457}
458const struct seq_operations cpuinfo_op = {
459 .start = c_start,
460 .next = c_next,
461 .stop = c_stop,
462 .show = show_cpuinfo,
463};
464#endif /* CONFIG_PROC_FS */