diff options
Diffstat (limited to 'arch/sh/kernel/cpu/shmobile/pm.c')
-rw-r--r-- | arch/sh/kernel/cpu/shmobile/pm.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/sh/kernel/cpu/shmobile/pm.c b/arch/sh/kernel/cpu/shmobile/pm.c index a94dc480f0c1..ca642f39e2e3 100644 --- a/arch/sh/kernel/cpu/shmobile/pm.c +++ b/arch/sh/kernel/cpu/shmobile/pm.c | |||
@@ -15,6 +15,7 @@ | |||
15 | #include <linux/suspend.h> | 15 | #include <linux/suspend.h> |
16 | #include <asm/suspend.h> | 16 | #include <asm/suspend.h> |
17 | #include <asm/uaccess.h> | 17 | #include <asm/uaccess.h> |
18 | #include <asm/cacheflush.h> | ||
18 | 19 | ||
19 | /* | 20 | /* |
20 | * Notifier lists for pre/post sleep notification | 21 | * Notifier lists for pre/post sleep notification |
@@ -54,6 +55,10 @@ void sh_mobile_call_standby(unsigned long mode) | |||
54 | atomic_notifier_call_chain(&sh_mobile_pre_sleep_notifier_list, | 55 | atomic_notifier_call_chain(&sh_mobile_pre_sleep_notifier_list, |
55 | mode, NULL); | 56 | mode, NULL); |
56 | 57 | ||
58 | /* flush the caches if MMU flag is set */ | ||
59 | if (mode & SUSP_SH_MMU) | ||
60 | flush_cache_all(); | ||
61 | |||
57 | /* Let assembly snippet in on-chip memory handle the rest */ | 62 | /* Let assembly snippet in on-chip memory handle the rest */ |
58 | standby_onchip_mem(mode, ILRAM_BASE); | 63 | standby_onchip_mem(mode, ILRAM_BASE); |
59 | 64 | ||
@@ -81,6 +86,16 @@ void sh_mobile_register_self_refresh(unsigned long flags, | |||
81 | /* part 0: data area */ | 86 | /* part 0: data area */ |
82 | sdp = onchip_mem; | 87 | sdp = onchip_mem; |
83 | sdp->addr.stbcr = 0xa4150020; /* STBCR */ | 88 | sdp->addr.stbcr = 0xa4150020; /* STBCR */ |
89 | sdp->addr.pteh = 0xff000000; /* PTEH */ | ||
90 | sdp->addr.ptel = 0xff000004; /* PTEL */ | ||
91 | sdp->addr.ttb = 0xff000008; /* TTB */ | ||
92 | sdp->addr.tea = 0xff00000c; /* TEA */ | ||
93 | sdp->addr.mmucr = 0xff000010; /* MMUCR */ | ||
94 | sdp->addr.ptea = 0xff000034; /* PTEA */ | ||
95 | sdp->addr.pascr = 0xff000070; /* PASCR */ | ||
96 | sdp->addr.irmcr = 0xff000078; /* IRMCR */ | ||
97 | sdp->addr.ccr = 0xff00001c; /* CCR */ | ||
98 | sdp->addr.ramcr = 0xff000074; /* RAMCR */ | ||
84 | vp = sdp + 1; | 99 | vp = sdp + 1; |
85 | 100 | ||
86 | /* part 1: common code to enter sleep mode */ | 101 | /* part 1: common code to enter sleep mode */ |