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-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7343.c4
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7366.c1
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7722.c3
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7723.c6
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7724.c6
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7763.c3
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7770.c10
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7780.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7785.c6
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7786.c6
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-shx3.c4
11 files changed, 51 insertions, 0 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
index 09fb5814d925..fbae06b1c98d 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
@@ -270,6 +270,7 @@ static struct plat_sci_port sci_platform_data[] = {
270 .mapbase = 0xffe00000, 270 .mapbase = 0xffe00000,
271 .flags = UPF_BOOT_AUTOCONF, 271 .flags = UPF_BOOT_AUTOCONF,
272 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, 272 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
273 .scbrr_algo_id = SCBRR_ALGO_2,
273 .type = PORT_SCIF, 274 .type = PORT_SCIF,
274 .irqs = { 80, 80, 80, 80 }, 275 .irqs = { 80, 80, 80, 80 },
275 .clk = "scif0", 276 .clk = "scif0",
@@ -277,6 +278,7 @@ static struct plat_sci_port sci_platform_data[] = {
277 .mapbase = 0xffe10000, 278 .mapbase = 0xffe10000,
278 .flags = UPF_BOOT_AUTOCONF, 279 .flags = UPF_BOOT_AUTOCONF,
279 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, 280 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
281 .scbrr_algo_id = SCBRR_ALGO_2,
280 .type = PORT_SCIF, 282 .type = PORT_SCIF,
281 .irqs = { 81, 81, 81, 81 }, 283 .irqs = { 81, 81, 81, 81 },
282 .clk = "scif1", 284 .clk = "scif1",
@@ -284,6 +286,7 @@ static struct plat_sci_port sci_platform_data[] = {
284 .mapbase = 0xffe20000, 286 .mapbase = 0xffe20000,
285 .flags = UPF_BOOT_AUTOCONF, 287 .flags = UPF_BOOT_AUTOCONF,
286 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, 288 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
289 .scbrr_algo_id = SCBRR_ALGO_2,
287 .type = PORT_SCIF, 290 .type = PORT_SCIF,
288 .irqs = { 82, 82, 82, 82 }, 291 .irqs = { 82, 82, 82, 82 },
289 .clk = "scif2", 292 .clk = "scif2",
@@ -291,6 +294,7 @@ static struct plat_sci_port sci_platform_data[] = {
291 .mapbase = 0xffe30000, 294 .mapbase = 0xffe30000,
292 .flags = UPF_BOOT_AUTOCONF, 295 .flags = UPF_BOOT_AUTOCONF,
293 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, 296 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
297 .scbrr_algo_id = SCBRR_ALGO_2,
294 .type = PORT_SCIF, 298 .type = PORT_SCIF,
295 .irqs = { 83, 83, 83, 83 }, 299 .irqs = { 83, 83, 83, 83 },
296 .clk = "scif3", 300 .clk = "scif3",
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
index 307777cf04cc..d4ee429032b1 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
@@ -281,6 +281,7 @@ static struct plat_sci_port sci_platform_data[] = {
281 .mapbase = 0xffe00000, 281 .mapbase = 0xffe00000,
282 .flags = UPF_BOOT_AUTOCONF, 282 .flags = UPF_BOOT_AUTOCONF,
283 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 283 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
284 .scbrr_algo_id = SCBRR_ALGO_2,
284 .type = PORT_SCIF, 285 .type = PORT_SCIF,
285 .irqs = { 80, 80, 80, 80 }, 286 .irqs = { 80, 80, 80, 80 },
286 .clk = "scif0", 287 .clk = "scif0",
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
index ffc69bc95932..f7b0551bf104 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
@@ -306,6 +306,7 @@ static struct plat_sci_port sci_platform_data[] = {
306 .mapbase = 0xffe00000, 306 .mapbase = 0xffe00000,
307 .flags = UPF_BOOT_AUTOCONF, 307 .flags = UPF_BOOT_AUTOCONF,
308 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 308 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
309 .scbrr_algo_id = SCBRR_ALGO_2,
309 .type = PORT_SCIF, 310 .type = PORT_SCIF,
310 .irqs = { 80, 80, 80, 80 }, 311 .irqs = { 80, 80, 80, 80 },
311 .clk = "scif0", 312 .clk = "scif0",
@@ -313,6 +314,7 @@ static struct plat_sci_port sci_platform_data[] = {
313 .mapbase = 0xffe10000, 314 .mapbase = 0xffe10000,
314 .flags = UPF_BOOT_AUTOCONF, 315 .flags = UPF_BOOT_AUTOCONF,
315 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 316 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
317 .scbrr_algo_id = SCBRR_ALGO_2,
316 .type = PORT_SCIF, 318 .type = PORT_SCIF,
317 .irqs = { 81, 81, 81, 81 }, 319 .irqs = { 81, 81, 81, 81 },
318 .clk = "scif1", 320 .clk = "scif1",
@@ -320,6 +322,7 @@ static struct plat_sci_port sci_platform_data[] = {
320 .mapbase = 0xffe20000, 322 .mapbase = 0xffe20000,
321 .flags = UPF_BOOT_AUTOCONF, 323 .flags = UPF_BOOT_AUTOCONF,
322 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 324 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
325 .scbrr_algo_id = SCBRR_ALGO_2,
323 .type = PORT_SCIF, 326 .type = PORT_SCIF,
324 .irqs = { 82, 82, 82, 82 }, 327 .irqs = { 82, 82, 82, 82 },
325 .clk = "scif2", 328 .clk = "scif2",
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
index 6ce331a8f1bd..bb4837b9dcf4 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
@@ -322,6 +322,7 @@ static struct plat_sci_port sci_platform_data[] = {
322 .mapbase = 0xffe00000, 322 .mapbase = 0xffe00000,
323 .flags = UPF_BOOT_AUTOCONF, 323 .flags = UPF_BOOT_AUTOCONF,
324 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 324 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
325 .scbrr_algo_id = SCBRR_ALGO_2,
325 .type = PORT_SCIF, 326 .type = PORT_SCIF,
326 .irqs = { 80, 80, 80, 80 }, 327 .irqs = { 80, 80, 80, 80 },
327 .clk = "scif0", 328 .clk = "scif0",
@@ -329,6 +330,7 @@ static struct plat_sci_port sci_platform_data[] = {
329 .mapbase = 0xffe10000, 330 .mapbase = 0xffe10000,
330 .flags = UPF_BOOT_AUTOCONF, 331 .flags = UPF_BOOT_AUTOCONF,
331 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 332 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
333 .scbrr_algo_id = SCBRR_ALGO_2,
332 .type = PORT_SCIF, 334 .type = PORT_SCIF,
333 .irqs = { 81, 81, 81, 81 }, 335 .irqs = { 81, 81, 81, 81 },
334 .clk = "scif1", 336 .clk = "scif1",
@@ -336,6 +338,7 @@ static struct plat_sci_port sci_platform_data[] = {
336 .mapbase = 0xffe20000, 338 .mapbase = 0xffe20000,
337 .flags = UPF_BOOT_AUTOCONF, 339 .flags = UPF_BOOT_AUTOCONF,
338 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 340 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
341 .scbrr_algo_id = SCBRR_ALGO_2,
339 .type = PORT_SCIF, 342 .type = PORT_SCIF,
340 .irqs = { 82, 82, 82, 82 }, 343 .irqs = { 82, 82, 82, 82 },
341 .clk = "scif2", 344 .clk = "scif2",
@@ -343,6 +346,7 @@ static struct plat_sci_port sci_platform_data[] = {
343 .mapbase = 0xa4e30000, 346 .mapbase = 0xa4e30000,
344 .flags = UPF_BOOT_AUTOCONF, 347 .flags = UPF_BOOT_AUTOCONF,
345 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 348 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
349 .scbrr_algo_id = SCBRR_ALGO_3,
346 .type = PORT_SCIFA, 350 .type = PORT_SCIFA,
347 .irqs = { 56, 56, 56, 56 }, 351 .irqs = { 56, 56, 56, 56 },
348 .clk = "scif3", 352 .clk = "scif3",
@@ -350,6 +354,7 @@ static struct plat_sci_port sci_platform_data[] = {
350 .mapbase = 0xa4e40000, 354 .mapbase = 0xa4e40000,
351 .flags = UPF_BOOT_AUTOCONF, 355 .flags = UPF_BOOT_AUTOCONF,
352 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 356 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
357 .scbrr_algo_id = SCBRR_ALGO_3,
353 .type = PORT_SCIFA, 358 .type = PORT_SCIFA,
354 .irqs = { 88, 88, 88, 88 }, 359 .irqs = { 88, 88, 88, 88 },
355 .clk = "scif4", 360 .clk = "scif4",
@@ -357,6 +362,7 @@ static struct plat_sci_port sci_platform_data[] = {
357 .mapbase = 0xa4e50000, 362 .mapbase = 0xa4e50000,
358 .flags = UPF_BOOT_AUTOCONF, 363 .flags = UPF_BOOT_AUTOCONF,
359 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 364 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
365 .scbrr_algo_id = SCBRR_ALGO_3,
360 .type = PORT_SCIFA, 366 .type = PORT_SCIFA,
361 .irqs = { 109, 109, 109, 109 }, 367 .irqs = { 109, 109, 109, 109 },
362 .clk = "scif5", 368 .clk = "scif5",
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
index 4bf03c1ec8d6..c934b78e5658 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
@@ -29,6 +29,7 @@ static struct plat_sci_port sci_platform_data[] = {
29 .mapbase = 0xffe00000, 29 .mapbase = 0xffe00000,
30 .flags = UPF_BOOT_AUTOCONF, 30 .flags = UPF_BOOT_AUTOCONF,
31 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 31 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
32 .scbrr_algo_id = SCBRR_ALGO_2,
32 .type = PORT_SCIF, 33 .type = PORT_SCIF,
33 .irqs = { 80, 80, 80, 80 }, 34 .irqs = { 80, 80, 80, 80 },
34 .clk = "scif0", 35 .clk = "scif0",
@@ -36,6 +37,7 @@ static struct plat_sci_port sci_platform_data[] = {
36 .mapbase = 0xffe10000, 37 .mapbase = 0xffe10000,
37 .flags = UPF_BOOT_AUTOCONF, 38 .flags = UPF_BOOT_AUTOCONF,
38 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 39 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
40 .scbrr_algo_id = SCBRR_ALGO_2,
39 .type = PORT_SCIF, 41 .type = PORT_SCIF,
40 .irqs = { 81, 81, 81, 81 }, 42 .irqs = { 81, 81, 81, 81 },
41 .clk = "scif1", 43 .clk = "scif1",
@@ -43,6 +45,7 @@ static struct plat_sci_port sci_platform_data[] = {
43 .mapbase = 0xffe20000, 45 .mapbase = 0xffe20000,
44 .flags = UPF_BOOT_AUTOCONF, 46 .flags = UPF_BOOT_AUTOCONF,
45 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 47 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
48 .scbrr_algo_id = SCBRR_ALGO_2,
46 .type = PORT_SCIF, 49 .type = PORT_SCIF,
47 .irqs = { 82, 82, 82, 82 }, 50 .irqs = { 82, 82, 82, 82 },
48 .clk = "scif2", 51 .clk = "scif2",
@@ -50,6 +53,7 @@ static struct plat_sci_port sci_platform_data[] = {
50 .mapbase = 0xa4e30000, 53 .mapbase = 0xa4e30000,
51 .flags = UPF_BOOT_AUTOCONF, 54 .flags = UPF_BOOT_AUTOCONF,
52 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 55 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
56 .scbrr_algo_id = SCBRR_ALGO_3,
53 .type = PORT_SCIFA, 57 .type = PORT_SCIFA,
54 .irqs = { 56, 56, 56, 56 }, 58 .irqs = { 56, 56, 56, 56 },
55 .clk = "scif3", 59 .clk = "scif3",
@@ -57,6 +61,7 @@ static struct plat_sci_port sci_platform_data[] = {
57 .mapbase = 0xa4e40000, 61 .mapbase = 0xa4e40000,
58 .flags = UPF_BOOT_AUTOCONF, 62 .flags = UPF_BOOT_AUTOCONF,
59 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 63 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
64 .scbrr_algo_id = SCBRR_ALGO_3,
60 .type = PORT_SCIFA, 65 .type = PORT_SCIFA,
61 .irqs = { 88, 88, 88, 88 }, 66 .irqs = { 88, 88, 88, 88 },
62 .clk = "scif4", 67 .clk = "scif4",
@@ -64,6 +69,7 @@ static struct plat_sci_port sci_platform_data[] = {
64 .mapbase = 0xa4e50000, 69 .mapbase = 0xa4e50000,
65 .flags = UPF_BOOT_AUTOCONF, 70 .flags = UPF_BOOT_AUTOCONF,
66 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 71 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
72 .scbrr_algo_id = SCBRR_ALGO_3,
67 .type = PORT_SCIFA, 73 .type = PORT_SCIFA,
68 .irqs = { 109, 109, 109, 109 }, 74 .irqs = { 109, 109, 109, 109 },
69 .clk = "scif5", 75 .clk = "scif5",
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
index 76339c6da01e..ab02771ee888 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
@@ -41,18 +41,21 @@ static struct plat_sci_port sci_platform_data[] = {
41 .mapbase = 0xffe00000, 41 .mapbase = 0xffe00000,
42 .flags = UPF_BOOT_AUTOCONF, 42 .flags = UPF_BOOT_AUTOCONF,
43 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 43 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
44 .scbrr_algo_id = SCBRR_ALGO_2,
44 .type = PORT_SCIF, 45 .type = PORT_SCIF,
45 .irqs = { 40, 40, 40, 40 }, 46 .irqs = { 40, 40, 40, 40 },
46 }, { 47 }, {
47 .mapbase = 0xffe08000, 48 .mapbase = 0xffe08000,
48 .flags = UPF_BOOT_AUTOCONF, 49 .flags = UPF_BOOT_AUTOCONF,
49 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 50 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
51 .scbrr_algo_id = SCBRR_ALGO_2,
50 .type = PORT_SCIF, 52 .type = PORT_SCIF,
51 .irqs = { 76, 76, 76, 76 }, 53 .irqs = { 76, 76, 76, 76 },
52 }, { 54 }, {
53 .mapbase = 0xffe10000, 55 .mapbase = 0xffe10000,
54 .flags = UPF_BOOT_AUTOCONF, 56 .flags = UPF_BOOT_AUTOCONF,
55 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 57 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
58 .scbrr_algo_id = SCBRR_ALGO_2,
56 .type = PORT_SCIF, 59 .type = PORT_SCIF,
57 .irqs = { 104, 104, 104, 104 }, 60 .irqs = { 104, 104, 104, 104 },
58 }, { 61 }, {
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
index 07a41ff20504..746f4fb9ccf0 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
@@ -19,60 +19,70 @@ static struct plat_sci_port sci_platform_data[] = {
19 .mapbase = 0xff923000, 19 .mapbase = 0xff923000,
20 .flags = UPF_BOOT_AUTOCONF, 20 .flags = UPF_BOOT_AUTOCONF,
21 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, 21 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
22 .scbrr_algo_id = SCBRR_ALGO_2,
22 .type = PORT_SCIF, 23 .type = PORT_SCIF,
23 .irqs = { 61, 61, 61, 61 }, 24 .irqs = { 61, 61, 61, 61 },
24 }, { 25 }, {
25 .mapbase = 0xff924000, 26 .mapbase = 0xff924000,
26 .flags = UPF_BOOT_AUTOCONF, 27 .flags = UPF_BOOT_AUTOCONF,
27 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, 28 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
29 .scbrr_algo_id = SCBRR_ALGO_2,
28 .type = PORT_SCIF, 30 .type = PORT_SCIF,
29 .irqs = { 62, 62, 62, 62 }, 31 .irqs = { 62, 62, 62, 62 },
30 }, { 32 }, {
31 .mapbase = 0xff925000, 33 .mapbase = 0xff925000,
32 .flags = UPF_BOOT_AUTOCONF, 34 .flags = UPF_BOOT_AUTOCONF,
33 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, 35 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
36 .scbrr_algo_id = SCBRR_ALGO_2,
34 .type = PORT_SCIF, 37 .type = PORT_SCIF,
35 .irqs = { 63, 63, 63, 63 }, 38 .irqs = { 63, 63, 63, 63 },
36 }, { 39 }, {
37 .mapbase = 0xff926000, 40 .mapbase = 0xff926000,
38 .flags = UPF_BOOT_AUTOCONF, 41 .flags = UPF_BOOT_AUTOCONF,
39 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, 42 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
43 .scbrr_algo_id = SCBRR_ALGO_2,
40 .type = PORT_SCIF, 44 .type = PORT_SCIF,
41 .irqs = { 64, 64, 64, 64 }, 45 .irqs = { 64, 64, 64, 64 },
42 }, { 46 }, {
43 .mapbase = 0xff927000, 47 .mapbase = 0xff927000,
44 .flags = UPF_BOOT_AUTOCONF, 48 .flags = UPF_BOOT_AUTOCONF,
45 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, 49 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
50 .scbrr_algo_id = SCBRR_ALGO_2,
46 .type = PORT_SCIF, 51 .type = PORT_SCIF,
47 .irqs = { 65, 65, 65, 65 }, 52 .irqs = { 65, 65, 65, 65 },
48 }, { 53 }, {
49 .mapbase = 0xff928000, 54 .mapbase = 0xff928000,
50 .flags = UPF_BOOT_AUTOCONF, 55 .flags = UPF_BOOT_AUTOCONF,
51 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, 56 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
57 .scbrr_algo_id = SCBRR_ALGO_2,
52 .type = PORT_SCIF, 58 .type = PORT_SCIF,
53 .irqs = { 66, 66, 66, 66 }, 59 .irqs = { 66, 66, 66, 66 },
54 }, { 60 }, {
55 .mapbase = 0xff929000, 61 .mapbase = 0xff929000,
56 .flags = UPF_BOOT_AUTOCONF, 62 .flags = UPF_BOOT_AUTOCONF,
57 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, 63 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
64 .scbrr_algo_id = SCBRR_ALGO_2,
58 .type = PORT_SCIF, 65 .type = PORT_SCIF,
59 .irqs = { 67, 67, 67, 67 }, 66 .irqs = { 67, 67, 67, 67 },
60 }, { 67 }, {
61 .mapbase = 0xff92a000, 68 .mapbase = 0xff92a000,
62 .flags = UPF_BOOT_AUTOCONF, 69 .flags = UPF_BOOT_AUTOCONF,
63 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, 70 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
71 .scbrr_algo_id = SCBRR_ALGO_2,
64 .type = PORT_SCIF, 72 .type = PORT_SCIF,
65 .irqs = { 68, 68, 68, 68 }, 73 .irqs = { 68, 68, 68, 68 },
66 }, { 74 }, {
67 .mapbase = 0xff92b000, 75 .mapbase = 0xff92b000,
68 .flags = UPF_BOOT_AUTOCONF, 76 .flags = UPF_BOOT_AUTOCONF,
69 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, 77 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
78 .scbrr_algo_id = SCBRR_ALGO_2,
70 .type = PORT_SCIF, 79 .type = PORT_SCIF,
71 .irqs = { 69, 69, 69, 69 }, 80 .irqs = { 69, 69, 69, 69 },
72 }, { 81 }, {
73 .mapbase = 0xff92c000, 82 .mapbase = 0xff92c000,
74 .flags = UPF_BOOT_AUTOCONF, 83 .flags = UPF_BOOT_AUTOCONF,
75 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, 84 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
85 .scbrr_algo_id = SCBRR_ALGO_2,
76 .type = PORT_SCIF, 86 .type = PORT_SCIF,
77 .irqs = { 70, 70, 70, 70 }, 87 .irqs = { 70, 70, 70, 70 },
78 }, { 88 }, {
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
index 2b355b67a33d..bcd411eb9cb0 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
@@ -221,12 +221,14 @@ static struct plat_sci_port sci_platform_data[] = {
221 .mapbase = 0xffe00000, 221 .mapbase = 0xffe00000,
222 .flags = UPF_BOOT_AUTOCONF, 222 .flags = UPF_BOOT_AUTOCONF,
223 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, 223 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
224 .scbrr_algo_id = SCBRR_ALGO_1,
224 .type = PORT_SCIF, 225 .type = PORT_SCIF,
225 .irqs = { 40, 40, 40, 40 }, 226 .irqs = { 40, 40, 40, 40 },
226 }, { 227 }, {
227 .mapbase = 0xffe10000, 228 .mapbase = 0xffe10000,
228 .flags = UPF_BOOT_AUTOCONF, 229 .flags = UPF_BOOT_AUTOCONF,
229 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, 230 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
231 .scbrr_algo_id = SCBRR_ALGO_1,
230 .type = PORT_SCIF, 232 .type = PORT_SCIF,
231 .irqs = { 76, 76, 76, 76 }, 233 .irqs = { 76, 76, 76, 76 },
232 }, { 234 }, {
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
index acd4b1d1b813..3ae2e2071009 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
@@ -203,6 +203,7 @@ static struct plat_sci_port sci_platform_data[] = {
203 .mapbase = 0xffea0000, 203 .mapbase = 0xffea0000,
204 .flags = UPF_BOOT_AUTOCONF, 204 .flags = UPF_BOOT_AUTOCONF,
205 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, 205 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
206 .scbrr_algo_id = SCBRR_ALGO_1,
206 .type = PORT_SCIF, 207 .type = PORT_SCIF,
207 .irqs = { 40, 40, 40, 40 }, 208 .irqs = { 40, 40, 40, 40 },
208 .clk = "scif_fck", 209 .clk = "scif_fck",
@@ -210,6 +211,7 @@ static struct plat_sci_port sci_platform_data[] = {
210 .mapbase = 0xffeb0000, 211 .mapbase = 0xffeb0000,
211 .flags = UPF_BOOT_AUTOCONF, 212 .flags = UPF_BOOT_AUTOCONF,
212 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, 213 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
214 .scbrr_algo_id = SCBRR_ALGO_1,
213 .type = PORT_SCIF, 215 .type = PORT_SCIF,
214 .irqs = { 44, 44, 44, 44 }, 216 .irqs = { 44, 44, 44, 44 },
215 .clk = "scif_fck", 217 .clk = "scif_fck",
@@ -217,6 +219,7 @@ static struct plat_sci_port sci_platform_data[] = {
217 .mapbase = 0xffec0000, 219 .mapbase = 0xffec0000,
218 .flags = UPF_BOOT_AUTOCONF, 220 .flags = UPF_BOOT_AUTOCONF,
219 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, 221 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
222 .scbrr_algo_id = SCBRR_ALGO_1,
220 .type = PORT_SCIF, 223 .type = PORT_SCIF,
221 .irqs = { 60, 60, 60, 60 }, 224 .irqs = { 60, 60, 60, 60 },
222 .clk = "scif_fck", 225 .clk = "scif_fck",
@@ -224,6 +227,7 @@ static struct plat_sci_port sci_platform_data[] = {
224 .mapbase = 0xffed0000, 227 .mapbase = 0xffed0000,
225 .flags = UPF_BOOT_AUTOCONF, 228 .flags = UPF_BOOT_AUTOCONF,
226 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, 229 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
230 .scbrr_algo_id = SCBRR_ALGO_1,
227 .type = PORT_SCIF, 231 .type = PORT_SCIF,
228 .irqs = { 61, 61, 61, 61 }, 232 .irqs = { 61, 61, 61, 61 },
229 .clk = "scif_fck", 233 .clk = "scif_fck",
@@ -231,6 +235,7 @@ static struct plat_sci_port sci_platform_data[] = {
231 .mapbase = 0xffee0000, 235 .mapbase = 0xffee0000,
232 .flags = UPF_BOOT_AUTOCONF, 236 .flags = UPF_BOOT_AUTOCONF,
233 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, 237 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
238 .scbrr_algo_id = SCBRR_ALGO_1,
234 .type = PORT_SCIF, 239 .type = PORT_SCIF,
235 .irqs = { 62, 62, 62, 62 }, 240 .irqs = { 62, 62, 62, 62 },
236 .clk = "scif_fck", 241 .clk = "scif_fck",
@@ -238,6 +243,7 @@ static struct plat_sci_port sci_platform_data[] = {
238 .mapbase = 0xffef0000, 243 .mapbase = 0xffef0000,
239 .flags = UPF_BOOT_AUTOCONF, 244 .flags = UPF_BOOT_AUTOCONF,
240 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, 245 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
246 .scbrr_algo_id = SCBRR_ALGO_1,
241 .type = PORT_SCIF, 247 .type = PORT_SCIF,
242 .irqs = { 63, 63, 63, 63 }, 248 .irqs = { 63, 63, 63, 63 },
243 .clk = "scif_fck", 249 .clk = "scif_fck",
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
index 347ce88de570..8b7ea4bd965d 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
@@ -28,6 +28,7 @@ static struct plat_sci_port sci_platform_data[] = {
28 .mapbase = 0xffea0000, 28 .mapbase = 0xffea0000,
29 .flags = UPF_BOOT_AUTOCONF, 29 .flags = UPF_BOOT_AUTOCONF,
30 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, 30 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
31 .scbrr_algo_id = SCBRR_ALGO_1,
31 .type = PORT_SCIF, 32 .type = PORT_SCIF,
32 .irqs = { 40, 41, 43, 42 }, 33 .irqs = { 40, 41, 43, 42 },
33 }, 34 },
@@ -38,30 +39,35 @@ static struct plat_sci_port sci_platform_data[] = {
38 .mapbase = 0xffeb0000, 39 .mapbase = 0xffeb0000,
39 .flags = UPF_BOOT_AUTOCONF, 40 .flags = UPF_BOOT_AUTOCONF,
40 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, 41 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
42 .scbrr_algo_id = SCBRR_ALGO_1,
41 .type = PORT_SCIF, 43 .type = PORT_SCIF,
42 .irqs = { 44, 44, 44, 44 }, 44 .irqs = { 44, 44, 44, 44 },
43 }, { 45 }, {
44 .mapbase = 0xffec0000, 46 .mapbase = 0xffec0000,
45 .flags = UPF_BOOT_AUTOCONF, 47 .flags = UPF_BOOT_AUTOCONF,
46 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, 48 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
49 .scbrr_algo_id = SCBRR_ALGO_1,
47 .type = PORT_SCIF, 50 .type = PORT_SCIF,
48 .irqs = { 50, 50, 50, 50 }, 51 .irqs = { 50, 50, 50, 50 },
49 }, { 52 }, {
50 .mapbase = 0xffed0000, 53 .mapbase = 0xffed0000,
51 .flags = UPF_BOOT_AUTOCONF, 54 .flags = UPF_BOOT_AUTOCONF,
52 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, 55 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
56 .scbrr_algo_id = SCBRR_ALGO_1,
53 .type = PORT_SCIF, 57 .type = PORT_SCIF,
54 .irqs = { 51, 51, 51, 51 }, 58 .irqs = { 51, 51, 51, 51 },
55 }, { 59 }, {
56 .mapbase = 0xffee0000, 60 .mapbase = 0xffee0000,
57 .flags = UPF_BOOT_AUTOCONF, 61 .flags = UPF_BOOT_AUTOCONF,
58 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, 62 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
63 .scbrr_algo_id = SCBRR_ALGO_1,
59 .type = PORT_SCIF, 64 .type = PORT_SCIF,
60 .irqs = { 52, 52, 52, 52 }, 65 .irqs = { 52, 52, 52, 52 },
61 }, { 66 }, {
62 .mapbase = 0xffef0000, 67 .mapbase = 0xffef0000,
63 .flags = UPF_BOOT_AUTOCONF, 68 .flags = UPF_BOOT_AUTOCONF,
64 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, 69 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
70 .scbrr_algo_id = SCBRR_ALGO_1,
65 .type = PORT_SCIF, 71 .type = PORT_SCIF,
66 .irqs = { 53, 53, 53, 53 }, 72 .irqs = { 53, 53, 53, 53 },
67 }, { 73 }, {
diff --git a/arch/sh/kernel/cpu/sh4a/setup-shx3.c b/arch/sh/kernel/cpu/sh4a/setup-shx3.c
index eef94934f542..4a26cc304139 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-shx3.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-shx3.c
@@ -20,24 +20,28 @@ static struct plat_sci_port sci_platform_data[] = {
20 .mapbase = 0xffc30000, 20 .mapbase = 0xffc30000,
21 .flags = UPF_BOOT_AUTOCONF, 21 .flags = UPF_BOOT_AUTOCONF,
22 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 22 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
23 .scbrr_algo_id = SCBRR_ALGO_2,
23 .type = PORT_SCIF, 24 .type = PORT_SCIF,
24 .irqs = { 40, 41, 43, 42 }, 25 .irqs = { 40, 41, 43, 42 },
25 }, { 26 }, {
26 .mapbase = 0xffc40000, 27 .mapbase = 0xffc40000,
27 .flags = UPF_BOOT_AUTOCONF, 28 .flags = UPF_BOOT_AUTOCONF,
28 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 29 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
30 .scbrr_algo_id = SCBRR_ALGO_2,
29 .type = PORT_SCIF, 31 .type = PORT_SCIF,
30 .irqs = { 44, 45, 47, 46 }, 32 .irqs = { 44, 45, 47, 46 },
31 }, { 33 }, {
32 .mapbase = 0xffc50000, 34 .mapbase = 0xffc50000,
33 .flags = UPF_BOOT_AUTOCONF, 35 .flags = UPF_BOOT_AUTOCONF,
34 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 36 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
37 .scbrr_algo_id = SCBRR_ALGO_2,
35 .type = PORT_SCIF, 38 .type = PORT_SCIF,
36 .irqs = { 48, 49, 51, 50 }, 39 .irqs = { 48, 49, 51, 50 },
37 }, { 40 }, {
38 .mapbase = 0xffc60000, 41 .mapbase = 0xffc60000,
39 .flags = UPF_BOOT_AUTOCONF, 42 .flags = UPF_BOOT_AUTOCONF,
40 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 43 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
44 .scbrr_algo_id = SCBRR_ALGO_2,
41 .type = PORT_SCIF, 45 .type = PORT_SCIF,
42 .irqs = { 52, 53, 55, 54 }, 46 .irqs = { 52, 53, 55, 54 },
43 }, { 47 }, {
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-02 18:53:20 -0500