diff options
Diffstat (limited to 'arch/sh/drivers/pci/pci-sh7780.h')
-rw-r--r-- | arch/sh/drivers/pci/pci-sh7780.h | 19 |
1 files changed, 18 insertions, 1 deletions
diff --git a/arch/sh/drivers/pci/pci-sh7780.h b/arch/sh/drivers/pci/pci-sh7780.h index f02d2180a4bc..00d12d0f8c1f 100644 --- a/arch/sh/drivers/pci/pci-sh7780.h +++ b/arch/sh/drivers/pci/pci-sh7780.h | |||
@@ -14,8 +14,9 @@ | |||
14 | 14 | ||
15 | /* Platform Specific Values */ | 15 | /* Platform Specific Values */ |
16 | #define SH7780_VENDOR_ID 0x1912 | 16 | #define SH7780_VENDOR_ID 0x1912 |
17 | #define SH7780_DEVICE_ID 0x0002 | ||
18 | #define SH7781_DEVICE_ID 0x0001 | 17 | #define SH7781_DEVICE_ID 0x0001 |
18 | #define SH7780_DEVICE_ID 0x0002 | ||
19 | #define SH7785_DEVICE_ID 0x0007 | ||
19 | 20 | ||
20 | /* SH7780 Control Registers */ | 21 | /* SH7780 Control Registers */ |
21 | #define SH7780_PCI_VCR0 0xFE000000 | 22 | #define SH7780_PCI_VCR0 0xFE000000 |
@@ -65,6 +66,22 @@ | |||
65 | #define SH7780_PCIPMCSR_BSE 0x046 | 66 | #define SH7780_PCIPMCSR_BSE 0x046 |
66 | #define SH7780_PCICDD 0x047 | 67 | #define SH7780_PCICDD 0x047 |
67 | 68 | ||
69 | #define SH7780_PCICR 0x100 /* PCI Control Register */ | ||
70 | #define SH7780_PCILSR 0x104 /* PCI Local Space Register0 */ | ||
71 | #define SH7780_PCILSR1 0x108 /* PCI Local Space Register1 */ | ||
72 | #define SH7780_PCILAR0 0x10C /* PCI Local Address Register1 */ | ||
73 | #define SH7780_PCILAR1 0x110 /* PCI Local Address Register1 */ | ||
74 | #define SH7780_PCIIR 0x114 /* PCI Interrupt Register */ | ||
75 | #define SH7780_PCIIMR 0x118 /* PCI Interrupt Mask Register */ | ||
76 | #define SH7780_PCIAIR 0x11C /* Error Address Register */ | ||
77 | #define SH7780_PCICIR 0x120 /* Error Command/Data Register */ | ||
78 | #define SH7780_PCIAINT 0x130 /* Arbiter Interrupt Register */ | ||
79 | #define SH7780_PCIAINTM 0x134 /* Arbiter Int. Mask Register */ | ||
80 | #define SH7780_PCIBMIR 0x138 /* Error Bus Master Register */ | ||
81 | #define SH7780_PCIPAR 0x1C0 /* PIO Address Register */ | ||
82 | #define SH7780_PCIPINT 0x1CC /* Power Mgmnt Int. Register */ | ||
83 | #define SH7780_PCIPINTM 0x1D0 /* Power Mgmnt Mask Register */ | ||
84 | |||
68 | #define SH7780_PCIMBR0 0x1E0 | 85 | #define SH7780_PCIMBR0 0x1E0 |
69 | #define SH7780_PCIMBMR0 0x1E4 | 86 | #define SH7780_PCIMBMR0 0x1E4 |
70 | #define SH7780_PCIMBR2 0x1F0 | 87 | #define SH7780_PCIMBR2 0x1F0 |