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-rw-r--r--arch/sh/boot/compressed/head_64.S5
1 files changed, 1 insertions, 4 deletions
diff --git a/arch/sh/boot/compressed/head_64.S b/arch/sh/boot/compressed/head_64.S
index 622eac3cf556..9993113c6713 100644
--- a/arch/sh/boot/compressed/head_64.S
+++ b/arch/sh/boot/compressed/head_64.S
@@ -14,6 +14,7 @@
14 * Copyright (C) 2002 Stuart Menefy (stuart.menefy@st.com) 14 * Copyright (C) 2002 Stuart Menefy (stuart.menefy@st.com)
15 */ 15 */
16#include <asm/cache.h> 16#include <asm/cache.h>
17#include <asm/tlb.h>
17#include <cpu/mmu_context.h> 18#include <cpu/mmu_context.h>
18#include <cpu/registers.h> 19#include <cpu/registers.h>
19 20
@@ -33,11 +34,7 @@
33#define ICCR0_INIT_VAL ICCR0_ON | ICCR0_ICI /* ICE + ICI */ 34#define ICCR0_INIT_VAL ICCR0_ON | ICCR0_ICI /* ICE + ICI */
34#define ICCR1_INIT_VAL ICCR1_NOLOCK /* No locking */ 35#define ICCR1_INIT_VAL ICCR1_NOLOCK /* No locking */
35 36
36#if 1
37#define OCCR0_INIT_VAL OCCR0_ON | OCCR0_OCI | OCCR0_WB /* OCE + OCI + WB */ 37#define OCCR0_INIT_VAL OCCR0_ON | OCCR0_OCI | OCCR0_WB /* OCE + OCI + WB */
38#else
39#define OCCR0_INIT_VAL OCCR0_OFF
40#endif
41#define OCCR1_INIT_VAL OCCR1_NOLOCK /* No locking */ 38#define OCCR1_INIT_VAL OCCR1_NOLOCK /* No locking */
42 39
43 .text 40 .text