diff options
Diffstat (limited to 'arch/ppc/platforms/4xx/bubinga.h')
-rw-r--r-- | arch/ppc/platforms/4xx/bubinga.h | 64 |
1 files changed, 26 insertions, 38 deletions
diff --git a/arch/ppc/platforms/4xx/bubinga.h b/arch/ppc/platforms/4xx/bubinga.h index b1df856f8e22..b5380cfaf5c0 100644 --- a/arch/ppc/platforms/4xx/bubinga.h +++ b/arch/ppc/platforms/4xx/bubinga.h | |||
@@ -1,52 +1,34 @@ | |||
1 | /* | 1 | /* |
2 | * Support for IBM PPC 405EP evaluation board (Bubinga). | 2 | * arch/ppc/platforms/4xx/bubinga.h |
3 | * | 3 | * |
4 | * Author: SAW (IBM), derived from walnut.h. | 4 | * Bubinga board definitions |
5 | * Maintained by MontaVista Software <source@mvista.com> | 5 | * |
6 | * Copyright (c) 2005 DENX Software Engineering | ||
7 | * Stefan Roese <sr@denx.de> | ||
8 | * | ||
9 | * Based on original work by | ||
10 | * SAW (IBM) | ||
11 | * 2003 (c) MontaVista Softare Inc. | ||
12 | * | ||
13 | * This program is free software; you can redistribute it and/or modify it | ||
14 | * under the terms of the GNU General Public License as published by the | ||
15 | * Free Software Foundation; either version 2 of the License, or (at your | ||
16 | * option) any later version. | ||
6 | * | 17 | * |
7 | * 2003 (c) MontaVista Softare Inc. This file is licensed under the | ||
8 | * terms of the GNU General Public License version 2. This program is | ||
9 | * licensed "as is" without any warranty of any kind, whether express | ||
10 | * or implied. | ||
11 | */ | 18 | */ |
12 | 19 | ||
13 | #ifdef __KERNEL__ | 20 | #ifdef __KERNEL__ |
14 | #ifndef __BUBINGA_H__ | 21 | #ifndef __BUBINGA_H__ |
15 | #define __BUBINGA_H__ | 22 | #define __BUBINGA_H__ |
16 | 23 | ||
17 | /* 405EP */ | 24 | #include <linux/config.h> |
18 | #include <platforms/4xx/ibm405ep.h> | 25 | #include <platforms/4xx/ibm405ep.h> |
19 | 26 | #include <asm/ppcboot.h> | |
20 | #ifndef __ASSEMBLY__ | ||
21 | /* | ||
22 | * Data structure defining board information maintained by the boot | ||
23 | * ROM on IBM's evaluation board. An effort has been made to | ||
24 | * keep the field names consistent with the 8xx 'bd_t' board info | ||
25 | * structures. | ||
26 | */ | ||
27 | |||
28 | typedef struct board_info { | ||
29 | unsigned char bi_s_version[4]; /* Version of this structure */ | ||
30 | unsigned char bi_r_version[30]; /* Version of the IBM ROM */ | ||
31 | unsigned int bi_memsize; /* DRAM installed, in bytes */ | ||
32 | unsigned char bi_enetaddr[2][6]; /* Local Ethernet MAC address */ unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */ | ||
33 | unsigned int bi_intfreq; /* Processor speed, in Hz */ | ||
34 | unsigned int bi_busfreq; /* PLB Bus speed, in Hz */ | ||
35 | unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */ | ||
36 | unsigned int bi_opb_busfreq; /* OPB Bus speed, in Hz */ | ||
37 | unsigned int bi_pllouta_freq; /* PLL OUTA speed, in Hz */ | ||
38 | } bd_t; | ||
39 | |||
40 | /* Some 4xx parts use a different timebase frequency from the internal clock. | ||
41 | */ | ||
42 | #define bi_tbfreq bi_intfreq | ||
43 | |||
44 | 27 | ||
45 | /* Memory map for the Bubinga board. | 28 | /* Memory map for the Bubinga board. |
46 | * Generic 4xx plus RTC. | 29 | * Generic 4xx plus RTC. |
47 | */ | 30 | */ |
48 | 31 | ||
49 | extern void *bubinga_rtc_base; | ||
50 | #define BUBINGA_RTC_PADDR ((uint)0xf0000000) | 32 | #define BUBINGA_RTC_PADDR ((uint)0xf0000000) |
51 | #define BUBINGA_RTC_VADDR BUBINGA_RTC_PADDR | 33 | #define BUBINGA_RTC_VADDR BUBINGA_RTC_PADDR |
52 | #define BUBINGA_RTC_SIZE ((uint)8*1024) | 34 | #define BUBINGA_RTC_SIZE ((uint)8*1024) |
@@ -58,12 +40,18 @@ extern void *bubinga_rtc_base; | |||
58 | * for typical configurations at various CPU speeds. | 40 | * for typical configurations at various CPU speeds. |
59 | * The base baud is calculated as (FWDA / EXT UART DIV / 16) | 41 | * The base baud is calculated as (FWDA / EXT UART DIV / 16) |
60 | */ | 42 | */ |
61 | #define BASE_BAUD 0 | 43 | #define BASE_BAUD 0 |
62 | 44 | ||
63 | #define BUBINGA_FPGA_BASE 0xF0300000 | 45 | /* Flash */ |
46 | #define PPC40x_FPGA_BASE 0xF0300000 | ||
47 | #define PPC40x_FPGA_REG_OFFS 1 /* offset to flash map reg */ | ||
48 | #define PPC40x_FLASH_ONBD_N(x) (x & 0x02) | ||
49 | #define PPC40x_FLASH_SRAM_SEL(x) (x & 0x01) | ||
50 | #define PPC40x_FLASH_LOW 0xFFF00000 | ||
51 | #define PPC40x_FLASH_HIGH 0xFFF80000 | ||
52 | #define PPC40x_FLASH_SIZE 0x80000 | ||
64 | 53 | ||
65 | #define PPC4xx_MACHINE_NAME "IBM Bubinga" | 54 | #define PPC4xx_MACHINE_NAME "IBM Bubinga" |
66 | 55 | ||
67 | #endif /* !__ASSEMBLY__ */ | ||
68 | #endif /* __BUBINGA_H__ */ | 56 | #endif /* __BUBINGA_H__ */ |
69 | #endif /* __KERNEL__ */ | 57 | #endif /* __KERNEL__ */ |