diff options
Diffstat (limited to 'arch/powerpc/sysdev/ppc4xx_pci.c')
-rw-r--r-- | arch/powerpc/sysdev/ppc4xx_pci.c | 57 |
1 files changed, 56 insertions, 1 deletions
diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c index 472d2b840f10..4f05f7542346 100644 --- a/arch/powerpc/sysdev/ppc4xx_pci.c +++ b/arch/powerpc/sysdev/ppc4xx_pci.c | |||
@@ -1296,6 +1296,52 @@ static struct ppc4xx_pciex_hwops ppc405ex_pcie_hwops __initdata = | |||
1296 | 1296 | ||
1297 | #endif /* CONFIG_40x */ | 1297 | #endif /* CONFIG_40x */ |
1298 | 1298 | ||
1299 | #ifdef CONFIG_476FPE | ||
1300 | static int __init ppc_476fpe_pciex_core_init(struct device_node *np) | ||
1301 | { | ||
1302 | return 4; | ||
1303 | } | ||
1304 | |||
1305 | static void __init ppc_476fpe_pciex_check_link(struct ppc4xx_pciex_port *port) | ||
1306 | { | ||
1307 | u32 timeout_ms = 20; | ||
1308 | u32 val = 0, mask = (PECFG_TLDLP_LNKUP|PECFG_TLDLP_PRESENT); | ||
1309 | void __iomem *mbase = ioremap(port->cfg_space.start + 0x10000000, | ||
1310 | 0x1000); | ||
1311 | |||
1312 | printk(KERN_INFO "PCIE%d: Checking link...\n", port->index); | ||
1313 | |||
1314 | if (mbase == NULL) { | ||
1315 | printk(KERN_WARNING "PCIE%d: failed to get cfg space\n", | ||
1316 | port->index); | ||
1317 | return; | ||
1318 | } | ||
1319 | |||
1320 | while (timeout_ms--) { | ||
1321 | val = in_le32(mbase + PECFG_TLDLP); | ||
1322 | |||
1323 | if ((val & mask) == mask) | ||
1324 | break; | ||
1325 | msleep(10); | ||
1326 | } | ||
1327 | |||
1328 | if (val & PECFG_TLDLP_PRESENT) { | ||
1329 | printk(KERN_INFO "PCIE%d: link is up !\n", port->index); | ||
1330 | port->link = 1; | ||
1331 | } else | ||
1332 | printk(KERN_WARNING "PCIE%d: Link up failed\n", port->index); | ||
1333 | |||
1334 | iounmap(mbase); | ||
1335 | return; | ||
1336 | } | ||
1337 | |||
1338 | static struct ppc4xx_pciex_hwops ppc_476fpe_pcie_hwops __initdata = | ||
1339 | { | ||
1340 | .core_init = ppc_476fpe_pciex_core_init, | ||
1341 | .check_link = ppc_476fpe_pciex_check_link, | ||
1342 | }; | ||
1343 | #endif /* CONFIG_476FPE */ | ||
1344 | |||
1299 | /* Check that the core has been initied and if not, do it */ | 1345 | /* Check that the core has been initied and if not, do it */ |
1300 | static int __init ppc4xx_pciex_check_core_init(struct device_node *np) | 1346 | static int __init ppc4xx_pciex_check_core_init(struct device_node *np) |
1301 | { | 1347 | { |
@@ -1321,6 +1367,10 @@ static int __init ppc4xx_pciex_check_core_init(struct device_node *np) | |||
1321 | if (of_device_is_compatible(np, "ibm,plb-pciex-405ex")) | 1367 | if (of_device_is_compatible(np, "ibm,plb-pciex-405ex")) |
1322 | ppc4xx_pciex_hwops = &ppc405ex_pcie_hwops; | 1368 | ppc4xx_pciex_hwops = &ppc405ex_pcie_hwops; |
1323 | #endif | 1369 | #endif |
1370 | #ifdef CONFIG_476FPE | ||
1371 | if (of_device_is_compatible(np, "ibm,plb-pciex-476fpe")) | ||
1372 | ppc4xx_pciex_hwops = &ppc_476fpe_pcie_hwops; | ||
1373 | #endif | ||
1324 | if (ppc4xx_pciex_hwops == NULL) { | 1374 | if (ppc4xx_pciex_hwops == NULL) { |
1325 | printk(KERN_WARNING "PCIE: unknown host type %s\n", | 1375 | printk(KERN_WARNING "PCIE: unknown host type %s\n", |
1326 | np->full_name); | 1376 | np->full_name); |
@@ -1629,6 +1679,10 @@ static int __init ppc4xx_setup_one_pciex_POM(struct ppc4xx_pciex_port *port, | |||
1629 | dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKL, | 1679 | dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKL, |
1630 | sa | DCRO_PEGPL_460SX_OMR1MSKL_UOT | 1680 | sa | DCRO_PEGPL_460SX_OMR1MSKL_UOT |
1631 | | DCRO_PEGPL_OMRxMSKL_VAL); | 1681 | | DCRO_PEGPL_OMRxMSKL_VAL); |
1682 | else if (of_device_is_compatible(port->node, "ibm,plb-pciex-476fpe")) | ||
1683 | dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKL, | ||
1684 | sa | DCRO_PEGPL_476FPE_OMR1MSKL_UOT | ||
1685 | | DCRO_PEGPL_OMRxMSKL_VAL); | ||
1632 | else | 1686 | else |
1633 | dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKL, | 1687 | dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKL, |
1634 | sa | DCRO_PEGPL_OMR1MSKL_UOT | 1688 | sa | DCRO_PEGPL_OMR1MSKL_UOT |
@@ -1753,7 +1807,8 @@ static void __init ppc4xx_configure_pciex_PIMs(struct ppc4xx_pciex_port *port, | |||
1753 | if (res->flags & IORESOURCE_PREFETCH) | 1807 | if (res->flags & IORESOURCE_PREFETCH) |
1754 | sa |= PCI_BASE_ADDRESS_MEM_PREFETCH; | 1808 | sa |= PCI_BASE_ADDRESS_MEM_PREFETCH; |
1755 | 1809 | ||
1756 | if (of_device_is_compatible(port->node, "ibm,plb-pciex-460sx")) | 1810 | if (of_device_is_compatible(port->node, "ibm,plb-pciex-460sx") || |
1811 | of_device_is_compatible(port->node, "ibm,plb-pciex-476fpe")) | ||
1757 | sa |= PCI_BASE_ADDRESS_MEM_TYPE_64; | 1812 | sa |= PCI_BASE_ADDRESS_MEM_TYPE_64; |
1758 | 1813 | ||
1759 | out_le32(mbase + PECFG_BAR0HMPA, RES_TO_U32_HIGH(sa)); | 1814 | out_le32(mbase + PECFG_BAR0HMPA, RES_TO_U32_HIGH(sa)); |