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-rw-r--r--arch/powerpc/platforms/cell/qpace_setup.c14
1 files changed, 13 insertions, 1 deletions
diff --git a/arch/powerpc/platforms/cell/qpace_setup.c b/arch/powerpc/platforms/cell/qpace_setup.c
index c5ce02e84c8e..1b5749042756 100644
--- a/arch/powerpc/platforms/cell/qpace_setup.c
+++ b/arch/powerpc/platforms/cell/qpace_setup.c
@@ -61,12 +61,24 @@ static void qpace_progress(char *s, unsigned short hex)
61 printk("*** %04x : %s\n", hex, s ? s : ""); 61 printk("*** %04x : %s\n", hex, s ? s : "");
62} 62}
63 63
64static const struct of_device_id qpace_bus_ids[] __initdata = {
65 { .type = "soc", },
66 { .compatible = "soc", },
67 { .type = "spider", },
68 { .type = "axon", },
69 { .type = "plb5", },
70 { .type = "plb4", },
71 { .type = "opb", },
72 { .type = "ebc", },
73 {},
74};
75
64static int __init qpace_publish_devices(void) 76static int __init qpace_publish_devices(void)
65{ 77{
66 int node; 78 int node;
67 79
68 /* Publish OF platform devices for southbridge IOs */ 80 /* Publish OF platform devices for southbridge IOs */
69 of_platform_bus_probe(NULL, NULL, NULL); 81 of_platform_bus_probe(NULL, qpace_bus_ids, NULL);
70 82
71 /* There is no device for the MIC memory controller, thus we create 83 /* There is no device for the MIC memory controller, thus we create
72 * a platform device for it to attach the EDAC driver to. 84 * a platform device for it to attach the EDAC driver to.