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-rw-r--r--arch/powerpc/platforms/86xx/Kconfig6
-rw-r--r--arch/powerpc/platforms/86xx/Makefile3
-rw-r--r--arch/powerpc/platforms/86xx/mpc8641_hpcn.h1
-rw-r--r--arch/powerpc/platforms/86xx/mpc86xx.h8
-rw-r--r--arch/powerpc/platforms/86xx/mpc86xx_hpcn.c129
-rw-r--r--arch/powerpc/platforms/86xx/mpc86xx_smp.c10
-rw-r--r--arch/powerpc/platforms/86xx/pci.c137
7 files changed, 139 insertions, 155 deletions
diff --git a/arch/powerpc/platforms/86xx/Kconfig b/arch/powerpc/platforms/86xx/Kconfig
index 3a87863d2876..d1ecc0f9ab58 100644
--- a/arch/powerpc/platforms/86xx/Kconfig
+++ b/arch/powerpc/platforms/86xx/Kconfig
@@ -7,6 +7,7 @@ choice
7 7
8config MPC8641_HPCN 8config MPC8641_HPCN
9 bool "Freescale MPC8641 HPCN" 9 bool "Freescale MPC8641 HPCN"
10 select PPC_I8259
10 help 11 help
11 This option enables support for the MPC8641 HPCN board. 12 This option enables support for the MPC8641 HPCN board.
12 13
@@ -28,9 +29,4 @@ config PPC_INDIRECT_PCI_BE
28 depends on PPC_86xx 29 depends on PPC_86xx
29 default y 30 default y
30 31
31config PPC_STD_MMU
32 bool
33 depends on PPC_86xx
34 default y
35
36endmenu 32endmenu
diff --git a/arch/powerpc/platforms/86xx/Makefile b/arch/powerpc/platforms/86xx/Makefile
index 7be796c5d5c9..476a6eeee710 100644
--- a/arch/powerpc/platforms/86xx/Makefile
+++ b/arch/powerpc/platforms/86xx/Makefile
@@ -2,9 +2,6 @@
2# Makefile for the PowerPC 86xx linux kernel. 2# Makefile for the PowerPC 86xx linux kernel.
3# 3#
4 4
5
6ifeq ($(CONFIG_PPC_86xx),y)
7obj-$(CONFIG_SMP) += mpc86xx_smp.o 5obj-$(CONFIG_SMP) += mpc86xx_smp.o
8endif
9obj-$(CONFIG_MPC8641_HPCN) += mpc86xx_hpcn.o 6obj-$(CONFIG_MPC8641_HPCN) += mpc86xx_hpcn.o
10obj-$(CONFIG_PCI) += pci.o mpc86xx_pcie.o 7obj-$(CONFIG_PCI) += pci.o mpc86xx_pcie.o
diff --git a/arch/powerpc/platforms/86xx/mpc8641_hpcn.h b/arch/powerpc/platforms/86xx/mpc8641_hpcn.h
index 5042253758b7..5d2bcf78cef7 100644
--- a/arch/powerpc/platforms/86xx/mpc8641_hpcn.h
+++ b/arch/powerpc/platforms/86xx/mpc8641_hpcn.h
@@ -14,7 +14,6 @@
14#ifndef __MPC8641_HPCN_H__ 14#ifndef __MPC8641_HPCN_H__
15#define __MPC8641_HPCN_H__ 15#define __MPC8641_HPCN_H__
16 16
17#include <linux/config.h>
18#include <linux/init.h> 17#include <linux/init.h>
19 18
20/* PCI interrupt controller */ 19/* PCI interrupt controller */
diff --git a/arch/powerpc/platforms/86xx/mpc86xx.h b/arch/powerpc/platforms/86xx/mpc86xx.h
index e3c9e4f417d3..2834462590b8 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx.h
+++ b/arch/powerpc/platforms/86xx/mpc86xx.h
@@ -15,11 +15,13 @@
15 * mpc86xx_* files. Mostly for use by mpc86xx_setup(). 15 * mpc86xx_* files. Mostly for use by mpc86xx_setup().
16 */ 16 */
17 17
18extern int __init add_bridge(struct device_node *dev); 18extern int add_bridge(struct device_node *dev);
19 19
20extern void __init setup_indirect_pcie(struct pci_controller *hose, 20extern int mpc86xx_exclude_device(u_char bus, u_char devfn);
21
22extern void setup_indirect_pcie(struct pci_controller *hose,
21 u32 cfg_addr, u32 cfg_data); 23 u32 cfg_addr, u32 cfg_data);
22extern void __init setup_indirect_pcie_nomap(struct pci_controller *hose, 24extern void setup_indirect_pcie_nomap(struct pci_controller *hose,
23 void __iomem *cfg_addr, 25 void __iomem *cfg_addr,
24 void __iomem *cfg_data); 26 void __iomem *cfg_data);
25 27
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
index 483c21df181e..ebae73eb0063 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
@@ -12,7 +12,6 @@
12 * option) any later version. 12 * option) any later version.
13 */ 13 */
14 14
15#include <linux/config.h>
16#include <linux/stddef.h> 15#include <linux/stddef.h>
17#include <linux/kernel.h> 16#include <linux/kernel.h>
18#include <linux/pci.h> 17#include <linux/pci.h>
@@ -36,6 +35,7 @@
36#include <sysdev/fsl_soc.h> 35#include <sysdev/fsl_soc.h>
37 36
38#include "mpc86xx.h" 37#include "mpc86xx.h"
38#include "mpc8641_hpcn.h"
39 39
40#ifndef CONFIG_PCI 40#ifndef CONFIG_PCI
41unsigned long isa_io_base = 0; 41unsigned long isa_io_base = 0;
@@ -186,17 +186,130 @@ mpc86xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
186 return PCI_IRQ_TABLE_LOOKUP + I8259_OFFSET; 186 return PCI_IRQ_TABLE_LOOKUP + I8259_OFFSET;
187} 187}
188 188
189static void __devinit quirk_ali1575(struct pci_dev *dev)
190{
191 unsigned short temp;
192
193 /*
194 * ALI1575 interrupts route table setup:
195 *
196 * IRQ pin IRQ#
197 * PIRQA ---- 3
198 * PIRQB ---- 4
199 * PIRQC ---- 5
200 * PIRQD ---- 6
201 * PIRQE ---- 9
202 * PIRQF ---- 10
203 * PIRQG ---- 11
204 * PIRQH ---- 12
205 *
206 * interrupts for PCI slot0 -- PIRQA / PIRQB / PIRQC / PIRQD
207 * PCI slot1 -- PIRQB / PIRQC / PIRQD / PIRQA
208 */
209 pci_write_config_dword(dev, 0x48, 0xb9317542);
210
211 /* USB 1.1 OHCI controller 1, interrupt: PIRQE */
212 pci_write_config_byte(dev, 0x86, 0x0c);
213
214 /* USB 1.1 OHCI controller 2, interrupt: PIRQF */
215 pci_write_config_byte(dev, 0x87, 0x0d);
216
217 /* USB 1.1 OHCI controller 3, interrupt: PIRQH */
218 pci_write_config_byte(dev, 0x88, 0x0f);
219
220 /* USB 2.0 controller, interrupt: PIRQ7 */
221 pci_write_config_byte(dev, 0x74, 0x06);
222
223 /* Audio controller, interrupt: PIRQE */
224 pci_write_config_byte(dev, 0x8a, 0x0c);
225
226 /* Modem controller, interrupt: PIRQF */
227 pci_write_config_byte(dev, 0x8b, 0x0d);
228
229 /* HD audio controller, interrupt: PIRQG */
230 pci_write_config_byte(dev, 0x8c, 0x0e);
231
232 /* Serial ATA interrupt: PIRQD */
233 pci_write_config_byte(dev, 0x8d, 0x0b);
234
235 /* SMB interrupt: PIRQH */
236 pci_write_config_byte(dev, 0x8e, 0x0f);
237
238 /* PMU ACPI SCI interrupt: PIRQH */
239 pci_write_config_byte(dev, 0x8f, 0x0f);
240
241 /* Primary PATA IDE IRQ: 14
242 * Secondary PATA IDE IRQ: 15
243 */
244 pci_write_config_byte(dev, 0x44, 0x3d);
245 pci_write_config_byte(dev, 0x75, 0x0f);
246
247 /* Set IRQ14 and IRQ15 to legacy IRQs */
248 pci_read_config_word(dev, 0x46, &temp);
249 temp |= 0xc000;
250 pci_write_config_word(dev, 0x46, temp);
251
252 /* Set i8259 interrupt trigger
253 * IRQ 3: Level
254 * IRQ 4: Level
255 * IRQ 5: Level
256 * IRQ 6: Level
257 * IRQ 7: Level
258 * IRQ 9: Level
259 * IRQ 10: Level
260 * IRQ 11: Level
261 * IRQ 12: Level
262 * IRQ 14: Edge
263 * IRQ 15: Edge
264 */
265 outb(0xfa, 0x4d0);
266 outb(0x1e, 0x4d1);
267}
189 268
190int 269static void __devinit quirk_uli5288(struct pci_dev *dev)
191mpc86xx_exclude_device(u_char bus, u_char devfn)
192{ 270{
193#if !defined(CONFIG_PCI) 271 unsigned char c;
194 if (bus == 0 && PCI_SLOT(devfn) == 0) 272
195 return PCIBIOS_DEVICE_NOT_FOUND; 273 pci_read_config_byte(dev,0x83,&c);
196#endif 274 c |= 0x80;
275 pci_write_config_byte(dev, 0x83, c);
276
277 pci_write_config_byte(dev, 0x09, 0x01);
278 pci_write_config_byte(dev, 0x0a, 0x06);
279
280 pci_read_config_byte(dev,0x83,&c);
281 c &= 0x7f;
282 pci_write_config_byte(dev, 0x83, c);
197 283
198 return PCIBIOS_SUCCESSFUL; 284 pci_read_config_byte(dev,0x84,&c);
285 c |= 0x01;
286 pci_write_config_byte(dev, 0x84, c);
199} 287}
288
289static void __devinit quirk_uli5229(struct pci_dev *dev)
290{
291 unsigned short temp;
292 pci_write_config_word(dev, 0x04, 0x0405);
293 pci_read_config_word(dev, 0x4a, &temp);
294 temp |= 0x1000;
295 pci_write_config_word(dev, 0x4a, temp);
296}
297
298static void __devinit early_uli5249(struct pci_dev *dev)
299{
300 unsigned char temp;
301 pci_write_config_word(dev, 0x04, 0x0007);
302 pci_read_config_byte(dev, 0x7c, &temp);
303 pci_write_config_byte(dev, 0x7c, 0x80);
304 pci_write_config_byte(dev, 0x09, 0x01);
305 pci_write_config_byte(dev, 0x7c, temp);
306 dev->class |= 0x1;
307}
308
309DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x1575, quirk_ali1575);
310DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5288, quirk_uli5288);
311DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5229, quirk_uli5229);
312DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AL, 0x5249, early_uli5249);
200#endif /* CONFIG_PCI */ 313#endif /* CONFIG_PCI */
201 314
202 315
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_smp.c b/arch/powerpc/platforms/86xx/mpc86xx_smp.c
index 944ec4b71416..bb7fb41933ad 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx_smp.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_smp.c
@@ -10,7 +10,6 @@
10 * option) any later version. 10 * option) any later version.
11 */ 11 */
12 12
13#include <linux/config.h>
14#include <linux/stddef.h> 13#include <linux/stddef.h>
15#include <linux/kernel.h> 14#include <linux/kernel.h>
16#include <linux/init.h> 15#include <linux/init.h>
@@ -34,8 +33,8 @@ extern unsigned long __secondary_hold_acknowledge;
34static void __init 33static void __init
35smp_86xx_release_core(int nr) 34smp_86xx_release_core(int nr)
36{ 35{
37 void *mcm_vaddr; 36 __be32 __iomem *mcm_vaddr;
38 unsigned long vaddr, pcr; 37 unsigned long pcr;
39 38
40 if (nr < 0 || nr >= NR_CPUS) 39 if (nr < 0 || nr >= NR_CPUS)
41 return; 40 return;
@@ -45,10 +44,9 @@ smp_86xx_release_core(int nr)
45 */ 44 */
46 mcm_vaddr = ioremap(get_immrbase() + MPC86xx_MCM_OFFSET, 45 mcm_vaddr = ioremap(get_immrbase() + MPC86xx_MCM_OFFSET,
47 MPC86xx_MCM_SIZE); 46 MPC86xx_MCM_SIZE);
48 vaddr = (unsigned long)mcm_vaddr + MCM_PORT_CONFIG_OFFSET; 47 pcr = in_be32(mcm_vaddr + (MCM_PORT_CONFIG_OFFSET >> 2));
49 pcr = in_be32((volatile unsigned *)vaddr);
50 pcr |= 1 << (nr + 24); 48 pcr |= 1 << (nr + 24);
51 out_be32((volatile unsigned *)vaddr, pcr); 49 out_be32(mcm_vaddr + (MCM_PORT_CONFIG_OFFSET >> 2), pcr);
52} 50}
53 51
54 52
diff --git a/arch/powerpc/platforms/86xx/pci.c b/arch/powerpc/platforms/86xx/pci.c
index 5180df7c75bc..bc5139043112 100644
--- a/arch/powerpc/platforms/86xx/pci.c
+++ b/arch/powerpc/platforms/86xx/pci.c
@@ -12,7 +12,6 @@
12 * option) any later version. 12 * option) any later version.
13 */ 13 */
14 14
15#include <linux/config.h>
16#include <linux/types.h> 15#include <linux/types.h>
17#include <linux/module.h> 16#include <linux/module.h>
18#include <linux/init.h> 17#include <linux/init.h>
@@ -122,15 +121,12 @@ static void __init setup_pcie_atmu(struct pci_controller *hose, struct resource
122static void __init 121static void __init
123mpc86xx_setup_pcie(struct pci_controller *hose, u32 pcie_offset, u32 pcie_size) 122mpc86xx_setup_pcie(struct pci_controller *hose, u32 pcie_offset, u32 pcie_size)
124{ 123{
125 volatile struct ccsr_pex *pcie;
126 u16 cmd; 124 u16 cmd;
127 unsigned int temps; 125 unsigned int temps;
128 126
129 DBG("PCIE host controller register offset 0x%08x, size 0x%08x.\n", 127 DBG("PCIE host controller register offset 0x%08x, size 0x%08x.\n",
130 pcie_offset, pcie_size); 128 pcie_offset, pcie_size);
131 129
132 pcie = ioremap(pcie_offset, pcie_size);
133
134 early_read_config_word(hose, 0, 0, PCI_COMMAND, &cmd); 130 early_read_config_word(hose, 0, 0, PCI_COMMAND, &cmd);
135 cmd |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY 131 cmd |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY
136 | PCI_COMMAND_IO; 132 | PCI_COMMAND_IO;
@@ -144,6 +140,14 @@ mpc86xx_setup_pcie(struct pci_controller *hose, u32 pcie_offset, u32 pcie_size)
144 early_write_config_dword(hose, 0, 0, PCI_PRIMARY_BUS, temps); 140 early_write_config_dword(hose, 0, 0, PCI_PRIMARY_BUS, temps);
145} 141}
146 142
143int mpc86xx_exclude_device(u_char bus, u_char devfn)
144{
145 if (bus == 0 && PCI_SLOT(devfn) == 0)
146 return PCIBIOS_DEVICE_NOT_FOUND;
147
148 return PCIBIOS_SUCCESSFUL;
149}
150
147int __init add_bridge(struct device_node *dev) 151int __init add_bridge(struct device_node *dev)
148{ 152{
149 int len; 153 int len;
@@ -198,128 +202,3 @@ int __init add_bridge(struct device_node *dev)
198 202
199 return 0; 203 return 0;
200} 204}
201
202static void __devinit quirk_ali1575(struct pci_dev *dev)
203{
204 unsigned short temp;
205
206 /*
207 * ALI1575 interrupts route table setup:
208 *
209 * IRQ pin IRQ#
210 * PIRQA ---- 3
211 * PIRQB ---- 4
212 * PIRQC ---- 5
213 * PIRQD ---- 6
214 * PIRQE ---- 9
215 * PIRQF ---- 10
216 * PIRQG ---- 11
217 * PIRQH ---- 12
218 *
219 * interrupts for PCI slot0 -- PIRQA / PIRQB / PIRQC / PIRQD
220 * PCI slot1 -- PIRQB / PIRQC / PIRQD / PIRQA
221 */
222 pci_write_config_dword(dev, 0x48, 0xb9317542);
223
224 /* USB 1.1 OHCI controller 1, interrupt: PIRQE */
225 pci_write_config_byte(dev, 0x86, 0x0c);
226
227 /* USB 1.1 OHCI controller 2, interrupt: PIRQF */
228 pci_write_config_byte(dev, 0x87, 0x0d);
229
230 /* USB 1.1 OHCI controller 3, interrupt: PIRQH */
231 pci_write_config_byte(dev, 0x88, 0x0f);
232
233 /* USB 2.0 controller, interrupt: PIRQ7 */
234 pci_write_config_byte(dev, 0x74, 0x06);
235
236 /* Audio controller, interrupt: PIRQE */
237 pci_write_config_byte(dev, 0x8a, 0x0c);
238
239 /* Modem controller, interrupt: PIRQF */
240 pci_write_config_byte(dev, 0x8b, 0x0d);
241
242 /* HD audio controller, interrupt: PIRQG */
243 pci_write_config_byte(dev, 0x8c, 0x0e);
244
245 /* Serial ATA interrupt: PIRQD */
246 pci_write_config_byte(dev, 0x8d, 0x0b);
247
248 /* SMB interrupt: PIRQH */
249 pci_write_config_byte(dev, 0x8e, 0x0f);
250
251 /* PMU ACPI SCI interrupt: PIRQH */
252 pci_write_config_byte(dev, 0x8f, 0x0f);
253
254 /* Primary PATA IDE IRQ: 14
255 * Secondary PATA IDE IRQ: 15
256 */
257 pci_write_config_byte(dev, 0x44, 0x3d);
258 pci_write_config_byte(dev, 0x75, 0x0f);
259
260 /* Set IRQ14 and IRQ15 to legacy IRQs */
261 pci_read_config_word(dev, 0x46, &temp);
262 temp |= 0xc000;
263 pci_write_config_word(dev, 0x46, temp);
264
265 /* Set i8259 interrupt trigger
266 * IRQ 3: Level
267 * IRQ 4: Level
268 * IRQ 5: Level
269 * IRQ 6: Level
270 * IRQ 7: Level
271 * IRQ 9: Level
272 * IRQ 10: Level
273 * IRQ 11: Level
274 * IRQ 12: Level
275 * IRQ 14: Edge
276 * IRQ 15: Edge
277 */
278 outb(0xfa, 0x4d0);
279 outb(0x1e, 0x4d1);
280}
281
282static void __devinit quirk_uli5288(struct pci_dev *dev)
283{
284 unsigned char c;
285
286 pci_read_config_byte(dev,0x83,&c);
287 c |= 0x80;
288 pci_write_config_byte(dev, 0x83, c);
289
290 pci_write_config_byte(dev, 0x09, 0x01);
291 pci_write_config_byte(dev, 0x0a, 0x06);
292
293 pci_read_config_byte(dev,0x83,&c);
294 c &= 0x7f;
295 pci_write_config_byte(dev, 0x83, c);
296
297 pci_read_config_byte(dev,0x84,&c);
298 c |= 0x01;
299 pci_write_config_byte(dev, 0x84, c);
300}
301
302static void __devinit quirk_uli5229(struct pci_dev *dev)
303{
304 unsigned short temp;
305 pci_write_config_word(dev, 0x04, 0x0405);
306 pci_read_config_word(dev, 0x4a, &temp);
307 temp |= 0x1000;
308 pci_write_config_word(dev, 0x4a, temp);
309}
310
311static void __devinit early_uli5249(struct pci_dev *dev)
312{
313 unsigned char temp;
314 pci_write_config_word(dev, 0x04, 0x0007);
315 pci_read_config_byte(dev, 0x7c, &temp);
316 pci_write_config_byte(dev, 0x7c, 0x80);
317 pci_write_config_byte(dev, 0x09, 0x01);
318 pci_write_config_byte(dev, 0x7c, temp);
319 dev->class |= 0x1;
320}
321
322DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x1575, quirk_ali1575);
323DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5288, quirk_uli5288);
324DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5229, quirk_uli5229);
325DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AL, 0x5249, early_uli5249);