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-rw-r--r--arch/powerpc/platforms/83xx/mpc83xx.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/powerpc/platforms/83xx/mpc83xx.h b/arch/powerpc/platforms/83xx/mpc83xx.h
index 68065e62fc3d..88a3b5cabb18 100644
--- a/arch/powerpc/platforms/83xx/mpc83xx.h
+++ b/arch/powerpc/platforms/83xx/mpc83xx.h
@@ -16,6 +16,7 @@
16#define MPC83XX_SCCR_USB_DRCM_10 0x00200000 16#define MPC83XX_SCCR_USB_DRCM_10 0x00200000
17#define MPC8315_SCCR_USB_MASK 0x00c00000 17#define MPC8315_SCCR_USB_MASK 0x00c00000
18#define MPC8315_SCCR_USB_DRCM_11 0x00c00000 18#define MPC8315_SCCR_USB_DRCM_11 0x00c00000
19#define MPC8315_SCCR_USB_DRCM_01 0x00400000
19#define MPC837X_SCCR_USB_DRCM_11 0x00c00000 20#define MPC837X_SCCR_USB_DRCM_11 0x00c00000
20 21
21/* system i/o configuration register low */ 22/* system i/o configuration register low */
@@ -37,6 +38,7 @@
37/* USB Control Register */ 38/* USB Control Register */
38#define FSL_USB2_CONTROL_OFFS 0x500 39#define FSL_USB2_CONTROL_OFFS 0x500
39#define CONTROL_UTMI_PHY_EN 0x00000200 40#define CONTROL_UTMI_PHY_EN 0x00000200
41#define CONTROL_REFSEL_24MHZ 0x00000040
40#define CONTROL_REFSEL_48MHZ 0x00000080 42#define CONTROL_REFSEL_48MHZ 0x00000080
41#define CONTROL_PHY_CLK_SEL_ULPI 0x00000400 43#define CONTROL_PHY_CLK_SEL_ULPI 0x00000400
42#define CONTROL_OTG_PORT 0x00000020 44#define CONTROL_OTG_PORT 0x00000020