diff options
Diffstat (limited to 'arch/powerpc/include/asm/dma-mapping.h')
-rw-r--r-- | arch/powerpc/include/asm/dma-mapping.h | 15 |
1 files changed, 0 insertions, 15 deletions
diff --git a/arch/powerpc/include/asm/dma-mapping.h b/arch/powerpc/include/asm/dma-mapping.h index c85ef230135b..a77ba280af04 100644 --- a/arch/powerpc/include/asm/dma-mapping.h +++ b/arch/powerpc/include/asm/dma-mapping.h | |||
@@ -215,21 +215,6 @@ static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr) | |||
215 | #define dma_is_consistent(d, h) (1) | 215 | #define dma_is_consistent(d, h) (1) |
216 | #endif | 216 | #endif |
217 | 217 | ||
218 | static inline int dma_get_cache_alignment(void) | ||
219 | { | ||
220 | #ifdef CONFIG_PPC64 | ||
221 | /* no easy way to get cache size on all processors, so return | ||
222 | * the maximum possible, to be safe */ | ||
223 | return (1 << INTERNODE_CACHE_SHIFT); | ||
224 | #else | ||
225 | /* | ||
226 | * Each processor family will define its own L1_CACHE_SHIFT, | ||
227 | * L1_CACHE_BYTES wraps to this, so this is always safe. | ||
228 | */ | ||
229 | return L1_CACHE_BYTES; | ||
230 | #endif | ||
231 | } | ||
232 | |||
233 | static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size, | 218 | static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size, |
234 | enum dma_data_direction direction) | 219 | enum dma_data_direction direction) |
235 | { | 220 | { |