diff options
Diffstat (limited to 'arch/powerpc/boot/dts/tqm5200.dts')
-rw-r--r-- | arch/powerpc/boot/dts/tqm5200.dts | 43 |
1 files changed, 17 insertions, 26 deletions
diff --git a/arch/powerpc/boot/dts/tqm5200.dts b/arch/powerpc/boot/dts/tqm5200.dts index 58c9799caf16..c86464f007da 100644 --- a/arch/powerpc/boot/dts/tqm5200.dts +++ b/arch/powerpc/boot/dts/tqm5200.dts | |||
@@ -10,12 +10,6 @@ | |||
10 | * option) any later version. | 10 | * option) any later version. |
11 | */ | 11 | */ |
12 | 12 | ||
13 | /* | ||
14 | * WARNING: Do not depend on this tree layout remaining static just yet. | ||
15 | * The MPC5200 device tree conventions are still in flux | ||
16 | * Keep an eye on the linuxppc-dev mailing list for more details | ||
17 | */ | ||
18 | |||
19 | / { | 13 | / { |
20 | model = "tqc,tqm5200"; | 14 | model = "tqc,tqm5200"; |
21 | compatible = "tqc,tqm5200"; | 15 | compatible = "tqc,tqm5200"; |
@@ -47,29 +41,26 @@ | |||
47 | soc5200@f0000000 { | 41 | soc5200@f0000000 { |
48 | #address-cells = <1>; | 42 | #address-cells = <1>; |
49 | #size-cells = <1>; | 43 | #size-cells = <1>; |
50 | model = "fsl,mpc5200"; | 44 | compatible = "fsl,mpc5200-immr"; |
51 | compatible = "fsl,mpc5200"; | ||
52 | revision = ""; // from bootloader | ||
53 | device_type = "soc"; | ||
54 | ranges = <0 f0000000 0000c000>; | 45 | ranges = <0 f0000000 0000c000>; |
55 | reg = <f0000000 00000100>; | 46 | reg = <f0000000 00000100>; |
56 | bus-frequency = <0>; // from bootloader | 47 | bus-frequency = <0>; // from bootloader |
57 | system-frequency = <0>; // from bootloader | 48 | system-frequency = <0>; // from bootloader |
58 | 49 | ||
59 | cdm@200 { | 50 | cdm@200 { |
60 | compatible = "mpc5200-cdm"; | 51 | compatible = "fsl,mpc5200-cdm"; |
61 | reg = <200 38>; | 52 | reg = <200 38>; |
62 | }; | 53 | }; |
63 | 54 | ||
64 | mpc5200_pic: pic@500 { | 55 | mpc5200_pic: interrupt-controller@500 { |
65 | // 5200 interrupts are encoded into two levels; | 56 | // 5200 interrupts are encoded into two levels; |
66 | interrupt-controller; | 57 | interrupt-controller; |
67 | #interrupt-cells = <3>; | 58 | #interrupt-cells = <3>; |
68 | compatible = "mpc5200-pic"; | 59 | compatible = "fsl,mpc5200-pic"; |
69 | reg = <500 80>; | 60 | reg = <500 80>; |
70 | }; | 61 | }; |
71 | 62 | ||
72 | gpt@600 { // General Purpose Timer | 63 | timer@600 { // General Purpose Timer |
73 | compatible = "fsl,mpc5200-gpt"; | 64 | compatible = "fsl,mpc5200-gpt"; |
74 | reg = <600 10>; | 65 | reg = <600 10>; |
75 | interrupts = <1 9 0>; | 66 | interrupts = <1 9 0>; |
@@ -78,21 +69,21 @@ | |||
78 | }; | 69 | }; |
79 | 70 | ||
80 | gpio@b00 { | 71 | gpio@b00 { |
81 | compatible = "mpc5200-gpio"; | 72 | compatible = "fsl,mpc5200-gpio"; |
82 | reg = <b00 40>; | 73 | reg = <b00 40>; |
83 | interrupts = <1 7 0>; | 74 | interrupts = <1 7 0>; |
84 | interrupt-parent = <&mpc5200_pic>; | 75 | interrupt-parent = <&mpc5200_pic>; |
85 | }; | 76 | }; |
86 | 77 | ||
87 | usb@1000 { | 78 | usb@1000 { |
88 | compatible = "mpc5200-ohci","ohci-be"; | 79 | compatible = "fsl,mpc5200-ohci","ohci-be"; |
89 | reg = <1000 ff>; | 80 | reg = <1000 ff>; |
90 | interrupts = <2 6 0>; | 81 | interrupts = <2 6 0>; |
91 | interrupt-parent = <&mpc5200_pic>; | 82 | interrupt-parent = <&mpc5200_pic>; |
92 | }; | 83 | }; |
93 | 84 | ||
94 | dma-controller@1200 { | 85 | dma-controller@1200 { |
95 | compatible = "mpc5200-bestcomm"; | 86 | compatible = "fsl,mpc5200-bestcomm"; |
96 | reg = <1200 80>; | 87 | reg = <1200 80>; |
97 | interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 | 88 | interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 |
98 | 3 4 0 3 5 0 3 6 0 3 7 0 | 89 | 3 4 0 3 5 0 3 6 0 3 7 0 |
@@ -102,13 +93,13 @@ | |||
102 | }; | 93 | }; |
103 | 94 | ||
104 | xlb@1f00 { | 95 | xlb@1f00 { |
105 | compatible = "mpc5200-xlb"; | 96 | compatible = "fsl,mpc5200-xlb"; |
106 | reg = <1f00 100>; | 97 | reg = <1f00 100>; |
107 | }; | 98 | }; |
108 | 99 | ||
109 | serial@2000 { // PSC1 | 100 | serial@2000 { // PSC1 |
110 | device_type = "serial"; | 101 | device_type = "serial"; |
111 | compatible = "mpc5200-psc-uart"; | 102 | compatible = "fsl,mpc5200-psc-uart"; |
112 | port-number = <0>; // Logical port assignment | 103 | port-number = <0>; // Logical port assignment |
113 | reg = <2000 100>; | 104 | reg = <2000 100>; |
114 | interrupts = <2 1 0>; | 105 | interrupts = <2 1 0>; |
@@ -117,7 +108,7 @@ | |||
117 | 108 | ||
118 | serial@2200 { // PSC2 | 109 | serial@2200 { // PSC2 |
119 | device_type = "serial"; | 110 | device_type = "serial"; |
120 | compatible = "mpc5200-psc-uart"; | 111 | compatible = "fsl,mpc5200-psc-uart"; |
121 | port-number = <1>; // Logical port assignment | 112 | port-number = <1>; // Logical port assignment |
122 | reg = <2200 100>; | 113 | reg = <2200 100>; |
123 | interrupts = <2 2 0>; | 114 | interrupts = <2 2 0>; |
@@ -126,7 +117,7 @@ | |||
126 | 117 | ||
127 | serial@2400 { // PSC3 | 118 | serial@2400 { // PSC3 |
128 | device_type = "serial"; | 119 | device_type = "serial"; |
129 | compatible = "mpc5200-psc-uart"; | 120 | compatible = "fsl,mpc5200-psc-uart"; |
130 | port-number = <2>; // Logical port assignment | 121 | port-number = <2>; // Logical port assignment |
131 | reg = <2400 100>; | 122 | reg = <2400 100>; |
132 | interrupts = <2 3 0>; | 123 | interrupts = <2 3 0>; |
@@ -135,22 +126,22 @@ | |||
135 | 126 | ||
136 | ethernet@3000 { | 127 | ethernet@3000 { |
137 | device_type = "network"; | 128 | device_type = "network"; |
138 | compatible = "mpc5200-fec"; | 129 | compatible = "fsl,mpc5200-fec"; |
139 | reg = <3000 800>; | 130 | reg = <3000 800>; |
140 | local-mac-address = [ 00 00 00 00 00 00 ]; /* Filled in by U-Boot */ | 131 | local-mac-address = [ 00 00 00 00 00 00 ]; |
141 | interrupts = <2 5 0>; | 132 | interrupts = <2 5 0>; |
142 | interrupt-parent = <&mpc5200_pic>; | 133 | interrupt-parent = <&mpc5200_pic>; |
143 | }; | 134 | }; |
144 | 135 | ||
145 | ata@3a00 { | 136 | ata@3a00 { |
146 | compatible = "mpc5200-ata"; | 137 | compatible = "fsl,mpc5200-ata"; |
147 | reg = <3a00 100>; | 138 | reg = <3a00 100>; |
148 | interrupts = <2 7 0>; | 139 | interrupts = <2 7 0>; |
149 | interrupt-parent = <&mpc5200_pic>; | 140 | interrupt-parent = <&mpc5200_pic>; |
150 | }; | 141 | }; |
151 | 142 | ||
152 | i2c@3d40 { | 143 | i2c@3d40 { |
153 | compatible = "mpc5200-i2c","fsl-i2c"; | 144 | compatible = "fsl,mpc5200-i2c","fsl-i2c"; |
154 | reg = <3d40 40>; | 145 | reg = <3d40 40>; |
155 | interrupts = <2 10 0>; | 146 | interrupts = <2 10 0>; |
156 | interrupt-parent = <&mpc5200_pic>; | 147 | interrupt-parent = <&mpc5200_pic>; |
@@ -158,7 +149,7 @@ | |||
158 | }; | 149 | }; |
159 | 150 | ||
160 | sram@8000 { | 151 | sram@8000 { |
161 | compatible = "mpc5200-sram"; | 152 | compatible = "fsl,mpc5200-sram"; |
162 | reg = <8000 4000>; | 153 | reg = <8000 4000>; |
163 | }; | 154 | }; |
164 | }; | 155 | }; |