aboutsummaryrefslogtreecommitdiffstats
path: root/arch/powerpc/boot/dts/mpc8379_mds.dts
diff options
context:
space:
mode:
Diffstat (limited to 'arch/powerpc/boot/dts/mpc8379_mds.dts')
-rw-r--r--arch/powerpc/boot/dts/mpc8379_mds.dts68
1 files changed, 47 insertions, 21 deletions
diff --git a/arch/powerpc/boot/dts/mpc8379_mds.dts b/arch/powerpc/boot/dts/mpc8379_mds.dts
index 1b61cda1eb47..9deb5b20f8af 100644
--- a/arch/powerpc/boot/dts/mpc8379_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8379_mds.dts
@@ -127,21 +127,38 @@
127 reg = <0x200 0x100>; 127 reg = <0x200 0x100>;
128 }; 128 };
129 129
130 i2c@3000 { 130 sleep-nexus {
131 #address-cells = <1>; 131 #address-cells = <1>;
132 #size-cells = <0>; 132 #size-cells = <1>;
133 cell-index = <0>; 133 compatible = "simple-bus";
134 compatible = "fsl-i2c"; 134 sleep = <&pmc 0x0c000000>;
135 reg = <0x3000 0x100>; 135 ranges;
136 interrupts = <14 0x8>;
137 interrupt-parent = <&ipic>;
138 dfsrr;
139 136
140 rtc@68 { 137 i2c@3000 {
141 compatible = "dallas,ds1374"; 138 #address-cells = <1>;
142 reg = <0x68>; 139 #size-cells = <0>;
143 interrupts = <19 0x8>; 140 cell-index = <0>;
141 compatible = "fsl-i2c";
142 reg = <0x3000 0x100>;
143 interrupts = <14 0x8>;
144 interrupt-parent = <&ipic>; 144 interrupt-parent = <&ipic>;
145 dfsrr;
146
147 rtc@68 {
148 compatible = "dallas,ds1374";
149 reg = <0x68>;
150 interrupts = <19 0x8>;
151 interrupt-parent = <&ipic>;
152 };
153 };
154
155 sdhci@2e000 {
156 compatible = "fsl,mpc8379-esdhc";
157 reg = <0x2e000 0x1000>;
158 interrupts = <42 0x8>;
159 interrupt-parent = <&ipic>;
160 /* Filled in by U-Boot */
161 clock-frequency = <0>;
145 }; 162 };
146 }; 163 };
147 164
@@ -213,6 +230,7 @@
213 interrupts = <38 0x8>; 230 interrupts = <38 0x8>;
214 dr_mode = "host"; 231 dr_mode = "host";
215 phy_type = "ulpi"; 232 phy_type = "ulpi";
233 sleep = <&pmc 0x00c00000>;
216 }; 234 };
217 235
218 mdio@24520 { 236 mdio@24520 {
@@ -262,6 +280,8 @@
262 interrupt-parent = <&ipic>; 280 interrupt-parent = <&ipic>;
263 tbi-handle = <&tbi0>; 281 tbi-handle = <&tbi0>;
264 phy-handle = <&phy2>; 282 phy-handle = <&phy2>;
283 sleep = <&pmc 0xc0000000>;
284 fsl,magic-packet;
265 }; 285 };
266 286
267 enet1: ethernet@25000 { 287 enet1: ethernet@25000 {
@@ -276,6 +296,8 @@
276 interrupt-parent = <&ipic>; 296 interrupt-parent = <&ipic>;
277 tbi-handle = <&tbi1>; 297 tbi-handle = <&tbi1>;
278 phy-handle = <&phy3>; 298 phy-handle = <&phy3>;
299 sleep = <&pmc 0x30000000>;
300 fsl,magic-packet;
279 }; 301 };
280 302
281 serial0: serial@4500 { 303 serial0: serial@4500 {
@@ -308,15 +330,7 @@
308 fsl,channel-fifo-len = <24>; 330 fsl,channel-fifo-len = <24>;
309 fsl,exec-units-mask = <0x9fe>; 331 fsl,exec-units-mask = <0x9fe>;
310 fsl,descriptor-types-mask = <0x3ab0ebf>; 332 fsl,descriptor-types-mask = <0x3ab0ebf>;
311 }; 333 sleep = <&pmc 0x03000000>;
312
313 sdhci@2e000 {
314 compatible = "fsl,mpc8379-esdhc";
315 reg = <0x2e000 0x1000>;
316 interrupts = <42 0x8>;
317 interrupt-parent = <&ipic>;
318 /* Filled in by U-Boot */
319 clock-frequency = <0>;
320 }; 334 };
321 335
322 sata@18000 { 336 sata@18000 {
@@ -324,6 +338,7 @@
324 reg = <0x18000 0x1000>; 338 reg = <0x18000 0x1000>;
325 interrupts = <44 0x8>; 339 interrupts = <44 0x8>;
326 interrupt-parent = <&ipic>; 340 interrupt-parent = <&ipic>;
341 sleep = <&pmc 0x000000c0>;
327 }; 342 };
328 343
329 sata@19000 { 344 sata@19000 {
@@ -331,6 +346,7 @@
331 reg = <0x19000 0x1000>; 346 reg = <0x19000 0x1000>;
332 interrupts = <45 0x8>; 347 interrupts = <45 0x8>;
333 interrupt-parent = <&ipic>; 348 interrupt-parent = <&ipic>;
349 sleep = <&pmc 0x00000030>;
334 }; 350 };
335 351
336 sata@1a000 { 352 sata@1a000 {
@@ -338,6 +354,7 @@
338 reg = <0x1a000 0x1000>; 354 reg = <0x1a000 0x1000>;
339 interrupts = <46 0x8>; 355 interrupts = <46 0x8>;
340 interrupt-parent = <&ipic>; 356 interrupt-parent = <&ipic>;
357 sleep = <&pmc 0x0000000c>;
341 }; 358 };
342 359
343 sata@1b000 { 360 sata@1b000 {
@@ -345,6 +362,7 @@
345 reg = <0x1b000 0x1000>; 362 reg = <0x1b000 0x1000>;
346 interrupts = <47 0x8>; 363 interrupts = <47 0x8>;
347 interrupt-parent = <&ipic>; 364 interrupt-parent = <&ipic>;
365 sleep = <&pmc 0x00000003>;
348 }; 366 };
349 367
350 /* IPIC 368 /* IPIC
@@ -360,6 +378,13 @@
360 #interrupt-cells = <2>; 378 #interrupt-cells = <2>;
361 reg = <0x700 0x100>; 379 reg = <0x700 0x100>;
362 }; 380 };
381
382 pmc: power@b00 {
383 compatible = "fsl,mpc8379-pmc", "fsl,mpc8349-pmc";
384 reg = <0xb00 0x100 0xa00 0x100>;
385 interrupts = <80 0x8>;
386 interrupt-parent = <&ipic>;
387 };
363 }; 388 };
364 389
365 pci0: pci@e0008500 { 390 pci0: pci@e0008500 {
@@ -414,6 +439,7 @@
414 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 439 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
415 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 440 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
416 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>; 441 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
442 sleep = <&pmc 0x00010000>;
417 clock-frequency = <0>; 443 clock-frequency = <0>;
418 #interrupt-cells = <1>; 444 #interrupt-cells = <1>;
419 #size-cells = <2>; 445 #size-cells = <2>;