diff options
Diffstat (limited to 'arch/powerpc/boot/dts/mpc8377_rdb.dts')
-rw-r--r-- | arch/powerpc/boot/dts/mpc8377_rdb.dts | 98 |
1 files changed, 62 insertions, 36 deletions
diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts index fb1d884348ec..32311c8f55d8 100644 --- a/arch/powerpc/boot/dts/mpc8377_rdb.dts +++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts | |||
@@ -127,37 +127,54 @@ | |||
127 | gpio-controller; | 127 | gpio-controller; |
128 | }; | 128 | }; |
129 | 129 | ||
130 | i2c@3000 { | 130 | sleep-nexus { |
131 | #address-cells = <1>; | 131 | #address-cells = <1>; |
132 | #size-cells = <0>; | 132 | #size-cells = <1>; |
133 | cell-index = <0>; | 133 | compatible = "simple-bus"; |
134 | compatible = "fsl-i2c"; | 134 | sleep = <&pmc 0x0c000000>; |
135 | reg = <0x3000 0x100>; | 135 | ranges; |
136 | interrupts = <14 0x8>; | ||
137 | interrupt-parent = <&ipic>; | ||
138 | dfsrr; | ||
139 | |||
140 | dtt@48 { | ||
141 | compatible = "national,lm75"; | ||
142 | reg = <0x48>; | ||
143 | }; | ||
144 | |||
145 | at24@50 { | ||
146 | compatible = "at24,24c256"; | ||
147 | reg = <0x50>; | ||
148 | }; | ||
149 | 136 | ||
150 | rtc@68 { | 137 | i2c@3000 { |
151 | compatible = "dallas,ds1339"; | 138 | #address-cells = <1>; |
152 | reg = <0x68>; | 139 | #size-cells = <0>; |
140 | cell-index = <0>; | ||
141 | compatible = "fsl-i2c"; | ||
142 | reg = <0x3000 0x100>; | ||
143 | interrupts = <14 0x8>; | ||
144 | interrupt-parent = <&ipic>; | ||
145 | dfsrr; | ||
146 | |||
147 | dtt@48 { | ||
148 | compatible = "national,lm75"; | ||
149 | reg = <0x48>; | ||
150 | }; | ||
151 | |||
152 | at24@50 { | ||
153 | compatible = "at24,24c256"; | ||
154 | reg = <0x50>; | ||
155 | }; | ||
156 | |||
157 | rtc@68 { | ||
158 | compatible = "dallas,ds1339"; | ||
159 | reg = <0x68>; | ||
160 | }; | ||
161 | |||
162 | mcu_pio: mcu@a { | ||
163 | #gpio-cells = <2>; | ||
164 | compatible = "fsl,mc9s08qg8-mpc8377erdb", | ||
165 | "fsl,mcu-mpc8349emitx"; | ||
166 | reg = <0x0a>; | ||
167 | gpio-controller; | ||
168 | }; | ||
153 | }; | 169 | }; |
154 | 170 | ||
155 | mcu_pio: mcu@a { | 171 | sdhci@2e000 { |
156 | #gpio-cells = <2>; | 172 | compatible = "fsl,mpc8377-esdhc", "fsl,mpc8379-esdhc"; |
157 | compatible = "fsl,mc9s08qg8-mpc8377erdb", | 173 | reg = <0x2e000 0x1000>; |
158 | "fsl,mcu-mpc8349emitx"; | 174 | interrupts = <42 0x8>; |
159 | reg = <0x0a>; | 175 | interrupt-parent = <&ipic>; |
160 | gpio-controller; | 176 | /* Filled in by U-Boot */ |
177 | clock-frequency = <0>; | ||
161 | }; | 178 | }; |
162 | }; | 179 | }; |
163 | 180 | ||
@@ -228,6 +245,7 @@ | |||
228 | interrupt-parent = <&ipic>; | 245 | interrupt-parent = <&ipic>; |
229 | interrupts = <38 0x8>; | 246 | interrupts = <38 0x8>; |
230 | phy_type = "ulpi"; | 247 | phy_type = "ulpi"; |
248 | sleep = <&pmc 0x00c00000>; | ||
231 | }; | 249 | }; |
232 | 250 | ||
233 | mdio@24520 { | 251 | mdio@24520 { |
@@ -272,6 +290,8 @@ | |||
272 | interrupt-parent = <&ipic>; | 290 | interrupt-parent = <&ipic>; |
273 | tbi-handle = <&tbi0>; | 291 | tbi-handle = <&tbi0>; |
274 | phy-handle = <&phy2>; | 292 | phy-handle = <&phy2>; |
293 | sleep = <&pmc 0xc0000000>; | ||
294 | fsl,magic-packet; | ||
275 | }; | 295 | }; |
276 | 296 | ||
277 | enet1: ethernet@25000 { | 297 | enet1: ethernet@25000 { |
@@ -286,6 +306,8 @@ | |||
286 | interrupt-parent = <&ipic>; | 306 | interrupt-parent = <&ipic>; |
287 | fixed-link = <1 1 1000 0 0>; | 307 | fixed-link = <1 1 1000 0 0>; |
288 | tbi-handle = <&tbi1>; | 308 | tbi-handle = <&tbi1>; |
309 | sleep = <&pmc 0x30000000>; | ||
310 | fsl,magic-packet; | ||
289 | }; | 311 | }; |
290 | 312 | ||
291 | serial0: serial@4500 { | 313 | serial0: serial@4500 { |
@@ -318,15 +340,7 @@ | |||
318 | fsl,channel-fifo-len = <24>; | 340 | fsl,channel-fifo-len = <24>; |
319 | fsl,exec-units-mask = <0x9fe>; | 341 | fsl,exec-units-mask = <0x9fe>; |
320 | fsl,descriptor-types-mask = <0x3ab0ebf>; | 342 | fsl,descriptor-types-mask = <0x3ab0ebf>; |
321 | }; | 343 | sleep = <&pmc 0x03000000>; |
322 | |||
323 | sdhci@2e000 { | ||
324 | compatible = "fsl,mpc8377-esdhc", "fsl,mpc8379-esdhc"; | ||
325 | reg = <0x2e000 0x1000>; | ||
326 | interrupts = <42 0x8>; | ||
327 | interrupt-parent = <&ipic>; | ||
328 | /* Filled in by U-Boot */ | ||
329 | clock-frequency = <0>; | ||
330 | }; | 344 | }; |
331 | 345 | ||
332 | sata@18000 { | 346 | sata@18000 { |
@@ -334,6 +348,7 @@ | |||
334 | reg = <0x18000 0x1000>; | 348 | reg = <0x18000 0x1000>; |
335 | interrupts = <44 0x8>; | 349 | interrupts = <44 0x8>; |
336 | interrupt-parent = <&ipic>; | 350 | interrupt-parent = <&ipic>; |
351 | sleep = <&pmc 0x000000c0>; | ||
337 | }; | 352 | }; |
338 | 353 | ||
339 | sata@19000 { | 354 | sata@19000 { |
@@ -341,6 +356,7 @@ | |||
341 | reg = <0x19000 0x1000>; | 356 | reg = <0x19000 0x1000>; |
342 | interrupts = <45 0x8>; | 357 | interrupts = <45 0x8>; |
343 | interrupt-parent = <&ipic>; | 358 | interrupt-parent = <&ipic>; |
359 | sleep = <&pmc 0x00000030>; | ||
344 | }; | 360 | }; |
345 | 361 | ||
346 | /* IPIC | 362 | /* IPIC |
@@ -356,6 +372,13 @@ | |||
356 | #interrupt-cells = <2>; | 372 | #interrupt-cells = <2>; |
357 | reg = <0x700 0x100>; | 373 | reg = <0x700 0x100>; |
358 | }; | 374 | }; |
375 | |||
376 | pmc: power@b00 { | ||
377 | compatible = "fsl,mpc8377-pmc", "fsl,mpc8349-pmc"; | ||
378 | reg = <0xb00 0x100 0xa00 0x100>; | ||
379 | interrupts = <80 0x8>; | ||
380 | interrupt-parent = <&ipic>; | ||
381 | }; | ||
359 | }; | 382 | }; |
360 | 383 | ||
361 | pci0: pci@e0008500 { | 384 | pci0: pci@e0008500 { |
@@ -381,6 +404,7 @@ | |||
381 | ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 | 404 | ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 |
382 | 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 | 405 | 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 |
383 | 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; | 406 | 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; |
407 | sleep = <&pmc 0x00010000>; | ||
384 | clock-frequency = <66666666>; | 408 | clock-frequency = <66666666>; |
385 | #interrupt-cells = <1>; | 409 | #interrupt-cells = <1>; |
386 | #size-cells = <2>; | 410 | #size-cells = <2>; |
@@ -406,6 +430,7 @@ | |||
406 | 0 0 0 2 &ipic 1 8 | 430 | 0 0 0 2 &ipic 1 8 |
407 | 0 0 0 3 &ipic 1 8 | 431 | 0 0 0 3 &ipic 1 8 |
408 | 0 0 0 4 &ipic 1 8>; | 432 | 0 0 0 4 &ipic 1 8>; |
433 | sleep = <&pmc 0x00300000>; | ||
409 | clock-frequency = <0>; | 434 | clock-frequency = <0>; |
410 | 435 | ||
411 | pcie@0 { | 436 | pcie@0 { |
@@ -437,6 +462,7 @@ | |||
437 | 0 0 0 2 &ipic 2 8 | 462 | 0 0 0 2 &ipic 2 8 |
438 | 0 0 0 3 &ipic 2 8 | 463 | 0 0 0 3 &ipic 2 8 |
439 | 0 0 0 4 &ipic 2 8>; | 464 | 0 0 0 4 &ipic 2 8>; |
465 | sleep = <&pmc 0x000c0000>; | ||
440 | clock-frequency = <0>; | 466 | clock-frequency = <0>; |
441 | 467 | ||
442 | pcie@0 { | 468 | pcie@0 { |