diff options
Diffstat (limited to 'arch/mn10300/unit-asb2303/include/unit/timex.h')
-rw-r--r-- | arch/mn10300/unit-asb2303/include/unit/timex.h | 64 |
1 files changed, 43 insertions, 21 deletions
diff --git a/arch/mn10300/unit-asb2303/include/unit/timex.h b/arch/mn10300/unit-asb2303/include/unit/timex.h index 88cd96bb2527..d1b8dafe7d7d 100644 --- a/arch/mn10300/unit-asb2303/include/unit/timex.h +++ b/arch/mn10300/unit-asb2303/include/unit/timex.h | |||
@@ -1,4 +1,4 @@ | |||
1 | /* ASB2303-specific timer specifcations | 1 | /* ASB2303-specific timer specifications |
2 | * | 2 | * |
3 | * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved. | 3 | * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved. |
4 | * Written by David Howells (dhowells@redhat.com) | 4 | * Written by David Howells (dhowells@redhat.com) |
@@ -17,6 +17,7 @@ | |||
17 | 17 | ||
18 | #include <asm/timer-regs.h> | 18 | #include <asm/timer-regs.h> |
19 | #include <unit/clock.h> | 19 | #include <unit/clock.h> |
20 | #include <asm/param.h> | ||
20 | 21 | ||
21 | /* | 22 | /* |
22 | * jiffies counter specifications | 23 | * jiffies counter specifications |
@@ -29,32 +30,43 @@ | |||
29 | #define TMJCBR TM01BR | 30 | #define TMJCBR TM01BR |
30 | #define TMJCIRQ TM1IRQ | 31 | #define TMJCIRQ TM1IRQ |
31 | #define TMJCICR TM1ICR | 32 | #define TMJCICR TM1ICR |
32 | #define TMJCICR_LEVEL GxICR_LEVEL_5 | ||
33 | 33 | ||
34 | #ifndef __ASSEMBLY__ | 34 | #ifndef __ASSEMBLY__ |
35 | 35 | ||
36 | #define MN10300_SRC_IOCLK MN10300_IOCLK | ||
37 | |||
38 | #ifndef HZ | ||
39 | # error HZ undeclared. | ||
40 | #endif /* !HZ */ | ||
41 | /* use as little prescaling as possible to avoid losing accuracy */ | ||
42 | #if (MN10300_SRC_IOCLK + HZ / 2) / HZ - 1 <= TMJCBR_MAX | ||
43 | # define IOCLK_PRESCALE 1 | ||
44 | # define JC_TIMER_CLKSRC TM0MD_SRC_IOCLK | ||
45 | # define TSC_TIMER_CLKSRC TM4MD_SRC_IOCLK | ||
46 | #elif (MN10300_SRC_IOCLK / 8 + HZ / 2) / HZ - 1 <= TMJCBR_MAX | ||
47 | # define IOCLK_PRESCALE 8 | ||
48 | # define JC_TIMER_CLKSRC TM0MD_SRC_IOCLK_8 | ||
49 | # define TSC_TIMER_CLKSRC TM4MD_SRC_IOCLK_8 | ||
50 | #elif (MN10300_SRC_IOCLK / 32 + HZ / 2) / HZ - 1 <= TMJCBR_MAX | ||
51 | # define IOCLK_PRESCALE 32 | ||
52 | # define JC_TIMER_CLKSRC TM0MD_SRC_IOCLK_32 | ||
53 | # define TSC_TIMER_CLKSRC TM4MD_SRC_IOCLK_32 | ||
54 | #else | ||
55 | # error You lose. | ||
56 | #endif | ||
57 | |||
58 | #define MN10300_JCCLK (MN10300_SRC_IOCLK / IOCLK_PRESCALE) | ||
59 | #define MN10300_TSCCLK (MN10300_SRC_IOCLK / IOCLK_PRESCALE) | ||
60 | |||
61 | #define MN10300_JC_PER_HZ ((MN10300_JCCLK + HZ / 2) / HZ) | ||
62 | #define MN10300_TSC_PER_HZ ((MN10300_TSCCLK + HZ / 2) / HZ) | ||
63 | |||
36 | static inline void startup_jiffies_counter(void) | 64 | static inline void startup_jiffies_counter(void) |
37 | { | 65 | { |
38 | unsigned rate; | ||
39 | u16 md, t16; | 66 | u16 md, t16; |
40 | 67 | ||
41 | /* use as little prescaling as possible to avoid losing accuracy */ | 68 | md = JC_TIMER_CLKSRC; |
42 | md = TM0MD_SRC_IOCLK; | 69 | TMJCBR = MN10300_JC_PER_HZ - 1; |
43 | rate = MN10300_JCCLK / HZ; | ||
44 | |||
45 | if (rate > TMJCBR_MAX) { | ||
46 | md = TM0MD_SRC_IOCLK_8; | ||
47 | rate = MN10300_JCCLK / 8 / HZ; | ||
48 | |||
49 | if (rate > TMJCBR_MAX) { | ||
50 | md = TM0MD_SRC_IOCLK_32; | ||
51 | rate = MN10300_JCCLK / 32 / HZ; | ||
52 | |||
53 | BUG_ON(rate > TMJCBR_MAX); | ||
54 | } | ||
55 | } | ||
56 | |||
57 | TMJCBR = rate - 1; | ||
58 | t16 = TMJCBR; | 70 | t16 = TMJCBR; |
59 | 71 | ||
60 | TMJCMD = | 72 | TMJCMD = |
@@ -93,29 +105,39 @@ static inline void shutdown_jiffies_counter(void) | |||
93 | 105 | ||
94 | static inline void startup_timestamp_counter(void) | 106 | static inline void startup_timestamp_counter(void) |
95 | { | 107 | { |
108 | u32 t32; | ||
109 | |||
96 | /* set up timer 4 & 5 cascaded as a 32-bit counter to count real time | 110 | /* set up timer 4 & 5 cascaded as a 32-bit counter to count real time |
97 | * - count down from 4Gig-1 to 0 and wrap at IOCLK rate | 111 | * - count down from 4Gig-1 to 0 and wrap at IOCLK rate |
98 | */ | 112 | */ |
99 | TM45BR = TMTSCBR_MAX; | 113 | TM45BR = TMTSCBR_MAX; |
114 | t32 = TM45BR; | ||
100 | 115 | ||
101 | TM4MD = TM4MD_SRC_IOCLK; | 116 | TM4MD = TSC_TIMER_CLKSRC; |
102 | TM4MD |= TM4MD_INIT_COUNTER; | 117 | TM4MD |= TM4MD_INIT_COUNTER; |
103 | TM4MD &= ~TM4MD_INIT_COUNTER; | 118 | TM4MD &= ~TM4MD_INIT_COUNTER; |
104 | TM4ICR = 0; | 119 | TM4ICR = 0; |
120 | t32 = TM4ICR; | ||
105 | 121 | ||
106 | TM5MD = TM5MD_SRC_TM4CASCADE; | 122 | TM5MD = TM5MD_SRC_TM4CASCADE; |
107 | TM5MD |= TM5MD_INIT_COUNTER; | 123 | TM5MD |= TM5MD_INIT_COUNTER; |
108 | TM5MD &= ~TM5MD_INIT_COUNTER; | 124 | TM5MD &= ~TM5MD_INIT_COUNTER; |
109 | TM5ICR = 0; | 125 | TM5ICR = 0; |
126 | t32 = TM5ICR; | ||
110 | 127 | ||
111 | TM5MD |= TM5MD_COUNT_ENABLE; | 128 | TM5MD |= TM5MD_COUNT_ENABLE; |
112 | TM4MD |= TM4MD_COUNT_ENABLE; | 129 | TM4MD |= TM4MD_COUNT_ENABLE; |
130 | t32 = TM5MD; | ||
131 | t32 = TM4MD; | ||
113 | } | 132 | } |
114 | 133 | ||
115 | static inline void shutdown_timestamp_counter(void) | 134 | static inline void shutdown_timestamp_counter(void) |
116 | { | 135 | { |
136 | u8 t8; | ||
117 | TM4MD = 0; | 137 | TM4MD = 0; |
118 | TM5MD = 0; | 138 | TM5MD = 0; |
139 | t8 = TM4MD; | ||
140 | t8 = TM5MD; | ||
119 | } | 141 | } |
120 | 142 | ||
121 | /* | 143 | /* |