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-rw-r--r--arch/mips/pci/ops-sni.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/mips/pci/ops-sni.c b/arch/mips/pci/ops-sni.c
index 97ed25b92edf..35daa7fe6571 100644
--- a/arch/mips/pci/ops-sni.c
+++ b/arch/mips/pci/ops-sni.c
@@ -14,8 +14,8 @@
14 14
15/* 15/*
16 * It seems that on the RM200 only lower 3 bits of the 5 bit PCI device 16 * It seems that on the RM200 only lower 3 bits of the 5 bit PCI device
17 * address are decoded. We therefore manually have to reject attempts at 17 * address are decoded. We therefore manually have to reject attempts at
18 * reading outside this range. Being on the paranoid side we only do this 18 * reading outside this range. Being on the paranoid side we only do this
19 * test for bus 0 and hope forwarding and decoding work properly for any 19 * test for bus 0 and hope forwarding and decoding work properly for any
20 * subordinated busses. 20 * subordinated busses.
21 * 21 *
@@ -31,8 +31,8 @@ static int set_config_address(unsigned int busno, unsigned int devfn, int reg)
31 31
32 *(volatile u32 *)PCIMT_CONFIG_ADDRESS = 32 *(volatile u32 *)PCIMT_CONFIG_ADDRESS =
33 ((busno & 0xff) << 16) | 33 ((busno & 0xff) << 16) |
34 ((devfn & 0xff) << 8) | 34 ((devfn & 0xff) << 8) |
35 (reg & 0xfc); 35 (reg & 0xfc);
36 36
37 return PCIBIOS_SUCCESSFUL; 37 return PCIBIOS_SUCCESSFUL;
38} 38}