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-rw-r--r--arch/mips/pci/ops-pmcmsp.c450
1 files changed, 225 insertions, 225 deletions
diff --git a/arch/mips/pci/ops-pmcmsp.c b/arch/mips/pci/ops-pmcmsp.c
index 389bf669d56e..d0b6f8399b07 100644
--- a/arch/mips/pci/ops-pmcmsp.c
+++ b/arch/mips/pci/ops-pmcmsp.c
@@ -9,8 +9,8 @@
9 * Much of the code is derived from the original DDB5074 port by 9 * Much of the code is derived from the original DDB5074 port by
10 * Geert Uytterhoeven <geert@sonycom.com> 10 * Geert Uytterhoeven <geert@sonycom.com>
11 * 11 *
12 * This program is free software; you can redistribute it and/or modify it 12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the 13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your 14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version. 15 * option) any later version.
16 * 16 *
@@ -57,18 +57,18 @@ static void pci_proc_init(void);
57 * _________________________________________________________________________ 57 * _________________________________________________________________________
58 * 58 *
59 * DESCRIPTION: Prints the count of how many times each PCI 59 * DESCRIPTION: Prints the count of how many times each PCI
60 * interrupt has asserted. Can be invoked by the 60 * interrupt has asserted. Can be invoked by the
61 * /proc filesystem. 61 * /proc filesystem.
62 * 62 *
63 * INPUTS: page - part of STDOUT calculation 63 * INPUTS: page - part of STDOUT calculation
64 * off - part of STDOUT calculation 64 * off - part of STDOUT calculation
65 * count - part of STDOUT calculation 65 * count - part of STDOUT calculation
66 * data - unused 66 * data - unused
67 * 67 *
68 * OUTPUTS: start - new start location 68 * OUTPUTS: start - new start location
69 * eof - end of file pointer 69 * eof - end of file pointer
70 * 70 *
71 * RETURNS: len - STDOUT length 71 * RETURNS: len - STDOUT length
72 * 72 *
73 ****************************************************************************/ 73 ****************************************************************************/
74static int read_msp_pci_counts(char *page, char **start, off_t off, 74static int read_msp_pci_counts(char *page, char **start, off_t off,
@@ -106,21 +106,21 @@ static int read_msp_pci_counts(char *page, char **start, off_t off,
106 * _________________________________________________________________________ 106 * _________________________________________________________________________
107 * 107 *
108 * DESCRIPTION: Generates a configuration write cycle for debug purposes. 108 * DESCRIPTION: Generates a configuration write cycle for debug purposes.
109 * The IDSEL line asserted and location and data written are 109 * The IDSEL line asserted and location and data written are
110 * immaterial. Just want to be able to prove that a 110 * immaterial. Just want to be able to prove that a
111 * configuration write can be correctly generated on the 111 * configuration write can be correctly generated on the
112 * PCI bus. Intent is that this function by invocable from 112 * PCI bus. Intent is that this function by invocable from
113 * the /proc filesystem. 113 * the /proc filesystem.
114 * 114 *
115 * INPUTS: page - part of STDOUT calculation 115 * INPUTS: page - part of STDOUT calculation
116 * off - part of STDOUT calculation 116 * off - part of STDOUT calculation
117 * count - part of STDOUT calculation 117 * count - part of STDOUT calculation
118 * data - unused 118 * data - unused
119 * 119 *
120 * OUTPUTS: start - new start location 120 * OUTPUTS: start - new start location
121 * eof - end of file pointer 121 * eof - end of file pointer
122 * 122 *
123 * RETURNS: len - STDOUT length 123 * RETURNS: len - STDOUT length
124 * 124 *
125 ****************************************************************************/ 125 ****************************************************************************/
126static int gen_pci_cfg_wr(char *page, char **start, off_t off, 126static int gen_pci_cfg_wr(char *page, char **start, off_t off,
@@ -190,11 +190,11 @@ static int gen_pci_cfg_wr(char *page, char **start, off_t off,
190 * 190 *
191 * DESCRIPTION: Create entries in the /proc filesystem for debug access. 191 * DESCRIPTION: Create entries in the /proc filesystem for debug access.
192 * 192 *
193 * INPUTS: none 193 * INPUTS: none
194 * 194 *
195 * OUTPUTS: none 195 * OUTPUTS: none
196 * 196 *
197 * RETURNS: none 197 * RETURNS: none
198 * 198 *
199 ****************************************************************************/ 199 ****************************************************************************/
200static void pci_proc_init(void) 200static void pci_proc_init(void)
@@ -214,44 +214,44 @@ static DEFINE_SPINLOCK(bpci_lock);
214 * _________________________________________________________________________ 214 * _________________________________________________________________________
215 * 215 *
216 * DESCRIPTION: Defines the address range that pciauto() will use to 216 * DESCRIPTION: Defines the address range that pciauto() will use to
217 * assign to the I/O BARs of PCI devices. 217 * assign to the I/O BARs of PCI devices.
218 * 218 *
219 * Use the start and end addresses of the MSP7120 PCI Host 219 * Use the start and end addresses of the MSP7120 PCI Host
220 * Controller I/O space, in the form that they appear on the 220 * Controller I/O space, in the form that they appear on the
221 * PCI bus AFTER MSP7120 has performed address translation. 221 * PCI bus AFTER MSP7120 has performed address translation.
222 * 222 *
223 * For I/O accesses, MSP7120 ignores OATRAN and maps I/O 223 * For I/O accesses, MSP7120 ignores OATRAN and maps I/O
224 * accesses into the bottom 0xFFF region of address space, 224 * accesses into the bottom 0xFFF region of address space,
225 * so that is the range to put into the pci_io_resource 225 * so that is the range to put into the pci_io_resource
226 * struct. 226 * struct.
227 * 227 *
228 * In MSP4200, the start address was 0x04 instead of the 228 * In MSP4200, the start address was 0x04 instead of the
229 * expected 0x00. Will just assume there was a good reason 229 * expected 0x00. Will just assume there was a good reason
230 * for this! 230 * for this!
231 * 231 *
232 * NOTES: Linux, by default, will assign I/O space to the lowest 232 * NOTES: Linux, by default, will assign I/O space to the lowest
233 * region of address space. Since MSP7120 and Linux, 233 * region of address space. Since MSP7120 and Linux,
234 * by default, have no offset in between how they map, the 234 * by default, have no offset in between how they map, the
235 * io_offset element of pci_controller struct should be set 235 * io_offset element of pci_controller struct should be set
236 * to zero. 236 * to zero.
237 * ELEMENTS: 237 * ELEMENTS:
238 * name - String used for a meaningful name. 238 * name - String used for a meaningful name.
239 * 239 *
240 * start - Start address of MSP7120's I/O space, as MSP7120 presents 240 * start - Start address of MSP7120's I/O space, as MSP7120 presents
241 * the address on the PCI bus. 241 * the address on the PCI bus.
242 * 242 *
243 * end - End address of MSP7120's I/O space, as MSP7120 presents 243 * end - End address of MSP7120's I/O space, as MSP7120 presents
244 * the address on the PCI bus. 244 * the address on the PCI bus.
245 * 245 *
246 * flags - Attributes indicating the type of resource. In this case, 246 * flags - Attributes indicating the type of resource. In this case,
247 * indicate I/O space. 247 * indicate I/O space.
248 * 248 *
249 ****************************************************************************/ 249 ****************************************************************************/
250static struct resource pci_io_resource = { 250static struct resource pci_io_resource = {
251 .name = "pci IO space", 251 .name = "pci IO space",
252 .start = 0x04, 252 .start = 0x04,
253 .end = 0x0FFF, 253 .end = 0x0FFF,
254 .flags = IORESOURCE_IO /* I/O space */ 254 .flags = IORESOURCE_IO /* I/O space */
255}; 255};
256 256
257/***************************************************************************** 257/*****************************************************************************
@@ -260,26 +260,26 @@ static struct resource pci_io_resource = {
260 * _________________________________________________________________________ 260 * _________________________________________________________________________
261 * 261 *
262 * DESCRIPTION: Defines the address range that pciauto() will use to 262 * DESCRIPTION: Defines the address range that pciauto() will use to
263 * assign to the memory BARs of PCI devices. 263 * assign to the memory BARs of PCI devices.
264 * 264 *
265 * The .start and .end values are dependent upon how address 265 * The .start and .end values are dependent upon how address
266 * translation is performed by the OATRAN regiser. 266 * translation is performed by the OATRAN regiser.
267 * 267 *
268 * The values to use for .start and .end are the values 268 * The values to use for .start and .end are the values
269 * in the form they appear on the PCI bus AFTER MSP7120 has 269 * in the form they appear on the PCI bus AFTER MSP7120 has
270 * performed OATRAN address translation. 270 * performed OATRAN address translation.
271 * 271 *
272 * ELEMENTS: 272 * ELEMENTS:
273 * name - String used for a meaningful name. 273 * name - String used for a meaningful name.
274 * 274 *
275 * start - Start address of MSP7120's memory space, as MSP7120 presents 275 * start - Start address of MSP7120's memory space, as MSP7120 presents
276 * the address on the PCI bus. 276 * the address on the PCI bus.
277 * 277 *
278 * end - End address of MSP7120's memory space, as MSP7120 presents 278 * end - End address of MSP7120's memory space, as MSP7120 presents
279 * the address on the PCI bus. 279 * the address on the PCI bus.
280 * 280 *
281 * flags - Attributes indicating the type of resource. In this case, 281 * flags - Attributes indicating the type of resource. In this case,
282 * indicate memory space. 282 * indicate memory space.
283 * 283 *
284 ****************************************************************************/ 284 ****************************************************************************/
285static struct resource pci_mem_resource = { 285static struct resource pci_mem_resource = {
@@ -295,17 +295,17 @@ static struct resource pci_mem_resource = {
295 * _________________________________________________________________________ 295 * _________________________________________________________________________
296 * 296 *
297 * DESCRIPTION: PCI status interrupt handler. Updates the count of how 297 * DESCRIPTION: PCI status interrupt handler. Updates the count of how
298 * many times each status bit has been set, then clears 298 * many times each status bit has been set, then clears
299 * the status bits. If the appropriate macros are defined, 299 * the status bits. If the appropriate macros are defined,
300 * these counts can be viewed via the /proc filesystem. 300 * these counts can be viewed via the /proc filesystem.
301 * 301 *
302 * INPUTS: irq - unused 302 * INPUTS: irq - unused
303 * dev_id - unused 303 * dev_id - unused
304 * pt_regs - unused 304 * pt_regs - unused
305 * 305 *
306 * OUTPUTS: none 306 * OUTPUTS: none
307 * 307 *
308 * RETURNS: PCIBIOS_SUCCESSFUL - success 308 * RETURNS: PCIBIOS_SUCCESSFUL - success
309 * 309 *
310 ****************************************************************************/ 310 ****************************************************************************/
311static irqreturn_t bpci_interrupt(int irq, void *dev_id) 311static irqreturn_t bpci_interrupt(int irq, void *dev_id)
@@ -335,41 +335,41 @@ static irqreturn_t bpci_interrupt(int irq, void *dev_id)
335 * _________________________________________________________________________ 335 * _________________________________________________________________________
336 * 336 *
337 * DESCRIPTION: Performs a PCI configuration access (rd or wr), then 337 * DESCRIPTION: Performs a PCI configuration access (rd or wr), then
338 * checks that the access succeeded by querying MSP7120's 338 * checks that the access succeeded by querying MSP7120's
339 * PCI status bits. 339 * PCI status bits.
340 * 340 *
341 * INPUTS: 341 * INPUTS:
342 * access_type - kind of PCI configuration cycle to perform 342 * access_type - kind of PCI configuration cycle to perform
343 * (read or write). Legal values are 343 * (read or write). Legal values are
344 * PCI_ACCESS_WRITE and PCI_ACCESS_READ. 344 * PCI_ACCESS_WRITE and PCI_ACCESS_READ.
345 * 345 *
346 * bus - pointer to the bus number of the device to 346 * bus - pointer to the bus number of the device to
347 * be targeted for the configuration cycle. 347 * be targeted for the configuration cycle.
348 * The only element of the pci_bus structure 348 * The only element of the pci_bus structure
349 * used is bus->number. This argument determines 349 * used is bus->number. This argument determines
350 * if the configuration access will be Type 0 or 350 * if the configuration access will be Type 0 or
351 * Type 1. Since MSP7120 assumes itself to be the 351 * Type 1. Since MSP7120 assumes itself to be the
352 * PCI Host, any non-zero bus->number generates 352 * PCI Host, any non-zero bus->number generates
353 * a Type 1 access. 353 * a Type 1 access.
354 * 354 *
355 * devfn - this is an 8-bit field. The lower three bits 355 * devfn - this is an 8-bit field. The lower three bits
356 * specify the function number of the device to 356 * specify the function number of the device to
357 * be targeted for the configuration cycle, with 357 * be targeted for the configuration cycle, with
358 * all three-bit combinations being legal. The 358 * all three-bit combinations being legal. The
359 * upper five bits specify the device number, 359 * upper five bits specify the device number,
360 * with legal values being 10 to 31. 360 * with legal values being 10 to 31.
361 * 361 *
362 * where - address within the Configuration Header 362 * where - address within the Configuration Header
363 * space to access. 363 * space to access.
364 * 364 *
365 * data - for write accesses, contains the data to 365 * data - for write accesses, contains the data to
366 * write. 366 * write.
367 * 367 *
368 * OUTPUTS: 368 * OUTPUTS:
369 * data - for read accesses, contains the value read. 369 * data - for read accesses, contains the value read.
370 * 370 *
371 * RETURNS: PCIBIOS_SUCCESSFUL - success 371 * RETURNS: PCIBIOS_SUCCESSFUL - success
372 * -1 - access failure 372 * -1 - access failure
373 * 373 *
374 ****************************************************************************/ 374 ****************************************************************************/
375int msp_pcibios_config_access(unsigned char access_type, 375int msp_pcibios_config_access(unsigned char access_type,
@@ -429,7 +429,7 @@ int msp_pcibios_config_access(unsigned char access_type,
429 * for this Block Copy, called Block Copy 0 Fault (BC0F) and 429 * for this Block Copy, called Block Copy 0 Fault (BC0F) and
430 * Block Copy 1 Fault (BC1F). MSP4200 and MSP7120 don't have this 430 * Block Copy 1 Fault (BC1F). MSP4200 and MSP7120 don't have this
431 * dedicated Block Copy block, so these two interrupts are now 431 * dedicated Block Copy block, so these two interrupts are now
432 * marked reserved. In case the Block Copy is resurrected in a 432 * marked reserved. In case the Block Copy is resurrected in a
433 * future design, maintain the code that treats these two interrupts 433 * future design, maintain the code that treats these two interrupts
434 * specially. 434 * specially.
435 * 435 *
@@ -439,7 +439,7 @@ int msp_pcibios_config_access(unsigned char access_type,
439 preg->if_status = ~(BPCI_IFSTATUS_BC0F | BPCI_IFSTATUS_BC1F); 439 preg->if_status = ~(BPCI_IFSTATUS_BC0F | BPCI_IFSTATUS_BC1F);
440 440
441 /* Setup address that is to appear on PCI bus */ 441 /* Setup address that is to appear on PCI bus */
442 preg->config_addr = BPCI_CFGADDR_ENABLE | 442 preg->config_addr = BPCI_CFGADDR_ENABLE |
443 (bus_num << BPCI_CFGADDR_BUSNUM_SHF) | 443 (bus_num << BPCI_CFGADDR_BUSNUM_SHF) |
444 (dev_fn << BPCI_CFGADDR_FUNCTNUM_SHF) | 444 (dev_fn << BPCI_CFGADDR_FUNCTNUM_SHF) |
445 (where & 0xFC); 445 (where & 0xFC);
@@ -494,21 +494,21 @@ int msp_pcibios_config_access(unsigned char access_type,
494 * _________________________________________________________________________ 494 * _________________________________________________________________________
495 * 495 *
496 * DESCRIPTION: Read a byte from PCI configuration address spac 496 * DESCRIPTION: Read a byte from PCI configuration address spac
497 * Since the hardware can't address 8 bit chunks 497 * Since the hardware can't address 8 bit chunks
498 * directly, read a 32-bit chunk, then mask off extraneous 498 * directly, read a 32-bit chunk, then mask off extraneous
499 * bits. 499 * bits.
500 * 500 *
501 * INPUTS bus - structure containing attributes for the PCI bus 501 * INPUTS bus - structure containing attributes for the PCI bus
502 * that the read is destined for. 502 * that the read is destined for.
503 * devfn - device/function combination that the read is 503 * devfn - device/function combination that the read is
504 * destined for. 504 * destined for.
505 * where - register within the Configuration Header space 505 * where - register within the Configuration Header space
506 * to access. 506 * to access.
507 * 507 *
508 * OUTPUTS val - read data 508 * OUTPUTS val - read data
509 * 509 *
510 * RETURNS: PCIBIOS_SUCCESSFUL - success 510 * RETURNS: PCIBIOS_SUCCESSFUL - success
511 * -1 - read access failure 511 * -1 - read access failure
512 * 512 *
513 ****************************************************************************/ 513 ****************************************************************************/
514static int 514static int
@@ -541,22 +541,22 @@ msp_pcibios_read_config_byte(struct pci_bus *bus,
541 * _________________________________________________________________________ 541 * _________________________________________________________________________
542 * 542 *
543 * DESCRIPTION: Read a word (16 bits) from PCI configuration address space. 543 * DESCRIPTION: Read a word (16 bits) from PCI configuration address space.
544 * Since the hardware can't address 16 bit chunks 544 * Since the hardware can't address 16 bit chunks
545 * directly, read a 32-bit chunk, then mask off extraneous 545 * directly, read a 32-bit chunk, then mask off extraneous
546 * bits. 546 * bits.
547 * 547 *
548 * INPUTS bus - structure containing attributes for the PCI bus 548 * INPUTS bus - structure containing attributes for the PCI bus
549 * that the read is destined for. 549 * that the read is destined for.
550 * devfn - device/function combination that the read is 550 * devfn - device/function combination that the read is
551 * destined for. 551 * destined for.
552 * where - register within the Configuration Header space 552 * where - register within the Configuration Header space
553 * to access. 553 * to access.
554 * 554 *
555 * OUTPUTS val - read data 555 * OUTPUTS val - read data
556 * 556 *
557 * RETURNS: PCIBIOS_SUCCESSFUL - success 557 * RETURNS: PCIBIOS_SUCCESSFUL - success
558 * PCIBIOS_BAD_REGISTER_NUMBER - bad register address 558 * PCIBIOS_BAD_REGISTER_NUMBER - bad register address
559 * -1 - read access failure 559 * -1 - read access failure
560 * 560 *
561 ****************************************************************************/ 561 ****************************************************************************/
562static int 562static int
@@ -600,20 +600,20 @@ msp_pcibios_read_config_word(struct pci_bus *bus,
600 * _________________________________________________________________________ 600 * _________________________________________________________________________
601 * 601 *
602 * DESCRIPTION: Read a double word (32 bits) from PCI configuration 602 * DESCRIPTION: Read a double word (32 bits) from PCI configuration
603 * address space. 603 * address space.
604 * 604 *
605 * INPUTS bus - structure containing attributes for the PCI bus 605 * INPUTS bus - structure containing attributes for the PCI bus
606 * that the read is destined for. 606 * that the read is destined for.
607 * devfn - device/function combination that the read is 607 * devfn - device/function combination that the read is
608 * destined for. 608 * destined for.
609 * where - register within the Configuration Header space 609 * where - register within the Configuration Header space
610 * to access. 610 * to access.
611 * 611 *
612 * OUTPUTS val - read data 612 * OUTPUTS val - read data
613 * 613 *
614 * RETURNS: PCIBIOS_SUCCESSFUL - success 614 * RETURNS: PCIBIOS_SUCCESSFUL - success
615 * PCIBIOS_BAD_REGISTER_NUMBER - bad register address 615 * PCIBIOS_BAD_REGISTER_NUMBER - bad register address
616 * -1 - read access failure 616 * -1 - read access failure
617 * 617 *
618 ****************************************************************************/ 618 ****************************************************************************/
619static int 619static int
@@ -652,21 +652,21 @@ msp_pcibios_read_config_dword(struct pci_bus *bus,
652 * _________________________________________________________________________ 652 * _________________________________________________________________________
653 * 653 *
654 * DESCRIPTION: Write a byte to PCI configuration address space. 654 * DESCRIPTION: Write a byte to PCI configuration address space.
655 * Since the hardware can't address 8 bit chunks 655 * Since the hardware can't address 8 bit chunks
656 * directly, a read-modify-write is performed. 656 * directly, a read-modify-write is performed.
657 * 657 *
658 * INPUTS bus - structure containing attributes for the PCI bus 658 * INPUTS bus - structure containing attributes for the PCI bus
659 * that the write is destined for. 659 * that the write is destined for.
660 * devfn - device/function combination that the write is 660 * devfn - device/function combination that the write is
661 * destined for. 661 * destined for.
662 * where - register within the Configuration Header space 662 * where - register within the Configuration Header space
663 * to access. 663 * to access.
664 * val - value to write 664 * val - value to write
665 * 665 *
666 * OUTPUTS none 666 * OUTPUTS none
667 * 667 *
668 * RETURNS: PCIBIOS_SUCCESSFUL - success 668 * RETURNS: PCIBIOS_SUCCESSFUL - success
669 * -1 - write access failure 669 * -1 - write access failure
670 * 670 *
671 ****************************************************************************/ 671 ****************************************************************************/
672static int 672static int
@@ -700,22 +700,22 @@ msp_pcibios_write_config_byte(struct pci_bus *bus,
700 * _________________________________________________________________________ 700 * _________________________________________________________________________
701 * 701 *
702 * DESCRIPTION: Write a word (16-bits) to PCI configuration address space. 702 * DESCRIPTION: Write a word (16-bits) to PCI configuration address space.
703 * Since the hardware can't address 16 bit chunks 703 * Since the hardware can't address 16 bit chunks
704 * directly, a read-modify-write is performed. 704 * directly, a read-modify-write is performed.
705 * 705 *
706 * INPUTS bus - structure containing attributes for the PCI bus 706 * INPUTS bus - structure containing attributes for the PCI bus
707 * that the write is destined for. 707 * that the write is destined for.
708 * devfn - device/function combination that the write is 708 * devfn - device/function combination that the write is
709 * destined for. 709 * destined for.
710 * where - register within the Configuration Header space 710 * where - register within the Configuration Header space
711 * to access. 711 * to access.
712 * val - value to write 712 * val - value to write
713 * 713 *
714 * OUTPUTS none 714 * OUTPUTS none
715 * 715 *
716 * RETURNS: PCIBIOS_SUCCESSFUL - success 716 * RETURNS: PCIBIOS_SUCCESSFUL - success
717 * PCIBIOS_BAD_REGISTER_NUMBER - bad register address 717 * PCIBIOS_BAD_REGISTER_NUMBER - bad register address
718 * -1 - write access failure 718 * -1 - write access failure
719 * 719 *
720 ****************************************************************************/ 720 ****************************************************************************/
721static int 721static int
@@ -753,21 +753,21 @@ msp_pcibios_write_config_word(struct pci_bus *bus,
753 * _________________________________________________________________________ 753 * _________________________________________________________________________
754 * 754 *
755 * DESCRIPTION: Write a double word (32-bits) to PCI configuration address 755 * DESCRIPTION: Write a double word (32-bits) to PCI configuration address
756 * space. 756 * space.
757 * 757 *
758 * INPUTS bus - structure containing attributes for the PCI bus 758 * INPUTS bus - structure containing attributes for the PCI bus
759 * that the write is destined for. 759 * that the write is destined for.
760 * devfn - device/function combination that the write is 760 * devfn - device/function combination that the write is
761 * destined for. 761 * destined for.
762 * where - register within the Configuration Header space 762 * where - register within the Configuration Header space
763 * to access. 763 * to access.
764 * val - value to write 764 * val - value to write
765 * 765 *
766 * OUTPUTS none 766 * OUTPUTS none
767 * 767 *
768 * RETURNS: PCIBIOS_SUCCESSFUL - success 768 * RETURNS: PCIBIOS_SUCCESSFUL - success
769 * PCIBIOS_BAD_REGISTER_NUMBER - bad register address 769 * PCIBIOS_BAD_REGISTER_NUMBER - bad register address
770 * -1 - write access failure 770 * -1 - write access failure
771 * 771 *
772 ****************************************************************************/ 772 ****************************************************************************/
773static int 773static int
@@ -794,22 +794,22 @@ msp_pcibios_write_config_dword(struct pci_bus *bus,
794 * _________________________________________________________________________ 794 * _________________________________________________________________________
795 * 795 *
796 * DESCRIPTION: Interface the PCI configuration read request with 796 * DESCRIPTION: Interface the PCI configuration read request with
797 * the appropriate function, based on how many bytes 797 * the appropriate function, based on how many bytes
798 * the read request is. 798 * the read request is.
799 * 799 *
800 * INPUTS bus - structure containing attributes for the PCI bus 800 * INPUTS bus - structure containing attributes for the PCI bus
801 * that the write is destined for. 801 * that the write is destined for.
802 * devfn - device/function combination that the write is 802 * devfn - device/function combination that the write is
803 * destined for. 803 * destined for.
804 * where - register within the Configuration Header space 804 * where - register within the Configuration Header space
805 * to access. 805 * to access.
806 * size - in units of bytes, should be 1, 2, or 4. 806 * size - in units of bytes, should be 1, 2, or 4.
807 * 807 *
808 * OUTPUTS val - value read, with any extraneous bytes masked 808 * OUTPUTS val - value read, with any extraneous bytes masked
809 * to zero. 809 * to zero.
810 * 810 *
811 * RETURNS: PCIBIOS_SUCCESSFUL - success 811 * RETURNS: PCIBIOS_SUCCESSFUL - success
812 * -1 - failure 812 * -1 - failure
813 * 813 *
814 ****************************************************************************/ 814 ****************************************************************************/
815int 815int
@@ -845,22 +845,22 @@ msp_pcibios_read_config(struct pci_bus *bus,
845 * _________________________________________________________________________ 845 * _________________________________________________________________________
846 * 846 *
847 * DESCRIPTION: Interface the PCI configuration write request with 847 * DESCRIPTION: Interface the PCI configuration write request with
848 * the appropriate function, based on how many bytes 848 * the appropriate function, based on how many bytes
849 * the read request is. 849 * the read request is.
850 * 850 *
851 * INPUTS bus - structure containing attributes for the PCI bus 851 * INPUTS bus - structure containing attributes for the PCI bus
852 * that the write is destined for. 852 * that the write is destined for.
853 * devfn - device/function combination that the write is 853 * devfn - device/function combination that the write is
854 * destined for. 854 * destined for.
855 * where - register within the Configuration Header space 855 * where - register within the Configuration Header space
856 * to access. 856 * to access.
857 * size - in units of bytes, should be 1, 2, or 4. 857 * size - in units of bytes, should be 1, 2, or 4.
858 * val - value to write 858 * val - value to write
859 * 859 *
860 * OUTPUTS: none 860 * OUTPUTS: none
861 * 861 *
862 * RETURNS: PCIBIOS_SUCCESSFUL - success 862 * RETURNS: PCIBIOS_SUCCESSFUL - success
863 * -1 - failure 863 * -1 - failure
864 * 864 *
865 ****************************************************************************/ 865 ****************************************************************************/
866int 866int
@@ -897,11 +897,11 @@ msp_pcibios_write_config(struct pci_bus *bus,
897 * _________________________________________________________________________ 897 * _________________________________________________________________________
898 * 898 *
899 * DESCRIPTION: structure to abstract the hardware specific PCI 899 * DESCRIPTION: structure to abstract the hardware specific PCI
900 * configuration accesses. 900 * configuration accesses.
901 * 901 *
902 * ELEMENTS: 902 * ELEMENTS:
903 * read - function for Linux to generate PCI Configuration reads. 903 * read - function for Linux to generate PCI Configuration reads.
904 * write - function for Linux to generate PCI Configuration writes. 904 * write - function for Linux to generate PCI Configuration writes.
905 * 905 *
906 ****************************************************************************/ 906 ****************************************************************************/
907struct pci_ops msp_pci_ops = { 907struct pci_ops msp_pci_ops = {
@@ -917,27 +917,27 @@ struct pci_ops msp_pci_ops = {
917 * Describes the attributes of the MSP7120 PCI Host Controller 917 * Describes the attributes of the MSP7120 PCI Host Controller
918 * 918 *
919 * ELEMENTS: 919 * ELEMENTS:
920 * pci_ops - abstracts the hardware specific PCI configuration 920 * pci_ops - abstracts the hardware specific PCI configuration
921 * accesses. 921 * accesses.
922 * 922 *
923 * mem_resource - address range pciauto() uses to assign to PCI device 923 * mem_resource - address range pciauto() uses to assign to PCI device
924 * memory BARs. 924 * memory BARs.
925 * 925 *
926 * mem_offset - offset between how MSP7120 outbound PCI memory 926 * mem_offset - offset between how MSP7120 outbound PCI memory
927 * transaction addresses appear on the PCI bus and how Linux 927 * transaction addresses appear on the PCI bus and how Linux
928 * wants to configure memory BARs of the PCI devices. 928 * wants to configure memory BARs of the PCI devices.
929 * MSP7120 does nothing funky, so just set to zero. 929 * MSP7120 does nothing funky, so just set to zero.
930 * 930 *
931 * io_resource - address range pciauto() uses to assign to PCI device 931 * io_resource - address range pciauto() uses to assign to PCI device
932 * I/O BARs. 932 * I/O BARs.
933 * 933 *
934 * io_offset - offset between how MSP7120 outbound PCI I/O 934 * io_offset - offset between how MSP7120 outbound PCI I/O
935 * transaction addresses appear on the PCI bus and how 935 * transaction addresses appear on the PCI bus and how
936 * Linux defaults to configure I/O BARs of the PCI devices. 936 * Linux defaults to configure I/O BARs of the PCI devices.
937 * MSP7120 maps outbound I/O accesses into the bottom 937 * MSP7120 maps outbound I/O accesses into the bottom
938 * bottom 4K of PCI address space (and ignores OATRAN). 938 * bottom 4K of PCI address space (and ignores OATRAN).
939 * Since the Linux default is to configure I/O BARs to the 939 * Since the Linux default is to configure I/O BARs to the
940 * bottom 4K, no special offset is needed. Just set to zero. 940 * bottom 4K, no special offset is needed. Just set to zero.
941 * 941 *
942 ****************************************************************************/ 942 ****************************************************************************/
943static struct pci_controller msp_pci_controller = { 943static struct pci_controller msp_pci_controller = {
@@ -955,7 +955,7 @@ static struct pci_controller msp_pci_controller = {
955 * _________________________________________________________________________ 955 * _________________________________________________________________________
956 * 956 *
957 * DESCRIPTION: Initialize the PCI Host Controller and register it with 957 * DESCRIPTION: Initialize the PCI Host Controller and register it with
958 * Linux so Linux can seize control of the PCI bus. 958 * Linux so Linux can seize control of the PCI bus.
959 * 959 *
960 ****************************************************************************/ 960 ****************************************************************************/
961void __init msp_pci_init(void) 961void __init msp_pci_init(void)
@@ -979,7 +979,7 @@ void __init msp_pci_init(void)
979 *(unsigned long *)QFLUSH_REG_1 = 3; 979 *(unsigned long *)QFLUSH_REG_1 = 3;
980 980
981 /* Configure PCI Host Controller. */ 981 /* Configure PCI Host Controller. */
982 preg->if_status = ~0; /* Clear cause register bits */ 982 preg->if_status = ~0; /* Clear cause register bits */
983 preg->config_addr = 0; /* Clear config access */ 983 preg->config_addr = 0; /* Clear config access */
984 preg->oatran = MSP_PCI_OATRAN; /* PCI outbound addr translation */ 984 preg->oatran = MSP_PCI_OATRAN; /* PCI outbound addr translation */
985 preg->if_mask = 0xF8BF87C0; /* Enable all PCI status interrupts */ 985 preg->if_mask = 0xF8BF87C0; /* Enable all PCI status interrupts */
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-04 22:01:55 -0500